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Change filename personalize.py to patch_uds_udi.py

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Also adding a more detailed explaination of what the script intends to
do
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dehanj 2024-03-21 14:31:12 +01:00 committed by Michael Cardell Widerkrantz
parent 88c6036215
commit c85b5311cd
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2 changed files with 22 additions and 5 deletions
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2
hw/application_fpga/Makefile
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@ -248,7 +248,7 @@ application_fpga_par.json: synth.json $(P)/data/$(PIN_FILE)
--pcf $(P)/data/$(PIN_FILE) --write $@ --pcf $(P)/data/$(PIN_FILE) --write $@
application_fpga.asc: application_fpga_par.json $(P)/data/uds.hex $(P)/data/udi.hex application_fpga.asc: application_fpga_par.json $(P)/data/uds.hex $(P)/data/udi.hex
UDS_HEX="$(P)/data/uds.hex" UDI_HEX="$(P)/data/udi.hex" OUT_ASC=$@ $(NEXTPNR_PATH)nextpnr-ice40 --up5k --package sg48 --ignore-loops --json $< --run tools/personalize.py UDS_HEX="$(P)/data/uds.hex" UDI_HEX="$(P)/data/udi.hex" OUT_ASC=$@ $(NEXTPNR_PATH)nextpnr-ice40 --up5k --package sg48 --ignore-loops --json $< --run tools/patch_uds_udi.py
application_fpga.bin: application_fpga.asc bram_fw.hex firmware.hex application_fpga.bin: application_fpga.asc bram_fw.hex firmware.hex
$(ICESTORM_PATH)icebram -v bram_fw.hex firmware.hex < $< > $<.tmp $(ICESTORM_PATH)icebram -v bram_fw.hex firmware.hex < $< > $<.tmp

25
hw/application_fpga/tools/personalize.py → hw/application_fpga/tools/patch_uds_udi.py
View File

@ -1,17 +1,34 @@
# -*- coding: utf-8 -*- # -*- coding: utf-8 -*-
#======================================================================= #=======================================================================
# #
# personalize.py # Copyright (C) 2023 Tillitis AB
# Written by Myrtle Shah <gatecat@ds0.me>
# SPDX-License-Identifier: GPL-2.0-only
#
# patch_uds_udi.py
# -------------- # --------------
# Python program that patches the UDS and UDI implemented using # Python program that patches the UDS and UDI implemented using
# named LUT4 instances to have unique initial values, not the generic # named LUT4 instances to have unique initial values, not the generic
# values used during synthesis, p&r and mapping. This allows us to # values used during synthesis, p&r and mapping. This allows us to
# generate device unique bitstreams without running the complete flow. # generate device unique bitstreams without running the complete flow.
# #
# Both the UDI and UDS are using bit indexing from 32 LUTs for each
# word, i.e., the first word consists of bit 0 from each 32 LUTs and
# so on.
#
# The size requirements for the UDI and UDS are specified as 1 bit (8
# bytes of data) and 3 bits (32 bytes of data), respectively. The UDI
# does not occupy the entire LUT4 instance, and to conserve resources,
# the pattern of the UDI is repeated over the unused portion of the
# LUT4 instance. This eliminates the need to drive the three MSB pins
# while still achieving the correct output.
#
# In the case of UDS, a read-enable signal is present, and the most
# significant bit serves as the read-enable input. This requires the
# lower half of initialization bits to be forced to zero, ensuring
# that the memory outputs zero when the read-enable signal is
# inactive.
# #
# Copyright (C) 2023 Tillitis AB
# Written by Myrtle Shah <gatecat@ds0.me>
# SPDX-License-Identifier: GPL-2.0-only
# #
#======================================================================= #=======================================================================