From bf1ac5c2379a4083655b548c831fb59b2a59803c Mon Sep 17 00:00:00 2001 From: Daniel Jobson Date: Mon, 30 Sep 2024 14:55:54 +0200 Subject: [PATCH] Remove YosysHQ copyright and fix name typo The removal is coordinated and approved by YosysHQ, and are removed to keep our headers uniform. These files were written on behalf of Tillitis. Two typos was corrected as well. --- hw/application_fpga/core/tk1/rtl/udi_rom.v | 4 ++-- hw/application_fpga/core/uds/rtl/uds_rom.v | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/application_fpga/core/tk1/rtl/udi_rom.v b/hw/application_fpga/core/tk1/rtl/udi_rom.v index 9d28335..da38946 100644 --- a/hw/application_fpga/core/tk1/rtl/udi_rom.v +++ b/hw/application_fpga/core/tk1/rtl/udi_rom.v @@ -2,11 +2,11 @@ // // udi_rom.v // --------- -// UDI rom generated by instatiating named SB_LUT4 resources. +// UDI rom generated by instantiating named SB_LUT4 resources. // Note: This makes the design tech specicific. // // -// Author: Claire Xiena Wolf. +// Author: Claire Xenia Wolf // Copyright (C) 2023 - Tillitis AB // SPDX-License-Identifier: GPL-2.0-only // diff --git a/hw/application_fpga/core/uds/rtl/uds_rom.v b/hw/application_fpga/core/uds/rtl/uds_rom.v index 42496b5..b820389 100644 --- a/hw/application_fpga/core/uds/rtl/uds_rom.v +++ b/hw/application_fpga/core/uds/rtl/uds_rom.v @@ -7,7 +7,7 @@ // // // Author: Claire Xenia Wolf -// Copyright (C) 2023 - YosysHQ, Tillitis AB +// Copyright (C) 2023 - Tillitis AB // SPDX-License-Identifier: GPL-2.0-only // //======================================================================