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PoC: Deny access to the SPI master in app mode

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Co-authored-by: Mikael Ågren <mikael@tillitis.se>
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Daniel Jobson 2024-11-13 16:13:16 +01:00 committed by Mikael Ågren
parent 2e1925555d
commit beb325b683
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GPG Key ID: E02DA3D397792C46
2 changed files with 25 additions and 13 deletions
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12
hw/application_fpga/README.md
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@ -139,12 +139,12 @@ Interrupts can be enabled/disabled using the PicoRV32 specific
The following table shows resource availablility for each execution The following table shows resource availablility for each execution
mode: mode:
| *Execution Mode* | *ROM* | *FW RAM* | | *Execution Mode* | *ROM* | *FW RAM* | *SPI* |
|---------------------|--------|----------| |---------------------|--------|----------|-------|
| Firmware mode | r/x | r/w | | Firmware mode | r/x | r/w | r/w |
| App mode | r | i | | App mode | r | i | i |
| IRQ_SYSCALL_LO | r/x | i | | IRQ_SYSCALL_LO | r/x | i | i |
| IRQ_SYSCALL_HI | r/x | r/w | | IRQ_SYSCALL_HI | r/x | r/w | r/w |
Legend: Legend:
r = readable r = readable

26
hw/application_fpga/core/tk1/rtl/tk1.v
View File

@ -182,6 +182,7 @@ module tk1 #(
reg spi_tx_data_vld; reg spi_tx_data_vld;
wire spi_ready; wire spi_ready;
wire [ 7 : 0] spi_rx_data; wire [ 7 : 0] spi_rx_data;
wire spi_access_en;
wire rom_exec_en; wire rom_exec_en;
@ -205,6 +206,7 @@ module tk1 #(
assign rom_exec_en = !system_mode | access_level_med | access_level_hi; assign rom_exec_en = !system_mode | access_level_med | access_level_hi;
assign fw_ram_en = !system_mode | access_level_hi; assign fw_ram_en = !system_mode | access_level_hi;
assign spi_access_en = !system_mode | access_level_hi;
//---------------------------------------------------------------- //----------------------------------------------------------------
// Module instance. // Module instance.
@ -522,8 +524,8 @@ module tk1 #(
spi_start = 1'h0; spi_start = 1'h0;
spi_tx_data_vld = 1'h0; spi_tx_data_vld = 1'h0;
spi_enable = write_data[0]; spi_enable = write_data[0] & spi_access_en;
spi_tx_data = write_data[7 : 0]; spi_tx_data = write_data[7 : 0] & {8{spi_access_en}};
if (cs) begin if (cs) begin
tmp_ready = 1'h1; tmp_ready = 1'h1;
@ -588,15 +590,21 @@ module tk1 #(
end end
if (address == ADDR_SPI_EN) begin if (address == ADDR_SPI_EN) begin
spi_enable_vld = 1'h1; if (spi_access_en) begin
spi_enable_vld = 1'h1;
end
end end
if (address == ADDR_SPI_XFER) begin if (address == ADDR_SPI_XFER) begin
spi_start = 1'h1; if (spi_access_en) begin
spi_start = 1'h1;
end
end end
if (address == ADDR_SPI_DATA) begin if (address == ADDR_SPI_DATA) begin
spi_tx_data_vld = 1'h1; if (spi_access_en) begin
spi_tx_data_vld = 1'h1;
end
end end
end end
@ -644,11 +652,15 @@ module tk1 #(
end end
if (address == ADDR_SPI_XFER) begin if (address == ADDR_SPI_XFER) begin
tmp_read_data[0] = spi_ready; if (spi_access_en) begin
tmp_read_data[0] = spi_ready;
end
end end
if (address == ADDR_SPI_DATA) begin if (address == ADDR_SPI_DATA) begin
tmp_read_data[7 : 0] = spi_rx_data; if (spi_access_en) begin
tmp_read_data[7 : 0] = spi_rx_data;
end
end end
end end