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https://github.com/tillitis/tillitis-key1.git
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PoC: Deny access to the SPI master in app mode
Co-authored-by: Mikael Ågren <mikael@tillitis.se>
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@ -139,12 +139,12 @@ Interrupts can be enabled/disabled using the PicoRV32 specific
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The following table shows resource availablility for each execution
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mode:
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| *Execution Mode* | *ROM* | *FW RAM* |
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|---------------------|--------|----------|
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| Firmware mode | r/x | r/w |
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| App mode | r | i |
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| IRQ_SYSCALL_LO | r/x | i |
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| IRQ_SYSCALL_HI | r/x | r/w |
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| *Execution Mode* | *ROM* | *FW RAM* | *SPI* |
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|---------------------|--------|----------|-------|
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| Firmware mode | r/x | r/w | r/w |
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| App mode | r | i | i |
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| IRQ_SYSCALL_LO | r/x | i | i |
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| IRQ_SYSCALL_HI | r/x | r/w | r/w |
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Legend:
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r = readable
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@ -182,6 +182,7 @@ module tk1 #(
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reg spi_tx_data_vld;
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wire spi_ready;
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wire [ 7 : 0] spi_rx_data;
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wire spi_access_en;
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wire rom_exec_en;
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@ -205,6 +206,7 @@ module tk1 #(
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assign rom_exec_en = !system_mode | access_level_med | access_level_hi;
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assign fw_ram_en = !system_mode | access_level_hi;
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assign spi_access_en = !system_mode | access_level_hi;
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//----------------------------------------------------------------
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// Module instance.
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@ -522,8 +524,8 @@ module tk1 #(
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spi_start = 1'h0;
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spi_tx_data_vld = 1'h0;
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spi_enable = write_data[0];
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spi_tx_data = write_data[7 : 0];
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spi_enable = write_data[0] & spi_access_en;
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spi_tx_data = write_data[7 : 0] & {8{spi_access_en}};
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if (cs) begin
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tmp_ready = 1'h1;
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@ -588,15 +590,21 @@ module tk1 #(
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end
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if (address == ADDR_SPI_EN) begin
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spi_enable_vld = 1'h1;
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if (spi_access_en) begin
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spi_enable_vld = 1'h1;
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end
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end
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if (address == ADDR_SPI_XFER) begin
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spi_start = 1'h1;
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if (spi_access_en) begin
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spi_start = 1'h1;
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end
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end
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if (address == ADDR_SPI_DATA) begin
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spi_tx_data_vld = 1'h1;
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if (spi_access_en) begin
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spi_tx_data_vld = 1'h1;
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end
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end
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end
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@ -644,11 +652,15 @@ module tk1 #(
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end
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if (address == ADDR_SPI_XFER) begin
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tmp_read_data[0] = spi_ready;
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if (spi_access_en) begin
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tmp_read_data[0] = spi_ready;
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end
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end
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if (address == ADDR_SPI_DATA) begin
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tmp_read_data[7 : 0] = spi_rx_data;
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if (spi_access_en) begin
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tmp_read_data[7 : 0] = spi_rx_data;
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end
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end
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end
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