mirror of
https://github.com/tillitis/tillitis-key1.git
synced 2025-03-12 10:06:47 -04:00
ch552: Add USB HID and protocol support over UART
- Add USB HID support. - Introduce a small protocol to distinguish between CDC and HID data sent over the UART. - Add some debug printing. - Cleanup of code and formatting.
This commit is contained in:
parent
90fca5d3dd
commit
b443359e9c
@ -3,7 +3,6 @@ TARGET = usb_device_cdc
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CH554_SDCC=~/ch554_sdcc/
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CH554_SDCC=~/ch554_sdcc/
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CHPROG=chprog
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CHPROG=chprog
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# Adjust the XRAM location and size to leave space for the USB DMA buffers
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# Adjust the XRAM location and size to leave space for the USB DMA buffers
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# Buffer layout in XRAM:
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# Buffer layout in XRAM:
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# 0x0000 Ep0Buffer[8]
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# 0x0000 Ep0Buffer[8]
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@ -11,8 +10,11 @@ CHPROG=chprog
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# 0x0080 EP2Buffer[2*64]
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# 0x0080 EP2Buffer[2*64]
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#
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#
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# This takes a total of 256bytes, so there are 768 bytes left.
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# This takes a total of 256bytes, so there are 768 bytes left.
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XRAM_SIZE = 0x0300
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#XRAM_SIZE = 0x0300
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XRAM_LOC = 0x0100
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#XRAM_LOC = 0x0100
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XRAM_SIZE = 0x0400
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XRAM_LOC = 0x0000
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FREQ_SYS = 16000000
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FREQ_SYS = 16000000
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@ -21,7 +23,8 @@ usb_strings.h: encode_usb_strings.py
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C_FILES = \
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C_FILES = \
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main.c \
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main.c \
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include/debug.c
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include/debug.c \
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include/print.c
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pre-flash:
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pre-flash:
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@ -8,6 +8,8 @@ WCHISP ?= wchisptool -g -f
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#######################################################
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#######################################################
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EXTRA_FLAGS = -D BUILD_CODE
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FREQ_SYS ?= 24000000
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FREQ_SYS ?= 24000000
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XRAM_SIZE ?= 0x0400
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XRAM_SIZE ?= 0x0400
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@ -37,17 +37,17 @@ if __name__ == "__main__":
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f.write('#ifndef USB_STRINGS\n')
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f.write('#ifndef USB_STRINGS\n')
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f.write('#define USB_STRINGS\n')
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f.write('#define USB_STRINGS\n')
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f.write('unsigned char __code Prod_Des[]={{ // "{}"\n'.format(product))
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f.write('unsigned char __code ProdDesc[]={{ // "{}"\n'.format(product))
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f.write(' ')
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f.write(' ')
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f.write(', '.join(['0x{:02x}'.format(i) for i in string_to_descriptor(product)]))
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f.write(', '.join(['0x{:02x}'.format(i) for i in string_to_descriptor(product)]))
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f.write('\n};\n\n')
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f.write('\n};\n\n')
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f.write('unsigned char __code Manuf_Des[]={{ // "{}"\n'.format(manufacturer))
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f.write('unsigned char __code ManufDesc[]={{ // "{}"\n'.format(manufacturer))
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f.write(' ')
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f.write(' ')
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f.write(', '.join(['0x{:02x}'.format(i) for i in string_to_descriptor(manufacturer)]))
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f.write(', '.join(['0x{:02x}'.format(i) for i in string_to_descriptor(manufacturer)]))
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f.write('\n};\n\n')
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f.write('\n};\n\n')
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f.write('unsigned char __code SerDes[]={{ // "{}"\n'.format(serial))
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f.write('unsigned char __code SerialDesc[]={{ // "{}"\n'.format(serial))
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f.write(' ')
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f.write(' ')
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f.write(', '.join(['0x{:02x}'.format(i) for i in string_to_descriptor(serial)]))
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f.write(', '.join(['0x{:02x}'.format(i) for i in string_to_descriptor(serial)]))
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f.write('\n};\n\n')
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f.write('\n};\n\n')
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@ -271,8 +271,8 @@ SFR(PIN_FUNC, 0xC6); // pin function selection
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#define bT2EX_PIN_X 0x02 // T2EX/CAP2 alternate pin enable: 0=T2EX/CAP2 on P1.1, 1=T2EX/CAP2 on RST
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#define bT2EX_PIN_X 0x02 // T2EX/CAP2 alternate pin enable: 0=T2EX/CAP2 on P1.1, 1=T2EX/CAP2 on RST
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#define bT2_PIN_X 0x01 // T2/CAP1 alternate pin enable: 0=T2/CAP1 on P1.1, 1=T2/CAP1 on P1.4
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#define bT2_PIN_X 0x01 // T2/CAP1 alternate pin enable: 0=T2/CAP1 on P1.1, 1=T2/CAP1 on P1.4
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SFR(XBUS_AUX, 0xA2); // xBUS auxiliary setting
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SFR(XBUS_AUX, 0xA2); // xBUS auxiliary setting
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#define bUART0_TX 0x80 // ReadOnly: indicate UART0 transmittal status
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#define bUART0_TX 0x80 // ReadOnly: indicate UART0 transmit status
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#define bUART0_RX 0x40 // ReadOnly: indicate UART0 receiving status
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#define bUART0_RX 0x40 // ReadOnly: indicate UART0 receive status
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#define bSAFE_MOD_ACT 0x20 // ReadOnly: safe mode action status
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#define bSAFE_MOD_ACT 0x20 // ReadOnly: safe mode action status
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#define GF2 0x08 // general purpose flag bit 2
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#define GF2 0x08 // general purpose flag bit 2
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#define bDPTR_AUTO_INC 0x04 // enable DPTR auto increase if finished MOVX_@DPTR instruction
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#define bDPTR_AUTO_INC 0x04 // enable DPTR auto increase if finished MOVX_@DPTR instruction
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@ -325,20 +325,20 @@ SFR(SCON, 0x98); // UART0 control (serial port control)
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// 11 - mode 3, 9-bit UART, baud rate = variable by timer1 or timer2 overflow rate
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// 11 - mode 3, 9-bit UART, baud rate = variable by timer1 or timer2 overflow rate
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SBIT(SM2, 0x98, 5); // enable multi-device communication in mode 2/3
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SBIT(SM2, 0x98, 5); // enable multi-device communication in mode 2/3
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#define MASK_UART0_MOD 0xE0 // bit mask of UART0 mode
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#define MASK_UART0_MOD 0xE0 // bit mask of UART0 mode
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SBIT(REN, 0x98, 4); // enable UART0 receiving
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SBIT(REN, 0x98, 4); // enable UART0 receive
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SBIT(TB8, 0x98, 3); // the 9th transmitted data bit in mode 2/3
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SBIT(TB8, 0x98, 3); // the 9th transmitted data bit in mode 2/3
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SBIT(RB8, 0x98, 2); // 9th data bit received in mode 2/3, or stop bit received for mode 1
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SBIT(RB8, 0x98, 2); // 9th data bit received in mode 2/3, or stop bit received for mode 1
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SBIT(TI, 0x98, 1); // transmit interrupt flag, set by hardware after completion of a serial transmittal, need software clear
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SBIT(TI, 0x98, 1); // transmit interrupt flag, set by hardware after completion of a serial transmit, need software clear
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SBIT(RI, 0x98, 0); // receive interrupt flag, set by hardware after completion of a serial receiving, need software clear
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SBIT(RI, 0x98, 0); // receive interrupt flag, set by hardware after completion of a serial receive, need software clear
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SFR(SBUF, 0x99); // UART0 data buffer: reading for receiving, writing for transmittal
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SFR(SBUF, 0x99); // UART0 data buffer: reading for receive, writing for transmit
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/* Timer2/Capture2 Registers */
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/* Timer2/Capture2 Registers */
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SFR(T2CON, 0xC8); // timer 2 control
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SFR(T2CON, 0xC8); // timer 2 control
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SBIT(TF2, 0xC8, 7); // timer2 overflow & interrupt flag, need software clear, the flag will not be set when either RCLK=1 or TCLK=1
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SBIT(TF2, 0xC8, 7); // timer2 overflow & interrupt flag, need software clear, the flag will not be set when either RCLK=1 or TCLK=1
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SBIT(CAP1F, 0xC8, 7); // timer2 capture 1 interrupt flag, set by T2 edge trigger if bT2_CAP1_EN=1, need software clear
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SBIT(CAP1F, 0xC8, 7); // timer2 capture 1 interrupt flag, set by T2 edge trigger if bT2_CAP1_EN=1, need software clear
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SBIT(EXF2, 0xC8, 6); // timer2 external flag, set by T2EX edge trigger if EXEN2=1, need software clear
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SBIT(EXF2, 0xC8, 6); // timer2 external flag, set by T2EX edge trigger if EXEN2=1, need software clear
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SBIT(RCLK, 0xC8, 5); // selection UART0 receiving clock: 0=timer1 overflow pulse, 1=timer2 overflow pulse
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SBIT(RCLK, 0xC8, 5); // selection UART0 receive clock: 0=timer1 overflow pulse, 1=timer2 overflow pulse
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SBIT(TCLK, 0xC8, 4); // selection UART0 transmittal clock: 0=timer1 overflow pulse, 1=timer2 overflow pulse
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SBIT(TCLK, 0xC8, 4); // selection UART0 transmit clock: 0=timer1 overflow pulse, 1=timer2 overflow pulse
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SBIT(EXEN2, 0xC8, 3); // enable T2EX trigger function: 0=ignore T2EX, 1=trigger reload or capture by T2EX edge
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SBIT(EXEN2, 0xC8, 3); // enable T2EX trigger function: 0=ignore T2EX, 1=trigger reload or capture by T2EX edge
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SBIT(TR2, 0xC8, 2); // timer2 run enable
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SBIT(TR2, 0xC8, 2); // timer2 run enable
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SBIT(C_T2, 0xC8, 1); // timer2 clock source selection: 0=timer base internal clock, 1=external edge counter base T2 falling edge
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SBIT(C_T2, 0xC8, 1); // timer2 clock source selection: 0=timer base internal clock, 1=external edge counter base T2 falling edge
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@ -389,7 +389,7 @@ SFR(SPI0_STAT, 0xF8); // SPI 0 status
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SBIT(S0_FREE, 0xF8, 3); // ReadOnly: SPI0 free status
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SBIT(S0_FREE, 0xF8, 3); // ReadOnly: SPI0 free status
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SBIT(S0_T_FIFO, 0xF8, 2); // ReadOnly: tx FIFO count for SPI0
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SBIT(S0_T_FIFO, 0xF8, 2); // ReadOnly: tx FIFO count for SPI0
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SBIT(S0_R_FIFO, 0xF8, 0); // ReadOnly: rx FIFO count for SPI0
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SBIT(S0_R_FIFO, 0xF8, 0); // ReadOnly: rx FIFO count for SPI0
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SFR(SPI0_DATA, 0xF9); // FIFO data port: reading for receiving, writing for transmittal
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SFR(SPI0_DATA, 0xF9); // FIFO data port: reading for receive, writing for transmit
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SFR(SPI0_CTRL, 0xFA); // SPI 0 control
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SFR(SPI0_CTRL, 0xFA); // SPI 0 control
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#define bS0_MISO_OE 0x80 // SPI0 MISO output enable
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#define bS0_MISO_OE 0x80 // SPI0 MISO output enable
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#define bS0_MOSI_OE 0x40 // SPI0 MOSI output enable
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#define bS0_MOSI_OE 0x40 // SPI0 MOSI output enable
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@ -415,12 +415,12 @@ SFR(SPI0_SETUP, 0xFC); // SPI 0 setup
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SFR(SCON1, 0xC0); // UART1 control (serial port control)
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SFR(SCON1, 0xC0); // UART1 control (serial port control)
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SBIT(U1SM0, 0xC0, 7); // UART1 mode, selection data bit: 0=8 bits data, 1=9 bits data
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SBIT(U1SM0, 0xC0, 7); // UART1 mode, selection data bit: 0=8 bits data, 1=9 bits data
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SBIT(U1SMOD, 0xC0, 5); // UART1 2X baud rate selection: 0=slow(Fsys/32/(256-SBAUD1)), 1=fast(Fsys/16/(256-SBAUD1))
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SBIT(U1SMOD, 0xC0, 5); // UART1 2X baud rate selection: 0=slow(Fsys/32/(256-SBAUD1)), 1=fast(Fsys/16/(256-SBAUD1))
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SBIT(U1REN, 0xC0, 4); // enable UART1 receiving
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SBIT(U1REN, 0xC0, 4); // enable UART1 receive
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SBIT(U1TB8, 0xC0, 3); // the 9th transmitted data bit in 9 bits data mode
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SBIT(U1TB8, 0xC0, 3); // the 9th transmitted data bit in 9 bits data mode
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SBIT(U1RB8, 0xC0, 2); // 9th data bit received in 9 bits data mode, or stop bit received for 8 bits data mode
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SBIT(U1RB8, 0xC0, 2); // 9th data bit received in 9 bits data mode, or stop bit received for 8 bits data mode
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SBIT(U1TI, 0xC0, 1); // transmit interrupt flag, set by hardware after completion of a serial transmittal, need software clear
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SBIT(U1TI, 0xC0, 1); // transmit interrupt flag, set by hardware after completion of a serial transmit, need software clear
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SBIT(U1RI, 0xC0, 0); // receive interrupt flag, set by hardware after completion of a serial receiving, need software clear
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SBIT(U1RI, 0xC0, 0); // receive interrupt flag, set by hardware after completion of a serial receive, need software clear
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SFR(SBUF1, 0xC1); // UART1 data buffer: reading for receiving, writing for transmittal
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SFR(SBUF1, 0xC1); // UART1 data buffer: reading for receive, writing for transmit
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SFR(SBAUD1, 0xC2); // UART1 baud rate setting
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SFR(SBAUD1, 0xC2); // UART1 baud rate setting
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/* ADC and comparator Registers */
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/* ADC and comparator Registers */
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@ -495,38 +495,38 @@ SFR(UDEV_CTRL, 0xD1); // USB device physical port control
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#define bUH_BUS_RESET 0x02 // control USB bus reset: 0=normal, 1=force bus reset
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#define bUH_BUS_RESET 0x02 // control USB bus reset: 0=normal, 1=force bus reset
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#define bUH_PORT_EN 0x01 // enable USB port: 0=disable, 1=enable port, automatic disabled if USB device detached
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#define bUH_PORT_EN 0x01 // enable USB port: 0=disable, 1=enable port, automatic disabled if USB device detached
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SFR(UEP1_CTRL, 0xD2); // endpoint 1 control
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SFR(UEP1_CTRL, 0xD2); // endpoint 1 control
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#define bUEP_R_TOG 0x80 // expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
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#define bUEP_R_TOG 0x80 // expected data toggle flag of USB endpoint X receive (OUT): 0=DATA0, 1=DATA1
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#define bUEP_T_TOG 0x40 // prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
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#define bUEP_T_TOG 0x40 // prepared data toggle flag of USB endpoint X transmit (IN): 0=DATA0, 1=DATA1
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#define bUEP_AUTO_TOG 0x10 // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
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#define bUEP_AUTO_TOG 0x10 // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
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#define bUEP_R_RES1 0x08 // handshake response type high bit for USB endpoint X receiving (OUT)
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#define bUEP_R_RES1 0x08 // handshake response type high bit for USB endpoint X receive (OUT)
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#define bUEP_R_RES0 0x04 // handshake response type low bit for USB endpoint X receiving (OUT)
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#define bUEP_R_RES0 0x04 // handshake response type low bit for USB endpoint X receive (OUT)
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#define MASK_UEP_R_RES 0x0C // bit mask of handshake response type for USB endpoint X receiving (OUT)
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#define MASK_UEP_R_RES 0x0C // bit mask of handshake response type for USB endpoint X receive (OUT)
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#define UEP_R_RES_ACK 0x00
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#define UEP_R_RES_ACK 0x00
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#define UEP_R_RES_TOUT 0x04
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#define UEP_R_RES_TOUT 0x04
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#define UEP_R_RES_NAK 0x08
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#define UEP_R_RES_NAK 0x08
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#define UEP_R_RES_STALL 0x0C
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#define UEP_R_RES_STALL 0x0C
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// bUEP_R_RES1 & bUEP_R_RES0: handshake response type for USB endpoint X receiving (OUT)
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// bUEP_R_RES1 & bUEP_R_RES0: handshake response type for USB endpoint X receive (OUT)
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// 00: ACK (ready)
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// 00: ACK (ready)
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// 01: no response, time out to host, for non-zero endpoint isochronous transactions
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// 01: no response, time out to host, for non-zero endpoint isochronous transactions
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// 10: NAK (busy)
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// 10: NAK (busy)
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// 11: STALL (error)
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// 11: STALL (error)
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#define bUEP_T_RES1 0x02 // handshake response type high bit for USB endpoint X transmittal (IN)
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#define bUEP_T_RES1 0x02 // handshake response type high bit for USB endpoint X transmit (IN)
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#define bUEP_T_RES0 0x01 // handshake response type low bit for USB endpoint X transmittal (IN)
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#define bUEP_T_RES0 0x01 // handshake response type low bit for USB endpoint X transmit (IN)
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#define MASK_UEP_T_RES 0x03 // bit mask of handshake response type for USB endpoint X transmittal (IN)
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#define MASK_UEP_T_RES 0x03 // bit mask of handshake response type for USB endpoint X transmit (IN)
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#define UEP_T_RES_ACK 0x00
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#define UEP_T_RES_ACK 0x00
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#define UEP_T_RES_TOUT 0x01
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#define UEP_T_RES_TOUT 0x01
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#define UEP_T_RES_NAK 0x02
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#define UEP_T_RES_NAK 0x02
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#define UEP_T_RES_STALL 0x03
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#define UEP_T_RES_STALL 0x03
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// bUEP_T_RES1 & bUEP_T_RES0: handshake response type for USB endpoint X transmittal (IN)
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// bUEP_T_RES1 & bUEP_T_RES0: handshake response type for USB endpoint X transmit (IN)
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// 00: DATA0 or DATA1 then expecting ACK (ready)
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// 00: DATA0 or DATA1 then expecting ACK (ready)
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// 01: DATA0 or DATA1 then expecting no response, time out from host, for non-zero endpoint isochronous transactions
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// 01: DATA0 or DATA1 then expecting no response, time out from host, for non-zero endpoint isochronous transactions
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// 10: NAK (busy)
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// 10: NAK (busy)
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// 11: STALL (error)
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// 11: STALL (error)
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SFR(UEP1_T_LEN, 0xD3); // endpoint 1 transmittal length
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SFR(UEP1_T_LEN, 0xD3); // endpoint 1 transmit length
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SFR(UEP2_CTRL, 0xD4); // endpoint 2 control
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SFR(UEP2_CTRL, 0xD4); // endpoint 2 control
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SFR(UEP2_T_LEN, 0xD5); // endpoint 2 transmittal length
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SFR(UEP2_T_LEN, 0xD5); // endpoint 2 transmit length
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SFR(UEP3_CTRL, 0xD6); // endpoint 3 control
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SFR(UEP3_CTRL, 0xD6); // endpoint 3 control
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SFR(UEP3_T_LEN, 0xD7); // endpoint 3 transmittal length
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SFR(UEP3_T_LEN, 0xD7); // endpoint 3 transmit length
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SFR(USB_INT_FG, 0xD8); // USB interrupt flag
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SFR(USB_INT_FG, 0xD8); // USB interrupt flag
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SBIT(U_IS_NAK, 0xD8, 7); // ReadOnly: indicate current USB transfer is NAK received
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SBIT(U_IS_NAK, 0xD8, 7); // ReadOnly: indicate current USB transfer is NAK received
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SBIT(U_TOG_OK, 0xD8, 6); // ReadOnly: indicate current USB transfer toggle is OK
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SBIT(U_TOG_OK, 0xD8, 6); // ReadOnly: indicate current USB transfer toggle is OK
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@ -558,16 +558,16 @@ SFR(USB_MIS_ST, 0xDA); // ReadOnly: USB miscellaneous status
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#define bUMS_SOF_PRES 0x80 // ReadOnly: indicate host SOF timer presage status
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#define bUMS_SOF_PRES 0x80 // ReadOnly: indicate host SOF timer presage status
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#define bUMS_SOF_ACT 0x40 // ReadOnly: indicate host SOF timer action status for USB host
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#define bUMS_SOF_ACT 0x40 // ReadOnly: indicate host SOF timer action status for USB host
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#define bUMS_SIE_FREE 0x20 // ReadOnly: indicate USB SIE free status
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#define bUMS_SIE_FREE 0x20 // ReadOnly: indicate USB SIE free status
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#define bUMS_R_FIFO_RDY 0x10 // ReadOnly: indicate USB receiving FIFO ready status (not empty)
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#define bUMS_R_FIFO_RDY 0x10 // ReadOnly: indicate USB receive FIFO ready status (not empty)
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#define bUMS_BUS_RESET 0x08 // ReadOnly: indicate USB bus reset status
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#define bUMS_BUS_RESET 0x08 // ReadOnly: indicate USB bus reset status
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#define bUMS_SUSPEND 0x04 // ReadOnly: indicate USB suspend status
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#define bUMS_SUSPEND 0x04 // ReadOnly: indicate USB suspend status
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#define bUMS_DM_LEVEL 0x02 // ReadOnly: indicate UDM level saved at device attached to USB host
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#define bUMS_DM_LEVEL 0x02 // ReadOnly: indicate UDM level saved at device attached to USB host
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#define bUMS_DEV_ATTACH 0x01 // ReadOnly: indicate device attached status on USB host
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#define bUMS_DEV_ATTACH 0x01 // ReadOnly: indicate device attached status on USB host
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SFR(USB_RX_LEN, 0xDB); // ReadOnly: USB receiving length
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SFR(USB_RX_LEN, 0xDB); // ReadOnly: USB receive length
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SFR(UEP0_CTRL, 0xDC); // endpoint 0 control
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SFR(UEP0_CTRL, 0xDC); // endpoint 0 control
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SFR(UEP0_T_LEN, 0xDD); // endpoint 0 transmittal length
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SFR(UEP0_T_LEN, 0xDD); // endpoint 0 transmit length
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SFR(UEP4_CTRL, 0xDE); // endpoint 4 control
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SFR(UEP4_CTRL, 0xDE); // endpoint 4 control
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SFR(UEP4_T_LEN, 0xDF); // endpoint 4 transmittal length
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SFR(UEP4_T_LEN, 0xDF); // endpoint 4 transmit length
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SFR(USB_INT_EN, 0xE1); // USB interrupt enable
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SFR(USB_INT_EN, 0xE1); // USB interrupt enable
|
||||||
#define bUIE_DEV_SOF 0x80 // enable interrupt for SOF received for USB device mode
|
#define bUIE_DEV_SOF 0x80 // enable interrupt for SOF received for USB device mode
|
||||||
#define bUIE_DEV_NAK 0x40 // enable interrupt for NAK responded for USB device mode
|
#define bUIE_DEV_NAK 0x40 // enable interrupt for NAK responded for USB device mode
|
||||||
@ -606,31 +606,31 @@ SFR16(UEP3_DMA, 0xE6); // endpoint 3 buffer start address, little-endian
|
|||||||
SFR(UEP3_DMA_L, 0xE6); // endpoint 3 buffer start address low byte
|
SFR(UEP3_DMA_L, 0xE6); // endpoint 3 buffer start address low byte
|
||||||
SFR(UEP3_DMA_H, 0xE7); // endpoint 3 buffer start address high byte
|
SFR(UEP3_DMA_H, 0xE7); // endpoint 3 buffer start address high byte
|
||||||
SFR(UEP4_1_MOD, 0xEA); // endpoint 4/1 mode
|
SFR(UEP4_1_MOD, 0xEA); // endpoint 4/1 mode
|
||||||
#define bUEP1_RX_EN 0x80 // enable USB endpoint 1 receiving (OUT)
|
#define bUEP1_RX_EN 0x80 // enable USB endpoint 1 receive (OUT)
|
||||||
#define bUEP1_TX_EN 0x40 // enable USB endpoint 1 transmittal (IN)
|
#define bUEP1_TX_EN 0x40 // enable USB endpoint 1 transmit (IN)
|
||||||
#define bUEP1_BUF_MOD 0x10 // buffer mode of USB endpoint 1
|
#define bUEP1_BUF_MOD 0x10 // buffer mode of USB endpoint 1
|
||||||
// bUEPn_RX_EN & bUEPn_TX_EN & bUEPn_BUF_MOD: USB endpoint 1/2/3 buffer mode, buffer start address is UEPn_DMA
|
// bUEPn_RX_EN & bUEPn_TX_EN & bUEPn_BUF_MOD: USB endpoint 1/2/3 buffer mode, buffer start address is UEPn_DMA
|
||||||
// 0 0 x: disable endpoint and disable buffer
|
// 0 0 x: disable endpoint and disable buffer
|
||||||
// 1 0 0: 64 bytes buffer for receiving (OUT endpoint)
|
// 1 0 0: 64 bytes buffer for receive (OUT endpoint)
|
||||||
// 1 0 1: dual 64 bytes buffer by toggle bit bUEP_R_TOG selection for receiving (OUT endpoint), total=128bytes
|
// 1 0 1: dual 64 bytes buffer by toggle bit bUEP_R_TOG selection for receive (OUT endpoint), total=128bytes
|
||||||
// 0 1 0: 64 bytes buffer for transmittal (IN endpoint)
|
// 0 1 0: 64 bytes buffer for transmit (IN endpoint)
|
||||||
// 0 1 1: dual 64 bytes buffer by toggle bit bUEP_T_TOG selection for transmittal (IN endpoint), total=128bytes
|
// 0 1 1: dual 64 bytes buffer by toggle bit bUEP_T_TOG selection for transmit (IN endpoint), total=128bytes
|
||||||
// 1 1 0: 64 bytes buffer for receiving (OUT endpoint) + 64 bytes buffer for transmittal (IN endpoint), total=128bytes
|
// 1 1 0: 64 bytes buffer for receive (OUT endpoint) + 64 bytes buffer for transmit (IN endpoint), total=128bytes
|
||||||
// 1 1 1: dual 64 bytes buffer by bUEP_R_TOG selection for receiving (OUT endpoint) + dual 64 bytes buffer by bUEP_T_TOG selection for transmittal (IN endpoint), total=256bytes
|
// 1 1 1: dual 64 bytes buffer by bUEP_R_TOG selection for receive (OUT endpoint) + dual 64 bytes buffer by bUEP_T_TOG selection for transmit (IN endpoint), total=256bytes
|
||||||
#define bUEP4_RX_EN 0x08 // enable USB endpoint 4 receiving (OUT)
|
#define bUEP4_RX_EN 0x08 // enable USB endpoint 4 receive (OUT)
|
||||||
#define bUEP4_TX_EN 0x04 // enable USB endpoint 4 transmittal (IN)
|
#define bUEP4_TX_EN 0x04 // enable USB endpoint 4 transmit (IN)
|
||||||
// bUEP4_RX_EN & bUEP4_TX_EN: USB endpoint 4 buffer mode, buffer start address is UEP0_DMA
|
// bUEP4_RX_EN & bUEP4_TX_EN: USB endpoint 4 buffer mode, buffer start address is UEP0_DMA
|
||||||
// 0 0: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint)
|
// 0 0: single 64 bytes buffer for endpoint 0 receive & transmit (OUT & IN endpoint)
|
||||||
// 1 0: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) + 64 bytes buffer for endpoint 4 receiving (OUT endpoint), total=128bytes
|
// 1 0: single 64 bytes buffer for endpoint 0 receive & transmit (OUT & IN endpoint) + 64 bytes buffer for endpoint 4 receive (OUT endpoint), total=128bytes
|
||||||
// 0 1: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) + 64 bytes buffer for endpoint 4 transmittal (IN endpoint), total=128bytes
|
// 0 1: single 64 bytes buffer for endpoint 0 receive & transmit (OUT & IN endpoint) + 64 bytes buffer for endpoint 4 transmit (IN endpoint), total=128bytes
|
||||||
// 1 1: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint)
|
// 1 1: single 64 bytes buffer for endpoint 0 receive & transmit (OUT & IN endpoint)
|
||||||
// + 64 bytes buffer for endpoint 4 receiving (OUT endpoint) + 64 bytes buffer for endpoint 4 transmittal (IN endpoint), total=192bytes
|
// + 64 bytes buffer for endpoint 4 receive (OUT endpoint) + 64 bytes buffer for endpoint 4 transmit (IN endpoint), total=192bytes
|
||||||
SFR(UEP2_3_MOD, 0xEB); // endpoint 2/3 mode
|
SFR(UEP2_3_MOD, 0xEB); // endpoint 2/3 mode
|
||||||
#define bUEP3_RX_EN 0x80 // enable USB endpoint 3 receiving (OUT)
|
#define bUEP3_RX_EN 0x80 // enable USB endpoint 3 receive (OUT)
|
||||||
#define bUEP3_TX_EN 0x40 // enable USB endpoint 3 transmittal (IN)
|
#define bUEP3_TX_EN 0x40 // enable USB endpoint 3 transmit (IN)
|
||||||
#define bUEP3_BUF_MOD 0x10 // buffer mode of USB endpoint 3
|
#define bUEP3_BUF_MOD 0x10 // buffer mode of USB endpoint 3
|
||||||
#define bUEP2_RX_EN 0x08 // enable USB endpoint 2 receiving (OUT)
|
#define bUEP2_RX_EN 0x08 // enable USB endpoint 2 receive (OUT)
|
||||||
#define bUEP2_TX_EN 0x04 // enable USB endpoint 2 transmittal (IN)
|
#define bUEP2_TX_EN 0x04 // enable USB endpoint 2 transmit (IN)
|
||||||
#define bUEP2_BUF_MOD 0x01 // buffer mode of USB endpoint 2
|
#define bUEP2_BUF_MOD 0x01 // buffer mode of USB endpoint 2
|
||||||
SFR16(UEP0_DMA, 0xEC); // endpoint 0 buffer start address, little-endian
|
SFR16(UEP0_DMA, 0xEC); // endpoint 0 buffer start address, little-endian
|
||||||
SFR(UEP0_DMA_L, 0xEC); // endpoint 0 buffer start address low byte
|
SFR(UEP0_DMA_L, 0xEC); // endpoint 0 buffer start address low byte
|
||||||
@ -644,34 +644,34 @@ SFR(UEP1_DMA_H, 0xEF); // endpoint 1 buffer start address high byte
|
|||||||
#define bUH_SOF_EN 0x40 // USB host automatic SOF enable
|
#define bUH_SOF_EN 0x40 // USB host automatic SOF enable
|
||||||
//sfr UH_RX_CTRL = 0xD4; // host receiver endpoint control
|
//sfr UH_RX_CTRL = 0xD4; // host receiver endpoint control
|
||||||
#define UH_RX_CTRL UEP2_CTRL
|
#define UH_RX_CTRL UEP2_CTRL
|
||||||
#define bUH_R_TOG 0x80 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1
|
#define bUH_R_TOG 0x80 // expected data toggle flag of host receive (IN): 0=DATA0, 1=DATA1
|
||||||
#define bUH_R_AUTO_TOG 0x10 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
|
#define bUH_R_AUTO_TOG 0x10 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
|
||||||
#define bUH_R_RES 0x04 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
|
#define bUH_R_RES 0x04 // prepared handshake response type for host receive (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
|
||||||
//sfr UH_EP_PID = 0xD5; // host endpoint and token PID, lower 4 bits for endpoint number, upper 4 bits for token PID
|
//sfr UH_EP_PID = 0xD5; // host endpoint and token PID, lower 4 bits for endpoint number, upper 4 bits for token PID
|
||||||
#define UH_EP_PID UEP2_T_LEN
|
#define UH_EP_PID UEP2_T_LEN
|
||||||
#define MASK_UH_TOKEN 0xF0 // bit mask of token PID for USB host transfer
|
#define MASK_UH_TOKEN 0xF0 // bit mask of token PID for USB host transfer
|
||||||
#define MASK_UH_ENDP 0x0F // bit mask of endpoint number for USB host transfer
|
#define MASK_UH_ENDP 0x0F // bit mask of endpoint number for USB host transfer
|
||||||
//sfr UH_TX_CTRL = 0xD6; // host transmittal endpoint control
|
//sfr UH_TX_CTRL = 0xD6; // host transmit endpoint control
|
||||||
#define UH_TX_CTRL UEP3_CTRL
|
#define UH_TX_CTRL UEP3_CTRL
|
||||||
#define bUH_T_TOG 0x40 // prepared data toggle flag of host transmittal (SETUP/OUT): 0=DATA0, 1=DATA1
|
#define bUH_T_TOG 0x40 // prepared data toggle flag of host transmit (SETUP/OUT): 0=DATA0, 1=DATA1
|
||||||
#define bUH_T_AUTO_TOG 0x10 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
|
#define bUH_T_AUTO_TOG 0x10 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
|
||||||
#define bUH_T_RES 0x01 // expected handshake response type for host transmittal (SETUP/OUT): 0=ACK (ready), 1=no response, time out from device, for isochronous transactions
|
#define bUH_T_RES 0x01 // expected handshake response type for host transmit (SETUP/OUT): 0=ACK (ready), 1=no response, time out from device, for isochronous transactions
|
||||||
//sfr UH_TX_LEN = 0xD7; // host transmittal endpoint transmittal length
|
//sfr UH_TX_LEN = 0xD7; // host transmit endpoint transmit length
|
||||||
#define UH_TX_LEN UEP3_T_LEN
|
#define UH_TX_LEN UEP3_T_LEN
|
||||||
//sfr UH_EP_MOD = 0xEB; // host endpoint mode
|
//sfr UH_EP_MOD = 0xEB; // host endpoint mode
|
||||||
#define UH_EP_MOD UEP2_3_MOD
|
#define UH_EP_MOD UEP2_3_MOD
|
||||||
#define bUH_EP_TX_EN 0x40 // enable USB host OUT endpoint transmittal
|
#define bUH_EP_TX_EN 0x40 // enable USB host OUT endpoint transmit
|
||||||
#define bUH_EP_TBUF_MOD 0x10 // buffer mode of USB host OUT endpoint
|
#define bUH_EP_TBUF_MOD 0x10 // buffer mode of USB host OUT endpoint
|
||||||
// bUH_EP_TX_EN & bUH_EP_TBUF_MOD: USB host OUT endpoint buffer mode, buffer start address is UH_TX_DMA
|
// bUH_EP_TX_EN & bUH_EP_TBUF_MOD: USB host OUT endpoint buffer mode, buffer start address is UH_TX_DMA
|
||||||
// 0 x: disable endpoint and disable buffer
|
// 0 x: disable endpoint and disable buffer
|
||||||
// 1 0: 64 bytes buffer for transmittal (OUT endpoint)
|
// 1 0: 64 bytes buffer for transmit (OUT endpoint)
|
||||||
// 1 1: dual 64 bytes buffer by toggle bit bUH_T_TOG selection for transmittal (OUT endpoint), total=128bytes
|
// 1 1: dual 64 bytes buffer by toggle bit bUH_T_TOG selection for transmit (OUT endpoint), total=128bytes
|
||||||
#define bUH_EP_RX_EN 0x08 // enable USB host IN endpoint receiving
|
#define bUH_EP_RX_EN 0x08 // enable USB host IN endpoint receive
|
||||||
#define bUH_EP_RBUF_MOD 0x01 // buffer mode of USB host IN endpoint
|
#define bUH_EP_RBUF_MOD 0x01 // buffer mode of USB host IN endpoint
|
||||||
// bUH_EP_RX_EN & bUH_EP_RBUF_MOD: USB host IN endpoint buffer mode, buffer start address is UH_RX_DMA
|
// bUH_EP_RX_EN & bUH_EP_RBUF_MOD: USB host IN endpoint buffer mode, buffer start address is UH_RX_DMA
|
||||||
// 0 x: disable endpoint and disable buffer
|
// 0 x: disable endpoint and disable buffer
|
||||||
// 1 0: 64 bytes buffer for receiving (IN endpoint)
|
// 1 0: 64 bytes buffer for receive (IN endpoint)
|
||||||
// 1 1: dual 64 bytes buffer by toggle bit bUH_R_TOG selection for receiving (IN endpoint), total=128bytes
|
// 1 1: dual 64 bytes buffer by toggle bit bUH_R_TOG selection for receive (IN endpoint), total=128bytes
|
||||||
//sfr16 UH_RX_DMA = 0xE4; // host rx endpoint buffer start address, little-endian
|
//sfr16 UH_RX_DMA = 0xE4; // host rx endpoint buffer start address, little-endian
|
||||||
#define UH_RX_DMA UEP2_DMA
|
#define UH_RX_DMA UEP2_DMA
|
||||||
//sfr UH_RX_DMA_L = 0xE4; // host rx endpoint buffer start address low byte
|
//sfr UH_RX_DMA_L = 0xE4; // host rx endpoint buffer start address low byte
|
||||||
|
@ -11,6 +11,8 @@ Header file for CH554 microcontrollers.
|
|||||||
#ifndef __USB_DEF__
|
#ifndef __USB_DEF__
|
||||||
#define __USB_DEF__
|
#define __USB_DEF__
|
||||||
|
|
||||||
|
#include "mem.h"
|
||||||
|
|
||||||
/*----- USB constant and structure define --------------------------------*/
|
/*----- USB constant and structure define --------------------------------*/
|
||||||
|
|
||||||
/* USB PID */
|
/* USB PID */
|
||||||
@ -53,34 +55,41 @@ Header file for CH554 microcontrollers.
|
|||||||
#define HUB_SET_DESCRIPTOR 0x07
|
#define HUB_SET_DESCRIPTOR 0x07
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* USB HID class request code */
|
|
||||||
#ifndef HID_GET_REPORT
|
|
||||||
#define HID_GET_REPORT 0x01
|
|
||||||
#define HID_GET_IDLE 0x02
|
|
||||||
#define HID_GET_PROTOCOL 0x03
|
|
||||||
#define HID_SET_REPORT 0x09
|
|
||||||
#define HID_SET_IDLE 0x0A
|
|
||||||
#define HID_SET_PROTOCOL 0x0B
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Bit define for USB request type */
|
/* Bit define for USB request type */
|
||||||
#ifndef USB_REQ_TYP_MASK
|
#ifndef USB_REQ_TYPE_MASK
|
||||||
#define USB_REQ_TYP_IN 0x80 /* control IN, device to host */
|
#define USB_REQ_TYPE_IN 0x80 /* Control IN, device to host */
|
||||||
#define USB_REQ_TYP_OUT 0x00 /* control OUT, host to device */
|
#define USB_REQ_TYPE_OUT 0x00 /* Control OUT, host to device */
|
||||||
#define USB_REQ_TYP_READ 0x80 /* control read, device to host */
|
#define USB_REQ_TYPE_READ 0x80 /* Control read, device to host */
|
||||||
#define USB_REQ_TYP_WRITE 0x00 /* control write, host to device */
|
#define USB_REQ_TYPE_WRITE 0x00 /* Control write, host to device */
|
||||||
#define USB_REQ_TYP_MASK 0x60 /* bit mask of request type */
|
#define USB_REQ_TYPE_MASK 0x60 /* Bit mask of request type */
|
||||||
#define USB_REQ_TYP_STANDARD 0x00
|
#define USB_REQ_TYPE_STANDARD 0x00
|
||||||
#define USB_REQ_TYP_CLASS 0x20
|
#define USB_REQ_TYPE_CLASS 0x20
|
||||||
#define USB_REQ_TYP_VENDOR 0x40
|
#define USB_REQ_TYPE_VENDOR 0x40
|
||||||
#define USB_REQ_TYP_RESERVED 0x60
|
#define USB_REQ_TYPE_RESERVED 0x60
|
||||||
#define USB_REQ_RECIP_MASK 0x1F /* bit mask of request recipient */
|
#define USB_REQ_RECIP_MASK 0x1F /* Bit mask of request recipient */
|
||||||
#define USB_REQ_RECIP_DEVICE 0x00
|
#define USB_REQ_RECIP_DEVICE 0x00
|
||||||
#define USB_REQ_RECIP_INTERF 0x01
|
#define USB_REQ_RECIP_INTERF 0x01
|
||||||
#define USB_REQ_RECIP_ENDP 0x02
|
#define USB_REQ_RECIP_ENDP 0x02
|
||||||
#define USB_REQ_RECIP_OTHER 0x03
|
#define USB_REQ_RECIP_OTHER 0x03
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/* USB HID class request code */
|
||||||
|
#ifndef USB_HID_REQ_TYPE
|
||||||
|
#define USB_HID_REQ_TYPE_GET_REPORT 0x01
|
||||||
|
#define USB_HID_REQ_TYPE_GET_IDLE 0x02
|
||||||
|
#define USB_HID_REQ_TYPE_GET_PROTOCOL 0x03
|
||||||
|
#define USB_HID_REQ_TYPE_SET_REPORT 0x09
|
||||||
|
#define USB_HID_REQ_TYPE_SET_IDLE 0x0A
|
||||||
|
#define USB_HID_REQ_TYPE_SET_PROTOCOL 0x0B
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* USB CDC class request code */
|
||||||
|
#ifndef USB_CDC_REQ_TYPE
|
||||||
|
#define USB_CDC_REQ_TYPE_SET_LINE_CODING 0x20
|
||||||
|
#define USB_CDC_REQ_TYPE_GET_LINE_CODING 0x21
|
||||||
|
#define USB_CDC_REQ_TYPE_SET_CONTROL_LINE_STATE 0x22
|
||||||
|
#endif
|
||||||
|
|
||||||
/* USB request type for hub class request */
|
/* USB request type for hub class request */
|
||||||
#ifndef HUB_GET_HUB_DESCRIPTOR
|
#ifndef HUB_GET_HUB_DESCRIPTOR
|
||||||
#define HUB_CLEAR_HUB_FEATURE 0x20
|
#define HUB_CLEAR_HUB_FEATURE 0x20
|
||||||
@ -113,78 +122,110 @@ Header file for CH554 microcontrollers.
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* USB descriptor type */
|
/* USB descriptor type */
|
||||||
#ifndef USB_DESCR_TYP_DEVICE
|
#ifndef USB_DESC_TYPE_DEVICE
|
||||||
#define USB_DESCR_TYP_DEVICE 0x01
|
#define USB_DESC_TYPE_DEVICE 0x01 // USB 1.1
|
||||||
#define USB_DESCR_TYP_CONFIG 0x02
|
#define USB_DESC_TYPE_CONFIGURATION 0x02 // USB 1.1
|
||||||
#define USB_DESCR_TYP_STRING 0x03
|
#define USB_DESC_TYPE_STRING 0x03 // USB 1.1
|
||||||
#define USB_DESCR_TYP_INTERF 0x04
|
#define USB_DESC_TYPE_INTERFACE 0x04 // USB 1.1
|
||||||
#define USB_DESCR_TYP_ENDP 0x05
|
#define USB_DESC_TYPE_ENDPOINT 0x05 // USB 1.1
|
||||||
#define USB_DESCR_TYP_QUALIF 0x06
|
#define USB_DESC_TYPE_DEVICE_QUALIFIER 0x06 // USB 2.0
|
||||||
#define USB_DESCR_TYP_SPEED 0x07
|
#define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 0x07 // USB 2.0
|
||||||
#define USB_DESCR_TYP_OTG 0x09
|
#define USB_DESC_TYPE_INTERFACE_POWER 0x08 // USB 2.0
|
||||||
#define USB_DESCR_TYP_HID 0x21
|
#define USB_DESC_TYPE_OTG 0x09 // USB 2.0
|
||||||
#define USB_DESCR_TYP_REPORT 0x22
|
#define USB_DESC_TYPE_DEBUG 0x0A // USB 2.0
|
||||||
#define USB_DESCR_TYP_PHYSIC 0x23
|
#define USB_DESC_TYPE_INTERFACE_ASSOCIATION 0x0B // USB 2.0
|
||||||
#define USB_DESCR_TYP_CS_INTF 0x24
|
#define USB_DESC_TYPE_BOS 0x0F // USB 3.x (Binary Object Store)
|
||||||
#define USB_DESCR_TYP_CS_ENDP 0x25
|
#define USB_DESC_TYPE_DEVICE_CAPABILITY 0x10 // USB 3.x
|
||||||
#define USB_DESCR_TYP_HUB 0x29
|
#define USB_DESC_TYPE_HID 0x21 // HID 1.11
|
||||||
|
#define USB_DESC_TYPE_REPORT 0x22 // HID 1.11
|
||||||
|
#define USB_DESC_TYPE_PHYSICAL 0x23 // HID 1.11
|
||||||
|
#define USB_DESC_TYPE_CS_INTERFACE 0x24 // Class-Specific (Audio, HID, CDC, etc.)
|
||||||
|
#define USB_DESC_TYPE_CS_ENDPOINT 0x25 // Class-Specific (Audio, Not HID normally, CDC, etc.)
|
||||||
|
#define USB_DESC_TYPE_SUPERSPEED_USB_ENDPOINT_COMPANION 0x30 // USB 3.x
|
||||||
|
#define USB_DESC_TYPE_SUPERSPEEDPLUS_ISOCHRONOUS_ENDPOINT_COMPANION 0x31 // USB 3.x
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* USB device class */
|
/* USB device class */
|
||||||
#ifndef USB_DEV_CLASS_HUB
|
#ifndef USB_DEV_CLASS
|
||||||
#define USB_DEV_CLASS_RESERVED 0x00
|
// Descriptor Usage; Description ; Examples
|
||||||
#define USB_DEV_CLASS_AUDIO 0x01
|
#define USB_DEV_CLASS_RESERVED 0x00 // Device ; Unspecified ; Device class is unspecified, interface descriptors are used to determine needed drivers
|
||||||
#define USB_DEV_CLASS_COMMUNIC 0x02
|
#define USB_DEV_CLASS_AUDIO 0x01 // Interface ; Audio ; Speaker, microphone, sound card, MIDI
|
||||||
#define USB_DEV_CLASS_HID 0x03
|
#define USB_DEV_CLASS_CDC_CONTROL 0x02 // Both ; Communications and CDC control ; UART and RS-232 serial adapter, modem, Wi-Fi adapter, Ethernet adapter. Used together with class 0Ah (CDC-Data) below
|
||||||
#define USB_DEV_CLASS_MONITOR 0x04
|
#define USB_DEV_CLASS_HID 0x03 // Interface ; Human interface device (HID) ; Keyboard, mouse, joystick
|
||||||
#define USB_DEV_CLASS_PHYSIC_IF 0x05
|
#define USB_DEV_CLASS_PHYSICAL 0x05 // Interface ; Physical interface device (PID) ; Force feedback joystick
|
||||||
#define USB_DEV_CLASS_POWER 0x06
|
#define USB_DEV_CLASS_IMAGE 0x06 // Interface ; Media (PTP/MTP) ; Scanner, Camera
|
||||||
#define USB_DEV_CLASS_PRINTER 0x07
|
#define USB_DEV_CLASS_PRINTER 0x07 // Interface ; Printer ; Laser printer, inkjet printer, CNC machine
|
||||||
#define USB_DEV_CLASS_STORAGE 0x08
|
#define USB_DEV_CLASS_MASS_STORAGE 0x08 // Interface ; USB mass storage, USB Attached SCSI ; USB flash drive, memory card reader, digital audio player, digital camera, external drive
|
||||||
#define USB_DEV_CLASS_HUB 0x09
|
#define USB_DEV_CLASS_HUB 0x09 // Device ; USB hub ; High speed USB hub
|
||||||
#define USB_DEV_CLASS_VEN_SPEC 0xFF
|
#define USB_DEV_CLASS_CDC_DATA 0x0A // Interface ; CDC-Data ; Used together with class 02h (Communications and CDC Control) above
|
||||||
|
#define USB_DEV_CLASS_SMART_CARD 0x0B // Interface ; Smart card ; USB smart card reader
|
||||||
|
#define USB_DEV_CLASS_CONTENT_SECURITY 0x0D // Interface ; Content security ; Fingerprint reader
|
||||||
|
#define USB_DEV_CLASS_VIDEO 0x0E // Interface ; Video ; Webcam
|
||||||
|
#define USB_DEV_CLASS_PERSONAL_HEALTHCARE 0x0F // Interface ; Personal healthcare device class (PHDC) ; Pulse monitor (watch)
|
||||||
|
#define USB_DEV_CLASS_AUDIO_VIDEO DEVICES 0x10 // Interface ; Audio/Video (AV) ; Webcam, TV
|
||||||
|
#define USB_DEV_CLASS_BILLBOARD 0x11 // Device ; Billboard ; Describes USB-C alternate modes supported by device
|
||||||
|
#define USB_DEV_CLASS_USB_TYPE_C_BRIDGE 0x12 // Interface ; ;
|
||||||
|
#define USB_DEV_CLASS_USB_BULK_DISPLAY 0x13 // Interface ; ;
|
||||||
|
#define USB_DEV_CLASS_MCTP_OVER_USB 0x14 // Interface ; ;
|
||||||
|
#define USB_DEV_CLASS_I3C_DEVICE_CLASS 0x3C // Interface ; ;
|
||||||
|
#define USB_DEV_CLASS_DIAGNOSTIC_DEVICE 0xDC // Both ; Diagnostic device ; USB compliance testing device
|
||||||
|
#define USB_DEV_CLASS_WIRELESS_CONTROLLER 0xE0 // Interface ; Wireless Controller ; Bluetooth adapter, Microsoft RNDIS
|
||||||
|
#define USB_DEV_CLASS_MISCELLANEOUS 0xEF // Both ; Miscellaneous ; ActiveSync device
|
||||||
|
#define USB_DEV_CLASS_APPLICATION_SPECIFIC 0xFE // Interface ; Application-specific ; IrDA Bridge, Test & Measurement Class (USBTMC), USB DFU (Device Firmware Upgrade)
|
||||||
|
#define USB_DEV_CLASS_VENDOR_SPECIFIC 0xFF // Both ; Vendor-specific ; Indicates that a device needs vendor-specific drivers
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* USB endpoint type and attributes */
|
/* USB endpoint type and attributes */
|
||||||
#ifndef USB_ENDP_TYPE_MASK
|
#ifndef USB_EP_TYPE_MASK
|
||||||
#define USB_ENDP_DIR_MASK 0x80
|
#define USB_EP_TYPE_CONTROL 0x00
|
||||||
#define USB_ENDP_ADDR_MASK 0x0F
|
#define USB_EP_TYPE_ISOCHRONOUS 0x01
|
||||||
#define USB_ENDP_TYPE_MASK 0x03
|
#define USB_EP_TYPE_BULK 0x02
|
||||||
#define USB_ENDP_TYPE_CTRL 0x00
|
#define USB_EP_TYPE_INTERRUPT 0x03
|
||||||
#define USB_ENDP_TYPE_ISOCH 0x01
|
|
||||||
#define USB_ENDP_TYPE_BULK 0x02
|
#define USB_EP_DIR_MASK 0x80
|
||||||
#define USB_ENDP_TYPE_INTER 0x03
|
#define USB_EP_ADDR_MASK 0x0F
|
||||||
|
#define USB_EP_TYPE_MASK 0x03
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* USB string index */
|
||||||
|
#ifndef USB_IDX_STR
|
||||||
|
#define USB_IDX_LANGID_STR 0x00
|
||||||
|
#define USB_IDX_MFC_STR 0x01
|
||||||
|
#define USB_IDX_PRODUCT_STR 0x02
|
||||||
|
#define USB_IDX_SERIAL_STR 0x03
|
||||||
|
#define USB_IDX_CONFIG_STR 0x04
|
||||||
|
#define USB_IDX_INTERFACE_STR 0x05
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifndef USB_DEVICE_ADDR
|
#ifndef USB_DEVICE_ADDR
|
||||||
#define USB_DEVICE_ADDR 0x02 /* 默认的USB设备地址 */
|
#define USB_DEVICE_ADDR 0x02
|
||||||
#endif
|
#endif
|
||||||
#ifndef DEFAULT_ENDP0_SIZE
|
#ifndef DEFAULT_EP0_SIZE
|
||||||
#define DEFAULT_ENDP0_SIZE 8 /* default maximum packet size for endpoint 0 */
|
#define DEFAULT_EP0_SIZE 8 /* Default maximum packet size for Endpoint 0 */
|
||||||
#endif
|
#endif
|
||||||
#ifndef DEFAULT_ENDP1_SIZE
|
#ifndef DEFAULT_EP1_SIZE
|
||||||
#define DEFAULT_ENDP1_SIZE 8 /* default maximum packet size for endpoint 1 */
|
#define DEFAULT_EP1_SIZE 8 /* Default maximum packet size for Endpoint 1 */
|
||||||
#endif
|
#endif
|
||||||
#ifndef MAX_PACKET_SIZE
|
#ifndef MAX_PACKET_SIZE
|
||||||
#define MAX_PACKET_SIZE 64 /* maximum packet size */
|
#define MAX_PACKET_SIZE 64 /* Maximum packet size */
|
||||||
#endif
|
#endif
|
||||||
#ifndef USB_BO_CBW_SIZE
|
#ifndef USB_BO_CBW_SIZE
|
||||||
#define USB_BO_CBW_SIZE 0x1F /* 命令块CBW的总长度 */
|
#define USB_BO_CBW_SIZE 0x1F
|
||||||
#define USB_BO_CSW_SIZE 0x0D /* 命令状态块CSW的总长度 */
|
#define USB_BO_CSW_SIZE 0x0D
|
||||||
#endif
|
#endif
|
||||||
#ifndef USB_BO_CBW_SIG0
|
#ifndef USB_BO_CBW_SIG0
|
||||||
#define USB_BO_CBW_SIG0 0x55 /* 命令块CBW识别标志'USBC' */
|
#define USB_BO_CBW_SIG0 0x55
|
||||||
#define USB_BO_CBW_SIG1 0x53
|
#define USB_BO_CBW_SIG1 0x53
|
||||||
#define USB_BO_CBW_SIG2 0x42
|
#define USB_BO_CBW_SIG2 0x42
|
||||||
#define USB_BO_CBW_SIG3 0x43
|
#define USB_BO_CBW_SIG3 0x43
|
||||||
#define USB_BO_CSW_SIG0 0x55 /* 命令状态块CSW识别标志'USBS' */
|
#define USB_BO_CSW_SIG0 0x55
|
||||||
#define USB_BO_CSW_SIG1 0x53
|
#define USB_BO_CSW_SIG1 0x53
|
||||||
#define USB_BO_CSW_SIG2 0x42
|
#define USB_BO_CSW_SIG2 0x42
|
||||||
#define USB_BO_CSW_SIG3 0x53
|
#define USB_BO_CSW_SIG3 0x53
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
typedef struct _USB_SETUP_REQ {
|
typedef struct _USB_SETUP_REQ {
|
||||||
uint8_t bRequestType;
|
uint8_t bmRequestType;
|
||||||
uint8_t bRequest;
|
uint8_t bRequest;
|
||||||
uint8_t wValueL;
|
uint8_t wValueL;
|
||||||
uint8_t wValueH;
|
uint8_t wValueH;
|
||||||
@ -194,7 +235,7 @@ typedef struct _USB_SETUP_REQ {
|
|||||||
uint8_t wLengthH;
|
uint8_t wLengthH;
|
||||||
} USB_SETUP_REQ, *PUSB_SETUP_REQ;
|
} USB_SETUP_REQ, *PUSB_SETUP_REQ;
|
||||||
|
|
||||||
typedef USB_SETUP_REQ __xdata *PXUSB_SETUP_REQ;
|
typedef USB_SETUP_REQ XDATA *PXUSB_SETUP_REQ;
|
||||||
|
|
||||||
typedef struct _USB_DEVICE_DESCR {
|
typedef struct _USB_DEVICE_DESCR {
|
||||||
uint8_t bLength;
|
uint8_t bLength;
|
||||||
@ -217,7 +258,7 @@ typedef struct _USB_DEVICE_DESCR {
|
|||||||
uint8_t bNumConfigurations;
|
uint8_t bNumConfigurations;
|
||||||
} USB_DEV_DESCR, *PUSB_DEV_DESCR;
|
} USB_DEV_DESCR, *PUSB_DEV_DESCR;
|
||||||
|
|
||||||
typedef USB_DEV_DESCR __xdata *PXUSB_DEV_DESCR;
|
typedef USB_DEV_DESCR XDATA *PXUSB_DEV_DESCR;
|
||||||
|
|
||||||
typedef struct _USB_CONFIG_DESCR {
|
typedef struct _USB_CONFIG_DESCR {
|
||||||
uint8_t bLength;
|
uint8_t bLength;
|
||||||
@ -231,7 +272,7 @@ typedef struct _USB_CONFIG_DESCR {
|
|||||||
uint8_t MaxPower;
|
uint8_t MaxPower;
|
||||||
} USB_CFG_DESCR, *PUSB_CFG_DESCR;
|
} USB_CFG_DESCR, *PUSB_CFG_DESCR;
|
||||||
|
|
||||||
typedef USB_CFG_DESCR __xdata *PXUSB_CFG_DESCR;
|
typedef USB_CFG_DESCR XDATA *PXUSB_CFG_DESCR;
|
||||||
|
|
||||||
typedef struct _USB_INTERF_DESCR {
|
typedef struct _USB_INTERF_DESCR {
|
||||||
uint8_t bLength;
|
uint8_t bLength;
|
||||||
@ -245,7 +286,7 @@ typedef struct _USB_INTERF_DESCR {
|
|||||||
uint8_t iInterface;
|
uint8_t iInterface;
|
||||||
} USB_ITF_DESCR, *PUSB_ITF_DESCR;
|
} USB_ITF_DESCR, *PUSB_ITF_DESCR;
|
||||||
|
|
||||||
typedef USB_ITF_DESCR __xdata *PXUSB_ITF_DESCR;
|
typedef USB_ITF_DESCR XDATA *PXUSB_ITF_DESCR;
|
||||||
|
|
||||||
typedef struct _USB_ENDPOINT_DESCR {
|
typedef struct _USB_ENDPOINT_DESCR {
|
||||||
uint8_t bLength;
|
uint8_t bLength;
|
||||||
@ -257,7 +298,7 @@ typedef struct _USB_ENDPOINT_DESCR {
|
|||||||
uint8_t bInterval;
|
uint8_t bInterval;
|
||||||
} USB_ENDP_DESCR, *PUSB_ENDP_DESCR;
|
} USB_ENDP_DESCR, *PUSB_ENDP_DESCR;
|
||||||
|
|
||||||
typedef USB_ENDP_DESCR __xdata *PXUSB_ENDP_DESCR;
|
typedef USB_ENDP_DESCR XDATA *PXUSB_ENDP_DESCR;
|
||||||
|
|
||||||
typedef struct _USB_CONFIG_DESCR_LONG {
|
typedef struct _USB_CONFIG_DESCR_LONG {
|
||||||
USB_CFG_DESCR cfg_descr;
|
USB_CFG_DESCR cfg_descr;
|
||||||
@ -265,7 +306,7 @@ typedef struct _USB_CONFIG_DESCR_LONG {
|
|||||||
USB_ENDP_DESCR endp_descr[1];
|
USB_ENDP_DESCR endp_descr[1];
|
||||||
} USB_CFG_DESCR_LONG, *PUSB_CFG_DESCR_LONG;
|
} USB_CFG_DESCR_LONG, *PUSB_CFG_DESCR_LONG;
|
||||||
|
|
||||||
typedef USB_CFG_DESCR_LONG __xdata *PXUSB_CFG_DESCR_LONG;
|
typedef USB_CFG_DESCR_LONG XDATA *PXUSB_CFG_DESCR_LONG;
|
||||||
|
|
||||||
typedef struct _USB_HUB_DESCR {
|
typedef struct _USB_HUB_DESCR {
|
||||||
uint8_t bDescLength;
|
uint8_t bDescLength;
|
||||||
@ -279,7 +320,7 @@ typedef struct _USB_HUB_DESCR {
|
|||||||
uint8_t PortPwrCtrlMask;
|
uint8_t PortPwrCtrlMask;
|
||||||
} USB_HUB_DESCR, *PUSB_HUB_DESCR;
|
} USB_HUB_DESCR, *PUSB_HUB_DESCR;
|
||||||
|
|
||||||
typedef USB_HUB_DESCR __xdata *PXUSB_HUB_DESCR;
|
typedef USB_HUB_DESCR XDATA *PXUSB_HUB_DESCR;
|
||||||
|
|
||||||
typedef struct _USB_HID_DESCR {
|
typedef struct _USB_HID_DESCR {
|
||||||
uint8_t bLength;
|
uint8_t bLength;
|
||||||
@ -293,9 +334,9 @@ typedef struct _USB_HID_DESCR {
|
|||||||
uint8_t wDescriptorLengthH;
|
uint8_t wDescriptorLengthH;
|
||||||
} USB_HID_DESCR, *PUSB_HID_DESCR;
|
} USB_HID_DESCR, *PUSB_HID_DESCR;
|
||||||
|
|
||||||
typedef USB_HID_DESCR __xdata *PXUSB_HID_DESCR;
|
typedef USB_HID_DESCR XDATA *PXUSB_HID_DESCR;
|
||||||
|
|
||||||
typedef struct _UDISK_BOC_CBW { /* command of BulkOnly USB-FlashDisk */
|
typedef struct _UDISK_BOC_CBW { /* Command of BulkOnly USB-FlashDisk */
|
||||||
uint8_t mCBW_Sig0;
|
uint8_t mCBW_Sig0;
|
||||||
uint8_t mCBW_Sig1;
|
uint8_t mCBW_Sig1;
|
||||||
uint8_t mCBW_Sig2;
|
uint8_t mCBW_Sig2;
|
||||||
@ -307,16 +348,16 @@ typedef struct _UDISK_BOC_CBW { /* command of BulkOnly USB-FlashDisk */
|
|||||||
uint8_t mCBW_DataLen0;
|
uint8_t mCBW_DataLen0;
|
||||||
uint8_t mCBW_DataLen1;
|
uint8_t mCBW_DataLen1;
|
||||||
uint8_t mCBW_DataLen2;
|
uint8_t mCBW_DataLen2;
|
||||||
uint8_t mCBW_DataLen3; /* uppest byte of data length, always is 0 */
|
uint8_t mCBW_DataLen3; /* MSB byte of data length, always is 0 */
|
||||||
uint8_t mCBW_Flag; /* transfer direction and etc. */
|
uint8_t mCBW_Flag; /* Transfer direction and etc. */
|
||||||
uint8_t mCBW_LUN;
|
uint8_t mCBW_LUN;
|
||||||
uint8_t mCBW_CB_Len; /* length of command block */
|
uint8_t mCBW_CB_Len; /* Length of command block */
|
||||||
uint8_t mCBW_CB_Buf[16]; /* command block buffer */
|
uint8_t mCBW_CB_Buf[16]; /* Command block buffer */
|
||||||
} UDISK_BOC_CBW, *PUDISK_BOC_CBW;
|
} UDISK_BOC_CBW, *PUDISK_BOC_CBW;
|
||||||
|
|
||||||
typedef UDISK_BOC_CBW __xdata *PXUDISK_BOC_CBW;
|
typedef UDISK_BOC_CBW XDATA *PXUDISK_BOC_CBW;
|
||||||
|
|
||||||
typedef struct _UDISK_BOC_CSW { /* status of BulkOnly USB-FlashDisk */
|
typedef struct _UDISK_BOC_CSW { /* Status of BulkOnly USB-FlashDisk */
|
||||||
uint8_t mCSW_Sig0;
|
uint8_t mCSW_Sig0;
|
||||||
uint8_t mCSW_Sig1;
|
uint8_t mCSW_Sig1;
|
||||||
uint8_t mCSW_Sig2;
|
uint8_t mCSW_Sig2;
|
||||||
@ -325,13 +366,13 @@ typedef struct _UDISK_BOC_CSW { /* status of BulkOnly USB-FlashDisk */
|
|||||||
uint8_t mCSW_Tag1;
|
uint8_t mCSW_Tag1;
|
||||||
uint8_t mCSW_Tag2;
|
uint8_t mCSW_Tag2;
|
||||||
uint8_t mCSW_Tag3;
|
uint8_t mCSW_Tag3;
|
||||||
uint8_t mCSW_Residue0; /* return: remainder bytes */
|
uint8_t mCSW_Residue0; /* Return: remainder bytes */
|
||||||
uint8_t mCSW_Residue1;
|
uint8_t mCSW_Residue1;
|
||||||
uint8_t mCSW_Residue2;
|
uint8_t mCSW_Residue2;
|
||||||
uint8_t mCSW_Residue3; /* uppest byte of remainder length, always is 0 */
|
uint8_t mCSW_Residue3; /* MSB byte of remainder length, always is 0 */
|
||||||
uint8_t mCSW_Status; /* return: result status */
|
uint8_t mCSW_Status; /* Return: result status */
|
||||||
} UDISK_BOC_CSW, *PUDISK_BOC_CSW;
|
} UDISK_BOC_CSW, *PUDISK_BOC_CSW;
|
||||||
|
|
||||||
typedef UDISK_BOC_CSW __xdata *PXUDISK_BOC_CSW;
|
typedef UDISK_BOC_CSW XDATA *PXUDISK_BOC_CSW;
|
||||||
|
|
||||||
#endif // __USB_DEF__
|
#endif // __USB_DEF__
|
||||||
|
@ -5,9 +5,9 @@
|
|||||||
* Date : 2017/01/20
|
* Date : 2017/01/20
|
||||||
* Description : CH554 DEBUG Interface
|
* Description : CH554 DEBUG Interface
|
||||||
CH554 main frequency modification, delay function definition
|
CH554 main frequency modification, delay function definition
|
||||||
Serial port 0 and serial port 1 initialization
|
Serial port 0 and serial port 1 initialization
|
||||||
Serial port 0 and serial port 1 transceiver subfunctions
|
Serial port 0 and serial port 1 transceiver subfunctions
|
||||||
Watchdog initialization
|
Watchdog initialization
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
|
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
@ -18,8 +18,8 @@
|
|||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : CfgFsys( )
|
* Function Name : CfgFsys( )
|
||||||
* Description : CH554 clock selection and configuration function, Fsys 6MHz is used by default, FREQ_SYS can be passed
|
* Description : CH554 clock selection and configuration function, Fsys 6MHz is used by default, FREQ_SYS can be passed
|
||||||
CLOCK_CFG configuration, the formula is as follows:
|
CLOCK_CFG configuration, the formula is as follows:
|
||||||
Fsys = (Fosc * 4 / (CLOCK_CFG & MASK_SYS_CK_SEL); the specific clock needs to be configured by yourself
|
Fsys = (Fosc * 4 / (CLOCK_CFG & MASK_SYS_CK_SEL); the specific clock needs to be configured by yourself
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
void CfgFsys()
|
void CfgFsys()
|
||||||
{
|
{
|
||||||
@ -51,8 +51,6 @@ void CfgFsys( )
|
|||||||
SAFE_MOD = 0x00;
|
SAFE_MOD = 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : mDelayus(UNIT16 n)
|
* Function Name : mDelayus(UNIT16 n)
|
||||||
* Description : us delay function
|
* Description : us delay function
|
||||||
@ -73,7 +71,7 @@ void mDelayuS( uint16_t n ) // Delay in uS
|
|||||||
n >>= 4;
|
n >>= 4;
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
while ( n ) { // total = 12~13 Fsys cycles, 1uS @Fsys=12MHz
|
while (n) { // Total = 12~13 Fsys cycles, 1uS @Fsys=12MHz
|
||||||
++SAFE_MOD; // 2 Fsys cycles, for higher Fsys, add operation here
|
++SAFE_MOD; // 2 Fsys cycles, for higher Fsys, add operation here
|
||||||
#ifdef FREQ_SYS
|
#ifdef FREQ_SYS
|
||||||
#if FREQ_SYS >= 14000000
|
#if FREQ_SYS >= 14000000
|
||||||
@ -162,7 +160,8 @@ int getchar() {
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
// Set pin p1.4 and p1.5 to GPIO output mode.
|
// Set pin p1.4 and p1.5 to GPIO output mode.
|
||||||
void gpio_init(){
|
void gpio_init()
|
||||||
|
{
|
||||||
// p1.4
|
// p1.4
|
||||||
P1_MOD_OC &= ~0x10;
|
P1_MOD_OC &= ~0x10;
|
||||||
P1_DIR_PU |= 0x10;
|
P1_DIR_PU |= 0x10;
|
||||||
@ -170,12 +169,11 @@ void gpio_init(){
|
|||||||
// p1.5
|
// p1.5
|
||||||
P1_MOD_OC &= ~0x20;
|
P1_MOD_OC &= ~0x20;
|
||||||
P1_DIR_PU |= 0x20;
|
P1_DIR_PU |= 0x20;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void gpio_set(uint8_t pin) {
|
void gpio_set(uint8_t pin)
|
||||||
switch (pin)
|
|
||||||
{
|
{
|
||||||
|
switch (pin) {
|
||||||
case 0x10: // p1.4
|
case 0x10: // p1.4
|
||||||
P1 |= 0x10;
|
P1 |= 0x10;
|
||||||
break;
|
break;
|
||||||
@ -187,9 +185,9 @@ void gpio_set(uint8_t pin) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void gpio_unset(uint8_t pin) {
|
void gpio_unset(uint8_t pin)
|
||||||
switch (pin)
|
|
||||||
{
|
{
|
||||||
|
switch (pin) {
|
||||||
case 0x10:
|
case 0x10:
|
||||||
P1 &= ~0x10;
|
P1 &= ~0x10;
|
||||||
break;
|
break;
|
||||||
@ -199,5 +197,4 @@ void gpio_unset(uint8_t pin) {
|
|||||||
default: // do nothing, unsupported pin.
|
default: // do nothing, unsupported pin.
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
@ -1,62 +1,93 @@
|
|||||||
|
#ifndef __DEBUG_H__
|
||||||
|
#define __DEBUG_H__
|
||||||
|
|
||||||
/* Debug */
|
/* Debug */
|
||||||
/* Provide printf subroutine and delay function */
|
/* Provide printf subroutine and delay function */
|
||||||
|
|
||||||
#pragma once
|
#pragma once
|
||||||
|
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
|
|
||||||
|
#include "ch554.h"
|
||||||
|
|
||||||
|
// UART1 baud rates
|
||||||
|
// Setting Actual % error
|
||||||
|
//Std 9600 9615.38 0.16%
|
||||||
|
// 14400 14492.75 0.64%
|
||||||
|
//Std 19200 19230.77 0.16%
|
||||||
|
//Std 38400 38461.54 0.16%
|
||||||
|
//Std 57600 58823.53 2.12%
|
||||||
|
// 100000 100000 0.00%
|
||||||
|
//Std 115200 111111.1 -3.55%
|
||||||
|
// 128000 142857.14 11.61%
|
||||||
|
//Std 230400 250000 8.51%
|
||||||
|
// 250000 250000 0%
|
||||||
|
// 256000 333333.33 30.21%
|
||||||
|
//Std 460800 500000 8.51%
|
||||||
|
//Std 500000 500000 0%
|
||||||
|
//Std 576000
|
||||||
|
//Std 921600
|
||||||
|
//Std 1000000 1000000 0.00%
|
||||||
|
|
||||||
#ifndef UART0_BAUD
|
#ifndef UART0_BAUD
|
||||||
#define UART0_BAUD 9600
|
//#define UART0_BAUD 115200
|
||||||
|
#define UART0_BAUD 1000000
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifndef UART1_BAUD
|
#ifndef UART1_BAUD
|
||||||
#define UART1_BAUD 9600
|
#define UART1_BAUD 500000
|
||||||
|
//#define UART1_BAUD 1000000
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
void CfgFsys(); // CH554 clock selection and configuration
|
void CfgFsys(); // CH554 clock selection and configuration
|
||||||
|
|
||||||
void mDelayuS(uint16_t n); // Delay in units of uS
|
void mDelayuS(uint16_t n); // Delay in units of uS
|
||||||
void mDelaymS(uint16_t n); // Delay in mS
|
void mDelaymS(uint16_t n); // Delay in mS
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : CH554UART0Alter()
|
* Function Name : CH554UART0Alter()
|
||||||
* Description : CH554 serial port 0 pin mapping, serial port mapping to P0.2 and P0.3
|
* Description : Set the alternate pin mappings for UART0 (RX on P1.2, TX on P1.3)
|
||||||
|
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
inline void CH554UART0Alter()
|
inline void CH554UART0Alter()
|
||||||
{
|
{
|
||||||
PIN_FUNC |= bUART0_PIN_X; //串口映射到P1.2和P1.3
|
PIN_FUNC |= bUART0_PIN_X; // RX on P1.2, TX on P1.3
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : mInitSTDIO()
|
* Function Name : mInitSTDIO()
|
||||||
* Description : CH554 serial port 0 is initialized, T1 is used as the baud rate generator of UART0 by default, T2 can also be used
|
* Description : CH554 UART0 is initialized
|
||||||
As a baud rate generator
|
* T1 is used as the baud rate generator of UART0 by default
|
||||||
|
* T2 can also be used as baud rate generator
|
||||||
|
* RX on P3.0, TX on P3.1
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
inline void mInitSTDIO( )
|
inline void mInitSTDIO( )
|
||||||
{
|
{
|
||||||
uint32_t x;
|
uint32_t x;
|
||||||
uint8_t x2;
|
uint8_t x2;
|
||||||
|
|
||||||
SM0 = 0;
|
SM0 = 0; // 8-bit data asynchronous communication
|
||||||
SM1 = 1;
|
SM1 = 1; // Variable baud rate, which is generated by timer T1 or T2
|
||||||
SM2 = 0; //Serial port 0 usage mode 1
|
|
||||||
|
// With SM0=0 and SM1=1 we are now in UART0 Mode 1
|
||||||
|
|
||||||
|
SM2 = 0; // In Mode 1, SM2=0 gives that the Receive interrupt flag bit is set when receiving data and the reception is valid
|
||||||
|
|
||||||
// Use Timer1 as a baud rate generator
|
// Use Timer1 as a baud rate generator
|
||||||
RCLK = 0; // UART0 receive clock
|
RCLK = 0; // UART0 receive clock
|
||||||
TCLK = 0; // UART0 transmit clock
|
TCLK = 0; // UART0 transmit clock
|
||||||
PCON |= SMOD;
|
|
||||||
|
PCON |= SMOD; // Set Fast mode for UART0 baud rate communication
|
||||||
x = 10 * FREQ_SYS / UART0_BAUD / 16; // If you change the main frequency, be careful not to overflow the value of x
|
x = 10 * FREQ_SYS / UART0_BAUD / 16; // If you change the main frequency, be careful not to overflow the value of x
|
||||||
x2 = x % 10;
|
x2 = x % 10;
|
||||||
x /= 10;
|
x /= 10;
|
||||||
if ( x2 >= 5 ) x ++; //rounding
|
if (x2 >= 5) {
|
||||||
|
x++; // Rounding
|
||||||
TMOD = TMOD & ~ bT1_GATE & ~ bT1_CT & ~ MASK_T1_MOD | bT1_M1; //0X20, Timer1 as 8-bit auto-reload timer
|
}
|
||||||
|
TMOD = (TMOD & ~bT1_GATE & ~bT1_CT & ~MASK_T1_MOD) | bT1_M1; // Timer1 as 8-bit auto-reload timer
|
||||||
T2MOD = T2MOD | bTMR_CLK | bT1_CLK; // Timer1 clock selection
|
T2MOD = T2MOD | bTMR_CLK | bT1_CLK; // Timer1 clock selection
|
||||||
TH1 = 0-x; // 12MHz crystal oscillator, buad / 12 is the actual need to set the baud rate
|
TH1 = 0-x; // 12MHz crystal oscillator, buad / 12 is the actual need to set the baud rate
|
||||||
TR1 = 1; // Start timer 1
|
TR1 = 1; // Start timer 1
|
||||||
TI = 1;
|
TI = 1; // Enable transmit interrupt
|
||||||
REN = 1; //Serial 0 receive enable
|
REN = 1; // UART0 receive enable
|
||||||
|
ES = 1; // UART0 interrupt enable
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@ -66,7 +97,8 @@ inline void mInitSTDIO( )
|
|||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
inline uint8_t CH554UART0RcvByte()
|
inline uint8_t CH554UART0RcvByte()
|
||||||
{
|
{
|
||||||
while(RI == 0); // wait for uart rx interrupt flag
|
while (RI == 0)
|
||||||
|
; // Wait for uart rx interrupt flag
|
||||||
RI = 0;
|
RI = 0;
|
||||||
return SBUF;
|
return SBUF;
|
||||||
}
|
}
|
||||||
@ -78,58 +110,94 @@ inline uint8_t CH554UART0RcvByte( )
|
|||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
inline void CH554UART0SendByte(uint8_t SendDat)
|
inline void CH554UART0SendByte(uint8_t SendDat)
|
||||||
{
|
{
|
||||||
|
|
||||||
SBUF = SendDat;
|
SBUF = SendDat;
|
||||||
while(TI ==0); // wait for transmit to finish (TI == 1)
|
while (TI == 0)
|
||||||
|
; // Wait for transmit to finish (TI == 1)
|
||||||
TI = 0;
|
TI = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : CH554UART1Alter()
|
* Function Name : CH554UART1Alter()
|
||||||
* Description : Set the alternate pin mappings for UART1 (TX on P3.2, RX on P3.4)
|
* Description : Set the alternate pin mappings for UART1 (RX on P3.4, TX on P3.2)
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
inline void CH554UART1Alter()
|
inline void CH554UART1Alter()
|
||||||
{
|
{
|
||||||
PIN_FUNC |= bUART1_PIN_X;
|
PIN_FUNC |= bUART1_PIN_X; // RX on P3.4, TX on P3.2
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : UART1Setup()
|
* Function Name : UART1Setup()
|
||||||
* Description : CH554串口1初始化
|
* Description : CH554 serial port 1 initialization
|
||||||
|
* RX on P1.6, TX on P1.7
|
||||||
|
*
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
inline void UART1Setup()
|
inline void UART1Setup()
|
||||||
{
|
{
|
||||||
U1SM0 = 0; //UART1选择8位数据位
|
U1SM0 = 0; // UART1 selects 8-bit data bit
|
||||||
U1SMOD = 1; //快速模式
|
U1SMOD = 1; // Fast mode
|
||||||
U1REN = 1; //使能接收
|
U1REN = 1; // Enable receiving
|
||||||
// should correct for rounding in SBAUD1 calculation
|
// Should correct for rounding in SBAUD1 calculation
|
||||||
SBAUD1 = 256 - FREQ_SYS/16/UART1_BAUD;
|
SBAUD1 = 256 - FREQ_SYS/16/UART1_BAUD; // Calculation for Fast mode
|
||||||
|
IE_UART1 = 1; // Enable UART1 interrupt
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : UART1Clean()
|
||||||
|
* Description : Read out spurious data
|
||||||
|
*******************************************************************************/
|
||||||
|
inline void UART1Clean()
|
||||||
|
{
|
||||||
|
uint8_t tmp;
|
||||||
|
|
||||||
|
while (U1RI) {
|
||||||
|
tmp = SBUF1;
|
||||||
|
U1RI = 0;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : CH554UART1RcvByte()
|
* Function Name : CH554UART1RcvByte()
|
||||||
* Description : CH554UART1接收一个字节
|
* Description : CH554UART1 receives a byte
|
||||||
* Return : SBUF
|
* Return : SBUF
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
inline uint8_t CH554UART1RcvByte( )
|
inline uint8_t CH554UART1RcvByte( )
|
||||||
{
|
{
|
||||||
while(U1RI == 0); //查询接收,中断方式可不用
|
while (U1RI == 0) // Query reception, interrupt mode is not required
|
||||||
|
;
|
||||||
U1RI = 0;
|
U1RI = 0;
|
||||||
return SBUF1;
|
return SBUF1;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : CH554UART1SendByte(uint8_t SendDat)
|
* Function Name : CH554UART1SendByte(uint8_t SendDat)
|
||||||
* Description : CH554UART1发送一个字节
|
* Description : CH554UART1 sends a byte
|
||||||
* Input : uint8_t SendDat;要发送的数据
|
* Input : uint8_t SendDat; data to be sent
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
inline void CH554UART1SendByte(uint8_t SendDat)
|
inline void CH554UART1SendByte(uint8_t SendDat)
|
||||||
{
|
{
|
||||||
SBUF1 = SendDat; //查询发送,中断方式可不用下面2条语句,但发送前需TI=0
|
SBUF1 = SendDat; // Query sending, the interrupt mode does not need the following two statements, but TI=0 is required before sending
|
||||||
while(U1TI ==0);
|
while (U1TI == 0)
|
||||||
|
;
|
||||||
U1TI = 0;
|
U1TI = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : CH554UART1SendBuffer(uint8_t SendDat)
|
||||||
|
* Description : CH554UART1 sends a complete buffer
|
||||||
|
* Input : uint8_t *Buf; Data to be sent
|
||||||
|
* Input : uint32_t Len; Length of data
|
||||||
|
*******************************************************************************/
|
||||||
|
inline void CH554UART1SendBuffer(uint8_t *Buf, uint32_t Len)
|
||||||
|
{
|
||||||
|
uint32_t Count = 0;
|
||||||
|
while (Count < Len) {
|
||||||
|
SBUF1 = Buf[Count++];
|
||||||
|
while (U1TI == 0)
|
||||||
|
;
|
||||||
|
U1TI = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
#if SDCC < 370
|
#if SDCC < 370
|
||||||
void putchar(char c);
|
void putchar(char c);
|
||||||
char getchar();
|
char getchar();
|
||||||
@ -153,12 +221,11 @@ inline void CH554WDTModeSelect(uint8_t mode)
|
|||||||
SAFE_MOD = 0xaa; // Enter Safe Mode
|
SAFE_MOD = 0xaa; // Enter Safe Mode
|
||||||
if (mode) {
|
if (mode) {
|
||||||
GLOBAL_CFG |= bWDOG_EN; // Start watchdog reset
|
GLOBAL_CFG |= bWDOG_EN; // Start watchdog reset
|
||||||
|
} else {
|
||||||
|
GLOBAL_CFG &= ~bWDOG_EN; //Start watchdog only as a timer
|
||||||
}
|
}
|
||||||
|
SAFE_MOD = 0x00; // Exit safe Mode
|
||||||
else GLOBAL_CFG &= ~bWDOG_EN; //Start watchdog only as a timer
|
|
||||||
SAFE_MOD = 0x00; //exit safe Mode
|
|
||||||
WDOG_COUNT = 0; // Watchdog assignment initial value
|
WDOG_COUNT = 0; // Watchdog assignment initial value
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@ -173,12 +240,12 @@ inline void CH554WDTModeSelect(uint8_t mode)
|
|||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
inline void CH554WDTFeed(uint8_t tim)
|
inline void CH554WDTFeed(uint8_t tim)
|
||||||
{
|
{
|
||||||
|
|
||||||
WDOG_COUNT = tim; // Watchdog counter assignment
|
WDOG_COUNT = tim; // Watchdog counter assignment
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
// Set pin p1.4 and p1.5 to GPIO output mode.
|
// Set pin p1.4 and p1.5 to GPIO output mode.
|
||||||
void gpio_init();
|
void gpio_init();
|
||||||
void gpio_set(uint8_t pin);
|
void gpio_set(uint8_t pin);
|
||||||
void gpio_unset(uint8_t pin);
|
void gpio_unset(uint8_t pin);
|
||||||
|
|
||||||
|
#endif
|
||||||
|
32
hw/usb_interface/ch552_fw/include/mem.h
Normal file
32
hw/usb_interface/ch552_fw/include/mem.h
Normal file
@ -0,0 +1,32 @@
|
|||||||
|
#ifndef __MEM_PART_H__
|
||||||
|
#define __MEM_PART_H__
|
||||||
|
|
||||||
|
// https://github.com/contiki-os/contiki/wiki/8051-Memory-Spaces
|
||||||
|
|
||||||
|
#ifdef BUILD_CODE
|
||||||
|
#define IDATA __idata
|
||||||
|
#define XDATA __xdata
|
||||||
|
#define AT0000 __at(0x0000) // 0x000 0
|
||||||
|
#define AT0008 __at(0x0008) // 0x008, 8
|
||||||
|
#define AT0010 __at(0x0010) // 0x010, 16
|
||||||
|
#define AT0040 __at(0x0040) // 0x040, 64
|
||||||
|
#define AT0050 __at(0x0050) // 0x050, 80
|
||||||
|
#define AT0080 __at(0x0080) // 0x080, 128
|
||||||
|
#define AT0090 __at(0x0090) // 0x090, 144
|
||||||
|
#define AT0100 __at(0x0100) // 0x100, 256
|
||||||
|
#define FLASH __code
|
||||||
|
#else
|
||||||
|
#define IDATA
|
||||||
|
#define XDATA
|
||||||
|
#define AT0000
|
||||||
|
#define AT0008
|
||||||
|
#define AT0010
|
||||||
|
#define AT0040
|
||||||
|
#define AT0050
|
||||||
|
#define AT0080
|
||||||
|
#define AT0090
|
||||||
|
#define AT0100
|
||||||
|
#define FLASH
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
188
hw/usb_interface/ch552_fw/include/print.c
Normal file
188
hw/usb_interface/ch552_fw/include/print.c
Normal file
@ -0,0 +1,188 @@
|
|||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
#include "debug.h"
|
||||||
|
#include "print.h"
|
||||||
|
|
||||||
|
void printStr(uint8_t *str)
|
||||||
|
{
|
||||||
|
#ifdef DEBUG_PRINT
|
||||||
|
while (*str != 0) {
|
||||||
|
CH554UART0SendByte(*str);
|
||||||
|
++str;
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
(void)str;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
void printChar(uint8_t c)
|
||||||
|
{
|
||||||
|
#ifdef DEBUG_PRINT
|
||||||
|
CH554UART0SendByte(c);
|
||||||
|
#else
|
||||||
|
(void)c;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef USE_NUM_U8
|
||||||
|
int8_t uint8_to_str(uint8_t *buf, uint8_t bufsize, uint8_t n)
|
||||||
|
{
|
||||||
|
uint8_t *start;
|
||||||
|
|
||||||
|
#ifdef USE_NEGATIVE_NUMS
|
||||||
|
if (n < 0) { // Handle negative numbers.
|
||||||
|
if (!bufsize) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
*buf++ = '-';
|
||||||
|
bufsize--;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
start = buf; // Remember the start of the string. This will come into play at the end.
|
||||||
|
|
||||||
|
do {
|
||||||
|
// Handle the current digit.
|
||||||
|
uint8_t digit;
|
||||||
|
if (!bufsize) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
digit = n % 10;
|
||||||
|
#ifdef USE_NEGATIVE_NUMS
|
||||||
|
if (digit < 0) {
|
||||||
|
digit *= -1;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
*buf++ = digit + '0';
|
||||||
|
bufsize--;
|
||||||
|
n /= 10;
|
||||||
|
} while (n);
|
||||||
|
|
||||||
|
// Terminate the string.
|
||||||
|
if (!bufsize) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
*buf = 0;
|
||||||
|
|
||||||
|
// We wrote the string backwards, i.e. with least significant digits first. Now reverse the string.
|
||||||
|
--buf;
|
||||||
|
while (start < buf) {
|
||||||
|
uint8_t a = *start;
|
||||||
|
*start = *buf;
|
||||||
|
*buf = a;
|
||||||
|
++start;
|
||||||
|
--buf;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef USE_NUM_U32
|
||||||
|
int8_t uint32_to_str(uint8_t *buf, uint8_t bufsize, uint32_t n)
|
||||||
|
{
|
||||||
|
uint8_t *start;
|
||||||
|
|
||||||
|
#ifdef USE_NEGATIVE_NUMS
|
||||||
|
if (n < 0) { // Handle negative numbers.
|
||||||
|
if (!bufsize) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
*buf++ = '-';
|
||||||
|
bufsize--;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
start = buf; // Remember the start of the string. This will come into play at the end.
|
||||||
|
|
||||||
|
do {
|
||||||
|
// Handle the current digit.
|
||||||
|
uint8_t digit;
|
||||||
|
if (!bufsize) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
digit = n % 10;
|
||||||
|
#ifdef USE_NEGATIVE_NUMS
|
||||||
|
if (digit < 0) {
|
||||||
|
digit *= -1;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
*buf++ = digit + '0';
|
||||||
|
bufsize--;
|
||||||
|
n /= 10;
|
||||||
|
} while (n);
|
||||||
|
|
||||||
|
// Terminate the string.
|
||||||
|
if (!bufsize) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
*buf = 0;
|
||||||
|
|
||||||
|
// We wrote the string backwards, i.e. with least significant digits first. Now reverse the string.
|
||||||
|
--buf;
|
||||||
|
while (start < buf) {
|
||||||
|
uint8_t a = *start;
|
||||||
|
*start = *buf;
|
||||||
|
*buf = a;
|
||||||
|
++start;
|
||||||
|
--buf;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef USE_NUM_U8
|
||||||
|
void printNumU8(uint8_t num)
|
||||||
|
{
|
||||||
|
#ifdef DEBUG_PRINT
|
||||||
|
uint8_t num_str[4] = { 0 };
|
||||||
|
int8_t ret;
|
||||||
|
ret = uint8_to_str(num_str, 4, num);
|
||||||
|
if (!ret) {
|
||||||
|
printStr(num_str);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef USE_NUM_U32
|
||||||
|
void printNumU32(uint32_t num)
|
||||||
|
{
|
||||||
|
#ifdef DEBUG_PRINT
|
||||||
|
uint8_t num_str[11] = { 0 };
|
||||||
|
int8_t ret;
|
||||||
|
ret = uint32_to_str(num_str, 10, num);
|
||||||
|
if (!ret) {
|
||||||
|
printStr(num_str);
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
(void)num;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
void printNumHex(uint8_t num)
|
||||||
|
{
|
||||||
|
#ifdef DEBUG_PRINT
|
||||||
|
// High nibble
|
||||||
|
uint8_t val = num >> 4;
|
||||||
|
if (val <= 9) {
|
||||||
|
val = val + '0';
|
||||||
|
} else {
|
||||||
|
val = (val-10) + 'A';
|
||||||
|
}
|
||||||
|
printChar(val);
|
||||||
|
|
||||||
|
// Low nibble
|
||||||
|
val = num & 0x0F;
|
||||||
|
if (val <= 9) {
|
||||||
|
val = val + '0';
|
||||||
|
} else {
|
||||||
|
val = (val-10) + 'A';
|
||||||
|
}
|
||||||
|
printChar(val);
|
||||||
|
#else
|
||||||
|
(void)num;
|
||||||
|
#endif
|
||||||
|
}
|
42
hw/usb_interface/ch552_fw/include/print.h
Normal file
42
hw/usb_interface/ch552_fw/include/print.h
Normal file
@ -0,0 +1,42 @@
|
|||||||
|
#ifndef __PRINT_H__
|
||||||
|
#define __PRINT_H__
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
#define DEBUG_PRINT
|
||||||
|
//#define DEBUG_SETUP
|
||||||
|
//#define UART_OUT_DEBUG
|
||||||
|
//#define USE_NUM_U8
|
||||||
|
#define USE_NUM_U32
|
||||||
|
//#define USE_NEGATIVE_NUMS
|
||||||
|
|
||||||
|
void printStr(uint8_t *str);
|
||||||
|
void printChar(uint8_t c);
|
||||||
|
|
||||||
|
#ifdef DEBUG_SETUP
|
||||||
|
#define printStrSetup(x) printStr(x)
|
||||||
|
#define printNumHexSetup(x) printNumHex(x)
|
||||||
|
#else
|
||||||
|
#define printStrSetup(x)
|
||||||
|
#define printNumHexSetup(x)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef USE_NUM_U8
|
||||||
|
int8_t uint8_to_str(uint8_t *buf, uint8_t bufsize, uint8_t n);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef USE_NUM_U32
|
||||||
|
int8_t uint32_to_str(uint8_t *buf, uint8_t bufsize, uint32_t n);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef USE_NUM_U8
|
||||||
|
void printNumU8(uint8_t num);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef USE_NUM_U32
|
||||||
|
void printNumU32(uint32_t num);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
void printNumHex(uint8_t num);
|
||||||
|
|
||||||
|
#endif
|
@ -1,15 +1,31 @@
|
|||||||
#ifndef USB_STRINGS
|
#ifndef __USB_STRINGS_H__
|
||||||
#define USB_STRINGS
|
#define __USB_STRINGS_H__
|
||||||
unsigned char __code Prod_Des[]={ // "MTA1-USB-V1"
|
|
||||||
0x18, 0x03, 0x4d, 0x00, 0x54, 0x00, 0x41, 0x00, 0x31, 0x00, 0x2d, 0x00, 0x55, 0x00, 0x53, 0x00, 0x42, 0x00, 0x2d, 0x00, 0x56, 0x00, 0x31, 0x00
|
#include "mem.h"
|
||||||
|
|
||||||
|
unsigned char FLASH ProdDesc[]={ // "MTA1-USB-V1"
|
||||||
|
0x18, 0x03, 0x4d, 0x00, 0x54, 0x00, 0x41, 0x00,
|
||||||
|
0x31, 0x00, 0x2d, 0x00, 0x55, 0x00, 0x53, 0x00,
|
||||||
|
0x42, 0x00, 0x2d, 0x00, 0x56, 0x00, 0x31, 0x00
|
||||||
};
|
};
|
||||||
|
|
||||||
unsigned char __code Manuf_Des[]={ // "Tillitis"
|
unsigned char FLASH ManufDesc[]={ // "Tillitis"
|
||||||
0x12, 0x03, 0x54, 0x00, 0x69, 0x00, 0x6c, 0x00, 0x6c, 0x00, 0x69, 0x00, 0x74, 0x00, 0x69, 0x00, 0x73, 0x00
|
0x12, 0x03, 0x54, 0x00, 0x69, 0x00, 0x6c, 0x00,
|
||||||
|
0x6c, 0x00, 0x69, 0x00, 0x74, 0x00, 0x69, 0x00,
|
||||||
|
0x73, 0x00
|
||||||
};
|
};
|
||||||
|
|
||||||
unsigned char __code SerDes[]={ // "68de5d27-e223-4874-bc76-a54d6e84068f"
|
unsigned char FLASH SerialDesc[]={ // "68de5d27-e223-4874-bc76-a54d6e84068f"
|
||||||
0x4a, 0x03, 0x36, 0x00, 0x38, 0x00, 0x64, 0x00, 0x65, 0x00, 0x35, 0x00, 0x64, 0x00, 0x32, 0x00, 0x37, 0x00, 0x2d, 0x00, 0x65, 0x00, 0x32, 0x00, 0x32, 0x00, 0x33, 0x00, 0x2d, 0x00, 0x34, 0x00, 0x38, 0x00, 0x37, 0x00, 0x34, 0x00, 0x2d, 0x00, 0x62, 0x00, 0x63, 0x00, 0x37, 0x00, 0x36, 0x00, 0x2d, 0x00, 0x61, 0x00, 0x35, 0x00, 0x34, 0x00, 0x64, 0x00, 0x36, 0x00, 0x65, 0x00, 0x38, 0x00, 0x34, 0x00, 0x30, 0x00, 0x36, 0x00, 0x38, 0x00, 0x66, 0x00
|
0x4a, 0x03, 0x36, 0x00, 0x38, 0x00, 0x64, 0x00,
|
||||||
|
0x65, 0x00, 0x35, 0x00, 0x64, 0x00, 0x32, 0x00,
|
||||||
|
0x37, 0x00, 0x2d, 0x00, 0x65, 0x00, 0x32, 0x00,
|
||||||
|
0x32, 0x00, 0x33, 0x00, 0x2d, 0x00, 0x34, 0x00,
|
||||||
|
0x38, 0x00, 0x37, 0x00, 0x34, 0x00, 0x2d, 0x00,
|
||||||
|
0x62, 0x00, 0x63, 0x00, 0x37, 0x00, 0x36, 0x00,
|
||||||
|
0x2d, 0x00, 0x61, 0x00, 0x35, 0x00, 0x34, 0x00,
|
||||||
|
0x64, 0x00, 0x36, 0x00, 0x65, 0x00, 0x38, 0x00,
|
||||||
|
0x34, 0x00, 0x30, 0x00, 0x36, 0x00, 0x38, 0x00,
|
||||||
|
0x66, 0x00
|
||||||
};
|
};
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
File diff suppressed because it is too large
Load Diff
Loading…
x
Reference in New Issue
Block a user