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Change to max 100 KB app with 28 KB stack
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@ -18,8 +18,9 @@ user-provided seed, is used to derive key material unique to each
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application. This allows users to build and load their own apps, while
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application. This allows users to build and load their own apps, while
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ensuring that each app loaded will have its own cryptographic
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ensuring that each app loaded will have its own cryptographic
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identity. The design is similar to TCG DICE. The Tillitis Key 1
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identity. The design is similar to TCG DICE. The Tillitis Key 1
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platform has 128 KB of RAM. The current firmware design allows for
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platform has 128 KB of RAM. The current firmware is designed to load
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applications up to 64 KB with a 64 KB stack.
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an app that is up to 100 KB in size, and gives it a stack of 28 KB. A
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smaller ap may move itself in memory, in order to have a larger stack.
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![Tillitis Key 1 PCB, first implementation](doc/images/mta1-usb-v1.jpg)
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![Tillitis Key 1 PCB, first implementation](doc/images/mta1-usb-v1.jpg)
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*Tillitis Key 1 PCB, first implementation*
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*Tillitis Key 1 PCB, first implementation*
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@ -63,7 +63,9 @@ between the host and the device.
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## Firmware
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## Firmware
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The device has 128 KB RAM. The current firmware loads the app at the
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The device has 128 KB RAM. The current firmware loads the app at the
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upper 64 KB. The lower 64 KB is currently set up as stack for the app.
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upper 100 KB. The lower 28 KB is set up as stack for the app. A
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smaller app that wants a larger stack could relocate itself on
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startup.
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The firmware is part of FPGA bitstream (ROM), and is loaded at
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The firmware is part of FPGA bitstream (ROM), and is loaded at
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`0x0000_0000`.
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`0x0000_0000`.
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@ -73,7 +75,7 @@ The firmware is part of FPGA bitstream (ROM), and is loaded at
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The PicoRV32 starts executing at `0x0000_0000`. Our firmware starts at
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The PicoRV32 starts executing at `0x0000_0000`. Our firmware starts at
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`_start` from `start.S` which initializes the `.data`, and `.bss` at
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`_start` from `start.S` which initializes the `.data`, and `.bss` at
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`0x4000_0000` and upwards. A stack is also initialized, starting at
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`0x4000_0000` and upwards. A stack is also initialized, starting at
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0x4000_fff0 and downwards. When the initialization is finished, the
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0x4000_6ff0 and downwards. When the initialization is finished, the
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firmware waits for incoming commands from the host, by busy-polling
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firmware waits for incoming commands from the host, by busy-polling
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the `UART_RX_{STATUS,DATA}` registers. When a complete command is
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the `UART_RX_{STATUS,DATA}` registers. When a complete command is
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read, the firmware executes the command.
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read, the firmware executes the command.
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@ -355,8 +357,8 @@ Assigned core prefixes:
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| | | | | | | returns 0 if device is in firmware mode, 0xffffffff if in app mode. |
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| | | | | | | returns 0 if device is in firmware mode, 0xffffffff if in app mode. |
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| `LED` | w | w | 1B | u8 | | |
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| `LED` | w | w | 1B | u8 | | |
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| `GPIO` | | | | | | |
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| `GPIO` | | | | | | |
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| `APP_ADDR` | r/w | r | 4B | u32 | | Application address (0x4000_0000) |
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| `APP_ADDR` | r/w | r | 4B | u32 | | Firmware stores app load address here, so app can read its own location|
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| `APP_SIZE` | r/w | r | 4B | u32 | | Application size |
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| `APP_SIZE` | r/w | r | 4B | u32 | | Firmware stores app app size here, so app can read its own size |
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| `CDI_FIRST` | r/w | r | 32B | u8[32] | | Compound Device Identifier (CDI). UDS+measurement... |
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| `CDI_FIRST` | r/w | r | 32B | u8[32] | | Compound Device Identifier (CDI). UDS+measurement... |
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| `CDI_LAST` | | r | | | | Last word of CDI |
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| `CDI_LAST` | | r | | | | Last word of CDI |
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@ -9,10 +9,6 @@
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#include "proto.h"
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#include "proto.h"
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#include "types.h"
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#include "types.h"
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// In RAM + above the stack (0x40010000)
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#define APP_RAM_ADDR (TK1_RAM_BASE + 0x10000)
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#define APP_MAX_SIZE 65536
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// clang-format off
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// clang-format off
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static volatile uint32_t *uds = (volatile uint32_t *)TK1_MMIO_UDS_FIRST;
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static volatile uint32_t *uds = (volatile uint32_t *)TK1_MMIO_UDS_FIRST;
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static volatile uint32_t *switch_app = (volatile uint32_t *)TK1_MMIO_TK1_SWITCH_APP;
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static volatile uint32_t *switch_app = (volatile uint32_t *)TK1_MMIO_TK1_SWITCH_APP;
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@ -95,7 +91,7 @@ int main()
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struct frame_header hdr; // Used in both directions
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struct frame_header hdr; // Used in both directions
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uint8_t cmd[CMDLEN_MAXBYTES];
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uint8_t cmd[CMDLEN_MAXBYTES];
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uint8_t rsp[CMDLEN_MAXBYTES];
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uint8_t rsp[CMDLEN_MAXBYTES];
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uint8_t *loadaddr = (uint8_t *)APP_RAM_ADDR;
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uint8_t *loadaddr = (uint8_t *)TK1_APP_ADDR;
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int left = 0; // Bytes left to receive
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int left = 0; // Bytes left to receive
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uint8_t uss[32] = {0};
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uint8_t uss[32] = {0};
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uint8_t digest[32] = {0};
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uint8_t digest[32] = {0};
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@ -177,7 +173,7 @@ int main()
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putinthex(local_app_size);
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putinthex(local_app_size);
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lf();
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lf();
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if (local_app_size > APP_MAX_SIZE) {
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if (local_app_size > TK1_APP_MAX_SIZE) {
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rsp[0] = STATUS_BAD;
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rsp[0] = STATUS_BAD;
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fwreply(hdr, FW_RSP_LOAD_APP_SIZE, rsp);
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fwreply(hdr, FW_RSP_LOAD_APP_SIZE, rsp);
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break;
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break;
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@ -190,7 +186,7 @@ int main()
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memset(digest, 0, 32);
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memset(digest, 0, 32);
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// Reset where to start loading the program
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// Reset where to start loading the program
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loadaddr = (uint8_t *)APP_RAM_ADDR;
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loadaddr = (uint8_t *)TK1_APP_ADDR;
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left = *app_size;
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left = *app_size;
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rsp[0] = STATUS_OK;
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rsp[0] = STATUS_OK;
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@ -224,7 +220,7 @@ int main()
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putinthex(*app_size);
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putinthex(*app_size);
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lf();
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lf();
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*app_addr = APP_RAM_ADDR;
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*app_addr = TK1_APP_ADDR;
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// Get the Blake2S digest of the app - store it
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// Get the Blake2S digest of the app - store it
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// for later queries
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// for later queries
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blake2s_ctx ctx;
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blake2s_ctx ctx;
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@ -266,8 +262,9 @@ int main()
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lf();
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lf();
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// clang-format off
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// clang-format off
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asm volatile(
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asm volatile(
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// Clear the stack
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"li a0, 0x40000000;" // TK1_RAM_BASE
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"li a0, 0x40000000;" // TK1_RAM_BASE
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"li a1, 0x40010000;"
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"li a1, 0x40007000;" // APP_RAM_ADDR
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"loop:;"
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"loop:;"
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"sw zero, 0(a0);"
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"sw zero, 0(a0);"
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"addi a0, a0, 4;"
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"addi a0, a0, 4;"
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@ -39,15 +39,15 @@ _start:
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li x31,0
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li x31,0
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/* Clear all RAM */
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/* Clear all RAM */
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li a0, 0x40000000 // RAM base
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li a0, 0x40000000 // TK1_RAM_BASE
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li a1, 0x40020000 // To end of SRAM
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li a1, 0x40020000 // TK1_RAM_BASE + TK1_RAM_SIZE
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clear:
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clear:
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sw zero, 0(a0)
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sw zero, 0(a0)
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addi a0, a0, 4
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addi a0, a0, 4
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blt a0, a1, clear
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blt a0, a1, clear
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/* init stack to right under where we load app at 0x40010000 */
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/* init stack below 0x40007000 (TK1_APP_ADDR) where we load app */
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li sp, 0x4000fff0
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li sp, 0x40006ff0
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/* copy data section */
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/* copy data section */
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la a0, _sidata
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la a0, _sidata
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@ -20,10 +20,14 @@
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enum {
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enum {
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TK1_ROM_BASE = 0x00000000, // 0b00000000...
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TK1_ROM_BASE = 0x00000000, // 0b00000000...
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TK1_RAM_BASE = 0x40000000, // 0b01000000...
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TK1_RAM_BASE = 0x40000000, // 0b01000000...
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TK1_RAM_SIZE = 0x20000, // 128 KB
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TK1_RESERVED_BASE = 0x80000000, // 0b10000000...
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TK1_RESERVED_BASE = 0x80000000, // 0b10000000...
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TK1_MMIO_BASE = 0xc0000000, // 0b11000000...
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TK1_MMIO_BASE = 0xc0000000, // 0b11000000...
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TK1_MMIO_SIZE = 0xffffffff - TK1_MMIO_BASE,
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TK1_MMIO_SIZE = 0xffffffff - TK1_MMIO_BASE,
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TK1_APP_ADDR = TK1_RAM_BASE + 0x7000, // 28 KB of stack
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TK1_APP_MAX_SIZE = TK1_RAM_SIZE - (TK1_APP_ADDR - TK1_RAM_BASE),
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TK1_MMIO_TRNG_BASE = TK1_MMIO_BASE | 0x00000000,
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TK1_MMIO_TRNG_BASE = TK1_MMIO_BASE | 0x00000000,
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TK1_MMIO_TIMER_BASE = TK1_MMIO_BASE | 0x01000000,
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TK1_MMIO_TIMER_BASE = TK1_MMIO_BASE | 0x01000000,
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TK1_MMIO_UDS_BASE = TK1_MMIO_BASE | 0x02000000,
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TK1_MMIO_UDS_BASE = TK1_MMIO_BASE | 0x02000000,
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@ -81,7 +85,7 @@ enum {
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TK1_MMIO_TK1_GPIO2_BIT = 1,
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TK1_MMIO_TK1_GPIO2_BIT = 1,
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TK1_MMIO_TK1_GPIO3_BIT = 2,
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TK1_MMIO_TK1_GPIO3_BIT = 2,
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TK1_MMIO_TK1_GPIO4_BIT = 3,
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TK1_MMIO_TK1_GPIO4_BIT = 3,
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TK1_MMIO_TK1_APP_ADDR = TK1_MMIO_TK1_BASE | 0x30, // 0x4000_0000
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TK1_MMIO_TK1_APP_ADDR = TK1_MMIO_TK1_BASE | 0x30,
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TK1_MMIO_TK1_APP_SIZE = TK1_MMIO_TK1_BASE | 0x34,
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TK1_MMIO_TK1_APP_SIZE = TK1_MMIO_TK1_BASE | 0x34,
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TK1_MMIO_TK1_CDI_FIRST = TK1_MMIO_TK1_BASE | 0x80,
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TK1_MMIO_TK1_CDI_FIRST = TK1_MMIO_TK1_BASE | 0x80,
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TK1_MMIO_TK1_CDI_LAST = TK1_MMIO_TK1_BASE | 0x9c, // Address of last 32-bit word of CDI.
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TK1_MMIO_TK1_CDI_LAST = TK1_MMIO_TK1_BASE | 0x9c, // Address of last 32-bit word of CDI.
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