From 9d188a2f7f2a61cf4058ff7d0c2c550835583e3a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Str=C3=B6mbergson?= Date: Tue, 2 May 2023 13:57:29 +0200 Subject: [PATCH] Add more info about how the timer works MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Joachim Strömbergson --- hw/application_fpga/core/timer/README.md | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/application_fpga/core/timer/README.md b/hw/application_fpga/core/timer/README.md index 9314d05..fe6cb95 100644 --- a/hw/application_fpga/core/timer/README.md +++ b/hw/application_fpga/core/timer/README.md @@ -11,3 +11,6 @@ timer will count seconds. ## Details The timer counter and the prescaler counter are both 32 bits. When enabled the counter counts down one integer value per cycle. + +The timer will stop when reaching final zero (given by prescaler times the initial value of the timer) +and the running flag will be lowered.