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Raise UART IRQ priority and tune USB polling period

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Set UART1 IRQ to high priority to not miss any incoming bytes
and tune USB polling period (bInterval).
This commit is contained in:
Jonas Thörnblad 2025-01-23 13:44:53 +01:00
parent 68cecdfa92
commit 9828e1d51b
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GPG Key ID: 2D318AD00A326F95
2 changed files with 5 additions and 4 deletions
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1
hw/usb_interface/ch552_fw/include/debug.h
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@ -151,6 +151,7 @@ inline void UART1Setup()
// Should correct for rounding in SBAUD1 calculation
SBAUD1 = 256 - FREQ_SYS/16/UART1_BAUD; // Calculation for Fast mode
IE_UART1 = 1; // Enable UART1 interrupt
IP_EX = bIP_UART1; // Serial port IRQ has high priority
}
/*******************************************************************************

8
hw/usb_interface/ch552_fw/main.c
View File

@ -55,10 +55,10 @@ USB_SETUP_REQ SetupReqBuf = { 0 }; // Temporary Setup package
#define TKEYCTRL_EPIN_ADDR 0x84 // TKEYCTRL Endpoint IN Address
#define TKEYCTRL_EPIN_SIZE MAX_PACKET_SIZE // TKEYCTRL Endpoint IN Size
#define CDC_CTRL_FS_BINTERVAL 0xFF // Gives 32 ms polling interval at Full Speed
#define CDC_DATA_FS_BINTERVAL 10 // Gives 8 ms polling interval at Full Speed
#define HID_FS_BINTERVAL 10 // Gives 8 ms polling interval at Full Speed
#define TKEYCTRL_FS_BINTERVAL 10 // Gives 8 ms polling interval at Full Speed
#define CDC_CTRL_FS_BINTERVAL 32 // Gives 32 ms polling interval at Full Speed for interrupt transfers
#define CDC_DATA_FS_BINTERVAL 0 // bInterval is ignored for BULK transfers
#define HID_FS_BINTERVAL 2 // Gives 2 ms polling interval at Full Speed for interrupt transfers
#define TKEYCTRL_FS_BINTERVAL 2 // Gives 2 ms polling interval at Full Speed for interrupt transfers
#define CFGDESC_SIZE 139U // Size of CfgDesc
#define NUM_INTERFACES 4 // Number of interfaces