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fpga/fw: Rename system_mode to app_mode
Rename `system_mode` to `app_mode` as to not confuse it with syscall or firmware mode. When `app_mode` is `1`/`true` we are in app mode.
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parent
19ae709c81
commit
97de5e68fd
14 changed files with 84 additions and 84 deletions
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@ -6,7 +6,7 @@ Unique Device Secret core
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This core store and protect the Unique Device Secret (UDS) asset. The
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UDS can be accessed as eight separate 32-bit words. The words can only
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be accessed as long as the system_mode input is low, implying that the
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be accessed as long as the app_mode input is low, implying that the
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CPU is executing the FW.
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The UDS words can be accessed in any order, but a given word can only
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@ -17,7 +17,7 @@ module uds (
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input wire clk,
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input wire reset_n,
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input wire system_mode,
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input wire app_mode,
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input wire cs,
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input wire [ 2 : 0] address,
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@ -89,7 +89,7 @@ module uds (
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if (cs) begin
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tmp_ready = 1'h1;
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if (!system_mode) begin
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if (!app_mode) begin
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if (uds_rd_reg[address[2 : 0]] == 1'h0) begin
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uds_rd_we = 1'h1;
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end
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@ -37,7 +37,7 @@ module tb_uds ();
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reg tb_clk;
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reg tb_reset_n;
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reg tb_system_mode;
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reg tb_app_mode;
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reg tb_cs;
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reg [ 7 : 0] tb_address;
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wire [31 : 0] tb_read_data;
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@ -50,7 +50,7 @@ module tb_uds ();
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.clk(tb_clk),
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.reset_n(tb_reset_n),
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.system_mode(tb_system_mode),
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.app_mode(tb_app_mode),
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.cs(tb_cs),
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.address(tb_address),
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@ -95,7 +95,7 @@ module tb_uds ();
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$display("State of DUT at cycle: %08d", cycle_ctr);
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$display("------------");
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$display("Inputs and outputs:");
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$display("system_mode: 0x%1x", tb_system_mode);
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$display("app_mode: 0x%1x", tb_app_mode);
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$display("cs: 0x%1x, address: 0x%02x, read_data: 0x%08x", tb_cs, tb_address, tb_read_data);
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$display("");
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@ -160,7 +160,7 @@ module tb_uds ();
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tb_clk = 1'h0;
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tb_reset_n = 1'h1;
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tb_system_mode = 1'h0;
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tb_app_mode = 1'h0;
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tb_cs = 1'h0;
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tb_address = 8'h0;
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end
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