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Add CPU execution monitor

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Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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Joachim Strömbergson 2023-02-20 14:52:25 +01:00 • committed by Daniel Lublin
parent e514f778b2
commit 86ea45e10a
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GPG key ID: 75BD0FEB8D3E7830
3 changed files with 153 additions and 50 deletions
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10
hw/application_fpga/rtl/rom.v
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@ -15,6 +15,9 @@
`default_nettype none
module rom(
input wire force_jump,
input wire [31 : 0] jump_instr,
input wire cs,
/* verilator lint_off UNUSED */
input wire [11 : 0] address,
@ -60,7 +63,12 @@ module rom(
begin : rom_logic
/* verilator lint_off WIDTH */
rom_rdata = memory[address];
if (force_jump) begin
rom_rdata = jump_instr;
end
else begin
rom_rdata = memory[address];
end
/* verilator lint_on WIDTH */
rom_ready = cs;
end