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fpga: Fix nits in constant value specification

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Remove the preceeding zero in the constant expression
      that cause the simulator to warn about incorrect
      bit size.

Signed-off-by: Joachim Strömbergson <joachim@assured.se>
This commit is contained in:
Joachim Strömbergson 2024-07-09 10:51:10 +02:00
parent d297514e7e
commit 816718307f
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GPG Key ID: 865B8A548EA61679
1 changed files with 1 additions and 1 deletions
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hw/application_fpga/core/tk1/rtl/tk1.v
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@ -392,7 +392,7 @@ module tk1(
force_trap_set = 1'h0; force_trap_set = 1'h0;
if (cpu_valid) begin if (cpu_valid) begin
if (cpu_addr[31 : 30] == 2'h01 & |cpu_addr[29 : 17]) begin if (cpu_addr[31 : 30] == 2'h1 & |cpu_addr[29 : 17]) begin
force_trap_set = 1'h1; force_trap_set = 1'h1;
end end