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fw: load app at the start of RAM

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Since app is always loaded at the start of RAM, the TK1_APP_ADDR define
is no longer needed.

Signed-off-by: Daniel Lublin <daniel@lublin.se>
This commit is contained in:
Daniel Lublin 2023-03-06 14:07:03 +01:00
parent 425fdb4b90
commit 7eb4d0304b
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GPG key ID: 75BD0FEB8D3E7830
5 changed files with 12 additions and 14 deletions
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5
README.md
View file

@ -30,9 +30,8 @@ its own cryptographic identity, and can also be used for authentication
towards different services. towards different services.
The TKey platform is based around a 32-bit RISC-V processor and has The TKey platform is based around a 32-bit RISC-V processor and has
128 KB of RAM. The current firmware is designed to load an app that is 128 KB of RAM. Firmware can load and start an app that is as large as
up to 100 KB in size, and gives it a stack of 28 KB. A smaller app may RAM.
move itself in memory to get larger continuous memory.
All of the TKey software, firmware, FPGA Verilog source code, schematics All of the TKey software, firmware, FPGA Verilog source code, schematics
and PCB design files are open source. Like all trustworthy security software and PCB design files are open source. Like all trustworthy security software

9
doc/system_description/software.md
View file

@ -63,10 +63,11 @@ the Framing Protocol.
The purpose of the firmware is to bootstrap and measure an The purpose of the firmware is to bootstrap and measure an
application. application.
The TKey has 128 KB RAM. The current firmware loads the app at the The TKey has 128 KB RAM. Firmware loads the app at the start of RAM.
upper 100 KB. The lower 28 KB is set up as stack for the app. A The current C runtime (crt0.S) of apps in our [apps
smaller app that wants continuous memory may want to relocate itself repo](https://github.com/tillitis/tillitis-key1-apps) sets up the
when starting. stack to start just below the end of RAM. This means that a larger app
comes at the compromise of it having a smaller stack.
The firmware is part of FPGA bitstream (ROM), and is loaded at The firmware is part of FPGA bitstream (ROM), and is loaded at
`0x0000_0000`. `0x0000_0000`.

3
hw/application_fpga/fw/tk1/firmware.lds
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2022 - Tillitis AB * Copyright (C) 2022, 2023 - Tillitis AB
* SPDX-License-Identifier: GPL-2.0-only * SPDX-License-Identifier: GPL-2.0-only
*/ */
@ -8,7 +8,6 @@ ENTRY(_start)
MEMORY MEMORY
{ {
/* TODO ROM size should be adjusted, RAM should be ok. */
ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x20000 /* 128 KB */ ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x20000 /* 128 KB */
RAM (rwx) : ORIGIN = 0x40000000, LENGTH = 0x20000 /* 128 KB */ RAM (rwx) : ORIGIN = 0x40000000, LENGTH = 0x20000 /* 128 KB */
} }

6
hw/application_fpga/fw/tk1/main.c
View file

@ -147,7 +147,7 @@ int main()
struct frame_header hdr; // Used in both directions struct frame_header hdr; // Used in both directions
uint8_t cmd[CMDLEN_MAXBYTES]; uint8_t cmd[CMDLEN_MAXBYTES];
uint8_t rsp[CMDLEN_MAXBYTES]; uint8_t rsp[CMDLEN_MAXBYTES];
uint8_t *loadaddr = (uint8_t *)TK1_APP_ADDR; uint8_t *loadaddr = (uint8_t *)TK1_RAM_BASE;
int left = 0; // Bytes left to receive int left = 0; // Bytes left to receive
uint8_t use_uss = FALSE; uint8_t use_uss = FALSE;
uint8_t uss[32] = {0}; uint8_t uss[32] = {0};
@ -183,7 +183,7 @@ int main()
case FW_STATE_RUN: case FW_STATE_RUN:
htif_puts("state_run\n"); htif_puts("state_run\n");
*app_addr = TK1_APP_ADDR; *app_addr = TK1_RAM_BASE;
// CDI = hash(uds, hash(app), uss) // CDI = hash(uds, hash(app), uss)
compute_cdi(digest, use_uss, uss); compute_cdi(digest, use_uss, uss);
@ -382,7 +382,7 @@ int main()
blake2s_ctx ctx; blake2s_ctx ctx;
blake2s(digest, 32, NULL, 0, blake2s(digest, 32, NULL, 0,
(const void *)TK1_APP_ADDR, *app_size, (const void *)TK1_RAM_BASE, *app_size,
&ctx); &ctx);
print_digest(digest); print_digest(digest);

3
hw/application_fpga/fw/tk1_mem.h
View file

@ -25,8 +25,7 @@ enum {
TK1_MMIO_BASE = 0xc0000000, // 0b11000000... TK1_MMIO_BASE = 0xc0000000, // 0b11000000...
TK1_MMIO_SIZE = 0xffffffff - TK1_MMIO_BASE, TK1_MMIO_SIZE = 0xffffffff - TK1_MMIO_BASE,
TK1_APP_ADDR = TK1_RAM_BASE + 0x7000, // 28 KB of stack TK1_APP_MAX_SIZE = TK1_RAM_SIZE,
TK1_APP_MAX_SIZE = TK1_RAM_SIZE - (TK1_APP_ADDR - TK1_RAM_BASE),
TK1_MMIO_TRNG_BASE = TK1_MMIO_BASE | 0x00000000, TK1_MMIO_TRNG_BASE = TK1_MMIO_BASE | 0x00000000,
TK1_MMIO_TIMER_BASE = TK1_MMIO_BASE | 0x01000000, TK1_MMIO_TIMER_BASE = TK1_MMIO_BASE | 0x01000000,