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(doc) Update timer README with info about reached flag.

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Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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Joachim Strömbergson 2024-08-21 13:47:36 +02:00
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hw/application_fpga/core/timer/README.md
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@ -1,21 +1,20 @@
# timer
Timer with prescaler and support for free running mode.
Timer with prescaler and support for detecting when a target time has
been reached.w
## Introduction
This core implements a simple timer with a prescaler and support for a
free running mode.
This core implements a simple timer with a prescaler and ability to
signal when a given time has been reached.
The prescaler allows measurement of time durations rather than
The prescaler allows measurement of time duration rather than
cycles. If for example setting the prescaler to the clock frequency in
Hertz, the timer will count seconds. After (prescaler * timer) number
of cycles the timer will stop. Checking status of the timer can be
done by reading the STATUS_RUNNING_BIT. If set to zero, the timer has
completed.
Hertz, the timer will count seconds.
If the free running mode is set (default off), the counter will not
stpp when the number of cycles defined by (prescaler * timer) has been
reached. Instead the timer continues until the CTRL_STOP_BIT is
asserted.
When started the timer will set the STATUS_RUNNING_BIT. The timer will
not stop until the CTRL_STOP has been asserted.
When timer has been started, after the set (prescaler * timer) number
of cycles, the timer will set the STATUS_REACHED bit.
## API
The following addresses define the API for the timer:
@ -27,15 +26,12 @@ The following addresses define the API for the timer:
ADDR_STATUS: 0x09
STATUS_RUNNING_BIT: 0
STATUS_REACHED: 1
ADDR_PRESCALER: 0x0a
ADDR_TIMER: 0x0b
ADDR_FREE_RUNNING: 0x0c
FREE_RUNNING_BIT 0
```
ADDR_PRESCALER and ADDR_TIMER registers should be set to a
non-negative value. Default values for the these registers are one (1).
non-zero value. Default values for the these registers are one (1).
Note that these registers can't be changed when the timer is running.