Git-Mirrors/tillitis-key
1
0
Fork 0
mirror of https://github.com/tillitis/tillitis-key1.git synced 2025-11-25 01:53:21 -05:00
Code Issues Projects Releases Packages Wiki Activity

PoC: Control access to FW RAM

Browse source 
Allow FW RAM access only in the following execution contexts:
- Firmware mode
- IRQ_SYSCALL_HI

Input port `system_mode` of the `fw_ram` module is replaced with an
enable port. Since access to FW RAM not longer depend only on
system_mode
This commit is contained in:
Mikael Ågren 2024-12-11 14:29:04 +01:00
parent a871d23d5d
commit 62dba7c4fe
No known key found for this signature in database
GPG key ID: E02DA3D397792C46
7 changed files with 92 additions and 37 deletions
Download patch file Download diff file Expand all files Collapse all files

5
hw/application_fpga/rtl/application_fpga.v
View file

@ -135,6 +135,7 @@ module application_fpga (
reg [31 : 0] fw_ram_write_data;
wire [31 : 0] fw_ram_read_data;
wire fw_ram_ready;
wire fw_ram_en;
reg touch_sense_cs;
reg touch_sense_we;
@ -257,7 +258,7 @@ module application_fpga (
.clk(clk),
.reset_n(reset_n),
.system_mode(system_mode),
.en(fw_ram_en),
.cs(fw_ram_cs),
.we(fw_ram_we),
@ -370,6 +371,8 @@ module application_fpga (
.access_level_hi (irq31_eoi),
.access_level_med(irq30_eoi),
.fw_ram_en(fw_ram_en),
.cs(tk1_cs),
.we(tk1_we),
.address(tk1_address),