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https://github.com/tillitis/tillitis-key1.git
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PoC: Remove IRQ30 from fw/irqpoc_c_example
Removing IRQ30 since it us no longer exist
This commit is contained in:
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@ -10,38 +10,12 @@
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// Proof-of-concept firmware for handling syscalls.
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// This is NOT a best-practice example of secure syscall implementation.
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#define SYSCALL_HI (1 << 31)
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#define SYSCALL_LO 0
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#define SYSCALL_SET_LED 10
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#define SYSCALL_HI_SET_LED (SYSCALL_HI | 10)
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#define SYSCALL_LO_SET_LED (SYSCALL_LO | 10)
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static void delay(int32_t count) {
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volatile int32_t c = count;
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while (c > 0) {
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c--;
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}
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}
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int32_t syscall_lo_handler(uint32_t syscall_nr, uint32_t arg1) {
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int32_t syscall_handler(uint32_t syscall_nr, uint32_t arg1) {
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switch (syscall_nr) {
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case SYSCALL_LO_SET_LED:
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case SYSCALL_SET_LED:
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set_led(arg1);
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//delay(1000000);
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return 0;
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default:
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assert(1 == 2);
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}
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assert(1 == 2);
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return -1; // This should never run
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}
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int32_t syscall_hi_handler(uint32_t syscall_nr, uint32_t arg1) {
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switch (syscall_nr) {
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case SYSCALL_HI_SET_LED:
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set_led(arg1);
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//delay(500000);
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return 0;
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default:
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assert(1 == 2);
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@ -4,7 +4,7 @@
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*/
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// This firmware copies an app from ROM to app RAM.
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// The app continuosly calls the SET_LED syscalls in firmware (main.c).
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// The app continuosly calls the SET_LED syscall in firmware (main.c).
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//
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#include "../tk1_mem.h"
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#include "custom_ops.S" // PicoRV32 custom instructions
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@ -30,18 +30,12 @@ _start:
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irq_handler:
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// PicoRV32 stores the IRQ bitmask in x4.
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// If bit 31 is 1: IRQ31 was triggered.
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// If bit 30 is 1: IRQ30 was triggered.
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irq_syscall_lo_check:
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li t4, (1 << 30)
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bne x4, t4, irq_syscall_hi_check
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// Run low privilege syscall handler
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call syscall_lo_handler
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j irq_source_check_done
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irq_syscall_hi_check:
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li t4, (1 << 31)
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bne x4, t4, unexpected_irq
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beq x4, t4, irq_source_ok
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unexpected_irq_source:
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illegal_insn()
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j unexpected_irq_source
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irq_source_ok:
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// Save app stack pointer. App is responsible for saving the rest of
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// the registers.
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@ -51,18 +45,14 @@ irq_syscall_hi_check:
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// Setup firmware stack pointer
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la sp, FW_STACK_TOP
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// Run high privilege syscall handler
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call syscall_hi_handler
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// Run syscall handler
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call syscall_handler
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// Restore app stack pointer
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la t0, FW_SP_STORAGE
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lw sp, 0(t0)
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j irq_source_check_done
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unexpected_irq:
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illegal_insn()
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irq_source_check_done:
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// Verify that interrupt return address is in app RAM
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// Verify that interrupt return address (x3) is in app RAM
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li t0, TK1_RAM_BASE // 0x40000000
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blt x3, t0, x3_invalid
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li t0, TK1_RAM_BASE + TK1_RAM_SIZE // 0x40020000
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@ -119,7 +109,7 @@ init:
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sw t1, 0(t0)
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// Enable IRQs
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li t0, 0x3fffffff // IRQ31 & IRQ30 mask
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li t0, 0x7fffffff // IRQ31 mask
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picorv32_maskirq_insn(zero, t0) // Enable IRQs
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// Copy app to App RAM
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@ -140,10 +130,7 @@ copy_app:
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//
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// App
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//
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#define APP_SYSCALL_HI (1 << 31)
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#define APP_SYSCALL_LO 0
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#define APP_SYSCALL_HI_SET_LED (APP_SYSCALL_HI | 10)
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#define APP_SYSCALL_LO_SET_LED (APP_SYSCALL_LO | 10)
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#define SYSCALL_SET_LED 10
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.=0x1000
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app_start:
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@ -151,21 +138,15 @@ app_start:
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li sp, 0x4001fffc
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app_loop:
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li a0, APP_SYSCALL_LO_SET_LED
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li a0, SYSCALL_SET_LED
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li a1, LED_GREEN
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call app_syscall
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call app_delay
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li a0, APP_SYSCALL_LO_SET_LED
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li a0, SYSCALL_SET_LED
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li a1, LED_BLUE
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call app_syscall
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li a0, APP_SYSCALL_HI_SET_LED
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li a1, LED_RED | LED_GREEN
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call app_syscall
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li a0, APP_SYSCALL_HI_SET_LED
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li a1, LED_RED | LED_BLUE
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call app_syscall
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call app_delay
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j app_loop
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@ -205,20 +186,12 @@ app_syscall:
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sw x30, 30*4(sp)
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sw x31, 31*4(sp)
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// Raise interrupt depending on bit 31 in a0
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// 0: Low privilege syscall
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// 1: High privilege syscall
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// Trigger syscall interrupt
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li t0, (1 << 31)
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and t0, a0, t0
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beqz t0, app_syscall_low_priv
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li t1, 0xe1000000 // High privilege interrupt
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sw zero, 0(t1) // Trigger interrupt
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j app_syscall_restore_registers
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app_syscall_low_priv:
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li t1, 0xe0000000 // Low privelege interrupt
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li t1, 0xe1000000 // Syscall interrupt trigger address
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sw zero, 0(t1) // Trigger interrupt
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app_syscall_restore_registers:
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// Restore registers from stack
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lw x0, 0*4(sp)
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lw x1, 1*4(sp)
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@ -256,6 +229,13 @@ app_syscall_restore_registers:
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ret
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app_delay:
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li t5, 0x100000
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app_delay_dec:
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addi t5, t5, -1
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bne t5, zero, app_delay_dec
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ret
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.align 4
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app_end:
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