diff --git a/hw/application_fpga/Makefile b/hw/application_fpga/Makefile
index 784d410..269f32f 100644
--- a/hw/application_fpga/Makefile
+++ b/hw/application_fpga/Makefile
@@ -34,7 +34,7 @@ TARGET_FREQ ?= 21
 # bits wide; an EBR is 128 32-bits words)
 BRAM_FW_SIZE ?= 1536
 
-PIN_FILE ?= application_fpga_tk1.pcf
+PIN_FILE ?= application_fpga_tk1_uwg30.pcf
 
 SIZE ?= llvm-size
 OBJCOPY ?= llvm-objcopy
@@ -345,7 +345,7 @@ application_fpga_par.json: synth.json $(P)/data/$(PIN_FILE)
 		--freq $(TARGET_FREQ) \
 		--ignore-loops \
 		--up5k \
-		--package sg48 \
+		--package uwg30 \
 		--json $< \
 		--pcf $(P)/data/$(PIN_FILE) \
 		--write $@ \
@@ -358,7 +358,7 @@ application_fpga.asc: application_fpga_par.json $(P)/data/uds.hex $(P)/data/udi.
 	OUT_ASC=$@ \
 	$(NEXTPNR_PATH)nextpnr-ice40 \
 		--up5k \
-		--package sg48 \
+		--package uwg30 \
 		--ignore-loops \
 		--json $< \
 		--run tools/patch_uds_udi.py
@@ -433,7 +433,7 @@ check-hardware:
 # Post build analysis.
 #-------------------------------------------------------------------
 timing: application_fpga.asc $(P)/data/$(PIN_FILE)
-	$(ICESTORM_PATH)icetime -c 18 -tmd up5k -P sg48 -p $(P)/data/$(PIN_FILE) -t $<
+	$(ICESTORM_PATH)icetime -c 18 -tmd up5k -P uwg30 -p $(P)/data/$(PIN_FILE) -t $<
 
 view: tb_application_fpga_vcd
 	gtkwave $< application_fpga.gtkw
diff --git a/hw/application_fpga/data/application_fpga_tk1_uwg30.pcf b/hw/application_fpga/data/application_fpga_tk1_uwg30.pcf
new file mode 100644
index 0000000..79db3b0
--- /dev/null
+++ b/hw/application_fpga/data/application_fpga_tk1_uwg30.pcf
@@ -0,0 +1,40 @@
+#=======================================================================
+#
+# application_fpga_tk1_uwg30.pcf
+# ------------------------------
+# Pin constraints file for the Application FPGA design to be used
+# on the tk1 board with the CH552 MCU used as a USB-serial chip.
+# This version targets the UWG30 package.
+#
+#
+# Copyright (C) 2022 - Tillitis AB
+# SPDX-License-Identifier: GPL-2.0-only
+#
+#=======================================================================
+
+# UART.
+set_io interface_rx A2
+set_io interface_tx A1
+# set_io interface_cts 27
+# set_io interface_rts 28
+
+
+# Touch sense.
+set_io touch_event B1
+
+
+# GPIOs.
+#set_io app_gpio1 36
+#set_io app_gpio2 38
+#set_io app_gpio3 45
+#set_io app_gpio4 46
+
+
+# LEDs
+set_io led_r A5
+set_io led_b B5
+set_io led_g C5
+
+#=======================================================================
+# EOF application_fpga_tk1_uwg30.pcf
+#=======================================================================
diff --git a/hw/application_fpga/rtl/application_fpga.v b/hw/application_fpga/rtl/application_fpga.v
index 4deb307..37756a8 100644
--- a/hw/application_fpga/rtl/application_fpga.v
+++ b/hw/application_fpga/rtl/application_fpga.v
@@ -27,11 +27,6 @@ module application_fpga (
 
     input wire touch_event,
 
-    input  wire app_gpio1,
-    input  wire app_gpio2,
-    output wire app_gpio3,
-    output wire app_gpio4,
-
     output wire led_r,
     output wire led_g,
     output wire led_b
@@ -342,10 +337,10 @@ module application_fpga (
       .led_g(led_g),
       .led_b(led_b),
 
-      .gpio1(app_gpio1),
-      .gpio2(app_gpio2),
-      .gpio3(app_gpio3),
-      .gpio4(app_gpio4),
+      .gpio1(),
+      .gpio2(),
+      .gpio3(),
+      .gpio4(),
 
       .cs(tk1_cs),
       .we(tk1_we),