From 4a27940bf1a3a3915fcfb06ae50c0af01e28eff6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Mikael=20=C3=85gren?= Date: Wed, 29 Jan 2025 14:55:26 +0100 Subject: [PATCH] PoC: tb: Fix tb_tk1 test10 (SPI loop back test) Fix test10. It broke while implementing interrupt based syscalls. Cleaning up after the previous test. We reset the memory bus to a known idle state. We also reset the DUT to make the SPI master visible. --- hw/application_fpga/core/tk1/tb/tb_tk1.v | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/hw/application_fpga/core/tk1/tb/tb_tk1.v b/hw/application_fpga/core/tk1/tb/tb_tk1.v index d4026e5..a8d0fc0 100644 --- a/hw/application_fpga/core/tk1/tb/tb_tk1.v +++ b/hw/application_fpga/core/tk1/tb/tb_tk1.v @@ -296,6 +296,25 @@ module tb_tk1 (); endtask // init_sim + //---------------------------------------------------------------- + // restore_mem_bus() + // + // Restore memory bus to its initial state + //---------------------------------------------------------------- + task restore_mem_bus(); + begin : restore_mem_bus + tb_cpu_addr = 32'h0; + tb_cpu_instr = 1'h0; + tb_cpu_valid = 1'h0; + + tb_cs = 1'h0; + tb_we = 1'h0; + tb_address = 8'h0; + tb_write_data = 32'h0; + end + endtask + + //---------------------------------------------------------------- // write_word() // @@ -674,6 +693,9 @@ module tb_tk1 (); tb_monitor = 0; tb_spi_monitor = 0; + restore_mem_bus(); + reset_dut(); + $display(""); $display("--- test10: Loopback in SPI Master started.");