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FPGA: Add SPI access control logic
Access logic looks at instruction execution from a defined trampoline address to enable stateful SPI access. The access is disabled as soon as an instruction is executed from any address in RAM. Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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2 changed files with 112 additions and 32 deletions
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@ -149,4 +149,5 @@
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#define TK1_MMIO_TK1_SPI_EN 0xff000200
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#define TK1_MMIO_TK1_SPI_XFER 0xff000204
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#define TK1_MMIO_TK1_SPI_DATA 0xff000208
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#define TK1_MMIO_TK1_SPI_CMD 0xff00020c
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#endif
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