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Add release notes for Bellatrix
Co-authored-by: Michael Cardell Widerkrantz <mc@tillitis.se> Signed-off-by: Joachim Strömbergson <joachim@assured.se>, Michael Cardell Widerkrantz <mc@tillitis.se>
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Descriptions of the tagged TKey releases.
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Descriptions of the tagged TKey releases.
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## Tag XYZ
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## TK1-23.03
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This is the official release of the "Bellatrix" version of
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the Tillitis TKey device. This version is ready for general
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use.
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Given the Docker config, and the generic UDS.hex and UDI.hex,
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a clean build should generate the following digest:
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```
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shasum -a256 application_fpga.bin
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f11d6b0f57c5405598206dcfea284008413391a2c51f124a2e2ae8600cb78f0b application_fpga.bin
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```
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### New and improved functionality
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- (ALL) The TKey HW design, FW, protocol and first applications has
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been audited by a third party. No major issues was found, but the
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audit have lead to several updates, changes and fixes to improve
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the security and robustness. The third party report will be
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published when completed.
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- (APPS) Applications can now use the whole 128 kByte RAM.
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- (FW) The firmware now use the `FW_RAM` for the stack. It keeps no
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.bss or .data segments and only uses RAM for loading the
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application.
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- (FW) The firmware has been hardened and the state machine simplified
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to reduce the number of commands that can be used and in which
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order.
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- (FW) Steady white LED while waiting for initial commands. LED off
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while loading app.
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- (HW) The memory system now has an execution monitor. The monitor
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detects attempts at reading instructions from the firmware ram.
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The execution monitor can alwo, when enabled by an application,
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detect attempts at reading instructions from the application
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stack. If any such attempt is detected, the memory system will
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force the CPU to read an illegal instruction, triggering the
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trap state in the CPU.
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Note that the execution monitor can only be enabled, not
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disabled. The address range registers defining the region
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protected by the monitor can only be set when the monitor
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has not yet been enabled.
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- (HW) The CPU trap signal is now connected to an illegal instruction
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trap indicator. When an illegal instruction is detected, the RGB LED
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will start flashing red. Note that the CPU will stay in the trap
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state until the TKey device is disconnected.
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- (HW) The RAM memory now includes an initial adress and scrambling
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mechanism to make it harder to find assets generated by and
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stored in the RAM by applications. The address space layout
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randomizarion (ASLR) and data value scrambling is set up by the
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firmware before the application is loaded, and does not affect
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how applications executes.
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- (HW) The UART Rx FIFO now allows applications to read out the
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number of bytes received and not yet consumed by the application.
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- (HW) The FPGA bitstream can now be stored in the non volatile
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configuration memory (NVCM). This is done using of a new icestorm
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tool developed partly in the projecy and sponsored by Tillitis
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and Mullvad. The tool supports locking down NVCM access after
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writing the FPGA bitstream to the memory.
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- (TOOLS) There is now a Docker config setting up all tools as needed
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- (TOOLS) There is now a version of iceprog able to write to the FPGA
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bitstream to the NVCM and lock the NVCM from external access
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### Bugs fixed
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- No known bugs have been fixed. Numerous issues has been closed.
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### Limitations
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- The RAM address and data scrambling in this release is not
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cryptographically secure. It his however randomized every time
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a TKey device is powered up.
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XYZ is a general release of the development kit first presented
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as a limited engineering-release. The main changes are polishing,
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completion and bug fixing since the engineering-releases.
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## engineering-release-2
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## engineering-release-2
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