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Make synth.json depend on data/{uds,udi}.hex; revise docs
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@ -32,7 +32,7 @@ The first implementation is the Tillitis Key 1:
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* [Boards](hw/boards/README.md)
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* [Firmware](hw/application_fpga/fw/mta1_mkdf/README.md)
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* [Toolchain setup](doc/toolchain_setup.md)
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* [Quickstart](doc/quickstart.md) to program the Tillitis Key1
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* [Quickstart](doc/quickstart.md) to program the Tillitis Key 1
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* [Release Notes](doc/release_notes.md)
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## About this repository
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@ -1,11 +1,11 @@
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This document describes how to build the FPGA bitstream, including the
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firmware, and get this programmed onto the flash of the Tillitis Key1
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firmware, and get this programmed onto the flash of the Tillitis Key 1
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USB device.
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The Tillitis Key1 kit includes:
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The Tillitis Key 1 kit includes:
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- Tillitis Key1 USB device, marked MTA1-USB V1
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- Tillitis Key 1 USB device, marked MTA1-USB V1
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- Programmer board based on Raspberry Pi Pico, with a white device
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holder/jig
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- USB-cable with micro-B plug, for connecting the programmer to
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@ -13,6 +13,8 @@ The Tillitis Key1 kit includes:
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- USB-C cable
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- USB-C to USB-A adapter
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# Programming FPGA bitstream and firmware onto Tillitis Key 1
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Connect the programmer to the computer using the mentioned cable. It
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is convenient to connect the USB device to the USB-C cable, and then
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connect the cable to the computer. The latter using the USB-C-to-A, if
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@ -40,15 +42,22 @@ $ cd tillitis-key1/hw/application_fpga
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$ make prog_flash
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```
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After programming, when your Key1 device is connected to the host, it would boot the firmware.
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When boot has completed, the device will start flashing the LED white. This indicates that the device
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is ready to receive and measure an app.
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After programming, when your device is connected to the host, it would boot the
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firmware. When boot has completed, the device will start flashing the LED
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white. This indicates that the device is ready to receive and measure an app.
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To personalize the device, you need to modify the hex file that contain the Unique Device Secret (UDS).
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You should also update the Unique Device Identity (UDI). These hex files are located in hw/application_fpga/data.
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To make this easier there is a tool, tpt that can generate these files. The tool can be found in hw/application_fpga/tools/tpt.
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The tool allow you to supply a secret used as part of the UDS generation. The tool can be run interactively, or by suppling
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inputs on the command line:
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# Device personalization
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To personalize the device, you need to modify the hex file that contains the
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Unique Device Secret (UDS). You should also update the Unique Device Identity
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(UDI). These hex files are located in `hw/application_fpga/data/`. Note that
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after modify the files in this directory, you need to rebuild and program the
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device again (as above).
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To make this easier there is a tool that can generate these files. The tool can
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be found in `hw/application_fpga/tools/tpt`. The tool allow you to supply a
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secret used as part of the UDS generation. The tool can be run interactively,
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or by suppling inputs on the command line:
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```
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usage: tpt.py [-h] [-v] [--uss USS] [--vid VID] [--pid PID] [--rev REV] [--serial SERIAL]
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@ -168,7 +168,7 @@ verilator: $(VERILATOR_TOP_SRC) $(VERILOG_SRCS) firmware.hex $(ICE40_SIM_CELLS)
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# Main FPGA build flow.
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# Synthesis. Place & Route. Bitstream generation.
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#-------------------------------------------------------------------
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synth.json: $(TOP_SRC) $(VERILOG_SRCS) bram_fw.hex
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synth.json: $(TOP_SRC) $(VERILOG_SRCS) bram_fw.hex $(P)/data/uds.hex $(P)/data/udi.hex
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$(YOSYS_PATH)yosys -v3 -l synth.log -DBRAM_FW_SIZE=$(BRAM_FW_SIZE) \
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-DFIRMWARE_HEX=\"$(P)/bram_fw.hex\" \
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-DUDS_HEX=\"$(P)/data/uds.hex\" \
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