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FPGA: Move sample point to not miss MISO lsb

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Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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Joachim Strömbergson 2024-07-10 13:25:13 +02:00 committed by Daniel Jobson
parent 53c5e70795
commit 3d8491af71
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GPG Key ID: 3707A9DBF4BB8F1A
1 changed files with 4 additions and 5 deletions
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5
hw/application_fpga/core/tk1/rtl/tk1_spi_master.v
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@ -229,7 +229,6 @@ module tk1_spi_master(
spi_ctrl_new = CTRL_IDLE; spi_ctrl_new = CTRL_IDLE;
spi_ctrl_we = 1'h0; spi_ctrl_we = 1'h0;
case (spi_ctrl_reg) case (spi_ctrl_reg)
CTRL_IDLE: begin CTRL_IDLE: begin
if (spi_start) begin if (spi_start) begin
@ -244,7 +243,6 @@ module tk1_spi_master(
end end
CTRL_POS_FLANK: begin CTRL_POS_FLANK: begin
spi_rx_data_nxt = 1'h1;
spi_csk_new = 1'h1; spi_csk_new = 1'h1;
spi_csk_we = 1'h1; spi_csk_we = 1'h1;
spi_ctrl_new = CTRL_NEG_FLANK; spi_ctrl_new = CTRL_NEG_FLANK;
@ -252,6 +250,7 @@ module tk1_spi_master(
end end
CTRL_NEG_FLANK: begin CTRL_NEG_FLANK: begin
spi_tx_data_nxt = 1'h1;
spi_csk_new = 1'h0; spi_csk_new = 1'h0;
spi_csk_we = 1'h1; spi_csk_we = 1'h1;
spi_ctrl_new = CTRL_NEXT; spi_ctrl_new = CTRL_NEXT;
@ -259,6 +258,7 @@ module tk1_spi_master(
end end
CTRL_NEXT: begin CTRL_NEXT: begin
spi_rx_data_nxt = 1'h1;
if (spi_bit_ctr_reg == 3'h7) begin if (spi_bit_ctr_reg == 3'h7) begin
spi_ready_new = 1'h1; spi_ready_new = 1'h1;
spi_ready_we = 1'h1; spi_ready_we = 1'h1;
@ -266,7 +266,6 @@ module tk1_spi_master(
spi_ctrl_we = 1'h1; spi_ctrl_we = 1'h1;
end end
else begin else begin
spi_tx_data_nxt = 1'h1;
spi_bit_ctr_inc = 1'h1; spi_bit_ctr_inc = 1'h1;
spi_ctrl_new = CTRL_POS_FLANK; spi_ctrl_new = CTRL_POS_FLANK;
spi_ctrl_we = 1'h1; spi_ctrl_we = 1'h1;