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FPGA: Move RAM address and data scrambling into the RAM module.

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Move the logic implementing the RAM address and data
	scrambling, descrambling into the RAM module. This cleans up
	the top level, and makes it easier to change the scrambling
	without chaning the top. In order to do correct scrambling the
	address to the RAM core must be 16 bits, not 15.

	Clean up some minor details at the top level, fixing text
        aligment and grouping of ports in instances.

Signed-off-by: Joachim Strömbergson <joachim@assured.se>
This commit is contained in:
Joachim Strömbergson 2024-08-21 13:29:27 +02:00 • committed by Daniel Jobson
parent 8d4ad120d6
commit 35052e50cb
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GPG key ID: 3707A9DBF4BB8F1A
4 changed files with 57 additions and 21 deletions
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hw/application_fpga/firmware.bin.sha512
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@ -1,2 +1 @@
edb39fca7dafb8ea0b89fdeecd960d7656e14ce461e49af97160a8bd6e67d9987e816adad37ba0fcfa63d107c3160988e4c3423ce4a71c39544bc0045888fec1 firmware.bin