diff --git a/hw/application_fpga/Makefile b/hw/application_fpga/Makefile index 6782424..589eff9 100644 --- a/hw/application_fpga/Makefile +++ b/hw/application_fpga/Makefile @@ -395,7 +395,7 @@ synth.json: $(FPGA_VERILOG_SRCS) $(VERILOG_SRCS) $(PICORV32_SRCS) bram_fw.hex application_fpga_par.json: synth.json $(P)/data/$(PIN_FILE) $(NEXTPNR_PATH)nextpnr-ice40 \ -l application_fpga_par.txt \ - --seed 9416596747216415304 \ + --seed 18160564147838858264 \ --freq $(TARGET_FREQ) \ --ignore-loops \ --up5k \ diff --git a/hw/application_fpga/core/tk1/rtl/tk1.v b/hw/application_fpga/core/tk1/rtl/tk1.v index 0aba642..bcdfc1d 100644 --- a/hw/application_fpga/core/tk1/rtl/tk1.v +++ b/hw/application_fpga/core/tk1/rtl/tk1.v @@ -101,7 +101,7 @@ module tk1 #( localparam TK1_NAME0 = 32'h746B3120; // "tk1 " localparam TK1_NAME1 = 32'h6d6b6466; // "mkdf" - localparam TK1_VERSION = 32'h00000005; + localparam TK1_VERSION = 32'h00000006; localparam FW_RAM_FIRST = 32'hd0000000; localparam FW_RAM_LAST = 32'hd0000fff; // 4 KB diff --git a/hw/application_fpga/fw/testapp/main.c b/hw/application_fpga/fw/testapp/main.c index 89b6958..4407a04 100644 --- a/hw/application_fpga/fw/testapp/main.c +++ b/hw/application_fpga/fw/testapp/main.c @@ -18,6 +18,7 @@ // clang-format off volatile uint32_t *tk1name0 = (volatile uint32_t *)TK1_MMIO_TK1_NAME0; volatile uint32_t *tk1name1 = (volatile uint32_t *)TK1_MMIO_TK1_NAME1; +volatile uint32_t *tk1version = (volatile uint32_t *)TK1_MMIO_TK1_VERSION; volatile uint32_t *uds = (volatile uint32_t *)TK1_MMIO_UDS_FIRST; volatile uint32_t *cdi = (volatile uint32_t *)TK1_MMIO_TK1_CDI_FIRST; volatile uint32_t *udi = (volatile uint32_t *)TK1_MMIO_TK1_UDI_FIRST; @@ -96,6 +97,9 @@ int main(void) reverseword(&name); write(IO_CDC, (const uint8_t *)&name, 4); puts(IO_CDC, "\r\n"); + puts(IO_CDC, "Version: "); + putinthex(IO_CDC, *tk1version); + puts(IO_CDC, "\r\n"); uint32_t zeros[8]; memset(zeros, 0, 8 * 4);