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dehanj 2024-04-05 08:25:26 +02:00 committed by Michael Cardell Widerkrantz
parent 3ddd047994
commit 2302c5130d
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GPG Key ID: D3DB3DDF57E704E5
1 changed files with 19 additions and 19 deletions
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38
hw/application_fpga/fw/tk1/main.c
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@ -365,34 +365,34 @@ static void run(const struct context *ctx)
uint32_t xorwow(uint32_t state, uint32_t acc) uint32_t xorwow(uint32_t state, uint32_t acc)
{ {
state ^= state << 13; state ^= state << 13;
state ^= state >> 17; state ^= state >> 17;
state ^= state << 5; state ^= state << 5;
state += acc; state += acc;
return state; return state;
} }
static void scramble_ram(void) static void scramble_ram(void)
{ {
uint32_t *ram = (uint32_t *)(TK1_RAM_BASE); uint32_t *ram = (uint32_t *)(TK1_RAM_BASE);
// Set RAM address and data scrambling values // Set RAM address and data scrambling values
*ram_rand = rnd_word(); *ram_rand = rnd_word();
*ram_scramble = rnd_word(); *ram_scramble = rnd_word();
// Get random state and accumulator seeds. // Get random state and accumulator seeds.
uint32_t data_state = rnd_word(); uint32_t data_state = rnd_word();
uint32_t data_acc = rnd_word(); uint32_t data_acc = rnd_word();
for (uint32_t w = 0; w < TK1_RAM_SIZE / 4; w++) { for (uint32_t w = 0; w < TK1_RAM_SIZE / 4; w++) {
data_state = xorwow(data_state, data_acc); data_state = xorwow(data_state, data_acc);
ram[w] = data_state; ram[w] = data_state;
} }
// Set new address and RAM scrambling values, // Set new address and RAM scrambling values,
// for all use of RAM by app. // for all use of RAM by app.
*ram_rand = rnd_word(); *ram_rand = rnd_word();
*ram_scramble = rnd_word(); *ram_scramble = rnd_word();
} }
int main(void) int main(void)