From 19098339529b83803a9fbff7dbd62e28cff2fef3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Str=C3=B6mbergson?= Date: Tue, 9 May 2023 12:21:26 +0200 Subject: [PATCH] Add header with info and license MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Joachim Strömbergson --- hw/application_fpga/core/tk1/tb/sb_rgba_drv.v | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/hw/application_fpga/core/tk1/tb/sb_rgba_drv.v b/hw/application_fpga/core/tk1/tb/sb_rgba_drv.v index 774563c..13c700c 100644 --- a/hw/application_fpga/core/tk1/tb/sb_rgba_drv.v +++ b/hw/application_fpga/core/tk1/tb/sb_rgba_drv.v @@ -1,3 +1,19 @@ +//====================================================================== +// +// SB_RGBA_DRV.v +// ------------- +// Dummy version of the SB_RGBA_DRV hard macro in Lattice iCE40 UP +// devices. This is just to be able to build the testbench. The only +// functionality we need is to be able to set the LEDs. +// +// +// Author: Joachim Strombergson +// Copyright (C) 2023 - Tillitis AB +// SPDX-License-Identifier: GPL-2.0-only +// +//====================================================================== + +`default_nettype none module SB_RGBA_DRV ( output wire RGB0, @@ -20,3 +36,7 @@ module SB_RGBA_DRV ( assign RGB2 = RGB2PWM; endmodule // SB_RGBA_DRV + +//====================================================================== +// EOF SB_RGBA_DRV.v +//======================================================================