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https://github.com/tillitis/tillitis-key1.git
synced 2024-12-25 07:29:25 -05:00
Add needed changes to firmware for simulation.
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fe9055ea23
commit
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@ -54,7 +54,9 @@ static enum state loading_commands(const struct frame_header *hdr,
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const uint8_t *cmd, enum state state,
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const uint8_t *cmd, enum state state,
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struct context *ctx);
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struct context *ctx);
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static void run(const struct context *ctx);
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static void run(const struct context *ctx);
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#if !defined(SIMULATION)
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static uint32_t xorwow(uint32_t state, uint32_t acc);
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static uint32_t xorwow(uint32_t state, uint32_t acc);
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#endif
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static void scramble_ram(void);
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static void scramble_ram(void);
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static void print_hw_version(void)
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static void print_hw_version(void)
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@ -364,6 +366,7 @@ static void run(const struct context *ctx)
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__builtin_unreachable();
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__builtin_unreachable();
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}
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}
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#if !defined(SIMULATION)
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static uint32_t xorwow(uint32_t state, uint32_t acc)
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static uint32_t xorwow(uint32_t state, uint32_t acc)
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{
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{
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state ^= state << 13;
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state ^= state << 13;
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@ -372,9 +375,13 @@ static uint32_t xorwow(uint32_t state, uint32_t acc)
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state += acc;
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state += acc;
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return state;
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return state;
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}
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}
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#endif
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static void scramble_ram(void)
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static void scramble_ram(void)
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{
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{
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// Can't fill RAM if we are simulating, data has already been loaded
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// into RAM.
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#if !defined(SIMULATION)
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uint32_t *ram = (uint32_t *)(TK1_RAM_BASE);
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uint32_t *ram = (uint32_t *)(TK1_RAM_BASE);
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// Fill RAM with random data
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// Fill RAM with random data
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@ -386,6 +393,7 @@ static void scramble_ram(void)
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data_state = xorwow(data_state, data_acc);
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data_state = xorwow(data_state, data_acc);
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ram[w] = data_state;
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ram[w] = data_state;
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}
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}
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#endif
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// Set RAM address and data scrambling parameters
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// Set RAM address and data scrambling parameters
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*ram_addr_rand = rnd_word();
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*ram_addr_rand = rnd_word();
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@ -414,6 +422,10 @@ int main(void)
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scramble_ram();
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scramble_ram();
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#if defined(SIMULATION)
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run(&ctx);
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#endif
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for (;;) {
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for (;;) {
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switch (state) {
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switch (state) {
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case FW_STATE_INITIAL:
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case FW_STATE_INITIAL:
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