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https://github.com/tillitis/tillitis-key1.git
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tb: Expand existing tests with access checks in app mode and syscalls
Checks availability of: - CDI - UDI - RAM - SPI
This commit is contained in:
Mikael Ågren
parent
9c0311cdfc
commit
0ee971e38c
@ -397,6 +397,21 @@ module tb_tk1 ();
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endtask // read_check_word
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//----------------------------------------------------------------
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// check_equal()
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//
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// Check that two values are equal
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//----------------------------------------------------------------
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task check_equal(input [31 : 0] value, input [31 : 0] expected);
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begin : check_equal
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if (value != expected) begin
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$display("--- Error: Got 0x%08x, expected 0x%08x", value, expected);
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error_ctr = error_ctr + 1;
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end
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end
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endtask // check_equal
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//----------------------------------------------------------------
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// fetch_instruction()
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//
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@ -531,10 +546,27 @@ module tb_tk1 ();
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$display("");
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$display("--- test2: Read out UDI started.");
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tb_syscall = 0;
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reset_dut();
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read_check_word(ADDR_UDI_FIRST, 32'h00010203);
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read_check_word(ADDR_UDI_LAST, 32'h04050607);
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$display("--- test2: Switch to app mode.");
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fetch_instruction(APP_RAM_START);
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read_check_word(ADDR_UDI_FIRST, 32'h0);
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read_check_word(ADDR_UDI_LAST, 32'h0);
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$display("--- test2: Enter syscall.");
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tb_syscall = 1;
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read_check_word(ADDR_UDI_FIRST, 32'h00010203);
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read_check_word(ADDR_UDI_LAST, 32'h04050607);
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$display("--- test2: Leave syscall.");
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tb_syscall = 0;
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$display("--- test2: completed.");
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$display("");
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end
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@ -549,6 +581,10 @@ module tb_tk1 ();
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begin
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tc_ctr = tc_ctr + 1;
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$display("--- test5: Reset DUT to switch to fw mode.");
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tb_syscall = 0;
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reset_dut();
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$display("");
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$display("--- test3: Write and read CDI started.");
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$display("--- test3: Write CDI.");
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@ -574,7 +610,7 @@ module tb_tk1 ();
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$display("--- test3: Switch to app mode.");
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fetch_instruction(APP_RAM_START);
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$display("--- test3: Try to write CDI again.");
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$display("--- test3: Try to write CDI from app mode.");
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write_word(ADDR_CDI_FIRST + 0, 32'hfffefdfc);
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write_word(ADDR_CDI_FIRST + 1, 32'hefeeedec);
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write_word(ADDR_CDI_FIRST + 2, 32'hdfdedddc);
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@ -584,7 +620,7 @@ module tb_tk1 ();
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write_word(ADDR_CDI_FIRST + 6, 32'h8f8e8d8c);
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write_word(ADDR_CDI_FIRST + 7, 32'h7f7e7d7c);
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$display("--- test3: Read CDI again.");
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$display("--- test3: Read CDI from app mode.");
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read_check_word(ADDR_CDI_FIRST + 0, 32'hf0f1f2f3);
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read_check_word(ADDR_CDI_FIRST + 1, 32'he0e1e2e3);
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read_check_word(ADDR_CDI_FIRST + 2, 32'hd0d1d2d3);
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@ -594,6 +630,32 @@ module tb_tk1 ();
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read_check_word(ADDR_CDI_FIRST + 6, 32'h80818283);
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read_check_word(ADDR_CDI_LAST + 0, 32'h70717273);
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$display("--- test3: Enter syscall.");
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tb_syscall = 1;
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$display("--- test3: Try to write CDI from syscall.");
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write_word(ADDR_CDI_FIRST + 0, 32'hfffefdfc);
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write_word(ADDR_CDI_FIRST + 1, 32'hefeeedec);
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write_word(ADDR_CDI_FIRST + 2, 32'hdfdedddc);
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write_word(ADDR_CDI_FIRST + 3, 32'hcfcecdcc);
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write_word(ADDR_CDI_FIRST + 4, 32'hafaeadac);
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write_word(ADDR_CDI_FIRST + 5, 32'h9f9e9d9c);
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write_word(ADDR_CDI_FIRST + 6, 32'h8f8e8d8c);
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write_word(ADDR_CDI_FIRST + 7, 32'h7f7e7d7c);
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$display("--- test3: Read CDI from syscall.");
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read_check_word(ADDR_CDI_FIRST + 0, 32'hfffefdfc);
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read_check_word(ADDR_CDI_FIRST + 1, 32'hefeeedec);
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read_check_word(ADDR_CDI_FIRST + 2, 32'hdfdedddc);
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read_check_word(ADDR_CDI_FIRST + 3, 32'hcfcecdcc);
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read_check_word(ADDR_CDI_FIRST + 4, 32'hafaeadac);
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read_check_word(ADDR_CDI_FIRST + 5, 32'h9f9e9d9c);
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read_check_word(ADDR_CDI_FIRST + 6, 32'h8f8e8d8c);
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read_check_word(ADDR_CDI_LAST + 0, 32'h7f7e7d7c);
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$display("--- test3: Leave syscall.");
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tb_syscall = 0;
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$display("--- test3: completed.");
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$display("");
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end
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@ -640,7 +702,7 @@ module tb_tk1 ();
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//----------------------------------------------------------------
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// test6()
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// Write RAM address and data randomizatio in fw mode.
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// Write and read RAM-address and data randomization.
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//----------------------------------------------------------------
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task test6;
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begin
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@ -649,6 +711,7 @@ module tb_tk1 ();
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$display("");
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$display("--- test6: Write RAM addr and data randomization in fw mode.");
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$display("--- test6: Reset DUT to switch to fw mode.");
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tb_syscall = 0;
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reset_dut();
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$display("--- test6: Write to ADDR_RAM_ADDR_RAND and ADDR_RAM_DATA_RAND .");
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@ -659,9 +722,14 @@ module tb_tk1 ();
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"--- test6: Check value in dut ADDR_RAM_ADDR_RAND and ADDR_RAM_DATA_RAND registers.");
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$display("--- test6: ram_addr_rand_reg: 0x%04x, ram_data_rand_reg: 0x%08x",
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dut.ram_addr_rand, dut.ram_data_rand);
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check_equal(dut.ram_addr_rand, 15'h1337);
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check_equal(dut.ram_data_rand, 32'h47114711);
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read_check_word(ADDR_RAM_ADDR_RAND, 32'h0);
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read_check_word(ADDR_RAM_DATA_RAND, 32'h0);
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$display("--- test6: Switch to app mode.");
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write_word(ADDR_APP_MODE_CTRL, 32'hf000000);
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fetch_instruction(APP_RAM_START);
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$display("--- test6: Write to ADDR_RAM_ADDR_RAND and ADDR_RAM_DATA_RAND again.");
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write_word(ADDR_RAM_ADDR_RAND, 32'hdeadbeef);
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@ -671,6 +739,30 @@ module tb_tk1 ();
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"--- test6: Check value in dut ADDR_RAM_ADDR_RAND and ADDR_RAM_DATA_RAND registers.");
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$display("--- test6: ram_addr_rand_reg: 0x%04x, ram_data_rand_reg: 0x%08x",
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dut.ram_addr_rand, dut.ram_data_rand);
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check_equal(dut.ram_addr_rand, 15'h1337);
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check_equal(dut.ram_data_rand, 32'h47114711);
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read_check_word(ADDR_RAM_ADDR_RAND, 32'h0);
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read_check_word(ADDR_RAM_DATA_RAND, 32'h0);
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$display("--- test6: Enter syscall.");
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tb_syscall = 1;
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$display("--- test6: Write to ADDR_RAM_ADDR_RAND and ADDR_RAM_DATA_RAND again.");
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write_word(ADDR_RAM_ADDR_RAND, 32'hdeadbeef);
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write_word(ADDR_RAM_DATA_RAND, 32'hf00ff00f);
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$display(
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"--- test6: Check value in dut ADDR_RAM_ADDR_RAND and ADDR_RAM_DATA_RAND registers.");
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$display("--- test6: ram_addr_rand_reg: 0x%04x, ram_data_rand_reg: 0x%08x",
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dut.ram_addr_rand, dut.ram_data_rand);
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check_equal(dut.ram_addr_rand, 15'h3eef);
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check_equal(dut.ram_data_rand, 32'hf00ff00f);
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read_check_word(ADDR_RAM_ADDR_RAND, 32'h0);
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read_check_word(ADDR_RAM_DATA_RAND, 32'h0);
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$display("--- test6: Leave syscall.");
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tb_syscall = 0;
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$display("--- test6: completed.");
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$display("");
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@ -752,6 +844,8 @@ module tb_tk1 ();
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write_word(ADDR_CPU_MON_LAST, 32'hdeadcafe);
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$display("--- test9: cpu_mon_first_reg: 0x%08x, cpu_mon_last_reg: 0x%08x",
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dut.cpu_mon_first_reg, dut.cpu_mon_last_reg);
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check_equal(dut.cpu_mon_first_reg, 32'h10000000);
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check_equal(dut.cpu_mon_last_reg, 32'h20000000);
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$display("--- test9: force_trap before illegal access: 0x%1x", tb_force_trap);
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$display("--- test9: Creating an illegal access.");
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@ -759,7 +853,11 @@ module tb_tk1 ();
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fetch_instruction(32'h13371337);
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$display("--- test9: cpu_addr: 0x%08x, cpu_instr: 0x%1x, cpu_valid: 0x%1x", tb_cpu_addr,
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tb_cpu_instr, tb_cpu_valid);
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check_equal(dut.cpu_mon_first_reg, 32'h10000000);
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check_equal(dut.cpu_mon_last_reg, 32'h20000000);
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$display("--- test9: force_trap: 0x%1x", tb_force_trap);
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check_equal(tb_force_trap, 1);
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$display("--- test9: completed.");
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$display("");
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@ -767,6 +865,66 @@ module tb_tk1 ();
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endtask // test9
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//----------------------------------------------------------------
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// check_inverting_spi_loopback_transfer_succeeds()
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// Do an SPI tranfer. Check that the received value is the inverse
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// of the value sent.
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//----------------------------------------------------------------
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task check_inverting_spi_loopback_transfer_succeeds(input [32 : 0] data);
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begin : check_inverting_spi_loopback_transfer
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$display("--- test10: Sending a byte.");
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write_word(ADDR_SPI_EN, 32'h1);
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write_word(ADDR_SPI_DATA, data);
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write_word(ADDR_SPI_XFER, 32'h1);
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// Ready ready flag in SPI until it is set.
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read_word(ADDR_SPI_XFER);
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while (!tb_read_data) begin
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read_word(ADDR_SPI_XFER);
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end
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$display("--- test10: Byte should have been sent.");
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#(2 * CLK_PERIOD);
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read_check_word(ADDR_SPI_DATA, ~data[7 : 0] & 8'hff);
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write_word(ADDR_SPI_EN, 32'h0);
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end
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endtask
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//----------------------------------------------------------------
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// check_spi_does_not_transfer()
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// Do an SPI transfer. Check that the SS, SCK and MISO signal are
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// not active.
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//----------------------------------------------------------------
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task check_spi_does_not_transfer;
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begin : check_spi_does_not_transfer
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reg [31 : 0] wait_ctr;
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reg error;
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localparam CLK_PER_SPI_BIT = 3;
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localparam WAIT_MARGIN = 10;
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error = 0;
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wait_ctr = CLK_PER_SPI_BIT * 8 * WAIT_MARGIN;
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$display("--- test10: Sending a byte.");
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write_word(ADDR_SPI_EN, 32'h1);
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write_word(ADDR_SPI_DATA, 32'haa);
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write_word(ADDR_SPI_XFER, 32'h1);
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$display("--- test10: Waiting to see if SPI signals change state.");
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while (!error && (wait_ctr != 0)) begin
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if (~tb_spi_ss || tb_spi_sck || tb_spi_mosi) begin
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$display("--- Error: SPI signals changed state");
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error_ctr = error_ctr + 1;
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error = 1;
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end
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#(CLK_PERIOD);
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wait_ctr = wait_ctr - 1;
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end
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end
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endtask
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//----------------------------------------------------------------
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// test10()
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// SPI master loopback test.
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@ -785,23 +943,20 @@ module tb_tk1 ();
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#(CLK_PERIOD);
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// Sending 0xa7 trough the inverting loopback.
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$display("--- test10: Sending a byte.");
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write_word(ADDR_SPI_EN, 32'h1);
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write_word(ADDR_SPI_DATA, 32'ha7);
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write_word(ADDR_SPI_XFER, 32'h1);
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check_inverting_spi_loopback_transfer_succeeds(32'ha7);
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// Ready ready flag in SPI until it is set.
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read_word(ADDR_SPI_XFER);
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while (!tb_read_data) begin
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read_word(ADDR_SPI_XFER);
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end
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$display("--- test10: Byte should have been sent.");
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$display("--- test10: Switch to app mode.");
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fetch_instruction(APP_RAM_START);
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// 0x58 is the inverse of 0xa7.
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#(2 * CLK_PERIOD);
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read_check_word(ADDR_SPI_DATA, 32'h58);
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write_word(ADDR_SPI_EN, 32'h0);
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check_spi_does_not_transfer();
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$display("--- test10: Enter syscall.");
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tb_syscall = 1;
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check_inverting_spi_loopback_transfer_succeeds(32'hc8);
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$display("--- test10: Leave syscall.");
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tb_syscall = 0;
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tb_monitor = 0;
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tb_spi_monitor = 0;
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