ch552: Use the new hardware CTS signals for UART access

- Use CTS signals to let the FPGA and CH552 signal each other that
    it is OK send UART data.
  - Update the CH552 rx and frame handling logic.
  - Fix minor spelling errors and indentation
This commit is contained in:
Jonas Thörnblad 2024-12-17 17:33:14 +01:00 committed by Mikael Ågren
parent ab4ef5fdf9
commit 0a634c76da
No known key found for this signature in database
GPG key ID: E02DA3D397792C46
4 changed files with 237 additions and 93 deletions

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@ -137,7 +137,8 @@ void putchar(char c)
SBUF = c;
}
char getchar() {
char getchar(void)
{
while(!RI); /* assumes UART is initialized */
RI = 0;
return SBUF;
@ -152,7 +153,8 @@ int putchar(int c)
return c;
}
int getchar() {
int getchar(void)
{
while(!RI); /* assumes UART is initialized */
RI = 0;
return SBUF;
@ -198,3 +200,68 @@ void gpio_unset(uint8_t pin)
break;
}
}
uint8_t gpio_get(uint8_t pin)
{
uint8_t ret = 0;
switch (pin) {
case 0x10: // p1.4
ret = P1 & 0x10;
break;
case 0x20: // p1.5
ret = P1 & 0x20;
break;
default: // do nothing, unsupported pin.
ret = 0xff;
break;
}
return ret;
}
// Set pin p1.4 to GPIO input mode. (FPGA_CTS)
void gpio_init_p1_4_in()
{
// p1.4
P1_MOD_OC &= ~0x10; // Output Mode: 0 = Push-pull output, 1 = Open-drain output
P1_DIR_PU &= ~0x10; // Port Direction Control and Pull-up Enable Register:
// Push-pull output mode:
// 0 = Input.
// 1 = Output
// Open-drain output mode:
// 0 = Pull-up resistor disabled
// 1 = Pull-up resistor enabled
}
// Read status of pin 1.4
uint8_t gpio_p1_4_get(void)
{
return (P1 & 0x10); // p1.4
}
// Set pin p1.5 to GPIO output mode. (CH552_CTS)
void gpio_init_p1_5_out()
{
// p1.5
P1_MOD_OC &= ~0x20; // Output Mode: 0 = Push-pull output, 1 = Open-drain output
P1_DIR_PU |= 0x20; // Port Direction Control and Pull-up Enable Register:
// Push-pull output mode:
// 0 = Input.
// 1 = Output
// Open-drain output mode:
// 0 = Pull-up resistor disabled
// 1 = Pull-up resistor enabled
}
// Set p1.5 high
void gpio_p1_5_set(void)
{
P1 |= 0x20; // p1.4
}
// Set p1.5 low
void gpio_p1_5_unset(void)
{
P1 &= ~0x20;
}