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PoC: Remove IRQ30 from fw/irqpoc

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Removing IRQ30 since it us no longer exist
This commit is contained in:
Mikael Ågren 2024-12-17 12:45:48 +01:00
parent 2ec2196e92
commit 052029236d
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GPG Key ID: E02DA3D397792C46
1 changed files with 4 additions and 6 deletions
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10
hw/application_fpga/fw/irqpoc/start.S
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@ -3,6 +3,9 @@
* SPDX-License-Identifier: GPL-2.0-only * SPDX-License-Identifier: GPL-2.0-only
*/ */
// Example firmware that demonstrates how to raise interrupts
//
#include "custom_ops.S" // PicoRV32 custom instructions #include "custom_ops.S" // PicoRV32 custom instructions
.section ".text.init" .section ".text.init"
@ -14,7 +17,6 @@ _start:
irq_handler: irq_handler:
// PicoRV32 stores the IRQ bitmask in x4. // PicoRV32 stores the IRQ bitmask in x4.
// If bit 31 is 1: IRQ31 was triggered. // If bit 31 is 1: IRQ31 was triggered.
// If bit 30 is 1: IRQ30 was triggered.
nop // NOPs are not necessary. Only added to make it easier to find nop // NOPs are not necessary. Only added to make it easier to find
nop // when simulating. nop // when simulating.
@ -24,16 +26,12 @@ irq_handler:
.=0x20 // Setting location of init to 0x20. Makes it easier to find when .=0x20 // Setting location of init to 0x20. Makes it easier to find when
// simulating. // simulating.
init: init:
li t0, 0x3fffffff // IRQ31 & IRQ30 mask li t0, 0x7fffffff // IRQ31 mask
picorv32_maskirq_insn(zero, t0) // Enable IRQs picorv32_maskirq_insn(zero, t0) // Enable IRQs
li t0, 0xe1000000 // IRQ31 trigger address li t0, 0xe1000000 // IRQ31 trigger address
sw zero, 0(t0) // Raise IRQ by writing to interrupt trigger address. sw zero, 0(t0) // Raise IRQ by writing to interrupt trigger address.
// Writing any data triggers an interrupt. // Writing any data triggers an interrupt.
li t0, 0xe0000000 // IRQ30 trigger address
sw zero, 0(t0) // Raise IRQ by writing to interrupt trigger address.
// Writing any data triggers an interrupt.
loop: loop:
j loop j loop