Change memory constants to defines
Instead of putting memory constant into an enum we use defines. Use the direct memory address instead of ORing constants together to compute the address. An enum in ISO C is a signed int. Some of are memory addresses are to large to fit in a signed int. This is not a problem since we're not using ISO C (-std=gnu99) but it doesn't look very nice if you turn on pedantic warnings. Also, if someone would use another compiler which at least supports the inline assembly we use, but possible not other GNU extensions, things would probably break.
This commit is contained in:
Michael Cardell Widerkrantz
dehanj
parent
e2bd38c540
commit
046343e525
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@ -7,96 +7,125 @@
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// clang-format off
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#ifndef TK1_MEM_H
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#define TK1_MEM_H
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#ifndef TKEY_TK1_MEM_H
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#define TKEY_TK1_MEM_H
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// The canonical location of this file is:
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// repo: https://github.com/tillitis/tillitis-key1
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// path: /hw/application_fpga/fw/tk1_mem.h
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/*
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// The contents are derived from the Verilog code. For use by QEMU model,
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// firmware, and apps.
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The canonical location of this file is in:
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enum {
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TK1_ROM_BASE = 0x00000000, // 0b00000000...
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TK1_RAM_BASE = 0x40000000, // 0b01000000...
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TK1_RAM_SIZE = 0x20000, // 128 KB
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TK1_RESERVED_BASE = 0x80000000, // 0b10000000...
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TK1_MMIO_BASE = 0xc0000000, // 0b11000000...
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TK1_MMIO_SIZE = 0xffffffff - TK1_MMIO_BASE,
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https://github.com/tillitis/tillitis-key1
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TK1_APP_MAX_SIZE = TK1_RAM_SIZE,
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/hw/application_fpga/fw/tk1_mem.h
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TK1_MMIO_TRNG_BASE = TK1_MMIO_BASE | 0x00000000,
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TK1_MMIO_TIMER_BASE = TK1_MMIO_BASE | 0x01000000,
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TK1_MMIO_UDS_BASE = TK1_MMIO_BASE | 0x02000000,
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TK1_MMIO_UART_BASE = TK1_MMIO_BASE | 0x03000000,
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TK1_MMIO_TOUCH_BASE = TK1_MMIO_BASE | 0x04000000,
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TK1_MMIO_FW_RAM_BASE = TK1_MMIO_BASE | 0x10000000,
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TK1_MMIO_FW_RAM_SIZE = 2048,
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// This "core" only exists in QEMU
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TK1_MMIO_QEMU_BASE = TK1_MMIO_BASE | 0x3e000000,
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TK1_MMIO_TK1_BASE = TK1_MMIO_BASE | 0x3f000000, // 0xff000000
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The contents are derived from the Verilog code. For use by QEMU model,
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firmware, and apps.
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TK1_NAME0_SUFFIX = 0x00,
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TK1_NAME1_SUFFIX = 0x04,
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TK1_VERSION_SUFFIX = 0x08,
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Memory map
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TK1_MMIO_TRNG_STATUS = TK1_MMIO_TRNG_BASE | 0x24,
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TK1_MMIO_TRNG_STATUS_READY_BIT = 0,
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TK1_MMIO_TRNG_ENTROPY = TK1_MMIO_TRNG_BASE | 0x80,
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Top level prefix, the first 2 bits in a 32-bit address:
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TK1_MMIO_TIMER_CTRL = TK1_MMIO_TIMER_BASE | 0x20,
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TK1_MMIO_TIMER_CTRL_START_BIT = 0,
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TK1_MMIO_TIMER_CTRL_STOP_BIT = 1,
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TK1_MMIO_TIMER_STATUS = TK1_MMIO_TIMER_BASE | 0x24,
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TK1_MMIO_TIMER_STATUS_RUNNING_BIT = 0,
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TK1_MMIO_TIMER_PRESCALER = TK1_MMIO_TIMER_BASE | 0x28,
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TK1_MMIO_TIMER_TIMER = TK1_MMIO_TIMER_BASE | 0x2c,
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name prefix address length
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--------------------------------------------------------
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ROM 0b00 30 bit address
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RAM 0b01 30 bit address
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Reserved 0b10
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MMIO 0b11 6 bits for core select, 24 bits rest
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TK1_MMIO_UDS_FIRST = TK1_MMIO_UDS_BASE | 0x40,
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TK1_MMIO_UDS_LAST = TK1_MMIO_UDS_BASE | 0x5c, // Address of last 32-bit word of UDS
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Address Prefix, the first 8 bits in a 32-bit address:
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TK1_MMIO_UART_BIT_RATE = TK1_MMIO_UART_BASE | 0x40,
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TK1_MMIO_UART_DATA_BITS = TK1_MMIO_UART_BASE | 0x44,
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TK1_MMIO_UART_STOP_BITS = TK1_MMIO_UART_BASE | 0x48,
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TK1_MMIO_UART_RX_STATUS = TK1_MMIO_UART_BASE | 0x80,
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TK1_MMIO_UART_RX_DATA = TK1_MMIO_UART_BASE | 0x84,
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TK1_MMIO_UART_RX_BYTES = TK1_MMIO_UART_BASE | 0x88,
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TK1_MMIO_UART_TX_STATUS = TK1_MMIO_UART_BASE | 0x100,
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TK1_MMIO_UART_TX_DATA = TK1_MMIO_UART_BASE | 0x104,
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name prefix
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--------------------
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ROM 0x00
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RAM 0x40
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MMIO 0xc0
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MMIO TRNG 0xc0
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MMIO TIMER 0xc1
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MMIO UDS 0xc2
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MMIO UART 0xc3
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MMIO TOUCH 0xc4
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MMIO FW_RAM 0xd0
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MMIO TK1 0xff
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*/
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TK1_MMIO_TOUCH_STATUS = TK1_MMIO_TOUCH_BASE | 0x24,
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TK1_MMIO_TOUCH_STATUS_EVENT_BIT = 0,
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#define TK1_ROM_BASE 0x00000000
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#define TK1_RAM_BASE 0x40000000
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#define TK1_RAM_SIZE 0x20000
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// This will only ever exist in QEMU:
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TK1_MMIO_QEMU_DEBUG = TK1_MMIO_QEMU_BASE | 0x1000,
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#define TK1_APP_MAX_SIZE 0x20000
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TK1_MMIO_TK1_NAME0 = TK1_MMIO_TK1_BASE | TK1_NAME0_SUFFIX,
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TK1_MMIO_TK1_NAME1 = TK1_MMIO_TK1_BASE | TK1_NAME1_SUFFIX,
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TK1_MMIO_TK1_VERSION = TK1_MMIO_TK1_BASE | TK1_VERSION_SUFFIX,
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TK1_MMIO_TK1_SWITCH_APP = TK1_MMIO_TK1_BASE | 0x20,
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TK1_MMIO_TK1_LED = TK1_MMIO_TK1_BASE | 0x24,
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TK1_MMIO_TK1_LED_R_BIT = 2,
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TK1_MMIO_TK1_LED_G_BIT = 1,
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TK1_MMIO_TK1_LED_B_BIT = 0,
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TK1_MMIO_TK1_GPIO = TK1_MMIO_TK1_BASE | 0x28,
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TK1_MMIO_TK1_GPIO1_BIT = 0,
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TK1_MMIO_TK1_GPIO2_BIT = 1,
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TK1_MMIO_TK1_GPIO3_BIT = 2,
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TK1_MMIO_TK1_GPIO4_BIT = 3,
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TK1_MMIO_TK1_APP_ADDR = TK1_MMIO_TK1_BASE | 0x30,
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TK1_MMIO_TK1_APP_SIZE = TK1_MMIO_TK1_BASE | 0x34,
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TK1_MMIO_TK1_BLAKE2S = TK1_MMIO_TK1_BASE | 0x40,
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TK1_MMIO_TK1_CDI_FIRST = TK1_MMIO_TK1_BASE | 0x80,
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TK1_MMIO_TK1_CDI_LAST = TK1_MMIO_TK1_BASE | 0x9c, // Address of last 32-bit word of CDI.
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TK1_MMIO_TK1_UDI_FIRST = TK1_MMIO_TK1_BASE | 0xc0,
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TK1_MMIO_TK1_UDI_LAST = TK1_MMIO_TK1_BASE | 0xc4, // Address of last 32-bit word of UDI.
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TK1_MMIO_TK1_RAM_ASLR = TK1_MMIO_TK1_BASE | 0x100,
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TK1_MMIO_TK1_RAM_SCRAMBLE = TK1_MMIO_TK1_BASE | 0x104,
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TK1_MMIO_TK1_CPU_MON_CTRL = TK1_MMIO_TK1_BASE | 0x180,
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TK1_MMIO_TK1_CPU_MON_FIRST = TK1_MMIO_TK1_BASE | 0x184,
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TK1_MMIO_TK1_CPU_MON_LAST = TK1_MMIO_TK1_BASE | 0x188,
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};
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#define TK1_MMIO_FW_RAM_BASE 0xd0000000
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// FW_RAM is 2048 bytes
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#define TK1_MMIO_FW_RAM_SIZE 0x800
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#define TK1_MMIO_TRNG_BASE 0xc0000000
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#define TK1_MMIO_TRNG_STATUS 0xc0000024
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#define TK1_MMIO_TRNG_STATUS_READY_BIT 0
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#define TK1_MMIO_TRNG_ENTROPY 0xc0000080
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#define TK1_MMIO_TIMER_CTRL 0xc1000020
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#define TK1_MMIO_TIMER_CTRL_START_BIT 0
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#define TK1_MMIO_TIMER_CTRL_STOP_BIT 1
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#define TK1_MMIO_TIMER_STATUS 0xc1000024
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#define TK1_MMIO_TIMER_STATUS_RUNNING_BIT 0
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#define TK1_MMIO_TIMER_PRESCALER 0xc1000028
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#define TK1_MMIO_TIMER_TIMER 0xc100002c
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#define TK1_MMIO_UDS_BASE 0xc2000000
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#define TK1_MMIO_UDS_FIRST 0xc2000040
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#define TK1_MMIO_UDS_LAST 0xc200005c
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#define TK1_MMIO_UART_BASE 0xc3000000
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#define TK1_MMIO_UART_BIT_RATE 0xc3000040
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#define TK1_MMIO_UART_DATA_BITS 0xc3000044
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#define TK1_MMIO_UART_STOP_BITS 0xc3000048
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#define TK1_MMIO_UART_RX_STATUS 0xc3000080
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#define TK1_MMIO_UART_RX_DATA 0xc3000084
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#define TK1_MMIO_UART_RX_BYTES 0xc3000088
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#define TK1_MMIO_UART_TX_STATUS 0xc3000100
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#define TK1_MMIO_UART_TX_DATA 0xc3000104
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#define TK1_MMIO_TOUCH_BASE 0xc4000000
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#define TK1_MMIO_TOUCH_STATUS 0xc4000024
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#define TK1_MMIO_TOUCH_STATUS_EVENT_BIT 0
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// This only exists in QEMU
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#define TK1_MMIO_QEMU_DEBUG 0xfe001000
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#define TK1_MMIO_TK1_NAME0 0xff000000
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#define TK1_MMIO_TK1_NAME1 0xff000004
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#define TK1_MMIO_TK1_VERSION 0xff000008
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#define TK1_MMIO_TK1_SWITCH_APP 0xff000020
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#define TK1_MMIO_TK1_LED 0xff000024
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#define TK1_MMIO_TK1_LED_R_BIT 2
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#define TK1_MMIO_TK1_LED_G_BIT 1
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#define TK1_MMIO_TK1_LED_B_BIT 0
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#define TK1_MMIO_TK1_GPIO 0xff000028
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#define TK1_MMIO_TK1_GPIO1_BIT 0
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#define TK1_MMIO_TK1_GPIO2_BIT 1
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#define TK1_MMIO_TK1_GPIO3_BIT 2
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#define TK1_MMIO_TK1_GPIO4_BIT 3
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#define TK1_MMIO_TK1_APP_ADDR 0xff000030
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#define TK1_MMIO_TK1_APP_SIZE 0xff000034
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#define TK1_MMIO_TK1_BLAKE2S 0xff000040
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#define TK1_MMIO_TK1_CDI_FIRST 0xff000080
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#define TK1_MMIO_TK1_CDI_LAST 0xff00009c
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#define TK1_MMIO_TK1_UDI_FIRST 0xff0000c0
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#define TK1_MMIO_TK1_UDI_LAST 0xff0000c4
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#define TK1_MMIO_TK1_RAM_ASLR 0xff000100
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#define TK1_MMIO_TK1_RAM_SCRAMBLE 0xff000104
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#define TK1_MMIO_TK1_CPU_MON_CTRL 0xff000180
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#define TK1_MMIO_TK1_CPU_MON_FIRST 0xff000184
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#define TK1_MMIO_TK1_CPU_MON_LAST 0xff000188
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#endif
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