mirror of
https://github.com/tillitis/tillitis-key1.git
synced 2024-10-01 01:45:38 -04:00
18 lines
231 B
Verilog
18 lines
231 B
Verilog
|
|
||
|
|
module SB_HFOSC #(
|
||
|
|
parameter CLKHF_DIV
|
||
|
|
) (
|
||
|
|
input CLKHFPU,
|
||
|
|
input CLKHFEN,
|
||
|
|
|
||
|
|
output reg CLKHF
|
||
|
|
);
|
||
|
|
|
||
|
|
// Nonfunctional, for linting only.
|
||
|
|
always @(*) begin
|
||
|
|
CLKHF = (CLKHFPU & CLKHFEN);
|
||
|
|
end
|
||
|
|
|
||
|
|
endmodule
|
||
|
|
|