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70 lines
2.1 KiB
C
Executable File
70 lines
2.1 KiB
C
Executable File
/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Copyright (C) 2014 Jared Boone, ShareBrained Technology
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* LPC43xx drivers configuration.
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* The following settings override the default settings present in
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* the various device driver implementation headers.
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* Note that the settings for each driver only have effect if the driver
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* is enabled in halconf.h.
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*
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* IRQ priorities:
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* 3...0 Lowest...highest.
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*/
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/* NOTE: Beware setting IRQ priorities < "2":
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* dbg_check_enter_isr "#SV8 means that probably you have some IRQ set at a
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* priority level above the kernel level (level 0 or 1 usually) so it is able
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* to preempt the kernel and mess things up.
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*/
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/*
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* I2C driver system settings.
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*/
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#define LPC43XX_I2C_USE_I2C0 TRUE
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/*
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* SPI driver system settings.
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*/
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#define LPC_SPI_USE_SSP1 TRUE
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/*
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* DMA driver system settings.
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*/
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#define LPC_ADC0_IRQ_PRIORITY 1
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//#define LPC_DMA_IRQ_PRIORITY 2
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//#define LPC_ADC1_IRQ_PRIORITY 3
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#define LPC43XX_GPT_TIMER0_IRQ_PRIORITY 2
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//#define LPC43XX_GPT_TIMER1_IRQ_PRIORITY 2
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#define LPC43XX_M0_I2C_I2C0_OR_I2C1_IRQ_PRIORITY 3
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#define LPC43XX_PIN_INT4_IRQ_PRIORITY 3
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#define LPC_SPI_SSP0_OR_SSP1_IRQ_PRIORITY 3
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#define LPC_SDC_SDIO_IRQ_PRIORITY 3
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#define LPC_RTC_IRQ_PRIORITY 3
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#define LPC43XX_GPT_USE_TIMER0 TRUE
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//#define LPC43XX_GPT_USE_TIMER1 TRUE
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#define LPC43XX_M4TXEVENT_IRQ_PRIORITY 3
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