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1,683 Commits 3 Branches 442 Tags 434 MiB
e5fef6bb89
Commit Graph

32 Commits

Author SHA1 Message Date
furrtek
e5fef6bb89 Added tabs to BHT TX and Jammer 
Updated firmware binary
 2017-08-12 00:27:05 +01:00
Jared Boone
49252dc1bc LPC43xx: Add CREG6 struct definition. Add I2S CREG6 configuration. 2017-08-06 11:16:57 -07:00
furrtek
c2a9ed7d9b Merge remote-tracking branch 'upstream/master' 2017-07-25 00:20:57 +01:00
furrtek
5a67a7080a ADS-B TX works well enough for dump1090 and gr-air-modes 
Hooked ADS-B RX to baseband instead of debug IQ file, not tested
 2017-07-23 12:20:32 +01:00
Jared Boone
1b9a569022 SDC: Adjust clock/data timing and output drive to match SD specs, measurements. 2017-07-17 16:38:31 -07:00
Jared Boone
dd0048db8d Remove broken simd32_t type. 2017-05-03 09:58:07 +01:00
furrtek
a053c0e234 Reverted to SIMD macros to fix FM RX (again) 2017-04-19 00:49:44 +01:00
furrtek
1e79be5555 Shameful commit. Fixed HackRF mode not working... 
Sync'd with Sharebrained's repo, no more SIMD warnings
 2017-04-07 02:00:05 +01:00
furrtek
0102a34286 Reverted WFM mode to working state 
TXView in ADSB TX
Lockable TXView
POCSAG TX bugfix with Alphanum and Numeric only
Testing Labels widget
 2017-02-12 04:05:21 +00:00
furrtek
5e40669cbc Merge 'upstream/master' - At least it builds... 2017-01-16 03:45:44 +00:00
Jared Boone
05eb694c0a Introduce simd32_t type. 
Discontinue use of disagreeable __SIMD #define.
 2017-01-06 16:57:36 -08:00
Jared Boone
c8af6dcd70 Add SMULL instruction inline function. 2016-08-10 09:53:35 -07:00
furrtek
fdfa7c9776 Merge remote-tracking branch 'upstream/master' 
Conflicts:
	firmware/Makefile
	firmware/application/Makefile
	firmware/application/event_m0.cpp
	firmware/application/ui_setup.cpp
	firmware/application/ui_setup.hpp
	firmware/baseband/baseband_thread.cpp
	firmware/baseband/baseband_thread.hpp
	firmware/bootstrap/CMakeLists.txt
	firmware/common/message.hpp
	firmware/common/portapack_shared_memory.hpp
	hardware/.gitignore
 2016-07-25 16:35:42 +02:00
Jared Boone
2993f7be1d SDIO: Commit optional code to run at 50MHz. 2016-07-19 11:00:31 -07:00
Jared Boone
cf5ac441ae Add CMake firmware build system. 2016-06-30 12:02:43 -07:00
furrtek
569f299f42 Merge 2016-05-09 21:05:11 +02:00
Jared Boone
72cc6569ca Use UM10503 (user manual) suggestion for SD delay config. 2016-05-06 15:04:53 -07:00
Jared Boone
01fc6b9bc9 Remove redundant values in I2C struct. 2016-04-26 16:17:53 -07:00
furrtek
1b0da68d65 Merge remote-tracking branch 'upstream/master' 
Conflicts:
	firmware/application/Makefile
	firmware/application/core_control.cpp
	firmware/application/touch.cpp
	firmware/application/ui_debug.cpp
	firmware/application/ui_debug.hpp
	firmware/application/ui_navigation.cpp
	firmware/baseband/baseband_thread.cpp
 2016-04-21 20:36:19 +02:00
Jared Boone
1682f4700d Move SDC CCLK to 25MHz 
If your card can't hack it, get a new card.
 2016-04-10 17:30:12 -07:00
Jared Boone
12939a0f82 Support larger SDC LLD transactions 
Use chained DMA buffers -- limit is now 16Kbytes, adjustable by LPC_SDC_SDIO_DESCRIPTOR_COUNT. More descriptors require more stack.
 2016-04-10 17:15:59 -07:00
Jared Boone
df6593ac91 SDC: Remove commented code 2016-04-09 21:34:28 -07:00
Jared Boone
34963c7f37 SDC: Auto-off clock when no transfer. 2016-04-09 21:33:46 -07:00
furrtek
6e496e2b26 Merge fixing, commit to catch up on recent files 2016-02-04 10:27:53 +01:00
furrtek
44638e504b SYNC 2016-01-31 09:34:24 +01:00
furrtek
107c212d88 Completely useless "about" screen 
Paved road for talking Xylos RX and logger
Added test button for Xylos TX
Fixed jammer crashing after loading second time
 2016-01-30 00:28:05 +01:00
Jared Boone
9505d367c3 Add SMMULR "intrinsic". 2015-12-28 16:50:01 -08:00
Jared Boone
90cd2a6794 Improve argument and retval types for my M4 SIMD intrinsics. 2015-12-28 16:49:31 -08:00
Jared Boone
5408eb1042 Nuke duplicate peripheral pointer constants for C++ 
Turns out the reinterpret_cast idiom is no longer kosher in the standard.
 2015-12-16 21:21:45 -08:00
Jared Boone
5978c99c31 Add API to stop HAL SysTick counter. 2015-08-20 17:51:07 -07:00
Jared Boone
4e0de9c4ad Fix clock configuration for M4. 
M0 launches baseband, so M4 clock can be set to PLL1. Provide a way to configure that per project, set to correct values for baseband project.
 2015-08-14 12:21:49 -07:00
Jared Boone
dc6fee8370 Initial firmware commit. 2015-07-08 08:39:24 -07:00