From d3acd79df82201b142698f481c1886888e77786a Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Sun, 30 Aug 2015 16:23:55 -0700 Subject: [PATCH] Add PCB stack data and diagram. --- hardware/portapack_h1/portapack_h1.kicad_pcb | 93 ++++++++++++++++++++ 1 file changed, 93 insertions(+) diff --git a/hardware/portapack_h1/portapack_h1.kicad_pcb b/hardware/portapack_h1/portapack_h1.kicad_pcb index 494594d8..c2f35ea6 100644 --- a/hardware/portapack_h1/portapack_h1.kicad_pcb +++ b/hardware/portapack_h1/portapack_h1.kicad_pcb @@ -2620,6 +2620,99 @@ (net 63 GND) (solder_mask_margin 0.0762) (solder_paste_margin_ratio -0.1)) ) + (gr_line (start 87.5 23.5) (end 98.5 23.5) (layer Dwgs.User) (width 0.1524)) + (gr_line (start 45 23.5) (end 54 23.5) (layer Dwgs.User) (width 0.1524)) + (gr_line (start 27.5 23.5) (end 32.5 23.5) (layer Dwgs.User) (width 0.1524)) + (gr_line (start 20 23.5) (end 24 23.5) (layer Dwgs.User) (width 0.1524)) + (gr_text "62 mil +/- 10%\nBoard Thickness" (at 105 41) (layer Dwgs.User) + (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left)) + ) + (gr_line (start 102.5 47) (end 103 45.5) (layer Dwgs.User) (width 0.1524)) + (gr_line (start 102.5 47) (end 102 45.5) (layer Dwgs.User) (width 0.1524)) + (gr_line (start 102.5 35) (end 103 36.5) (layer Dwgs.User) (width 0.1524)) + (gr_line (start 102.5 35) (end 102 36.5) (layer Dwgs.User) (width 0.1524)) + (gr_line (start 102.5 35) (end 102.5 47) (layer Dwgs.User) (width 0.1524)) + (gr_line (start 100 47) (end 105 47) (layer Dwgs.User) (width 0.1524)) + (gr_line (start 100 35) (end 105 35) (layer Dwgs.User) (width 0.1524)) + (gr_line (start 70 39.5) (end 70 37.5) (layer Dwgs.User) (width 0.1524) (tstamp 55E38A17)) + (gr_line (start 70 38.5) (end 71 37.5) (layer Dwgs.User) (width 0.1524) (tstamp 55E38A16)) + (gr_line (start 70 39.5) (end 72 37.5) (layer Dwgs.User) (width 0.1524) (tstamp 55E38A15)) + (gr_line (start 71 39.5) (end 73 37.5) (layer Dwgs.User) (width 0.1524) (tstamp 55E38A14)) + (gr_line (start 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