From b8726b6ecf46dfc04c755c13507289512446ae60 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Thu, 24 Dec 2015 10:36:26 -0800 Subject: [PATCH] Un-bitfield PinConfig, GCC 5 didn't like it. And GCC 4.9 was very touchy about it. Attempts to fix by other means broke MAX2837 register readback (but not writing?). It suggests there might be a deeper issue -- setup/hold timing? --- firmware/common/gpio.hpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/firmware/common/gpio.hpp b/firmware/common/gpio.hpp index 21a08d6b..0f02d6ec 100644 --- a/firmware/common/gpio.hpp +++ b/firmware/common/gpio.hpp @@ -28,12 +28,12 @@ #include "hal.h" struct PinConfig { - const uint32_t mode : 3; - const uint32_t pd : 1; - const uint32_t pu : 1; - const uint32_t fast : 1; - const uint32_t input : 1; - const uint32_t ifilt : 1; + const uint32_t mode; + const uint32_t pd; + const uint32_t pu; + const uint32_t fast; + const uint32_t input; + const uint32_t ifilt; constexpr operator uint16_t() { return