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Signal M0 when stream FIFO has another "chunk".

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This commit is contained in:
Jared Boone 2016-04-06 16:22:06 -07:00
parent 4a1d3b14a1
commit a5c2143ca8
1 changed files with 7 additions and 0 deletions
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7
firmware/baseband/stream_input.hpp
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@ -48,7 +48,13 @@ public:
size_t write(const void* const data, const size_t length) {
const auto written = fifo.in(reinterpret_cast<const uint8_t*>(data), length);
const auto last_bytes_written = bytes_written;
bytes_written += written;
if( (bytes_written & event_bytes_mask) < (last_bytes_written & event_bytes_mask) ) {
creg::m4txevent::assert();
}
return written;
}
@ -58,6 +64,7 @@ public:
private:
const size_t K;
const uint64_t event_bytes_mask = (1ULL << 12) - 1;
uint64_t bytes_written = 0;
std::unique_ptr<uint8_t[]> data;
FIFO<uint8_t> fifo;