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CLKOUT workaround for r9 boards (#1671)
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4eb5c4603e
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@ -561,26 +561,32 @@ void ClockManager::stop_audio_pll() {
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}
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}
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void ClockManager::enable_clock_output(bool enable) {
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void ClockManager::enable_clock_output(bool enable) {
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if (enable) {
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if (hackrf_r9) {
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clock_generator.enable_output(clock_generator_output_og_clkout);
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gpio_r9_clkout_en.output();
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if (portapack::persistent_memory::clkout_freq() < 1000) {
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gpio_r9_clkout_en.write(enable);
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clock_generator.set_ms_frequency(clock_generator_output_og_clkout, portapack::persistent_memory::clkout_freq() * 128000, si5351_vco_f, 7);
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} else {
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// NOTE: RETURNING HERE IF HACKRF_R9 TO PREVENT CLK2 FROM BEING DISABLED OR FREQ MODIFIED SINCE CLK2 ON R9 IS
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clock_generator.set_ms_frequency(clock_generator_output_og_clkout, portapack::persistent_memory::clkout_freq() * 1000, si5351_vco_f, 0);
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// USED FOR BOTH CLKOUT AND FOR THE MCU_CLOCK (== GP_CLKIN) WHICH OTHER LP43XX CLOCKS CURRENTLY RELY ON.
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}
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// FUTURE TBD: REMOVE OTHER LP43XX CLOCK DEPENDENCIES ON GP_CLKIN, THEN DELETE THE return LINE BELOW TO ALLOW
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} else {
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// CLKOUT FREQ CHANGES ON R9 BOARDS.
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clock_generator.disable_output(clock_generator_output_og_clkout);
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return;
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}
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}
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auto si5351_clock_control_common = hackrf_r9
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auto clkout_select = hackrf_r9 ? clock_generator_output_r9_clkout : clock_generator_output_og_clkout;
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? si5351a_clock_control_common
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: si5351c_clock_control_common;
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const auto ref_pll = hackrf_r9
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? ClockControl::MultiSynthSource::PLLA
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: get_si5351c_reference_clock_generator_pll(reference.source);
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if (enable)
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if (enable) {
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clock_generator.set_clock_control(clock_generator_output_og_clkout, si5351_clock_control_common[clock_generator_output_og_clkout].ms_src(ref_pll).clk_pdn(ClockControl::ClockPowerDown::Power_On));
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clock_generator.enable_output(clkout_select);
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else
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if (portapack::persistent_memory::clkout_freq() < 1000) {
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clock_generator.set_clock_control(clock_generator_output_og_clkout, ClockControl::power_off());
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clock_generator.set_ms_frequency(clkout_select, portapack::persistent_memory::clkout_freq() * 128000, si5351_vco_f, 7);
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} else {
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clock_generator.set_ms_frequency(clkout_select, portapack::persistent_memory::clkout_freq() * 1000, si5351_vco_f, 0);
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}
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auto si5351_clock_control_common = hackrf_r9 ? si5351a_clock_control_common : si5351c_clock_control_common;
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const auto ref_pll = hackrf_r9 ? ClockControl::MultiSynthSource::PLLA : get_si5351c_reference_clock_generator_pll(reference.source);
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clock_generator.set_clock_control(clkout_select, si5351_clock_control_common[clkout_select].ms_src(ref_pll).clk_pdn(ClockControl::ClockPowerDown::Power_On));
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} else {
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clock_generator.disable_output(clkout_select);
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clock_generator.set_clock_control(clkout_select, ClockControl::power_off());
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}
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}
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}
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@ -68,6 +68,7 @@ constexpr size_t clock_generator_output_og_mcu_clkin = 7;
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constexpr size_t clock_generator_output_r9_if = 0;
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constexpr size_t clock_generator_output_r9_if = 0;
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constexpr size_t clock_generator_output_r9_sgpio = 1;
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constexpr size_t clock_generator_output_r9_sgpio = 1;
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constexpr size_t clock_generator_output_r9_clkout = 2;
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constexpr size_t clock_generator_output_r9_mcu_clkin = 2;
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constexpr size_t clock_generator_output_r9_mcu_clkin = 2;
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/* ADC0 */
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/* ADC0 */
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