From 8655027a5ba428dd47b6297bf556d989a792c321 Mon Sep 17 00:00:00 2001
From: Mark Thompson <129641948+NotherNgineer@users.noreply.github.com>
Date: Sat, 18 Nov 2023 09:50:57 -0600
Subject: [PATCH] Fixed SPI Read timing issue affecting MAX283x chips (#1590)

* Slowed SPI timing to MAX283x by 20%

* Fix temperature scaling
---
 firmware/application/hw/max2837.cpp | 2 +-
 firmware/application/hw/max2839.cpp | 2 +-
 firmware/application/radio.cpp      | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/firmware/application/hw/max2837.cpp b/firmware/application/hw/max2837.cpp
index f6fe277e..c2259c27 100644
--- a/firmware/application/hw/max2837.cpp
+++ b/firmware/application/hw/max2837.cpp
@@ -342,7 +342,7 @@ int8_t MAX2837::temp_sense() {
     _map.r.rx_top.ts_adc_trigger = 0;
     flush_one(Register::RX_TOP);
 
-    return value * 4.31 - 6;  // reg value is 0 to 31; possible return range is -6 C to 127 C
+    return std::min(127, (int)(value * 4.31 - 40));  // reg value is 0 to 31; possible return range is -40 C to 127 C
 }
 
 }  // namespace max2837
diff --git a/firmware/application/hw/max2839.cpp b/firmware/application/hw/max2839.cpp
index bc37073e..1b4bc8c2 100644
--- a/firmware/application/hw/max2839.cpp
+++ b/firmware/application/hw/max2839.cpp
@@ -372,7 +372,7 @@ int8_t MAX2839::temp_sense() {
     _map.r.rx_top_2.ts_adc_trigger = 0;
     flush_one(Register::RX_TOP_2);
 
-    return value * 4.31 - 75;  // reg value is 0 to 31; possible return range is -75 C to 58 C
+    return std::min(127, (int)(value * 4.31 - 40));  // reg value is 0 to 31; possible return range is -40 C to 127 C
 }
 
 }  // namespace max2839
\ No newline at end of file
diff --git a/firmware/application/radio.cpp b/firmware/application/radio.cpp
index a81a9dc7..6e9c1941 100644
--- a/firmware/application/radio.cpp
+++ b/firmware/application/radio.cpp
@@ -61,7 +61,7 @@ static constexpr SPIConfig ssp_config_max283x = {
     .ssport = gpio_max283x_select.port(),
     .sspad = gpio_max283x_select.pad(),
     .cr0 =
-        CR0_CLOCKRATE(ssp_scr(ssp1_pclk_f, ssp1_cpsr, max283x_spi_f)) | CR0_FRFSPI | CR0_DSS16BIT,
+        CR0_CLOCKRATE(ssp_scr(ssp1_pclk_f, ssp1_cpsr, max283x_spi_f) + 1) | CR0_FRFSPI | CR0_DSS16BIT,
     .cpsr = ssp1_cpsr,
 };