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removed need for cpld mode setup for QFP100

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This commit is contained in:
bernd-herzog 2023-05-05 11:15:49 +02:00
parent 9b263def37
commit 75718c79b9
3 changed files with 52 additions and 13 deletions
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14
firmware/application/portapack.cpp
View File

@ -489,14 +489,22 @@ bool init() {
chThdSleepMilliseconds(10);
if( !portapack::cpld::update_if_necessary(portapack_cpld_config()) ) {
auto pp_config = portapack_cpld_config();
auto cpld_update_possible = portapack::cpld::update_possible(); //QFP100 CPLD fails this check. skip CPLD update
auto cpld_update_necessary = cpld_update_possible && portapack::cpld::update_necessary(pp_config);
if ( cpld_update_necessary ) {
auto ok = portapack::cpld::update(pp_config);
if( !ok ) {
chThdSleepMilliseconds(10);
// If using a "2021/12 QFP100", press and hold the left button while booting. Should only need to do once.
if (load_config() != 3 && load_config() != 4){
// Mode left (R1) and right (R2,H2,H2+) bypass going into hackrf mode after failing CPLD update
// Mode center (autodetect), up (R1) and down (R2,H2,H2) will go into hackrf mode after failing CPLD update
if (load_config() != 3 /* left */ && load_config() != 4 /* right */){
shutdown_base();
return false;
}
}
}
if( !hackrf::cpld::load_sram() ) {
chSysHalt();

37
firmware/common/cpld_update.cpp
View File

@ -33,9 +33,7 @@
namespace portapack {
namespace cpld {
bool update_if_necessary(
const Config config
) {
bool update_possible() {
jtag::GPIOTarget target {
portapack::gpio_cpld_tck,
portapack::gpio_cpld_tms,
@ -65,13 +63,40 @@ bool update_if_necessary(
return false;
}
return true;
}
bool update_necessary(
const Config config
) {
jtag::GPIOTarget target {
portapack::gpio_cpld_tck,
portapack::gpio_cpld_tms,
portapack::gpio_cpld_tdi,
portapack::gpio_cpld_tdo
};
jtag::JTAG jtag { target };
CPLD cpld { jtag };
/* Verify CPLD contents against current bitstream. */
auto ok = cpld.verify(config.block_0, config.block_1);
return !ok;
}
bool update(
const Config config
) {
jtag::GPIOTarget target {
portapack::gpio_cpld_tck,
portapack::gpio_cpld_tms,
portapack::gpio_cpld_tdi,
portapack::gpio_cpld_tdo
};
jtag::JTAG jtag { target };
CPLD cpld { jtag };
/* CPLD verifies incorrectly. Erase and program with current bitstream. */
if( !ok ) {
ok = cpld.program(config.block_0, config.block_1);
}
auto ok = cpld.program(config.block_0, config.block_1);
/* If programming OK, reset CPLD to user mode. Otherwise leave it in
* passive (ISP) state.

8
firmware/common/cpld_update.hpp
View File

@ -27,7 +27,13 @@
namespace portapack {
namespace cpld {
bool update_if_necessary(
bool update_possible();
bool update_necessary(
const Config config
);
bool update(
const Config config
);