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Adding support for HackRF One R9, as per https://github.com/sharebrained/portapack-hackrf/pull/187

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This commit is contained in:
phil-stumpy 2023-02-16 12:09:23 +00:00
parent 7e20cea6d7
commit 66ba6442b1
35 changed files with 2001 additions and 464 deletions
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23
firmware/application/portapack.cpp
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@ -381,8 +381,9 @@ static void shutdown_base() {
*
* PLL0USB = powered down
* PLL0AUDIO = GP_CLKIN, Fcco=491.52 MHz, Fout=12.288 MHz
* PLL1 = GP_CLKIN * 10 = 200 MHz
*
* PLL1 =
* OG: GP_CLKIN * 10 = 200 MHz
* r9: GP_CLKIN * 20 = 200 MHz
* IDIVA = IRC / 1 = 12 MHz
* IDIVB = PLL1 / 2 = 100 MHz
* IDIVC = PLL1 / 1 = 200 MHz
@ -432,9 +433,14 @@ bool init() {
*/
/* Step into the 90-110MHz M4 clock range */
/* Fclkin = 40M
* /N=2 = 20M = PFDin
* Fcco = PFDin * (M=10) = 200M
/* OG:
* Fclkin = 40M
* /N=2 = 20M = PFDin
* Fcco = PFDin * (M=10) = 200M
* r9:
* Fclkin = 10M
* /N=1 = 10M = PFDin
* Fcco = PFDin * (M=20) = 200M
* Fclk = Fcco / (2*(P=1)) = 100M
*/
cgu::pll1::ctrl({
@ -444,8 +450,8 @@ bool init() {
.direct = 0,
.psel = 0,
.autoblock = 1,
.nsel = 1,
.msel = 9,
.nsel = hackrf_r9 ? 0UL : 1UL,
.msel = hackrf_r9 ? 19UL : 9UL,
.clk_sel = cgu::CLK_SEL::GP_CLKIN,
});
@ -474,8 +480,7 @@ bool init() {
chThdSleepMilliseconds(10);
clock_manager.set_reference_ppb(persistent_memory::correction_ppb());
clock_manager.enable_first_if_clock();
clock_manager.enable_second_if_clock();
clock_manager.enable_if_clocks();
clock_manager.enable_codec_clocks();
radio::init();