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Usb serial (#1648)

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* enabled usb clock
* added usb stack to application
* fixed pll0usb clock setup
* implemented serial usb handshake
* implemented serial communication
* integrated chibios shell
* implemented device reset
* implemented enter dfu mode
* implemented hackrf mode command
* implemented flash command
* implemented memory manipulation
* implemented button control
* fixed mode change
* improved reset behavior
* implemented directory commands
* implemented file commands
* improved data communication
* refactorings
This commit is contained in:
Bernd Herzog 2023-12-17 17:20:35 +01:00 • committed by GitHub
parent 2ccda5aebd
commit 6069145b68
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GPG key ID: 4AEE18F83AFDEB23
30 changed files with 1894 additions and 8 deletions
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97
firmware/application/usb_serial.cpp Normal file
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extern "C" {
#include "usb_serial_io.h"
#include "usb_serial_cdc.h"
}
#include "usb_serial_shell.hpp"
#include "usb_serial.hpp"
#include "portapack.hpp"
#include <libopencm3/cm3/common.h>
#include <libopencm3/lpc43xx/usb.h>
namespace portapack {
void USBSerial::initialize() {
enable_xtal();
disable_pll0();
setup_pll0();
enable_pll0();
setup_usb_clock();
setup_usb_serial_controller();
init_serial_usb_driver(&SUSBD1);
shellInit();
}
void USBSerial::dispatch() {
if (!connected)
return;
if (shell_created == false) {
shell_created = true;
create_shell();
}
bulk_out_receive();
}
void USBSerial::on_channel_opened() {
connected = true;
}
void USBSerial::on_channel_closed() {
connected = false;
}
void USBSerial::enable_xtal() {
LPC_CGU->XTAL_OSC_CTRL.ENABLE = 0;
LPC_CGU->XTAL_OSC_CTRL.HF = 0;
}
void USBSerial::disable_pll0() {
LPC_CGU->PLL0USB_CTRL.PD = 1;
LPC_CGU->PLL0USB_CTRL.AUTOBLOCK = 1;
LPC_CGU->PLL0USB_CTRL.BYPASS = 0;
LPC_CGU->PLL0USB_CTRL.DIRECTI = 0;
LPC_CGU->PLL0USB_CTRL.DIRECTO = 0;
LPC_CGU->PLL0USB_CTRL.CLKEN = 0;
LPC_CGU->PLL0USB_CTRL.FRM = 0;
LPC_CGU->PLL0USB_CTRL.CLK_SEL = 0x06; // 12MHz internal XTAL
}
void USBSerial::setup_pll0() {
/* use XTAL_OSC as clock source for PLL0USB */
while (LPC_CGU->PLL0USB_STAT.LOCK) {
}
// /* configure PLL0USB to produce 480 MHz clock from 12 MHz XTAL_OSC */
// /* Values from User Manual v1.4 Table 94, for 12MHz oscillator. */
LPC_CGU->PLL0USB_MDIV = 0x06167FFA;
LPC_CGU->PLL0USB_NP_DIV = 0x00302062;
LPC_CGU->PLL0USB_CTRL.PD = 1;
LPC_CGU->PLL0USB_CTRL.DIRECTI = 1;
LPC_CGU->PLL0USB_CTRL.DIRECTO = 1;
LPC_CGU->PLL0USB_CTRL.CLKEN = 1;
}
void USBSerial::enable_pll0() {
// /* power on PLL0USB and wait until stable */
LPC_CGU->PLL0USB_CTRL.PD = 0;
while (!LPC_CGU->PLL0USB_STAT.LOCK) {
}
}
void USBSerial::setup_usb_clock() {
/* use PLL0USB as clock source for USB0 */
LPC_CGU->BASE_USB0_CLK.AUTOBLOCK = 1;
LPC_CGU->BASE_USB0_CLK.CLK_SEL = 0x07;
LPC_CGU->BASE_USB0_CLK.PD = 0;
}
} // namespace portapack