diff --git a/hardware/portapack_h1/README b/hardware/portapack_h1/README
new file mode 100644
index 00000000..ad014e67
--- /dev/null
+++ b/hardware/portapack_h1/README
@@ -0,0 +1,55 @@
+PortaPack H1 is portability add-on hardware for the HackRF One
+software-defined radio (SDR).
+
+Schematic
+=========
+
+The schematic was drawn using KiCad.
+
+Schematic symbols are cached in the design files, but are also
+available in a separate repository:
+
+	https://github.com/sharebrained/library-kicad/
+
+PCB
+===
+
+The circuit board was designed using KiCad.
+
+PCB footprints are cached in the design files, but are also
+avaliable in a separate repository:
+
+	https://github.com/sharebrained/library-kicad/
+	
+The PCB is a four-layer design. Services such as OSHPark.com have suitable
+four-layer stack ups.
+
+CPLD
+====
+
+The CPLD bitstream is prepared using Altera Quartus tools.
+
+The CPLD is programmed from within the PortaPack firmware, by bit-banging
+the JTAG pins from the HackRF One's microcontroller.
+
+License
+=======
+
+Copyright (C) 2013, 2014, 2015 Jared Boone, ShareBrained Technology, Inc.
+
+These files are part of PortaPack.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, Inc., 51 Franklin Street,
+Boston, MA 02110-1301, USA.
diff --git a/hardware/portapack_h1/audio.sch b/hardware/portapack_h1/audio.sch
new file mode 100644
index 00000000..eb7ac18e
--- /dev/null
+++ b/hardware/portapack_h1/audio.sch
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+EESchema Schematic File Version 2
+LIBS:hackrf_expansion
+LIBS:wolfson
+LIBS:passive
+LIBS:lcd_kingtech
+LIBS:power
+LIBS:io_expander
+LIBS:trs_jack
+LIBS:battery
+LIBS:mosfet
+LIBS:microphone
+LIBS:sd
+LIBS:ck
+LIBS:altera
+LIBS:regulator
+LIBS:tp
+LIBS:header
+LIBS:hole
+LIBS:sharebrained
+LIBS:fiducial
+LIBS:portapack_h1-cache
+EELAYER 24 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 2 4
+Title "PortaPack H1"
+Date "13 Oct 2014"
+Rev "20140826"
+Comp "ShareBrained Technology, Inc."
+Comment1 "Copyright © 2014 Jared Boone"
+Comment2 "License: GNU General Public License, version 2"
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+$Comp
+L +3.3V #PWR035
+U 1 1 53BC2346
+P 3500 3300
+F 0 "#PWR035" H 3500 3260 30  0001 C CNN
+F 1 "+3.3V" H 3500 3410 30  0000 C CNN
+F 2 "" H 3500 3300 60  0000 C CNN
+F 3 "" H 3500 3300 60  0000 C CNN
+	1    3500 3300
+	0    1    1    0   
+$EndComp
+$Comp
+L +3.3V #PWR036
+U 1 1 53BC2351
+P 1800 3200
+F 0 "#PWR036" H 1800 3160 30  0001 C CNN
+F 1 "+3.3V" H 1800 3310 30  0000 C CNN
+F 2 "" H 1800 3200 60  0000 C CNN
+F 3 "" H 1800 3200 60  0000 C CNN
+	1    1800 3200
+	0    -1   -1   0   
+$EndComp
+$Comp
+L +3.3V #PWR037
+U 1 1 53BC235C
+P 1800 3900
+F 0 "#PWR037" H 1800 3860 30  0001 C CNN
+F 1 "+3.3V" H 1800 4010 30  0000 C CNN
+F 2 "" H 1800 3900 60  0000 C CNN
+F 3 "" H 1800 3900 60  0000 C CNN
+	1    1800 3900
+	0    -1   -1   0   
+$EndComp
+$Comp
+L +3.3V #PWR038
+U 1 1 53BC2367
+P 1800 4500
+F 0 "#PWR038" H 1800 4460 30  0001 C CNN
+F 1 "+3.3V" H 1800 4610 30  0000 C CNN
+F 2 "" H 1800 4500 60  0000 C CNN
+F 3 "" H 1800 4500 60  0000 C CNN
+	1    1800 4500
+	0    -1   -1   0   
+$EndComp
+$EndSCHEMATC
diff --git a/hardware/portapack_h1/cpld/portapack_h1_cpld.qpf b/hardware/portapack_h1/cpld/portapack_h1_cpld.qpf
new file mode 100644
index 00000000..0ced0c84
--- /dev/null
+++ b/hardware/portapack_h1/cpld/portapack_h1_cpld.qpf
@@ -0,0 +1,30 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2014 Altera Corporation
+# Your use of Altera Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Altera Program License 
+# Subscription Agreement, Altera MegaCore Function License 
+# Agreement, or other applicable license agreement, including, 
+# without limitation, that your use is for the sole purpose of 
+# programming logic devices manufactured by Altera and sold by 
+# Altera or its authorized distributors.  Please refer to the 
+# applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus II 32-bit
+# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
+# Date created = 21:24:55  April 29, 2014
+#
+# -------------------------------------------------------------------------- #
+
+QUARTUS_VERSION = "13.1"
+DATE = "21:24:55  April 29, 2014"
+
+# Revisions
+
+PROJECT_REVISION = "portapack_h1_cpld"
diff --git a/hardware/portapack_h1/cpld/portapack_h1_cpld.qsf b/hardware/portapack_h1/cpld/portapack_h1_cpld.qsf
new file mode 100644
index 00000000..0af980ab
--- /dev/null
+++ b/hardware/portapack_h1/cpld/portapack_h1_cpld.qsf
@@ -0,0 +1,288 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2014 Altera Corporation
+# Your use of Altera Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Altera Program License 
+# Subscription Agreement, Altera MegaCore Function License 
+# Agreement, or other applicable license agreement, including, 
+# without limitation, that your use is for the sole purpose of 
+# programming logic devices manufactured by Altera and sold by 
+# Altera or its authorized distributors.  Please refer to the 
+# applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus II 32-bit
+# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
+# Date created = 21:24:55  April 29, 2014
+#
+# -------------------------------------------------------------------------- #
+#
+# Notes:
+#
+# 1) The default values for assignments are stored in the file:
+#		portapack_h1_cpld_assignment_defaults.qdf
+#    If this file doesn't exist, see file:
+#		assignment_defaults.qdf
+#
+# 2) Altera recommends that you do not modify this file. This
+#    file is updated automatically by the Quartus II software
+#    and any changes you make may be lost or overwritten.
+#
+# -------------------------------------------------------------------------- #
+
+
+set_global_assignment -name FAMILY "MAX V"
+set_global_assignment -name DEVICE 5M40ZE64C5
+set_global_assignment -name TOP_LEVEL_ENTITY top
+set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1
+set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:24:55  APRIL 29, 2014"
+set_global_assignment -name LAST_QUARTUS_VERSION 14.1.0
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+set_global_assignment -name DEVICE_FILTER_PACKAGE EQFP
+set_global_assignment -name DEVICE_FILTER_PIN_COUNT 64
+set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
+set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
+set_global_assignment -name EDA_NETLIST_WRITER_OUTPUT_DIR simulation/modelsim -section_id eda_simulation
+set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
+set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008
+set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF
+set_global_assignment -name SDC_FILE portapack_h1_cpld.sdc
+set_global_assignment -name VHDL_FILE top.vhd
+set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVCMOS"
+set_location_assignment PIN_46 -to LCD_DB[15]
+set_location_assignment PIN_47 -to LCD_DB[14]
+set_location_assignment PIN_48 -to LCD_DB[13]
+set_location_assignment PIN_49 -to LCD_DB[12]
+set_location_assignment PIN_50 -to LCD_DB[11]
+set_location_assignment PIN_51 -to LCD_DB[10]
+set_location_assignment PIN_52 -to LCD_DB[9]
+set_location_assignment PIN_53 -to LCD_DB[8]
+set_location_assignment PIN_54 -to LCD_DB[7]
+set_location_assignment PIN_55 -to LCD_DB[6]
+set_location_assignment PIN_56 -to LCD_DB[5]
+set_location_assignment PIN_58 -to LCD_DB[4]
+set_location_assignment PIN_59 -to LCD_DB[3]
+set_location_assignment PIN_60 -to LCD_DB[2]
+set_location_assignment PIN_61 -to LCD_DB[1]
+set_location_assignment PIN_62 -to LCD_DB[0]
+set_location_assignment PIN_44 -to LCD_RDX
+set_location_assignment PIN_43 -to LCD_RS
+set_location_assignment PIN_63 -to LCD_TE
+set_location_assignment PIN_45 -to LCD_WRX
+set_location_assignment PIN_10 -to SW_D
+set_location_assignment PIN_28 -to SW_L
+set_location_assignment PIN_9 -to SW_R
+set_location_assignment PIN_11 -to SW_ROT_A
+set_location_assignment PIN_12 -to SW_ROT_B
+set_location_assignment PIN_13 -to SW_SEL
+set_location_assignment PIN_25 -to SW_U
+set_location_assignment PIN_1 -to TP_D
+set_location_assignment PIN_2 -to TP_L
+set_location_assignment PIN_64 -to TP_R
+set_location_assignment PIN_3 -to TP_U
+set_instance_assignment -name IO_STANDARD "3.3V SCHMITT TRIGGER INPUT" -to SW_D
+set_instance_assignment -name IO_STANDARD "3.3V SCHMITT TRIGGER INPUT" -to SW_L
+set_instance_assignment -name IO_STANDARD "3.3V SCHMITT TRIGGER INPUT" -to SW_R
+set_instance_assignment -name IO_STANDARD "3.3V SCHMITT TRIGGER INPUT" -to SW_ROT_A
+set_instance_assignment -name IO_STANDARD "3.3V SCHMITT TRIGGER INPUT" -to SW_ROT_B
+set_instance_assignment -name IO_STANDARD "3.3V SCHMITT TRIGGER INPUT" -to SW_SEL
+set_instance_assignment -name IO_STANDARD "3.3V SCHMITT TRIGGER INPUT" -to SW_U
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to TP_D
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to TP_L
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to TP_R
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to TP_U
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[15]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[14]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[13]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[12]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[11]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[10]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[9]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[8]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[7]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[6]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[5]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[4]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[3]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[2]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[1]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_DB[0]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_RDX
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_RS
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_TE
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_WRX
+set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS TEST_BENCH_MODE -section_id eda_simulation
+set_global_assignment -name EDA_NATIVELINK_SIMULATION_TEST_BENCH top_tb -section_id eda_simulation
+set_global_assignment -name EDA_TEST_BENCH_NAME top_tb -section_id eda_simulation
+set_global_assignment -name EDA_DESIGN_INSTANCE_NAME uut -section_id top_tb
+set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME top_tb -section_id top_tb
+set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
+set_global_assignment -name EDA_TEST_BENCH_RUN_SIM_FOR "500 ns" -section_id top_tb
+set_global_assignment -name EDA_TEST_BENCH_FILE top_tb.vhd -section_id top_tb
+set_global_assignment -name EDA_BOARD_DESIGN_BOUNDARY_SCAN_TOOL "BSDL (Boundary Scan)"
+set_global_assignment -name EDA_NETLIST_WRITER_OUTPUT_DIR /home/jboone/src/portapack/portapack_hackrf/hardware/portapack_h1/cpld -section_id eda_board_design_boundary_scan
+set_global_assignment -name EDA_BOARD_BOUNDARY_SCAN_OPERATION POST_CONFIG -section_id eda_board_design_boundary_scan
+set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF
+set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
+set_global_assignment -name ENABLE_NCE_PIN OFF
+set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
+set_global_assignment -name USE_CONFIGURATION_DEVICE ON
+set_global_assignment -name GENERATE_RBF_FILE OFF
+set_global_assignment -name GENERATE_SVF_FILE ON
+set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED WITH BUS-HOLD"
+set_location_assignment PIN_38 -to LCD_RESETX
+set_instance_assignment -name IO_STANDARD "1.8 V" -to LCD_RESETX
+set_location_assignment PIN_18 -to MCU_D[7]
+set_location_assignment PIN_19 -to MCU_D[6]
+set_location_assignment PIN_21 -to MCU_D[5]
+set_location_assignment PIN_20 -to MCU_D[4]
+set_location_assignment PIN_22 -to MCU_D[3]
+set_location_assignment PIN_24 -to MCU_D[2]
+set_location_assignment PIN_27 -to MCU_D[1]
+set_location_assignment PIN_26 -to MCU_D[0]
+set_location_assignment PIN_33 -to MCU_ADDR
+set_location_assignment PIN_42 -to MCU_DIR
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_ADDR
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_D[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_D[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_D[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_D[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_D[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_D[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_D[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_D[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_DIR
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SW_D
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SW_L
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SW_R
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SW_U
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SW_ROT_B
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SW_SEL
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SW_ROT_A
+set_location_assignment PIN_31 -to MCU_ROT_A
+set_location_assignment PIN_30 -to MCU_ROT_B
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_ROT_A
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_ROT_B
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[15]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[14]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[13]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[12]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[11]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[10]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[9]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[8]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[7]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[6]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_DB[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_RDX
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_RESETX
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_RS
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_TE
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_WRX
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_ADDR
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_D[7]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_D[6]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_D[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_D[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_D[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_D[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_D[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_D[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_DIR
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_ROT_A
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_ROT_B
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to SW_D
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to SW_L
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to SW_R
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to SW_ROT_A
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to SW_ROT_B
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to SW_SEL
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to SW_U
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to TP_D
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to TP_L
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to TP_R
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to TP_U
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[15]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[14]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[13]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[12]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[11]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[10]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[9]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[8]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[7]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[6]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[5]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[4]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[3]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[2]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[1]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_DB[0]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_RDX
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_RESETX
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_RS
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_TE
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_WRX
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_ADDR
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_D[7]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_D[6]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_D[5]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_D[4]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_D[3]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_D[2]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_D[1]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_D[0]
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_DIR
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_ROT_A
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_ROT_B
+set_instance_assignment -name SLOW_SLEW_RATE ON -to SW_D
+set_instance_assignment -name SLOW_SLEW_RATE ON -to SW_L
+set_instance_assignment -name SLOW_SLEW_RATE ON -to SW_R
+set_instance_assignment -name SLOW_SLEW_RATE ON -to SW_ROT_A
+set_instance_assignment -name SLOW_SLEW_RATE ON -to SW_ROT_B
+set_instance_assignment -name SLOW_SLEW_RATE ON -to SW_SEL
+set_instance_assignment -name SLOW_SLEW_RATE ON -to SW_U
+set_instance_assignment -name SLOW_SLEW_RATE ON -to TP_D
+set_instance_assignment -name SLOW_SLEW_RATE ON -to TP_L
+set_instance_assignment -name SLOW_SLEW_RATE ON -to TP_R
+set_instance_assignment -name SLOW_SLEW_RATE ON -to TP_U
+set_global_assignment -name ENABLE_DEVICE_WIDE_RESET ON
+set_global_assignment -name IOBANK_VCCIO 1.8V -section_id 2
+set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 1
+set_instance_assignment -name PCI_IO OFF -to MCU_DIR
+set_global_assignment -name ALLOW_LVTTL_LVCMOS_INPUT_LEVELS_TO_OVERDRIVE_INPUT_BUFFER ON
+set_location_assignment PIN_4 -to LCD_BACKLIGHT
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to LCD_BACKLIGHT
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to LCD_BACKLIGHT
+set_instance_assignment -name SLOW_SLEW_RATE ON -to LCD_BACKLIGHT
+set_instance_assignment -name PCI_IO OFF -to LCD_BACKLIGHT
+set_location_assignment PIN_34 -to MCU_LCD_RD
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_LCD_RD
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_LCD_RD
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_LCD_RD
+set_instance_assignment -name PCI_IO OFF -to MCU_LCD_RD
+set_location_assignment PIN_40 -to MCU_LCD_WR
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_LCD_WR
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_LCD_WR
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_LCD_WR
+set_instance_assignment -name PCI_IO OFF -to MCU_LCD_WR
+set_location_assignment PIN_32 -to MCU_IO_STBX
+set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MCU_IO_STBX
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to MCU_IO_STBX
+set_instance_assignment -name SLOW_SLEW_RATE ON -to MCU_IO_STBX
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to TP_R
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to TP_D
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to TP_L
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to TP_U
\ No newline at end of file
diff --git a/hardware/portapack_h1/cpld/portapack_h1_cpld.sdc b/hardware/portapack_h1/cpld/portapack_h1_cpld.sdc
new file mode 100644
index 00000000..9c05af2a
--- /dev/null
+++ b/hardware/portapack_h1/cpld/portapack_h1_cpld.sdc
@@ -0,0 +1,116 @@
+## Generated SDC file "portapack_hackrf_one_cpld.sdc"
+
+## Copyright (C) 1991-2014 Altera Corporation
+## Your use of Altera Corporation's design tools, logic functions 
+## and other software and tools, and its AMPP partner logic 
+## functions, and any output files from any of the foregoing 
+## (including device programming or simulation files), and any 
+## associated documentation or information are expressly subject 
+## to the terms and conditions of the Altera Program License 
+## Subscription Agreement, Altera MegaCore Function License 
+## Agreement, or other applicable license agreement, including, 
+## without limitation, that your use is for the sole purpose of 
+## programming logic devices manufactured by Altera and sold by 
+## Altera or its authorized distributors.  Please refer to the 
+## applicable agreement for further details.
+
+
+## VENDOR  "Altera"
+## PROGRAM "Quartus II"
+## VERSION "Version 13.1.4 Build 182 03/12/2014 SJ Web Edition"
+
+## DATE    "Sat May  3 10:22:18 2014"
+
+##
+## DEVICE  "5M40ZE64C5"
+##
+
+# RS = 0, D = DB[15:8]
+#		wait max(tast = 0 ns, CPLD setup = ?)
+# WR = 0, D = DB[7:0]
+#		wait max(CPLD )
+
+#**************************************************************
+# Time Information
+#**************************************************************
+
+set_time_format -unit ns -decimal_places 3
+
+set mcu_clk_period 4.9
+
+set lcd_data_wr_setup 10.0
+set lcd_data_wr_hold 10.0
+
+#**************************************************************
+# Create Clock
+#**************************************************************
+
+create_clock -name {MCU_STROBE} -period 66.000 -waveform { 0.000 33.000 } [get_ports {MCU_STROBE}]
+#create_clock -name strobe_virt -period 66.000
+
+#**************************************************************
+# Create Generated Clock
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Clock Latency
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Clock Uncertainty
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Input Delay
+#**************************************************************
+
+#set_input_delay -clock strobe_virt [get_ports {D[*]}]
+
+#**************************************************************
+# Set Output Delay
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Clock Groups
+#**************************************************************
+
+
+
+#**************************************************************
+# Set False Path
+#**************************************************************
+
+set_false_path -from [get_clocks {MCU_STROBE}] -to [get_ports {TP_D TP_L TP_R TP_U}]
+set_false_path -from [get_ports {SW_D SW_L SW_R SW_ROT_A SW_ROT_B SW_SEL SW_U}] -to [get_ports {MCU_D[*]}]
+
+
+#**************************************************************
+# Set Multicycle Path
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Maximum Delay
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Minimum Delay
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Input Transition
+#**************************************************************
+
diff --git a/hardware/portapack_h1/cpld/top.vhd b/hardware/portapack_h1/cpld/top.vhd
new file mode 100644
index 00000000..57554bd6
--- /dev/null
+++ b/hardware/portapack_h1/cpld/top.vhd
@@ -0,0 +1,170 @@
+--
+-- Copyright (C) 2012 Jared Boone, ShareBrained Technology, Inc.
+--
+-- This file is part of PortaPack.
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2, or (at your option)
+-- any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; see the file COPYING.  If not, write to
+-- the Free Software Foundation, Inc., 51 Franklin Street,
+-- Boston, MA 02110-1301, USA.
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity top is
+	port (
+		MCU_D				:	inout	std_logic_vector(7 downto 0);
+		MCU_DIR			:	in		std_logic;
+		MCU_IO_STBX		:	in		std_logic;
+		MCU_LCD_WR		:	in		std_logic;
+		MCU_ADDR			:	in		std_logic;
+		MCU_ROT_A		:	out	std_logic;
+		MCU_ROT_B		:	out	std_logic;
+		MCU_LCD_RD	:	in		std_logic;
+		
+		TP_U				:	out	std_logic;
+		TP_D				:	out	std_logic;
+		TP_L				:	out	std_logic;
+		TP_R				:	out	std_logic;
+		
+		SW_SEL			:	in		std_logic;
+		SW_ROT_A			:	in		std_logic;
+		SW_ROT_B			:	in		std_logic;
+		SW_U				:	in		std_logic;
+		SW_D				:	in		std_logic;
+		SW_L				:	in		std_logic;
+		SW_R				:	in		std_logic;
+		
+		LCD_RESETX		:	out	std_logic;
+		LCD_RS			:	out	std_logic;
+		LCD_WRX			:	out	std_logic;
+		LCD_RDX			:	out	std_logic;
+		LCD_DB			:	inout	std_logic_vector(15 downto 0);
+		LCD_TE			:	in		std_logic;
+		LCD_BACKLIGHT	:	out	std_logic
+	);
+end top;
+
+architecture rtl of top is
+
+	signal	switches : std_logic_vector(7 downto 0);
+	
+	type data_direction_t is (from_mcu, to_mcu);
+	signal	data_dir	: data_direction_t;
+	
+	signal	mcu_data_out_lcd : std_logic_vector(7 downto 0);
+	signal	mcu_data_out_io : std_logic_vector(7 downto 0);
+	signal	mcu_data_out : std_logic_vector(7 downto 0);
+	signal	mcu_data_in	: std_logic_vector(7 downto 0);
+	
+	signal	lcd_data_in : std_logic_vector(15 downto 0);
+	signal  lcd_data_in_mux : std_logic_vector(7 downto 0);
+	signal	lcd_data_out : std_logic_vector(15 downto 0);
+	
+	signal  lcd_data_in_q : std_logic_vector(7 downto 0) := (others => '0');
+	signal  lcd_data_out_q : std_logic_vector(7 downto 0) := (others => '0');
+	
+	signal	tp_q : std_logic_vector(7 downto 0) := (others => '0');
+	
+	signal	lcd_reset_q : std_logic := '1';
+	signal	lcd_backlight_q : std_logic := '0';
+	
+	signal	dir_read : boolean;
+	signal	dir_write : boolean;
+	
+	signal	lcd_read_strobe : boolean;
+	signal	lcd_write_strobe : boolean;
+	signal	lcd_write : boolean;
+
+	signal	io_strobe : boolean;
+	signal	io_read_strobe : boolean;
+	signal	io_write_strobe : boolean;
+	
+begin
+
+	-- I/O data
+	switches <= LCD_TE & not SW_ROT_B & not SW_ROT_A & not SW_SEL & not SW_U & not SW_D & not SW_L & not SW_R;
+
+	TP_U <= tp_q(3) when tp_q(7) = '1' else 'Z';
+	TP_D <= tp_q(2) when tp_q(6) = '1' else 'Z';
+	TP_L <= tp_q(1) when tp_q(5) = '1' else 'Z';
+	TP_R <= tp_q(0) when tp_q(4) = '1' else 'Z';
+	
+	LCD_BACKLIGHT <= lcd_backlight_q;
+	
+	MCU_ROT_A <= LCD_TE;	-- not SW_ROT_A;
+	MCU_ROT_B <= '0';		-- not SW_ROT_B;
+	
+	-- State management
+	data_dir <= to_mcu when MCU_DIR = '1' else from_mcu;
+	dir_read <= (data_dir = to_mcu);
+	dir_write <= (data_dir = from_mcu);
+
+	io_strobe <= (MCU_IO_STBX = '0');
+	io_read_strobe <= io_strobe and dir_read;
+	io_write_strobe <= io_strobe and dir_write;
+
+	lcd_read_strobe <= (MCU_LCD_RD = '1');
+	lcd_write_strobe <= (MCU_LCD_WR = '1');
+	lcd_write <= not lcd_read_strobe;
+
+	-- LCD interface
+	LCD_RS <= MCU_ADDR;
+	LCD_RDX <= not MCU_LCD_RD;
+	LCD_WRX <= not MCU_LCD_WR;
+
+	lcd_data_out <= lcd_data_out_q & mcu_data_in;
+	lcd_data_in <= LCD_DB;
+	LCD_DB <= lcd_data_out when lcd_write else (others => 'Z');
+	
+	LCD_RESETX <= not lcd_reset_q;
+	
+	-- MCU interface
+	mcu_data_out_lcd <= lcd_data_in(15 downto 8) when lcd_read_strobe else lcd_data_in_q;
+	mcu_data_out_io <= switches;
+	mcu_data_out <= mcu_data_out_io when io_read_strobe else mcu_data_out_lcd;
+
+	mcu_data_in <= MCU_D;
+	MCU_D <= mcu_data_out when dir_read else (others => 'Z');
+	
+	-- Synchronous behaviors:
+	-- LCD write: Capture LCD high byte on LCD_WRX falling edge.
+	process(MCU_LCD_WR, mcu_data_in)
+	begin
+		if rising_edge(MCU_LCD_WR) then
+			lcd_data_out_q <= mcu_data_in;
+		end if;
+	end process;
+	
+	-- LCD read: Capture LCD low byte on LCD_RD falling edge.
+	process(MCU_LCD_RD, lcd_data_in)
+	begin
+		if falling_edge(MCU_LCD_RD) then
+			lcd_data_in_q <= lcd_data_in(7 downto 0);
+		end if;
+	end process;
+	
+	-- I/O write (to resistive touch panel): Capture data from
+	-- MCU and hold on TP pins until further notice.
+	process(MCU_IO_STBX, dir_write, mcu_data_in, MCU_ADDR)
+	begin
+		if rising_edge(MCU_IO_STBX) and dir_write then
+			if MCU_ADDR = '0' then
+				tp_q <= mcu_data_in;
+			else
+				lcd_reset_q <= mcu_data_in(0);
+				lcd_backlight_q <= mcu_data_in(7);
+			end if;
+		end if;
+	end process;
+end rtl;
diff --git a/hardware/portapack_h1/cpld/top_tb.vhd b/hardware/portapack_h1/cpld/top_tb.vhd
new file mode 100644
index 00000000..533c1108
--- /dev/null
+++ b/hardware/portapack_h1/cpld/top_tb.vhd
@@ -0,0 +1,185 @@
+--
+-- Copyright (C) 2012 Jared Boone, ShareBrained Technology, Inc.
+--
+-- This file is part of PortaPack.
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2, or (at your option)
+-- any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; see the file COPYING.  If not, write to
+-- the Free Software Foundation, Inc., 51 Franklin Street,
+-- Boston, MA 02110-1301, USA.
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity top_tb is
+
+end top_tb;
+
+architecture behavior of top_tb is
+
+	component top
+	port (
+		MCU_D			:	inout	std_logic_vector(7 downto 0);
+		MCU_DIR		:	in		std_logic;
+		MCU_MODE		:	in		std_logic;
+		MCU_STROBE	:	in		std_logic;
+		MCU_ADDR		:	in		std_logic;
+		
+		TP_U			:	out	std_logic;
+		TP_D			:	out	std_logic;
+		TP_L			:	out	std_logic;
+		TP_R			:	out	std_logic;
+		
+		SW_SEL		:	in		std_logic;
+		SW_ROT_A		:	in		std_logic;
+		SW_ROT_B		:	in		std_logic;
+		SW_U			:	in		std_logic;
+		SW_D			:	in		std_logic;
+		SW_L			:	in		std_logic;
+		SW_R			:	in		std_logic;
+		
+		LCD_RESETX	:	out	std_logic;
+		LCD_RS		:	out	std_logic;
+		LCD_WRX		:	out	std_logic;
+		LCD_RDX		:	out	std_logic;
+		LCD_DB		:	inout	std_logic_vector(17 downto 0);
+		LCD_TE		:	in		std_logic
+	);
+	end component;
+
+	signal mcu_d : std_logic_vector(7 downto 0);
+	signal mcu_strobe : std_logic;
+	signal mcu_dir : std_logic;
+	signal mcu_mode : std_logic;
+	signal mcu_addr : std_logic;
+  
+	signal tp_u : std_logic;
+	signal tp_d : std_logic;
+	signal tp_l : std_logic;
+	signal tp_r : std_logic;
+	
+	signal sw_sel : std_logic;
+	signal sw_rot_a : std_logic;
+	signal sw_rot_b : std_logic;
+	signal sw_u : std_logic;
+	signal sw_d : std_logic;
+	signal sw_l : std_logic;
+	signal sw_r : std_logic;
+  
+	signal lcd_resetx : std_logic;
+	signal lcd_rs : std_logic;
+	signal lcd_wrx : std_logic;
+	signal lcd_rdx : std_logic;
+	signal lcd_db : std_logic_vector(17 downto 0);
+	signal lcd_te : std_logic := '0';
+begin
+
+	uut : top
+	port map (
+	  MCU_D => mcu_d,
+	  MCU_STROBE => mcu_strobe,
+	  MCU_DIR => mcu_dir,
+	  MCU_MODE => mcu_mode,
+	  MCU_ADDR => mcu_addr,
+	  TP_U => tp_u,
+	  TP_D => tp_d,
+	  TP_L => tp_l,
+	  TP_R => tp_r,
+	  SW_SEL => sw_sel,
+	  SW_ROT_A => sw_rot_a,
+	  SW_ROT_B => sw_rot_b,
+	  SW_U => sw_u,
+	  SW_D => sw_d,
+	  SW_L => sw_l,
+	  SW_R => sw_r,
+	  LCD_RESETX => lcd_resetx,
+	  LCD_RS => lcd_rs,
+	  LCD_WRX => lcd_wrx,
+	  LCD_RDX => lcd_rdx,
+	  LCD_DB => lcd_db,
+	  LCD_TE => lcd_te
+	);
+
+	stimulus: process is
+	begin
+		sw_sel <= '0';
+		sw_rot_a <= '0';
+		sw_rot_b <= '0';
+		sw_u <= '0';
+		sw_d <= '0';
+		sw_l <= '0';
+		sw_r <= '0';
+		
+		mcu_d <= (others => 'Z');
+		mcu_mode <= '1';
+		mcu_dir <= '1';
+		mcu_addr <= '1';
+		mcu_strobe <= '1';
+		
+		wait for 50.0 ns;
+
+		-- Write to resistive touch panel
+		mcu_mode <= '0';	-- Target: I/O
+		mcu_dir <= '0';	-- Direction: MCU -> CPLD
+		mcu_addr <= '0';	-- LCD reset signal
+		wait for 19.6 ns;	-- 4 cycles: Wait for CPLD D to reach Hi-Z
+		mcu_d <= "11000101";
+		wait for 14.7 ns;	-- 3 cycles: Setup time on D before STROBE.
+		mcu_strobe <= '0';
+		wait for 9.8 ns;	-- 2 cycles
+		mcu_strobe <= '1';
+		wait for 49.0 ns;
+
+		-- Write to LCD (command, then 16-bit data)
+		mcu_mode <= '1';	-- Target: LCD
+		mcu_dir <= '0';	-- Direction: MCU -> CPLD
+		mcu_addr <= '0';	-- Address: RS = 0 (command)
+		wait for 19.6 ns;	-- 4 cycles: Wait for CPLD D to reach Hi-Z
+		
+		mcu_d <= "10100101";
+		wait for 14.7 ns;	-- 3 cycles: Setup time on D before STROBE.
+		mcu_strobe <= '0';
+		wait for 9.8 ns;	-- 2 cycles
+		mcu_d <= "00001111";
+		wait for 24.5 ns;	-- 5 cycles: Prop from D to LCD_DB[7:0], WRX# minimum low time.
+		mcu_strobe <= '1';
+		wait for 9.8 ns;	-- 2 cycles: Part of prop from STROBE to LCD_WRX, delay to keep RS after WRX deassert.
+		mcu_addr <= '1';	-- Address: RS = 1 (data)
+		wait for 9.8 ns;	-- 2 cycles: Part of prop from STROBE to LCD_WRX.
+		
+		mcu_d <= "01011010";
+		wait for 14.7 ns;	-- 3 cycles: Setup time on D before STROBE.
+		mcu_strobe <= '0';
+		wait for 9.8 ns;	-- 2 cycles
+		mcu_d <= "11110000";
+		wait for 24.5 ns;	-- 5 cycles: Prop from D to LCD_DB[7:0], WRX# minimum low time.
+		mcu_strobe <= '1';
+		wait for 19.6 ns;	-- 4 cycles: Prop from STROBE to LCD_WRX.
+		
+		mcu_d <= "01010101";
+		wait for 14.7 ns;	-- 3 cycles: Setup time on D before STROBE.
+		mcu_strobe <= '0';
+		wait for 9.8 ns;	-- 2 cycles
+		mcu_d <= "10101010";
+		wait for 24.5 ns;	-- 5 cycles: Prop from D to LCD_DB[7:0], WRX# minimum low time.
+		mcu_strobe <= '1';
+		wait for 19.6 ns;	-- 4 cycles: Prop from STROBE to LCD_WRX.
+		
+		-- Read from switches
+		mcu_d <= (others => 'Z');
+		mcu_mode <= '0';	-- Target: I/O
+		mcu_dir <= '1';	-- Direction: MCU <- CPLD
+		wait for 49.0 ns;
+		
+	end process;
+end architecture behavior;
diff --git a/hardware/portapack_h1/hackrf_if.sch b/hardware/portapack_h1/hackrf_if.sch
new file mode 100644
index 00000000..77a91a73
--- /dev/null
+++ b/hardware/portapack_h1/hackrf_if.sch
@@ -0,0 +1,1559 @@
+EESchema Schematic File Version 2
+LIBS:hackrf_expansion
+LIBS:wolfson
+LIBS:passive
+LIBS:lcd_kingtech
+LIBS:power
+LIBS:io_expander
+LIBS:trs_jack
+LIBS:battery
+LIBS:mosfet
+LIBS:microphone
+LIBS:sd
+LIBS:ck
+LIBS:altera
+LIBS:regulator
+LIBS:tp
+LIBS:header
+LIBS:hole
+LIBS:sharebrained
+LIBS:fiducial
+LIBS:portapack_h1-cache
+EELAYER 24 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 4 4
+Title "PortaPack H1"
+Date "13 Oct 2014"
+Rev "20140826"
+Comp "ShareBrained Technology, Inc."
+Comment1 "Copyright © 2014 Jared Boone"
+Comment2 "License: GNU General Public License, version 2"
+Comment3 ""
+Comment4 ""
+$EndDescr
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+	0    -1   -1   0   
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+NoConn ~ 1800 5200
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+TDI, TMS: weak internal PU\nTCK: weak internal PD
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+	1    800  5700
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+F 5 "GRM155R61A104KA01" H 800 6100 60  0001 C CNN "Part"
+	1    800  6100
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+	1    1600 6100
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+F 3 "" H 1600 6400 60  0000 C CNN
+	1    1600 6400
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+F 3 "" H 2000 6400 60  0000 C CNN
+	1    2000 6400
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+F 5 "GRM21BR61A106KE19" H 2400 7200 60  0001 C CNN "Part"
+	1    2400 7200
+	1    0    0    -1  
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+F 0 "C37" H 2850 7300 50  0000 L CNN
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+F 5 "GRM21BR61A106KE19" H 2800 7200 60  0001 C CNN "Part"
+	1    2800 7200
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+F 2 "" H 2800 7500 60  0000 C CNN
+F 3 "" H 2800 7500 60  0000 C CNN
+	1    2800 7500
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+F 2 "" H 2400 7500 60  0000 C CNN
+F 3 "" H 2400 7500 60  0000 C CNN
+	1    2400 7500
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+	800  7400 800  7500
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+	1200 7400 1200 7500
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+U 1 1 53A8D62C
+P 6500 7200
+F 0 "C41" H 6550 7300 50  0000 L CNN
+F 1 "10U" H 6550 7100 50  0000 L CNN
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+F 5 "GRM21BR61A106KE19" H 6500 7200 60  0001 C CNN "Part"
+	1    6500 7200
+	-1   0    0    -1  
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+U 1 1 53A8D632
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+F 0 "#PWR096" H 6500 7500 30  0001 C CNN
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+F 2 "" H 6500 7500 60  0000 C CNN
+F 3 "" H 6500 7500 60  0000 C CNN
+	1    6500 7500
+	1    0    0    -1  
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+Wire Wire Line
+	6500 7400 6500 7500
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+Text Label 8900 5350 1    60   ~ 0
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+Text Label 5600 5900 0    60   ~ 0
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+Text Label 5600 6000 0    60   ~ 0
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+F 0 "R22" V 1430 5300 50  0000 C CNN
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+F 3 "" H 1350 5300 60  0000 C CNN
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+F 5 "RC0603FR-07220RL" V 1350 5300 60  0001 C CNN "Part"
+	1    1350 5300
+	0    1    -1   0   
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diff --git a/hardware/portapack_h1/lcd_sw_sd.sch b/hardware/portapack_h1/lcd_sw_sd.sch
new file mode 100644
index 00000000..204c250c
--- /dev/null
+++ b/hardware/portapack_h1/lcd_sw_sd.sch
@@ -0,0 +1,656 @@
+EESchema Schematic File Version 2
+LIBS:hackrf_expansion
+LIBS:wolfson
+LIBS:passive
+LIBS:lcd_kingtech
+LIBS:power
+LIBS:io_expander
+LIBS:trs_jack
+LIBS:battery
+LIBS:mosfet
+LIBS:microphone
+LIBS:sd
+LIBS:ck
+LIBS:altera
+LIBS:regulator
+LIBS:tp
+LIBS:header
+LIBS:hole
+LIBS:sharebrained
+LIBS:fiducial
+LIBS:portapack_h1-cache
+EELAYER 24 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 3 4
+Title "PortaPack H1"
+Date "13 Oct 2014"
+Rev "20140826"
+Comp "ShareBrained Technology, Inc."
+Comment1 "Copyright © 2014 Jared Boone"
+Comment2 "License: GNU General Public License, version 2"
+Comment3 ""
+Comment4 ""
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+	8900 3300 9000 3400
+Entry Wire Line
+	8900 3400 9000 3500
+Entry Wire Line
+	8900 3500 9000 3600
+Entry Wire Line
+	8900 3600 9000 3700
+Entry Wire Line
+	8900 3700 9000 3800
+Entry Wire Line
+	8900 3800 9000 3900
+Entry Wire Line
+	8900 3900 9000 4000
+Entry Wire Line
+	8900 4000 9000 4100
+Entry Wire Line
+	8900 4100 9000 4200
+Entry Wire Line
+	8900 4200 9000 4300
+Entry Wire Line
+	8900 4300 9000 4400
+Entry Wire Line
+	8900 4400 9000 4500
+Entry Wire Line
+	8900 4500 9000 4600
+Entry Wire Line
+	8900 4600 9000 4700
+Entry Wire Line
+	8900 4700 9000 4800
+Text HLabel 8800 2900 0    60   BiDi ~ 0
+LCD_DB[15..0]
+Text HLabel 9600 2100 0    60   Input ~ 0
+LCD_RS
+Text HLabel 9600 2200 0    60   Input ~ 0
+LCD_RD#
+Text HLabel 9600 2500 0    60   Input ~ 0
+LCD_WR#
+Text HLabel 8200 2000 0    60   Input ~ 0
+LCD_RESET#
+Text HLabel 8200 1000 0    60   Input ~ 0
+LCD_BACKLIGHT
+Text HLabel 9500 4900 0    60   Output ~ 0
+LCD_TE
+Text HLabel 9500 5200 0    60   BiDi ~ 0
+TP_R
+Text HLabel 9500 5300 0    60   BiDi ~ 0
+TP_D
+Text HLabel 9500 5400 0    60   BiDi ~ 0
+TP_L
+Text HLabel 9500 5500 0    60   BiDi ~ 0
+TP_U
+Text HLabel 1400 1000 0    60   Output ~ 0
+SW_SEL
+Text HLabel 1400 1100 0    60   Output ~ 0
+SW_ROT_A
+Text HLabel 1400 1200 0    60   Output ~ 0
+SW_ROT_B
+Text HLabel 3600 1000 2    60   Output ~ 0
+SW_D
+Text HLabel 3600 1100 2    60   Output ~ 0
+SW_R
+Text HLabel 3600 1200 2    60   Output ~ 0
+SW_U
+Text HLabel 3600 1300 2    60   Output ~ 0
+SW_L
+Text HLabel 2200 5800 0    60   BiDi ~ 0
+SD_DAT2
+Text HLabel 2200 5900 0    60   BiDi ~ 0
+SD_DAT3
+Text HLabel 2200 6000 0    60   BiDi ~ 0
+SD_CMD
+Text HLabel 2200 6200 0    60   Input ~ 0
+SD_CLK
+Text HLabel 2200 6400 0    60   BiDi ~ 0
+SD_DAT0
+Text HLabel 2200 6500 0    60   BiDi ~ 0
+SD_DAT1
+Text HLabel 2200 6800 0    60   Output ~ 0
+SD_CD
+Wire Wire Line
+	9800 3100 9900 3100
+Connection ~ 9800 2900
+Wire Wire Line
+	9800 3200 9900 3200
+Connection ~ 9800 3100
+Wire Wire Line
+	9900 2400 9800 2400
+Wire Wire Line
+	9900 2300 9800 2300
+Connection ~ 9800 2400
+Wire Wire Line
+	3200 6800 2200 6800
+Wire Wire Line
+	3200 6700 3100 6700
+$Comp
+L MOSFET_N Q1
+U 1 1 53C5B6EB
+P 8700 950
+F 0 "Q1" H 8700 801 40  0000 R CNN
+F 1 "MOSFET_N" H 8700 1100 40  0000 R CNN
+F 2 "" H 8570 1052 29  0000 C CNN
+F 3 "" H 8700 950 60  0000 C CNN
+F 4 "NXP" H 8700 950 60  0001 C CNN "Mfr"
+F 5 "2N7002P,215" H 8700 950 60  0001 C CNN "Part"
+	1    8700 950 
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR057
+U 1 1 53C5B707
+P 8800 1250
+F 0 "#PWR057" H 8800 1250 30  0001 C CNN
+F 1 "GND" H 8800 1180 30  0001 C CNN
+F 2 "" H 8800 1250 60  0000 C CNN
+F 3 "" H 8800 1250 60  0000 C CNN
+	1    8800 1250
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	8800 1150 8800 1250
+Wire Wire Line
+	9900 1700 9700 1700
+Wire Wire Line
+	8200 1000 8500 1000
+Wire Wire Line
+	8300 1000 8300 1100
+Connection ~ 8300 1000
+$Comp
+L GND #PWR058
+U 1 1 53C5B8B4
+P 8300 1700
+F 0 "#PWR058" H 8300 1700 30  0001 C CNN
+F 1 "GND" H 8300 1630 30  0001 C CNN
+F 2 "" H 8300 1700 60  0000 C CNN
+F 3 "" H 8300 1700 60  0000 C CNN
+	1    8300 1700
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	8300 1600 8300 1700
+Wire Wire Line
+	8800 750  8800 600 
+Wire Wire Line
+	8800 600  9800 600 
+Wire Wire Line
+	9800 600  9800 1600
+$EndSCHEMATC
diff --git a/hardware/portapack_h1/portapack_h1.cmp b/hardware/portapack_h1/portapack_h1.cmp
new file mode 100644
index 00000000..550e9b6b
--- /dev/null
+++ b/hardware/portapack_h1/portapack_h1.cmp
@@ -0,0 +1,717 @@
+Cmp-Mod V01 Created by CvPcb (2014-03-01 BZR 4730)-product date = Tuesday, August 26, 2014 'AMt' 09:05:06 AM
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D535;
+Reference = BT1;
+ValeurCmp = BATTERY;
+IdModule  = bat_coin:MPD_BU2032SM-BT-G;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C6A5;
+Reference = C2;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C69F;
+Reference = C3;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C6B1;
+Reference = C4;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C6AB;
+Reference = C5;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C687;
+Reference = C6;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C70E;
+Reference = C7;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C6F6;
+Reference = C8;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C708;
+Reference = C9;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C68D;
+Reference = C10;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C72C;
+Reference = C11;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C6F0;
+Reference = C12;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C720;
+Reference = C13;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF1137;
+Reference = C14;
+ValeurCmp = 220P;
+IdModule  = ipc_capc:IPC_CAPC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF112C;
+Reference = C15;
+ValeurCmp = 220P;
+IdModule  = ipc_capc:IPC_CAPC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF15D9;
+Reference = C16;
+ValeurCmp = 1U;
+IdModule  = ipc_capae:IPC_CAPAE430X540N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF15E8;
+Reference = C17;
+ValeurCmp = 1U;
+IdModule  = ipc_capae:IPC_CAPAE430X540N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C256;
+Reference = C18;
+ValeurCmp = 220U;
+IdModule  = ipc_capae:IPC_CAPAE830X620N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C25E;
+Reference = C19;
+ValeurCmp = 220U;
+IdModule  = ipc_capae:IPC_CAPAE830X620N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF2762;
+Reference = C20;
+ValeurCmp = 10U;
+IdModule  = ipc_capae:IPC_CAPAE430X540N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF2753;
+Reference = C21;
+ValeurCmp = 10U;
+IdModule  = ipc_capae:IPC_CAPAE430X540N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C27E;
+Reference = C22;
+ValeurCmp = 220P;
+IdModule  = ipc_capc:IPC_CAPC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C284;
+Reference = C23;
+ValeurCmp = 220P;
+IdModule  = ipc_capc:IPC_CAPC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C2AA;
+Reference = C24;
+ValeurCmp = 1U;
+IdModule  = ipc_capae:IPC_CAPAE430X540N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C2A2;
+Reference = C25;
+ValeurCmp = 220P;
+IdModule  = ipc_capc:IPC_CAPC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A9129D/53A8C71C;
+Reference = C26;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A9129D/53AA73CE;
+Reference = C27;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D527;
+Reference = C28;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D548;
+Reference = C29;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D542;
+Reference = C30;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D54E;
+Reference = C31;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D5C2;
+Reference = C32;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D56C;
+Reference = C33;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D5C8;
+Reference = C34;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D572;
+Reference = C35;
+ValeurCmp = 100N;
+IdModule  = ipc_capc:IPC_CAPC1005X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D5DA;
+Reference = C36;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D5E0;
+Reference = C37;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D58C;
+Reference = C38;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D5AA;
+Reference = C39;
+ValeurCmp = DNI;
+IdModule  = ipc_capc:IPC_CAPC1608X90N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D592;
+Reference = C40;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D62C;
+Reference = C41;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53B1911F;
+Reference = C42;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53B1A065;
+Reference = C43;
+ValeurCmp = 10U;
+IdModule  = ipc_capc:IPC_CAPC2012X140N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53B309AC;
+Reference = FID1;
+ValeurCmp = FIDUCIAL;
+IdModule  = fiducial:FIDUCIAL_65MIL;
+EndCmp
+
+BeginCmp
+TimeStamp = /53B30B4C;
+Reference = FID2;
+ValeurCmp = FIDUCIAL;
+IdModule  = fiducial:FIDUCIAL_65MIL;
+EndCmp
+
+BeginCmp
+TimeStamp = /53B30CEC;
+Reference = FID3;
+ValeurCmp = FIDUCIAL;
+IdModule  = fiducial:FIDUCIAL_65MIL;
+EndCmp
+
+BeginCmp
+TimeStamp = /53B30E8C;
+Reference = FID4;
+ValeurCmp = FIDUCIAL;
+IdModule  = fiducial:FIDUCIAL_65MIL;
+EndCmp
+
+BeginCmp
+TimeStamp = /5369BBC4;
+Reference = H1;
+ValeurCmp = HOLE1;
+IdModule  = hole:HOLE_3200UM_VIAS;
+EndCmp
+
+BeginCmp
+TimeStamp = /5369BBD8;
+Reference = H2;
+ValeurCmp = HOLE1;
+IdModule  = hole:HOLE_3200UM_VIAS;
+EndCmp
+
+BeginCmp
+TimeStamp = /5369BBEC;
+Reference = H3;
+ValeurCmp = HOLE1;
+IdModule  = hole:HOLE_3200UM_VIAS;
+EndCmp
+
+BeginCmp
+TimeStamp = /5369BC00;
+Reference = H4;
+ValeurCmp = HOLE1;
+IdModule  = hole:HOLE_3200UM_VIAS;
+EndCmp
+
+BeginCmp
+TimeStamp = /5369BC14;
+Reference = H5;
+ValeurCmp = HOLE1;
+IdModule  = hole:HOLE_3200UM_VIAS;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A9129D/53A8C6D0;
+Reference = J2;
+ValeurCmp = MICROSD_DETSW;
+IdModule  = alps:ALPS_SCHA4B0100;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A9129D/53A91651;
+Reference = J3;
+ValeurCmp = KINGTECH_DW0240A2BZ_FPC;
+IdModule  = molex:MOLEX_54132-40XX_LR;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF093C;
+Reference = L1;
+ValeurCmp = L;
+IdModule  = ipc_indc:IPC_INDC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF20F3;
+Reference = L2;
+ValeurCmp = L;
+IdModule  = ipc_indc:IPC_INDC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF20FE;
+Reference = L3;
+ValeurCmp = L;
+IdModule  = ipc_indc:IPC_INDC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C2E2;
+Reference = L4;
+ValeurCmp = L;
+IdModule  = ipc_indc:IPC_INDC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C2E8;
+Reference = L5;
+ValeurCmp = L;
+IdModule  = ipc_indc:IPC_INDC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C2EE;
+Reference = L6;
+ValeurCmp = L;
+IdModule  = ipc_indc:IPC_INDC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF25CC;
+Reference = L7;
+ValeurCmp = L;
+IdModule  = ipc_indc:IPC_INDC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF25D7;
+Reference = L8;
+ValeurCmp = L;
+IdModule  = ipc_indc:IPC_INDC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C2F4;
+Reference = L9;
+ValeurCmp = L;
+IdModule  = ipc_indc:IPC_INDC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF0931;
+Reference = L10;
+ValeurCmp = L;
+IdModule  = ipc_indc:IPC_INDC1608X95N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A9129D/53A8C752;
+Reference = LCD1;
+ValeurCmp = KINGTECH_DW0240A2BZ_PANEL;
+IdModule  = lcd_kingtech:KINGTECH_DW0240A2BZ_PANEL;
+EndCmp
+
+BeginCmp
+TimeStamp = /53B1AE0D;
+Reference = LOGO1;
+ValeurCmp = SHAREBRAINED;
+IdModule  = sharebrained:sharebrained_text_300;
+EndCmp
+
+BeginCmp
+TimeStamp = /53B1B509;
+Reference = LOGO2;
+ValeurCmp = PORTAPACK_H1;
+IdModule  = sharebrained:portapack_text_300;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF0914;
+Reference = P1;
+ValeurCmp = TRS_JACK;
+IdModule  = cui:CUI_SJ-3524-SMT;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C2C6;
+Reference = P2;
+ValeurCmp = TRRS_SW_JACK;
+IdModule  = cui:CUI_SJ-43516-SMT;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF0926;
+Reference = P3;
+ValeurCmp = TRS_JACK;
+IdModule  = cui:CUI_SJ-3524-SMT;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8CDAE;
+Reference = P20;
+ValeurCmp = HACKRF_ONE_P20;
+IdModule  = header:HEADER_11X2_REV_SM_254_AP;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8CDB6;
+Reference = P22;
+ValeurCmp = HACKRF_ONE_P22;
+IdModule  = header:HEADER_13X2_REV_SM_254_AP;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8CDBE;
+Reference = P28;
+ValeurCmp = HACKRF_ONE_P28;
+IdModule  = header:HEADER_11X2_REV_SM_254_AP;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A9129D/53C5B6EB;
+Reference = Q1;
+ValeurCmp = MOSFET_N;
+IdModule  = ipc_sot:IPC_SOT95P230X110-3N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53AB79CA;
+Reference = R1;
+ValeurCmp = 220R;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53AB79D5;
+Reference = R2;
+ValeurCmp = 220R;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53AB79EA;
+Reference = R3;
+ValeurCmp = 220R;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF0B7F;
+Reference = R6;
+ValeurCmp = 5K6;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF0B74;
+Reference = R7;
+ValeurCmp = 5K6;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF0B8A;
+Reference = R8;
+ValeurCmp = 5K6;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF0B95;
+Reference = R9;
+ValeurCmp = 5K6;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C2B0;
+Reference = R10;
+ValeurCmp = 47K;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C264;
+Reference = R11;
+ValeurCmp = 47K;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C26A;
+Reference = R12;
+ValeurCmp = 47K;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF2746;
+Reference = R13;
+ValeurCmp = 47K;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF273B;
+Reference = R14;
+ValeurCmp = 47K;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF2725;
+Reference = R15;
+ValeurCmp = 100R;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AF2730;
+Reference = R16;
+ValeurCmp = 100R;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C296;
+Reference = R17;
+ValeurCmp = 47K;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C29C;
+Reference = R18;
+ValeurCmp = 680R;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A9129D/53A91657;
+Reference = R19;
+ValeurCmp = 47K;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A9129D/53A91635;
+Reference = R20;
+ValeurCmp = 47K;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A915E9;
+Reference = R22;
+ValeurCmp = 220R;
+IdModule  = ipc_resc:IPC_RESC1608X55N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53AB09AD;
+Reference = RP1;
+ValeurCmp = 220R;
+IdModule  = ipc_resc:IPC_RESCAXS80P160X320X60-8N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53AB047A;
+Reference = RP4;
+ValeurCmp = 220R;
+IdModule  = ipc_resc:IPC_RESCAXS80P160X320X60-8N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53AB04B9;
+Reference = RP6;
+ValeurCmp = 220R;
+IdModule  = ipc_resc:IPC_RESCAXS80P160X320X60-8N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53AB04D6;
+Reference = RP7;
+ValeurCmp = 220R;
+IdModule  = ipc_resc:IPC_RESCAXS80P160X320X60-8N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A9129D/53A8C6FD;
+Reference = SW1;
+ValeurCmp = CK_TSWB-3N-CB;
+IdModule  = ck:CK_TSWB-3N-CB222_LFS;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C66D;
+Reference = U1;
+ValeurCmp = WM8731SEDS;
+IdModule  = ipc_sop:IPC_SOP65P780X200-28N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D586;
+Reference = U2;
+ValeurCmp = REGULATOR_SOT23_5;
+IdModule  = ipc_sot:IPC_SOT95P280X110-5N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8C780/53A8D11B;
+Reference = U3;
+ValeurCmp = 5M40ZE64;
+IdModule  = ipc_qfp:IPC_QFP40P900X900X120-65N;
+EndCmp
+
+BeginCmp
+TimeStamp = /53A8BFC3/53A8C2D6;
+Reference = X1;
+ValeurCmp = MIC_ELECTRET;
+IdModule  = cui:CUI_CMA-4544PF-W;
+EndCmp
+
+EndListe
diff --git a/hardware/portapack_h1/portapack_h1.kicad_pcb b/hardware/portapack_h1/portapack_h1.kicad_pcb
new file mode 100644
index 00000000..98e22a00
--- /dev/null
+++ b/hardware/portapack_h1/portapack_h1.kicad_pcb
@@ -0,0 +1,4991 @@
+(kicad_pcb (version 4) (host pcbnew "(2015-07-14 BZR 5938)-product")
+
+  (general
+    (links 325)
+    (no_connects 124)
+    (area 50.179381 97.225799 180.874201 175.190501)
+    (thickness 1.6)
+    (drawings 24)
+    (tracks 1715)
+    (zones 0)
+    (modules 100)
+    (nets 124)
+  )
+
+  (page A4)
+  (layers
+    (0 1_top signal hide)
+    (1 2_pwr mixed hide)
+    (2 3_gnd mixed hide)
+    (31 4_bot signal hide)
+    (32 B.Adhes user hide)
+    (33 F.Adhes user hide)
+    (34 B.Paste user hide)
+    (35 F.Paste user hide)
+    (36 B.SilkS user hide)
+    (37 F.SilkS user hide)
+    (38 B.Mask user hide)
+    (39 F.Mask user hide)
+    (40 Dwgs.User user hide)
+    (41 Cmts.User user hide)
+    (42 Eco1.User user hide)
+    (43 Eco2.User user hide)
+    (44 Edge.Cuts user)
+  )
+
+  (setup
+    (last_trace_width 0.2)
+    (user_trace_width 0.2)
+    (user_trace_width 0.3)
+    (user_trace_width 0.4)
+    (trace_clearance 0.198)
+    (zone_clearance 0.2)
+    (zone_45_only yes)
+    (trace_min 0.2)
+    (segment_width 0.1524)
+    (edge_width 0.1)
+    (via_size 0.6985)
+    (via_drill 0.3429)
+    (via_min_size 0.6985)
+    (via_min_drill 0.3429)
+    (uvia_size 0.508)
+    (uvia_drill 0.127)
+    (uvias_allowed no)
+    (uvia_min_size 0.508)
+    (uvia_min_drill 0.127)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.1524)
+    (mod_text_size 0.6096 0.6096)
+    (mod_text_width 0.1524)
+    (pad_size 2.75 2.75)
+    (pad_drill 0)
+    (pad_to_mask_clearance 0.0762)
+    (solder_mask_min_width 0.0762)
+    (aux_axis_origin 60 175)
+    (grid_origin 60 100)
+    (visible_elements FFFEFFFF)
+    (pcbplotparams
+      (layerselection 0x00030_80000001)
+      (usegerberextensions true)
+      (excludeedgelayer true)
+      (linewidth 0.152400)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (hpglpenoverlay 2)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue false)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk true)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory gerber/))
+  )
+
+  (net 0 "")
+  (net 1 +1.8V)
+  (net 2 +3.3V)
+  (net 3 /audio/I2S0_MCLK)
+  (net 4 /audio/I2S0_MCLK_R)
+  (net 5 /audio/I2S0_RX_SDA)
+  (net 6 /audio/I2S0_SCK)
+  (net 7 /audio/I2S0_SCK_R)
+  (net 8 /audio/I2S0_TX_SDA)
+  (net 9 /audio/I2S0_TX_SDA_R)
+  (net 10 /audio/I2S0_WS)
+  (net 11 /audio/I2S0_WS_R)
+  (net 12 /audio/LHPOUT)
+  (net 13 /audio/LLINEIN)
+  (net 14 /audio/LOUT)
+  (net 15 /audio/MICBIAS)
+  (net 16 /audio/MICIN)
+  (net 17 /audio/RHPOUT)
+  (net 18 /audio/RLINEIN)
+  (net 19 /audio/ROUT)
+  (net 20 /audio/SCL)
+  (net 21 /audio/SDA)
+  (net 22 /audio/VMID)
+  (net 23 /hackrf_if/CPLD_TCK)
+  (net 24 /hackrf_if/CPLD_TDI)
+  (net 25 /hackrf_if/GPIO3_10)
+  (net 26 /hackrf_if/GPIO3_10_R)
+  (net 27 /hackrf_if/GPIO3_11)
+  (net 28 /hackrf_if/GPIO3_11_R)
+  (net 29 /hackrf_if/GPIO3_12)
+  (net 30 /hackrf_if/GPIO3_12_R)
+  (net 31 /hackrf_if/GPIO3_13)
+  (net 32 /hackrf_if/GPIO3_13_R)
+  (net 33 /hackrf_if/GPIO3_14)
+  (net 34 /hackrf_if/GPIO3_14_R)
+  (net 35 /hackrf_if/GPIO3_15)
+  (net 36 /hackrf_if/GPIO3_15_R)
+  (net 37 /hackrf_if/GPIO3_8)
+  (net 38 /hackrf_if/GPIO3_8_R)
+  (net 39 /hackrf_if/GPIO3_9)
+  (net 40 /hackrf_if/GPIO3_9_R)
+  (net 41 /hackrf_if/LCD_BACKLIGHT)
+  (net 42 /hackrf_if/LCD_DB0)
+  (net 43 /hackrf_if/LCD_DB1)
+  (net 44 /hackrf_if/LCD_DB10)
+  (net 45 /hackrf_if/LCD_DB11)
+  (net 46 /hackrf_if/LCD_DB12)
+  (net 47 /hackrf_if/LCD_DB13)
+  (net 48 /hackrf_if/LCD_DB14)
+  (net 49 /hackrf_if/LCD_DB15)
+  (net 50 /hackrf_if/LCD_DB2)
+  (net 51 /hackrf_if/LCD_DB3)
+  (net 52 /hackrf_if/LCD_DB4)
+  (net 53 /hackrf_if/LCD_DB5)
+  (net 54 /hackrf_if/LCD_DB6)
+  (net 55 /hackrf_if/LCD_DB7)
+  (net 56 /hackrf_if/LCD_DB8)
+  (net 57 /hackrf_if/LCD_DB9)
+  (net 58 /hackrf_if/LCD_RD#)
+  (net 59 /hackrf_if/LCD_RESET#)
+  (net 60 /hackrf_if/LCD_RS)
+  (net 61 /hackrf_if/LCD_TE)
+  (net 62 /hackrf_if/LCD_WR#)
+  (net 63 /hackrf_if/P1_5)
+  (net 64 /hackrf_if/P1_8)
+  (net 65 /hackrf_if/P2_0)
+  (net 66 /hackrf_if/P2_0_R)
+  (net 67 /hackrf_if/P2_1)
+  (net 68 /hackrf_if/P2_13)
+  (net 69 /hackrf_if/P2_13_R)
+  (net 70 /hackrf_if/P2_1_R)
+  (net 71 /hackrf_if/P2_3)
+  (net 72 /hackrf_if/P2_3_R)
+  (net 73 /hackrf_if/P2_4)
+  (net 74 /hackrf_if/P2_4_R)
+  (net 75 /hackrf_if/P2_8)
+  (net 76 /hackrf_if/P2_8_R)
+  (net 77 /hackrf_if/P2_9)
+  (net 78 /hackrf_if/P2_9_R)
+  (net 79 /hackrf_if/RESET#)
+  (net 80 /hackrf_if/SD_CD)
+  (net 81 /hackrf_if/SD_CLK)
+  (net 82 /hackrf_if/SD_CMD)
+  (net 83 /hackrf_if/SD_DAT0)
+  (net 84 /hackrf_if/SD_DAT1)
+  (net 85 /hackrf_if/SD_DAT2)
+  (net 86 /hackrf_if/SD_DAT3)
+  (net 87 /hackrf_if/SW_D)
+  (net 88 /hackrf_if/SW_L)
+  (net 89 /hackrf_if/SW_R)
+  (net 90 /hackrf_if/SW_ROT_A)
+  (net 91 /hackrf_if/SW_ROT_B)
+  (net 92 /hackrf_if/SW_SEL)
+  (net 93 /hackrf_if/SW_U)
+  (net 94 /hackrf_if/TP_D)
+  (net 95 /hackrf_if/TP_L)
+  (net 96 /hackrf_if/TP_R)
+  (net 97 /hackrf_if/TP_U)
+  (net 98 /hackrf_if/VBAT)
+  (net 99 GND)
+  (net 100 "Net-(C14-Pad2)")
+  (net 101 "Net-(C15-Pad1)")
+  (net 102 "Net-(C18-Pad2)")
+  (net 103 "Net-(C19-Pad2)")
+  (net 104 "Net-(C20-Pad2)")
+  (net 105 "Net-(C21-Pad2)")
+  (net 106 "Net-(C24-Pad1)")
+  (net 107 "Net-(C24-Pad2)")
+  (net 108 "Net-(C39-Pad1)")
+  (net 109 "Net-(J3-Pad1)")
+  (net 110 "Net-(L1-Pad1)")
+  (net 111 "Net-(L10-Pad1)")
+  (net 112 "Net-(L2-Pad1)")
+  (net 113 "Net-(L2-Pad2)")
+  (net 114 "Net-(L3-Pad1)")
+  (net 115 "Net-(L3-Pad2)")
+  (net 116 "Net-(L4-Pad1)")
+  (net 117 "Net-(L5-Pad1)")
+  (net 118 "Net-(L6-Pad1)")
+  (net 119 "Net-(L7-Pad1)")
+  (net 120 "Net-(L7-Pad2)")
+  (net 121 "Net-(L8-Pad1)")
+  (net 122 "Net-(L8-Pad2)")
+  (net 123 "Net-(L9-Pad1)")
+
+  (net_class Default "This is the default net class."
+    (clearance 0.198)
+    (trace_width 0.2)
+    (via_dia 0.6985)
+    (via_drill 0.3429)
+    (uvia_dia 0.508)
+    (uvia_drill 0.127)
+    (add_net +1.8V)
+    (add_net +3.3V)
+    (add_net /audio/I2S0_MCLK)
+    (add_net /audio/I2S0_MCLK_R)
+    (add_net /audio/I2S0_RX_SDA)
+    (add_net /audio/I2S0_SCK)
+    (add_net /audio/I2S0_SCK_R)
+    (add_net /audio/I2S0_TX_SDA)
+    (add_net /audio/I2S0_TX_SDA_R)
+    (add_net /audio/I2S0_WS)
+    (add_net /audio/I2S0_WS_R)
+    (add_net /audio/LHPOUT)
+    (add_net /audio/LLINEIN)
+    (add_net /audio/LOUT)
+    (add_net /audio/MICBIAS)
+    (add_net /audio/MICIN)
+    (add_net /audio/RHPOUT)
+    (add_net /audio/RLINEIN)
+    (add_net /audio/ROUT)
+    (add_net /audio/SCL)
+    (add_net /audio/SDA)
+    (add_net /audio/VMID)
+    (add_net /hackrf_if/CPLD_TCK)
+    (add_net /hackrf_if/CPLD_TDI)
+    (add_net /hackrf_if/GPIO3_10)
+    (add_net /hackrf_if/GPIO3_10_R)
+    (add_net /hackrf_if/GPIO3_11)
+    (add_net /hackrf_if/GPIO3_11_R)
+    (add_net /hackrf_if/GPIO3_12)
+    (add_net /hackrf_if/GPIO3_12_R)
+    (add_net /hackrf_if/GPIO3_13)
+    (add_net /hackrf_if/GPIO3_13_R)
+    (add_net /hackrf_if/GPIO3_14)
+    (add_net /hackrf_if/GPIO3_14_R)
+    (add_net /hackrf_if/GPIO3_15)
+    (add_net /hackrf_if/GPIO3_15_R)
+    (add_net /hackrf_if/GPIO3_8)
+    (add_net /hackrf_if/GPIO3_8_R)
+    (add_net /hackrf_if/GPIO3_9)
+    (add_net /hackrf_if/GPIO3_9_R)
+    (add_net /hackrf_if/LCD_BACKLIGHT)
+    (add_net /hackrf_if/LCD_DB0)
+    (add_net /hackrf_if/LCD_DB1)
+    (add_net /hackrf_if/LCD_DB10)
+    (add_net /hackrf_if/LCD_DB11)
+    (add_net /hackrf_if/LCD_DB12)
+    (add_net /hackrf_if/LCD_DB13)
+    (add_net /hackrf_if/LCD_DB14)
+    (add_net /hackrf_if/LCD_DB15)
+    (add_net /hackrf_if/LCD_DB2)
+    (add_net /hackrf_if/LCD_DB3)
+    (add_net /hackrf_if/LCD_DB4)
+    (add_net /hackrf_if/LCD_DB5)
+    (add_net /hackrf_if/LCD_DB6)
+    (add_net /hackrf_if/LCD_DB7)
+    (add_net /hackrf_if/LCD_DB8)
+    (add_net /hackrf_if/LCD_DB9)
+    (add_net /hackrf_if/LCD_RD#)
+    (add_net /hackrf_if/LCD_RESET#)
+    (add_net /hackrf_if/LCD_RS)
+    (add_net /hackrf_if/LCD_TE)
+    (add_net /hackrf_if/LCD_WR#)
+    (add_net /hackrf_if/P1_5)
+    (add_net /hackrf_if/P1_8)
+    (add_net /hackrf_if/P2_0)
+    (add_net /hackrf_if/P2_0_R)
+    (add_net /hackrf_if/P2_1)
+    (add_net /hackrf_if/P2_13)
+    (add_net /hackrf_if/P2_13_R)
+    (add_net /hackrf_if/P2_1_R)
+    (add_net /hackrf_if/P2_3)
+    (add_net /hackrf_if/P2_3_R)
+    (add_net /hackrf_if/P2_4)
+    (add_net /hackrf_if/P2_4_R)
+    (add_net /hackrf_if/P2_8)
+    (add_net /hackrf_if/P2_8_R)
+    (add_net /hackrf_if/P2_9)
+    (add_net /hackrf_if/P2_9_R)
+    (add_net /hackrf_if/RESET#)
+    (add_net /hackrf_if/SD_CD)
+    (add_net /hackrf_if/SD_CLK)
+    (add_net /hackrf_if/SD_CMD)
+    (add_net /hackrf_if/SD_DAT0)
+    (add_net /hackrf_if/SD_DAT1)
+    (add_net /hackrf_if/SD_DAT2)
+    (add_net /hackrf_if/SD_DAT3)
+    (add_net /hackrf_if/SW_D)
+    (add_net /hackrf_if/SW_L)
+    (add_net /hackrf_if/SW_R)
+    (add_net /hackrf_if/SW_ROT_A)
+    (add_net /hackrf_if/SW_ROT_B)
+    (add_net /hackrf_if/SW_SEL)
+    (add_net /hackrf_if/SW_U)
+    (add_net /hackrf_if/TP_D)
+    (add_net /hackrf_if/TP_L)
+    (add_net /hackrf_if/TP_R)
+    (add_net /hackrf_if/TP_U)
+    (add_net /hackrf_if/VBAT)
+    (add_net GND)
+    (add_net "Net-(C14-Pad2)")
+    (add_net "Net-(C15-Pad1)")
+    (add_net "Net-(C18-Pad2)")
+    (add_net "Net-(C19-Pad2)")
+    (add_net "Net-(C20-Pad2)")
+    (add_net "Net-(C21-Pad2)")
+    (add_net "Net-(C24-Pad1)")
+    (add_net "Net-(C24-Pad2)")
+    (add_net "Net-(C39-Pad1)")
+    (add_net "Net-(J3-Pad1)")
+    (add_net "Net-(L1-Pad1)")
+    (add_net "Net-(L10-Pad1)")
+    (add_net "Net-(L2-Pad1)")
+    (add_net "Net-(L2-Pad2)")
+    (add_net "Net-(L3-Pad1)")
+    (add_net "Net-(L3-Pad2)")
+    (add_net "Net-(L4-Pad1)")
+    (add_net "Net-(L5-Pad1)")
+    (add_net "Net-(L6-Pad1)")
+    (add_net "Net-(L7-Pad1)")
+    (add_net "Net-(L7-Pad2)")
+    (add_net "Net-(L8-Pad1)")
+    (add_net "Net-(L8-Pad2)")
+    (add_net "Net-(L9-Pad1)")
+  )
+
+  (module bat_coin:MPD_BU2032SM-BT-G locked (layer 4_bot) (tedit 53B09B28) (tstamp 53AA25F0)
+    (at 97 160 180)
+    (path /53A8C780/53A8D535)
+    (attr smd)
+    (fp_text reference BT1 (at -12.6 4.2 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value BATTERY (at 0 0 180) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_line (start -12 -5) (end -11 -5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -11.5 -4.5) (end -11.5 -5.5) (layer B.SilkS) (width 0.1524))
+    (fp_circle (center 0 0) (end 10 0) (layer Cmts.User) (width 0.1524))
+    (fp_arc (start 0 0) (end -7.838 -8) (angle -91.2) (layer B.SilkS) (width 0.1524))
+    (fp_arc (start 0 0) (end 7.838 8) (angle -91.2) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -7.838 -8) (end 7.838 -8) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -7.838 8) (end 7.838 8) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 10.639 3.5) (end 14.3 3.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 14.3 3.5) (end 14.3 -3.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 14.3 -3.5) (end 10.639 -3.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -10.639 3.5) (end -14.3 3.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -14.3 3.5) (end -14.3 -3.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -14.3 -3.5) (end -10.639 -3.5) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -14.65 0 180) (size 3.2 4.2) (layers 4_bot B.Paste B.Mask)
+      (net 98 /hackrf_if/VBAT))
+    (pad 2 smd rect (at 14.65 0 180) (size 3.2 4.2) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53B0991D) (tstamp 53AA2604)
+    (at 142 119.8 180)
+    (path /53A8BFC3/53A8C6A5)
+    (attr smd)
+    (fp_text reference C2 (at 0.2 -1.2 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0 180) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0 180) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.44958 0 180) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53BC270F) (tstamp 53AA260E)
+    (at 136.6 119.8 180)
+    (path /53A8BFC3/53A8C69F)
+    (attr smd)
+    (fp_text reference C3 (at 5.1 -0.7 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0 180) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0 180) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.44958 0 180) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53BC2708) (tstamp 53AA2618)
+    (at 133.6 119.8)
+    (path /53A8BFC3/53A8C6B1)
+    (attr smd)
+    (fp_text reference C4 (at -3.9 0.7) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.44958 0) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53B09A42) (tstamp 53AA2622)
+    (at 142 108.2)
+    (path /53A8BFC3/53A8C6AB)
+    (attr smd)
+    (fp_text reference C5 (at -11.8 0.6) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.44958 0) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53B09A37) (tstamp 53B0A490)
+    (at 133.2 108.6 180)
+    (path /53A8BFC3/53A8C687)
+    (attr smd)
+    (fp_text reference C6 (at 8.6 -0.4 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0 180) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0 180) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 22 /audio/VMID))
+    (pad 2 smd rect (at 0.44958 0 180) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53B09A3C) (tstamp 53B0A4A6)
+    (at 135.4 108.2)
+    (path /53A8BFC3/53A8C68D)
+    (attr smd)
+    (fp_text reference C10 (at -9.2 0.6) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 15 /audio/MICBIAS))
+    (pad 2 smd rect (at 0.44958 0) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capae:IPC_CAPAE830X620N (layer 4_bot) (tedit 53B09A6A) (tstamp 53AA43B4)
+    (at 154.2 120)
+    (tags "CASE E")
+    (path /53A8BFC3/53A8C256)
+    (attr smd)
+    (fp_text reference C18 (at -4.4 -4) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220U (at 0 0) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -4.20116 2.4003) (end -4.20116 -2.4003) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 4.20116 4.20116) (end -2.4003 4.20116) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.4003 -4.20116) (end 4.20116 -4.20116) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -4.20116 -2.4003) (end -2.4003 -4.20116) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -4.20116 2.4003) (end -2.4003 4.20116) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 4.20116 -4.20116) (end 4.20116 4.20116) (layer B.SilkS) (width 0.1524))
+    (fp_circle (center 0 0) (end 4.0005 0) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -5.72516 4.7498) (end 5.72516 4.7498) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 5.72516 4.7498) (end 5.72516 -4.7498) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 5.72516 -4.7498) (end -5.72516 -4.7498) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -5.72516 -4.7498) (end -5.72516 4.7498) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -3.1496 0) (size 4.15036 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 12 /audio/LHPOUT))
+    (pad 2 smd rect (at 3.1496 0) (size 4.15036 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 102 "Net-(C18-Pad2)"))
+  )
+
+  (module ipc_capae:IPC_CAPAE830X620N (layer 4_bot) (tedit 53B09A65) (tstamp 53AA26CA)
+    (at 154.2 110)
+    (tags "CASE E")
+    (path /53A8BFC3/53A8C25E)
+    (attr smd)
+    (fp_text reference C19 (at -4.4 4) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220U (at 0 0) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -4.20116 2.4003) (end -4.20116 -2.4003) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 4.20116 4.20116) (end -2.4003 4.20116) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.4003 -4.20116) (end 4.20116 -4.20116) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -4.20116 -2.4003) (end -2.4003 -4.20116) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -4.20116 2.4003) (end -2.4003 4.20116) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 4.20116 -4.20116) (end 4.20116 4.20116) (layer B.SilkS) (width 0.1524))
+    (fp_circle (center 0 0) (end 4.0005 0) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -5.72516 4.7498) (end 5.72516 4.7498) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 5.72516 4.7498) (end 5.72516 -4.7498) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 5.72516 -4.7498) (end -5.72516 -4.7498) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -5.72516 -4.7498) (end -5.72516 4.7498) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -3.1496 0) (size 4.15036 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 17 /audio/RHPOUT))
+    (pad 2 smd rect (at 3.1496 0) (size 4.15036 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 103 "Net-(C19-Pad2)"))
+  )
+
+  (module ipc_capc:IPC_CAPC1608X95N (layer 4_bot) (tedit 53B09A86) (tstamp 53AA26F6)
+    (at 162.8 120.8 90)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53A8C27E)
+    (attr smd)
+    (fp_text reference C22 (at -3.2 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220P (at 0 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 90) (size 0.94996 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 2 smd rect (at 0.8001 0 90) (size 0.94996 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 102 "Net-(C18-Pad2)"))
+  )
+
+  (module ipc_capc:IPC_CAPC1608X95N (layer 4_bot) (tedit 53B09A77) (tstamp 53AA2700)
+    (at 162.8 109.2 90)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53A8C284)
+    (attr smd)
+    (fp_text reference C23 (at 3.2 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220P (at 0 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 90) (size 0.94996 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 103 "Net-(C19-Pad2)"))
+    (pad 2 smd rect (at 0.8001 0 90) (size 0.94996 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capae:IPC_CAPAE430X540N (layer 4_bot) (tedit 53B0993F) (tstamp 53ADFB14)
+    (at 141.8 104.4 180)
+    (tags "CASE B")
+    (path /53A8BFC3/53A8C2AA)
+    (attr smd)
+    (fp_text reference C24 (at -2.6 2.2 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 1U (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start 3.52552 -2.75082) (end -3.52552 -2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -3.52552 -2.75082) (end -3.52552 2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -3.52552 2.75082) (end 3.52552 2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 3.52552 2.75082) (end 3.52552 -2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.14884 2.14884) (end -1.24968 2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 -1.24968) (end -2.14884 1.24968) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.24968 -2.14884) (end 2.14884 -2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 -1.24968) (end -1.24968 -2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 1.24968) (end -1.24968 2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_circle (center 0 0) (end 1.99898 0) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.14884 2.14884) (end 2.14884 -2.14884) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -1.75006 0 180) (size 2.55016 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 106 "Net-(C24-Pad1)"))
+    (pad 2 smd rect (at 1.75006 0 180) (size 2.55016 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 107 "Net-(C24-Pad2)"))
+  )
+
+  (module ipc_capc:IPC_CAPC1608X95N (layer 4_bot) (tedit 53B09AB4) (tstamp 53AA271B)
+    (at 170.8 122.2 180)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53A8C2A2)
+    (attr smd)
+    (fp_text reference C25 (at -0.8 1.4 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220P (at 0 0 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 180) (size 0.94996 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 107 "Net-(C24-Pad2)"))
+    (pad 2 smd rect (at 0.8001 0 180) (size 0.94996 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53B0979B) (tstamp 53AA272F)
+    (at 72.2 122.8)
+    (path /53A9129D/53AA73CE)
+    (attr smd)
+    (fp_text reference C27 (at -1 1.8) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.44958 0) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53C5B500) (tstamp 53AA2739)
+    (at 96 125.2 90)
+    (path /53A8C780/53A8D527)
+    (attr smd)
+    (fp_text reference C28 (at 0.8 -1.2 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0 90) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0 90) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.44958 0 90) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53B097F7) (tstamp 53AB74CF)
+    (at 97.2 125.2 90)
+    (path /53A8C780/53A8D548)
+    (attr smd)
+    (fp_text reference C29 (at 0 1.8 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0 90) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0 90) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 1 +1.8V))
+    (pad 2 smd rect (at 0.44958 0 90) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53B09B39) (tstamp 53AA274D)
+    (at 106 132.2)
+    (path /53A8C780/53A8D542)
+    (attr smd)
+    (fp_text reference C30 (at 0 -1.2) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.44958 0) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53B09B82) (tstamp 53AA2757)
+    (at 98.6 141.2 270)
+    (path /53A8C780/53A8D54E)
+    (attr smd)
+    (fp_text reference C31 (at -1.8 -1.2 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0 270) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0 270) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 1 +1.8V))
+    (pad 2 smd rect (at 0.44958 0 270) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53B09B7D) (tstamp 53AA276B)
+    (at 97 141.2 270)
+    (path /53A8C780/53A8D56C)
+    (attr smd)
+    (fp_text reference C33 (at -1.8 1.2 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0 270) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0 270) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 1 +1.8V))
+    (pad 2 smd rect (at 0.44958 0 270) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1005X55N (layer 4_bot) (tedit 53B097B0) (tstamp 53B30722)
+    (at 89.5 132.6 180)
+    (path /53A8C780/53A8D572)
+    (attr smd)
+    (fp_text reference C35 (at 0 1.2 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100N (at 0 0 180) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 0.90932 0.45974) (end 0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.90932 -0.45974) (end -0.90932 -0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 -0.45974) (end -0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.90932 0.45974) (end 0.90932 0.45974) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.44958 0 180) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 1 +1.8V))
+    (pad 2 smd rect (at 0.44958 0 180) (size 0.61976 0.61976) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC1608X90N (layer 4_bot) (tedit 53B09B4A) (tstamp 53AA27A7)
+    (at 97.4 150.6)
+    (path /53A8C780/53A8D5AA)
+    (attr smd)
+    (fp_text reference C39 (at 2.8 0.8) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value DNI (at 0 0) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.2032))
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.2032))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.2032))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.2032))
+    (pad 1 smd rect (at -0.8001 0) (size 0.94996 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 108 "Net-(C39-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0) (size 0.94996 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module hole:HOLE_3200UM_VIAS (layer 1_top) (tedit 53AA3E1E) (tstamp 53AA27C8)
+    (at 126 104)
+    (path /5369BBC4)
+    (fp_text reference H1 (at 0 0) (layer F.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)))
+    )
+    (fp_text value HOLE1 (at 0 0) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.1524)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 0 -2.2) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -2.2 0) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 0 2.2) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 2.2 0) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 1.55 -1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -1.55 -1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -1.55 1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 1.55 1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+  )
+
+  (module hole:HOLE_3200UM_VIAS (layer 1_top) (tedit 53AA3E1E) (tstamp 53AA27D5)
+    (at 176 104)
+    (path /5369BBD8)
+    (fp_text reference H2 (at 0 0) (layer F.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)))
+    )
+    (fp_text value HOLE1 (at 0 0) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.1524)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 0 -2.2) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -2.2 0) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 0 2.2) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 2.2 0) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 1.55 -1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -1.55 -1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -1.55 1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 1.55 1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+  )
+
+  (module hole:HOLE_3200UM_VIAS (layer 1_top) (tedit 53AA3E1E) (tstamp 53AA27E2)
+    (at 176 171)
+    (path /5369BBEC)
+    (fp_text reference H3 (at 0 0) (layer F.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)))
+    )
+    (fp_text value HOLE1 (at 0 0) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.1524)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 0 -2.2) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -2.2 0) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 0 2.2) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 2.2 0) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 1.55 -1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -1.55 -1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -1.55 1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 1.55 1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+  )
+
+  (module hole:HOLE_3200UM_VIAS (layer 1_top) (tedit 53AA3E1E) (tstamp 53AA27EF)
+    (at 64 171)
+    (path /5369BC00)
+    (fp_text reference H4 (at 0 0) (layer F.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)))
+    )
+    (fp_text value HOLE1 (at 0 0) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.1524)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 0 -2.2) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -2.2 0) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 0 2.2) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 2.2 0) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 1.55 -1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -1.55 -1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -1.55 1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 1.55 1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+  )
+
+  (module hole:HOLE_3200UM_VIAS (layer 1_top) (tedit 53AA3E1E) (tstamp 53AA27FC)
+    (at 64 104)
+    (path /5369BC14)
+    (fp_text reference H5 (at 0 0) (layer F.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)))
+    )
+    (fp_text value HOLE1 (at 0 0) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.1524)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 0 -2.2) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -2.2 0) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 0 2.2) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 2.2 0) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 1.55 -1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -1.55 -1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at -1.55 1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+    (pad 1 thru_hole circle (at 1.55 1.55) (size 0.6 0.6) (drill 0.381) (layers *.Cu *.Mask)
+      (net 99 GND))
+  )
+
+  (module molex:MOLEX_54132-40XX_LR locked (layer 4_bot) (tedit 53B09BB0) (tstamp 53AA2868)
+    (at 82.5 137.5 90)
+    (path /53A9129D/53A91651)
+    (attr smd)
+    (fp_text reference J3 (at -13.1 2.1 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value KINGTECH_DW0240A2BZ_FPC (at 0 0 90) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_line (start -10.25 1.1) (end -10.25 -2.5) (layer Eco1.User) (width 0.1524))
+    (fp_line (start 10.25 -2.5) (end 10.25 1.1) (layer Eco1.User) (width 0.1524))
+    (fp_line (start -10.25 1.1) (end 10.25 1.1) (layer Eco1.User) (width 0.1524))
+    (fp_line (start 12.15 -3.2) (end 12.15 -2.5) (layer Eco1.User) (width 0.1524))
+    (fp_line (start -12.15 -3.2) (end -12.15 -2.5) (layer Eco1.User) (width 0.1524))
+    (fp_line (start -12.75 -2.5) (end 12.75 -2.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -12.75 -2.5) (end -12.75 -1.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -12.75 -1.5) (end -12.15 -1.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -12.15 -1.5) (end -12.15 2.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 12.75 -2.5) (end 12.75 -1.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 12.75 -1.5) (end 12.15 -1.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 12.15 -1.5) (end 12.15 2.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 12.75 -4.2) (end 12.75 -3.2) (layer Eco1.User) (width 0.1524))
+    (fp_line (start -12.75 -4.2) (end -12.75 -3.2) (layer Eco1.User) (width 0.1524))
+    (fp_line (start -12.15 -4.2) (end -12.75 -4.2) (layer Eco1.User) (width 0.1524))
+    (fp_line (start -12.75 -3.2) (end -12.15 -3.2) (layer Eco1.User) (width 0.1524))
+    (fp_line (start 12.15 -4.2) (end 12.75 -4.2) (layer Eco1.User) (width 0.1524))
+    (fp_line (start 12.75 -3.2) (end 12.15 -3.2) (layer Eco1.User) (width 0.1524))
+    (fp_line (start 12.15 -4.2) (end -12.15 -4.2) (layer Eco1.User) (width 0.1524))
+    (fp_line (start -12.15 2.5) (end 12.15 2.5) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -9.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 109 "Net-(J3-Pad1)"))
+    (pad 2 smd rect (at -9.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 3 smd rect (at -8.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 4 smd rect (at -8.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 5 smd rect (at -7.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 59 /hackrf_if/LCD_RESET#))
+    (pad 6 smd rect (at -7.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 60 /hackrf_if/LCD_RS))
+    (pad 7 smd rect (at -6.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 58 /hackrf_if/LCD_RD#))
+    (pad 8 smd rect (at -6.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 9 smd rect (at -5.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 10 smd rect (at -5.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 62 /hackrf_if/LCD_WR#))
+    (pad 11 smd rect (at -4.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 12 smd rect (at -4.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 13 smd rect (at -3.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 14 smd rect (at -3.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 15 smd rect (at -2.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 16 smd rect (at -2.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 17 smd rect (at -1.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 18 smd rect (at -1.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 49 /hackrf_if/LCD_DB15))
+    (pad 19 smd rect (at -0.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 48 /hackrf_if/LCD_DB14))
+    (pad 20 smd rect (at -0.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 47 /hackrf_if/LCD_DB13))
+    (pad 21 smd rect (at 0.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 46 /hackrf_if/LCD_DB12))
+    (pad 22 smd rect (at 0.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 45 /hackrf_if/LCD_DB11))
+    (pad 23 smd rect (at 1.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 44 /hackrf_if/LCD_DB10))
+    (pad 24 smd rect (at 1.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 57 /hackrf_if/LCD_DB9))
+    (pad 25 smd rect (at 2.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 56 /hackrf_if/LCD_DB8))
+    (pad 26 smd rect (at 2.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 55 /hackrf_if/LCD_DB7))
+    (pad 27 smd rect (at 3.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 54 /hackrf_if/LCD_DB6))
+    (pad 28 smd rect (at 3.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 53 /hackrf_if/LCD_DB5))
+    (pad 29 smd rect (at 4.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 52 /hackrf_if/LCD_DB4))
+    (pad 30 smd rect (at 4.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 51 /hackrf_if/LCD_DB3))
+    (pad 31 smd rect (at 5.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 50 /hackrf_if/LCD_DB2))
+    (pad 32 smd rect (at 5.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 43 /hackrf_if/LCD_DB1))
+    (pad 33 smd rect (at 6.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 42 /hackrf_if/LCD_DB0))
+    (pad 34 smd rect (at 6.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 61 /hackrf_if/LCD_TE))
+    (pad 35 smd rect (at 7.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 36 smd rect (at 7.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 1 +1.8V))
+    (pad 37 smd rect (at 8.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 96 /hackrf_if/TP_R))
+    (pad 38 smd rect (at 8.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 94 /hackrf_if/TP_D))
+    (pad 39 smd rect (at 9.25 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 95 /hackrf_if/TP_L))
+    (pad 40 smd rect (at 9.75 2.8 90) (size 0.3 1.2) (layers 4_bot B.Paste B.Mask)
+      (net 97 /hackrf_if/TP_U))
+    (pad SHLD smd rect (at -11.45 0.9 90) (size 1.6 0.8) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad SHLD smd rect (at -11.85 -0.3 90) (size 2.4 1.6) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad SHLD smd rect (at 11.85 -0.3 90) (size 2.4 1.6) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad SHLD smd rect (at 11.45 0.9 90) (size 1.6 0.8) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_indc:IPC_INDC1608X95N (layer 4_bot) (tedit 53B30A63) (tstamp 53AA28A2)
+    (at 165.4 121.6 180)
+    (path /53A8BFC3/53A8C2E2)
+    (attr smd)
+    (fp_text reference L4 (at 0 -1.4 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value L (at 0 0 180) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 180) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 116 "Net-(L4-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0 180) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 102 "Net-(C18-Pad2)"))
+  )
+
+  (module ipc_indc:IPC_INDC1608X95N (layer 4_bot) (tedit 53B09A7D) (tstamp 53AA28AC)
+    (at 165.4 110 180)
+    (path /53A8BFC3/53A8C2E8)
+    (attr smd)
+    (fp_text reference L5 (at 0 1.4 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value L (at 0 0 180) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 180) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 117 "Net-(L5-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0 180) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 103 "Net-(C19-Pad2)"))
+  )
+
+  (module ipc_indc:IPC_INDC1608X95N (layer 4_bot) (tedit 53B09AA3) (tstamp 53AA28B6)
+    (at 174.8 121.6 180)
+    (path /53A8BFC3/53A8C2EE)
+    (attr smd)
+    (fp_text reference L6 (at -2.4 0 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value L (at 0 0 180) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 180) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 118 "Net-(L6-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0 180) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_indc:IPC_INDC1608X95N (layer 4_bot) (tedit 53B09AA7) (tstamp 53AA28D4)
+    (at 174.2 124 180)
+    (path /53A8BFC3/53A8C2F4)
+    (attr smd)
+    (fp_text reference L9 (at -2.4 0 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value L (at 0 0 180) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 180) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 123 "Net-(L9-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0 180) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 107 "Net-(C24-Pad2)"))
+  )
+
+  (module lcd_kingtech:KINGTECH_DW0240A2BZ_PANEL locked (layer 1_top) (tedit 53C5BC95) (tstamp 53AA2904)
+    (at 62 137.5 270)
+    (path /53A9129D/53A8C752)
+    (attr smd)
+    (fp_text reference LCD1 (at 4.5 -4 270) (layer F.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)))
+    )
+    (fp_text value KINGTECH_DW0240A2BZ_PANEL (at 0 0 270) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -10.25 -18) (end 10.25 -18) (layer Eco2.User) (width 0.1524))
+    (fp_line (start -12.96 -10.72) (end -10.25 -13.39) (layer Eco2.User) (width 0.1524))
+    (fp_line (start 10.25 -22) (end -10.25 -22) (layer Eco2.User) (width 0.1524))
+    (fp_line (start -10.25 -22) (end -10.25 -13.39) (layer Eco2.User) (width 0.1524))
+    (fp_line (start 10.25 -12.5) (end 10.25 -22) (layer Eco2.User) (width 0.1524))
+    (fp_line (start 18.54 -12.5) (end 10.25 -12.5) (layer Eco2.User) (width 0.1524))
+    (fp_line (start 18.54 -0.5) (end 18.54 -12.5) (layer Eco2.User) (width 0.1524))
+    (fp_line (start 10.25 -0.5) (end 18.54 -0.5) (layer Eco2.User) (width 0.1524))
+    (fp_line (start 10.25 0) (end 10.25 1.5) (layer Eco1.User) (width 0.1524))
+    (fp_line (start -12.96 -0.5) (end -12.96 -10.72) (layer Eco2.User) (width 0.1524))
+    (fp_line (start -10.25 0) (end -10.25 1.5) (layer Eco1.User) (width 0.1524))
+    (fp_line (start -10.25 -0.5) (end -12.96 -0.5) (layer Eco2.User) (width 0.1524))
+    (fp_line (start 0 -31.83) (end 0 -33.83) (layer Cmts.User) (width 0.1524))
+    (fp_line (start -1 -32.83) (end 1 -32.83) (layer Cmts.User) (width 0.1524))
+    (fp_line (start -21.36 0) (end -22.06 0) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -22.06 0) (end -22.06 -2.5) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -22.06 -2.5) (end -21.36 -2.5) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 21.36 0) (end 22.06 0) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 22.06 0) (end 22.06 -2.5) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 22.06 -2.5) (end 21.36 -2.5) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 21.36 -60.26) (end 22.06 -60.26) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 22.06 -60.26) (end 22.06 -57.76) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 22.06 -57.76) (end 21.36 -57.76) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -21.36 -60.26) (end -22.06 -60.26) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -22.06 -60.26) (end -22.06 -57.76) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -22.06 -57.76) (end -21.36 -57.76) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -18.36 -57.31) (end 18.36 -57.31) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 18.36 -57.31) (end 18.36 -8.35) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 18.36 -8.35) (end -18.36 -8.35) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -18.36 -8.35) (end -18.36 -57.31) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 21.36 0) (end -21.36 0) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -21.36 0) (end -21.36 -60.26) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -21.36 -60.26) (end 21.36 -60.26) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 21.36 -60.26) (end 21.36 0) (layer F.SilkS) (width 0.1524))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B09A40) (tstamp 53B0A464)
+    (at 139.4 108.2 180)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53A8C2B0)
+    (attr smd)
+    (fp_text reference R10 (at 11 -0.6 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 47K (at 0 0 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 180) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 106 "Net-(C24-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0 180) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 16 /audio/MICIN))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B09A8C) (tstamp 53AA2A28)
+    (at 161 120.8 90)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53A8C264)
+    (attr smd)
+    (fp_text reference R11 (at -3.2 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 47K (at 0 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 90) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 2 smd rect (at 0.8001 0 90) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 102 "Net-(C18-Pad2)"))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B09A73) (tstamp 53AA2A32)
+    (at 161 109.2 90)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53A8C26A)
+    (attr smd)
+    (fp_text reference R12 (at 3.2 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 47K (at 0 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 90) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 103 "Net-(C19-Pad2)"))
+    (pad 2 smd rect (at 0.8001 0 90) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B09AAF) (tstamp 53AE455C)
+    (at 170.8 124 180)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53A8C296)
+    (attr smd)
+    (fp_text reference R17 (at -0.6 -1.4 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 47K (at 0 0 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 180) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 107 "Net-(C24-Pad2)"))
+    (pad 2 smd rect (at 0.8001 0 180) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B09A2B) (tstamp 53B0A485)
+    (at 136.4 104.4)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53A8C29C)
+    (attr smd)
+    (fp_text reference R18 (at -0.6 -1.4) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 680R (at 0 0) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 15 /audio/MICBIAS))
+    (pad 2 smd rect (at 0.8001 0) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 107 "Net-(C24-Pad2)"))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B09B9B) (tstamp 53AA2A78)
+    (at 87.8 146.4 270)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A9129D/53A91657)
+    (attr smd)
+    (fp_text reference R19 (at -0.8 -1.4 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 47K (at 0 0 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 270) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 59 /hackrf_if/LCD_RESET#))
+    (pad 2 smd rect (at 0.8001 0 270) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B09B8D) (tstamp 53AA2A82)
+    (at 94.6 148.3 90)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A9129D/53A91635)
+    (attr smd)
+    (fp_text reference R20 (at 2.6 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 47K (at 0 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 90) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 2 smd rect (at 0.8001 0 90) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 41 /hackrf_if/LCD_BACKLIGHT))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B30AF0) (tstamp 53AE033F)
+    (at 138.5 120.9 90)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8C780/53A915E9)
+    (attr smd)
+    (fp_text reference R22 (at -1.1 1.5 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220R (at 0 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 90) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 24 /hackrf_if/CPLD_TDI))
+    (pad 2 smd rect (at 0.8001 0 90) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 5 /audio/I2S0_RX_SDA))
+  )
+
+  (module cui:CUI_CMA-4544PF-W locked (layer 1_top) (tedit 53B09C41) (tstamp 53AA2B41)
+    (at 145.8 110.4 270)
+    (path /53A8BFC3/53A8C2D6)
+    (fp_text reference X1 (at 0 -1.6 270) (layer F.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)))
+    )
+    (fp_text value MIC_ELECTRET (at 0 0 270) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 3.464102 2) (end 4.200223 2.425) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 0 4) (end 0 4.85) (layer F.SilkS) (width 0.1524))
+    (fp_arc (start 0 0) (end 3.464102 2) (angle 60) (layer F.SilkS) (width 0.1524))
+    (fp_circle (center 0 0) (end 4.85 0) (layer F.SilkS) (width 0.1524))
+    (pad 1 thru_hole circle (at -2 -1.27 270) (size 1.4 1.4) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
+      (net 107 "Net-(C24-Pad2)"))
+    (pad 2 thru_hole circle (at -2 1.27 270) (size 1.4 1.4) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
+      (net 99 GND))
+  )
+
+  (module ipc_resc:IPC_RESCAXS80P160X320X60-8N (layer 4_bot) (tedit 53B09AF9) (tstamp 53AB0D66)
+    (at 149.3 158.5 90)
+    (path /53A8BFC3/53AB09AD)
+    (attr smd)
+    (fp_text reference RP1 (at -0.1 2.7 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220R (at 0 0 90) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_line (start -1.6 1.95) (end 1.6 1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.6 1.95) (end 1.6 -1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.6 -1.95) (end -1.6 -1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.6 -1.95) (end -1.6 1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.1 1.7) (end 0.1 1.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.1 1.7) (end 0.1 -1.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.1 -1.7) (end -0.1 -1.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.1 -1.7) (end -0.1 1.7) (layer B.SilkS) (width 0.1524))
+    (pad 2 smd rect (at -0.85 0.4 90) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 10 /audio/I2S0_WS))
+    (pad 3 smd rect (at -0.85 -0.4 90) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 6 /audio/I2S0_SCK))
+    (pad 1 smd rect (at -0.85 1.3 90) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 8 /audio/I2S0_TX_SDA))
+    (pad 4 smd rect (at -0.85 -1.3 90) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 3 /audio/I2S0_MCLK))
+    (pad 5 smd rect (at 0.85 -1.3 90) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 4 /audio/I2S0_MCLK_R))
+    (pad 6 smd rect (at 0.85 -0.4 90) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 7 /audio/I2S0_SCK_R))
+    (pad 7 smd rect (at 0.85 0.4 90) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 11 /audio/I2S0_WS_R))
+    (pad 8 smd rect (at 0.85 1.3 90) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 9 /audio/I2S0_TX_SDA_R))
+  )
+
+  (module ipc_resc:IPC_RESCAXS80P160X320X60-8N (layer 4_bot) (tedit 53B09B05) (tstamp 53ACCB45)
+    (at 133.6 164 180)
+    (path /53A8C780/53AB047A)
+    (attr smd)
+    (fp_text reference RP4 (at -0.8 -2.6 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220R (at 0 0 180) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_line (start -1.6 1.95) (end 1.6 1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.6 1.95) (end 1.6 -1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.6 -1.95) (end -1.6 -1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.6 -1.95) (end -1.6 1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.1 1.7) (end 0.1 1.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.1 1.7) (end 0.1 -1.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.1 -1.7) (end -0.1 -1.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.1 -1.7) (end -0.1 1.7) (layer B.SilkS) (width 0.1524))
+    (pad 2 smd rect (at -0.85 0.4 180) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 75 /hackrf_if/P2_8))
+    (pad 3 smd rect (at -0.85 -0.4 180) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 77 /hackrf_if/P2_9))
+    (pad 1 smd rect (at -0.85 1.3 180) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 67 /hackrf_if/P2_1))
+    (pad 4 smd rect (at -0.85 -1.3 180) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 68 /hackrf_if/P2_13))
+    (pad 5 smd rect (at 0.85 -1.3 180) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 69 /hackrf_if/P2_13_R))
+    (pad 6 smd rect (at 0.85 -0.4 180) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 78 /hackrf_if/P2_9_R))
+    (pad 7 smd rect (at 0.85 0.4 180) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 76 /hackrf_if/P2_8_R))
+    (pad 8 smd rect (at 0.85 1.3 180) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 70 /hackrf_if/P2_1_R))
+  )
+
+  (module ipc_resc:IPC_RESCAXS80P160X320X60-8N (layer 4_bot) (tedit 53B09AD4) (tstamp 53AB0DCA)
+    (at 164.6 144.5 180)
+    (path /53A8C780/53AB04B9)
+    (attr smd)
+    (fp_text reference RP6 (at -1.6 2.5 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220R (at 0 0 180) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_line (start -1.6 1.95) (end 1.6 1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.6 1.95) (end 1.6 -1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.6 -1.95) (end -1.6 -1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.6 -1.95) (end -1.6 1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.1 1.7) (end 0.1 1.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.1 1.7) (end 0.1 -1.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.1 -1.7) (end -0.1 -1.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.1 -1.7) (end -0.1 1.7) (layer B.SilkS) (width 0.1524))
+    (pad 2 smd rect (at -0.85 0.4 180) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 33 /hackrf_if/GPIO3_14))
+    (pad 3 smd rect (at -0.85 -0.4 180) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 29 /hackrf_if/GPIO3_12))
+    (pad 1 smd rect (at -0.85 1.3 180) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 35 /hackrf_if/GPIO3_15))
+    (pad 4 smd rect (at -0.85 -1.3 180) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 31 /hackrf_if/GPIO3_13))
+    (pad 5 smd rect (at 0.85 -1.3 180) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 32 /hackrf_if/GPIO3_13_R))
+    (pad 6 smd rect (at 0.85 -0.4 180) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 30 /hackrf_if/GPIO3_12_R))
+    (pad 7 smd rect (at 0.85 0.4 180) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 34 /hackrf_if/GPIO3_14_R))
+    (pad 8 smd rect (at 0.85 1.3 180) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 36 /hackrf_if/GPIO3_15_R))
+  )
+
+  (module ipc_resc:IPC_RESCAXS80P160X320X60-8N (layer 4_bot) (tedit 53B193EC) (tstamp 53AB17FF)
+    (at 164.6 149.6 180)
+    (path /53A8C780/53AB04D6)
+    (attr smd)
+    (fp_text reference RP7 (at 1.8 -2.6 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220R (at 0 0 180) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_line (start -1.6 1.95) (end 1.6 1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.6 1.95) (end 1.6 -1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.6 -1.95) (end -1.6 -1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.6 -1.95) (end -1.6 1.95) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.1 1.7) (end 0.1 1.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.1 1.7) (end 0.1 -1.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.1 -1.7) (end -0.1 -1.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.1 -1.7) (end -0.1 1.7) (layer B.SilkS) (width 0.1524))
+    (pad 2 smd rect (at -0.85 0.4 180) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 25 /hackrf_if/GPIO3_10))
+    (pad 3 smd rect (at -0.85 -0.4 180) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 37 /hackrf_if/GPIO3_8))
+    (pad 1 smd rect (at -0.85 1.3 180) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 27 /hackrf_if/GPIO3_11))
+    (pad 4 smd rect (at -0.85 -1.3 180) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 39 /hackrf_if/GPIO3_9))
+    (pad 5 smd rect (at 0.85 -1.3 180) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 40 /hackrf_if/GPIO3_9_R))
+    (pad 6 smd rect (at 0.85 -0.4 180) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 38 /hackrf_if/GPIO3_8_R))
+    (pad 7 smd rect (at 0.85 0.4 180) (size 1 0.5) (layers 4_bot B.Paste B.Mask)
+      (net 26 /hackrf_if/GPIO3_10_R))
+    (pad 8 smd rect (at 0.85 1.3 180) (size 1 0.7) (layers 4_bot B.Paste B.Mask)
+      (net 28 /hackrf_if/GPIO3_11_R))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B09AE6) (tstamp 53AB16DA)
+    (at 162.8 158.2 270)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8C780/53AB79CA)
+    (attr smd)
+    (fp_text reference R1 (at -2.4 0 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220R (at 0 0 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 270) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 74 /hackrf_if/P2_4_R))
+    (pad 2 smd rect (at 0.8001 0 270) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 73 /hackrf_if/P2_4))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B09AEA) (tstamp 53AB2F99)
+    (at 161 158.2 270)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8C780/53AB79D5)
+    (attr smd)
+    (fp_text reference R2 (at -2.4 0 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220R (at 0 0 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 270) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 72 /hackrf_if/P2_3_R))
+    (pad 2 smd rect (at 0.8001 0 270) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 71 /hackrf_if/P2_3))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B09AFE) (tstamp 53AB2FA3)
+    (at 145.2 158.2)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8C780/53AB79EA)
+    (attr smd)
+    (fp_text reference R3 (at 0 -1.4) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220R (at 0 0) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 66 /hackrf_if/P2_0_R))
+    (pad 2 smd rect (at 0.8001 0) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 65 /hackrf_if/P2_0))
+  )
+
+  (module ipc_capc:IPC_CAPC1608X95N (layer 4_bot) (tedit 53B098BE) (tstamp 53B07AAF)
+    (at 114.8 114.8 270)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53AF1137)
+    (attr smd)
+    (fp_text reference C14 (at 5.2 0.2 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220P (at 0 0 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 270) (size 0.94996 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 2 smd rect (at 0.8001 0 270) (size 0.94996 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 100 "Net-(C14-Pad2)"))
+  )
+
+  (module ipc_capc:IPC_CAPC1608X95N (layer 4_bot) (tedit 53B0989A) (tstamp 53B07AB9)
+    (at 114.8 110.6 270)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53AF112C)
+    (attr smd)
+    (fp_text reference C15 (at -1.6 3.8 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 220P (at 0 0 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 270) (size 0.94996 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 101 "Net-(C15-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0 270) (size 0.94996 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capae:IPC_CAPAE430X540N (layer 4_bot) (tedit 53B09853) (tstamp 53B07ACA)
+    (at 119.4 115.6 180)
+    (tags "CASE B")
+    (path /53A8BFC3/53AF15D9)
+    (attr smd)
+    (fp_text reference C16 (at -2.6 2.2 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 1U (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start 3.52552 -2.75082) (end -3.52552 -2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -3.52552 -2.75082) (end -3.52552 2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -3.52552 2.75082) (end 3.52552 2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 3.52552 2.75082) (end 3.52552 -2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.14884 2.14884) (end -1.24968 2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 -1.24968) (end -2.14884 1.24968) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.24968 -2.14884) (end 2.14884 -2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 -1.24968) (end -1.24968 -2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 1.24968) (end -1.24968 2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_circle (center 0 0) (end 1.99898 0) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.14884 2.14884) (end 2.14884 -2.14884) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -1.75006 0 180) (size 2.55016 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 13 /audio/LLINEIN))
+    (pad 2 smd rect (at 1.75006 0 180) (size 2.55016 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 100 "Net-(C14-Pad2)"))
+  )
+
+  (module ipc_capae:IPC_CAPAE430X540N (layer 4_bot) (tedit 53B0984B) (tstamp 53B07F9B)
+    (at 119.4 109.8 180)
+    (tags "CASE B")
+    (path /53A8BFC3/53AF15E8)
+    (attr smd)
+    (fp_text reference C17 (at -2.6 -2.2 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 1U (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start 3.52552 -2.75082) (end -3.52552 -2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -3.52552 -2.75082) (end -3.52552 2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -3.52552 2.75082) (end 3.52552 2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 3.52552 2.75082) (end 3.52552 -2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.14884 2.14884) (end -1.24968 2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 -1.24968) (end -2.14884 1.24968) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.24968 -2.14884) (end 2.14884 -2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 -1.24968) (end -1.24968 -2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 1.24968) (end -1.24968 2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_circle (center 0 0) (end 1.99898 0) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.14884 2.14884) (end 2.14884 -2.14884) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -1.75006 0 180) (size 2.55016 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 18 /audio/RLINEIN))
+    (pad 2 smd rect (at 1.75006 0 180) (size 2.55016 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 101 "Net-(C15-Pad1)"))
+  )
+
+  (module ipc_capae:IPC_CAPAE430X540N (layer 4_bot) (tedit 53B098CA) (tstamp 53B07AEC)
+    (at 96.4 109.8 180)
+    (tags "CASE B")
+    (path /53A8BFC3/53AF2762)
+    (attr smd)
+    (fp_text reference C20 (at -2.6 -2.2 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start 3.52552 -2.75082) (end -3.52552 -2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -3.52552 -2.75082) (end -3.52552 2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -3.52552 2.75082) (end 3.52552 2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 3.52552 2.75082) (end 3.52552 -2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.14884 2.14884) (end -1.24968 2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 -1.24968) (end -2.14884 1.24968) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.24968 -2.14884) (end 2.14884 -2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 -1.24968) (end -1.24968 -2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 1.24968) (end -1.24968 2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_circle (center 0 0) (end 1.99898 0) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.14884 2.14884) (end 2.14884 -2.14884) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -1.75006 0 180) (size 2.55016 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 14 /audio/LOUT))
+    (pad 2 smd rect (at 1.75006 0 180) (size 2.55016 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 104 "Net-(C20-Pad2)"))
+  )
+
+  (module ipc_capae:IPC_CAPAE430X540N (layer 4_bot) (tedit 53B098D1) (tstamp 53B07AFD)
+    (at 96.4 115.6 180)
+    (tags "CASE B")
+    (path /53A8BFC3/53AF2753)
+    (attr smd)
+    (fp_text reference C21 (at -2.6 2.2 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start 3.52552 -2.75082) (end -3.52552 -2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -3.52552 -2.75082) (end -3.52552 2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -3.52552 2.75082) (end 3.52552 2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 3.52552 2.75082) (end 3.52552 -2.75082) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.14884 2.14884) (end -1.24968 2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 -1.24968) (end -2.14884 1.24968) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.24968 -2.14884) (end 2.14884 -2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 -1.24968) (end -1.24968 -2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 1.24968) (end -1.24968 2.14884) (layer B.SilkS) (width 0.1524))
+    (fp_circle (center 0 0) (end 1.99898 0) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.14884 2.14884) (end 2.14884 -2.14884) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -1.75006 0 180) (size 2.55016 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 19 /audio/ROUT))
+    (pad 2 smd rect (at 1.75006 0 180) (size 2.55016 1.6002) (layers 4_bot B.Paste B.Mask)
+      (net 105 "Net-(C21-Pad2)"))
+  )
+
+  (module ipc_indc:IPC_INDC1608X95N (layer 4_bot) (tedit 53B300CD) (tstamp 53B07B07)
+    (at 111.4 104.8)
+    (path /53A8BFC3/53AF093C)
+    (attr smd)
+    (fp_text reference L1 (at -1 1.4) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value L (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 110 "Net-(L1-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_indc:IPC_INDC1608X95N (layer 4_bot) (tedit 53B09839) (tstamp 53B0860B)
+    (at 110.6 116.6 90)
+    (path /53A8BFC3/53AF20F3)
+    (attr smd)
+    (fp_text reference L2 (at -1 -1.4 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value L (at 0 0 90) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 90) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 112 "Net-(L2-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0 90) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 113 "Net-(L2-Pad2)"))
+  )
+
+  (module ipc_indc:IPC_INDC1608X95N (layer 4_bot) (tedit 53B0982D) (tstamp 53B07B1B)
+    (at 101.6 108.8 90)
+    (path /53A8BFC3/53AF20FE)
+    (attr smd)
+    (fp_text reference L3 (at -2.4 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value L (at 0 0 90) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 90) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 114 "Net-(L3-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0 90) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 115 "Net-(L3-Pad2)"))
+  )
+
+  (module ipc_indc:IPC_INDC1608X95N (layer 4_bot) (tedit 53B097BB) (tstamp 53B07B25)
+    (at 90 110.6 90)
+    (path /53A8BFC3/53AF25CC)
+    (attr smd)
+    (fp_text reference L7 (at -2.2 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value L (at 0 0 90) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 90) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 119 "Net-(L7-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0 90) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 120 "Net-(L7-Pad2)"))
+  )
+
+  (module ipc_indc:IPC_INDC1608X95N (layer 4_bot) (tedit 53B09804) (tstamp 53B07B2F)
+    (at 78.6 108.8 270)
+    (path /53A8BFC3/53AF25D7)
+    (attr smd)
+    (fp_text reference L8 (at 2.4 -0.4 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value L (at 0 0 270) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 270) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 121 "Net-(L8-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0 270) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 122 "Net-(L8-Pad2)"))
+  )
+
+  (module ipc_indc:IPC_INDC1608X95N (layer 4_bot) (tedit 53B300D4) (tstamp 53B07B39)
+    (at 88.4 104.8)
+    (path /53A8BFC3/53AF0931)
+    (attr smd)
+    (fp_text reference L10 (at -1 1.4) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value L (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start 1.524 0.7493) (end 1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.524 -0.7493) (end -1.524 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 -0.7493) (end -1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.524 0.7493) (end 1.524 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 111 "Net-(L10-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0) (size 0.94996 0.94996) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B098AE) (tstamp 53B07B65)
+    (at 114 117.4 180)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53AF0B7F)
+    (attr smd)
+    (fp_text reference R6 (at 0 -4.2 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 5K6 (at 0 0 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 180) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 100 "Net-(C14-Pad2)"))
+    (pad 2 smd rect (at 0.8001 0 180) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 112 "Net-(L2-Pad1)"))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B098A1) (tstamp 53B07B6F)
+    (at 114 108 180)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53AF0B74)
+    (attr smd)
+    (fp_text reference R7 (at 1 1.4 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 5K6 (at 0 0 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 180) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 101 "Net-(C15-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0 180) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 114 "Net-(L3-Pad1)"))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B098BC) (tstamp 53B07B79)
+    (at 113 114.8 270)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53AF0B8A)
+    (attr smd)
+    (fp_text reference R8 (at 5.2 -0.4 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 5K6 (at 0 0 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 270) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 2 smd rect (at 0.8001 0 270) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 100 "Net-(C14-Pad2)"))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B0989D) (tstamp 53B07B83)
+    (at 113 110.6 270)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53AF0B95)
+    (attr smd)
+    (fp_text reference R9 (at -1.6 3 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 5K6 (at 0 0 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 270) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 101 "Net-(C15-Pad1)"))
+    (pad 2 smd rect (at 0.8001 0 270) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B097BD) (tstamp 53B07B8D)
+    (at 91.8 110.6 90)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53AF2746)
+    (attr smd)
+    (fp_text reference R13 (at -2.6 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 47K (at 0 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 90) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 2 smd rect (at 0.8001 0 90) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 104 "Net-(C20-Pad2)"))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B097B5) (tstamp 53B07B97)
+    (at 91.8 116.4 270)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53AF273B)
+    (attr smd)
+    (fp_text reference R14 (at 2.6 0 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 47K (at 0 0 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0 270) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 105 "Net-(C21-Pad2)"))
+    (pad 2 smd rect (at 0.8001 0 270) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B097C6) (tstamp 53B07BA1)
+    (at 91 108)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53AF2725)
+    (attr smd)
+    (fp_text reference R15 (at -2.6 0) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100R (at 0 0) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 120 "Net-(L7-Pad2)"))
+    (pad 2 smd rect (at 0.8001 0) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 104 "Net-(C20-Pad2)"))
+  )
+
+  (module ipc_resc:IPC_RESC1608X55N (layer 4_bot) (tedit 53B097BA) (tstamp 53B07BAB)
+    (at 89.2 115.6)
+    (tags "1608 metric, 0603 imperial")
+    (path /53A8BFC3/53AF2730)
+    (attr smd)
+    (fp_text reference R16 (at -0.6 1.4) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 100R (at 0 0) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_line (start -1.50114 0.7493) (end 1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 0.7493) (end 1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.50114 -0.7493) (end -1.50114 -0.7493) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.50114 -0.7493) (end -1.50114 0.7493) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.8001 0) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 122 "Net-(L8-Pad2)"))
+    (pad 2 smd rect (at 0.8001 0) (size 0.89916 1.00076) (layers 4_bot B.Paste B.Mask)
+      (net 105 "Net-(C21-Pad2)"))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B108E0) (tstamp 53AA27BB)
+    (at 173.4 159 180)
+    (path /53A8C780/53A8D62C)
+    (attr smd)
+    (fp_text reference C41 (at -2.8 0 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 98 /hackrf_if/VBAT))
+    (pad 2 smd rect (at 0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B1092C) (tstamp 53AA27B1)
+    (at 97.6 144.8)
+    (path /53A8C780/53A8D592)
+    (attr smd)
+    (fp_text reference C40 (at 2.8 -1) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 1 +1.8V))
+    (pad 2 smd rect (at 0.89916 0) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B108F5) (tstamp 53AA279D)
+    (at 101.4 147.8 270)
+    (path /53A8C780/53A8D58C)
+    (attr smd)
+    (fp_text reference C38 (at 0 -2.2 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 270) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0 270) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.89916 0 270) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B108FA) (tstamp 53AB408E)
+    (at 90 140.7 180)
+    (path /53A8C780/53A8D5E0)
+    (attr smd)
+    (fp_text reference C37 (at 0 2.1 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 1 +1.8V))
+    (pad 2 smd rect (at 0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B1089D) (tstamp 53AA2789)
+    (at 90 125.7 180)
+    (path /53A8C780/53A8D5DA)
+    (attr smd)
+    (fp_text reference C36 (at 2.8 0.9 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 1 +1.8V))
+    (pad 2 smd rect (at 0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B10916) (tstamp 53AA2775)
+    (at 97 121.3 180)
+    (path /53A8C780/53A8D5C8)
+    (attr smd)
+    (fp_text reference C34 (at -2.8 -1.1 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B108EA) (tstamp 53AB19ED)
+    (at 123.5 158.9 180)
+    (path /53A8C780/53A8D5C2)
+    (attr smd)
+    (fp_text reference C32 (at 2.9 -1.1 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B1089A) (tstamp 53AA2725)
+    (at 76.2 123.2)
+    (path /53A9129D/53A8C71C)
+    (attr smd)
+    (fp_text reference C26 (at 2.8 -0.8) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.89916 0) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B108C2) (tstamp 53AA2672)
+    (at 144.6 111.4 270)
+    (path /53A8BFC3/53A8C720)
+    (attr smd)
+    (fp_text reference C13 (at 0 -2.2 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 270) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0 270) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.89916 0 270) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B108D2) (tstamp 53B0A47A)
+    (at 136.2 106.4)
+    (path /53A8BFC3/53A8C6F0)
+    (attr smd)
+    (fp_text reference C12 (at -2.6 -1.4) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 15 /audio/MICBIAS))
+    (pad 2 smd rect (at 0.89916 0) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B108AF) (tstamp 53AA265E)
+    (at 130.2 116.6 90)
+    (path /53A8BFC3/53A8C72C)
+    (attr smd)
+    (fp_text reference C11 (at 2.8 0 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 90) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0 90) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.89916 0 90) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53BC2715) (tstamp 53AA264A)
+    (at 135 122 180)
+    (path /53A8BFC3/53A8C708)
+    (attr smd)
+    (fp_text reference C9 (at 3.3 0 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B108CA) (tstamp 53AE5118)
+    (at 132.4 106.8 180)
+    (path /53A8BFC3/53A8C6F6)
+    (attr smd)
+    (fp_text reference C8 (at 2.6 0.6 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 22 /audio/VMID))
+    (pad 2 smd rect (at 0.89916 0 180) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B108BE) (tstamp 53AA2636)
+    (at 144.6 116.6 90)
+    (path /53A8BFC3/53A8C70E)
+    (attr smd)
+    (fp_text reference C7 (at 0 2.2 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 90) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0 90) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.89916 0 90) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B19259) (tstamp 53B19350)
+    (at 155.2 157.8)
+    (path /53A8C780/53B1911F)
+    (attr smd)
+    (fp_text reference C42 (at 2.9 1) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.89916 0) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_capc:IPC_CAPC2012X140N (layer 4_bot) (tedit 53B193EF) (tstamp 53B19576)
+    (at 165.2 154.4 270)
+    (path /53A8C780/53B1A065)
+    (attr smd)
+    (fp_text reference C43 (at 2.2 -1.6 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value 10U (at 0 0 270) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.72466 0.97536) (end 1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 0.97536) (end 1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.72466 -0.97536) (end -1.72466 -0.97536) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.72466 -0.97536) (end -1.72466 0.97536) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -0.89916 0 270) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at 0.89916 0 270) (size 1.15062 1.45034) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module fiducial:FIDUCIAL_65MIL (layer 4_bot) (tedit 53B2E496) (tstamp 53B2EF36)
+    (at 71.2 104.2)
+    (path /53B309AC)
+    (solder_mask_margin 2.99974)
+    (attr smd)
+    (fp_text reference FID1 (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value FIDUCIAL (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (pad "" smd circle (at 0 0) (size 1.651 1.651) (layers 4_bot B.Mask)
+      (solder_mask_margin 0.8255) (clearance 1.0795))
+  )
+
+  (module fiducial:FIDUCIAL_65MIL (layer 4_bot) (tedit 53B2E496) (tstamp 53B2EF3B)
+    (at 168.8 104.2)
+    (path /53B30B4C)
+    (solder_mask_margin 2.99974)
+    (attr smd)
+    (fp_text reference FID2 (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value FIDUCIAL (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (pad "" smd circle (at 0 0) (size 1.651 1.651) (layers 4_bot B.Mask)
+      (solder_mask_margin 0.8255) (clearance 1.0795))
+  )
+
+  (module fiducial:FIDUCIAL_65MIL (layer 4_bot) (tedit 53B2E496) (tstamp 53B2EF40)
+    (at 64.2 161.2)
+    (path /53B30CEC)
+    (solder_mask_margin 2.99974)
+    (attr smd)
+    (fp_text reference FID3 (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value FIDUCIAL (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (pad "" smd circle (at 0 0) (size 1.651 1.651) (layers 4_bot B.Mask)
+      (solder_mask_margin 0.8255) (clearance 1.0795))
+  )
+
+  (module fiducial:FIDUCIAL_65MIL (layer 4_bot) (tedit 53B2E496) (tstamp 53B2EF45)
+    (at 175.8 163.8)
+    (path /53B30E8C)
+    (solder_mask_margin 2.99974)
+    (attr smd)
+    (fp_text reference FID4 (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value FIDUCIAL (at 0 0) (layer B.SilkS) hide
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (pad "" smd circle (at 0 0) (size 1.651 1.651) (layers 4_bot B.Mask)
+      (solder_mask_margin 0.8255) (clearance 1.0795))
+  )
+
+  (module ck:CK_TSWB-3N-CB222_LFS (layer 1_top) (tedit 53B3003D) (tstamp 53AA2AAD)
+    (at 147.5 137.5 90)
+    (path /53A9129D/53A8C6FD)
+    (fp_text reference SW1 (at -0.1 -2.7 90) (layer F.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)))
+    )
+    (fp_text value CK_TSWB-3N-CB (at 0 0 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 11.45 0) (layer F.SilkS) (width 0.15))
+    (fp_circle (center 0 0) (end 4.05 0) (layer F.SilkS) (width 0.15))
+    (fp_circle (center 0 0) (end 16 0) (layer F.SilkS) (width 0.15))
+    (fp_circle (center 0 0) (end 17.2 0) (layer F.SilkS) (width 0.15))
+    (pad "" np_thru_hole circle (at -3.182 -3.182 90) (size 1.6 1.6) (drill 1.6) (layers *.Cu *.Mask)
+      (clearance 0.4))
+    (pad "" np_thru_hole circle (at 3.182 3.182 90) (size 1.6 1.6) (drill 1.6) (layers *.Cu *.Mask)
+      (clearance 0.4))
+    (pad CA thru_hole circle (at -6.548 -6.548 90) (size 2.1 2.1) (drill 1.4) (layers *.Cu *.Mask F.SilkS)
+      (net 99 GND))
+    (pad A thru_hole circle (at 6.548 6.548 90) (size 2.1 2.1) (drill 1.4) (layers *.Cu *.Mask F.SilkS)
+      (net 90 /hackrf_if/SW_ROT_A))
+    (pad "" np_thru_hole circle (at -10.607 -10.607 90) (size 4 4) (drill 4) (layers *.Cu *.Mask)
+      (clearance 0.4))
+    (pad "" np_thru_hole circle (at 10.607 -10.607 90) (size 4 4) (drill 4) (layers *.Cu *.Mask)
+      (clearance 0.4))
+    (pad "" np_thru_hole circle (at 10.607 10.607 90) (size 4 4) (drill 4) (layers *.Cu *.Mask)
+      (clearance 0.4))
+    (pad "" np_thru_hole circle (at -10.607 10.607 90) (size 4 4) (drill 4) (layers *.Cu *.Mask)
+      (clearance 0.4))
+    (pad S1 thru_hole circle (at -1.11 1.11 90) (size 2.1 2.1) (drill 1.4) (layers *.Cu *.Mask F.SilkS)
+      (net 92 /hackrf_if/SW_SEL))
+    (pad B thru_hole circle (at 6.548 -6.548 90) (size 2.1 2.1) (drill 1.4) (layers *.Cu *.Mask F.SilkS)
+      (net 91 /hackrf_if/SW_ROT_B))
+    (pad S3 thru_hole circle (at 16.15 -3.606 90) (size 2.1 2.1) (drill 1.4) (layers *.Cu *.Mask F.SilkS)
+      (net 89 /hackrf_if/SW_R))
+    (pad S2 thru_hole circle (at 7.75 15.104 90) (size 2.1 2.1) (drill 1.4) (layers *.Cu *.Mask F.SilkS)
+      (net 87 /hackrf_if/SW_D))
+    (pad CB thru_hole circle (at -3.253 16.08 90) (size 2.1 2.1) (drill 1.4) (layers *.Cu *.Mask F.SilkS)
+      (net 99 GND))
+    (pad S5 thru_hole circle (at -16.15 3.606 90) (size 2.1 2.1) (drill 1.4) (layers *.Cu *.Mask F.SilkS)
+      (net 88 /hackrf_if/SW_L))
+    (pad S4 thru_hole circle (at -7.75 -15.104 90) (size 2.1 2.1) (drill 1.4) (layers *.Cu *.Mask F.SilkS)
+      (net 93 /hackrf_if/SW_U))
+  )
+
+  (module cui:CUI_SJ-3524-SMT (layer 4_bot) (tedit 53B30009) (tstamp 53B07B5B)
+    (at 83 106 270)
+    (path /53A8BFC3/53AF0926)
+    (attr smd)
+    (fp_text reference P3 (at 8 3.8 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value TRS_JACK (at 0 0 270) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_line (start -6 3) (end 8.5 3) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 8.5 3) (end 8.5 -3) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 8.5 -3) (end -6 -3) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -6 -3) (end -6 3) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -6 2.5) (end -8.5 2.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -8.5 2.5) (end -8.5 -2.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -8.5 -2.5) (end -6 -2.5) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -3.6 -3.7 270) (size 2.2 2.8) (layers 4_bot B.Paste B.Mask)
+      (net 111 "Net-(L10-Pad1)"))
+    (pad 2 smd rect (at 5.8 -3.7 270) (size 2.8 2.8) (layers 4_bot B.Paste B.Mask)
+      (net 119 "Net-(L7-Pad1)"))
+    (pad 4 smd rect (at 9.7 1.075 270) (size 2.8 2.8) (layers 4_bot B.Paste B.Mask))
+    (pad 3 smd rect (at -1.6 3.7 270) (size 2.2 2.8) (layers 4_bot B.Paste B.Mask)
+      (net 121 "Net-(L8-Pad1)"))
+    (pad "" np_thru_hole circle (at -2.5 0 270) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask B.SilkS)
+      (clearance 0.4))
+    (pad "" np_thru_hole circle (at 4.5 0 270) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask B.SilkS)
+      (clearance 0.4))
+  )
+
+  (module cui:CUI_SJ-3524-SMT (layer 4_bot) (tedit 53B30010) (tstamp 53B07B4A)
+    (at 106 106 270)
+    (path /53A8BFC3/53AF0914)
+    (attr smd)
+    (fp_text reference P1 (at 8 3.8 270) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value TRS_JACK (at 0 0 270) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_line (start -6 3) (end 8.5 3) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 8.5 3) (end 8.5 -3) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 8.5 -3) (end -6 -3) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -6 -3) (end -6 3) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -6 2.5) (end -8.5 2.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -8.5 2.5) (end -8.5 -2.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -8.5 -2.5) (end -6 -2.5) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -3.6 -3.7 270) (size 2.2 2.8) (layers 4_bot B.Paste B.Mask)
+      (net 110 "Net-(L1-Pad1)"))
+    (pad 2 smd rect (at 5.8 -3.7 270) (size 2.8 2.8) (layers 4_bot B.Paste B.Mask)
+      (net 113 "Net-(L2-Pad2)"))
+    (pad 4 smd rect (at 9.7 1.075 270) (size 2.8 2.8) (layers 4_bot B.Paste B.Mask))
+    (pad 3 smd rect (at -1.6 3.7 270) (size 2.2 2.8) (layers 4_bot B.Paste B.Mask)
+      (net 115 "Net-(L3-Pad2)"))
+    (pad "" np_thru_hole circle (at -2.5 0 270) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask B.SilkS)
+      (clearance 0.4))
+    (pad "" np_thru_hole circle (at 4.5 0 270) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask B.SilkS)
+      (clearance 0.4))
+  )
+
+  (module cui:CUI_SJ-43516-SMT (layer 4_bot) (tedit 53B3001C) (tstamp 53AA3C96)
+    (at 172.1 114.8 180)
+    (path /53A8BFC3/53A8C2C6)
+    (attr smd)
+    (fp_text reference P2 (at -0.5 -3.8 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value TRRS_SW_JACK (at 0 0 180) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_line (start 8.5 -3) (end -1.5 -3) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.5 -3) (end -1.5 -3.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.5 -3.7) (end -7 -3.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 8.5 3) (end 8.5 -3) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -7 3) (end 8.5 3) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -7 3) (end -7 -3.7) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -7 2.5) (end -8.5 2.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -8.5 2.5) (end -8.5 -2.5) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -8.5 -2.5) (end -7 -2.5) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -6.4 -3.7 180) (size 2.2 2.8) (layers 4_bot B.Paste B.Mask)
+      (net 123 "Net-(L9-Pad1)"))
+    (pad 4 smd rect (at -3.6 -3.7 180) (size 2.2 2.8) (layers 4_bot B.Paste B.Mask)
+      (net 118 "Net-(L6-Pad1)"))
+    (pad 2 smd rect (at 5.8 -3.7 180) (size 2.8 2.8) (layers 4_bot B.Paste B.Mask)
+      (net 116 "Net-(L4-Pad1)"))
+    (pad 5 smd rect (at 9.9 0.75 180) (size 2.8 2.8) (layers 4_bot B.Paste B.Mask))
+    (pad 3 smd rect (at -1.7 3.7 180) (size 2 2.8) (layers 4_bot B.Paste B.Mask)
+      (net 117 "Net-(L5-Pad1)"))
+    (pad 6 smd rect (at -4.5 3.7 180) (size 2 2.8) (layers 4_bot B.Paste B.Mask))
+    (pad "" np_thru_hole circle (at -2.5 0 180) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask B.SilkS)
+      (clearance 0.4))
+    (pad "" np_thru_hole circle (at 4.5 0 180) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask B.SilkS)
+      (clearance 0.4))
+  )
+
+  (module ipc_sop:IPC_SOP65P780X200-28N (layer 4_bot) (tedit 53B30ABE) (tstamp 53AA2AD7)
+    (at 137.4 114 90)
+    (tags "JEDEC MO-150AH")
+    (path /53A8BFC3/53A8C66D)
+    (attr smd)
+    (fp_text reference U1 (at -5.2 6.2 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value WM8731SEDS (at 0 0 90) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_circle (center -4.184 4.98602) (end -4.084 4.98602) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.8 5.1) (end -1.8 -5.1) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -4.67614 5.4991) (end 4.67614 5.4991) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 4.67614 5.4991) (end 4.67614 -5.4991) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 4.67614 -5.4991) (end -4.67614 -5.4991) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -4.67614 -5.4991) (end -4.67614 5.4991) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.25044 5.10032) (end 2.25044 5.10032) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.25044 5.10032) (end 2.25044 -5.10032) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.25044 -5.10032) (end -2.25044 -5.10032) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.25044 -5.10032) (end -2.25044 5.10032) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -3.50012 4.22402 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at -3.50012 3.57378 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask))
+    (pad 3 smd rect (at -3.50012 2.92608 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 7 /audio/I2S0_SCK_R))
+    (pad 4 smd rect (at -3.50012 2.27584 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 9 /audio/I2S0_TX_SDA_R))
+    (pad 5 smd rect (at -3.50012 1.6256 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 11 /audio/I2S0_WS_R))
+    (pad 6 smd rect (at -3.50012 0.97536 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 5 /audio/I2S0_RX_SDA))
+    (pad 7 smd rect (at -3.50012 0.32512 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 11 /audio/I2S0_WS_R))
+    (pad 8 smd rect (at -3.50012 -0.32512 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 9 smd rect (at -3.50012 -0.97536 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 12 /audio/LHPOUT))
+    (pad 10 smd rect (at -3.50012 -1.6256 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 17 /audio/RHPOUT))
+    (pad 11 smd rect (at -3.50012 -2.27584 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 12 smd rect (at -3.50012 -2.92608 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 14 /audio/LOUT))
+    (pad 13 smd rect (at -3.50012 -3.57378 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 19 /audio/ROUT))
+    (pad 14 smd rect (at -3.50012 -4.22402 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 15 smd rect (at 3.50012 -4.22402 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 16 smd rect (at 3.50012 -3.57378 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 22 /audio/VMID))
+    (pad 17 smd rect (at 3.50012 -2.92608 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 15 /audio/MICBIAS))
+    (pad 18 smd rect (at 3.50012 -2.27584 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 16 /audio/MICIN))
+    (pad 19 smd rect (at 3.50012 -1.6256 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 18 /audio/RLINEIN))
+    (pad 20 smd rect (at 3.50012 -0.97536 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 13 /audio/LLINEIN))
+    (pad 21 smd rect (at 3.50012 -0.32512 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 22 smd rect (at 3.50012 0.32512 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 23 smd rect (at 3.50012 0.97536 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 21 /audio/SDA))
+    (pad 24 smd rect (at 3.50012 1.6256 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 20 /audio/SCL))
+    (pad 25 smd rect (at 3.50012 2.27584 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 4 /audio/I2S0_MCLK_R))
+    (pad 26 smd rect (at 3.50012 2.92608 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask))
+    (pad 27 smd rect (at 3.50012 3.57378 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 28 smd rect (at 3.50012 4.22402 90) (size 1.84912 0.44958) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+  )
+
+  (module ipc_sot:IPC_SOT95P280X110-5N (layer 4_bot) (tedit 53B30B6B) (tstamp 53AA2AE9)
+    (at 98 147.8 180)
+    (path /53A8C780/53A8D586)
+    (attr smd)
+    (fp_text reference U2 (at -2.8 2.8 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value REGULATOR_SOT23_5 (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -0.47498 1.45034) (end 0.47498 1.45034) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.47498 1.45034) (end 0.47498 -1.45034) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.47498 -1.45034) (end -0.47498 -1.45034) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.47498 -1.45034) (end -0.47498 1.45034) (layer B.SilkS) (width 0.1524))
+    (fp_circle (center -1.97866 2.21996) (end -1.8796 2.21996) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 1.77546) (end 2.14884 1.77546) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.14884 1.77546) (end 2.14884 -1.77546) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.14884 -1.77546) (end -2.14884 -1.77546) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.14884 -1.77546) (end -2.14884 1.77546) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -1.34874 0.94996 180) (size 1.09982 0.59944) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 2 smd rect (at -1.34874 0 180) (size 1.09982 0.59944) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 3 smd rect (at -1.34874 -0.94996 180) (size 1.09982 0.59944) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 4 smd rect (at 1.34874 -0.94996 180) (size 1.09982 0.59944) (layers 4_bot B.Paste B.Mask)
+      (net 108 "Net-(C39-Pad1)"))
+    (pad 5 smd rect (at 1.34874 0.94996 180) (size 1.09982 0.59944) (layers 4_bot B.Paste B.Mask)
+      (net 1 +1.8V))
+  )
+
+  (module alps:ALPS_SCHA4B0100 (layer 4_bot) (tedit 53BC708B) (tstamp 53BC708B)
+    (at 68.4 114.6 90)
+    (path /53A9129D/53A8C6D0)
+    (attr smd)
+    (fp_text reference J2 (at -6.2 8.4 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value MICROSD_DETSW (at 0 0 90) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_line (start -5.5 -13.2) (end 3.5 -13.2) (layer Cmts.User) (width 0.1524))
+    (fp_line (start -5.5 -9.9) (end 3.5 -9.9) (layer Cmts.User) (width 0.1524))
+    (fp_line (start -5.5 -8.5) (end 3.5 -8.5) (layer Cmts.User) (width 0.1524))
+    (fp_line (start -1.4675 7.45) (end -1.4675 6.6) (layer Cmts.User) (width 0.1524))
+    (fp_line (start -1.4675 6.6) (end -2.5125 6.6) (layer Cmts.User) (width 0.1524))
+    (fp_line (start -2.5125 6.6) (end -2.5125 5.2) (layer Cmts.User) (width 0.1524))
+    (fp_line (start -2.5125 5.2) (end 1.0375 5.2) (layer Cmts.User) (width 0.1524))
+    (fp_line (start 1.0375 5.2) (end 1.0375 7.45) (layer Cmts.User) (width 0.1524))
+    (fp_line (start 1.0375 7.45) (end -1.4675 7.45) (layer Cmts.User) (width 0.1524))
+    (fp_line (start -6.0125 3.45) (end 2.8875 3.45) (layer Cmts.User) (width 0.1524))
+    (fp_line (start 2.8875 3.45) (end 2.8875 -0.95) (layer Cmts.User) (width 0.1524))
+    (fp_line (start 2.8875 -0.95) (end -6.0125 -0.95) (layer Cmts.User) (width 0.1524))
+    (fp_line (start -6.0125 -0.95) (end -6.0125 3.45) (layer Cmts.User) (width 0.1524))
+    (fp_line (start -6.9 -7.6) (end -6.9 7.6) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 6.9 -7.6) (end -6.9 -7.6) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 6.9 7.6) (end 6.9 -7.6) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -6.9 7.6) (end 6.9 7.6) (layer B.SilkS) (width 0.1524))
+    (pad SH smd rect (at -4.725 7.425 90) (size 1.2 0.85) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad A smd rect (at -3.475 7.475 90) (size 0.65 0.75) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad B smd rect (at 2.875 7.475 90) (size 0.65 0.75) (layers 4_bot B.Paste B.Mask)
+      (net 80 /hackrf_if/SD_CD))
+    (pad SH smd rect (at 6.025 7.425 90) (size 1.3 0.85) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad SH smd rect (at -6.575 -7.15 90) (size 0.95 1.1) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad SH smd rect (at 6.575 -7.25 90) (size 0.95 0.9) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 0 smd rect (at -3.275 -5.825 90) (size 0.7 0.95) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 0 smd rect (at 0.725 -5.825 90) (size 0.7 0.95) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 1 smd rect (at 2.225 -4.325 90) (size 0.7 1.05) (layers 4_bot B.Paste B.Mask)
+      (net 85 /hackrf_if/SD_DAT2))
+    (pad 2 smd rect (at 1.225 -4.325 90) (size 0.7 1.05) (layers 4_bot B.Paste B.Mask)
+      (net 86 /hackrf_if/SD_DAT3))
+    (pad 3 smd rect (at 0.225 -4.325 90) (size 0.7 1.05) (layers 4_bot B.Paste B.Mask)
+      (net 82 /hackrf_if/SD_CMD))
+    (pad 4 smd rect (at -0.775 -4.325 90) (size 0.7 1.05) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 5 smd rect (at -1.775 -4.325 90) (size 0.7 1.05) (layers 4_bot B.Paste B.Mask)
+      (net 81 /hackrf_if/SD_CLK))
+    (pad 6 smd rect (at -2.775 -4.325 90) (size 0.7 1.05) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 7 smd rect (at -3.775 -4.325 90) (size 0.7 1.05) (layers 4_bot B.Paste B.Mask)
+      (net 83 /hackrf_if/SD_DAT0))
+    (pad 8 smd rect (at -4.775 -4.325 90) (size 0.7 1.05) (layers 4_bot B.Paste B.Mask)
+      (net 84 /hackrf_if/SD_DAT1))
+  )
+
+  (module ipc_sot:IPC_SOT95P230X110-3N (layer 4_bot) (tedit 53C5B3D1) (tstamp 53C5B8DC)
+    (at 91.6 148.4 180)
+    (path /53A9129D/53C5B6EB)
+    (attr smd)
+    (fp_text reference Q1 (at -1.4 2.4 180) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value MOSFET_N (at 0 0 180) (layer B.SilkS)
+      (effects (font (thickness 0.3048)) (justify mirror))
+    )
+    (fp_line (start -1.89992 1.75006) (end 1.89992 1.75006) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.89992 1.75006) (end 1.89992 -1.75006) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 1.89992 -1.75006) (end -1.89992 -1.75006) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -1.89992 -1.75006) (end -1.89992 1.75006) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.32512 1.45034) (end 0.32512 1.45034) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.32512 1.45034) (end 0.32512 -1.45034) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 0.32512 -1.45034) (end -0.32512 -1.45034) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -0.32512 -1.45034) (end -0.32512 1.45034) (layer B.SilkS) (width 0.1524))
+    (pad 1 smd rect (at -1.15062 0.94996 180) (size 1.00076 0.59944) (layers 4_bot B.Paste B.Mask)
+      (net 41 /hackrf_if/LCD_BACKLIGHT))
+    (pad 2 smd rect (at -1.15062 -0.94996 180) (size 1.00076 0.59944) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 3 smd rect (at 1.15062 0 180) (size 1.00076 0.59944) (layers 4_bot B.Paste B.Mask)
+      (net 109 "Net-(J3-Pad1)"))
+  )
+
+  (module header:HEADER_13X2_REV_SM_254_AP (layer 4_bot) (tedit 53F39BE9) (tstamp 53AA297D)
+    (at 152.71 164.84 90)
+    (descr "MLE TSHSM-1")
+    (path /53A8C780/53A8CDB6)
+    (attr smd)
+    (fp_text reference P22 (at 4.44 16.69 90) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value HACKRF_ONE_P22 (at 0 0 90) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_circle (center 3.1 16.6) (end 2.9 16.6) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.5 16.51) (end 2.5 16.51) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.5 16.51) (end 2.5 -16.51) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.5 -16.51) (end -2.5 -16.51) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.5 -16.51) (end -2.5 16.51) (layer B.SilkS) (width 0.1524))
+    (pad 2 smd rect (at -2.73 15.24 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 1 smd rect (at 2.73 15.24 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 4 smd rect (at -2.73 12.7 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 3 smd rect (at 2.73 12.7 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 79 /hackrf_if/RESET#))
+    (pad 6 smd rect (at -2.73 10.16 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 71 /hackrf_if/P2_3))
+    (pad 5 smd rect (at 2.73 10.16 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 73 /hackrf_if/P2_4))
+    (pad 8 smd rect (at -2.73 7.62 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 7 smd rect (at 2.73 7.62 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 10 smd rect (at -2.73 5.08 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 9 smd rect (at 2.73 5.08 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 12 smd rect (at -2.73 2.54 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 11 smd rect (at 2.73 2.54 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 14 smd rect (at -2.73 0 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 13 smd rect (at 2.73 0 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 8 /audio/I2S0_TX_SDA))
+    (pad 16 smd rect (at -2.73 -2.54 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 6 /audio/I2S0_SCK))
+    (pad 15 smd rect (at 2.73 -2.54 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 10 /audio/I2S0_WS))
+    (pad 18 smd rect (at -2.73 -5.08 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 17 smd rect (at 2.73 -5.08 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 3 /audio/I2S0_MCLK))
+    (pad 20 smd rect (at -2.73 -7.62 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 65 /hackrf_if/P2_0))
+    (pad 19 smd rect (at 2.73 -7.62 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 67 /hackrf_if/P2_1))
+    (pad 22 smd rect (at -2.73 -10.16 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 68 /hackrf_if/P2_13))
+    (pad 21 smd rect (at 2.73 -10.16 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 77 /hackrf_if/P2_9))
+    (pad 24 smd rect (at -2.73 -12.7 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 21 /audio/SDA))
+    (pad 23 smd rect (at 2.73 -12.7 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 75 /hackrf_if/P2_8))
+    (pad 26 smd rect (at -2.73 -15.24 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 20 /audio/SCL))
+    (pad 25 smd rect (at 2.73 -15.24 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad "" np_thru_hole circle (at 0 13.97 90) (size 1.8 1.8) (drill 1.8) (layers *.Cu *.Mask)
+      (clearance 0.4))
+    (pad "" np_thru_hole circle (at 0 -13.97 90) (size 1.8 1.8) (drill 1.8) (layers *.Cu *.Mask)
+      (clearance 0.4))
+  )
+
+  (module header:HEADER_11X2_REV_SM_254_AP (layer 4_bot) (tedit 53F39BE1) (tstamp 53AA299C)
+    (at 123.5 143.25)
+    (descr "MLE TSHSM-1")
+    (path /53A8C780/53A8CDBE)
+    (attr smd)
+    (fp_text reference P28 (at 4.5 14.15) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value HACKRF_ONE_P28 (at 0 0) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_circle (center 3.1 14) (end 2.9 14) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.5 13.97) (end 2.5 13.97) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.5 13.97) (end 2.5 -13.97) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.5 -13.97) (end -2.5 -13.97) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.5 -13.97) (end -2.5 13.97) (layer B.SilkS) (width 0.1524))
+    (pad 2 smd rect (at -2.73 12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 1 smd rect (at 2.73 12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 4 smd rect (at -2.73 10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 86 /hackrf_if/SD_DAT3))
+    (pad 3 smd rect (at 2.73 10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 80 /hackrf_if/SD_CD))
+    (pad 6 smd rect (at -2.73 7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 84 /hackrf_if/SD_DAT1))
+    (pad 5 smd rect (at 2.73 7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 85 /hackrf_if/SD_DAT2))
+    (pad 8 smd rect (at -2.73 5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 64 /hackrf_if/P1_8))
+    (pad 7 smd rect (at 2.73 5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 83 /hackrf_if/SD_DAT0))
+    (pad 10 smd rect (at -2.73 2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 63 /hackrf_if/P1_5))
+    (pad 9 smd rect (at 2.73 2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 82 /hackrf_if/SD_CMD))
+    (pad 12 smd rect (at -2.73 0) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 11 smd rect (at 2.73 0) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 81 /hackrf_if/SD_CLK))
+    (pad 14 smd rect (at -2.73 -2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 13 smd rect (at 2.73 -2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 16 smd rect (at -2.73 -5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 15 smd rect (at 2.73 -5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 18 smd rect (at -2.73 -7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 17 smd rect (at 2.73 -7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 23 /hackrf_if/CPLD_TCK))
+    (pad 20 smd rect (at -2.73 -10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 19 smd rect (at 2.73 -10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 24 /hackrf_if/CPLD_TDI))
+    (pad 22 smd rect (at -2.73 -12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 21 smd rect (at 2.73 -12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad "" np_thru_hole circle (at 0 11.43) (size 1.8 1.8) (drill 1.8) (layers *.Cu *.Mask)
+      (clearance 0.4))
+    (pad "" np_thru_hole circle (at 0 -11.43) (size 1.8 1.8) (drill 1.8) (layers *.Cu *.Mask)
+      (clearance 0.4))
+  )
+
+  (module header:HEADER_11X2_REV_SM_254_AP (layer 4_bot) (tedit 53F39BF0) (tstamp 53AA295A)
+    (at 171.76 143.25)
+    (descr "MLE TSHSM-1")
+    (path /53A8C780/53A8CDAE)
+    (attr smd)
+    (fp_text reference P20 (at 4.44 14.15) (layer B.SilkS)
+      (effects (font (size 0.6096 0.6096) (thickness 0.1524)) (justify mirror))
+    )
+    (fp_text value HACKRF_ONE_P20 (at 0 0) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_circle (center 3.1 14) (end 2.9 14) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.5 13.97) (end 2.5 13.97) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.5 13.97) (end 2.5 -13.97) (layer B.SilkS) (width 0.1524))
+    (fp_line (start 2.5 -13.97) (end -2.5 -13.97) (layer B.SilkS) (width 0.1524))
+    (fp_line (start -2.5 -13.97) (end -2.5 13.97) (layer B.SilkS) (width 0.1524))
+    (pad 2 smd rect (at -2.73 12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 1 smd rect (at 2.73 12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 98 /hackrf_if/VBAT))
+    (pad 4 smd rect (at -2.73 10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 3 smd rect (at 2.73 10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 6 smd rect (at -2.73 7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 39 /hackrf_if/GPIO3_9))
+    (pad 5 smd rect (at 2.73 7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 37 /hackrf_if/GPIO3_8))
+    (pad 8 smd rect (at -2.73 5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 27 /hackrf_if/GPIO3_11))
+    (pad 7 smd rect (at 2.73 5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 25 /hackrf_if/GPIO3_10))
+    (pad 10 smd rect (at -2.73 2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 31 /hackrf_if/GPIO3_13))
+    (pad 9 smd rect (at 2.73 2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 29 /hackrf_if/GPIO3_12))
+    (pad 12 smd rect (at -2.73 0) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 35 /hackrf_if/GPIO3_15))
+    (pad 11 smd rect (at 2.73 0) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 33 /hackrf_if/GPIO3_14))
+    (pad 14 smd rect (at -2.73 -2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 96 /hackrf_if/TP_R))
+    (pad 13 smd rect (at 2.73 -2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 16 smd rect (at -2.73 -5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 94 /hackrf_if/TP_D))
+    (pad 15 smd rect (at 2.73 -5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 18 smd rect (at -2.73 -7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 95 /hackrf_if/TP_L))
+    (pad 17 smd rect (at 2.73 -7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 20 smd rect (at -2.73 -10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 97 /hackrf_if/TP_U))
+    (pad 19 smd rect (at 2.73 -10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+      (net 99 GND))
+    (pad 22 smd rect (at -2.73 -12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad 21 smd rect (at 2.73 -12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+    (pad "" np_thru_hole circle (at 0 11.43) (size 1.8 1.8) (drill 1.8) (layers *.Cu *.Mask)
+      (clearance 0.4))
+    (pad "" np_thru_hole circle (at 0 -11.43) (size 1.8 1.8) (drill 1.8) (layers *.Cu *.Mask)
+      (clearance 0.4))
+  )
+
+  (module ipc_qfp:IPC_QFP40P900X900X120-65N (layer 4_bot) (tedit 53FCB39E) (tstamp 53AA699D)
+    (at 97.6 132.8 270)
+    (path /53A8C780/53A8D11B)
+    (attr smd)
+    (fp_text reference U3 (at 0 0 270) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_text value 5M40ZE64 (at 0 0 270) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_circle (center -5.6 3) (end -5.5 3) (layer B.SilkS) (width 0.15))
+    (fp_line (start -5.2 5.2) (end -5.2 -5.2) (layer B.SilkS) (width 0.15))
+    (fp_line (start -5.2 -5.2) (end 5.2 -5.2) (layer B.SilkS) (width 0.15))
+    (fp_line (start 5.2 -5.2) (end 5.2 5.2) (layer B.SilkS) (width 0.15))
+    (fp_line (start 5.2 5.2) (end -5.2 5.2) (layer B.SilkS) (width 0.15))
+    (fp_line (start -3.1 3.1) (end -3.1 -3.1) (layer B.SilkS) (width 0.15))
+    (fp_line (start -3.1 -3.1) (end 3.1 -3.1) (layer B.SilkS) (width 0.15))
+    (fp_line (start 3.1 -3.1) (end 3.1 3.1) (layer B.SilkS) (width 0.15))
+    (fp_line (start 3.1 3.1) (end -3.1 3.1) (layer B.SilkS) (width 0.15))
+    (pad 1 smd rect (at -4.2 3 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 94 /hackrf_if/TP_D))
+    (pad 2 smd rect (at -4.2 2.6 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 95 /hackrf_if/TP_L))
+    (pad 3 smd rect (at -4.2 2.2 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 97 /hackrf_if/TP_U))
+    (pad 4 smd rect (at -4.2 1.8 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 41 /hackrf_if/LCD_BACKLIGHT))
+    (pad 5 smd rect (at -4.2 1.4 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask))
+    (pad 6 smd rect (at -4.2 1 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 7 smd rect (at -4.2 0.6 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask))
+    (pad 8 smd rect (at -4.2 0.2 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 1 +1.8V))
+    (pad 9 smd rect (at -4.2 -0.2 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 89 /hackrf_if/SW_R))
+    (pad 10 smd rect (at -4.2 -0.6 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 87 /hackrf_if/SW_D))
+    (pad 11 smd rect (at -4.2 -1 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 90 /hackrf_if/SW_ROT_A))
+    (pad 12 smd rect (at -4.2 -1.4 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 91 /hackrf_if/SW_ROT_B))
+    (pad 13 smd rect (at -4.2 -1.8 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 92 /hackrf_if/SW_SEL))
+    (pad 14 smd rect (at -4.2 -2.2 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 64 /hackrf_if/P1_8))
+    (pad 15 smd rect (at -4.2 -2.6 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 24 /hackrf_if/CPLD_TDI))
+    (pad 16 smd rect (at -4.2 -3 270) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 23 /hackrf_if/CPLD_TCK))
+    (pad 17 smd rect (at -3 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 63 /hackrf_if/P1_5))
+    (pad 18 smd rect (at -2.6 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 36 /hackrf_if/GPIO3_15_R))
+    (pad 19 smd rect (at -2.2 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 34 /hackrf_if/GPIO3_14_R))
+    (pad 20 smd rect (at -1.8 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 30 /hackrf_if/GPIO3_12_R))
+    (pad 21 smd rect (at -1.4 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 32 /hackrf_if/GPIO3_13_R))
+    (pad 22 smd rect (at -1 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 28 /hackrf_if/GPIO3_11_R))
+    (pad 23 smd rect (at -0.6 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 2 +3.3V))
+    (pad 24 smd rect (at -0.2 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 26 /hackrf_if/GPIO3_10_R))
+    (pad 25 smd rect (at 0.2 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 93 /hackrf_if/SW_U))
+    (pad 26 smd rect (at 0.6 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 38 /hackrf_if/GPIO3_8_R))
+    (pad 27 smd rect (at 1 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 40 /hackrf_if/GPIO3_9_R))
+    (pad 28 smd rect (at 1.4 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 88 /hackrf_if/SW_L))
+    (pad 29 smd rect (at 1.8 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 79 /hackrf_if/RESET#))
+    (pad 30 smd rect (at 2.2 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 74 /hackrf_if/P2_4_R))
+    (pad 31 smd rect (at 2.6 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 72 /hackrf_if/P2_3_R))
+    (pad 32 smd rect (at 3 -4.2 180) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 66 /hackrf_if/P2_0_R))
+    (pad 33 smd rect (at 4.2 -3 90) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 70 /hackrf_if/P2_1_R))
+    (pad 34 smd rect (at 4.2 -2.6 90) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask)
+      (net 76 /hackrf_if/P2_8_R))
+    (pad 35 smd rect (at 4.2 -2.2 90) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask))
+    (pad 36 smd rect (at 4.2 -1.8 90) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask))
+    (pad 37 smd rect (at 4.2 -1.4 90) (size 1.5 0.2) (layers 4_bot B.Paste B.Mask))
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+        (xy 174 109) (xy 178 109) (xy 178 166) (xy 174 166) (xy 171 169)
+        (xy 171 173) (xy 69 173) (xy 69 169) (xy 66 166) (xy 62 166)
+        (xy 62 159) (xy 70 159) (xy 70 121.4) (xy 62 121.4) (xy 62 109)
+        (xy 66 109) (xy 69 106)
+      )
+    )
+  )
+  (zone (net 99) (net_name GND) (layer 2_pwr) (tstamp 53B317F9) (hatch edge 0.508)
+    (connect_pads (clearance 0.2))
+    (min_thickness 0.2)
+    (fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.3))
+    (polygon
+      (pts
+        (xy 60 100) (xy 180 100) (xy 180 175) (xy 60 175)
+      )
+    )
+  )
+  (zone (net 0) (net_name "") (layer 1_top) (tstamp 53B3161C) (hatch edge 0.508)
+    (connect_pads (clearance 0.2))
+    (min_thickness 0.2)
+    (keepout (tracks allowed) (vias allowed) (copperpour not_allowed))
+    (fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.3))
+    (polygon
+      (pts
+        (xy 69 102) (xy 121 102) (xy 121 106) (xy 124 109) (xy 128 109)
+        (xy 131 106) (xy 131 102) (xy 171 102) (xy 171 105.8) (xy 171 106)
+        (xy 174 109) (xy 178 109) (xy 178 166) (xy 174 166) (xy 171 169)
+        (xy 171 173) (xy 69 173) (xy 69 169) (xy 66 166) (xy 62 166)
+        (xy 62 159) (xy 70 159) (xy 70 121.4) (xy 62 121.4) (xy 62 109)
+        (xy 66 109) (xy 69 106)
+      )
+    )
+  )
+  (zone (net 99) (net_name GND) (layer 1_top) (tstamp 53B315F1) (hatch edge 0.508)
+    (connect_pads (clearance 0.2))
+    (min_thickness 0.2)
+    (fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.3))
+    (polygon
+      (pts
+        (xy 60 100) (xy 180 100) (xy 180 175) (xy 60 175)
+      )
+    )
+  )
+  (zone (net 0) (net_name "") (layer B.SilkS) (tstamp 53C7F92D) (hatch edge 0.508)
+    (connect_pads (clearance 0.2))
+    (min_thickness 0.1524)
+    (fill (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
+    (polygon
+      (pts
+        (xy 119 172) (xy 118 173) (xy 108 173) (xy 107 172) (xy 107 168)
+        (xy 108 167) (xy 118 167) (xy 119 168)
+      )
+    )
+  )
+)
diff --git a/hardware/portapack_h1/portapack_h1.net b/hardware/portapack_h1/portapack_h1.net
new file mode 100644
index 00000000..066a9db8
--- /dev/null
+++ b/hardware/portapack_h1/portapack_h1.net
@@ -0,0 +1,1828 @@
+(export (version D)
+  (design
+    (source portapack_h1.sch)
+    (date "Thursday, July 17, 2014 'AMt' 08:44:16 AM")
+    (tool "eeschema (2014-03-01 BZR 4730)-product"))
+  (components
+    (comp (ref H1)
+      (value HOLE1)
+      (libsource (lib hole) (part HOLE1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5369BBC4))
+    (comp (ref H2)
+      (value HOLE1)
+      (libsource (lib hole) (part HOLE1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5369BBD8))
+    (comp (ref H3)
+      (value HOLE1)
+      (libsource (lib hole) (part HOLE1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5369BBEC))
+    (comp (ref H4)
+      (value HOLE1)
+      (libsource (lib hole) (part HOLE1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5369BC00))
+    (comp (ref H5)
+      (value HOLE1)
+      (libsource (lib hole) (part HOLE1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5369BC14))
+    (comp (ref LOGO1)
+      (value SHAREBRAINED)
+      (libsource (lib sharebrained) (part SHAREBRAINED))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 53B1AE0D))
+    (comp (ref LOGO2)
+      (value PORTAPACK_H1)
+      (libsource (lib sharebrained) (part PORTAPACK_H1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 53B1B509))
+    (comp (ref FID1)
+      (value FIDUCIAL)
+      (libsource (lib fiducial) (part FIDUCIAL))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 53B309AC))
+    (comp (ref FID2)
+      (value FIDUCIAL)
+      (libsource (lib fiducial) (part FIDUCIAL))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 53B30B4C))
+    (comp (ref FID3)
+      (value FIDUCIAL)
+      (libsource (lib fiducial) (part FIDUCIAL))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 53B30CEC))
+    (comp (ref FID4)
+      (value FIDUCIAL)
+      (libsource (lib fiducial) (part FIDUCIAL))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 53B30E8C))
+    (comp (ref C18)
+      (value 220U)
+      (fields
+        (field (name Mfr) Nichicon)
+        (field (name Part) UWX1A221MCL1GB))
+      (libsource (lib passive) (part CP))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C256))
+    (comp (ref C19)
+      (value 220U)
+      (fields
+        (field (name Mfr) Nichicon)
+        (field (name Part) UWX1A221MCL1GB))
+      (libsource (lib passive) (part CP))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C25E))
+    (comp (ref R11)
+      (value 47K)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-0747KL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C264))
+    (comp (ref R12)
+      (value 47K)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-0747KL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C26A))
+    (comp (ref C22)
+      (value 220P)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM1885C1H221JA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C27E))
+    (comp (ref C23)
+      (value 220P)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM1885C1H221JA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C284))
+    (comp (ref R17)
+      (value 47K)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-0747KL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C296))
+    (comp (ref R18)
+      (value 680R)
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C29C))
+    (comp (ref C25)
+      (value 220P)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM1885C1H221JA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C2A2))
+    (comp (ref C24)
+      (value 1U)
+      (fields
+        (field (name Mfr) Kemet)
+        (field (name Part) EDK105M050A9BAA))
+      (libsource (lib passive) (part CP))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C2AA))
+    (comp (ref R10)
+      (value 47K)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-0747KL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C2B0))
+    (comp (ref P2)
+      (value TRRS_SW_JACK)
+      (fields
+        (field (name Mfr) CUI)
+        (field (name Part) SJ-43514-SMT))
+      (libsource (lib trs_jack) (part TRRS_SW_JACK))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C2C6))
+    (comp (ref X1)
+      (value MIC_ELECTRET)
+      (fields
+        (field (name Mfr) CUI)
+        (field (name Part) CMA-4544PF-W))
+      (libsource (lib microphone) (part MIC_ELECTRET))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C2D6))
+    (comp (ref L4)
+      (value L)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) BLM18HE152SN1D))
+      (libsource (lib passive) (part L))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C2E2))
+    (comp (ref L5)
+      (value L)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) BLM18HE152SN1D))
+      (libsource (lib passive) (part L))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C2E8))
+    (comp (ref L6)
+      (value L)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) BLM18HE152SN1D))
+      (libsource (lib passive) (part L))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C2EE))
+    (comp (ref L9)
+      (value L)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) BLM18HE152SN1D))
+      (libsource (lib passive) (part L))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C2F4))
+    (comp (ref U1)
+      (value WM8731SEDS)
+      (fields
+        (field (name Mfr) Wolfson)
+        (field (name Part) WM8731SEDS/V))
+      (libsource (lib wolfson) (part WM8731SEDS))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C66D))
+    (comp (ref C6)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C687))
+    (comp (ref C10)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C68D))
+    (comp (ref C3)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C69F))
+    (comp (ref C2)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C6A5))
+    (comp (ref C5)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C6AB))
+    (comp (ref C4)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C6B1))
+    (comp (ref C12)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C6F0))
+    (comp (ref C8)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C6F6))
+    (comp (ref C9)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C708))
+    (comp (ref C7)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C70E))
+    (comp (ref C13)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C720))
+    (comp (ref C11)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53A8C72C))
+    (comp (ref RP1)
+      (value 220R)
+      (fields
+        (field (name Mfr) Panasonic)
+        (field (name Part) EXB-38V221JV))
+      (libsource (lib passive) (part RPACK4))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AB09AD))
+    (comp (ref P1)
+      (value TRS_JACK)
+      (fields
+        (field (name Mfr) Switchcraft)
+        (field (name Part) 35RASMT2BHNTRX))
+      (libsource (lib trs_jack) (part TRS_JACK))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF0914))
+    (comp (ref P3)
+      (value TRS_JACK)
+      (fields
+        (field (name Mfr) Switchcraft)
+        (field (name Part) 35RASMT2BHNTRX))
+      (libsource (lib trs_jack) (part TRS_JACK))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF0926))
+    (comp (ref L10)
+      (value L)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) BLM18HE152SN1D))
+      (libsource (lib passive) (part L))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF0931))
+    (comp (ref L1)
+      (value L)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) BLM18HE152SN1D))
+      (libsource (lib passive) (part L))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF093C))
+    (comp (ref R7)
+      (value 5K6)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-075K6L))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF0B74))
+    (comp (ref R6)
+      (value 5K6)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-075K6L))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF0B7F))
+    (comp (ref R8)
+      (value 5K6)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-075K6L))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF0B8A))
+    (comp (ref R9)
+      (value 5K6)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-075K6L))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF0B95))
+    (comp (ref C15)
+      (value 220P)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM1885C1H221JA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF112C))
+    (comp (ref C14)
+      (value 220P)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM1885C1H221JA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF1137))
+    (comp (ref C16)
+      (value 1U)
+      (fields
+        (field (name Mfr) Kemet)
+        (field (name Part) EDK105M050A9BAA))
+      (libsource (lib passive) (part CP))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF15D9))
+    (comp (ref C17)
+      (value 1U)
+      (fields
+        (field (name Mfr) Kemet)
+        (field (name Part) EDK105M050A9BAA))
+      (libsource (lib passive) (part CP))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF15E8))
+    (comp (ref L2)
+      (value L)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) BLM18HE152SN1D))
+      (libsource (lib passive) (part L))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF20F3))
+    (comp (ref L3)
+      (value L)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) BLM18HE152SN1D))
+      (libsource (lib passive) (part L))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF20FE))
+    (comp (ref L7)
+      (value L)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) BLM18HE152SN1D))
+      (libsource (lib passive) (part L))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF25CC))
+    (comp (ref L8)
+      (value L)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) BLM18HE152SN1D))
+      (libsource (lib passive) (part L))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF25D7))
+    (comp (ref R15)
+      (value 100R)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-07100RL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF2725))
+    (comp (ref R16)
+      (value 100R)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-07100RL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF2730))
+    (comp (ref R14)
+      (value 47K)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-0747KL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF273B))
+    (comp (ref R13)
+      (value 47K)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-0747KL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF2746))
+    (comp (ref C21)
+      (value 10U)
+      (fields
+        (field (name Mfr) Kemet)
+        (field (name Part) EDK106M025A9BAA))
+      (libsource (lib passive) (part CP))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF2753))
+    (comp (ref C20)
+      (value 10U)
+      (fields
+        (field (name Mfr) Kemet)
+        (field (name Part) EDK106M025A9BAA))
+      (libsource (lib passive) (part CP))
+      (sheetpath (names /audio/) (tstamps /53A8BFC3/))
+      (tstamp 53AF2762))
+    (comp (ref R20)
+      (value 47K)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-0747KL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /lcd_sw_sd/) (tstamps /53A9129D/))
+      (tstamp 53A91635))
+    (comp (ref J3)
+      (value KINGTECH_DW0240A2BZ_FPC)
+      (fields
+        (field (name Mfr) FCI)
+        (field (name Part) 62684-401100ALF))
+      (libsource (lib lcd_kingtech) (part KINGTECH_DW0240A2BZ_FPC))
+      (sheetpath (names /lcd_sw_sd/) (tstamps /53A9129D/))
+      (tstamp 53A91651))
+    (comp (ref R19)
+      (value 47K)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-0747KL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /lcd_sw_sd/) (tstamps /53A9129D/))
+      (tstamp 53A91657))
+    (comp (ref J2)
+      (value MICROSD_DETSW)
+      (fields
+        (field (name Mfr) ALPS)
+        (field (name Part) SCHA4B0100))
+      (libsource (lib sd) (part MICROSD_DETSW))
+      (sheetpath (names /lcd_sw_sd/) (tstamps /53A9129D/))
+      (tstamp 53A8C6D0))
+    (comp (ref C27)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /lcd_sw_sd/) (tstamps /53A9129D/))
+      (tstamp 53AA73CE))
+    (comp (ref SW1)
+      (value CK_TSWB-3N-CB)
+      (fields
+        (field (name Mfr) C&K)
+        (field (name Part) "TSWB-3N-CB111 LFS"))
+      (libsource (lib ck) (part CK_TSWB-3N-CB))
+      (sheetpath (names /lcd_sw_sd/) (tstamps /53A9129D/))
+      (tstamp 53A8C6FD))
+    (comp (ref C26)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /lcd_sw_sd/) (tstamps /53A9129D/))
+      (tstamp 53A8C71C))
+    (comp (ref LCD1)
+      (value KINGTECH_DW0240A2BZ_PANEL)
+      (libsource (lib lcd_kingtech) (part KINGTECH_DW0240A2BZ_PANEL))
+      (sheetpath (names /lcd_sw_sd/) (tstamps /53A9129D/))
+      (tstamp 53A8C752))
+    (comp (ref Q1)
+      (value MOSFET_N)
+      (fields
+        (field (name Mfr) NXP)
+        (field (name Part) 2N7002P,215))
+      (libsource (lib mosfet) (part MOSFET_N))
+      (sheetpath (names /lcd_sw_sd/) (tstamps /53A9129D/))
+      (tstamp 53C5B6EB))
+    (comp (ref P20)
+      (value HACKRF_ONE_P20)
+      (fields
+        (field (name Mfr) Harwin)
+        (field (name Part) M20-8761146))
+      (libsource (lib hackrf_expansion) (part HACKRF_ONE_P20))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8CDAE))
+    (comp (ref P22)
+      (value HACKRF_ONE_P22)
+      (fields
+        (field (name Mfr) Harwin)
+        (field (name Part) M20-8761346))
+      (libsource (lib hackrf_expansion) (part HACKRF_ONE_P22))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8CDB6))
+    (comp (ref P28)
+      (value HACKRF_ONE_P28)
+      (fields
+        (field (name Mfr) Harwin)
+        (field (name Part) M20-8761146))
+      (libsource (lib hackrf_expansion) (part HACKRF_ONE_P28))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8CDBE))
+    (comp (ref U3)
+      (value 5M40ZE64)
+      (fields
+        (field (name Mfr) Altera)
+        (field (name Part) 5M40ZE64C5N))
+      (libsource (lib altera) (part 5M40ZE64))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D11B))
+    (comp (ref C28)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D527))
+    (comp (ref BT1)
+      (value BATTERY)
+      (fields
+        (field (name Mfr) MPD)
+        (field (name Part) BU2032SM-BT-GTR))
+      (libsource (lib battery) (part BATTERY))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D535))
+    (comp (ref C30)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D542))
+    (comp (ref C29)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D548))
+    (comp (ref C31)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D54E))
+    (comp (ref C33)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D56C))
+    (comp (ref C35)
+      (value 100N)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM155R61A104KA01))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D572))
+    (comp (ref U2)
+      (value REGULATOR_SOT23_5)
+      (fields
+        (field (name Mfr) Toshiba)
+        (field (name Part) TCR2EF18,LM))
+      (libsource (lib regulator) (part REGULATOR_SOT23_5))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D586))
+    (comp (ref C38)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D58C))
+    (comp (ref C40)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D592))
+    (comp (ref C39)
+      (value DNI)
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D5AA))
+    (comp (ref C32)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D5C2))
+    (comp (ref C34)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D5C8))
+    (comp (ref C36)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D5DA))
+    (comp (ref C37)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D5E0))
+    (comp (ref C41)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A8D62C))
+    (comp (ref R22)
+      (value 220R)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-07220RL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53A915E9))
+    (comp (ref RP4)
+      (value 220R)
+      (fields
+        (field (name Mfr) Panasonic)
+        (field (name Part) EXB-38V221JV))
+      (libsource (lib passive) (part RPACK4))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53AB047A))
+    (comp (ref RP6)
+      (value 220R)
+      (fields
+        (field (name Mfr) Panasonic)
+        (field (name Part) EXB-38V221JV))
+      (libsource (lib passive) (part RPACK4))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53AB04B9))
+    (comp (ref RP7)
+      (value 220R)
+      (fields
+        (field (name Mfr) Panasonic)
+        (field (name Part) EXB-38V221JV))
+      (libsource (lib passive) (part RPACK4))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53AB04D6))
+    (comp (ref R1)
+      (value 220R)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-07220RL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53AB79CA))
+    (comp (ref R2)
+      (value 220R)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-07220RL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53AB79D5))
+    (comp (ref R3)
+      (value 220R)
+      (fields
+        (field (name Mfr) Yageo)
+        (field (name Part) RC0603FR-07220RL))
+      (libsource (lib passive) (part R))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53AB79EA))
+    (comp (ref C42)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53B1911F))
+    (comp (ref C43)
+      (value 10U)
+      (fields
+        (field (name Mfr) Murata)
+        (field (name Part) GRM21BR61A106KE19))
+      (libsource (lib passive) (part C))
+      (sheetpath (names /hackrf_if/) (tstamps /53A8C780/))
+      (tstamp 53B1A065)))
+  (libparts
+    (libpart (lib wolfson) (part WM8731SEDS)
+      (footprints
+        (fp IPC_SOP65P780X200-28N))
+      (fields
+        (field (name Reference) U)
+        (field (name Value) WM8731SEDS))
+      (pins
+        (pin (num 1) (name DBVDD) (type power_in))
+        (pin (num 2) (name CLKOUT) (type output))
+        (pin (num 3) (name BCLK) (type BiDi))
+        (pin (num 4) (name DACDAT) (type input))
+        (pin (num 5) (name DACLRC) (type BiDi))
+        (pin (num 6) (name ADCDAT) (type output))
+        (pin (num 7) (name ADCLRC) (type BiDi))
+        (pin (num 8) (name HPVDD) (type power_in))
+        (pin (num 9) (name LHPOUT) (type output))
+        (pin (num 10) (name RHPOUT) (type output))
+        (pin (num 11) (name HPGND) (type power_in))
+        (pin (num 12) (name LOUT) (type output))
+        (pin (num 13) (name ROUT) (type output))
+        (pin (num 14) (name AVDD) (type power_in))
+        (pin (num 15) (name AGND) (type power_in))
+        (pin (num 16) (name VMID) (type output))
+        (pin (num 17) (name MICBIAS) (type output))
+        (pin (num 18) (name MICIN) (type input))
+        (pin (num 19) (name RLINEIN) (type input))
+        (pin (num 20) (name LLINEIN) (type input))
+        (pin (num 21) (name MODE) (type input))
+        (pin (num 22) (name CSB) (type input))
+        (pin (num 23) (name SDIN) (type BiDi))
+        (pin (num 24) (name SCLK) (type input))
+        (pin (num 25) (name XTI/MCLK) (type input))
+        (pin (num 26) (name XTO) (type output))
+        (pin (num 27) (name DCVDD) (type power_in))
+        (pin (num 28) (name DGND) (type power_in))))
+    (libpart (lib passive) (part C)
+      (footprints
+        (fp IPC_CAPC*))
+      (fields
+        (field (name Reference) C)
+        (field (name Value) C))
+      (pins
+        (pin (num 1) (name ~) (type passive))
+        (pin (num 2) (name ~) (type passive))))
+    (libpart (lib passive) (part CP)
+      (aliases
+        (alias CAPAPOL))
+      (footprints
+        (fp IPC_CAPCP*)
+        (fp IPC_CAPAE*)
+        (fp IPC_CAPMP*))
+      (fields
+        (field (name Reference) C)
+        (field (name Value) CP))
+      (pins
+        (pin (num 1) (name ~) (type passive))
+        (pin (num 2) (name ~) (type passive))))
+    (libpart (lib passive) (part L)
+      (footprints
+        (fp IPC_INDC*))
+      (fields
+        (field (name Reference) L)
+        (field (name Value) L))
+      (pins
+        (pin (num 1) (name 1) (type passive))
+        (pin (num 2) (name 2) (type passive))))
+    (libpart (lib passive) (part R)
+      (footprints
+        (fp IPC_RESC*))
+      (fields
+        (field (name Reference) R)
+        (field (name Value) R))
+      (pins
+        (pin (num 1) (name ~) (type passive))
+        (pin (num 2) (name ~) (type passive))))
+    (libpart (lib passive) (part RPACK4)
+      (footprints
+        (fp IPC_RESCAXS80P160X320X60-8N))
+      (fields
+        (field (name Reference) RP)
+        (field (name Value) RPACK4))
+      (pins
+        (pin (num 1) (name ~) (type passive))
+        (pin (num 2) (name ~) (type passive))
+        (pin (num 3) (name ~) (type passive))
+        (pin (num 4) (name ~) (type passive))
+        (pin (num 5) (name ~) (type passive))
+        (pin (num 6) (name ~) (type passive))
+        (pin (num 7) (name ~) (type passive))
+        (pin (num 8) (name ~) (type passive))))
+    (libpart (lib trs_jack) (part TRRS_SW_JACK)
+      (footprints
+        (fp CUI_SJ-43516-SMT))
+      (fields
+        (field (name Reference) P)
+        (field (name Value) TRRS_SW_JACK))
+      (pins
+        (pin (num 1) (name S) (type passive))
+        (pin (num 2) (name T) (type passive))
+        (pin (num 3) (name R1) (type passive))
+        (pin (num 4) (name R2) (type passive))
+        (pin (num 5) (name TSW) (type passive))
+        (pin (num 6) (name RSW) (type passive))))
+    (libpart (lib trs_jack) (part TRS_JACK)
+      (footprints
+        (fp CUI_SJ1-352XN)
+        (fp CUI_SJ-3523-SMT)
+        (fp CUI_SJ-3524-SMT))
+      (fields
+        (field (name Reference) P)
+        (field (name Value) TRS_JACK))
+      (pins
+        (pin (num 1) (name S) (type passive))
+        (pin (num 2) (name T) (type passive))
+        (pin (num 3) (name R) (type passive))))
+    (libpart (lib battery) (part BATTERY)
+      (footprints
+        (fp MPD_BU2032SM-BT-G))
+      (fields
+        (field (name Reference) BT)
+        (field (name Value) BATTERY))
+      (pins
+        (pin (num 1) (name +) (type passive))
+        (pin (num 2) (name -) (type passive))))
+    (libpart (lib mosfet) (part MOSFET_N)
+      (footprints
+        (fp IPC_SOT95P230X110-3N))
+      (fields
+        (field (name Reference) Q)
+        (field (name Value) MOSFET_N))
+      (pins
+        (pin (num 1) (name G) (type passive))
+        (pin (num 2) (name S) (type passive))
+        (pin (num 3) (name D) (type passive))))
+    (libpart (lib microphone) (part MIC_ELECTRET)
+      (footprints
+        (fp CUI_CMA-4544PF-W))
+      (fields
+        (field (name Reference) U)
+        (field (name Value) MIC_ELECTRET))
+      (pins
+        (pin (num 1) (name +) (type output))
+        (pin (num 2) (name -) (type output))))
+    (libpart (lib sd) (part MICROSD_DETSW)
+      (footprints
+        (fp HIROSE_DM3D)
+        (fp ALPS_SCHA4B0400))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) MICROSD_DETSW))
+      (pins
+        (pin (num 0) (name GND) (type power_in))
+        (pin (num 1) (name DAT2) (type BiDi))
+        (pin (num 2) (name DAT3/CD) (type BiDi))
+        (pin (num 3) (name CMD) (type BiDi))
+        (pin (num 4) (name VDD) (type power_in))
+        (pin (num 5) (name CLK) (type input))
+        (pin (num 6) (name VSS) (type power_in))
+        (pin (num 7) (name DAT0) (type BiDi))
+        (pin (num 8) (name DAT1) (type BiDi))
+        (pin (num A) (name DETA) (type passive))
+        (pin (num B) (name DETB) (type passive))
+        (pin (num SH) (name SHIELD) (type passive))))
+    (libpart (lib ck) (part CK_TSWB-3N-CB)
+      (footprints
+        (fp CK_TSWB-3N-CB*))
+      (fields
+        (field (name Reference) SW)
+        (field (name Value) CK_TSWB-3N-CB))
+      (pins
+        (pin (num A) (name ROT_A) (type BiDi))
+        (pin (num B) (name ROT_B) (type BiDi))
+        (pin (num CA) (name COM_A) (type BiDi))
+        (pin (num CB) (name COM_B) (type BiDi))
+        (pin (num S1) (name SEL) (type BiDi))
+        (pin (num S2) (name D) (type BiDi))
+        (pin (num S3) (name R) (type BiDi))
+        (pin (num S4) (name U) (type BiDi))
+        (pin (num S5) (name L) (type BiDi))))
+    (libpart (lib altera) (part 5M40ZE64)
+      (footprints
+        (fp IPC_QFP40P900X900X120-65N))
+      (fields
+        (field (name Reference) U)
+        (field (name Value) 5M40ZE64))
+      (pins
+        (pin (num 1) (name IO/DIFFIO_L1n) (type BiDi))
+        (pin (num 2) (name IO) (type BiDi))
+        (pin (num 3) (name IO/DIFFIO_L2p) (type BiDi))
+        (pin (num 4) (name IO/DIFFIO_L2n) (type BiDi))
+        (pin (num 5) (name IO) (type BiDi))
+        (pin (num 6) (name VCCIO1) (type power_in))
+        (pin (num 7) (name IO/CLK0) (type BiDi))
+        (pin (num 8) (name VCCINT) (type power_in))
+        (pin (num 9) (name IO/CLK1) (type BiDi))
+        (pin (num 10) (name IO) (type BiDi))
+        (pin (num 11) (name IO/DIFFIO_L3p) (type BiDi))
+        (pin (num 12) (name IO/DIFFIO_L3n) (type BiDi))
+        (pin (num 13) (name IO) (type BiDi))
+        (pin (num 14) (name TMS) (type input))
+        (pin (num 15) (name TDI) (type input))
+        (pin (num 16) (name TCK) (type input))
+        (pin (num 17) (name TDO) (type output))
+        (pin (num 18) (name IO/DIFFIO_B1p) (type BiDi))
+        (pin (num 19) (name IO/DIFFIO_B1n) (type BiDi))
+        (pin (num 20) (name IO/DIFFIO_B2p) (type BiDi))
+        (pin (num 21) (name IO/DIFFIO_B2n) (type BiDi))
+        (pin (num 22) (name IO/DIFFIO_B3p) (type BiDi))
+        (pin (num 23) (name VCCIO1) (type power_in))
+        (pin (num 24) (name IO/DIFFIO_B3n) (type BiDi))
+        (pin (num 25) (name IO) (type BiDi))
+        (pin (num 26) (name IO/DIFFIO_B4p) (type BiDi))
+        (pin (num 27) (name IO/DIFFIO_B4n) (type BiDi))
+        (pin (num 28) (name IO/DEV_OE/DIFFIO_B5p) (type BiDi))
+        (pin (num 29) (name IO/DEV_CLRn/DIFFIO_B5n) (type BiDi))
+        (pin (num 30) (name IO/DIFFIO_B6p) (type BiDi))
+        (pin (num 31) (name IO/DIFFIO_B6n) (type BiDi))
+        (pin (num 32) (name IO/DIFFIO_B7p) (type BiDi))
+        (pin (num 33) (name IO/DIFFIO_B7n) (type BiDi))
+        (pin (num 34) (name IO/DIFFIO_R4n) (type BiDi))
+        (pin (num 35) (name IO/DIFFIO_R4p) (type BiDi))
+        (pin (num 36) (name IO/DIFFIO_R3n) (type BiDi))
+        (pin (num 37) (name IO/DIFFIO_R3p) (type BiDi))
+        (pin (num 38) (name IO) (type BiDi))
+        (pin (num 39) (name VCCIO2) (type power_in))
+        (pin (num 40) (name IO/CLK2) (type BiDi))
+        (pin (num 41) (name VCCINT) (type power_in))
+        (pin (num 42) (name IO/CLK3) (type BiDi))
+        (pin (num 43) (name IO/DIFFIO_R2n) (type BiDi))
+        (pin (num 44) (name IO/DIFFIO_R2p) (type BiDi))
+        (pin (num 45) (name IO) (type BiDi))
+        (pin (num 46) (name IO/DIFFIO_R1n) (type BiDi))
+        (pin (num 47) (name IO/DIFFIO_R1p) (type BiDi))
+        (pin (num 48) (name IO) (type BiDi))
+        (pin (num 49) (name IO/DIFFIO_T6n) (type BiDi))
+        (pin (num 50) (name IO/DIFFIO_T6p) (type BiDi))
+        (pin (num 51) (name IO) (type BiDi))
+        (pin (num 52) (name IO/DIFFIO_T5n) (type BiDi))
+        (pin (num 53) (name IO/DIFFIO_T5p) (type BiDi))
+        (pin (num 54) (name IO/DIFFIO_T4n) (type BiDi))
+        (pin (num 55) (name IO/DIFFIO_T4p) (type BiDi))
+        (pin (num 56) (name IO/DIFFIO_T3n) (type BiDi))
+        (pin (num 57) (name VCCIO2) (type power_in))
+        (pin (num 58) (name IO/DIFFIO_T3p) (type BiDi))
+        (pin (num 59) (name IO/DIFFIO_T2n) (type BiDi))
+        (pin (num 60) (name IO/DIFFIO_T2p) (type BiDi))
+        (pin (num 61) (name IO/DIFFIO_T1n) (type BiDi))
+        (pin (num 62) (name IO) (type BiDi))
+        (pin (num 63) (name IO/DIFFIO_T1p) (type BiDi))
+        (pin (num 64) (name IO/DIFFIO_L1p) (type BiDi))
+        (pin (num 65) (name GND) (type power_in))))
+    (libpart (lib lcd_kingtech) (part KINGTECH_DW0240A2BZ_PANEL)
+      (footprints
+        (fp KINGTECH_DW0240A2BZ_PANEL))
+      (fields
+        (field (name Reference) LCD)
+        (field (name Value) KINGTECH_DW0240A2BZ_PANEL)))
+    (libpart (lib lcd_kingtech) (part KINGTECH_DW0240A2BZ_FPC)
+      (footprints
+        (fp MOLEX_54132-40XX_LR))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) KINGTECH_DW0240A2BZ_FPC))
+      (pins
+        (pin (num 1) (name LEDK) (type power_in))
+        (pin (num 2) (name LEDA) (type power_in))
+        (pin (num 3) (name GND) (type power_in))
+        (pin (num 4) (name VCI) (type power_in))
+        (pin (num 5) (name RESET#) (type input))
+        (pin (num 6) (name RS/SCL) (type input))
+        (pin (num 7) (name RD#) (type input))
+        (pin (num 8) (name CS#) (type input))
+        (pin (num 9) (name SDA) (type BiDi))
+        (pin (num 10) (name WR#/DC) (type input))
+        (pin (num 11) (name VSYNC) (type input))
+        (pin (num 12) (name HSYNC) (type input))
+        (pin (num 13) (name DOTCLK) (type input))
+        (pin (num 14) (name DE) (type input))
+        (pin (num 15) (name GND) (type power_in))
+        (pin (num 16) (name DB17) (type BiDi))
+        (pin (num 17) (name DB16) (type BiDi))
+        (pin (num 18) (name DB15) (type BiDi))
+        (pin (num 19) (name DB14) (type BiDi))
+        (pin (num 20) (name DB13) (type BiDi))
+        (pin (num 21) (name DB12) (type BiDi))
+        (pin (num 22) (name DB11) (type BiDi))
+        (pin (num 23) (name DB10) (type BiDi))
+        (pin (num 24) (name DB9) (type BiDi))
+        (pin (num 25) (name DB8) (type BiDi))
+        (pin (num 26) (name DB7) (type BiDi))
+        (pin (num 27) (name DB6) (type BiDi))
+        (pin (num 28) (name DB5) (type BiDi))
+        (pin (num 29) (name DB4) (type BiDi))
+        (pin (num 30) (name DB3) (type BiDi))
+        (pin (num 31) (name DB2) (type BiDi))
+        (pin (num 32) (name DB1) (type BiDi))
+        (pin (num 33) (name DB0) (type BiDi))
+        (pin (num 34) (name TE) (type output))
+        (pin (num 35) (name GND) (type power_in))
+        (pin (num 36) (name IOVCC) (type power_in))
+        (pin (num 37) (name TP_R) (type passive))
+        (pin (num 38) (name TP_D) (type passive))
+        (pin (num 39) (name TP_L) (type passive))
+        (pin (num 40) (name TP_U) (type passive))
+        (pin (num SHLD) (name ~) (type passive))))
+    (libpart (lib hackrf_expansion) (part HACKRF_ONE_P20)
+      (footprints
+        (fp HEADER_11X2_*_254))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) HACKRF_ONE_P20))
+      (pins
+        (pin (num 1) (name VBAT) (type power_in))
+        (pin (num 2) (name RTC_ALARM) (type output))
+        (pin (num 3) (name VCC) (type power_out))
+        (pin (num 4) (name WAKEUP) (type input))
+        (pin (num 5) (name GPIO3_8) (type BiDi))
+        (pin (num 6) (name GPIO3_9) (type BiDi))
+        (pin (num 7) (name GPIO3_10) (type BiDi))
+        (pin (num 8) (name GPIO3_11) (type BiDi))
+        (pin (num 9) (name GPIO3_12) (type BiDi))
+        (pin (num 10) (name GPIO3_13) (type BiDi))
+        (pin (num 11) (name GPIO3_14) (type BiDi))
+        (pin (num 12) (name GPIO3_15) (type BiDi))
+        (pin (num 13) (name GND) (type power_in))
+        (pin (num 14) (name ADC0_6) (type input))
+        (pin (num 15) (name GND) (type power_in))
+        (pin (num 16) (name ADC0_2) (type input))
+        (pin (num 17) (name VBUSCTRL) (type input))
+        (pin (num 18) (name ADC0_5) (type input))
+        (pin (num 19) (name GND) (type power_in))
+        (pin (num 20) (name ADC0_0) (type input))
+        (pin (num 21) (name VBUS) (type output))
+        (pin (num 22) (name VIN) (type power_in))))
+    (libpart (lib hackrf_expansion) (part HACKRF_ONE_P22)
+      (footprints
+        (fp HEADER_13X2_*_254))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) HACKRF_ONE_P22))
+      (pins
+        (pin (num 1) (name CLKOUT) (type output))
+        (pin (num 2) (name CLKIN) (type input))
+        (pin (num 3) (name RESET#) (type output))
+        (pin (num 4) (name GND) (type power_in))
+        (pin (num 5) (name I2C1_SCL) (type output))
+        (pin (num 6) (name I2C1_SDA) (type BiDi))
+        (pin (num 7) (name SPIFI_MISO) (type input))
+        (pin (num 8) (name SPIFI_SCK) (type output))
+        (pin (num 9) (name SPIFI_MOSI) (type output))
+        (pin (num 10) (name GND) (type power_in))
+        (pin (num 11) (name VCC) (type power_out))
+        (pin (num 12) (name I2S0_RX_SCK) (type output))
+        (pin (num 13) (name I2S0_RX_SDA) (type input))
+        (pin (num 14) (name I2S0_RX_MCLK) (type output))
+        (pin (num 15) (name I2S0_RX_WS) (type output))
+        (pin (num 16) (name I2S0_TX_SCK) (type output))
+        (pin (num 17) (name I2S0_TX_MCLK) (type output))
+        (pin (num 18) (name GND) (type power_in))
+        (pin (num 19) (name U0_RXD) (type input))
+        (pin (num 20) (name U0_TXD) (type output))
+        (pin (num 21) (name P2_9) (type BiDi))
+        (pin (num 22) (name P2_13) (type BiDi))
+        (pin (num 23) (name P2_8) (type BiDi))
+        (pin (num 24) (name SDA) (type BiDi))
+        (pin (num 25) (name CLK6) (type output))
+        (pin (num 26) (name SCL) (type output))))
+    (libpart (lib hackrf_expansion) (part HACKRF_ONE_P28)
+      (footprints
+        (fp HEADER_11X2_*_254))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) HACKRF_ONE_P28))
+      (pins
+        (pin (num 1) (name VCC) (type power_out))
+        (pin (num 2) (name GND) (type power_in))
+        (pin (num 3) (name SD_CD) (type BiDi))
+        (pin (num 4) (name SD_DAT3) (type BiDi))
+        (pin (num 5) (name SD_DAT2) (type BiDi))
+        (pin (num 6) (name SD_DAT1) (type BiDi))
+        (pin (num 7) (name SD_DAT0) (type BiDi))
+        (pin (num 8) (name SD_VOLT0) (type BiDi))
+        (pin (num 9) (name SD_CMD) (type BiDi))
+        (pin (num 10) (name SD_POW) (type BiDi))
+        (pin (num 11) (name SD_CLK) (type BiDi))
+        (pin (num 12) (name GND) (type power_in))
+        (pin (num 13) (name GCLK2) (type output))
+        (pin (num 14) (name GCK1) (type output))
+        (pin (num 15) (name B1AUX14) (type BiDi))
+        (pin (num 16) (name B1AUX13) (type BiDi))
+        (pin (num 17) (name CPLD_TCK) (type output))
+        (pin (num 18) (name BANK2F3M2) (type BiDi))
+        (pin (num 19) (name CPLD_TDI) (type input))
+        (pin (num 20) (name BANK2F3M6) (type BiDi))
+        (pin (num 21) (name BANK2F3M12) (type BiDi))
+        (pin (num 22) (name BANK2F3M4) (type BiDi))))
+    (libpart (lib regulator) (part REGULATOR_SOT23_5)
+      (footprints
+        (fp IPC_SOT95P280X110-5N))
+      (fields
+        (field (name Reference) U)
+        (field (name Value) REGULATOR_SOT23_5))
+      (pins
+        (pin (num 1) (name VIN) (type power_in))
+        (pin (num 2) (name GND) (type power_in))
+        (pin (num 3) (name EN) (type input))
+        (pin (num 4) (name BP) (type input))
+        (pin (num 5) (name VOUT) (type power_out))))
+    (libpart (lib hole) (part HOLE1)
+      (footprints
+        (fp *HOLE*))
+      (fields
+        (field (name Reference) H)
+        (field (name Value) HOLE1))
+      (pins
+        (pin (num 1) (name ~) (type passive))))
+    (libpart (lib sharebrained) (part PORTAPACK_H1)
+      (footprints
+        (fp portapack_text_300))
+      (fields
+        (field (name Reference) LOGO)
+        (field (name Value) PORTAPACK_H1)))
+    (libpart (lib sharebrained) (part SHAREBRAINED)
+      (footprints
+        (fp sharebrained_text_300))
+      (fields
+        (field (name Reference) LOGO)
+        (field (name Value) SHAREBRAINED)))
+    (libpart (lib fiducial) (part FIDUCIAL)
+      (footprints
+        (fp FIDUCIAL_65MIL))
+      (fields
+        (field (name Reference) FID)
+        (field (name Value) FIDUCIAL))))
+  (libraries
+    (library (logical lcd_kingtech)
+      (uri ../../../../library/kicad/lcd_kingtech.lib))
+    (library (logical battery)
+      (uri ../../../../library/kicad/battery.lib))
+    (library (logical trs_jack)
+      (uri ../../../../library/kicad/trs_jack.lib))
+    (library (logical mosfet)
+      (uri ../../../../library/kicad/mosfet.lib))
+    (library (logical microphone)
+      (uri ../../../../library/kicad/microphone.lib))
+    (library (logical sd)
+      (uri ../../../../library/kicad/sd.lib))
+    (library (logical altera)
+      (uri ../../../../library/kicad/altera.lib))
+    (library (logical ck)
+      (uri ../../../../library/kicad/ck.lib))
+    (library (logical hackrf_expansion)
+      (uri ../../../../library/kicad/hackrf_expansion.lib))
+    (library (logical passive)
+      (uri ../../../../library/kicad/passive.lib))
+    (library (logical wolfson)
+      (uri ../../../../library/kicad/wolfson.lib))
+    (library (logical regulator)
+      (uri ../../../../library/kicad/regulator.lib))
+    (library (logical hole)
+      (uri ../../../../library/kicad/hole.lib))
+    (library (logical fiducial)
+      (uri ../../../../library/kicad/fiducial.lib))
+    (library (logical sharebrained)
+      (uri ../../../../library/kicad/sharebrained.lib)))
+  (nets
+    (net (code 1) (name /hackrf_if/LCD_BACKLIGHT)
+      (node (ref U3) (pin 4))
+      (node (ref Q1) (pin 1))
+      (node (ref R20) (pin 2)))
+    (net (code 2) (name /hackrf_if/LCD_RESET#)
+      (node (ref U3) (pin 38))
+      (node (ref R19) (pin 1))
+      (node (ref J3) (pin 5)))
+    (net (code 3) (name /hackrf_if/LCD_RS)
+      (node (ref U3) (pin 43))
+      (node (ref J3) (pin 6)))
+    (net (code 4) (name /hackrf_if/LCD_RD#)
+      (node (ref U3) (pin 44))
+      (node (ref J3) (pin 7)))
+    (net (code 5) (name /audio/I2S0_TX_SDA)
+      (node (ref RP1) (pin 1))
+      (node (ref P22) (pin 13)))
+    (net (code 6) (name /audio/I2S0_WS)
+      (node (ref P22) (pin 15))
+      (node (ref RP1) (pin 2)))
+    (net (code 7) (name /audio/I2S0_MCLK)
+      (node (ref RP1) (pin 4))
+      (node (ref P22) (pin 17)))
+    (net (code 8) (name /audio/I2S0_SCK)
+      (node (ref P22) (pin 16))
+      (node (ref RP1) (pin 3)))
+    (net (code 9) (name /audio/SDA)
+      (node (ref P22) (pin 24))
+      (node (ref U1) (pin 23)))
+    (net (code 10) (name /audio/SCL)
+      (node (ref U1) (pin 24))
+      (node (ref P22) (pin 26)))
+    (net (code 11) (name /hackrf_if/SD_CD)
+      (node (ref J2) (pin B))
+      (node (ref P28) (pin 3)))
+    (net (code 12) (name /hackrf_if/SD_DAT2)
+      (node (ref P28) (pin 5))
+      (node (ref J2) (pin 1)))
+    (net (code 13) (name /hackrf_if/SD_DAT0)
+      (node (ref P28) (pin 7))
+      (node (ref J2) (pin 7)))
+    (net (code 14) (name /hackrf_if/SD_CMD)
+      (node (ref P28) (pin 9))
+      (node (ref J2) (pin 3)))
+    (net (code 15) (name /hackrf_if/SD_CLK)
+      (node (ref P28) (pin 11))
+      (node (ref J2) (pin 5)))
+    (net (code 16) (name /hackrf_if/SD_DAT3)
+      (node (ref J2) (pin 2))
+      (node (ref P28) (pin 4)))
+    (net (code 17) (name /hackrf_if/SD_DAT1)
+      (node (ref P28) (pin 6))
+      (node (ref J2) (pin 8)))
+    (net (code 18) (name /audio/I2S0_RX_SDA)
+      (node (ref U1) (pin 6))
+      (node (ref R22) (pin 2)))
+    (net (code 19) (name /hackrf_if/LCD_WR#)
+      (node (ref J3) (pin 10))
+      (node (ref U3) (pin 45)))
+    (net (code 20) (name /hackrf_if/LCD_TE)
+      (node (ref U3) (pin 63))
+      (node (ref J3) (pin 34)))
+    (net (code 21) (name /hackrf_if/TP_U)
+      (node (ref P20) (pin 20))
+      (node (ref U3) (pin 3))
+      (node (ref J3) (pin 40)))
+    (net (code 22) (name /hackrf_if/TP_R)
+      (node (ref J3) (pin 37))
+      (node (ref U3) (pin 64))
+      (node (ref P20) (pin 14)))
+    (net (code 23) (name /hackrf_if/TP_D)
+      (node (ref P20) (pin 16))
+      (node (ref U3) (pin 1))
+      (node (ref J3) (pin 38)))
+    (net (code 24) (name /hackrf_if/TP_L)
+      (node (ref U3) (pin 2))
+      (node (ref J3) (pin 39))
+      (node (ref P20) (pin 18)))
+    (net (code 25) (name /hackrf_if/SW_U)
+      (node (ref U3) (pin 25))
+      (node (ref SW1) (pin S4)))
+    (net (code 26) (name /hackrf_if/SW_R)
+      (node (ref SW1) (pin S3))
+      (node (ref U3) (pin 9)))
+    (net (code 27) (name /hackrf_if/SW_D)
+      (node (ref U3) (pin 10))
+      (node (ref SW1) (pin S2)))
+    (net (code 28) (name /hackrf_if/SW_L)
+      (node (ref SW1) (pin S5))
+      (node (ref U3) (pin 28)))
+    (net (code 29) (name /hackrf_if/SW_ROT_A)
+      (node (ref U3) (pin 11))
+      (node (ref SW1) (pin A)))
+    (net (code 30) (name /hackrf_if/SW_ROT_B)
+      (node (ref U3) (pin 12))
+      (node (ref SW1) (pin B)))
+    (net (code 31) (name /hackrf_if/SW_SEL)
+      (node (ref SW1) (pin S1))
+      (node (ref U3) (pin 13)))
+    (net (code 32) (name GND)
+      (node (ref H5) (pin 1))
+      (node (ref H4) (pin 1))
+      (node (ref H3) (pin 1))
+      (node (ref H2) (pin 1))
+      (node (ref J2) (pin A))
+      (node (ref H1) (pin 1))
+      (node (ref J2) (pin SH))
+      (node (ref C9) (pin 2))
+      (node (ref C7) (pin 2))
+      (node (ref C12) (pin 2))
+      (node (ref C8) (pin 2))
+      (node (ref J3) (pin 14))
+      (node (ref L10) (pin 2))
+      (node (ref J3) (pin 15))
+      (node (ref L1) (pin 2))
+      (node (ref J3) (pin 35))
+      (node (ref J3) (pin 16))
+      (node (ref R8) (pin 1))
+      (node (ref J3) (pin 17))
+      (node (ref R9) (pin 2))
+      (node (ref C15) (pin 2))
+      (node (ref C13) (pin 2))
+      (node (ref C11) (pin 2))
+      (node (ref U3) (pin 65))
+      (node (ref C2) (pin 2))
+      (node (ref J3) (pin 12))
+      (node (ref C5) (pin 2))
+      (node (ref C4) (pin 2))
+      (node (ref J3) (pin 11))
+      (node (ref J3) (pin 9))
+      (node (ref J3) (pin 8))
+      (node (ref J3) (pin 3))
+      (node (ref J3) (pin 13))
+      (node (ref U2) (pin 2))
+      (node (ref C35) (pin 2))
+      (node (ref C33) (pin 2))
+      (node (ref C31) (pin 2))
+      (node (ref Q1) (pin 2))
+      (node (ref P20) (pin 13))
+      (node (ref P20) (pin 15))
+      (node (ref C40) (pin 2))
+      (node (ref C38) (pin 2))
+      (node (ref SW1) (pin CB))
+      (node (ref SW1) (pin CA))
+      (node (ref C29) (pin 2))
+      (node (ref C27) (pin 2))
+      (node (ref C30) (pin 2))
+      (node (ref BT1) (pin 2))
+      (node (ref C28) (pin 2))
+      (node (ref C37) (pin 2))
+      (node (ref C36) (pin 2))
+      (node (ref C34) (pin 2))
+      (node (ref C32) (pin 2))
+      (node (ref C26) (pin 2))
+      (node (ref C39) (pin 2))
+      (node (ref U1) (pin 15))
+      (node (ref C42) (pin 2))
+      (node (ref C43) (pin 2))
+      (node (ref C3) (pin 2))
+      (node (ref J2) (pin 0))
+      (node (ref L6) (pin 2))
+      (node (ref J2) (pin 6))
+      (node (ref J3) (pin SHLD))
+      (node (ref R19) (pin 2))
+      (node (ref R14) (pin 2))
+      (node (ref U1) (pin 11))
+      (node (ref U1) (pin 21))
+      (node (ref U1) (pin 22))
+      (node (ref P22) (pin 18))
+      (node (ref P28) (pin 2))
+      (node (ref R13) (pin 1))
+      (node (ref P28) (pin 12))
+      (node (ref C41) (pin 2))
+      (node (ref C14) (pin 1))
+      (node (ref X1) (pin 2))
+      (node (ref R11) (pin 1))
+      (node (ref R12) (pin 2))
+      (node (ref R20) (pin 1))
+      (node (ref P22) (pin 10))
+      (node (ref P22) (pin 4))
+      (node (ref P20) (pin 19))
+      (node (ref C25) (pin 2))
+      (node (ref R17) (pin 2))
+      (node (ref U1) (pin 28))
+      (node (ref C6) (pin 2))
+      (node (ref C10) (pin 2))
+      (node (ref C23) (pin 2))
+      (node (ref C22) (pin 1)))
+    (net (code 33) (name "Net-(C24-Pad1)")
+      (node (ref C24) (pin 1))
+      (node (ref R10) (pin 1)))
+    (net (code 34) (name "Net-(L8-Pad2)")
+      (node (ref R16) (pin 1))
+      (node (ref L8) (pin 2)))
+    (net (code 35) (name "Net-(L8-Pad1)")
+      (node (ref P3) (pin 3))
+      (node (ref L8) (pin 1)))
+    (net (code 36) (name "Net-(L7-Pad2)")
+      (node (ref R15) (pin 1))
+      (node (ref L7) (pin 2)))
+    (net (code 37) (name "Net-(L7-Pad1)")
+      (node (ref P3) (pin 2))
+      (node (ref L7) (pin 1)))
+    (net (code 38) (name "Net-(L3-Pad2)")
+      (node (ref L3) (pin 2))
+      (node (ref P1) (pin 3)))
+    (net (code 39) (name "Net-(L3-Pad1)")
+      (node (ref L3) (pin 1))
+      (node (ref R7) (pin 2)))
+    (net (code 40) (name "Net-(L2-Pad2)")
+      (node (ref L2) (pin 2))
+      (node (ref P1) (pin 2)))
+    (net (code 41) (name "Net-(L2-Pad1)")
+      (node (ref R6) (pin 2))
+      (node (ref L2) (pin 1)))
+    (net (code 42) (name /audio/RLINEIN)
+      (node (ref U1) (pin 19))
+      (node (ref C17) (pin 1)))
+    (net (code 43) (name /audio/LLINEIN)
+      (node (ref C16) (pin 1))
+      (node (ref U1) (pin 20)))
+    (net (code 44) (name "Net-(C24-Pad2)")
+      (node (ref R17) (pin 1))
+      (node (ref X1) (pin 1))
+      (node (ref R18) (pin 2))
+      (node (ref L9) (pin 2))
+      (node (ref C24) (pin 2))
+      (node (ref C25) (pin 1)))
+    (net (code 45) (name "Net-(L5-Pad1)")
+      (node (ref P2) (pin 3))
+      (node (ref L5) (pin 1)))
+    (net (code 46) (name "Net-(L4-Pad1)")
+      (node (ref P2) (pin 2))
+      (node (ref L4) (pin 1)))
+    (net (code 47) (name "Net-(L6-Pad1)")
+      (node (ref P2) (pin 4))
+      (node (ref L6) (pin 1)))
+    (net (code 48) (name "Net-(L9-Pad1)")
+      (node (ref P2) (pin 1))
+      (node (ref L9) (pin 1)))
+    (net (code 49) (name /audio/LOUT)
+      (node (ref C20) (pin 1))
+      (node (ref U1) (pin 12)))
+    (net (code 50) (name /audio/ROUT)
+      (node (ref C21) (pin 1))
+      (node (ref U1) (pin 13)))
+    (net (code 51) (name "Net-(C18-Pad2)")
+      (node (ref C22) (pin 2))
+      (node (ref R11) (pin 2))
+      (node (ref C18) (pin 2))
+      (node (ref L4) (pin 2)))
+    (net (code 52) (name "Net-(C19-Pad2)")
+      (node (ref L5) (pin 2))
+      (node (ref C19) (pin 2))
+      (node (ref R12) (pin 1))
+      (node (ref C23) (pin 1)))
+    (net (code 53) (name "Net-(C21-Pad2)")
+      (node (ref R14) (pin 1))
+      (node (ref C21) (pin 2))
+      (node (ref R16) (pin 2)))
+    (net (code 54) (name "Net-(C20-Pad2)")
+      (node (ref R15) (pin 2))
+      (node (ref C20) (pin 2))
+      (node (ref R13) (pin 2)))
+    (net (code 55) (name +3.3V)
+      (node (ref U1) (pin 8))
+      (node (ref C42) (pin 1))
+      (node (ref U1) (pin 14))
+      (node (ref C43) (pin 1))
+      (node (ref U3) (pin 6))
+      (node (ref P28) (pin 1))
+      (node (ref C7) (pin 1))
+      (node (ref C9) (pin 1))
+      (node (ref C13) (pin 1))
+      (node (ref C11) (pin 1))
+      (node (ref C2) (pin 1))
+      (node (ref C5) (pin 1))
+      (node (ref C4) (pin 1))
+      (node (ref J3) (pin 4))
+      (node (ref J3) (pin 2))
+      (node (ref P20) (pin 3))
+      (node (ref C38) (pin 1))
+      (node (ref U2) (pin 3))
+      (node (ref U2) (pin 1))
+      (node (ref C34) (pin 1))
+      (node (ref C32) (pin 1))
+      (node (ref C26) (pin 1))
+      (node (ref U3) (pin 23))
+      (node (ref C30) (pin 1))
+      (node (ref C27) (pin 1))
+      (node (ref C28) (pin 1))
+      (node (ref P22) (pin 11))
+      (node (ref U1) (pin 1))
+      (node (ref U1) (pin 27))
+      (node (ref J2) (pin 4))
+      (node (ref C3) (pin 1)))
+    (net (code 56) (name "Net-(P2-Pad6)")
+      (node (ref P2) (pin 6)))
+    (net (code 57) (name "Net-(P2-Pad5)")
+      (node (ref P2) (pin 5)))
+    (net (code 58) (name "Net-(C14-Pad2)")
+      (node (ref R6) (pin 1))
+      (node (ref R8) (pin 2))
+      (node (ref C14) (pin 2))
+      (node (ref C16) (pin 2)))
+    (net (code 59) (name "Net-(C15-Pad1)")
+      (node (ref C15) (pin 1))
+      (node (ref R7) (pin 1))
+      (node (ref C17) (pin 2))
+      (node (ref R9) (pin 1)))
+    (net (code 60) (name "Net-(L1-Pad1)")
+      (node (ref L1) (pin 1))
+      (node (ref P1) (pin 1)))
+    (net (code 61) (name "Net-(L10-Pad1)")
+      (node (ref P3) (pin 1))
+      (node (ref L10) (pin 1)))
+    (net (code 62) (name "Net-(U1-Pad2)")
+      (node (ref U1) (pin 2)))
+    (net (code 63) (name "Net-(U1-Pad26)")
+      (node (ref U1) (pin 26)))
+    (net (code 64) (name /audio/RHPOUT)
+      (node (ref U1) (pin 10))
+      (node (ref C19) (pin 1)))
+    (net (code 65) (name /audio/LHPOUT)
+      (node (ref C18) (pin 1))
+      (node (ref U1) (pin 9)))
+    (net (code 66) (name /audio/MICIN)
+      (node (ref R10) (pin 2))
+      (node (ref U1) (pin 18)))
+    (net (code 67) (name /audio/MICBIAS)
+      (node (ref C10) (pin 1))
+      (node (ref R18) (pin 1))
+      (node (ref U1) (pin 17))
+      (node (ref C12) (pin 1)))
+    (net (code 68) (name /audio/VMID)
+      (node (ref U1) (pin 16))
+      (node (ref C6) (pin 1))
+      (node (ref C8) (pin 1)))
+    (net (code 69) (name /audio/I2S0_WS_R)
+      (node (ref U1) (pin 5))
+      (node (ref U1) (pin 7))
+      (node (ref RP1) (pin 7)))
+    (net (code 70) (name /audio/I2S0_MCLK_R)
+      (node (ref U1) (pin 25))
+      (node (ref RP1) (pin 5)))
+    (net (code 71) (name /audio/I2S0_TX_SDA_R)
+      (node (ref RP1) (pin 8))
+      (node (ref U1) (pin 4)))
+    (net (code 72) (name /audio/I2S0_SCK_R)
+      (node (ref U1) (pin 3))
+      (node (ref RP1) (pin 6)))
+    (net (code 73) (name /hackrf_if/CPLD_TCK)
+      (node (ref U3) (pin 16))
+      (node (ref P28) (pin 17)))
+    (net (code 74) (name "Net-(C39-Pad1)")
+      (node (ref U2) (pin 4))
+      (node (ref C39) (pin 1)))
+    (net (code 75) (name /hackrf_if/P1_5)
+      (node (ref P28) (pin 10))
+      (node (ref U3) (pin 17)))
+    (net (code 76) (name "Net-(U3-Pad37)")
+      (node (ref U3) (pin 37)))
+    (net (code 77) (name /hackrf_if/P2_1_R)
+      (node (ref RP4) (pin 8))
+      (node (ref U3) (pin 33)))
+    (net (code 78) (name "Net-(U3-Pad35)")
+      (node (ref U3) (pin 35)))
+    (net (code 79) (name "Net-(U3-Pad36)")
+      (node (ref U3) (pin 36)))
+    (net (code 80) (name /hackrf_if/P2_0_R)
+      (node (ref U3) (pin 32))
+      (node (ref R3) (pin 1)))
+    (net (code 81) (name /hackrf_if/GPIO3_8)
+      (node (ref P20) (pin 5))
+      (node (ref RP7) (pin 3)))
+    (net (code 82) (name /hackrf_if/GPIO3_9)
+      (node (ref P20) (pin 6))
+      (node (ref RP7) (pin 4)))
+    (net (code 83) (name /hackrf_if/GPIO3_10)
+      (node (ref RP7) (pin 2))
+      (node (ref P20) (pin 7)))
+    (net (code 84) (name /hackrf_if/GPIO3_11)
+      (node (ref RP7) (pin 1))
+      (node (ref P20) (pin 8)))
+    (net (code 85) (name /hackrf_if/GPIO3_12)
+      (node (ref RP6) (pin 3))
+      (node (ref P20) (pin 9)))
+    (net (code 86) (name /hackrf_if/GPIO3_13)
+      (node (ref P20) (pin 10))
+      (node (ref RP6) (pin 4)))
+    (net (code 87) (name /hackrf_if/GPIO3_14)
+      (node (ref RP6) (pin 2))
+      (node (ref P20) (pin 11)))
+    (net (code 88) (name /hackrf_if/GPIO3_15)
+      (node (ref RP6) (pin 1))
+      (node (ref P20) (pin 12)))
+    (net (code 89) (name /hackrf_if/P2_13)
+      (node (ref P22) (pin 22))
+      (node (ref RP4) (pin 4)))
+    (net (code 90) (name /hackrf_if/P1_8)
+      (node (ref P28) (pin 8))
+      (node (ref U3) (pin 14)))
+    (net (code 91) (name /hackrf_if/RESET#)
+      (node (ref P22) (pin 3))
+      (node (ref U3) (pin 29)))
+    (net (code 92) (name /hackrf_if/P2_4_R)
+      (node (ref U3) (pin 30))
+      (node (ref R1) (pin 1)))
+    (net (code 93) (name /hackrf_if/CPLD_TDI)
+      (node (ref P28) (pin 19))
+      (node (ref R22) (pin 1))
+      (node (ref U3) (pin 15)))
+    (net (code 94) (name /hackrf_if/P2_9)
+      (node (ref RP4) (pin 3))
+      (node (ref P22) (pin 21)))
+    (net (code 95) (name /hackrf_if/P2_8_R)
+      (node (ref U3) (pin 34))
+      (node (ref RP4) (pin 7)))
+    (net (code 96) (name "Net-(U3-Pad7)")
+      (node (ref U3) (pin 7)))
+    (net (code 97) (name "Net-(U3-Pad5)")
+      (node (ref U3) (pin 5)))
+    (net (code 98) (name /hackrf_if/P2_8)
+      (node (ref P22) (pin 23))
+      (node (ref RP4) (pin 2)))
+    (net (code 99) (name /hackrf_if/VBAT)
+      (node (ref C41) (pin 1))
+      (node (ref BT1) (pin 1))
+      (node (ref P20) (pin 1)))
+    (net (code 100) (name /hackrf_if/P2_3_R)
+      (node (ref R2) (pin 1))
+      (node (ref U3) (pin 31)))
+    (net (code 101) (name +1.8V)
+      (node (ref C35) (pin 1))
+      (node (ref C31) (pin 1))
+      (node (ref C29) (pin 1))
+      (node (ref U2) (pin 5))
+      (node (ref C40) (pin 1))
+      (node (ref U3) (pin 57))
+      (node (ref U3) (pin 39))
+      (node (ref J3) (pin 36))
+      (node (ref U3) (pin 41))
+      (node (ref C33) (pin 1))
+      (node (ref C37) (pin 1))
+      (node (ref C36) (pin 1))
+      (node (ref U3) (pin 8)))
+    (net (code 102) (name /hackrf_if/GPIO3_15_R)
+      (node (ref U3) (pin 18))
+      (node (ref RP6) (pin 8)))
+    (net (code 103) (name /hackrf_if/GPIO3_14_R)
+      (node (ref U3) (pin 19))
+      (node (ref RP6) (pin 7)))
+    (net (code 104) (name /hackrf_if/GPIO3_12_R)
+      (node (ref U3) (pin 20))
+      (node (ref RP6) (pin 6)))
+    (net (code 105) (name /hackrf_if/GPIO3_13_R)
+      (node (ref U3) (pin 21))
+      (node (ref RP6) (pin 5)))
+    (net (code 106) (name /hackrf_if/GPIO3_11_R)
+      (node (ref U3) (pin 22))
+      (node (ref RP7) (pin 8)))
+    (net (code 107) (name /hackrf_if/GPIO3_10_R)
+      (node (ref RP7) (pin 7))
+      (node (ref U3) (pin 24)))
+    (net (code 108) (name /hackrf_if/GPIO3_8_R)
+      (node (ref U3) (pin 26))
+      (node (ref RP7) (pin 6)))
+    (net (code 109) (name /hackrf_if/GPIO3_9_R)
+      (node (ref U3) (pin 27))
+      (node (ref RP7) (pin 5)))
+    (net (code 110) (name /hackrf_if/P2_13_R)
+      (node (ref RP4) (pin 5))
+      (node (ref U3) (pin 42)))
+    (net (code 111) (name /hackrf_if/P2_9_R)
+      (node (ref RP4) (pin 6))
+      (node (ref U3) (pin 40)))
+    (net (code 112) (name /hackrf_if/P2_4)
+      (node (ref R1) (pin 2))
+      (node (ref P22) (pin 5)))
+    (net (code 113) (name /hackrf_if/P2_1)
+      (node (ref RP4) (pin 1))
+      (node (ref P22) (pin 19)))
+    (net (code 114) (name /hackrf_if/P2_0)
+      (node (ref P22) (pin 20))
+      (node (ref R3) (pin 2)))
+    (net (code 115) (name "Net-(P20-Pad22)")
+      (node (ref P20) (pin 22)))
+    (net (code 116) (name "Net-(P20-Pad21)")
+      (node (ref P20) (pin 21)))
+    (net (code 117) (name "Net-(P20-Pad4)")
+      (node (ref P20) (pin 4)))
+    (net (code 118) (name "Net-(P20-Pad2)")
+      (node (ref P20) (pin 2)))
+    (net (code 119) (name "Net-(P22-Pad14)")
+      (node (ref P22) (pin 14)))
+    (net (code 120) (name "Net-(P22-Pad12)")
+      (node (ref P22) (pin 12)))
+    (net (code 121) (name "Net-(P22-Pad25)")
+      (node (ref P22) (pin 25)))
+    (net (code 122) (name "Net-(P22-Pad9)")
+      (node (ref P22) (pin 9)))
+    (net (code 123) (name "Net-(P22-Pad8)")
+      (node (ref P22) (pin 8)))
+    (net (code 124) (name "Net-(P22-Pad7)")
+      (node (ref P22) (pin 7)))
+    (net (code 125) (name /hackrf_if/P2_3)
+      (node (ref R2) (pin 2))
+      (node (ref P22) (pin 6)))
+    (net (code 126) (name "Net-(P22-Pad2)")
+      (node (ref P22) (pin 2)))
+    (net (code 127) (name "Net-(P22-Pad1)")
+      (node (ref P22) (pin 1)))
+    (net (code 128) (name "Net-(P20-Pad17)")
+      (node (ref P20) (pin 17)))
+    (net (code 129) (name "Net-(P28-Pad13)")
+      (node (ref P28) (pin 13)))
+    (net (code 130) (name "Net-(P28-Pad14)")
+      (node (ref P28) (pin 14)))
+    (net (code 131) (name "Net-(P28-Pad16)")
+      (node (ref P28) (pin 16)))
+    (net (code 132) (name "Net-(P28-Pad15)")
+      (node (ref P28) (pin 15)))
+    (net (code 133) (name "Net-(P28-Pad21)")
+      (node (ref P28) (pin 21)))
+    (net (code 134) (name "Net-(P28-Pad22)")
+      (node (ref P28) (pin 22)))
+    (net (code 135) (name "Net-(P28-Pad20)")
+      (node (ref P28) (pin 20)))
+    (net (code 136) (name "Net-(P28-Pad18)")
+      (node (ref P28) (pin 18)))
+    (net (code 137) (name "Net-(J3-Pad1)")
+      (node (ref Q1) (pin 3))
+      (node (ref J3) (pin 1)))
+    (net (code 138) (name /hackrf_if/LCD_DB4)
+      (node (ref U3) (pin 58))
+      (node (ref J3) (pin 29)))
+    (net (code 139) (name /hackrf_if/LCD_DB5)
+      (node (ref U3) (pin 56))
+      (node (ref J3) (pin 28)))
+    (net (code 140) (name /hackrf_if/LCD_DB6)
+      (node (ref J3) (pin 27))
+      (node (ref U3) (pin 55)))
+    (net (code 141) (name /hackrf_if/LCD_DB7)
+      (node (ref J3) (pin 26))
+      (node (ref U3) (pin 54)))
+    (net (code 142) (name /hackrf_if/LCD_DB8)
+      (node (ref J3) (pin 25))
+      (node (ref U3) (pin 53)))
+    (net (code 143) (name /hackrf_if/LCD_DB9)
+      (node (ref J3) (pin 24))
+      (node (ref U3) (pin 52)))
+    (net (code 144) (name /hackrf_if/LCD_DB10)
+      (node (ref J3) (pin 23))
+      (node (ref U3) (pin 51)))
+    (net (code 145) (name /hackrf_if/LCD_DB11)
+      (node (ref J3) (pin 22))
+      (node (ref U3) (pin 50)))
+    (net (code 146) (name /hackrf_if/LCD_DB12)
+      (node (ref J3) (pin 21))
+      (node (ref U3) (pin 49)))
+    (net (code 147) (name /hackrf_if/LCD_DB13)
+      (node (ref J3) (pin 20))
+      (node (ref U3) (pin 48)))
+    (net (code 148) (name /hackrf_if/LCD_DB14)
+      (node (ref U3) (pin 47))
+      (node (ref J3) (pin 19)))
+    (net (code 149) (name /hackrf_if/LCD_DB15)
+      (node (ref U3) (pin 46))
+      (node (ref J3) (pin 18)))
+    (net (code 150) (name /hackrf_if/LCD_DB0)
+      (node (ref U3) (pin 62))
+      (node (ref J3) (pin 33)))
+    (net (code 151) (name /hackrf_if/LCD_DB1)
+      (node (ref U3) (pin 61))
+      (node (ref J3) (pin 32)))
+    (net (code 152) (name /hackrf_if/LCD_DB2)
+      (node (ref J3) (pin 31))
+      (node (ref U3) (pin 60)))
+    (net (code 153) (name /hackrf_if/LCD_DB3)
+      (node (ref U3) (pin 59))
+      (node (ref J3) (pin 30)))))
\ No newline at end of file
diff --git a/hardware/portapack_h1/portapack_h1.pdf b/hardware/portapack_h1/portapack_h1.pdf
new file mode 100644
index 00000000..e1004e0f
Binary files /dev/null and b/hardware/portapack_h1/portapack_h1.pdf differ
diff --git a/hardware/portapack_h1/portapack_h1.pro b/hardware/portapack_h1/portapack_h1.pro
new file mode 100644
index 00000000..4d8057a4
--- /dev/null
+++ b/hardware/portapack_h1/portapack_h1.pro
@@ -0,0 +1,70 @@
+update=Wednesday, July 15, 2015 'PMt' 10:20:27 PM
+version=1
+last_client=kicad
+[cvpcb]
+version=1
+NetIExt=net
+[cvpcb/libraries]
+EquName1=devcms
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[pcbnew/libraries]
+LibDir=../../../library-kicad
+LibName1=sockets
+LibName2=connect
+LibName3=discret
+LibName4=pin_array
+LibName5=divers
+LibName6=smd_capacitors
+LibName7=smd_resistors
+LibName8=smd_crystal&oscillator
+LibName9=smd_dil
+LibName10=smd_transistors
+LibName11=libcms
+LibName12=display
+LibName13=led
+LibName14=dip_sockets
+LibName15=pga_sockets
+LibName16=valves
+[general]
+version=1
+[eeschema]
+version=1
+LibDir=../../../library-kicad
+[eeschema/libraries]
+LibName1=hackrf_expansion
+LibName2=wolfson
+LibName3=passive
+LibName4=lcd_kingtech
+LibName5=supply
+LibName6=io_expander
+LibName7=trs_jack
+LibName8=battery
+LibName9=mosfet
+LibName10=microphone
+LibName11=sd
+LibName12=ck
+LibName13=altera
+LibName14=regulator
+LibName15=tp
+LibName16=header
+LibName17=hole
+LibName18=sharebrained
+LibName19=fiducial
diff --git a/hardware/portapack_h1/portapack_h1.sch b/hardware/portapack_h1/portapack_h1.sch
new file mode 100644
index 00000000..b4b8764b
--- /dev/null
+++ b/hardware/portapack_h1/portapack_h1.sch
@@ -0,0 +1,330 @@
+EESchema Schematic File Version 2
+LIBS:hackrf_expansion
+LIBS:wolfson
+LIBS:passive
+LIBS:lcd_kingtech
+LIBS:power
+LIBS:io_expander
+LIBS:trs_jack
+LIBS:battery
+LIBS:mosfet
+LIBS:microphone
+LIBS:sd
+LIBS:ck
+LIBS:altera
+LIBS:regulator
+LIBS:tp
+LIBS:header
+LIBS:hole
+LIBS:sharebrained
+LIBS:fiducial
+LIBS:portapack_h1-cache
+EELAYER 24 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 4
+Title "PortaPack H1"
+Date "13 Oct 2014"
+Rev "20140826"
+Comp "ShareBrained Technology, Inc."
+Comment1 "Copyright © 2014 Jared Boone"
+Comment2 "License: GNU General Public License, version 2"
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L HOLE1 H1
+U 1 1 5369BBC4
+P 9500 2000
+F 0 "H1" H 9500 2150 60  0000 C CNN
+F 1 "HOLE1" H 9500 1850 60  0000 C CNN
+F 2 "" H 9500 2000 60  0000 C CNN
+F 3 "" H 9500 2000 60  0000 C CNN
+	1    9500 2000
+	1    0    0    -1  
+$EndComp
+$Comp
+L HOLE1 H2
+U 1 1 5369BBD8
+P 9500 2500
+F 0 "H2" H 9500 2650 60  0000 C CNN
+F 1 "HOLE1" H 9500 2350 60  0000 C CNN
+F 2 "" H 9500 2500 60  0000 C CNN
+F 3 "" H 9500 2500 60  0000 C CNN
+	1    9500 2500
+	1    0    0    -1  
+$EndComp
+$Comp
+L HOLE1 H3
+U 1 1 5369BBEC
+P 9500 3000
+F 0 "H3" H 9500 3150 60  0000 C CNN
+F 1 "HOLE1" H 9500 2850 60  0000 C CNN
+F 2 "" H 9500 3000 60  0000 C CNN
+F 3 "" H 9500 3000 60  0000 C CNN
+	1    9500 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L HOLE1 H4
+U 1 1 5369BC00
+P 9500 3500
+F 0 "H4" H 9500 3650 60  0000 C CNN
+F 1 "HOLE1" H 9500 3350 60  0000 C CNN
+F 2 "" H 9500 3500 60  0000 C CNN
+F 3 "" H 9500 3500 60  0000 C CNN
+	1    9500 3500
+	1    0    0    -1  
+$EndComp
+$Comp
+L HOLE1 H5
+U 1 1 5369BC14
+P 9500 4000
+F 0 "H5" H 9500 4150 60  0000 C CNN
+F 1 "HOLE1" H 9500 3850 60  0000 C CNN
+F 2 "" H 9500 4000 60  0000 C CNN
+F 3 "" H 9500 4000 60  0000 C CNN
+	1    9500 4000
+	1    0    0    -1  
+$EndComp
+$Sheet
+S 2800 1900 900  3300
+U 53A8BFC3
+F0 "audio" 50
+F1 "audio.sch" 50
+F2 "I2S0_SCK" I R 3700 2300 60 
+F3 "I2S0_TX_SDA" I R 3700 2500 60 
+F4 "I2S0_MCLK" I R 3700 2200 60 
+F5 "I2S0_WS" I R 3700 2400 60 
+F6 "SCL" I R 3700 2800 60 
+F7 "SDA" B R 3700 2900 60 
+F8 "I2S0_RX_SDA" O R 3700 2600 60 
+$EndSheet
+Wire Wire Line
+	9800 2500 9700 2500
+Wire Wire Line
+	9800 3000 9700 3000
+Wire Wire Line
+	9800 3500 9700 3500
+$Sheet
+S 7600 1900 900  3300
+U 53A9129D
+F0 "lcd_sw_sd" 50
+F1 "lcd_sw_sd.sch" 50
+F2 "LCD_RS" I L 7600 2400 60 
+F3 "LCD_RD#" I L 7600 2500 60 
+F4 "LCD_WR#" I L 7600 2600 60 
+F5 "LCD_RESET#" I L 7600 2100 60 
+F6 "LCD_TE" O L 7600 3000 60 
+F7 "SW_SEL" O L 7600 4300 60 
+F8 "SW_ROT_A" O L 7600 4100 60 
+F9 "SW_ROT_B" O L 7600 4200 60 
+F10 "SW_D" O L 7600 3900 60 
+F11 "SW_R" O L 7600 3800 60 
+F12 "SW_U" O L 7600 3700 60 
+F13 "SW_L" O L 7600 4000 60 
+F14 "SD_DAT2" B L 7600 5000 60 
+F15 "SD_DAT3" B L 7600 5100 60 
+F16 "SD_CMD" B L 7600 4700 60 
+F17 "SD_CLK" I L 7600 4600 60 
+F18 "SD_DAT0" B L 7600 4800 60 
+F19 "SD_DAT1" B L 7600 4900 60 
+F20 "SD_CD" O L 7600 4500 60 
+F21 "TP_R" B L 7600 3300 60 
+F22 "TP_D" B L 7600 3400 60 
+F23 "TP_L" B L 7600 3500 60 
+F24 "TP_U" B L 7600 3200 60 
+F25 "LCD_DB[15..0]" B L 7600 2700 60 
+F26 "LCD_BACKLIGHT" I L 7600 2000 60 
+$EndSheet
+Wire Bus Line
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+$Sheet
+S 4700 1900 1900 3300
+U 53A8C780
+F0 "hackrf_if" 50
+F1 "hackrf_if.sch" 50
+F2 "LCD_TE" I R 6600 3000 60 
+F3 "SW_R" I R 6600 3800 60 
+F4 "SW_ROT_B" I R 6600 4200 60 
+F5 "SW_ROT_A" I R 6600 4100 60 
+F6 "SW_D" I R 6600 3900 60 
+F7 "SW_SEL" I R 6600 4300 60 
+F8 "SW_U" I R 6600 3700 60 
+F9 "SW_L" I R 6600 4000 60 
+F10 "LCD_RESET#" O R 6600 2100 60 
+F11 "LCD_RS" O R 6600 2400 60 
+F12 "LCD_RD#" O R 6600 2500 60 
+F13 "LCD_WR#" O R 6600 2600 60 
+F14 "TP_U" B R 6600 3200 60 
+F15 "TP_L" B R 6600 3500 60 
+F16 "TP_D" B R 6600 3400 60 
+F17 "TP_R" B R 6600 3300 60 
+F18 "I2S0_TX_SDA" O L 4700 2500 60 
+F19 "I2S0_WS" O L 4700 2400 60 
+F20 "I2S0_MCLK" O L 4700 2200 60 
+F21 "I2S0_SCK" O L 4700 2300 60 
+F22 "SDA" B L 4700 2900 60 
+F23 "SCL" O L 4700 2800 60 
+F24 "SD_CD" I R 6600 4500 60 
+F25 "SD_DAT2" B R 6600 5000 60 
+F26 "SD_DAT0" B R 6600 4800 60 
+F27 "SD_CMD" B R 6600 4700 60 
+F28 "SD_CLK" O R 6600 4600 60 
+F29 "SD_DAT3" B R 6600 5100 60 
+F30 "SD_DAT1" B R 6600 4900 60 
+F31 "I2S0_RX_SDA" I L 4700 2600 60 
+F32 "LCD_DB[15..0]" B R 6600 2700 60 
+F33 "LCD_BACKLIGHT" O R 6600 2000 60 
+$EndSheet
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+Wire Wire Line
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+Wire Wire Line
+	7600 2400 6600 2400
+Wire Wire Line
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+Wire Wire Line
+	7600 2600 6600 2600
+Wire Wire Line
+	6600 3000 7600 3000
+Wire Wire Line
+	7600 3200 6600 3200
+Wire Wire Line
+	6600 3300 7600 3300
+Wire Wire Line
+	7600 3400 6600 3400
+Wire Wire Line
+	6600 3500 7600 3500
+Wire Wire Line
+	6600 3700 7600 3700
+Wire Wire Line
+	7600 3800 6600 3800
+Wire Wire Line
+	6600 3900 7600 3900
+Wire Wire Line
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+Wire Wire Line
+	6600 4100 7600 4100
+Wire Wire Line
+	7600 4200 6600 4200
+Wire Wire Line
+	6600 4300 7600 4300
+Wire Wire Line
+	6600 4500 7600 4500
+Wire Wire Line
+	6600 4600 7600 4600
+Wire Wire Line
+	7600 4700 6600 4700
+Wire Wire Line
+	6600 4800 7600 4800
+Wire Wire Line
+	7600 4900 6600 4900
+Wire Wire Line
+	6600 5000 7600 5000
+Wire Wire Line
+	7600 5100 6600 5100
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	4700 2800 3700 2800
+Wire Wire Line
+	3700 2900 4700 2900
+Wire Wire Line
+	9700 2000 9800 2000
+Wire Wire Line
+	9800 2000 9800 4100
+Connection ~ 9800 2500
+Connection ~ 9800 3000
+Connection ~ 9800 3500
+$Comp
+L SHAREBRAINED LOGO1
+U 1 1 53B1AE0D
+P 6050 7000
+F 0 "LOGO1" H 6050 7050 60  0000 C CNN
+F 1 "SHAREBRAINED" H 6050 6950 60  0000 C CNN
+F 2 "" H 6050 7000 60  0000 C CNN
+F 3 "" H 6050 7000 60  0000 C CNN
+	1    6050 7000
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORTAPACK_H1 LOGO2
+U 1 1 53B1B509
+P 6050 7450
+F 0 "LOGO2" H 6050 7500 60  0000 C CNN
+F 1 "PORTAPACK_H1" H 6050 7400 60  0000 C CNN
+F 2 "" H 6050 7450 60  0000 C CNN
+F 3 "" H 6050 7450 60  0000 C CNN
+	1    6050 7450
+	1    0    0    -1  
+$EndComp
+$Comp
+L FIDUCIAL FID1
+U 1 1 53B309AC
+P 4100 7100
+F 0 "FID1" H 4100 7225 60  0000 C CNN
+F 1 "FIDUCIAL" H 4100 6975 60  0000 C CNN
+F 2 "" H 4100 7100 60  0000 C CNN
+F 3 "" H 4100 7100 60  0000 C CNN
+	1    4100 7100
+	1    0    0    -1  
+$EndComp
+$Comp
+L FIDUCIAL FID2
+U 1 1 53B30B4C
+P 4100 7500
+F 0 "FID2" H 4100 7625 60  0000 C CNN
+F 1 "FIDUCIAL" H 4100 7375 60  0000 C CNN
+F 2 "" H 4100 7500 60  0000 C CNN
+F 3 "" H 4100 7500 60  0000 C CNN
+	1    4100 7500
+	1    0    0    -1  
+$EndComp
+$Comp
+L FIDUCIAL FID3
+U 1 1 53B30CEC
+P 4700 7100
+F 0 "FID3" H 4700 7225 60  0000 C CNN
+F 1 "FIDUCIAL" H 4700 6975 60  0000 C CNN
+F 2 "" H 4700 7100 60  0000 C CNN
+F 3 "" H 4700 7100 60  0000 C CNN
+	1    4700 7100
+	1    0    0    -1  
+$EndComp
+$Comp
+L FIDUCIAL FID4
+U 1 1 53B30E8C
+P 4700 7500
+F 0 "FID4" H 4700 7625 60  0000 C CNN
+F 1 "FIDUCIAL" H 4700 7375 60  0000 C CNN
+F 2 "" H 4700 7500 60  0000 C CNN
+F 3 "" H 4700 7500 60  0000 C CNN
+	1    4700 7500
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR01
+U 1 1 53B3303D
+P 9800 4100
+F 0 "#PWR01" H 9800 4100 30  0001 C CNN
+F 1 "GND" H 9800 4030 30  0001 C CNN
+F 2 "" H 9800 4100 60  0000 C CNN
+F 3 "" H 9800 4100 60  0000 C CNN
+	1    9800 4100
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	9700 4000 9800 4000
+Connection ~ 9800 4000
+$EndSCHEMATC