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CPLD: Add XC2C64A method to init from EEPROM contents.
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@ -116,6 +116,23 @@ bool XC2C64A::verify_eeprom(const verify_blocks_t& blocks) {
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return !error;
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}
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void XC2C64A::init_from_eeprom() {
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tap.set_repeat(0);
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tap.set_end_ir(state_t::run_test_idle);
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tap.set_end_dr(state_t::run_test_idle);
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reset();
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enable();
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discharge();
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init();
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disable();
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bypass();
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tap.state(state_t::test_logic_reset);
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}
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bool XC2C64A::shift_ir(const instruction_t instruction) {
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const ir_t ir_buffer = toUType(instruction);
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const jtag::tap::bits_t bits { &ir_buffer, ir_length };
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@ -132,6 +149,23 @@ void XC2C64A::enable() {
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tap.wait(state_t::run_test_idle, state_t::run_test_idle, 800);
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}
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void XC2C64A::enable_otf() {
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shift_ir(instruction_t::ISC_ENABLE_OTF);
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}
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void XC2C64A::discharge() {
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shift_ir(instruction_t::ISC_INIT);
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tap.wait(state_t::run_test_idle, state_t::run_test_idle, 20);
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}
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void XC2C64A::init() {
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tap.set_end_ir(state_t::update_ir);
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shift_ir(instruction_t::ISC_INIT);
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tap.set_end_ir(state_t::run_test_idle);
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tap.state(state_t::capture_dr);
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tap.wait(state_t::run_test_idle, state_t::run_test_idle, 800);
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}
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void XC2C64A::disable() {
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shift_ir(instruction_t::ISC_DISABLE);
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tap.wait(state_t::run_test_idle, state_t::run_test_idle, 100);
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@ -67,6 +67,7 @@ public:
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bool verify_sram(const verify_blocks_t& blocks);
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bool verify_eeprom(const verify_blocks_t& blocks);
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void init_from_eeprom();
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private:
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static constexpr size_t idcode_length = 32;
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@ -112,6 +113,9 @@ private:
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void reset();
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void enable();
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void enable_otf();
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void discharge();
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void init();
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void disable();
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bool bypass();
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};
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