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LPC43xx: Add CREG6 struct definition. Add I2S CREG6 configuration.

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This commit is contained in:
Jared Boone 2017-08-06 11:16:57 -07:00
parent 80d96b08cf
commit 49252dc1bc
3 changed files with 22 additions and 13 deletions
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2
firmware/application/audio.cpp
View File

@ -55,6 +55,7 @@ constexpr i2s::ConfigTX i2s0_config_tx {
.four_pin = 0, .four_pin = 0,
.mclk_out_en = 1, .mclk_out_en = 1,
}, },
.sck_in_sel = 1,
}; };
constexpr i2s::ConfigRX i2s0_config_rx { constexpr i2s::ConfigRX i2s0_config_rx {
@ -78,6 +79,7 @@ constexpr i2s::ConfigRX i2s0_config_rx {
.four_pin = 1, .four_pin = 1,
.mclk_out_en = 0, .mclk_out_en = 0,
}, },
.sck_in_sel = 0,
}; };
constexpr i2s::ConfigDMA i2s0_config_dma { constexpr i2s::ConfigDMA i2s0_config_dma {

15
firmware/chibios-portapack/os/hal/platforms/LPC43xx/lpc43xx.inc
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@ -41,6 +41,19 @@ extern "C" {
* @brief Product name title=UM10503 Chapter title=LPC43xx Configuration Registers (CREG) Modification date=1/28/2014 Major revision=1 Minor revision=8 * @brief Product name title=UM10503 Chapter title=LPC43xx Configuration Registers (CREG) Modification date=1/28/2014 Major revision=1 Minor revision=8
*/ */
typedef struct {
__IO uint32_t ETHMODE : 3;
uint32_t RESERVED0 : 1;
__IO uint32_t CTOUTCTRL : 1;
uint32_t RESERVED1 : 7;
__IO uint32_t I2S0_TX_SCK_IN_SEL : 1;
__IO uint32_t I2S0_RX_SCK_IN_SEL : 1;
__IO uint32_t I2S1_TX_SCK_IN_SEL : 1;
__IO uint32_t I2S1_RX_SCK_IN_SEL : 1;
__IO uint32_t EMC_CLK_SEL : 1;
uint32_t RESERVED2 : 15;
} LPC_CREG_CREG6_Type;
typedef struct { typedef struct {
uint32_t RESERVED0; uint32_t RESERVED0;
__IO uint32_t CREG0; __IO uint32_t CREG0;
@ -52,7 +65,7 @@ typedef struct {
__IO uint32_t FLASHCFGA; __IO uint32_t FLASHCFGA;
__IO uint32_t FLASHCFGB; __IO uint32_t FLASHCFGB;
__IO uint32_t ETBCFG; __IO uint32_t ETBCFG;
__IO uint32_t CREG6; LPC_CREG_CREG6_Type CREG6;
__IO uint32_t M4TXEVENT; __IO uint32_t M4TXEVENT;
uint32_t RESERVED3[51]; uint32_t RESERVED3[51];
__I uint32_t CHIPID; __I uint32_t CHIPID;

18
firmware/common/i2s.hpp
View File

@ -138,6 +138,7 @@ struct ConfigTX {
uint32_t txrate; uint32_t txrate;
uint32_t txbitrate; uint32_t txbitrate;
uint32_t txmode; uint32_t txmode;
uint32_t sck_in_sel;
}; };
struct ConfigRX { struct ConfigRX {
@ -145,6 +146,7 @@ struct ConfigRX {
uint32_t rxrate; uint32_t rxrate;
uint32_t rxbitrate; uint32_t rxbitrate;
uint32_t rxmode; uint32_t rxmode;
uint32_t sck_in_sel;
}; };
struct ConfigDMA { struct ConfigDMA {
@ -161,21 +163,13 @@ public:
) { ) {
reset(); reset();
/* I2S operates in master mode, use PLL0AUDIO as MCLK source for TX. */
/* NOTE: Documentation of CREG6 is quite confusing. Refer to "I2S clocking and
* pin connections" and other I2S diagrams for more clarity.
*/
if( &p() == LPC_I2S0 ) { if( &p() == LPC_I2S0 ) {
LPC_CREG->CREG6 |= LPC_CREG->CREG6.I2S0_TX_SCK_IN_SEL = config_tx.sck_in_sel;
(1U << 12) LPC_CREG->CREG6.I2S0_RX_SCK_IN_SEL = config_rx.sck_in_sel;
| (1U << 13)
;
} }
if( &p() == LPC_I2S1 ) { if( &p() == LPC_I2S1 ) {
LPC_CREG->CREG6 |= LPC_CREG->CREG6.I2S1_TX_SCK_IN_SEL = config_tx.sck_in_sel;
(1U << 14) LPC_CREG->CREG6.I2S1_RX_SCK_IN_SEL = config_rx.sck_in_sel;
| (1U << 15)
;
} }
p().DAO = config_tx.dao; p().DAO = config_tx.dao;