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https://github.com/eried/portapack-mayhem.git
synced 2024-10-01 01:26:06 -04:00
Fixed R1_20150901 vs R2_20170522 boot & detection issues
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@ -181,17 +181,24 @@ static PortaPackModel portapack_model() {
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if( !model.is_valid() ) {
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/*For the time being, it is impossible to distinguish the hardware of R1 and R2 from the software level*/
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/*At this point, I2c is not ready.*/
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//if( audio_codec_wm8731.detected() ) {
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// model = PortaPackModel::R1_20150901;
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//} else {
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if( audio_codec_wm8731.detected() ) {
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model = PortaPackModel::R1_20150901;
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} else {
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model = PortaPackModel::R2_20170522;
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//}
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}
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// model = PortaPackModel::R1_20150901;
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// ToDo: Do validation here to check if R2_20170522 or R1_20150901 (Gen1)
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}
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return model.value();
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}
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static audio::Codec* portapack_audio_codec() {
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// Maybe we c ould change the model here
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/* I2C ready OK, Automatic recognition of audio chip */
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return (audio_codec_wm8731.detected())
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? static_cast<audio::Codec*>(&audio_codec_wm8731)
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@ -200,6 +207,9 @@ static audio::Codec* portapack_audio_codec() {
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}
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static const portapack::cpld::Config& portapack_cpld_config() {
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// This function here is teh decider if the device boots or not.
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// return portapack::cpld::rev_20150901::config; // R1_20150901
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return (portapack_model() == PortaPackModel::R2_20170522)
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? portapack::cpld::rev_20170522::config
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: portapack::cpld::rev_20150901::config
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@ -207,9 +217,10 @@ static const portapack::cpld::Config& portapack_cpld_config() {
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}
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Backlight* backlight() {
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// return static_cast<portapack::Backlight*>(&backlight_on_off); // This should work for R1_20150901
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return (portapack_model() == PortaPackModel::R2_20170522)
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? static_cast<portapack::Backlight*>(&backlight_cat4004)
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: static_cast<portapack::Backlight*>(&backlight_on_off);
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? static_cast<portapack::Backlight*>(&backlight_cat4004) // R2_20170522
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: static_cast<portapack::Backlight*>(&backlight_on_off); // R1_20150901
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}
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#define ARRAY_SIZE(a) (sizeof(a)/sizeof(a[0]))
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@ -318,14 +329,14 @@ bool init() {
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i2c0.start(i2c_config_boot_clock);
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if( !portapack::cpld::update_if_necessary(portapack_cpld_config()) ) {
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shutdown_base();
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return false;
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}
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// if( !portapack::cpld::update_if_necessary(portapack_cpld_config()) ) {
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// shutdown_base();
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// return false;
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// }
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if( !hackrf::cpld::load_sram() ) {
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chSysHalt();
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}
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// if( !hackrf::cpld::load_sram() ) {
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// chSysHalt();
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// }
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configure_pins_portapack();
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@ -338,7 +349,7 @@ bool init() {
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set_clock_config(clock_config_irc);
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cgu::pll1::disable();
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/* Incantation from LPC43xx UM10503 section 12.2.1.1, to bring the M4
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* core clock speed to the 110 - 204MHz range.
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*/
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@ -377,6 +388,15 @@ bool init() {
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i2c0.start(i2c_config_fast_clock);
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if( !portapack::cpld::update_if_necessary(portapack_cpld_config()) ) {
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shutdown_base();
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return false;
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}
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if( !hackrf::cpld::load_sram() ) {
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chSysHalt();
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}
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clock_manager.set_reference_ppb(persistent_memory::correction_ppb());
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audio::init(portapack_audio_codec());
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