Fixed R1_20150901 vs R2_20170522 boot & detection issues

This commit is contained in:
jLynx 2022-04-05 10:52:42 +12:00
parent b4e5fb7483
commit 43e9ce4704

View File

@ -181,17 +181,24 @@ static PortaPackModel portapack_model() {
if( !model.is_valid() ) {
/*For the time being, it is impossible to distinguish the hardware of R1 and R2 from the software level*/
/*At this point, I2c is not ready.*/
//if( audio_codec_wm8731.detected() ) {
// model = PortaPackModel::R1_20150901;
//} else {
if( audio_codec_wm8731.detected() ) {
model = PortaPackModel::R1_20150901;
} else {
model = PortaPackModel::R2_20170522;
//}
}
// model = PortaPackModel::R1_20150901;
// ToDo: Do validation here to check if R2_20170522 or R1_20150901 (Gen1)
}
return model.value();
}
static audio::Codec* portapack_audio_codec() {
// Maybe we c ould change the model here
/* I2C ready OK, Automatic recognition of audio chip */
return (audio_codec_wm8731.detected())
? static_cast<audio::Codec*>(&audio_codec_wm8731)
@ -200,6 +207,9 @@ static audio::Codec* portapack_audio_codec() {
}
static const portapack::cpld::Config& portapack_cpld_config() {
// This function here is teh decider if the device boots or not.
// return portapack::cpld::rev_20150901::config; // R1_20150901
return (portapack_model() == PortaPackModel::R2_20170522)
? portapack::cpld::rev_20170522::config
: portapack::cpld::rev_20150901::config
@ -207,9 +217,10 @@ static const portapack::cpld::Config& portapack_cpld_config() {
}
Backlight* backlight() {
// return static_cast<portapack::Backlight*>(&backlight_on_off); // This should work for R1_20150901
return (portapack_model() == PortaPackModel::R2_20170522)
? static_cast<portapack::Backlight*>(&backlight_cat4004)
: static_cast<portapack::Backlight*>(&backlight_on_off);
? static_cast<portapack::Backlight*>(&backlight_cat4004) // R2_20170522
: static_cast<portapack::Backlight*>(&backlight_on_off); // R1_20150901
}
#define ARRAY_SIZE(a) (sizeof(a)/sizeof(a[0]))
@ -318,14 +329,14 @@ bool init() {
i2c0.start(i2c_config_boot_clock);
if( !portapack::cpld::update_if_necessary(portapack_cpld_config()) ) {
shutdown_base();
return false;
}
// if( !portapack::cpld::update_if_necessary(portapack_cpld_config()) ) {
// shutdown_base();
// return false;
// }
if( !hackrf::cpld::load_sram() ) {
chSysHalt();
}
// if( !hackrf::cpld::load_sram() ) {
// chSysHalt();
// }
configure_pins_portapack();
@ -338,7 +349,7 @@ bool init() {
set_clock_config(clock_config_irc);
cgu::pll1::disable();
/* Incantation from LPC43xx UM10503 section 12.2.1.1, to bring the M4
* core clock speed to the 110 - 204MHz range.
*/
@ -377,6 +388,15 @@ bool init() {
i2c0.start(i2c_config_fast_clock);
if( !portapack::cpld::update_if_necessary(portapack_cpld_config()) ) {
shutdown_base();
return false;
}
if( !hackrf::cpld::load_sram() ) {
chSysHalt();
}
clock_manager.set_reference_ppb(persistent_memory::correction_ppb());
audio::init(portapack_audio_codec());