mirror of
https://github.com/eried/portapack-mayhem.git
synced 2025-08-07 14:12:31 -04:00
Formatted code (#1007)
* Updated style * Updated files * fixed new line * Updated spacing * File fix WIP * Updated to clang 13 * updated comment style * Removed old comment code
This commit is contained in:
jLynx
GitHub
parent
7aca7ce74d
commit
033c4e9a5b
599 changed files with 70746 additions and 66896 deletions
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@ -37,14 +37,13 @@ namespace lna {
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using namespace max283x::lna;
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constexpr std::array<uint8_t, 8> lookup_8db_steps {
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0b11, 0b11, 0b10, 0b10,
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0b01, 0b00, 0b00, 0b00
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};
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constexpr std::array<uint8_t, 8> lookup_8db_steps{
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0b11, 0b11, 0b10, 0b10,
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0b01, 0b00, 0b00, 0b00};
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static uint_fast8_t gain_ordinal(const int8_t db) {
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const auto db_sat = gain_db_range.clip(db);
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return lna::lookup_8db_steps[(db_sat >> 3) & 7];
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const auto db_sat = gain_db_range.clip(db);
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return lna::lookup_8db_steps[(db_sat >> 3) & 7];
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}
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} /* namespace lna */
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@ -53,11 +52,11 @@ namespace vga {
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using namespace max283x::vga;
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constexpr range_t<int8_t> gain_db_range_internal { 0, 63 };
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constexpr range_t<int8_t> gain_db_range_internal{0, 63};
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static uint_fast8_t gain_ordinal(const int8_t db) {
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const auto db_sat = gain_db_range_internal.clip(db);
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return (db_sat & 0b111111) ^ 0b111111;
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const auto db_sat = gain_db_range_internal.clip(db);
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return (db_sat & 0b111111) ^ 0b111111;
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}
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} /* namespace vga */
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@ -67,8 +66,8 @@ namespace tx {
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using namespace max283x::tx;
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static uint_fast8_t gain_ordinal(const int8_t db) {
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const auto db_sat = gain_db_range.clip(db);
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return 47 - db_sat;
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const auto db_sat = gain_db_range.clip(db);
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return 47 - db_sat;
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}
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} /* namespace tx */
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@ -78,10 +77,10 @@ namespace filter {
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using namespace max283x::filter;
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static uint_fast8_t bandwidth_ordinal(const uint32_t bandwidth) {
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/* Determine filter setting that will provide bandwidth greater than or
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* equal to requested bandwidth.
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*/
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return std::lower_bound(bandwidths.cbegin(), bandwidths.cend(), bandwidth) - bandwidths.cbegin();
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/* Determine filter setting that will provide bandwidth greater than or
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* equal to requested bandwidth.
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*/
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return std::lower_bound(bandwidths.cbegin(), bandwidths.cend(), bandwidth) - bandwidths.cbegin();
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}
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} /* namespace filter */
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@ -99,114 +98,118 @@ static int_fast8_t requested_rx_lna_gain = 0;
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static int_fast8_t requested_rx_vga_gain = 0;
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void MAX2839::init() {
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set_mode(Mode::Shutdown);
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set_mode(Mode::Shutdown);
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gpio_max283x_enable.output();
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gpio_max2839_rxtx.output();
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gpio_max283x_enable.output();
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gpio_max2839_rxtx.output();
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_map.r.rxrf_1.MIMOmode = 1; /* enable RXINB */
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_map.r.rxrf_1.MIMOmode = 1; /* enable RXINB */
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_map.r.pa_drv.TXVGA_GAIN_SPI_EN = 1;
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_map.r.tx_gain.TXVGA_GAIN_SPI = 0x00;
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_map.r.pa_drv.TXVGA_GAIN_SPI_EN = 1;
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_map.r.tx_gain.TXVGA_GAIN_SPI = 0x00;
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_map.r.hpfsm_3.HPC_STOP = 1; /* 1kHz */
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_map.r.hpfsm_3.HPC_STOP = 1; /* 1kHz */
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_map.r.rxrf_2.LNAgain_SPI_EN = 1; /* control LNA gain from SPI */
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_map.r.lpf_vga_1.L = 0b000;
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_map.r.lpf_vga_2.L = 0b000;
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_map.r.rxrf_2.LNAgain_SPI_EN = 1; /* control LNA gain from SPI */
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_map.r.lpf_vga_1.L = 0b000;
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_map.r.lpf_vga_2.L = 0b000;
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_map.r.rx_top_1.VGAgain_SPI_EN = 1; /* control VGA gain from SPI */
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_map.r.lpf_vga_1.VGA = 0b000000;
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_map.r.lpf_vga_2.VGA = 0b010101;
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_map.r.rx_top_1.VGAgain_SPI_EN = 1; /* control VGA gain from SPI */
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_map.r.lpf_vga_1.VGA = 0b000000;
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_map.r.lpf_vga_2.VGA = 0b010101;
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_map.r.lpf_vga_2.BUFF_VCM = 0b11; /* maximum RX output common-mode voltage */
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_map.r.lpf_vga_2.BUFF_VCM = 0b11; /* maximum RX output common-mode voltage */
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_map.r.lpf_vga_1.ModeCtrl = 0b01; /* Rx LPF */
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_map.r.lpf.FT = 0b0000; /* 1.75 MHz LPF */
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_map.r.lpf_vga_1.ModeCtrl = 0b01; /* Rx LPF */
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_map.r.lpf.FT = 0b0000; /* 1.75 MHz LPF */
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_map.r.spi_en.EN_SPI = 1; /* enable chip functions when ENABLE pin set */
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_map.r.spi_en.EN_SPI = 1; /* enable chip functions when ENABLE pin set */
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_map.r.lo_gen.LOGEN_2GM = 0;
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_map.r.lo_gen.LOGEN_2GM = 0;
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_map.r.rssi_vga.RSSI_MODE = 1; /* RSSI independent of RXHP */
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_map.r.rssi_vga.RSSI_MODE = 1; /* RSSI independent of RXHP */
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/*
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* There are two LNA band settings, but we only use one of them.
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* Switching to the other one doesn't make the overall spectrum any
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* flatter but adds a surprise step in the middle.
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*/
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_map.r.rxrf_1.LNAband = 0; /* 2.3 - 2.5GHz */
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/*
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* There are two LNA band settings, but we only use one of them.
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* Switching to the other one doesn't make the overall spectrum any
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* flatter but adds a surprise step in the middle.
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*/
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_map.r.rxrf_1.LNAband = 0; /* 2.3 - 2.5GHz */
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_dirty.set();
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flush();
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_dirty.set();
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flush();
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set_mode(Mode::Standby);
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set_mode(Mode::Standby);
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}
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enum class Mask {
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Enable = 0b01,
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RxTx = 0b10,
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Shutdown = 0b00,
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Standby = RxTx,
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Receive = Enable | RxTx,
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Transmit = Enable,
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Enable = 0b01,
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RxTx = 0b10,
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Shutdown = 0b00,
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Standby = RxTx,
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Receive = Enable | RxTx,
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Transmit = Enable,
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};
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Mask mode_mask(const Mode mode) {
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switch (mode) {
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case Mode::Standby: return Mask::Standby;
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case Mode::Receive: return Mask::Receive;
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case Mode::Transmit: return Mask::Transmit;
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default: return Mask::Shutdown;
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}
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switch (mode) {
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case Mode::Standby:
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return Mask::Standby;
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case Mode::Receive:
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return Mask::Receive;
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case Mode::Transmit:
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return Mask::Transmit;
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default:
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return Mask::Shutdown;
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}
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}
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void MAX2839::set_mode(const Mode mode) {
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Mask mask = mode_mask(mode);
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gpio_max283x_enable.write(toUType(mask) & toUType(Mask::Enable));
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gpio_max2839_rxtx.write(toUType(mask) & toUType(Mask::RxTx));
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Mask mask = mode_mask(mode);
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gpio_max283x_enable.write(toUType(mask) & toUType(Mask::Enable));
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gpio_max2839_rxtx.write(toUType(mask) & toUType(Mask::RxTx));
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}
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void MAX2839::flush() {
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if( _dirty ) {
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for(size_t n=0; n<reg_count; n++) {
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if( _dirty[n] ) {
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write(n, _map.w[n]);
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}
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}
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_dirty.clear();
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}
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if (_dirty) {
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for (size_t n = 0; n < reg_count; n++) {
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if (_dirty[n]) {
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write(n, _map.w[n]);
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}
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}
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_dirty.clear();
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}
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}
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void MAX2839::flush_one(const Register reg) {
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const auto reg_num = toUType(reg);
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write(reg_num, _map.w[reg_num]);
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_dirty.clear(reg_num);
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const auto reg_num = toUType(reg);
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write(reg_num, _map.w[reg_num]);
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_dirty.clear(reg_num);
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}
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void MAX2839::write(const address_t reg_num, const reg_t value) {
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uint16_t t = (0U << 15) | (reg_num << 10) | (value & 0x3ffU);
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_target.transfer(&t, 1);
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uint16_t t = (0U << 15) | (reg_num << 10) | (value & 0x3ffU);
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_target.transfer(&t, 1);
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}
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reg_t MAX2839::read(const address_t reg_num) {
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uint16_t t = (1U << 15) | (reg_num << 10);
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_target.transfer(&t, 1U);
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return t & 0x3ffU;
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uint16_t t = (1U << 15) | (reg_num << 10);
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_target.transfer(&t, 1U);
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return t & 0x3ffU;
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}
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void MAX2839::write(const Register reg, const reg_t value) {
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write(toUType(reg), value);
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write(toUType(reg), value);
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}
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reg_t MAX2839::read(const Register reg) {
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return read(toUType(reg));
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return read(toUType(reg));
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}
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void MAX2839::set_tx_vga_gain(const int_fast8_t db) {
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_map.r.tx_gain.TXVGA_GAIN_SPI = tx::gain_ordinal(db);
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_dirty[Register::TX_GAIN] = 1;
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flush();
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_map.r.tx_gain.TXVGA_GAIN_SPI = tx::gain_ordinal(db);
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_dirty[Register::TX_GAIN] = 1;
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flush();
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}
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/*
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@ -215,140 +218,140 @@ void MAX2839::set_tx_vga_gain(const int_fast8_t db) {
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* user experience.
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*/
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void MAX2839::configure_rx_gain() {
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/* Apply MAX2837 restrictions to requested gain settings. */
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int_fast8_t lna_gain = lna::gain_db_range.clip(requested_rx_lna_gain);
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lna_gain &= 0x38;
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int_fast8_t vga_gain = vga::gain_db_range.clip(requested_rx_vga_gain);
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vga_gain &= 0x3e;
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/* Apply MAX2837 restrictions to requested gain settings. */
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int_fast8_t lna_gain = lna::gain_db_range.clip(requested_rx_lna_gain);
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lna_gain &= 0x38;
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int_fast8_t vga_gain = vga::gain_db_range.clip(requested_rx_vga_gain);
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vga_gain &= 0x3e;
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/*
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* MAX2839 has lower full-scale RX output voltage than MAX2837, so we
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* adjust the VGA (baseband) gain to compensate.
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*/
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vga_gain += 3;
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/*
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* MAX2839 has lower full-scale RX output voltage than MAX2837, so we
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* adjust the VGA (baseband) gain to compensate.
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*/
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vga_gain += 3;
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/*
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* If that adjustment puts VGA gain out of range, use LNA gain to
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* compensate. MAX2839 VGA gain can be any number from 0 through 63.
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*/
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if (vga_gain > 63) {
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if (lna_gain <= 32) {
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vga_gain -= 8;
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lna_gain += 8;
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} else {
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vga_gain = 63;
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}
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}
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/*
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* If that adjustment puts VGA gain out of range, use LNA gain to
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* compensate. MAX2839 VGA gain can be any number from 0 through 63.
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*/
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if (vga_gain > 63) {
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if (lna_gain <= 32) {
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vga_gain -= 8;
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lna_gain += 8;
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} else {
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vga_gain = 63;
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}
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}
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/*
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* MAX2839 lacks max-24 dB (16 dB) and max-40 dB (0 dB) LNA gain
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* settings, so we use VGA gain to compensate.
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*/
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if (lna_gain == 0) {
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lna_gain = 8;
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vga_gain = (vga_gain >= 8) ? vga_gain - 8 : 0;
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}
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if (lna_gain == 16) {
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if (vga_gain > 32) {
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vga_gain -= 8;
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lna_gain += 8;
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} else {
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vga_gain += 8;
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lna_gain -= 8;
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}
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}
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/*
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* MAX2839 lacks max-24 dB (16 dB) and max-40 dB (0 dB) LNA gain
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* settings, so we use VGA gain to compensate.
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*/
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if (lna_gain == 0) {
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lna_gain = 8;
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vga_gain = (vga_gain >= 8) ? vga_gain - 8 : 0;
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}
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if (lna_gain == 16) {
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if (vga_gain > 32) {
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vga_gain -= 8;
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lna_gain += 8;
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} else {
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vga_gain += 8;
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lna_gain -= 8;
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}
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}
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_map.r.lpf_vga_2.L = lna::gain_ordinal(lna_gain);
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_dirty[Register::RXRF_2] = 1;
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_map.r.lpf_vga_2.VGA = vga::gain_ordinal(vga_gain);
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_dirty[Register::LPF_VGA_2] = 1;
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flush();
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_map.r.lpf_vga_2.L = lna::gain_ordinal(lna_gain);
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_dirty[Register::RXRF_2] = 1;
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_map.r.lpf_vga_2.VGA = vga::gain_ordinal(vga_gain);
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_dirty[Register::LPF_VGA_2] = 1;
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flush();
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}
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void MAX2839::set_lna_gain(const int_fast8_t db) {
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requested_rx_lna_gain = db;
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configure_rx_gain();
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requested_rx_lna_gain = db;
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configure_rx_gain();
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}
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void MAX2839::set_vga_gain(const int_fast8_t db) {
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requested_rx_vga_gain = db;
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configure_rx_gain();
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requested_rx_vga_gain = db;
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configure_rx_gain();
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}
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void MAX2839::set_lpf_rf_bandwidth(const uint32_t bandwidth_minimum) {
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_map.r.lpf.FT = filter::bandwidth_ordinal(bandwidth_minimum);
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_dirty[Register::LPF] = 1;
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flush();
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_map.r.lpf.FT = filter::bandwidth_ordinal(bandwidth_minimum);
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_dirty[Register::LPF] = 1;
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flush();
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}
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bool MAX2839::set_frequency(const rf::Frequency lo_frequency) {
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/* TODO: This is a sad implementation. Refactor. */
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if( lo::band[0].contains(lo_frequency) ) {
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_map.r.syn_int_div.LOGEN_BSW = 0b00; /* 2300 - 2399.99MHz */
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} else if( lo::band[1].contains(lo_frequency) ) {
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_map.r.syn_int_div.LOGEN_BSW = 0b01; /* 2400 - 2499.99MHz */
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} else if( lo::band[2].contains(lo_frequency) ) {
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_map.r.syn_int_div.LOGEN_BSW = 0b10; /* 2500 - 2599.99MHz */
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} else if( lo::band[3].contains(lo_frequency) ) {
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_map.r.syn_int_div.LOGEN_BSW = 0b11; /* 2600 - 2700Hz */
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} else {
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return false;
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}
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_dirty[Register::SYN_INT_DIV] = 1;
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/* TODO: This is a sad implementation. Refactor. */
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if (lo::band[0].contains(lo_frequency)) {
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_map.r.syn_int_div.LOGEN_BSW = 0b00; /* 2300 - 2399.99MHz */
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} else if (lo::band[1].contains(lo_frequency)) {
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_map.r.syn_int_div.LOGEN_BSW = 0b01; /* 2400 - 2499.99MHz */
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} else if (lo::band[2].contains(lo_frequency)) {
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_map.r.syn_int_div.LOGEN_BSW = 0b10; /* 2500 - 2599.99MHz */
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} else if (lo::band[3].contains(lo_frequency)) {
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_map.r.syn_int_div.LOGEN_BSW = 0b11; /* 2600 - 2700Hz */
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} else {
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return false;
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}
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_dirty[Register::SYN_INT_DIV] = 1;
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const uint64_t div_q20 = (lo_frequency * (1 << 20)) / pll_factor;
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const uint64_t div_q20 = (lo_frequency * (1 << 20)) / pll_factor;
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_map.r.syn_int_div.SYN_INTDIV = div_q20 >> 20;
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_dirty[Register::SYN_INT_DIV] = 1;
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_map.r.syn_fr_div_2.SYN_FRDIV_19_10 = (div_q20 >> 10) & 0x3ff;
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_dirty[Register::SYN_FR_DIV_2] = 1;
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/* flush to commit high FRDIV first, as low FRDIV commits the change */
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flush();
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_map.r.syn_int_div.SYN_INTDIV = div_q20 >> 20;
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_dirty[Register::SYN_INT_DIV] = 1;
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_map.r.syn_fr_div_2.SYN_FRDIV_19_10 = (div_q20 >> 10) & 0x3ff;
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_dirty[Register::SYN_FR_DIV_2] = 1;
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/* flush to commit high FRDIV first, as low FRDIV commits the change */
|
||||
flush();
|
||||
|
||||
_map.r.syn_fr_div_1.SYN_FRDIV_9_0 = (div_q20 & 0x3ff);
|
||||
_dirty[Register::SYN_FR_DIV_1] = 1;
|
||||
flush();
|
||||
_map.r.syn_fr_div_1.SYN_FRDIV_9_0 = (div_q20 & 0x3ff);
|
||||
_dirty[Register::SYN_FR_DIV_1] = 1;
|
||||
flush();
|
||||
|
||||
return true;
|
||||
return true;
|
||||
}
|
||||
|
||||
void MAX2839::set_rx_lo_iq_calibration(const size_t v) {
|
||||
_map.r.rxrf_2.RX_IQERR_SPI_EN = 1;
|
||||
_dirty[Register::RXRF_2] = 1;
|
||||
_map.r.rxrf_1.iqerr_trim = v;
|
||||
_dirty[Register::RXRF_1] = 1;
|
||||
flush();
|
||||
_map.r.rxrf_2.RX_IQERR_SPI_EN = 1;
|
||||
_dirty[Register::RXRF_2] = 1;
|
||||
_map.r.rxrf_1.iqerr_trim = v;
|
||||
_dirty[Register::RXRF_1] = 1;
|
||||
flush();
|
||||
}
|
||||
|
||||
void MAX2839::set_rx_buff_vcm(const size_t v) {
|
||||
_map.r.lpf_vga_2.BUFF_VCM = v;
|
||||
_dirty[Register::LPF_VGA_2] = 1;
|
||||
flush();
|
||||
_map.r.lpf_vga_2.BUFF_VCM = v;
|
||||
_dirty[Register::LPF_VGA_2] = 1;
|
||||
flush();
|
||||
}
|
||||
|
||||
reg_t MAX2839::temp_sense() {
|
||||
if( !_map.r.rx_top_2.ts_en ) {
|
||||
_map.r.rx_top_2.ts_en = 1;
|
||||
flush_one(Register::RX_TOP_2);
|
||||
if (!_map.r.rx_top_2.ts_en) {
|
||||
_map.r.rx_top_2.ts_en = 1;
|
||||
flush_one(Register::RX_TOP_2);
|
||||
|
||||
chThdSleepMilliseconds(1);
|
||||
}
|
||||
chThdSleepMilliseconds(1);
|
||||
}
|
||||
|
||||
_map.r.rx_top_2.ts_adc_trigger = 1;
|
||||
flush_one(Register::RX_TOP_2);
|
||||
_map.r.rx_top_2.ts_adc_trigger = 1;
|
||||
flush_one(Register::RX_TOP_2);
|
||||
|
||||
halPolledDelay(ticks_for_temperature_sense_adc_conversion);
|
||||
halPolledDelay(ticks_for_temperature_sense_adc_conversion);
|
||||
|
||||
/*
|
||||
* Things look very similar to MAX2837, so this probably works, but the
|
||||
* MAX2839 data sheet does not describe the TEMP_SENSE register contents.
|
||||
*/
|
||||
const auto value = read(Register::TEMP_SENSE);
|
||||
/*
|
||||
* Things look very similar to MAX2837, so this probably works, but the
|
||||
* MAX2839 data sheet does not describe the TEMP_SENSE register contents.
|
||||
*/
|
||||
const auto value = read(Register::TEMP_SENSE);
|
||||
|
||||
_map.r.rx_top_2.ts_adc_trigger = 0;
|
||||
flush_one(Register::RX_TOP_2);
|
||||
_map.r.rx_top_2.ts_adc_trigger = 0;
|
||||
flush_one(Register::RX_TOP_2);
|
||||
|
||||
return value;
|
||||
return value;
|
||||
}
|
||||
|
||||
}
|
||||
} // namespace max2839
|
||||
Loading…
Add table
Add a link
Reference in a new issue