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https://github.com/eried/portapack-mayhem.git
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Merge branch 'external_clock'
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commit
01bad2805c
@ -269,11 +269,23 @@ void ClockManager::init() {
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clock_generator.enable_fanout();
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clock_generator.enable_fanout();
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clock_generator.set_pll_input_sources(si5351_pll_input_sources);
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clock_generator.set_pll_input_sources(si5351_pll_input_sources);
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const bool use_clkin = false;
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const auto clkin_present = !clock_generator.clkin_loss_of_signal();
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auto clkin_valid = false;
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if( clkin_present ) {
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// Measure Si5351B CLKIN frequency against LPC43xx IRC oscillator
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set_gp_clkin_to_clkin_direct();
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start_frequency_monitor_measurement(cgu::CLK_SEL::GP_CLKIN);
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wait_For_frequency_monitor_measurement_done();
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const auto clkin_frequency = get_frequency_monitor_measurement_in_hertz();
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// CLKIN is required to be 10MHz. FREQ_MON measurement is accurate to 1.5%
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// due to LPC43xx IRC oscillator precision.
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clkin_valid = (clkin_frequency >= 9850000) && (clkin_frequency <= 10150000);
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}
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clock_generator.set_clock_control(
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clock_generator.set_clock_control(
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use_clkin ?
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clkin_valid ? si5351_clock_control_clkin : si5351_clock_control_xtal
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si5351_clock_control_clkin
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: si5351_clock_control_xtal
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);
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);
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clock_generator.write(si5351_pll_a_xtal_reg);
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clock_generator.write(si5351_pll_a_xtal_reg);
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@ -422,6 +434,38 @@ void ClockManager::disable_gp_clkin_source() {
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clock_generator.disable_output(clock_generator_output_mcu_clkin);
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clock_generator.disable_output(clock_generator_output_mcu_clkin);
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}
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}
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void ClockManager::set_gp_clkin_to_clkin_direct() {
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clock_generator.set_clock_control(
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clock_generator_output_mcu_clkin,
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{ ClockControl::CLK_IDRV_2mA | ClockControl::CLK_SRC_CLKIN | ClockControl::CLK_INV_Normal | ClockControl::MS_INT_Integer | ClockControl::CLK_PDN_Power_On }
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);
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enable_gp_clkin_source();
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}
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void ClockManager::start_frequency_monitor_measurement(const cgu::CLK_SEL clk_sel) {
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// Measure a clock input for 480 cycles of the LPC43xx IRC.
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LPC_CGU->FREQ_MON = LPC_CGU_FREQ_MON_Type {
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.RCNT = 480,
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.FCNT = 0,
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.MEAS = 0,
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.CLK_SEL = toUType(clk_sel),
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.RESERVED0 = 0
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};
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LPC_CGU->FREQ_MON.MEAS = 1;
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}
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void ClockManager::wait_For_frequency_monitor_measurement_done() {
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// FREQ_MON mechanism fails to finish if there's no clock present on selected input?!
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while(LPC_CGU->FREQ_MON.MEAS == 1);
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}
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uint32_t ClockManager::get_frequency_monitor_measurement_in_hertz() {
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// Measurement is only as accurate as the LPC43xx IRC oscillator,
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// which is +/- 1.5%. Measurement is for 480 IRC clcocks. Scale
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// the cycle count to get a value in Hertz.
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return LPC_CGU->FREQ_MON.FCNT * 25000;
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}
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void ClockManager::enable_xtal_oscillator() {
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void ClockManager::enable_xtal_oscillator() {
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LPC_CGU->XTAL_OSC_CTRL.BYPASS = 0;
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LPC_CGU->XTAL_OSC_CTRL.BYPASS = 0;
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LPC_CGU->XTAL_OSC_CTRL.ENABLE = 1;
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LPC_CGU->XTAL_OSC_CTRL.ENABLE = 1;
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@ -66,6 +66,8 @@ public:
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void set_reference_ppb(const int32_t ppb);
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void set_reference_ppb(const int32_t ppb);
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uint32_t get_frequency_monitor_measurement_in_hertz();
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private:
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private:
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I2C& i2c0;
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I2C& i2c0;
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si5351::Si5351& clock_generator;
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si5351::Si5351& clock_generator;
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@ -75,6 +77,10 @@ private:
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void enable_gp_clkin_source();
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void enable_gp_clkin_source();
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void disable_gp_clkin_source();
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void disable_gp_clkin_source();
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void set_gp_clkin_to_clkin_direct();
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void start_frequency_monitor_measurement(const cgu::CLK_SEL clk_sel);
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void wait_For_frequency_monitor_measurement_done();
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void enable_xtal_oscillator();
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void enable_xtal_oscillator();
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void disable_xtal_oscillator();
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void disable_xtal_oscillator();
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@ -310,6 +310,10 @@ public:
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while(device_status() & 0x80);
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while(device_status() & 0x80);
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}
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}
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bool clkin_loss_of_signal() {
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return (device_status() >> 4) & 1;
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}
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void enable_fanout() {
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void enable_fanout() {
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write_register(Register::FanoutEnable, 0b11010000);
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write_register(Register::FanoutEnable, 0b11010000);
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}
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}
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@ -373,6 +377,11 @@ public:
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update_all_clock_control();
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update_all_clock_control();
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}
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}
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void set_clock_control(const size_t n, const ClockControl::Type clock_control) {
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_clock_control[n] = clock_control;
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write_register(Register::CLKControl_Base + n, _clock_control[n]);
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}
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void enable_clock(const size_t n) {
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void enable_clock(const size_t n) {
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_clock_control[n] &= ~ClockControl::CLK_PDN_Mask;
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_clock_control[n] &= ~ClockControl::CLK_PDN_Mask;
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write_register(Register::CLKControl_Base + n, _clock_control[n]);
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write_register(Register::CLKControl_Base + n, _clock_control[n]);
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