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CPLD: Always clock SGPIO data on external clock rising edge.

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This commit is contained in:
Jared Boone 2016-08-30 21:30:03 -07:00
parent 337d5ebaea
commit 00c7cdf027
1 changed files with 1 additions and 1 deletions
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2
firmware/common/baseband_sgpio.cpp
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@ -282,7 +282,7 @@ constexpr CLK_CAPTURE_MODE data_clk_capture_mode(
) { ) {
return (direction == Direction::Transmit) return (direction == Direction::Transmit)
? CLK_CAPTURE_MODE::RISING_CLOCK_EDGE ? CLK_CAPTURE_MODE::RISING_CLOCK_EDGE
: CLK_CAPTURE_MODE::FALLING_CLOCK_EDGE : CLK_CAPTURE_MODE::RISING_CLOCK_EDGE
; ;
} }