mirror of
https://github.com/eried/portapack-mayhem.git
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85 lines
2.3 KiB
C
85 lines
2.3 KiB
C
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#include "ch.h"
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#include "hal.h"
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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const PALConfig pal_default_config =
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{
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{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
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{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
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{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
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{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
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{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
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};
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#endif
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/*
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* Early initialization code.
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* This initialization must be performed just after stack setup and before
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* any other initialization.
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*/
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void __early_init(void) {
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stm32_clock_init();
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}
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#if HAL_USE_MMC_SPI
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/*
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* Card detection through the card internal pull-up on D3.
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*/
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bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
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static bool_t last_status = FALSE;
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(void)mmcp;
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if ((palReadLatch(GPIOA) & PAL_PORT_BIT(GPIOA_SPI3_CS_MMC)) == 0)
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return last_status;
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return last_status = (bool_t)palReadPad(GPIOA, GPIOA_SPI3_CS_MMC);
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}
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/*
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* Card write protection detection is not possible, the card is always
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* reported as not protected.
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*/
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bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
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(void)mmcp;
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return FALSE;
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}
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#endif
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/*
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* Board-specific initialization code.
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*/
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void boardInit(void) {
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/*
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* Several I/O pins are re-mapped:
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* USART3 to the PD8/PD9 pins.
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* I2C1 to the PB8/PB9 pins.
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* SPI3 to the PC10/PC11/PC12 pins.
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*/
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AFIO->MAPR |= AFIO_MAPR_USART3_REMAP_FULLREMAP |
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AFIO_MAPR_I2C1_REMAP |
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AFIO_MAPR_SPI3_REMAP;
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}
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